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2014-11-06mesa: fix UNCLAMPED_FLOAT_TO_UBYTE() macro for MSVCBrian Paul1-4/+4
MSVC replaces the "F" in "255.0F" with the macro argument which leads to an error. s/F/FLT/ to avoid that. It turns out we weren't using this macro at all on MSVC until the recent "mesa: Drop USE_IEEE define." change. Reviewed-by: Roland Scheidegger <sroland@vmware.com> (cherry picked from commit 9608193cbc6ea14e49adcd0193f9e7c6058d5a2f) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85918 Nominated-by: Roland Scheidegger <sroland@vmware.com>
2014-11-06r300g: remove enabled/disabled hyperz and AA compression messagesMarek Olšák1-2/+0
It's annoying with octave. Reported by Michael Burian. Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> (cherry picked from commit f058c6bbd1674bbbe1e1ef5f6f14b95307ec6312)
2014-10-29radeon/llvm: Dynamically allocate branch/loop stack arraysMichel Dänzer2-6/+37
This prevents us from silently overflowing the stack arrays, and allows arbitrary stack depths. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85454 Cc: mesa-stable@lists.freedesktop.org Reported-and-Tested-by: Nick Sarnie <commendsarnex@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 402ab50bedf9fba7654e63a6f2e808714714284d)
2014-10-29Revert "st/mesa: set MaxUnrollIterations = 255"Marek Olšák1-2/+1
This reverts commit 20836c81851e0df29a8ee9c86e5e5388738c840b. 255 is a huge number. If you have a loop with 255 iterations, unrolling it will exceed the SM3 instruction limit. Let's use the default again. The comment about a SM3 limit doesn't make sense. For SM3, we generally want 32 (default) or a lower number due to the SM3 instruction limit, which is 512 instructions. For SM4, we can try higher numbers if needed, but some shaders can end up being pretty huge and shader compilation can take more time. This fixes a shader compile failure on R500/SM3. Reported on IRC. Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 6fcb5520b78cdf1e5013c125501932315a069955)
2014-10-29radeonsi: fix incorrect index buffer max size for lowered 8-bit indicesMarek Olšák1-1/+1
Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit e05259b63745533231d7094967e7e1066a0e0851)
2014-10-29radeonsi: fix polygon mode for points and lines and point/line fill modesMarek Olšák1-3/+3
Fixes piglit/polygon-mode-offset. Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit 72424061e0722a1444b62af4cdbf03aaaf7e5ee0)
2014-10-29r600g: fix polygon mode for points and lines and point/line fill modesMarek Olšák2-6/+6
Fixes piglit/polygon-mode-offset. Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit dab177ea997b42ab93c9fe51bc16507bbbc27e34)
2014-10-29gallium/nouveau: fully build the driver under androidMauro Rossi1-1/+1
Fix the trivial typo in the variable name. Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 417b17378ae9a8c590b01f3432fa1542a0f042d7)
2014-10-29glsl: Use signed array index in update_max_array_access()Anuj Phogat1-3/+3
Avoids a crash in case of negative array index is used in a shader program. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> (cherry picked from commit 7a652c41b4de4bdbb954a4ebf6cdb605d197e999) Conflicts: src/glsl/ast_array_index.cpp
2014-10-29glsl: Fix crash due to negative array indexAnuj Phogat1-1/+1
Currently Mesa crashes with a shader like this: [fragmnet shader] float[5] array; int idx = -2; void main() { gl_FragColor = vec4(0.0, 1.0, 0.0, array[idx]); } Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> (cherry picked from commit 6f0089e92e9a3b096b978bb09a87db6a38acb7b2)
2014-10-29mesa: check that uniform exists in glUniform* functionsTapani Pälli1-8/+8
Remap table for uniforms may contain empty entries when using explicit uniform locations. If no active/inactive variable exists with given location, remap table contains NULL. v2: move remap table bounds check before existence check (Ian Romanick) Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> (v1) Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83574 (cherry picked from commit 9bd139e4515172d98e91d6ed7364ec3ea5cf623d)
2014-10-29glsl: fix uniform location count used for glsl typesTapani Pälli2-9/+12
Patch fixes the slot count used by vector types and adds 1 slot to be used by image and sampler types. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82921 (cherry picked from commit 1cb81d3a9b65781802f641fb3e4435edfed7f14a)
2014-10-29freedreno/a3xx: fix depth/stencil restore formatRob Clark1-1/+5
Also fix z16 restore format which was completely wrong. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 36310d9d56510ef50318bbb370f6c3d27ba09ebd)
2014-10-29freedreno/a3xx: fix viewport state during clearRob Clark1-1/+19
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 2bc2ab66d9c06477cdec6799c24733fbd2d4db3f)
2014-10-29freedreno: mark scissor state dirty when enable bit changesRob Clark1-0/+10
We don't have a scissor enable bit in hw, so when a raster state change results in scissor enable bit changing, we need to also mark scissor state as dirty. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 3eb8289aa4cb599e9297ee1a1b5cfbae35ee562a)
2014-10-29freedreno: clear vs scissorRob Clark7-13/+96
The optimization of avoiding restore (mem2gmem) if there was a clear falls down a bit if you don't have a fullscreen scissor. We need to make the decision logic a bit more clever to keep track of *what* was cleared, so that we can (a) completely skip mem2gmem if entire buffer was cleared, or (b) skip mem2gmem on a per-tile basis for tiles that were completely cleared. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 01b757e2b0fb97a146b0ef278b449cecab0d15e8)
2014-10-29freedreno/ir3: add debug flag to disable cpRob Clark3-1/+3
FD_MESA_DEBUG=nocp will disable copy propagation pass. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 4f17e026bb99c173444ff5ca7d0b782ed89ee604) Conflicts: src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
2014-10-29freedreno: positions come out as integers, not half-integersIlia Mirkin1-2/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit f0ca26725e48e6d85a9e2749caaf122e7bb8d6e6)
2014-10-29freedreno/a3xx: disable early-z when we have kill'sRob Clark3-0/+10
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 3fcb0212018e52c374f937e806abeca07e938d28)
2014-10-29freedreno/ir3: fix potential gpu lockup with killRob Clark4-2/+61
It seems like the hardware is unhappy if we execute a kill instruction prior to last input (ei). Probably the shader thread stops executing and the end-input flag is never set. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 8a0ffedd8de51eaf980855283c4525dba6dc5847)
2014-10-29freedreno/ir3: comment + better fxn nameRob Clark1-3/+5
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit ab33a240890a7ef147d4b8cf35c27ae1932a1dbe)
2014-10-29freedreno/a3xx: more layer/level fixesRob Clark3-8/+14
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 74069e324e559a9361ebe631d1b819ff6e675c8f)
2014-10-29freedreno/ir3: large const supportRob Clark5-13/+33
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 652b8fbbbb0132c634c90e4d1fdbca9497b7cd94)
2014-10-29freedreno: update generated headersRob Clark4-5/+10
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit e71a3f80fb5962651e8c3ece37ea2a61ef24f5f3)
2014-10-29freedreno: fix layer_strideRob Clark1-1/+1
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit dd332fe6414366b22a9d9ffce0fded51bc5b71a4)
2014-10-29freedreno: inline fd_draw_emit()Rob Clark2-49/+47
Manual LTO Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 8233b36a172820edf18ea4612f1979dc6089a1d7)
2014-10-29freedreno/ir3: optimize shader key comparisionRob Clark5-40/+79
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 368466b7b72aed74b917aeb3225d7a0a7101678c)
2014-10-29freedreno/a3xx: refactor/optimize emitRob Clark7-83/+125
Because we reuse various bits of emit code (for state/vertex/prog/etc) for both regular draws and internal draws (gmem<->mem, clear, etc), the number of parameters getting passed around has been growing. Refactor to group these into fd3_emit. This simplifies fxn signatures, avoids passing around shader key on the stack, etc. It also gives us a nice place to cache shader-variant lookup to avoid looking up shader variants multiple times per draw (without having to *also* pass them around as fxn args everywhere). Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit d595987ea3d1706fecb9f6416031ec8b27c95a9e)
2014-10-29freedreno/a3xx: refactor vertex state emitRob Clark11-79/+83
Get rid of fd3_vertex_buf and use fd_vertex_state directly for all draws. Removes a tiny bit of CPU overhead for munging around the vertex state every time it is emitted, but more importantly it cleans things up for later optimizations, so the emit paths don't have to special case internal draws (gmem<->mem, clears, etc) with regular draws. Instead of constructing fd3_vertex_buf array each time for internal draws, and context init time pre-create solid_vbuf_state and blit_vbuf_state. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit d5d80b37392c7f15c4fb39b6b1826230239930fd)
2014-10-29freedreno: query fixesRob Clark3-8/+13
Fixes a few issues, including a potential empty-IB (which triggers gpu hangs in piglit occlusion_query_meta_no_fragments) Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 7297bdbd50eb039878fe9e472dc736e1259710fb)
2014-10-29freedreno/a3xx: handle VS only outputting BCOLORRob Clark1-2/+10
Possibly we should map the front color to black (zeroes). But not sure there is a way to do that without generating a shader variant. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit a262c601d363aea2e6680df527e207cc9d5e235f)
2014-10-29freedreno/ir3: fix lockups with lame FRAG shadersRob Clark4-6/+17
Shaders like: FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL IN[0], GENERIC[0], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL TEMP[0], LOCAL IMM[0] FLT32 { 0.0000, 1.0000, 0.0000, 0.0000} 0: TEX TEMP[0], IN[0].xyyy, SAMP[0], 2D 1: MOV OUT[0], IMM[0].xyxx 2: END cause unhappyness. They have an IN[], but once this is compiled the useless TEX instruction goes away. Leaving a varying that is never fetched, which makes the hw unhappy. In the process fix a signed vs unsigned compare. If the vertex shader has max_reg=-1, MAX2() vs an unsigned would not give the desired result. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit af4d08839581c2372f17f75f1ad0fd1284ea7d8b)
2014-10-29freedreno/ir3: add TXF supportIlia Mirkin1-1/+39
Still failing a bunch of the fairly picky texelFetch tests, but the 1D(Array) ones are full passes. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 33c9ad97bf25271fcb034bc6054b74fff8a552fb)
2014-10-29freedreno/ir3: add TXD support and expose ARB_shader_texture_lodIlia Mirkin3-9/+56
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit e6acf3ac2445bbc15ab33001077343ac8b486b5b)
2014-10-29freedreno/ir3: add texture offset supportIlia Mirkin1-4/+45
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit c49107c889ca3c8c543e847a42bb174a6c3f4c6d)
2014-10-29freedreno/ir3: shadow comes before arrayIlia Mirkin1-2/+2
Experimentally, this makes *ArrayShadow tex-miplevel-selection tests pass. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 5bba74c64b30390114c105d58792301a222b0cdc)
2014-10-29freedreno/ir3: make TXQ return integers, not floatsIlia Mirkin1-1/+1
We're still doing something wrong for array textures. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 81b34e446103b3fcc59a4ce12643529aeb23be1c)
2014-10-29freedreno/ir3: add UMAD supportIlia Mirkin1-4/+15
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit c4e2a196c3e699023e2d371d1c698daaa19a6e77)
2014-10-29freedreno/ir3: add ISSG supportIlia Mirkin1-0/+39
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 347bc197a6f245c1ac3954acfefd15995f34d0f5)
2014-10-29freedreno/ir3: add MOD supportIlia Mirkin1-8/+12
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit ad5db64e7edf4bf1323168b4f3059df7eedfac1f)
2014-10-29freedreno/ir3: add UMOD support, based on UDIVIlia Mirkin1-6/+31
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit cab3cb1d716e4a039011c98f5820de4b6cb72834)
2014-10-29freedreno/ir3: add IDIV/UDIV supportIlia Mirkin1-3/+197
Logic shamelessly copied from nv50 lowering pass. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 8f7d01c2cb75fc6d093f18237103b8f992ae2528)
2014-10-29freedreno/ir3: avoid fan-in sources referring to same instructionIlia Mirkin1-2/+10
Since the RA has to be done s.t. each one gets its own (adjacent) register, it would complicate matters if instructions were allowed to be repeated. This enables copy-propagation use in situations where previously that might have happened. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 3dd9a0d6fdea1ff5b1fe903fce206bf1d1515400)
2014-10-29freedreno/a3xx: emit all immediates in one shotRob Clark1-8/+16
Makes the command stream a bit tighter when there are lots of immediates. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit f5eeb8a6dc4d1a1a4b88843e1c8d6d3a9c50512a)
2014-10-29freedreno: instanced drawing/compute not yet supportedIlia Mirkin1-3/+3
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit be00852bae11684ddb0a194bbfb8926495a9ec05)
2014-10-29freedreno/a3xx: handle large shader program sizesRob Clark1-11/+63
Above a certain limit use CACHE mode instead of BUFFER mode. This should solve gpu hangs with large shader programs. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 7309c6126f2987d703b2f30b3cb56edf97d437d3)
2014-10-29freedreno: update generated headersRob Clark4-8/+9
Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit d01ee5923df53b170e6ece7856d59fe15efec8b1)
2014-10-29freedreno: dual-source render targets are not supportedIlia Mirkin1-1/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 3dc47c59605282c7bad34fb336c39fe4ad9a0bf8)
2014-10-29freedreno: max-texture-lod-bias should be 15.0fRob Clark1-1/+1
Fixes piglit lodbias test. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit 204dd73c99ffefc8ed854e032dcf7bf10b91e409)
2014-10-29freedreno: destroy transfer pool after blitterRob Clark1-2/+2
Blitter can still have transfers hanging around which it frees in util_blitter_destroy(). So let it clean up before we yank the transfer_pool from under it. Signed-off-by: Rob Clark <robclark@freedesktop.org> (cherry picked from commit cc355f1c06063b6d3c0ba5377aee605c9c393488)
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 10:34:41 +0000