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2020-12-11panfrost: Fix several depth/stencil format mappingsBoris Brezillon2-9/+13
Stencil should always be loaded in component Y, even when the buffer only contains stencil values. Patch the blit shaders accordingly, and fix some format definitions. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7922>
2020-12-11panfost: Fix depth/stencil writeback on Bifrost v7Boris Brezillon1-0/+3
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7922>
2020-12-11pan/mdg: Fix texture handling for 2DMS arraysBoris Brezillon1-104/+148
While at it, move the coordinate building logic to a dedicated helper and make it generalize it to handle 1D arrays too. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8042>
2020-12-09panfrost: Preload SampleID when reloading multisample FBsBoris Brezillon1-0/+1
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7923>
2020-12-09pan/mdg: Add support for multi sample iteration writeoutBoris Brezillon3-30/+64
Some MSAA+fmt combination require writeout to be split. Right now, it only impacts blend shaders since we only support MSAA 4x, and the only formats that could exceed the 128bit/pixel limit in MSAA 4x are not supported by the fixed-function blend unit. We thus rely on the blend shader to split things properly. Things will change once we add MSAA 8x/16x to the mix, since even the blendable formats will exceed the 128b/pixel limit in that case. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7984>
2020-12-05panfrost: Fix draw descriptor definitionBoris Brezillon1-1/+6
Move the 2 words padding out of the draw descriptor to fix Midgard tiler job decoding. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7921>
2020-12-05panfrost: Fix texture payload decodingBoris Brezillon1-4/+8
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7921>
2020-11-25panfrost: Calculate the row stride at resource creation timeBoris Brezillon2-36/+4
So we don't have to calculate it again when we create a texture or framebuffer descriptor. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Fix panfrost_needs_explicit_stride() for block-based formatsBoris Brezillon1-11/+18
The expected stride calculation does not take the block width into account, thus creating an expected line stride that's bigger than required. Fix that by dividing the width by the block width. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Expose panfrost_block_dim()Boris Brezillon2-1/+4
So we can use it from pan_resource.c to retrieve the tile size based on a modifier. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Set the layer strideBoris Brezillon1-1/+5
Needed for 3D textures. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Add two helpers to calculate the surface pointer and stridesBoris Brezillon1-40/+60
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Clarify bit 2:28 meaning in the Midgard texture descriptorBoris Brezillon1-1/+1
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Add a minus(1) modifier to the Levels fieldBoris Brezillon3-6/+6
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Increase blit shader BO size on BifrostBoris Brezillon1-1/+1
Otherwise we hit 'offset + program->compiled.size < total_size' assert. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25pan/bi: LOD is a 8.8 fixed pointBoris Brezillon1-9/+17
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25pan/bi: Always emit a LOD/CUBE word for FETCH instructionsBoris Brezillon1-1/+4
There's no flag/mode to reflect when a LOD is zero on FETCH instructions, we have to emit the LOD/CUBE word unconditionally. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25pan/bi: Only update LOD mode on TEX operationsBoris Brezillon1-1/+3
If we don't add this check we clobber fetch mode when a 0 LOD is specified on a txf instruction. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Set sample_count when packing bifrost texture descriptorsBoris Brezillon1-0/+2
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Set depth for 3D textures on BifrostBoris Brezillon2-0/+3
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Fix decoding of texture payloadsBoris Brezillon1-4/+4
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Get rid of the Sample Count enumBoris Brezillon1-8/+1
Sample count just needs a log2 modifier. While at it, rename the "Multisample count" field "Sample count" to be consistent with other descriptors. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Stop forcing depth to nr_samplesBoris Brezillon2-2/+6
Those are two different things, and the fact that Midgard use the same offset in the texture descriptor for both things is just an implementation detail. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25panfrost: Fix RAW8/16/32 component replicationAlyssa Rosenzweig1-14/+14
Fixes dEQP-GLES3.functional.fbo.msaa.4_samples.r32f Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7653>
2020-11-25pan/bi: Implement shader-db statsAlyssa Rosenzweig2-0/+58
v2: Drop register tracking since it was wrong, and meaningful accounting is tricky for Bifrost (which wants round robin RA for at least some registers)... we'll cross that bridge when we get there, possibly preferring a "max liveness" estimate to the raw RA output. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/bi: Ensure TEXC src0 is not marked SSAAlyssa Rosenzweig2-3/+5
Prevents attempts to spill tied TEXC src/dest, resulting in a crash, seen in shaders/tesseract/229.shader_test Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/bi: Emit a combine even if we only pass one staging reg to TEXCBoris Brezillon1-4/+1
We need that to account for potential swizzling on the source reg. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/bi: Fix off-by-one in RAAlyssa Rosenzweig1-1/+1
Could result in trying to allocate R64 which is clearly wrong. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/bi: Fix varying writemask handlingAlyssa Rosenzweig1-2/+8
Allows shaders/supertuxkart/1.shader_test and shaders/unity/24-Tree.shader_test to compile. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/bi: Implement sampler1DAlyssa Rosenzweig1-4/+11
Enough to get shaders/humus-celshading/1.shader_test compiling, no idea if it actually works but it looks reasonable. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25pan/mdg: Fix shader-db counterAlyssa Rosenzweig1-1/+2
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-25panfrost: Add PAN_GPU_ID debug optionAlyssa Rosenzweig1-0/+10
I'd like to run shader-db locally without turning on the Bifrost machine. I'm lazy, it's just for debug builds, ok? 😇 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7615>
2020-11-24util: Add helgrind support for simple_mtxRob Clark2-0/+2
Annoyingly mtypes.h pulls in simple_mtx, which means we end up needing to sprinkle a lot of idep_mesautil around. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3773 Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
2020-11-18panfrost/util: Move nir_undef_to_zero into core nir and add 'lower'Jesse Natalie6-94/+2
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7565>
2020-11-17pan/bi: Stop extracting the immediate attribute index from src0Boris Brezillon5-20/+36
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Add a varying_index field to bi_textureBoris Brezillon2-3/+3
So we can get rid of the offset adjusment done in pack_variant() Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Fix LD_VAR with non-constant indexBoris Brezillon5-16/+42
src0 and src1 were mixed leading to invalid varying indices. In order to fix that properly, we first extend load_vary to pass the immediate index through a dedicated field and add a special boolean. This way, we don't have to make sure src0 always contains the index, and can instead match the src numbering defined in ISA.xml. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Stop passing special varying names through src0Boris Brezillon7-33/+30
It's just clearer to have dedicated fields encoding the fact that the LD_VAR should be SPECIAL, and another field storing the special var id. With this change, the source index know matches the ISA.xml definition. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Pass LD_VAR update mode explicitlyBoris Brezillon5-10/+21
Let the compiler pass the update mode instead of inferring from the constant value. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Move LD_VAR packing out of bi_pack_add()Boris Brezillon1-13/+20
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Set roundmode to RTZ for f2u operationsBoris Brezillon1-0/+1
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Let the GPU pick the right format based on the varying descriptorBoris Brezillon1-1/+1
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Support automatic register formatBoris Brezillon1-1/+10
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Support txs operationsBoris Brezillon1-0/+16
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/bi: Don't use TEXS for tex operations with a src that's not lod or coordBoris Brezillon1-4/+7
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>
2020-11-17pan/mdg: Try demoting uniforms instead of spilling to TLSIcecream951-3/+54
mir_estimate_pressure often underestimates the register pressure, letting too many registers be used for uniforms, causing RA to fail. Mitigate this by demoting some uniforms back to explicit loads to free up work registers if register allocation fails. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7616>
2020-11-13panfrost: Fix stack shift calculationIcecream951-1/+1
Fixes flickering in Neverwinter Nights. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3789 Fixes: e6152091ca9 ("panfrost: Use canonical characterization of tls_size") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7613>
2020-11-13pan/bi: Add support for tex offsetsBoris Brezillon1-6/+32
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
2020-11-13pan/bi: Allow lane selections on component 4 and aboveBoris Brezillon1-1/+1
The lane selection only cares about intra-32b swizzling. Add a modulo on the test to allow selecting lanes when the swizzle is above 4 (needed for MKVEC.v4i8 lane selection). Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
2020-11-13pan/bi: Allow vec16 in bi_print_swizzle()Boris Brezillon1-2/+2
Ideally we should choose "abcd" instead of "xyzw" when accessing a vector that has more than 4 components, but bi_instruction does not provide this information, so let's keep things simple for now. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7530>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-28 17:21:09 +0000