summaryrefslogtreecommitdiff
path: root/src/panfrost
AgeCommit message (Collapse)AuthorFilesLines
2020-09-24pan/bit: Set d3d=true for CMP testsAlyssa Rosenzweig1-3/+3
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Fixes: ec37c7126dc ("bifrost: Emit "d3d" variant of comparison instructions") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6712> (cherry picked from commit c4f518ce6a67508eaf4b16671f9a5d2777c74783)
2020-09-11pan/mdg: Fix spilling of non-32-bit typesIcecream951-1/+1
The source argument for mov has index 1, not 0. Fixes a vertex shader in SuperTuxKart. Fixes: b4de9e035ac ("pan/mdg: Mask spills from texture write") Reported-by: macc24 Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>~ Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6659> (cherry picked from commit a4885d26915d290192f3bb5e5f50355cfa266a59)
2020-09-01pan/mdg: Fix perspective combinationAlyssa Rosenzweig1-0/+1
It's not enough to multiply by a .w reciprocal, we have to be taking the reciprocal of the thing we're actually multiplying against. Fixes incorrect rendering in Manhattan. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525> (cherry picked from commit 41d0a81c2a3f09701e8c694b520c8d900f6ac2f1)
2020-09-01pan/mdg: Fix discard encodingAlyssa Rosenzweig1-1/+2
Let's match the blob. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525> (cherry picked from commit c8ac01af33a5bc63822915f08f89a7dbaf7d433f)
2020-08-21panfrost: Use memctx for sysvalsAlyssa Rosenzweig4-5/+5
8.74KB leaked over 52 calls from: 0xffffbb5b9fc3 in ?? _mesa_hash_table_init at ../src/util/hash_table.c:163 in /home/alyssa/rockchip_dri.so _mesa_hash_table_create at ../src/util/hash_table.c:186 _mesa_hash_table_u64_create at ../src/util/hash_table.c:701 in /home/alyssa/rockchip_dri.so panfrost_nir_assign_sysvals at ../src/panfrost/util/pan_sysval.c:130 in /home/alyssa/rockchip_dri.so midgard_compile_shader_nir at ../src/panfrost/midgard/midgard_compile.c:2905 in /home/alyssa/rockchip_dri.so Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373> (cherry picked from commit 680fb05f99d701d2156d231f6b5ae614b146c7ce)
2020-08-21pan/mdg: Free previous livenessAlyssa Rosenzweig1-3/+5
Before we drop the reference. 160 calls with 0B peak consumption from: 0xffffbd9d2fc3 in ?? pan_compute_liveness at ../src/panfrost/util/pan_liveness.c:127 in /home/alyssa/rockchip_dri.so mir_compute_liveness at ../src/panfrost/midgard/midgard_liveness.c:55 in /home/alyssa/rockchip_dri.so midgard_opt_dead_code_eliminate at ../src/panfrost/midgard/midgard_opt_dce.c:118 in /home/alyssa/rockchip_dri.so Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373> (cherry picked from commit 8dd38e5a3e68d67d6050f8bcba28cf3514ef1eef)
2020-08-21panfrost: Free hash_to_temp mapAlyssa Rosenzweig3-13/+13
No need to put it on the context, we can keep it local in mir_squeeze and drop when we're done. 15.77KB leaked over 85 calls from: 0xffffaed3bfc3 in ?? _mesa_hash_table_rehash at ../src/util/hash_table.c:368 in /home/alyssa/rockchip_dri.so hash_table_insert at ../src/util/hash_table.c:403 in /home/alyssa/rockchip_dri.so find_or_allocate_temp at ../src/panfrost/midgard/mir_squeeze.c:48 in /home/alyssa/rockchip_dri.so find_or_allocate_temp at ../src/panfrost/midgard/mir_squeeze.c:35 in /home/alyssa/rockchip_dri.so mir_squeeze_index at ../src/panfrost/midgard/mir_squeeze.c:76 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373> (cherry picked from commit 62637a913ab67dc3ade1af3c2d4ae724ab677836)
2020-08-21panfrost: Free NIR of blit shadersAlyssa Rosenzweig1-0/+1
After we compile from NIR to a native binary, we can throw away the NIR. 17.47KB leaked over 104 calls from: 0xffff87dcafc3 in ?? _mesa_hash_table_init at ../src/util/hash_table.c:163 in /home/alyssa/rockchip_dri.so _mesa_hash_table_create at ../src/util/hash_table.c:186 nir_lower_vars_to_ssa_impl at ../src/compiler/nir/nir_lower_vars_to_ssa.c:717 in /home/alyssa/rockchip_dri.so nir_lower_vars_to_ssa at ../src/compiler/nir/nir_lower_vars_to_ssa.c:817 optimise_nir at ../src/panfrost/midgard/midgard_compile.c:504 in /home/alyssa/rockchip_dri.so midgard_compile_shader_nir at ../src/panfrost/midgard/midgard_compile.c:2895 in /home/alyssa/rockchip_dri.so panfrost_build_blit_shader at ../src/panfrost/lib/pan_blit.c:103 in /home/alyssa/rockchip_dri.so Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: mesa-stable Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373> (cherry picked from commit da6d0e3facfe0eb5c7db2d75d6992643d929caff)
2020-08-21pan/mdg: Ensure barrier op is set on textureAlyssa Rosenzweig1-0/+1
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Fixes: 92c808cd475 ("pan/mdg: eliminate references to ins->texture.op") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6321> (cherry picked from commit 06c31031e7e87d83747e3f531f8fd5264c03dc08)
2020-08-04panfrost: Add MSAA mode selection fieldAlyssa Rosenzweig2-10/+35
This field enables MSAA, either writing samples to separate surfaces, to a single large-bpp surface, or implicitly resolved and to a single surface. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>
2020-08-03pan/mdg: Test for SSA before chasing addressesAlyssa Rosenzweig1-2/+25
It's possible an SSA value depends on a register; in this case, chasing the source would result in a crash as the chase helper in NIR asserts is_ssa. Instead we should check a priori that all the argments are in fact SSA, bailing otherwise. In the piglit shader exhibiting this bug (by looping over the index), bailing on the ishl instruction is -necessary-. This is not merely us being cowardly to avoid seeing through the registers; indeed, if we wrote away the ishl instruction, the shift itself would have to be stored in a load/store register (r26/r27) which would preclude reading it in the loop, creating a register allocation failure later in the compile. So this is the correct solution due to the restricted semantics. Closes #3286 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reported-by: Icecream95 <ixn@keemail.me> Fixes: f5401cb8866 ("pan/midgard: Add address analysis framework") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>
2020-08-03pan/mdg: Mask spills from texture writeAlyssa Rosenzweig1-0/+8
This prevents RA failures the results of reading multiple textures that require less than 4 channels, as seen in a number of GL 3 WebRender shaders. Closes: #3342 Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reported-by: Icecream95 <ixn@keemail.me> Tested-by: Icecream95 <ixn@keemail.me> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>
2020-07-31pan/bit: Remove BI_SHIFT stubAlyssa Rosenzweig1-3/+0
Fixes compile error with -Dtools=panfrost Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Fixes: 946ff9b4396 ("bifrost: Add support for nir_op_ishl") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6142>
2020-07-31pan/bit: Update f32->f16 convert testAlyssa Rosenzweig2-7/+8
Needs a second argument to be consistent with the real IR and the hardware instruction. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Fixes: 8a4efe2d730 ("pan/bi: Pack second argument of F32_TO_F16") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6142>
2020-07-31pan/mdg: emit REGISTER_UNUSED on unused ALU src2Italo Nicola2-3/+10
This saves power and time by skipping a roundtrip to the register file. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6128>
2020-07-30pan/mdg: remove ins->br_compact and ins->branch_extendedItalo Nicola2-5/+1
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: defer branch packingItalo Nicola3-160/+148
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: refactor emit_alu_bundleItalo Nicola1-24/+14
This refactor prepares emit_alu_bundle() for the next commit that reconstructs branch instructions right before emission. It also simplifies the code since the previous control flow was only better when we had the prepacked fields in midgard_instruction. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: remove ins->aluItalo Nicola4-26/+17
This commit removes the `ins->alu` field from midgard_instruction, simplifying the code by just recreating midgard_vector_alu later when we have to emit it. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: externalize mir_pack_modItalo Nicola2-1/+5
midgard_print.c requires mir_pack_mod to remove references to ins->alu. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: defer register packingItalo Nicola2-58/+105
This commit moves the packing of registers and other things from install_registers_instr() to midgard_emit.c, right before emitting the binary. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: eliminate references to ins->load_store.opItalo Nicola9-36/+48
This commit makes `ins->op` the correct field to use with load_store instructions. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: eliminate references to ins->texture.opItalo Nicola7-15/+23
This commit makes the `ins->op` the correct field to use with texture instructions. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: apply float outmods to texturesItalo Nicola1-26/+40
Texture instructions in midgard support float outmods, this commit makes it so these instructions are emitted when the conditions are met. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: eliminate references to ins->alu.outmodItalo Nicola4-10/+11
In an effort to simplify MIR by not prepacking instructions, this commit removes references to `ins->alu.outmod` so that we can later remove the `ins->alu` field from midgard_instruction. Every place that was using `ins->alu.outmod` was changed to now use the generic `ins->outmod` field instead. We then reconstruct the outmod field right before emission. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: fix commentItalo Nicola1-1/+1
Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: eliminate references to ins->alu.reg_modeItalo Nicola5-77/+80
In an effort to simplify MIR by not prepacking instructions, this commit removes references to `ins->alu.reg_mode` so that we can later remove the `ins->alu` field from midgard_instruction. Every place that was using reg_mode was changed to now use the generic `ins->src_type` field instead. We then reconstruct the reg_mode field right before emission. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: eliminate references to ins->alu.opItalo Nicola10-44/+54
In an effort to simplify MIR by not prepacking instructions, this commit removes references to `ins->alu.op` so that we can later remove the `ins->alu` field from midgard_instruction. Every place that was using ins->op was changed to now use the generic `ins->op` field instead. We then reconstruct the `alu.op` field right before emission. This new field is generic and can contain opcodes for ALU, texture or load/store instructions. It should be used in conjunction with `ins->type`, just like the current prepacked `op` field. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: prepare effective_writemask()Italo Nicola4-5/+5
In the next commits we will be removing the `alu` field from midgard_instruction in order to simplify the code. effective_writemask() doesn't actually use `alu` for anything, it only needs to know the opcode. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-30pan/mdg: fix src_type in instructions that need a implicit zeroItalo Nicola1-1/+1
We were incorrectly assuming uint32 for src_type[1] regardless of src_type[0]. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
2020-07-29panfrost/midgard: Make search_var take a nir_shader and modeJason Ekstrand1-6/+6
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-29nir: Add nir_foreach_shader_in/out_variable helpersJason Ekstrand1-1/+1
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
2020-07-28bifrost: Fix packing of ADD_FEXP2_FASTChris Forbes2-2/+2
This was being packed as 1-src and so the Src1 was not set up properly. It only worked by accident. Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6111>
2020-07-28bifrost: Honor src swizzle in special math opsChris Forbes1-3/+8
Most ops use the common handling in emit_alu in order to convert NIR sources to bifrost sources, but the "special" math op lowering handrolls the conversion (due to needing to reference the same source multiple times). Unfortunately, that handrolled lowering did not consider that there might be a non-identity swizzle on the source. In this case we would reference the wrong component of the source and generate garbage. Fixes all but two of the remaining failures on G31 in: dEQP-GLES2.functional.shaders.operator.exponential.*highp* The following tests are still broken due to some other issue: dEQP-GLES2.functional.shaders.operator.exponential.exp2.highp_float_fragment dEQP-GLES2.functional.shaders.operator.exponential.exp2.highp_vec2_fragment Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6108>
2020-07-28bifrost: Add support for nir_op_iabsChris Forbes5-0/+10
Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6098>
2020-07-28bifrost: Add support for nir_op_imulChris Forbes6-0/+25
Unfortunately this doesn't map nicely to the existing instruction classes, so we'll make a new one for now. Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28bifrost: Add support for nir_op_ugeChris Forbes1-0/+3
Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28bifrost: Add support for nir_op_ishlChris Forbes5-10/+20
Bifrost's bitwise ops include the shift capability. Previously we had hardcoded the shift to zero in all cases. There's room in future to emit slightly better code if a shift and a bitwise operation can be folded together, but not going after that for now. This change also removes the separate BI_SHIFT instruction class as BI_BITWISE can cover both cases. Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-28bifrost: Add support for nir_op_inotChris Forbes1-0/+7
Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>
2020-07-27bifrost: Add lowering for b2i32Chris Forbes1-1/+2
Since the bool representation is 0/~0, we can convert to int just by &1. Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27bifrost: Document d3d/gl comparison control bitChris Forbes1-3/+5
Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27bifrost: Emit "d3d" variant of comparison instructionsChris Forbes1-4/+4
The "d3d" variant uses ~0 as the true value. This is consistent with NIR's nir_lower_bool_to_int32 pass. Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-27bifrost: Lower x->bool conversions to != 0Chris Forbes1-0/+3
Signed-off-by: Chris Forbes <chrisforbes@google.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
2020-07-20pan/mdg: Use the blend RT for blend shader framebuffer fetchesIcecream951-4/+7
Fixes piglit test fbo-drawbuffers-blend-add when fixed-function blending is disabled in panfrost_get_blend_for_context. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5892>
2020-07-20panfrost: 8x MRT supportIcecream951-2/+2
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5892>
2020-07-18android: panfrost/encoder: add libmesa_nir static dependencyMauro Rossi1-0/+1
Fixes the following build error: In file included from external/mesa/src/panfrost/encoder/pan_blit.c:34: In file included from external/mesa/src/panfrost/encoder/../midgard/midgard_compile.h:27: external/mesa/src/compiler/nir/nir.h:52:10: fatal error: 'nir_opcodes.h' file not found ^~~~~~~~~~~~~~~ 1 error generated. Fixes: 293f251871b ("panfrost: Use Midgard-specific reloads") Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5961>
2020-07-18panfrost: Make panfrost_bo_wait take a wait_readers boolIcecream952-15/+5
panfrost_bo_wait is often used after panfrost_flush_batches_accessing_bo, so make them take similar arguments for consistency. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5962>
2020-07-17panfrost: Enable FP16 by defaultAlyssa Rosenzweig1-1/+1
I see no reason to hide this. The small hit in cycle count is offset in practice by the increase in thread count. So let's ship it and get some testing. If this regresses a workload: 1. Open an issue on the tracker and attach an apitrace. 2. In the meantime set PAN_MESA_DEBUG=nofp16 to override. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5960>
2020-07-17pan/mdg: Do per-sample framebuffer loadsIcecream952-2/+23
EXT_shader_framebuffer_fetch requires the fetched value to be per-sample, so we need to load the sample id when in a fragment shader. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5930>
2020-07-17panfrost: Rename lower_store to is_blend in pan_lower_framebufferIcecream951-2/+2
The bool will be used for deciding whether to do a per-sample load. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5930>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-26 00:18:31 +0000