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path: root/src/mesa/drivers/dri/i965/brw_draw_upload.c
AgeCommit message (Expand)AuthorFilesLines
2011-02-21intel: Pack dynamic draws togetherChris Wilson1-8/+8
2011-02-21i965: Trim the trailing NOOP from 3DSTATE_INDEX_BUFFERChris Wilson1-23/+12
2010-11-03intel: Annotate debug printout checks with unlikely().Eric Anholt1-1/+1
2010-10-13Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg1-3/+3
2010-10-12i965: Don't rebase the index buffer to min 0 if any arrays are in VBOs.Eric Anholt1-10/+1
2010-08-22i965: Use intel->gen >= 6 instead of IS_GEN6.Eric Anholt1-2/+2
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt1-11/+11
2010-05-14i965: Use R16G16B16A16_FLOAT for 3-component half-float.Eric Anholt1-1/+1
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang1-2/+2
2010-03-04intel: Remove non-kernel-exec-fencing support.Eric Anholt1-47/+16
2010-02-25i965: Fix up some Sandybridge define checks for the structure rebase.Eric Anholt1-3/+3
2010-02-25i965: Reconnect the index/vertex setup.Eric Anholt1-10/+32
2010-02-19Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg1-2/+2
2010-02-19Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versionsKristian Høgsberg1-2/+2
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul1-4/+0
2010-01-22i965: Remove unnecessary headers.Vinson Lee1-4/+0
2010-01-23i965: add support for ARB_half_float_vertexDave Airlie1-0/+11
2010-01-04intel: Drop batchbuffer cliprect_mode trackingKristian Høgsberg1-4/+4
2009-12-28intel: Silence compiler warnings.Vinson Lee1-2/+4
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt1-2/+2
2009-11-19intel: Remove non-GEM support.Eric Anholt1-8/+0
2009-11-13Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt1-10/+3
2009-11-12i965: Fix VBO last-valid-offset setup on Ironlake.Eric Anholt1-10/+3
2009-10-27i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul1-2/+2
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul1-4/+2
2009-10-27i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul1-2/+2
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul1-4/+2
2009-10-22Merge branch 'mesa_7_6_branch'Brian Paul1-2/+4
2009-10-22i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul1-2/+4
2009-10-14Merge branch 'mesa_7_6_branch'Brian Paul1-3/+3
2009-10-11i965: Fix the last valid address setting for the index buffer.Eric Anholt1-1/+1
2009-10-11i965: Fix the bounds emitted in the vertex buffer packets.Eric Anholt1-2/+2
2009-09-09Merge branch 'mesa_7_6_branch'Brian Paul1-1/+1
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul1-1/+1
2009-09-08i965: #include clean-upsBrian Paul1-1/+0
2009-09-08i965: use _mesa_is_bufferobj()Brian Paul1-2/+3
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul1-1/+1
2009-09-04i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt1-0/+14
2009-09-04i965: Don't emit bad packets when no VBs are referenced.Eric Anholt1-0/+22
2009-09-04i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt1-29/+15
2009-09-04i965: Set the max index buffer address correctly according to the docs.Eric Anholt1-1/+1
2009-09-04i965: rename var: s/tmp/vs_inputs/Brian Paul1-8/+8
2009-08-15i965: disable bounds checking on arrays with stride 0Roland Scheidegger1-1/+1
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt1-16/+42
2009-08-12i965: Use _MaxElement instead of index-calculated min/max for VBO bounds.Eric Anholt1-2/+3
2009-08-03i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt1-0/+14
2009-08-03i965: Don't emit bad packets when no VBs are referenced.Eric Anholt1-0/+22
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt1-29/+15
2009-07-13i965: add support for new chipsetsXiang, Haihao1-6/+25
2009-06-23i965: Set the max index buffer address correctly according to the docs.Eric Anholt1-1/+1
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