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AgeCommit message (Expand)AuthorFilesLines
2017-06-28i965: Fix broxton 2x6 l3 configAnuj Phogat1-0/+16
2017-06-28i965: Add and initialize l3_banks field for gen7+Anuj Phogat2-3/+27
2017-06-28anv: Fix L3 cache programming on Bay TrailJonas Kulla1-1/+1
2017-06-03anv: Require vertex buffers to come from a 32-bit heapJason Ekstrand1-0/+12
2017-06-02anv: Advertise both 32-bit and 48-bit heaps when we have enough memoryJason Ekstrand1-6/+36
2017-06-02anv: Refactor memory type setupJason Ekstrand1-36/+40
2017-06-02anv: Make supports_48bit_addresses a heap propertyJason Ekstrand2-3/+14
2017-06-02anv: Stop setting BO flags in bo_init_newJason Ekstrand3-7/+23
2017-06-02anv: Add valid_bufer_usage to the memory type metadataJason Ekstrand2-8/+26
2017-06-02anv: Determine the type of mapping based on type metadataJason Ekstrand2-7/+7
2017-06-02anv: Set EXEC_OBJECT_ASYNC when availableJason Ekstrand8-4/+26
2017-06-01anv: automake: list shared libraries after the static onesEmil Velikov1-16/+15
2017-06-01anv: Set image memory types based on the type countJason Ekstrand1-2/+4
2017-06-01anv: Set up memory types and heaps during physical device initJason Ekstrand2-44/+81
2017-05-31anv: Predicate 48bit support on gen >= 8Jason Ekstrand1-1/+6
2017-05-31anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hackJason Ekstrand1-28/+0
2017-05-31anv: Handle transitioning depth from UNDEFINED to other layoutsJason Ekstrand2-19/+19
2017-05-31anv: Handle color layout transitions from the UNINITIALIZED layoutJason Ekstrand3-2/+108
2017-05-31configure: check once for DRI3 dependenciesEmil Velikov1-2/+1
2017-05-19anv/formats: Update the three-channel BC1 mappingsNanley Chery1-2/+2
2017-05-18Android: correct libz dependencyChih-Wei Huang1-1/+1
2017-05-18anv: don't leak DRM devicesGrazvydas Ignotas1-0/+1
2017-05-18anv: fix possible stack corruptionGrazvydas Ignotas1-1/+1
2017-05-18i965/vec4: load dvec3/4 uniforms first in the push constant bufferSamuel Iglesias Gonsálvez1-27/+80
2017-05-18i965/vec4: fix swizzle and writemask when loading an uniform with constant of...Samuel Iglesias Gonsálvez1-4/+11
2017-05-18i965/vec4/gs: restore the uniform values which was overwritten by failed vec4...Samuel Iglesias Gonsálvez1-0/+26
2017-05-18intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4Pohjolainen, Topi1-23/+5
2017-05-08anv: anv_gem_mmap() returns MAP_FAILED as mapping errorSamuel Iglesias Gonsálvez2-6/+4
2017-05-05i965/vec4: don't modify regioning parameters to the sources of DF align1 inst...Samuel Iglesias Gonsálvez1-8/+1
2017-05-05i965/vec4: fix register width for DF VGRF and UNIFORMSamuel Iglesias Gonsálvez1-5/+7
2017-05-05i965/vec4: fix vertical stride to avoid breaking region parameter ruleSamuel Iglesias Gonsálvez1-18/+32
2017-04-30anv/cmd_buffer: Use the device allocator for QueueSubmitJason Ekstrand1-3/+3
2017-04-30anv: Don't place scratch buffers above the 32-bit boundaryJason Ekstrand1-0/+19
2017-04-30intel/fs: Take into account amount of data read in spilling cost heuristic.Francisco Jerez1-1/+1
2017-04-30intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.Francisco Jerez1-2/+1
2017-04-30i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().Kenneth Graunke1-0/+7
2017-04-24anv/cmd_buffer: Disable CCS on BDW input attachmentsNanley Chery2-30/+13
2017-04-24anv: blorp: flush memory after copyLionel Landwerlin1-2/+2
2017-04-16intel/decoder: Fix is_header_field starting condition.Kenneth Graunke1-1/+1
2017-04-14anv: Add the pci_id into the shader cache UUIDJason Ekstrand1-5/+15
2017-04-14i965: Use correct VertStride on align16 instructions.Matt Turner1-10/+34
2017-04-14i965/vec4/dce: improve track of partial flag register writesSamuel Iglesias Gonsálvez1-1/+1
2017-04-14i965/vec4: don't do horizontal stride on some register file typesSamuel Iglesias Gonsálvez1-2/+5
2017-04-14i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.Matt Turner1-4/+12
2017-04-14i965/vec4: use vec4_builder to emit instructions in setup_imm_df()Samuel Iglesias Gonsálvez2-50/+50
2017-04-14i965/vec4: consider subregister offset in live variablesJuan A. Suarez Romero1-2/+2
2017-04-14i965/vec4: fix assert to detect SIMD lowered DF instructions in IVBFrancisco Jerez1-5/+1
2017-04-14i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez7-27/+60
2017-04-14i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2-8/+1
2017-04-14i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYTJuan A. Suarez Romero1-7/+19
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