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path: root/src/gallium/drivers/radeonsi
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2014-06-03r600g,radeonsi: don't use hardware MSAA resolve if dst is fast-clearedMarek Olšák1-1/+2
It doesn't work and our docs say so too. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-06-03radeonsi: BlitFramebuffer should follow render conditionMarek Olšák1-5/+6
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-06-02radeonsi: enable ARB_sample_shadingMarek Olšák1-1/+1
2014-06-02radeonsi: implement SAMPLEMASK fragment shader outputMarek Olšák1-3/+15
2014-06-02radeonsi: interpolate varyings at sample when full sample shading is enabledMarek Olšák3-12/+15
2014-06-02radeonsi: implement SAMPLEPOS fragment shader inputMarek Olšák2-0/+48
The sample positions are read from a constant buffer.
2014-06-02radeonsi: implement SAMPLEID fragment shader inputMarek Olšák1-1/+17
2014-06-02radeonsi: implement set_min_samplesMarek Olšák4-2/+36
This is how per-sample shading is enabled.
2014-06-02radeon: add basic register setup for per-sample shadingMarek Olšák1-4/+2
Only for Cayman, SI, CIK.
2014-06-02radeon: split cayman_emit_msaa_state into 2 functionsMarek Olšák1-1/+2
The other function will be split up from the framebuffer state.
2014-06-02gallium: create TGSI_PROPERTY to disable viewport and clippingChristoph Bumiller1-0/+1
Marek v2: add a cap Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-05-15gallium/radeon: link in libradeon.la at target levelEmil Velikov1-2/+0
It makes more sense to link the core and common parts of the driver as the target is build. Additionally this will help us drop duplicating symbols for targets that static link mulitple pipe-drivers. Only egl-static needs that currently with more to come. To simplify things a bit add HAVE_GALLIUM_RADEON_COMMON variable. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-05-15gallium/radeon: build only a single common library libradeonEmil Velikov1-2/+1
Just fold libllvmradeon in libradeon. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-05-14radeonsi: Fix anisotropic filtering state setupMichel Dänzer1-4/+3
Bring it back in line with r600g. I broke this in the original radeonsi bringup. :( Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537 Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-05-10radeonsi: prepare depth export registers at compile timeMarek Olšák3-14/+14
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-10radeonsi: simplify depth/stencil export codeMarek Olšák1-11/+5
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-10radeonsi: add and use a helper function for loading constantsMarek Olšák1-19/+19
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-10radeonsi: only count CS space for state atoms if we're going to drawMarek Olšák1-5/+5
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-10radeonsi: remove unused variable exports_ps in si_pipe_shader_psMarek Olšák1-12/+1
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-10radeonsi: use DRAW_PREAMBLE on CIKMarek Olšák2-5/+10
It's the same as setting the 3 regs separately, but shorter, and it also seems to be required on GFX7.2 and later. This doesn't fix Hawaii. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-05-09radeonsi: Enable geometry shaders with LLVM 3.4.1Tom Stellard4-9/+13
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
2014-05-08radeonsi: Don't use anonymous struct trick in atom trackingAdam Jackson6-10/+10
I'm somewhat impressed that current gccs will let you do this, but sufficiently old ones (including 4.4.7 in RHEL6) won't. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Adam Jackson <ajax@redhat.com>
2014-05-07gallium: add a cap for supporting 4-offset TG4 opcodesIlia Mirkin1-1/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-05-06radeonsi: implement ARB_texture_cube_map_arrayMarek Olšák3-6/+47
No LLVM changes needed. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> v2: updated GL3.txt and relnotes
2014-05-02radeonsi: add support for Mullins asics.Samuel Li1-0/+2
v2: name defaults to kabini for older llvm v3: fix llvm version check Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-04-26gallium: add basic support for ARB_sample_shadingIlia Mirkin1-0/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-04-25radeonsi: implement GL_ARB_vertex_type_10f_11f_11f_revMarek Olšák1-0/+6
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-04-22radeonsi: Fix calculation of number of banks for SIMichel Dänzer3-16/+20
The way cik_num_banks() was calculating the index only makes sense for the CIK specific macrotile mode array. For SI, we need to use the tile mode index directly. This happened to work most of the time because most of the SI tiling modes use the same number of banks. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-18radeonsi: fix num banks selection on SI for dma setup (v2)Alex Deucher3-24/+19
The number of banks varies based on the tile mode index just like CIK. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=77533 v2: fix ordering for nbanks calculation for consistency Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-18r600g,radeonsi: don't skip the context flush if a fence should be returnedMarek Olšák1-1/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
2014-04-17radeonsi: Added Diag Handler to receive LLVM Error messagesDarren Powell2-3/+11
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-04-16r600g,radeonsi: share some of gfx flush codeMarek Olšák1-41/+3
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16r600g,radeonsi: share r600_flush_from_stMarek Olšák1-17/+0
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16radeonsi: merge si_flush with si_context_flushMarek Olšák3-38/+29
This also removes si_flush_gfx_ring. Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16gallium/radeon: create and return a fence in the flush functionMarek Olšák3-19/+14
All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák1-2/+3
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16radeonsi: cleanup redundant computation of flush flags and rename a functionMarek Olšák1-8/+9
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10gallium: add a way to query min/max texture gather offsetsIlia Mirkin1-0/+2
Defaults to providing the same offsets as MIN/MAX_TEXEL_OFFSET. For nvc0, the offset can be -32/31. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-10winsys/radeon: fix a race condition between winsys_create and winsys_destroyMarek Olšák1-1/+1
This also hides the reference count from drivers. v2: update the reference count while the mutex is locked in winsys_create Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-09gallium/radeon: fix warningsMarek Olšák1-1/+1
2014-04-07gallium: add support for LODQ opcodes.Dave Airlie1-0/+1
This opcode provide support for GL_ARB_texture_query_lod, Signed-off-by: Dave Airlie <airlied@redhat.com> [imirkin: rebase, docs update] Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-02mesa/soft/llvmpipe: add fake MSAA supportDave Airlie1-0/+1
This adds a gallium cap that allows us to fake GL3.0 by not exposing MSAA on sw rendering. It also forces the extra extensions needed for GL3.2. Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-20radeonsi: Implement DMA blitNiels Ole Salscheider6-20/+391
This code is a slightly modified version of evergreen_dma_blit (and evergreen_dma_copy as well as evergreen_dma_copy_tile). It would be nice to share some of the code in the long term. I have reused some "cik"-prefixed functions that also return the right value for SI. I am not sure if they should be renamed. v2: Marek> removed gfx.flush in si_dma_copy_tile Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-03-15radeonsi/compute: Fix memory leakAaron Watry1-0/+6
Free shader buffer object for all kernels when deleting compute state. Signed-off-by: Aaron Watry <awatry@gmail.com>
2014-03-14radeonsi: flush the dma ring in si_flush_from_stNiels Ole Salscheider1-0/+7
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-03-11r600g,radeonsi: attempt to fix racy multi-context apps calling BufferDataMarek Olšák1-4/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75061 v2: minimize the window where cs_buf != new_buf
2014-03-11r600g,radeonsi: use a fallback in dma_copy instead of failingMarek Olšák1-8/+11
v2: - allow byte-aligned DMA buffer copies on Evergreen - fix piglit/texsubimage regression - use the fallback for 3D copies (depth > 1) as well
2014-03-11radeonsi: small cleanup in get_paramMarek Olšák1-4/+2
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11radeonsi: set correct alignment for texture buffers and constant buffersMarek Olšák1-3/+2
I think these are all equivalent to vertex buffer fetches which should be dword-aligned. Scalar loads are also dword-aligned. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g, radeonsi: fix primitives-generated query with disabled streamoutMarek Olšák4-1/+3
Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled. This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1 if either streamout or the primitives-generated query is enabled. However, the primitives-emitted query is also incremented, so it's disabled by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound. This fixes piglit: ARB_transform_feedback2/counting with pause EXT_transform_feedback/primgen-query transform-feedback-disabled Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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