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2014-08-27r600g/compute: Don't initialize vertex_buffer_state masks to 0x2Tom Stellard1-3/+0
cs_vertex_buffer_state.enabled_mask and cs_vertex_buffer_state.dirty_mask are both updated when r600_set_constant_buffer() is called, so we don't need to manually update these values. This fixes a crash with OpenCL programs that have a kernel with no arguments. https://bugs.freedesktop.org/show_bug.cgi?id=82671 CC: "10.2" <mesa-stable@lists.freedesktop.org> (cherry picked from commit bf7a60f41d897be4d9804ba7c46633e38501ffe7)
2014-08-27r600g: fix constant buffer fetchesMarek Olšák1-0/+1
Somebody forgot to do this. It was uncovered by recent st/mesa changes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82139 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Andreas Boll <andreas.boll.dev@gmail.com> (cherry picked from commit da9c3ed304be5d08ff989d61c6e2d1be8a845767)
2014-08-25android: gallium/radeon: attempt to fix the android buildPaulo Sergio Travaglia1-1/+1
- include the correct folders - add a new buildscript for the common radeon folder v2: Use the installed libdrm headers over the DRM_TOP ones. Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org> [Emil Velikov] Split up and add commit message. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> (cherry picked from commit 5bbfa308c918ee40ec4deea91362688d325886f9)
2014-07-30r600g,radeonsi: switch all occurences of array_size to util_max_layerMarek Olšák1-2/+3
This fixes 3D texture support in all these cases, because array_size is 1 with 3D textures and depth0 actually contains the "array size". util_max_layer is universal and returns the last layer index for any texture target. A lot of the cases below can't actually be hit with 3D textures, but let's be consistent. This fixes a failure in: piglit layered-rendering/clear-color-all-types 3d single_level for r600g and radeonsi, which was caused by an incorrect CMASK size calculation. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit a9528cef6b6ff4875c9d125a60b7309a2ad24766)
2014-07-30r600g: switch SNORM conversion to DX and GLES behaviorMarek Olšák4-7/+0
it also matches GL 4.2 further discussion: http://lists.freedesktop.org/archives/mesa-dev/2013-August/042680.html Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit d5bcb5e8dea3dc949ff6b093af7f46585b94b63e)
2014-06-06r600g,radeonsi: don't use hardware MSAA resolve if dst is fast-clearedMarek Olšák1-1/+2
It doesn't work and our docs say so too. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit d2261918202697febed0de18f66416e273001088)
2014-05-16radeonsi: Fix anisotropic filtering state setupMichel Dänzer1-9/+0
Bring it back in line with r600g. I broke this in the original radeonsi bringup. :( Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537 Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c5828b0599a5c00ebab488b795c63a21f1dc53cd)
2014-04-26gallium: add basic support for ARB_sample_shadingIlia Mirkin1-0/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-04-25r600g: fix hang on RV740 by using DX_RASTERIZATION_KILL instead of SX_MISCMarek Olšák5-7/+27
Changing SX_MISC hangs RV740. When we're at it, let's use DX_RASTERIZATION_KILL on all R700 and later chipsets. Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-25r600g: fix for an MSAA hang on RV770Marek Olšák3-1/+12
Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-25r600g: fix for broken CULL_FRONT behavior on R6xxMarek Olšák4-61/+64
Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-25r600g: fix buffer copying on R600-R700Marek Olšák1-0/+6
This fixes broken rendering in DOTA 2. Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-25r600g: fix flushing on RV670, RS780, RS880 againMarek Olšák1-0/+9
Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-25r600g: fix edge flags and layered rendering on R600-R700Marek Olšák1-2/+4
We forgot to set these bits. Cc: 10.1 mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-04-18r600g,radeonsi: don't skip the context flush if a fence should be returnedMarek Olšák1-1/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
2014-04-17r600g: Disable LLVM by default at runtime for graphicsMichel Dänzer3-5/+5
For graphics, the LLVM compiler backend currently has many shortcomings compared to the non-LLVM one. E.g. it can't handle geometry shaders yet, but that's just the tip of the iceberg. So building Mesa with --enable-r600-llvm-compiler is currently not recommended for anyone who doesn't want to work on fixing those issues. However, for protection of users who end up enabling it anyway for some reason, let's disable the LLVM backend at runtime by default. It can be enabled with the environment variable R600_DEBUG=llvm. Cc: "10.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-04-16r600g,radeonsi: share some of gfx flush codeMarek Olšák1-41/+3
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16r600g,radeonsi: share r600_flush_from_stMarek Olšák1-17/+0
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16r600g: merge r600_flush with r600_context_flushMarek Olšák3-45/+33
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16gallium/radeon: create and return a fence in the flush functionMarek Olšák5-18/+20
All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák1-6/+5
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16r600g: remove redundant r600_flush_from_winsysMarek Olšák1-8/+1
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10gallium: add a way to query min/max texture gather offsetsIlia Mirkin1-0/+2
Defaults to providing the same offsets as MIN/MAX_TEXEL_OFFSET. For nvc0, the offset can be -32/31. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-10winsys/radeon: fix a race condition between winsys_create and winsys_destroyMarek Olšák1-1/+1
This also hides the reference count from drivers. v2: update the reference count while the mutex is locked in winsys_create Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10r600g: Don't leak bytecode on shader compile failureMichel Dänzer1-7/+12
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-07gallium: add support for LODQ opcodes.Dave Airlie1-0/+1
This opcode provide support for GL_ARB_texture_query_lod, Signed-off-by: Dave Airlie <airlied@redhat.com> [imirkin: rebase, docs update] Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-04-02mesa/soft/llvmpipe: add fake MSAA supportDave Airlie1-0/+3
This adds a gallium cap that allows us to fake GL3.0 by not exposing MSAA on sw rendering. It also forces the extra extensions needed for GL3.2. Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-20r600g: use more appropriate names for async DMA functionsMarek Olšák5-32/+32
*_dma_copy calls either *_dma_copy_buffer or *_dma_copy_tile. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-20r600g: deobfuscate async DMA codeMarek Olšák6-31/+35
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-20r600g: don't flush the gfx IB explicitly before doing DMAMarek Olšák4-11/+0
It's flushed by calling r600_context_bo_reloc. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-20radeon: Move r600_need_dma_space to common codeNiels Ole Salscheider5-15/+4
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-03-14radeon: Move DMA ring creation to common codeNiels Ole Salscheider2-31/+0
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-03-11r600g: compute memory pool size is given in dwNiels Ole Salscheider1-2/+2
Multiply the dw value by 4 in order to map the complete buffer. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
2014-03-11r600g,radeonsi: attempt to fix racy multi-context apps calling BufferDataMarek Olšák1-4/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75061 v2: minimize the window where cs_buf != new_buf
2014-03-11r600g,radeonsi: use a fallback in dma_copy instead of failingMarek Olšák2-35/+49
v2: - allow byte-aligned DMA buffer copies on Evergreen - fix piglit/texsubimage regression - use the fallback for 3D copies (depth > 1) as well
2014-03-11r600g, radeonsi: fix primitives-generated query with disabled streamoutMarek Olšák4-10/+7
Buffers are disabled by VGT_STRMOUT_BUFFER_CONFIG, but the query only works if VGT_STRMOUT_CONFIG.STREAMOUT_0_EN is enabled. This moves VGT_STRMOUT_CONFIG to its own state. The register is set to 1 if either streamout or the primitives-generated query is enabled. However, the primitives-emitted query is also incremented, so it's disabled by setting VGT_STRMOUT_BUFFER_SIZE to 0 when there is no buffer bound. This fixes piglit: ARB_transform_feedback2/counting with pause EXT_transform_feedback/primgen-query transform-feedback-disabled Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g,radeonsi: fix MAX_TEXTURE_3D_LEVELS and MAX_TEXTURE_ARRAY_LAYERS limitsMarek Olšák1-3/+5
CB_COLORi_VIEW.SLICE_MAX can be at most 2047. This fixes the maxlayers piglit test. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g: move fast color clear code to a common placeMarek Olšák1-80/+2
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g,radeonsi: move CMASK register values from r600_surface to r600_textureMarek Olšák2-40/+8
When doing fast clear for single-sample color buffers for the first time, a CMASK buffer has to be allocated and the CMASK state in all pipe_surfaces referencing the color buffer must be updated. Updating all surfaces is kinda silly, so let's move the values to r600_texture instead. This is only for Evergreen and later. R600-R700 don't have fast clear. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g: move cayman MSAA setup to a common placeMarek Olšák2-214/+12
I will use this in radeonsi. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11r600g,radeonsi: set priorities for relocationsMarek Olšák6-41/+104
2014-03-10r600g: document why texture offset emulation is neededMarek Olšák1-1/+2
2014-03-07radeon: Rename struct radeon_llvm_binary to radeon_shader_binary v2Tom Stellard1-2/+2
And move its definition into r600_pipe_common.h; This struct is a just a container for shader code and has nothing to do with LLVM. v2: - Drop unrelated Makefile change Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-07r600g: fix blitting the last 2 mipmap levels for EvergreenMarek Olšák3-13/+36
This fixes a lot of compressedteximage piglit tests. R600-R700 don't have this issue. Cc: mesa-stable@lists.freedesktop.org
2014-03-07r600g: fix texelFetchOffset GLSL functionsMarek Olšák1-10/+77
Cc: mesa-stable@lists.freedesktop.org
2014-03-04r600g: implement edge flagsMarek Olšák3-4/+53
Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04r600g: port color buffer format conversion from radeonsiMarek Olšák4-913/+161
r600_translate_colorformat is rewritten to look like radeonsi. r600_translate_colorswap is shared with radeonsi. r600_colorformat_endian_swap is consolidated. This adds some formats which were missing. Future "plain" formats will automatically be supported. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-02-28r600g/compute: PIPE_CAP_COMPUTE should be false for pre-evergreen GPUsTom Stellard1-1/+3
This prevents clover from using unsupported devices. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> CC: "10.0 10.1" <mesa-stable@lists.freedesktop.org>
2014-02-25r600g,radeonsi: consolidate create_surface and surface_destroyMarek Olšák1-44/+0
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-02-25r600g: remove r600_resource.hMarek Olšák5-48/+15
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>