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path: root/src/gallium/drivers/nouveau/codegen
AgeCommit message (Expand)AuthorFilesLines
2016-04-15nvc/ir: remove duplicate variable declarationEmil Velikov1-1/+0
2016-04-14nv50/ir: we can't load local memory directly into an outputIlia Mirkin1-1/+2
2016-04-14nvc0/ir: fix picking of coordinates from tex instruction for textureGradIlia Mirkin1-0/+11
2016-04-14nv50/ir: fix indirect texturing for non-array textures on nvc0Ilia Mirkin1-3/+7
2016-04-14nv50/ir: force-enable derivatives on TXD opsIlia Mirkin2-1/+4
2016-04-11nv50/ir: fix quadop emission in the presence of predicationIlia Mirkin4-5/+9
2016-02-24nvc0/ir: fix converting between predicate and gprIlia Mirkin3-11/+41
2016-02-04nv50/ir: fix false global CSE on instructions with multiple defsIlia Mirkin1-0/+2
2016-02-04nv50/ir: fix memory corruption when spilling and redoing RAKarol Herbst1-0/+3
2016-01-08nv50/ir: float(s32 & 0xff) = float(u8), not s8Ilia Mirkin1-0/+3
2016-01-08gk104/ir: simplify and fool-proof texbar algorithmIlia Mirkin2-83/+56
2016-01-08nv50/ir: can't have predication and immediatesIlia Mirkin1-0/+3
2015-12-12nv50/ir: fix cutoff for using r63 vs r127 when replacing zeroIlia Mirkin1-1/+2
2015-12-12gk110/ir: fix imad sat/hi flag emission for immediate argsIlia Mirkin1-8/+3
2015-12-12gk104/ir: sampler doesn't matter for txfIlia Mirkin1-1/+1
2015-12-12gk110/ir: fix imul hi emission with limm argIlia Mirkin1-2/+2
2015-12-04nv50/ir: avoid looking at uninitialized srcMods entriesIlia Mirkin2-2/+2
2015-12-04nv50/ir: fix DCE to not generate 96-bit loadsIlia Mirkin1-1/+31
2015-12-04nv50/ir: don't forget to mark flagsDef on cvt in txb loweringIlia Mirkin1-1/+1
2015-12-04nv50/ir: fix instruction permutation logicIlia Mirkin1-1/+1
2015-12-04nv50/ir: the mad source might not have a defining instructionIlia Mirkin1-1/+1
2015-12-04nv50/ir: deal with loops with no breaksIlia Mirkin1-0/+6
2015-12-04nvc0/ir: fold postfactor into immediateIlia Mirkin1-0/+6
2015-11-29nv50/ir: fix (un)spilling of 3-wide resultsIlia Mirkin1-4/+42
2015-11-18nvc0/ir: actually emit AFETCH on keplerIlia Mirkin1-0/+3
2015-11-12nvc0/ir: add support for TGSI_SEMANTIC_HELPER_INVOCATIONIlia Mirkin6-0/+6
2015-11-07nv50/ir: fix emission of s[] args in certain situationsIlia Mirkin1-2/+2
2015-11-07nv50/ir: only take abs value when computing high resultIlia Mirkin1-1/+1
2015-11-07nv50/ir: allow emission of immediates in imul/imad opsIlia Mirkin1-2/+8
2015-11-06nv50/ir: properly set the type of the constant folding resultIlia Mirkin1-4/+4
2015-11-06nv50/ir: add support for const-folding OP_CVT with F64 source/destIlia Mirkin3-0/+45
2015-11-06nv50/ir: add fp64 opcode emission support for G200 (NVA0)Ilia Mirkin1-10/+84
2015-11-06nv50/ir: Add support for 64bit immediates to checkSwapSrc01Hans de Goede1-5/+6
2015-11-06nvc0/ir: Teach insnCanLoad about double immediatesHans de Goede1-6/+19
2015-11-06nv50/ir: Add support for merge-s to the ConstantFolding passHans de Goede1-0/+15
2015-11-06nv50/ir: disallow 64-bit immediates on nv50 targetsIlia Mirkin1-1/+1
2015-11-06nv50/ir: allow movs with TYPE_F64 destinations to be splitIlia Mirkin1-0/+6
2015-11-06gm107/ir: Add support for double immediatesHans de Goede1-1/+4
2015-11-06nvc0/ir: Add support for double immediatesHans de Goede1-0/+8
2015-11-05nv50,nvc0: provide debug messages with shader compilation statsIlia Mirkin2-0/+3
2015-10-31nouveau: get rid of tabsIlia Mirkin3-4/+4
2015-10-29nv50: allow per-sample interpolation to be forced via rastIlia Mirkin3-3/+29
2015-10-29nv50/ir: adapt to new method for passing in cull/clip distance masksIlia Mirkin3-8/+10
2015-10-29nvc0: do upload-time fixups for interpolation parametersIlia Mirkin7-9/+157
2015-10-15nv50/ir: use C++11 standard std::unordered_map if possibleChih-Wei Huang1-3/+17
2015-09-14nvc0/ir: start offset at texBindBase for txq, like regular texturingIlia Mirkin1-1/+4
2015-09-13nv50/ir: add support for TXQS tgsi opcodeIlia Mirkin3-7/+39
2015-09-10nv50/ir: don't fold immediate into mad if registers are too highIlia Mirkin1-0/+4
2015-09-10nv50/ir: fix emission of 8-byte wide interp instructionIlia Mirkin1-5/+6
2015-09-10nv50/ir: r63 is only 0 if we are using less than 63 registersIlia Mirkin1-1/+4
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