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2017-06-07gallium/ureg: add TEX/TXF_LZ opcodes to uregMarek Olšák1-0/+2
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-05tgsi/scan: fix scanning fragment shaders with PrimID and Position/FaceMarek Olšák1-7/+10
Not relevant to radeonsi, because Position/Face are system values with radeonsi, while this codepath is for drivers where Position and Face are ordinary inputs. Reviewed-by: Brian Paul <brianp@vmware.com>
2017-06-02gallium: Add TGSI shader token for ARB_post_depth_coverageLyude1-0/+1
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-05-24tgsi: remove unused tgsi_is_passthrough_shader()Samuel Pitoiset2-79/+0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
2017-05-18tgsi: store the sampler view type directly in the instructionSamuel Pitoiset3-6/+18
RadeonSI needs to do a special lowering for Gather4 with integer formats, but with bindless samplers we just can't access the index. Instead, store the return type in the instruction like the target. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-18tgsi: remove some unused OPCODE macrosSamuel Pitoiset2-200/+0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-28tgsi/scan: record compute shader system value usageMarek Olšák2-0/+37
v2: just do indexing with swizzle[i] Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-26gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERSSamuel Pitoiset1-0/+1
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05tgsi: add SUBGROUP_* semanticsIlia Mirkin1-0/+7
v2: add documentation (Nicolai) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05tgsi: add BALLOT/READ_* opcodesIlia Mirkin1-3/+3
v2 (Nicolai): - BALLOT isn't per-channel - expand the documentation (also for VOTE_*) v3: - only BALLOT returns a 64-bit lanemask (Boyan) - relax the requirement on READ_INVOC: the invocation number to read from must be uniform within a sub-group. This matches the GL_ARB_shader_ballot spect (and the v_readlane instruction of AMD GCN) v4: - hopefully really fix the doc of VOTE_* returns (Ilia) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
2017-04-01gallium: remove support for predicates from TGSI (v2)Marek Olšák12-432/+4
Neved used. v2: gallivm: rename "pred" -> "exec_mask" etnaviv: remove the cap gallium: fix tgsi_instruction::Padding Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-03-31tgsi: fix printing of 64-bit integer immediatesNicolai Hähnle3-5/+11
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-31tgsi: add CLOCK opcodeIlia Mirkin1-1/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-15gallium/tgsi: Treat UCMP sources as floats to match the GLSL-to-TGSI pass ↵Francisco Jerez1-13/+41
expectations. Currently the GLSL-to-TGSI translation pass assumes it can use floating point source modifiers on the UCMP instruction. See the bug report linked below for an example where an unrelated change in the GLSL built-in lowering code for atan2 (e9ffd12827ac11a2d2002a42fa8eb1) caused the generation of floating-point ir_unop_neg instructions followed by ir_triop_csel, which is translated into UCMP with a negate modifier on back-ends with native integer support. Allowing floating-point source modifiers on an integer instruction seems like rather dubious design for a transport IR, since the same semantics could be represented as a sequence of MOV+UCMP instructions instead, but supposedly this matches the expectations of TGSI back-ends other than tgsi_exec, and the expectations of the DX10 API. I take no responsibility for future headaches caused by this inconsistency. Fixes a regression of piglit glsl-fs-tan-1 on softpipe introduced by the above-mentioned glsl front-end commit. Even though the commit that triggered the regression doesn't seem to have made it to any stable branches yet, this might be worth back-porting since I don't see any reason why the bug couldn't have been reproduced before that point. Suggested-by: Roland Scheidegger <sroland@vmware.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99817 Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-03-15gallium: add TGSI opcodes TEX_LZ and TXF_LZMarek Olšák2-2/+5
for better code generation in radeonsi
2017-03-15tgsi: add missing compute shader entry in tgsi_get_processor_name()Samuel Pitoiset1-0/+2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-03tgsi/scan: record load/store/atomic image usageMarek Olšák2-10/+13
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-03-03tgsi/ureg: return correct token count in ureg_get_tokensGrazvydas Ignotas1-1/+1
Valgrind reports that the shader cache writes uninitialized data to disk. Turns out ureg_get_tokens() is returning the count of allocated tokens instead of how many are actually used, so the cache writes out unused space at the end. Use the real count instead. This change should not cause regressions elsewhere because the only ureg_get_tokens() user that cares about token count is the shader cache. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-02-21tgsi/scan: add basic info about tessellation OUT and IN usesMarek Olšák2-0/+34
not all of them will be used immediately Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-21gallium: do not #include foo.h within extern C {}Emil Velikov1-2/+2
Analogous to previous commit. Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-18gallium: remove TGSI_OPCODE_CLAMPMarek Olšák4-19/+1
Not used and not widely supported. Use MIN+MAX instead. Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-18tgsi/lowering: stop using TGSI_OPCODE_CLAMPMarek Olšák1-4/+13
v2: do it correctly Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-14tgsi: fix memory leak in tgsi sanity checkDave Airlie1-3/+5
This just fixes this without repeating the code. Reported-by: Li Qiang Cc: "17.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-10tgsi-dump: dump label if instruction has oneMarc-André Lureau1-11/+13
The instruction has an associated label when Instruction.Label == 1, as can be seen in ureg_emit_label() or tgsi_build_full_instruction(). This fixes dump generating extra :0 labels on conditionals, and virgl parsing more than the expected tokens and eventually reaching "Illegal command buffer" (when parsing more than a safety margin of 10 we currently have). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-10tgsi: remove ureg_label_insnMarc-André Lureau2-38/+0
Unused since commit 2897cb3dba9287011f9c43cd2f214100952370c0. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-07gallium/tgsi: fix oob access in parse instructionLi Qiang1-1/+1
When parsing texture instruction, it doesn't stop if the 'cur' is ',', the loop variable 'i' will also be increased and be used to index the 'inst.TexOffsets' array. This can lead an oob access issue. This patch avoid this. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Li Qiang <liq3ea@gmail.com>
2017-02-02gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capabilityNicolai Hähnle1-1/+0
Make the cap consistent with PIPE_CAP_INT64. Aside from the hypothetical case of using draw for vertex shaders (and actually caring about doubles...), every implementation supports doubles either nowhere or everywhere. Also, st/mesa didn't even check the cap correctly in all supported shader stages. While at it, add a missing LLVM version check for 64-bit integers in radeonsi. This is conservative: judging by the log, LLVM 3.8 might be sufficient, but there are probably bugs that have been fixed since then. v2: fix clover (Marek) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-24tgsi: implement ddiv opcodeRoland Scheidegger1-0/+14
softpipe (along with llvmpipe) claims to support arb_gpu_shader_fp64, so we really need to support that opcode. Cc: 17.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-23gallium: add TGSI_PROPERTY_MUL_ZERO_WINSIlia Mirkin1-1/+2
This will be useful for proper D3D9 emulation, where this behavior is expected by some shaders. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-16gallium: add FBFETCH opcode to retrieve the current sample valueIlia Mirkin1-1/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16tgsi: add DDIV instructionNicolai Hähnle1-0/+2
Double-precision division, to allow more precision than a DRCP + DMUL sequence. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-11gallium/tgsi: fix overflow in parse propertyLi Qiang1-3/+6
In parse_identifier, it doesn't stop copying '*pcur' untill encounter the NULL. As the 'ret' has a fixed-size buffer, if the '*pcur' has a long string, there will be a buffer overflow. This patch avoid this. Signed-off-by: Li Qiang <liq3ea@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-01-05gallium: remove TGSI_OPCODE_SUBMarek Olšák8-34/+36
It's redundant with the source modifier. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05gallium: remove TGSI_OPCODE_ABSMarek Olšák4-7/+1
It's redundant with the source modifier. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-12-12st/glsl_to_tgsi: plumb the GS output stream qualifier through to TGSINicolai Hähnle2-1/+21
Allow drivers to emit GS outputs in a smarter way. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-12-12tgsi/scan: collect information about output usagemasksNicolai Hähnle2-0/+2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-12-12tgsi/scan: collect information about output vertex streamsNicolai Hähnle2-0/+19
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-12-12tgsi: add Stream{X,Y,Z,W} fields to tgsi_declaration_semanticNicolai Hähnle3-2/+77
This is for geometry shader outputs. Without it, drivers have no way of knowing which stream each output is intended for, and have to conservatively write all outputs to all streams. Separate stream numbers for each component are required due to output packing. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-12-07tgsi: fix the src type of TGSI_OPCODE_MEMBARMarek Olšák1-0/+1
It's a literal integer. The next commit will need this. Cc: 13.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-12-01tgsi: store writes_primid when scanning tgsiTim Rowley2-0/+4
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-21tgsi/scan: record if a shader writes the position outputMarek Olšák2-0/+3
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-21tgsi/scan: use a big switch for scanning outputsMarek Olšák1-40/+28
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-15gallium: add PIPE_SHADER_CAP_LOWER_IF_THRESHOLDMarek Olšák1-0/+1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-08tgsi/scan: turn a huge if-else-if.. chain into a switch statementMarek Olšák1-14/+30
Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-08tgsi/scan: fix images_buffers regressionMarek Olšák1-3/+2
The first IF statement disabled the second one. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98599 Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-24tgsi: trivial build fix for MSVCBrian Paul1-1/+1
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-24tgsi/scan: scan texture offset operandsMarek Olšák1-0/+16
This seems important considering how much we depend on some of the flags. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-24tgsi/scan: move src operand processing into a separate functionMarek Olšák1-171/+183
the next commit will need this Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-24tgsi/scan: get information about shader buffer usageMarek Olšák2-0/+23
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-10-24tgsi/scan: handle indirect image indexing correctlyMarek Olšák2-8/+17
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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