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path: root/src/freedreno
AgeCommit message (Expand)AuthorFilesLines
2020-09-16freedreno: Make the pack struct have a .qword for wide addresses.Eric Anholt1-3/+10
2020-07-08freedreno/fdperf: better compatible string matchingRob Clark1-4/+32
2020-07-08freedreno/ir3: avoid applying (sat) on bary.fIlia Mirkin1-0/+5
2020-07-08freedreno/a3xx: there's no r8i/ui rb format, only rg8i/rg8uiIlia Mirkin1-2/+2
2020-06-24freedreno/ir3: Fix register allocation assertion failures.Eric Anholt2-13/+30
2020-06-10Switch from cElementTree to ElementTree.Vinson Lee1-1/+1
2020-06-10freedreno/computerator: fix missing dependency on generated headerRob Clark1-0/+1
2020-05-27Properly check mmap return valueHanno Böck1-1/+1
2020-05-13freedreno/ir3: fix indirect cb0 load_ubo loweringRob Clark1-2/+2
2020-04-29turnip: fix wrong substream size in parse_multisample_and_color_blend20.1-branchpointJonathan Marek1-1/+1
2020-04-28freedreno/a6xx+tu: rename VSC_DATA/VSC_DATA2Rob Clark5-78/+68
2020-04-28freedreno/ir3/ra: only assign array base in first passRob Clark1-1/+2
2020-04-28freedreno/ir3/ra: split out helper for array assignmentRob Clark1-48/+58
2020-04-28freedreno/ir3/ra: use ir3_debug_print helperRob Clark1-8/+2
2020-04-28freedreno/ir3/ra: remove unused variableRob Clark1-2/+0
2020-04-28freedreno/computer: add script to test widening/narrowingRob Clark1-0/+297
2020-04-27freedreno/ir3: Add support for disasm of cat2 float32 immediates.Eric Anholt5-47/+86
2020-04-27freedreno/ir3: Refactor out print_reg_src().Eric Anholt1-10/+6
2020-04-27freedreno/ir3: Convert remaining disasm src prints to reginfo.Eric Anholt1-60/+92
2020-04-27freedreno/ir3: Add a unit test for our disassembler.Eric Anholt2-0/+141
2020-04-27freedreno/ir3: Print a space after nop counts, like qcom's disasm.Eric Anholt1-1/+1
2020-04-27freedreno/ir3: Fix the disasm of half-float STG dests.Eric Anholt1-1/+1
2020-04-27freedreno/ir3: run nir_lower_packJonathan Marek1-0/+1
2020-04-27nir: add pack_32_2x16_split/unpack_32_2x16_split loweringJonathan Marek1-4/+2
2020-04-27ir3: Use shared mediump output loweringAlyssa Rosenzweig1-49/+1
2020-04-25tu: Don't invert point coordsConnor Abbott1-1/+2
2020-04-25ir3: Remove VARYING_SLOT_PNTC remapping hackConnor Abbott1-12/+0
2020-04-25tu: Implement PrimID passthroughConnor Abbott2-5/+14
2020-04-25ir3: Skip missing VS outputs in VS out map when linkingConnor Abbott2-22/+55
2020-04-25freedreno/a6xx: Document PrimID passthrough registersConnor Abbott2-2/+15
2020-04-25freedreno/ir3: Print @tex write mask using 0x%xKristian H. Kristensen1-1/+1
2020-04-25freedreno/ir3: Reset lex line number when we start parsingKristian H. Kristensen1-0/+2
2020-04-25freedreno/ir3: Parse, but ignore @in, @out and @tex headersKristian H. Kristensen2-0/+21
2020-04-25freedreno/ir3: Move ir3 assembler to backend compilerKristian H. Kristensen6-24/+21
2020-04-25freedreno/computerator: Decouple ir3 assemblerKristian H. Kristensen4-23/+36
2020-04-24turnip: add adreno 650Jonathan Marek4-22/+46
2020-04-24turnip: use RESOLVE_TS eventJonathan Marek1-1/+1
2020-04-24turnip: remove unused RB_UNKNOWN_8E04_blitJonathan Marek2-3/+0
2020-04-24freedreno/ir3: fix incorrect conversion foldingJonathan Marek1-0/+7
2020-04-24freedreno/ir3: set even bit for f2f16_rtneJonathan Marek1-2/+7
2020-04-24freedreno/ir3: fix 16-bit ssbo accessJonathan Marek3-5/+12
2020-04-24turnip: divide cube map depth by 6Jonathan Marek1-2/+12
2020-04-24spirv: Use nir_const_value for spec constantsJason Ekstrand1-5/+5
2020-04-24turnip: Properly handle all sizes of specialization constantsJason Ekstrand1-4/+17
2020-04-23freedreno/ir3: Fix sizing of the inputs/outputs array.Eric Anholt1-13/+2
2020-04-23freedreno/ir3: Fix driver_location of the added vertex_flags varying.Eric Anholt1-7/+1
2020-04-23drm-shim: Let the driver choose to overwrite the first render node.Eric Anholt1-0/+2
2020-04-23freedreno: Make the slice pitch be bytes, not pixels.Eric Anholt5-14/+10
2020-04-23freedreno: Introduce a "cpp_shift" value for cpp divs/muls.Eric Anholt3-0/+16
2020-04-23turnip: Fix crashes when geometry shader constants aren't usedHyunjun Ko1-0/+2
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