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2021-07-24agx: Implement instanced arraysAlyssa Rosenzweig1-2/+10
Divide by instance divisor if needed. Same strategy as ACO. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Include divisors in the vertex shader keyAlyssa Rosenzweig1-0/+3
Needed to lower the divisions. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Add udiv-by-constant routineAlyssa Rosenzweig1-0/+44
Uses the ridiculousfish algorithm, will be used to lower instanced arrays into something efficient. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Add agx_ushr helperAlyssa Rosenzweig2-1/+15
Syntax sugar for the underlying bitfield manipulation instruction. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Handle load_instance_idAlyssa Rosenzweig2-0/+5
Preloaded into r6, as predicted. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Drop dated /* TODO: RA */Alyssa Rosenzweig1-1/+1
We skip over vertex ID in RA now, it's fine. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Plug memory leak in register allocatorAlyssa Rosenzweig1-0/+1
Fixes: 85e18deb18a ("agx: Assign registers locally") Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reported-by: Coverity Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Use consistent ncompsAlyssa Rosenzweig1-15/+16
Fixes register allocation failure in: dEQP-GLES3.functional.ubo.single_basic_array.shared.row_major_mat4_fragment Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Dump register file when failing to allocateAlyssa Rosenzweig1-0/+8
Usually shows a bug. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Fix mismatched units in load_uboAlyssa Rosenzweig1-1/+3
Fixes assertion failure in dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment Assertion failed: ((value & 1) == 0), function agx_print_sized, file ../src/asahi/compiler/agx_print.c, line 39. Fixes: 033d4d09fc7 ("agx: Implement load_ubo/kernel_input") Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24agx: Don't set helper invocation kill bitAlyssa Rosenzweig1-2/+2
In the future we'll need data flow analysis similar to what we do in panfrost. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24asahi: Identify texture dimension fieldAlyssa Rosenzweig1-1/+6
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24asahi: Fix sampler filtering flagAlyssa Rosenzweig1-2/+2
Typo in the XML. Fixes broken filtering. Still chasing an off-by-one. Fixes: cad54e2721d ("asahi: Add command buffer XML definitions") Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24asahi: Identify texture address fieldAlyssa Rosenzweig1-1/+1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-11agx: Flip point coordinates because OpenGLAlyssa Rosenzweig1-0/+38
Fixes dEQP-GLES2.functional.shaders.builtin_variable.pointcoord Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11asahi: Handle point coordinatesAlyssa Rosenzweig1-3/+6
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11asahi: Identify triangle/lines vs point varyingsAlyssa Rosenzweig2-7/+8
Seems to allow skipping over point coords? Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11asahi: Unpack varying descriptors (1x)Alyssa Rosenzweig1-0/+8
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11asahi: Set bit for psizAlyssa Rosenzweig2-0/+8
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11asahi/decode: Print some IOGPU stuffAlyssa Rosenzweig1-0/+12
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11asahi/decode: Print clear/store pipelinesAlyssa Rosenzweig1-0/+14
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11asahi: Allocate global IDsAlyssa Rosenzweig3-24/+40
Use the same UABI as Metal. One less hack, trying to rule out possible differences to Metal... Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-11asahi/decode: Fix decoding of draw callsAlyssa Rosenzweig1-1/+1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi/decode: Handle CULL packetsAlyssa Rosenzweig1-0/+3
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi/decode: Fix up high wordAlyssa Rosenzweig1-0/+9
Not sure what's happening here, there's some magic for sure. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi: Identify more unknown fields in the memmapAlyssa Rosenzweig2-20/+43
From validating the memory map of a Metal sample and seeing what goes wrong. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi/decode: Check fewer zeroes after a command bufferAlyssa Rosenzweig1-1/+1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi: Make track_free saferAlyssa Rosenzweig1-4/+15
Ensure that we don't free the same BO multiple times, which can lead to later segfaults in decode. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi/decode: Only dump mapped allocationsAlyssa Rosenzweig2-3/+7
This matches the hardware's view of memory and helps catch spurious reads. (One symptom of messing this up -- besides broken rendering -- is a kernel warning about a "bogus texture handle 0".) Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-10asahi: Remove unused bo_access propertyAlyssa Rosenzweig2-11/+0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11815>
2021-07-07agx: Ensure we don't overallocate registersAlyssa Rosenzweig3-5/+9
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07agx: Pipe in nir_registerAlyssa Rosenzweig2-2/+62
This is kind of lazy... Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07agx: Assign registers locallyAlyssa Rosenzweig2-27/+130
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07agx: Count read registers as wellAlyssa Rosenzweig1-0/+14
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07agx: Don't choke on registers in the optimizerAlyssa Rosenzweig2-3/+7
Just skip over them. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-06asahi: Use XML for interpolation packetAlyssa Rosenzweig1-0/+5
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Identify attachment length fieldAlyssa Rosenzweig1-1/+1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Use GenXML for main bind fragmentAlyssa Rosenzweig1-1/+4
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Extend IOGPU header to contain encoderAlyssa Rosenzweig1-1/+4
Let's squash together all the resulting zeroes. Trying to discern some structure out of this. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Move IOGPU header to XMLAlyssa Rosenzweig1-0/+10
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Identify "command buffer" size field in mapAlyssa Rosenzweig1-1/+1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Add XML for the attachment structureAlyssa Rosenzweig1-0/+19
We need a lot more control over these magic structures to get Z/S attachments working correctly. This is an early start. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Implement the stencil testAlyssa Rosenzweig1-4/+4
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Prepack rasterizer facesAlyssa Rosenzweig1-3/+3
A bit more efficient and will allow easy implementation of the stencil test. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-06asahi: Fix meson dependency on packing in compilerAlyssa Rosenzweig2-2/+2
Closes: #5030 Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Fixes: 6a657b17b9b ("agx: Remap fragment shader varyings explicitly") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730>
2021-07-05asahi: Identify vertex texture/sampler countsAlyssa Rosenzweig1-1/+4
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05agx: Handle txlAlyssa Rosenzweig1-1/+8
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05agx: Legalize LOD sources to be 16-bit onlyAlyssa Rosenzweig1-0/+5
I'm not convinced this is /right/ but it's a step. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05agx: Fix lod_mode shiftAlyssa Rosenzweig1-1/+1
Was zero before so didn't notice the bug. Fixes: 9f555388342 ("agx: Pack texture ops") Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05agx: Pack LOD descriptorsAlyssa Rosenzweig1-5/+16
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-20 16:04:45 +0000