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path: root/src/amd/compiler/aco_instruction_selection_setup.cpp
AgeCommit message (Expand)AuthorFilesLines
2020-08-11aco: set constant_data_offset correctly in the case of merged shadersRhys Perry1-10/+8
2020-08-04aco: disable SMEM stores on GFX10.3Rhys Perry1-1/+2
2020-08-03amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors().Eric Anholt1-1/+2
2020-07-30nir: Stop passing an options arg to nir_lower_int64()Boris Brezillon1-1/+1
2020-07-29aco: Use nir_foreach_variable_with_modes to walk SSBOsJason Ekstrand1-2/+2
2020-07-29nir: Add nir_foreach_shader_in/out_variable helpersJason Ekstrand1-6/+6
2020-07-24radv: align the LDS size in calculate_tess_lds_size()Samuel Pitoiset1-1/+2
2020-07-22aco: add support for nir_intrinsic_shared_atomic_faddSamuel Pitoiset1-0/+1
2020-07-21aco: move some setup code into helpersRhys Perry1-69/+39
2020-07-21aco: use nir_addition_might_overflow to combine additions into SMEMRhys Perry1-0/+120
2020-07-21aco: implement b2i8/b2i16Rhys Perry1-0/+3
2020-07-17aco: set tcs_in_out_eq=false if float controls of VS and TCS stages differRhys Perry1-4/+9
2020-06-24aco: improve vectorization of 8/16-bit loads/storesRhys Perry1-9/+3
2020-06-24radv/aco,aco: allow SMEM SSBO loads on GFX6/7Rhys Perry1-1/+1
2020-06-24aco: allow SMEM for some sub-dword accessesRhys Perry1-6/+18
2020-06-24aco: only use SMEM if we can prove it's safeRhys Perry1-0/+194
2020-06-22radv/aco: implement logic64 instead of loweringDaniel Schürmann1-1/+0
2020-06-15aco: try to use fma instead of mad when denormals are enabledRhys Perry1-0/+4
2020-06-10aco: allow reading/writing upper halves/bytes when possibleRhys Perry1-0/+1
2020-05-13nir: Make "divergent" a property of an SSA valueJason Ekstrand1-16/+16
2020-05-11aco: prevent invalid loads/stores vectorization if robustness is enabledSamuel Pitoiset1-2/+10
2020-05-11nir: do not vectorize load/store if offset can overflow and robustness enabledSamuel Pitoiset1-1/+2
2020-04-29radv: Use smaller esgs_itemsize for ACO.Timur Kristóf1-8/+0
2020-04-29aco: Use new default driver locations.Timur Kristóf1-107/+17
2020-04-29aco: Set config->lds_size when TES or VS is running on HW ESGS.Timur Kristóf1-0/+1
2020-04-29aco: Calculate workgroup size of legacy GS.Timur Kristóf1-1/+5
2020-04-29aco: Remember VS/TCS output driver locations.Timur Kristóf1-0/+11
2020-04-29aco: Use context variables instead of calculating TCS inputs/outputs.Timur Kristóf1-0/+3
2020-04-29radv: Refactor calculate_tess_lds_size and get_tcs_num_patches.Timur Kristóf1-4/+9
2020-04-24aco: lower 8/16-bit integer arithmeticRhys Perry1-0/+31
2020-04-24aco: vectorize global loads/storesRhys Perry1-2/+10
2020-04-24aco: add and use RegClass::get() helperRhys Perry1-14/+3
2020-04-17aco: fix exporting the viewport index if the fragment shader needs itSamuel Pitoiset1-1/+2
2020-04-10aco: setup subdword regclasses for ssa_undef & load_constDaniel Schürmann1-12/+8
2020-04-10aco: implement nir_op_b2f16/nir_op_i2f16/nir_op_u2f16Samuel Pitoiset1-0/+3
2020-04-07aco/ngg: Implement NGG VS and TES.Timur Kristóf1-0/+7
2020-04-07aco/ngg: Setup NGG VS and TES stages.Timur Kristóf1-6/+13
2020-04-06aco: remove divergence check in sanitize_if()Rhys Perry1-2/+1
2020-04-03aco: add missing conversion operations for small bitsizesDaniel Schürmann1-2/+7
2020-04-03aco: don't vectorize 8/16bit load/store_ssboDaniel Schürmann1-2/+7
2020-04-03aco: refactor regClass setup for subdword VGPRsDaniel Schürmann1-92/+34
2020-04-01aco: only break SMEM clauses if XNACK is enabled (mostly APUs)Samuel Pitoiset1-0/+20
2020-03-30aco: Implement b2b32 and b2b1Jason Ekstrand1-0/+2
2020-03-30aco: Don't store LS VS outputs to LDS when TCS doesn't need them.Timur Kristóf1-0/+7
2020-03-30aco: Fix workgroup size calculation.Timur Kristóf1-6/+29
2020-03-30aco: Extract setup_tcs_info to a separate function.Timur Kristóf1-12/+19
2020-03-30aco: Change isel inputs/outputs to a flat array.Timur Kristóf1-2/+7
2020-03-30aco: Treat outputs of the previous stage as inputs of the next stage.Timur Kristóf1-4/+5
2020-03-30aco: Skip 2nd read of merged wave info when TCS in/out vertices are equal.Timur Kristóf1-0/+10
2020-03-30aco: Fix handling of tess factors.Timur Kristóf1-0/+5
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