AgeCommit message (Expand)AuthorFilesLines
2021-05-22intel/fs: make sure shuffle is lowered to supported typesLionel Landwerlin1-0/+1
2021-04-16intel/eu: Add instruction compaction support on XeHP.Matt Turner1-7/+185
2021-04-16intel/fs: Add more efficient fragment coordinate calculation.Francisco Jerez1-1/+17
2021-04-16intel/fs: Introduce lowering pass to implement derivatives in terms of quad s...Francisco Jerez2-1/+64
2021-04-16intel/compiler: Lower txd for 3D samplers on XeHP.Jordan Justen1-1/+2
2021-04-16intel/fs: End computer shader with message gateway on XeHP.Jordan Justen1-2/+7
2021-04-16intel/fs: Disable 3-src immediates on XeHP.Jordan Justen1-2/+4
2021-04-16intel/eu: Allow 64-bit registers on XeHP.Jordan Justen1-6/+49
2021-04-16intel/compiler: Lower integer division on XeHP.Francisco Jerez2-0/+9
2021-04-16intel/fs: Lower dword integer multiplies on XeHP.Rafael Antognolli1-1/+2
2021-04-16intel/fs: Handle regioning restrictions of split FP/DP pipelines.Francisco Jerez2-17/+83
2021-04-16intel/fs: Fix repclear assembly for XeHP+ regioning restrictions.Francisco Jerez1-2/+2
2021-04-16intel/fs: Use CHV/BXT implementation of 64-bit MOV_INDIRECT on XeHP+.Francisco Jerez1-1/+1
2021-04-16intel/fs: Represent SWSB in-order dependency addresses as vectors.Francisco Jerez1-28/+90
2021-04-16Revert "intel/compiler: Silence unused parameter warning in update_inst_score...Jordan Justen1-3/+3
2021-04-16intel/fs: Implement representation of SWSB cross-pipeline synchronization ann...Francisco Jerez3-11/+55
2021-04-08intel/fs: limit OW reads to 8 owords on XeHP+Lionel Landwerlin1-1/+4
2021-04-08anv: put correct number of BT prefetch for compute on XeHP+Lionel Landwerlin1-0/+2