mesa/mesa - The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)

Age	Commit message (Expand)	Author	Files	Lines
2023-11-01	iris: handle tile case where cso width, height is zero	Tapani Pälli	1	-0/+3
2023-10-30	anv: Add more space for init_render_queue_state() batch (MTL regression)	Jordan Justen	1	-1/+1
2023-10-27	intel/xehp: Enable TBIMR by default.	Francisco Jerez	2	-2/+2
2023-10-27	intel/xehp+: Use TBIMR tile box check in order to avoid performance regressions.	Francisco Jerez	3	-0/+4
2023-10-27	intel/xehp+: Adjust TBIMR batch size based on slice count.	Francisco Jerez	4	-0/+21
2023-10-27	intel/xehp: Adjust TBIMR performance chicken bits.	Francisco Jerez	3	-0/+24
2023-10-27	anv/xehp+: Enable TBIMR in generated draw calls.	Francisco Jerez	4	-1/+10
2023-10-27	anv/xehp: Implement TBIMR tile pass setup and pipeline bandwidth estimation.	Francisco Jerez	3	-0/+183
2023-10-27	iris/xehp: Implement TBIMR tile pass setup and pipeline bandwidth estimation.	Francisco Jerez	1	-0/+93
2023-10-27	intel/xehp+: Define driconf option for selectively disabling TBIMR.	Francisco Jerez	8	-0/+12
2023-10-27	intel/xehp+: Add dynamic state flags controlling whether TBIMR is enabled dur...	Francisco Jerez	5	-1/+33
2023-10-27	intel/xehp+: Import algorithm for TBIMR tiling parameter calculation.	Francisco Jerez	2	-0/+276
2023-10-27	intel/xehp+: Add TBIMR-related genxml definitions.	Francisco Jerez	1	-0/+41
2023-09-05	intel/dev/xe: Move placeholder subslice info into XEHP_FEATURES	Jordan Justen	1	-2/+1
2023-07-14	iris: migrate WA 14013910100 to use the WA framework	Rohan Garg	1	-2/+3
2023-05-15	iris: Init CCS_E to COMPRESSED_NO_CLEAR for XeHP	Nanley Chery	1	-7/+20
2023-03-23	intel/devinfo: dedicated entries for XeHP	Lionel Landwerlin	1	-2/+31
2022-11-02	intel/dev: Set has_lsc in XEHP_FEATURES rather than DG2_FEATURES	Jordan Justen	1	-1/+1
2022-10-28	iris: Enable INTEL_MEASURE for compute dispatches on XeHP	Nanley Chery	1	-0/+2
2022-08-23	intel/fs: fixup scratch load/store handling on Gfx12.5+	Lionel Landwerlin	1	-32/+34
2022-07-28	intel/eu: Mark header present in URB memory fences on XeHP	Kenneth Graunke	1	-1/+1
2022-07-28	intel/eu: Clarify spec citations for XeHP region restrictions	Kenneth Graunke	1	-3/+8
2022-07-28	intel/eu: Fix XeHP register region validation for hstride == 0	Kenneth Graunke	1	-7/+22
2022-06-24	iris: Update comment about 2GB dynamic state range	Kenneth Graunke	1	-4/+9
2022-06-15	anv: Move STATE_BASE_ADDRESS programming into init_common_queue_state()	Jordan Justen	1	-32/+32
2022-06-12	intel/fs/xehp+: Emit scheduling fence for all NIR barriers on platforms with ...	Francisco Jerez	1	-2/+4
2022-05-27	intel: Only set VectorMaskEnable when needed	Jason Ekstrand	6	-9/+29
2022-05-26	intel/disasm: add missing handling of <1;1,0>	Lionel Landwerlin	1	-0/+1
2022-05-25	intel/compiler: Move spill/fill tracking to the register allocator	Kenneth Graunke	5	-34/+47
2022-05-17	intel/perf: deal with OA reports timestamp values on DG2	Lionel Landwerlin	3	-4/+24
2022-05-17	intel/decoder: Fix binding table pointer decoding with large offsets	Kenneth Graunke	1	-3/+16
2022-05-12	anv: Fix INTEL_DEBUG=bat on XeHP	Kenneth Graunke	1	-0/+5
2022-05-02	intel/compiler: In XeHP prefer <1;1,0> regions before compacting	Caio Oliveira	1	-0/+24
2022-04-30	intel/dev: Compute pixel pipe information based on geometry topology DRM query.	Francisco Jerez	1	-28/+41
2022-04-28	isl,iris: Add DG2 CCS modifier support for XeHP	Nanley Chery	2	-1/+68
2022-04-28	isl,iris: Add I915_FORMAT_MOD_4_TILED support for XeHP	Anuj Phogat	2	-0/+15
2022-04-25	intel: fixup number of threads per EU on XeHP	Lionel Landwerlin	1	-0/+1
2022-04-07	intel/compiler: Fix sample_d messages on DG2	Ian Romanick	1	-3/+16
2022-03-31	nir: intel/compiler: Lower TXD on array surfaces on DG2+	Ian Romanick	3	-2/+9
2022-03-29	anv: Stop updating STATE_BASE_ADDRESS on XeHP	Kenneth Graunke	4	-18/+90
2022-03-29	intel/decoder: Fix decoder handling of binding table pool alloc on XeHP	Kenneth Graunke	1	-1/+1
2022-03-26	intel/compiler: Use nir_opt_uniform_atomics()	Kenneth Graunke	1	-0/+15
2022-03-09	intel: Limit Wa_1607854226 to Gfx12.0 only	Kenneth Graunke	2	-6/+6
2022-03-09	iris: Use more efficient binding table pointer formats on Icelake+.	Kenneth Graunke	6	-24/+74
2022-03-01	Revert "anv: Require the local heap for CCS on XeHP"	Nanley Chery	1	-18/+3
2022-02-23	anv: Align state pools to 2MiB on XeHP	Jordan Justen	1	-1/+11
2022-02-23	anv: Align GENERAL_STATE_POOL_MIN_ADDRESS to 2MiB	Jordan Justen	1	-1/+1
2022-02-22	iris: fix register spilling on compute shaders on XeHP	Paulo Zanoni	1	-4/+3
2022-01-31	iris: Return non-zero stride for clear color plane	Nanley Chery	1	-1/+9
2022-01-31	iris: Pick the right BO in iris_resource_get_param	Nanley Chery	1	-1/+2