index
:
mesa/mesa
10.0
10.1
10.2
10.3
10.4
10.5
10.6
11.0
11.1
11.2
12.0
13.0
17.0
17.1
17.2
17.3
18.0
18.1
18.2
18.3
19.0
19.1
19.2
19.3
20.0
20.1
20.2
20.3
21.0
21.1
21.2
21.3
22.0
22.1
22.2
22.3
23.0
23.1
23.2
23.3
24.0
24.1
7.10
7.11
7.8
7.8-gles
7.9
8.0
9.0
9.1
9.2
a7xx-gmem
amber
elima/radv-video-encode-caps-maxbitrate
explicit-sync
main
powervr-mesa-next-wayland
review/fragment_shader_barycentric
staging/23.2
staging/23.3
staging/24.0
staging/24.1
uav-counter-meta
vk-no-nir-android
zink-stablefix
The Mesa 3D Graphics Library (mirrored from https://gitlab.freedesktop.org/mesa/mesa)
brianp
summary
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tree
commit
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Author
Files
Lines
2015-10-22
i965/vec4: print predicate control at brw_vec4 dump_instruction
Alejandro Piñeiro
3
-3
/
+5
2015-10-22
i965/vec4: use an envvar to decide to print the assembly on cmod_propagation ...
Alejandro Piñeiro
2
-2
/
+2
2015-10-22
i965/vec4: Add unit tests for cmod propagation pass
Alejandro Piñeiro
2
-0
/
+829
2015-10-22
i965/vec4: adding vec4_cmod_propagation optimization
Alejandro Piñeiro
4
-0
/
+160
2015-10-22
i965/vec4: track and use independently each flag channel
Alejandro Piñeiro
3
-14
/
+52
2015-10-22
i965/vec4: nir_emit_if doesn't need to predicate based on all the channels
Alejandro Piñeiro
1
-1
/
+3
2015-10-22
i965/vec4/gs: Fix signed/unsigned comparison warning.
Matt Turner
1
-1
/
+1
2015-10-22
i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.
Matt Turner
1
-1
/
+1
2015-10-22
i965/fs: Drop unnecessary write-enable-all from SET_SAMPLE_ID.
Matt Turner
1
-5
/
+5
2015-10-22
i965/fs: Trim unneeded channels in SampleID setup.
Matt Turner
1
-6
/
+6
2015-10-22
i965/fs: Use type-W for immediate in SampleID setup.
Matt Turner
2
-3
/
+3
2015-10-22
i965/vec4: Initialize LOD to 0.0f for textureQueryLevels() and texture().
Matt Turner
1
-0
/
+12
2015-10-22
i965: Note that the UV immediate type is Gen6+.
Matt Turner
1
-1
/
+1
2015-10-22
gallivm: Translate all util_cpu_caps bits to LLVM attributes.
Jose Fonseca
1
-2
/
+34
2015-10-22
i965/fs: Disable CSE optimization for untyped & typed surface reads
Jordan Justen
3
-1
/
+22
2015-10-22
ilo: make sure there is HiZ before resolving
Chia-I Wu
1
-2
/
+4
2015-10-22
ilo: fix max thread count for HS on Gen8
Chia-I Wu
1
-3
/
+5
2015-10-21
i965: Advertise ARB_shader_stencil_export (gen9+)
Ben Widawsky
2
-0
/
+2
2015-10-21
i965: Implement ARB_shader_stencil_export (gen9+)
Ben Widawsky
9
-3
/
+98
2015-10-21
i965/fs: Enumerate logical fb writes arguments
Ben Widawsky
3
-21
/
+29
2015-10-21
svga: fix clip plane regression after recent tgsi_scan change
Brian Paul
1
-2
/
+2
2015-10-21
i965: Implement gl_InvocationID.
Kenneth Graunke
1
-0
/
+13
2015-10-21
i965: Implement nir_intrinsic_load_primitive.
Kenneth Graunke
1
-0
/
+8
2015-10-21
i965: Add a fs_visitor constructor that takes a brw_gs_compile.
Kenneth Graunke
2
-3
/
+39
2015-10-21
i965: Add a brw->scalar_gs flag controlled by INTEL_SCALAR_GS=1.
Kenneth Graunke
3
-1
/
+8
2015-10-21
i965: Make emit_urb_writes() reserve space for GS header information.
Kenneth Graunke
1
-2
/
+16
2015-10-21
i965: Make emit_urb_writes() only set EOT for the VS.
Kenneth Graunke
1
-1
/
+1
2015-10-21
i965: Make fs_visitor::emit_urb_writes reusable for scalar GS.
Kenneth Graunke
1
-7
/
+7
2015-10-21
i965: Introduce a brw_vue_prog_data::include_vue_handles flag.
Kenneth Graunke
2
-0
/
+5
2015-10-21
i965: Introduce a new SHADER_OPCODE_URB_READ_SIMD8 opcode.
Kenneth Graunke
5
-0
/
+40
2015-10-21
i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.
Kenneth Graunke
5
-0
/
+33
2015-10-21
i965/gs: Do prog_data setup and other calculations in brw_compile_gs
Jason Ekstrand
4
-220
/
+222
2015-10-21
i965/gs: Use NIR info for setting up prog_data
Jason Ekstrand
1
-11
/
+13
2015-10-21
i965/gs: Pull prog_data out of brw_gs_compile
Jason Ekstrand
7
-79
/
+80
2015-10-21
i965/gs: Use NIR instead of the brw_geometry_program for GS metadata
Jason Ekstrand
4
-12
/
+9
2015-10-21
i965/gs: Move the mem_ctx argument to brw_compile_gs
Jason Ekstrand
3
-4
/
+4
2015-10-21
i965/gs: Set static_vertex_count unconditionally on GEN8+
Jason Ekstrand
1
-1
/
+1
2015-10-21
nir: Constify nir_gs_count_vertices
Jason Ekstrand
2
-2
/
+2
2015-10-21
nir/info: Add more information about geometry shaders
Jason Ekstrand
2
-0
/
+16
2015-10-21
i965: (trivial) rename computes stencil to gen9
Ben Widawsky
1
-1
/
+1
2015-10-21
i965: Correct the comment about fb write payload
Ben Widawsky
1
-2
/
+2
2015-10-21
mesa/glformats: Undo code changes from _mesa_base_tex_format() move
Nanley Chery
1
-141
/
+8
2015-10-21
i965: Mark compacted 3-src instructions as Gen8+.
Matt Turner
1
-16
/
+16
2015-10-21
i965: Add const to brw_compact_inst_bits.
Matt Turner
1
-2
/
+2
2015-10-21
i965: Add mask_control_ex field and handle it in compaction.
Matt Turner
2
-0
/
+6
2015-10-21
i965: Add devinfo->gen assertions for acc_wr_control.
Matt Turner
1
-3
/
+3
2015-10-21
i965: Prepare for next commit by adding more whitespace.
Matt Turner
1
-14
/
+14
2015-10-21
i965: Compact acc_wr_control only on Gen6+.
Matt Turner
1
-2
/
+8
2015-10-21
i965: Add devinfo parameter to brw_compact_inst_* funcs.
Matt Turner
2
-57
/
+91
2015-10-21
i965/vec4: Don't emit MOVs for unused URB slots.
Matt Turner
2
-6
/
+14
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