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AgeCommit message (Expand)AuthorFilesLines
2019-06-11freedreno/a6xx: disallow UBWC for z24s8Rob Clark1-1/+0
2019-06-11freedreno/a6xx: use correct UBWC reg buildersRob Clark2-11/+11
2019-06-11freedreno: update generated headersRob Clark7-53/+305
2019-06-11freedreno/a6xx: disable UBWC for some formatsRob Clark1-2/+0
2019-06-11freedreno/a6xx: handle non-UWC-compatible image viewsRob Clark5-1/+45
2019-06-11freedreno/a6xx: handle non-UBWC-compatible texture viewsRob Clark3-0/+23
2019-06-11freedreno: add helper to uncompress UBWC resourceRob Clark2-0/+37
2019-06-11freedreno: handle images in rebind_resource()Rob Clark1-0/+9
2019-06-11freedreno: allow null discard box in shadow pathRob Clark1-4/+10
2019-06-11freedreno: swap UBWC state in shadow pathRob Clark1-0/+4
2019-06-11freedreno: add modifier param to fd_try_shadow_resource()Rob Clark1-3/+5
2019-06-11freedreno: correct modifier for UBWC buffersRob Clark1-0/+3
2019-06-11virgl: consider newly created resources idleChia-I Wu1-6/+8
2019-06-11virgl: make resource_wait/resource_is_busy cheaperChia-I Wu2-0/+27
2019-06-11virgl: add virgl_drm_{alloc,free,clear}_res_listChia-I Wu1-17/+42
2019-06-11virgl: do not cache external resourcesChia-I Wu2-1/+10
2019-06-11panfrost: Enable AFBC on depth/stencilAlyssa Rosenzweig3-11/+10
2019-06-11panfrost: Linear depth/stencil should be alignedAlyssa Rosenzweig1-1/+2
2019-06-11panfrost/midgard: Decode LOD/bias registersAlyssa Rosenzweig2-5/+58
2019-06-11panfrost/midgard: Decode texture offset register swizzleAlyssa Rosenzweig2-11/+23
2019-06-11panfrost/midgard/disasm: include textureGather()Alyssa Rosenzweig2-5/+16
2019-06-11panfrost/midgard: Support negative immediate offsetsAlyssa Rosenzweig2-16/+20
2019-06-11panfrost/midgard: Fix redunant mask redundancyAlyssa Rosenzweig1-0/+5
2019-06-11panfrost/midgard/disasm: Print LOD for texelFetchAlyssa Rosenzweig1-0/+9
2019-06-11panfrost/midgard: Identify the in_reg_full fieldAlyssa Rosenzweig3-10/+3
2019-06-11panfrost/midgard/disasm: Correctly dump bias/LODAlyssa Rosenzweig2-16/+20
2019-06-11panfrost/midgard/disasm: Cleanup texture op codeAlyssa Rosenzweig1-3/+3
2019-06-11panfrost/midgard/disasm: Add missing spaceAlyssa Rosenzweig1-2/+2
2019-06-11panfrost/midgard/disasm: LOD immediate/register selectAlyssa Rosenzweig2-3/+13
2019-06-11panfrost/midgard/disasm: Use texture op name bareAlyssa Rosenzweig2-9/+7
2019-06-11panfrost/midgard/disasm: Varying perspective dividesAlyssa Rosenzweig2-4/+28
2019-06-11panfrost/midgard: Add perspective division opcodesAlyssa Rosenzweig2-0/+9
2019-06-11panfrost/midgard: Print texture offsetsAlyssa Rosenzweig2-36/+56
2019-06-11panfrost/midgard: Expand texture to 4-channel swizzleAlyssa Rosenzweig3-24/+7
2019-06-11docs: update calendar, add news item and link release notes for 19.1.0Juan A. Suarez Romero3-10/+35
2019-06-11docs: Add SHA256 sums for 19.1.0Juan A. Suarez Romero1-1/+1
2019-06-11docs: Add release notes for 19.1.0Juan A. Suarez Romero1-3/+4530
2019-06-11radv: assert on inline uniform blocks in radv_CmdPushDescriptorSetKHR()Samuel Iglesias Gonsálvez1-0/+8
2019-06-11anv: ignore inline uniform blocks in anv_CmdPushDescriptorSetKHR()Samuel Iglesias Gonsálvez1-13/+0
2019-06-11egl: compare the whole list of attributesEric Engestrom1-1/+1
2019-06-11freedreno/a5xx: Fix indirect draw max_indices calculationEduardo Lima Mitev1-2/+1
2019-06-11radv: remove extra assignment in radv_decompress_resolve_subpass_src()Samuel Pitoiset1-1/+0
2019-06-11radv: add radv_get_resolve_pipeline() helper in the graphics pathSamuel Pitoiset1-12/+29
2019-06-11radv: do not decompress all image layers before resolving inside a subpassSamuel Pitoiset1-3/+9
2019-06-11radv: initialize the aspect mask when decompressing resolve source imagesSamuel Pitoiset1-0/+1
2019-06-11radv: perform proper layout transitions before resolvingSamuel Pitoiset1-19/+19
2019-06-11radv: do not resolve all image layers with compute inside a subpassSamuel Pitoiset1-4/+8
2019-06-10iris: Bypass half-float pack/unpack lowering.Kenneth Graunke1-0/+1
2019-06-10radv: Handle UNDEFINED format in image format list.Bas Nieuwenhuizen1-0/+6
2019-06-10radv: Prevent out of bound shift on 32-bit builds.Bas Nieuwenhuizen1-2/+2