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2017-06-28i965: Add an end-of-pipe sync helperTopi Pohjolainen2-1/+100
v2 (Jason Ekstrand): - Take a flags parameter to control the flushes - Refactoring Cc: "17.1" <mesa-stable@lists.freedesktop.org> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 7b607aae3fea4c7a3022641115aa01a05b434448)
2017-06-28i965: Unify the two emit_pipe_control functionsJason Ekstrand1-73/+64
These two functions contain almost identical logic except for one SNB workaround required for render target cache flushes. They may as well call into the same code so we only have to handle the work-arounds in one place. Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit b771d9a136715fdf8ba0b478380e19b63f1e491b)
2017-06-28i965: Take a uint64_t immediate in emit_pipe_control_writeJason Ekstrand5-18/+15
It's a 64-bit value. Splitting it up just makes the function arguments awkward. Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit a8ea68bc930f212dddf78a4e2073bcbd698b9140) [Andres Gomez: modified remaining uses of the new API] Signed-off-by: Andres Gomez <agomez@igalia.com>
2017-06-28i965: Flush around state base addressJason Ekstrand2-1/+33
Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 86da08367b90a5a4fef90723c97a988e73130389)
2017-06-19docs: add sha256 checksums for 17.1.3Emil Velikov1-1/+2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19docs: add release notes for 17.1.3mesa-17.1.3Emil Velikov1-0/+155
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19Update version to 17.1.3Emil Velikov1-1/+1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-14configure.ac: Reduce zlib requirement from 1.2.8 to 1.2.3.Chuck Atkins1-1/+1
Testing with zlib versions 1.2.{3,4,5,6,7,8} showed no difference in functionality, correctness, or zlib API usage and 1.2.3 is the oldest version available in still actively deployed production Linux distributions (RHEL/CentOS 6 and SuSE 11). Build 17.1.1 against the system supplied zlib-devel packages for 1.2.3 in EL6 and 1.2.7 on EL7. I then swapped out the zlib version at runtime via LD_LIBRARY_PATH with ones build from the release tarballs from zlib.net Testwise - I ran the piglit shader profile with --quick addded to the tests since I figured that would exercise the shader cache, which would in turn use zlib. Signed-off-by: Chuck Atkins <chuck.atkins@kitware.com> Cc: 17.1 <mesa-stable@lists.freedesktop.org> Cc: Timothy Arceri <tarceri@itsqueeze.com> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> [Emil Velikov: add hunk about version/piglit testing] Acked-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit ad69b037b1ca38390fad440189541e49b3f48f14)
2017-06-14util/rand_xor: add missing include statementsNicolas Dechesne1-0/+1
Fixes for: src/util/rand_xor.c:60:13: error: implicit declaration of function 'open' [-Werror=implicit-function-declaration] int fd = open("/dev/urandom", O_RDONLY); ^~~~ src/util/rand_xor.c:60:34: error: 'O_RDONLY' undeclared (first use in this function) int fd = open("/dev/urandom", O_RDONLY); ^~~~~~~~ Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit adadadc151fa8232ecd78649a10496661b98e40d)
2017-06-14glsl/lower_distance: only set max_array_access for 1D clip dist arraysDave Airlie1-1/+1
The max_array_access field applies to the first dimension, which means we only want to set it for the 1D clip dist arrays. This fixes an ir_validate assert seen with KHR-GL44.cull_distance.functional on nouveau and radeon with debug builds. Fixes: a08c4ebbe (glsl: rewrite clip/cull distance lowering pass) Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 53587b7105aaf10ecf7e5dcb8ed63265af688738)
2017-06-14radv: fix trace dumping for !use_ib_bosGrazvydas Ignotas1-3/+11
Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set. Fixes: 97dfff5410 "radv: Dump command buffer on hang." Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit fae3b139055f32c4d076c170726393995be96d1b)
2017-06-14radv: set fmask state to all 0s when no fmask. (v2)Dave Airlie1-1/+2
The shader reads the descriptor to decide if it should take the fmask value, however we weren't initing it always, which meant random crap, esp with MSAA depth textures. Fixes random hangs with: dEQP-VK.glsl.builtin_var.fragdepth.* v2: check fmask_state is not NULL Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 51553c0beaeb91b1f2cb3292ac55573309b1d86f) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/amd/vulkan/radv_image.c
2017-06-14radv: Remove SI num RB override for occlusion queries.Bas Nieuwenhuizen1-3/+0
radeonsi doesn't have it anymore either. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 59c2e2a061736a981819c3cb217e92e1509d9852)
2017-06-14radv: fewer than 8 RBs are possibleNicolai Hähnle1-2/+0
This fixes the subsequent assertion on Bonaire. Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 388d36dfd180bc16b9d2803d9a213aa5e5ee011f)
2017-06-14radv: expose integrated device type for APUs.Dave Airlie1-1/+1
This just sets the vulkan device type depending on whether this is an APU or GPU. Signed-off-by: Dave Airlie <airlied@redhat.com> Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" (cherry picked from commit 2890a711587e03f906530919056275b599f5f03e)
2017-06-14radv: Dirty all descriptors sets when changing the pipeline.Bas Nieuwenhuizen2-8/+14
Sets could have been ignored during previous descriptor set flush due to the shader not using them and therefore no SGPR being assigned. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Fixes: ae61ddabe8c "radv: move userdata sgpr ownership to compiler side." (cherry picked from commit 4415a46be2cbb752b94b62bdf5bc7d4d4bbe9fab) Conflicts: src/amd/vulkan/radv_cmd_buffer.c src/amd/vulkan/radv_meta.c
2017-06-14radv: Set both compute and graphics SGPRS on descriptor set flush.Bas Nieuwenhuizen1-29/+27
We clear the descriptors_dirty array afterwards, so the SGPRs for the other pipeline don't get updated on the flush for that other draw/dispatch, so we have to make sure we do it immediately. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Fixes: ae61ddabe8c "radv: move userdata sgpr ownership to compiler side." (cherry picked from commit 5fb8bb306534d633ceb4e33d89984718326773ba) [Emil Velikov: drop radv_flush_indirect_descriptor_sets hunk - missing in branch] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/amd/vulkan/radv_cmd_buffer.c
2017-06-14egl: fix _eglQuerySurface in EGL_BUFFER_AGE_EXT caseTapani Pälli4-5/+9
Specification states that in case of error, value should not be written, patch changes buffer age queries to return -1 in case of error so that we can skip changing the value. In addition, small change to droid_query_buffer_age to return 0 in case buffer does not have a back buffer available. Fixes: dEQP-EGL.functional.negative_partial_update.not_postable_surface Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Chad Versace <chadversary@chromium.org> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 8fac894f9b8e4e2cb93061fdd25f3aecbfb3bbb7)
2017-06-14swr: relax c++ requirement from c++14 to c++11Tim Rowley4-20/+21
Remove c++14 generic lambda to keep compiler requirement at c++11. No regressions on piglit or vtk test suites. Tested-by: Chuck Atkins <chuck.atkins@kitware.com> Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com> CC: mesa-stable@lists.freedesktop.org (cherry picked from commit 0b80b025021f97d27520390867c20336dc891a16)
2017-06-14radeonsi: disable the patch ID workaround on SI when the patch ID isn't used ↵Marek Olšák2-15/+21
(v2) The workaround causes a massive performance decrease on 1-SE parts. (Cape Verde, Hainan, Oland) The performance regression is already part of 17.0 and 17.1. v2: check tess_uses_prim_id Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 391673af7ad1565a5f6ac8fc2f8c9fcdd1fe9908) [Emil Velikov: s/tcs_tes_uses_prim_id/tess_uses_prim_id/] Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-14i965: Mark depth surfaces as needing a HiZ resolve after blittingJason Ekstrand1-0/+2
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chadversary@chromium.org> (cherry picked from commit 5097fcbfdc8dc5aab779af92022f9b5ff16026f0)
2017-06-14i965: Perform HiZ flush/stall prior to HiZ resolvesJason Ekstrand1-13/+26
Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit acbd02450bfd53f61bbe468a6f0e8bf5e4507095)
2017-06-14i965: Move the pre-depth-clear flush/stalls to intel_hiz_execJason Ekstrand2-56/+58
Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit acb9a2ef8f5d92002ed7eb7676c4a96db661ba3a)
2017-06-14i965/blorp: Take a layer range in intel_hiz_execJason Ekstrand5-18/+16
Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit 252b004a51d951391846ec5644abe88bfffb72bd)
2017-06-14dri3/GLX: Fix drawable invalidation v2Thomas Hellstrom1-0/+6
A number of internal VMware apitrace traces image comparisons fail with dri3 because the viewport transformation becomes incorrect after an X drawable resize. The incorrect viewport transformation sometimes persist until the second draw-call after a swapBuffer. Comparing with the dri2 glx code there are a couple of places where dri2 invalidates the drawable in the absence of server-triggered invalidation, where dri3 doesn't do that. When these invalidation points are added to dri3, the image comparisons become correct. v2: Addressed review comment by Michel Dänzer. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-and-tested-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit 1253d58983b2b6ba4ed16444a344327e8117f333)
2017-06-14radeonsi: fix a GPU hang with tessellation on 2-CU configsMarek Olšák1-1/+5
Only harvested Stoney has 2 CUs. Tested on 2-CU Stoney and Fiji forced to 2 CUs. Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org> Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (cherry picked from commit 6c655cfeb49a8142c44782c5164619a5860c7706)
2017-06-14st/mesa: don't load cached TGSI shaders on demandMarek Olšák1-1/+6
This fixes a performance issue with the shader cache that delayed Gallium shader create calls until draw calls. I'd like this in stable, but it's not a showstopper. Cc: 17.1 <mesa-stable@lists.freedesktop.org> Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 2ec50f98a9be9ee94aa0dd82fb7560c00153b03f)
2017-06-14nvc0: disable BGRA8 images on FermiLyude1-5/+14
BGRA8 image stores on Fermi don't work, which results in breaking PBO downloads, such that they always return 0x0. Discovered this through a glamor bug, and confirmed it does indeed break a good number of piglit tests such as spec/arb_pixel_buffer_object/pbo-read-argb8888 Fixes: 8e7893eb53213 ("nvc0: add support for BGRA8 images") Signed-off-by: Lyude <lyude@redhat.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 245912b684b862d47cde10052b137d76a55d0bd3)
2017-06-14xlib: fix glXGetCurrentDisplay() failureBrian Paul4-5/+18
glXGetCurrentDisplay() has been broken for years and nobody noticed until recently. This change adds a new XMesaGetCurrentDisplay() that the GLX emulation API can call, just as we did for glXGetCurrentContext(). Tested by hacking glxgears to call glXGetCurrentContext() before and after glXMakeCurrent() to verify the return value is NULL beforehand and the same as the opened display afterward. Also tested by Tom Hudson with his tests programs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100988 Cc: mesa-stable@lists.freedesktop.org Tested-by: Tom Hudson <tom.hudson.phd@gmail.com> Signed-off-by: Brian Paul <brianp@vmware.com> (cherry picked from commit c6ba85a8c0f02b3b7058dae7afb6c49f56567319)
2017-06-14automake: Link all libGL.so variants with -Bsymbolic.Jose Fonseca2-0/+2
We were linking src/glx with -Bsymbolic, but not the classic/gallium X11 libGL.so. But it's always a good idea to build all libGL.so and all DRI drivers with -Bsymbolic, otherwise they might resolve symbols from the 3rd party application executable or shared libraries, which is _never_ what we want. In particular, this can happen when intercepting OpenGL calls with apitrace, before https://github.com/apitrace/apitrace/commit/63194b2573176ef34efce1a5c8b08e624b8dddf5 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit ce5e83b8a0c757072075e781a090d35d9dc0e285)
2017-06-14i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()Chad Versace1-5/+1
This function never occurs in the callchain of a GL function. It occurs only in the callchain of eglCreate*Surface and the analogous paths for GLX. Therefore, even if a thread does have a bound GL context, emitting a GL error here is wrong. A misplaced GL error, when no GL call is made, can confuse clients. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 9d996e94fbbfdb3692061009f5441cf61bba36ae) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/mesa/drivers/dri/i965/intel_fbo.c
2017-06-14etnaviv: always do cpu_fini in transfer_unmapLucas Stach1-3/+6
The cpu_fini() call pushes the buffer back into the GPU domain, which needs to be done for all buffers, not just the ones with CPU written content. The etnaviv kernel driver currently doesn't validate this, but may start to do so at a later point in time. If there is a temporary resource the fini needs to happen before the RS uses this one as the source for the upload. Also remove an invalid comment about flushing CPU caches, cpu_fini takes care of everything involved in this. Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs") Cc: mesa-stable@lists.freedesktop.org Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com> (cherry picked from commit cab5996c2637c31a78a0196e42ec6de9eb61f270)
2017-06-05docs: add sha256 checksums for 17.1.2Juan A. Suarez Romero1-1/+2
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05docs: add release notes for 17.1.2mesa-17.1.2Juan A. Suarez Romero1-0/+186
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-05Update version to 17.1.2Juan A. Suarez Romero1-1/+1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-03anv: Require vertex buffers to come from a 32-bit heapJason Ekstrand1-0/+12
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 39adea9330376a64a4b5e8da98f5e055ebd3331e) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-03Revert "cherry-ignore: anv: Require vertex buffers to come from a 32-bit heap"Juan A. Suarez Romero1-2/+0
This reverts commit b3e48a07c0bb0c58e73ec6d82f3a3104ec26aacb.
2017-06-02i965: Rework Sandy Bridge HiZ and stencil layoutsJason Ekstrand5-29/+134
Sandy Bridge does not technically support mipmapped depth/stencil. In order to work around this, we allocate what are effectively completely separate images for each miplevel, ensure that they are page-aligned, and manually offset to them. Prior to layered rendering, this was a simple matter of setting a large enough halign/valign. With the advent of layered rendering, however, things got more complicated. Now, things weren't as simple as just handing a surface off to the hardware. Any miplevel of a normally mipmapped surface can be considered as just an array surface given the right qpitch. However, the hardware gives us no capability to specify qpitch so this won't work. Instead, the chosen solution was to use a new "all slices at each LOD" layout which laid things out as a mipmap of arrays rather than an array of mipmaps. This way you can easily offset to any of the miplevels and each is a valid array. Unfortunately, the "all slices at each lod" concept missed one fundamental thing about SNB HiZ and stencil hardware: It doesn't just always act as if you're always working with a non-mipmapped surface, it acts as if you're always working on a non-mipmapped surface of the same size as LOD0. In other words, even though it may only write the upper-left corner of each array slice, the qpitch for the array is for a surface the size of LOD0 of the depth surface. This mistake causes us to under-allocate HiZ and stencil in some cases and also to accidentally allow different miplevels to overlap. Sadly, piglit test coverage didn't quite catch this until I started making changes to the resolve code that caused additional HiZ resolves in certain tests. This commit switches Sandy Bridge HiZ and stencil over to a new scheme that lays out the non-zero miplevels horizontally below LOD0. This way they can all have the same qpitch without interfering with each other. Technically, the miplevels still overlap, but things are spaced out enough that each page is only in the "written area" of one LOD. Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit 10903d228919085cdb160c563c481ed1cc09e34c) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02anv: Advertise both 32-bit and 48-bit heaps when we have enough memoryJason Ekstrand1-6/+36
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 50d0eb5096bd9514821a641f25c0b3455c0f8a88) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02anv: Refactor memory type setupJason Ekstrand1-36/+40
This makes us walk over the heaps one at a time and add the types for LLC and !LLC to each heap. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 34581fdd4f149894dfa51777a2f7eb289bd08b71) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02anv: Make supports_48bit_addresses a heap propertyJason Ekstrand2-3/+14
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit b83b1af6f6936f36db42a8f8b8e0854d0f9491fd) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/intel/vulkan/anv_device.c
2017-06-02anv: Stop setting BO flags in bo_init_newJason Ekstrand3-7/+23
The idea behind doing this was to make it easier to set various flags. However, we have enough custom flag settings floating around the driver that this is more of a nuisance than a help. This commit has the following functional changes: 1) The workaround_bo created in anv_CreateDevice loses both flags. This shouldn't matter because it's very small and entirely internal to the driver. 2) The bo created in anv_CreateDmaBufImageINTEL loses the EXEC_OBJECT_ASYNC flag. In retrospect, it never should have gotten EXEC_OBJECT_ASYNC in the first place. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 00df1cd9d6234cdfc9fb2bf3615196ff83a3c956) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/intel/vulkan/anv_allocator.c src/intel/vulkan/anv_device.c src/intel/vulkan/anv_queue.c
2017-06-02anv: Add valid_bufer_usage to the memory type metadataJason Ekstrand2-8/+26
Instead of returning valid types as just a number, we now walk the list and check the buffer's usage against the usage flags we store in the new anv_memory_type structure. Currently, valid_buffer_usage == ~0. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit f7736ccf53eaeb66c4270afe0916e2cb29ab8667) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/intel/vulkan/anv_device.c src/intel/vulkan/anv_private.h
2017-06-02anv: Determine the type of mapping based on type metadataJason Ekstrand2-7/+7
Before, we were just comparing the type index to 0. Now we actually look the type up in the table and check its properties to determine what kind of mapping we want to do. Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Cc: "17.1" <mesa-stable@lists.freedesktop.org> (cherry picked from commit 92325a7efc769c32e03031323e21700dc55171e4) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/intel/vulkan/anv_device.c src/intel/vulkan/anv_private.h
2017-06-02anv: Set EXEC_OBJECT_ASYNC when availableJason Ekstrand8-4/+26
Reviewed-by: Chad Versace <chadversary@chromium.org> (cherry picked from commit 35e626bd0e59e7ce9fd97ccef66b2468c09206a4) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Squashed with: anv/tests: Create a dummy instance as well as device This fixes crashes caused by 35e626bd0e59e7ce9fd97ccef66b2468c09206a4 which made us start referencing the instance in the allocators. With this commit, the tests now happily pass again. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100877 Tested-by: Vinson Lee <vlee@freedesktop.org> (cherry picked from commit 6ef1bd4fa57b36efc7919773fd26c36fd43d2ea9) Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2017-06-02Revert "cherry-ignore: anv: [...]"Juan A. Suarez Romero1-11/+1
Revert "cherry-ignore: anv: Refactor memory type setup" This reverts commit eab4a503a0b04dfe1fdcfc2dcde62eb09c038aca. Revert "cherry-ignore: anv: Add valid_bufer_usage to the memory type metadata" This reverts commit c31e814a85a27249e2a57cb7350240c01a1cad58. Revert "cherry-ignore: anv: Advertise both 32-bit and 48-bit heaps when we have enough memory" This reverts commit e391144853640ee39fca8dfe0e9387bbf1d90a76. Revert "cherry-ignore: anv: Make supports_48bit_addresses a heap property" This reverts commit dbadd066321786ea9b8f0259413740a10f753f36. Revert "cherry-ignore: anv: Stop setting BO flags in bo_init_new" This reverts commit 07867f72cf53209d230b3fb13f24f9371ab9d4b4. Revert "cherry-ignore: anv: Determine the type of mapping based on type metadata" This reverts commit 9299466b83ce88c911b30b35d9f4f6addb25c92a.
2017-06-01cherry-ignore: anv: Refactor memory type setupJuan A. Suarez Romero1-1/+2
2017-06-01cherry-ignore: anv: Add valid_bufer_usage to the memory type metadataJuan A. Suarez Romero1-0/+2
2017-06-01cherry-ignore: radv: fix regression in descriptor set freeingJuan A. Suarez Romero1-0/+2
2017-06-01cherry-ignore: anv: Require vertex buffers to come from a 32-bit heapJuan A. Suarez Romero1-1/+2
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