diff options
Diffstat (limited to 'src/mesa/drivers')
27 files changed, 249 insertions, 119 deletions
diff --git a/src/mesa/drivers/common/sources b/src/mesa/drivers/common/sources new file mode 100644 index 00000000000..90e29d78d3f --- /dev/null +++ b/src/mesa/drivers/common/sources @@ -0,0 +1,2 @@ +MESA_DRIVER_COMMON_SOURCES = \ +driverfuncs.c diff --git a/src/mesa/drivers/dri/i915tex/i830_context.h b/src/mesa/drivers/dri/i915tex/i830_context.h index e5377b300aa..3d754103c0a 100644 --- a/src/mesa/drivers/dri/i915tex/i830_context.h +++ b/src/mesa/drivers/dri/i915tex/i830_context.h @@ -156,6 +156,11 @@ do { \ */ extern void i830InitVtbl(struct i830_context *i830); +extern void +i830_state_draw_region(struct intel_context *intel, + struct i830_hw_state *state, + struct intel_region *color_region, + struct intel_region *depth_region); /* i830_context.c */ extern GLboolean diff --git a/src/mesa/drivers/dri/i915tex/i830_metaops.c b/src/mesa/drivers/dri/i915tex/i830_metaops.c index c90f5022229..f76646d89db 100644 --- a/src/mesa/drivers/dri/i915tex/i830_metaops.c +++ b/src/mesa/drivers/dri/i915tex/i830_metaops.c @@ -400,40 +400,12 @@ meta_import_pixel_state(struct intel_context *intel) */ static void meta_draw_region(struct intel_context *intel, - struct intel_region *draw_region, + struct intel_region *color_region, struct intel_region *depth_region) { struct i830_context *i830 = i830_context(&intel->ctx); - GLuint format; - GLuint depth_format = DEPTH_FRMT_16_FIXED; - intel_region_release(&i830->meta.draw_region); - intel_region_reference(&i830->meta.draw_region, draw_region); - - intel_region_release(&i830->meta.depth_region); - intel_region_reference(&i830->meta.depth_region, depth_region); - - /* XXX FBO: grab code from i915 meta_draw_region */ - - /* XXX: 555 support? - */ - if (draw_region->cpp == 2) - format = DV_PF_565; - else - format = DV_PF_8888; - - if (depth_region) { - if (depth_region->cpp == 2) - depth_format = DEPTH_FRMT_16_FIXED; - else - depth_format = DEPTH_FRMT_24_FIXED_8_OTHER; - } - - i830->meta.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */ - DSTORG_VERT_BIAS(0x8) | /* .5 */ - format | DEPTH_IS_Z | depth_format); - - i830->meta.emitted &= ~I830_UPLOAD_BUFFERS; + i830_state_draw_region(intel, &i830->meta, color_region, depth_region); } diff --git a/src/mesa/drivers/dri/i915tex/i830_vtbl.c b/src/mesa/drivers/dri/i915tex/i830_vtbl.c index 45502da290a..18fc6d4b91f 100644 --- a/src/mesa/drivers/dri/i915tex/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915tex/i830_vtbl.c @@ -518,28 +518,79 @@ i830_destroy_context(struct intel_context *intel) _tnl_free_vertices(&intel->ctx); } -static void -i830_set_draw_region(struct intel_context *intel, - struct intel_region *draw_region, - struct intel_region *depth_region) + +void +i830_state_draw_region(struct intel_context *intel, + struct i830_hw_state *state, + struct intel_region *color_region, + struct intel_region *depth_region) { struct i830_context *i830 = i830_context(&intel->ctx); + GLuint value; - intel_region_release(&i830->state.draw_region); - intel_region_release(&i830->state.depth_region); - intel_region_reference(&i830->state.draw_region, draw_region); - intel_region_reference(&i830->state.depth_region, depth_region); + ASSERT(state == &i830->state || state == &i830->meta); - /* XXX FBO: Need code from i915_set_draw_region() */ + if (state->draw_region != color_region) { + intel_region_release(&state->draw_region); + intel_region_reference(&state->draw_region, color_region); + } + if (state->depth_region != depth_region) { + intel_region_release(&state->depth_region); + intel_region_reference(&state->depth_region, depth_region); + } + + /* + * Set stride/cpp values + */ + if (color_region) { + state->Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD; + state->Buffer[I830_DESTREG_CBUFADDR1] = + (BUF_3D_ID_COLOR_BACK | + BUF_3D_PITCH(color_region->pitch * color_region->cpp) | + BUF_3D_USE_FENCE); + } + + if (depth_region) { + state->Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD; + state->Buffer[I830_DESTREG_DBUFADDR1] = + (BUF_3D_ID_DEPTH | + BUF_3D_PITCH(depth_region->pitch * depth_region->cpp) | + BUF_3D_USE_FENCE); + } + + /* + * Compute/set I830_DESTREG_DV1 value + */ + value = (DSTORG_HORT_BIAS(0x8) | /* .5 */ + DSTORG_VERT_BIAS(0x8) | DEPTH_IS_Z); /* .5 */ + + if (color_region && color_region->cpp == 4) { + value |= DV_PF_8888; + } + else { + value |= DV_PF_565; + } + if (depth_region && depth_region->cpp == 4) { + value |= DEPTH_FRMT_24_FIXED_8_OTHER; + } + else { + value |= DEPTH_FRMT_16_FIXED; + } + state->Buffer[I830_DESTREG_DV1] = value; I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS); - I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS); - i830->state.Buffer[I830_DESTREG_CBUFADDR1] = - (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(draw_region->pitch) | - BUF_3D_USE_FENCE); - i830->state.Buffer[I830_DESTREG_DBUFADDR1] = - (BUF_3D_ID_DEPTH | BUF_3D_PITCH(depth_region->pitch) | - BUF_3D_USE_FENCE); + + +} + + +static void +i830_set_draw_region(struct intel_context *intel, + struct intel_region *color_region, + struct intel_region *depth_region) +{ + struct i830_context *i830 = i830_context(&intel->ctx); + i830_state_draw_region(intel, &i830->state, color_region, depth_region); } #if 0 diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.c b/src/mesa/drivers/dri/i915tex/intel_blit.c index b6b65439087..550669ab0c8 100644 --- a/src/mesa/drivers/dri/i915tex/intel_blit.c +++ b/src/mesa/drivers/dri/i915tex/intel_blit.c @@ -277,6 +277,30 @@ intelEmitFillBlit(struct intel_context *intel, } +static GLuint translate_raster_op(GLenum logicop) +{ + switch(logicop) { + case GL_CLEAR: return 0x00; + case GL_AND: return 0x88; + case GL_AND_REVERSE: return 0x44; + case GL_COPY: return 0xCC; + case GL_AND_INVERTED: return 0x22; + case GL_NOOP: return 0xAA; + case GL_XOR: return 0x66; + case GL_OR: return 0xEE; + case GL_NOR: return 0x11; + case GL_EQUIV: return 0x99; + case GL_INVERT: return 0x55; + case GL_OR_REVERSE: return 0xDD; + case GL_COPY_INVERTED: return 0x33; + case GL_OR_INVERTED: return 0xBB; + case GL_NAND: return 0x77; + case GL_SET: return 0xFF; + default: return 0; + } +} + + /* Copy BitBlt */ void @@ -289,7 +313,9 @@ intelEmitCopyBlit(struct intel_context *intel, struct _DriBufferObject *dst_buffer, GLuint dst_offset, GLshort src_x, GLshort src_y, - GLshort dst_x, GLshort dst_y, GLshort w, GLshort h) + GLshort dst_x, GLshort dst_y, + GLshort w, GLshort h, + GLenum logic_op) { GLuint CMD, BR13; int dst_y2 = dst_y + h; @@ -309,13 +335,14 @@ intelEmitCopyBlit(struct intel_context *intel, case 1: case 2: case 3: - BR13 = (((GLint) dst_pitch) & 0xffff) | (0xCC << 16) | (1 << 24); + BR13 = (((GLint) dst_pitch) & 0xffff) | + (translate_raster_op(logic_op) << 16) | (1 << 24); CMD = XY_SRC_COPY_BLT_CMD; break; case 4: BR13 = - (((GLint) dst_pitch) & 0xffff) | (0xCC << 16) | (1 << 24) | (1 << - 25); + (((GLint) dst_pitch) & 0xffff) | + (translate_raster_op(logic_op) << 16) | (1 << 24) | (1 << 25); CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB); diff --git a/src/mesa/drivers/dri/i915tex/intel_blit.h b/src/mesa/drivers/dri/i915tex/intel_blit.h index ee85c626334..e7bc280f58a 100644 --- a/src/mesa/drivers/dri/i915tex/intel_blit.h +++ b/src/mesa/drivers/dri/i915tex/intel_blit.h @@ -47,7 +47,8 @@ extern void intelEmitCopyBlit(struct intel_context *intel, GLuint dst_offset, GLshort srcx, GLshort srcy, GLshort dstx, GLshort dsty, - GLshort w, GLshort h); + GLshort w, GLshort h, + GLenum logicop ); extern void intelEmitFillBlit(struct intel_context *intel, GLuint cpp, diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel.c b/src/mesa/drivers/dri/i915tex/intel_pixel.c index 4fe128deea1..9018e3daef4 100644 --- a/src/mesa/drivers/dri/i915tex/intel_pixel.c +++ b/src/mesa/drivers/dri/i915tex/intel_pixel.c @@ -56,8 +56,9 @@ intel_check_blit_fragment_ops(GLcontext * ctx) !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || !ctx->Color.ColorMask[3] || - ctx->Color.ColorLogicOpEnabled || - ctx->Texture._EnabledUnits || ctx->FragmentProgram._Enabled); + ctx->Texture._EnabledUnits || + ctx->FragmentProgram._Enabled || + ctx->Color.BlendEnabled); } diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_copy.c b/src/mesa/drivers/dri/i915tex/intel_pixel_copy.c index 5eb021f008b..9d478283e47 100644 --- a/src/mesa/drivers/dri/i915tex/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i915tex/intel_pixel_copy.c @@ -95,9 +95,9 @@ intel_check_copypixel_blit_fragment_ops(GLcontext * ctx) !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || !ctx->Color.ColorMask[3] || - ctx->Color.ColorLogicOpEnabled || ctx->Texture._EnabledUnits || - ctx->FragmentProgram._Enabled); + ctx->FragmentProgram._Enabled || + ctx->Color.BlendEnabled); } /* Doesn't work for overlapping regions. Could do a double copy or @@ -344,9 +344,12 @@ do_blit_copypixels(GLcontext * ctx, intelEmitCopyBlit(intel, dst->cpp, src->pitch, src->buffer, 0, dst->pitch, dst->buffer, 0, - rect.x1 + delta_x, rect.y1 + delta_y, /* srcx, srcy */ + rect.x1 + delta_x, + rect.y1 + delta_y, /* srcx, srcy */ rect.x1, rect.y1, /* dstx, dsty */ - rect.x2 - rect.x1, rect.y2 - rect.y1); + rect.x2 - rect.x1, rect.y2 - rect.y1, + ctx->Color.ColorLogicOpEnabled ? + ctx->Color.LogicOp : GL_COPY); } out: diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c index 616101aef99..10a079896ae 100644 --- a/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/i915tex/intel_pixel_draw.c @@ -252,9 +252,9 @@ do_blit_drawpixels(GLcontext * ctx, return GL_FALSE; } - if (!intel_check_meta_tex_fragment_ops(ctx)) { + if (!intel_check_blit_fragment_ops(ctx)) { if (INTEL_DEBUG & DEBUG_PIXEL) - _mesa_printf("%s - bad GL fragment state for meta tex\n", + _mesa_printf("%s - bad GL fragment state for blitter\n", __FUNCTION__); return GL_FALSE; } @@ -320,17 +320,19 @@ do_blit_drawpixels(GLcontext * ctx, rect.x1 - dest_rect.x1, rect.y2 - dest_rect.y2, rect.x1, - rect.y1, rect.x2 - rect.x1, rect.y2 - rect.y1); + rect.y1, rect.x2 - rect.x1, rect.y2 - rect.y1, + ctx->Color.ColorLogicOpEnabled ? + ctx->Color.LogicOp : GL_COPY); } fence = intel_batchbuffer_flush(intel->batch); driFenceReference(fence); } UNLOCK_HARDWARE(intel); - if (intel->driDrawable->numClipRects) + if (fence) { driFenceFinish(fence, DRM_FENCE_TYPE_EXE | DRM_I915_FENCE_TYPE_RW, GL_FALSE); - - driFenceUnReference(fence); + driFenceUnReference(fence); + } if (INTEL_DEBUG & DEBUG_PIXEL) _mesa_printf("%s - DONE\n", __FUNCTION__); diff --git a/src/mesa/drivers/dri/i915tex/intel_pixel_read.c b/src/mesa/drivers/dri/i915tex/intel_pixel_read.c index c1cc65674d1..24e49ae0663 100644 --- a/src/mesa/drivers/dri/i915tex/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i915tex/intel_pixel_read.c @@ -271,7 +271,8 @@ do_blit_readpixels(GLcontext * ctx, rect.y1, rect.x1 - src_rect.x1, rect.y2 - src_rect.y2, - rect.x2 - rect.x1, rect.y2 - rect.y1); + rect.x2 - rect.x1, rect.y2 - rect.y1, + GL_COPY); } fence = intel_batchbuffer_flush(intel->batch); @@ -280,11 +281,12 @@ do_blit_readpixels(GLcontext * ctx, } UNLOCK_HARDWARE(intel); - if (intel->driDrawable->numClipRects) + if (fence) { driFenceFinish(fence, DRM_FENCE_TYPE_EXE | DRM_I915_FENCE_TYPE_RW, GL_FALSE); + driFenceUnReference(fence); + } - driFenceUnReference(fence); if (INTEL_DEBUG & DEBUG_PIXEL) _mesa_printf("%s - DONE\n", __FUNCTION__); diff --git a/src/mesa/drivers/dri/i915tex/intel_regions.c b/src/mesa/drivers/dri/i915tex/intel_regions.c index 064a34cda81..1205b180ca6 100644 --- a/src/mesa/drivers/dri/i915tex/intel_regions.c +++ b/src/mesa/drivers/dri/i915tex/intel_regions.c @@ -318,7 +318,8 @@ intel_region_copy(intelScreenPrivate *intelScreen, dst->cpp, src->pitch, src->buffer, src_offset, dst->pitch, dst->buffer, dst_offset, - srcx, srcy, dstx, dsty, width, height); + srcx, srcy, dstx, dsty, width, height, + GL_COPY); } /* Fill a rectangular sub-region. Need better logic about when to @@ -433,7 +434,9 @@ intel_region_cow(intelScreenPrivate *intelScreen, struct intel_region *region) region->buffer, 0, region->pitch, pbo->buffer, 0, - 0, 0, 0, 0, region->pitch, region->height); + 0, 0, 0, 0, + region->pitch, region->height, + GL_COPY); intel_batchbuffer_flush(intel->batch); UNLOCK_HARDWARE(intel); @@ -445,7 +448,9 @@ intel_region_cow(intelScreenPrivate *intelScreen, struct intel_region *region) region->buffer, 0, region->pitch, pbo->buffer, 0, - 0, 0, 0, 0, region->pitch, region->height); + 0, 0, 0, 0, + region->pitch, region->height, + GL_COPY); intel_batchbuffer_flush(intel->batch); } diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_copy.c b/src/mesa/drivers/dri/i915tex/intel_tex_copy.c index 88b62e781c0..b85a25642a2 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tex_copy.c +++ b/src/mesa/drivers/dri/i915tex/intel_tex_copy.c @@ -145,7 +145,8 @@ do_copy_texsubimage(struct intel_context *intel, intelImage->mt->pitch, intelImage->mt->region->buffer, image_offset, - x, y + height, dstx, dsty, width, height); + x, y + height, dstx, dsty, width, height, + GL_COPY); /* ? */ intel_batchbuffer_flush(intel->batch); } diff --git a/src/mesa/drivers/dri/i915tex/intel_tex_image.c b/src/mesa/drivers/dri/i915tex/intel_tex_image.c index 79f377a4b72..22221e7322c 100644 --- a/src/mesa/drivers/dri/i915tex/intel_tex_image.c +++ b/src/mesa/drivers/dri/i915tex/intel_tex_image.c @@ -232,7 +232,8 @@ try_pbo_upload(struct intel_context *intel, intelImage->mt->cpp, src_stride, src_buffer, src_offset, dst_stride, dst_buffer, dst_offset, - 0, 0, 0, 0, width, height); + 0, 0, 0, 0, width, height, + GL_COPY); intel_batchbuffer_flush(intel->batch); } diff --git a/src/mesa/drivers/dri/i965/brw_attrib.h b/src/mesa/drivers/dri/i965/brw_attrib.h index a8efc3a528b..12659bd1cf0 100644 --- a/src/mesa/drivers/dri/i965/brw_attrib.h +++ b/src/mesa/drivers/dri/i965/brw_attrib.h @@ -95,6 +95,7 @@ enum { } ; #define BRW_ATTRIB_FIRST_MATERIAL BRW_ATTRIB_MAT_FRONT_AMBIENT +#define BRW_ATTRIB_LAST_MATERIAL BRW_ATTRIB_MAT_BACK_INDEXES #define BRW_MAX_COPIED_VERTS 3 diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 5c0c5da7eaa..471fda9f7ef 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -209,7 +209,7 @@ static void brw_merge_inputs( struct brw_context *brw, if (arrays[i] && arrays[i]->Enabled) { brw->vb.inputs[i].glarray = arrays[i]; - brw->vb.info.varying |= 1 << i; + brw->vb.info.varying |= (GLuint64EXT) 1 << i; } else { diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index cde0aa6481b..57ee294f0cf 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -393,7 +393,7 @@ GLboolean brw_upload_vertices( struct brw_context *brw, { GLcontext *ctx = &brw->intel.ctx; struct intel_context *intel = intel_context(ctx); - GLuint tmp = brw->vs.prog_data->inputs_read; + GLuint64EXT tmp = brw->vs.prog_data->inputs_read; struct brw_vertex_element_packet vep; struct brw_array_state vbp; GLuint i; @@ -414,10 +414,10 @@ GLboolean brw_upload_vertices( struct brw_context *brw, */ while (tmp) { - GLuint i = ffs(tmp)-1; + GLuint i = ffsll(tmp)-1; struct brw_vertex_element *input = &brw->vb.inputs[i]; - tmp &= ~(1<<i); + tmp &= ~((GLuint64EXT)1<<i); enabled[nr_enabled++] = input; input->index = i; diff --git a/src/mesa/drivers/dri/i965/brw_save_api.c b/src/mesa/drivers/dri/i965/brw_save_api.c index c541fbe0f46..06ed1d23aa2 100644 --- a/src/mesa/drivers/dri/i965/brw_save_api.c +++ b/src/mesa/drivers/dri/i965/brw_save_api.c @@ -417,7 +417,7 @@ static void _save_copy_to_current( GLcontext *ctx ) struct brw_save_context *save = IMM_CONTEXT(ctx)->save; GLuint i; - for (i = BRW_ATTRIB_POS+1 ; i <= BRW_ATTRIB_INDEX ; i++) { + for (i = BRW_ATTRIB_POS+1 ; i < BRW_ATTRIB_MAX ; i++) { if (save->attrsz[i]) { save->currentsz[i][0] = save->attrsz[i]; COPY_CLEAN_4V(save->current[i], @@ -445,7 +445,7 @@ static void _save_copy_from_current( GLcontext *ctx ) struct brw_save_context *save = IMM_CONTEXT(ctx)->save; GLint i; - for (i = BRW_ATTRIB_POS+1 ; i <= BRW_ATTRIB_INDEX ; i++) + for (i = BRW_ATTRIB_POS+1 ; i < BRW_ATTRIB_MAX ; i++) switch (save->attrsz[i]) { case 4: save->attrptr[i][3] = save->current[i][3]; case 3: save->attrptr[i][2] = save->current[i][2]; @@ -1121,7 +1121,7 @@ static void _save_current_init( GLcontext *ctx ) save->current[i] = ctx->ListState.CurrentAttrib[i]; } - for (i = BRW_ATTRIB_FIRST_MATERIAL; i < BRW_ATTRIB_INDEX; i++) { + for (i = BRW_ATTRIB_FIRST_MATERIAL; i <= BRW_ATTRIB_LAST_MATERIAL; i++) { const GLuint j = i - BRW_ATTRIB_FIRST_MATERIAL; ASSERT(j < MAT_ATTRIB_MAX); save->currentsz[i] = &ctx->ListState.ActiveMaterialSize[j]; diff --git a/src/mesa/drivers/dri/i965/brw_save_draw.c b/src/mesa/drivers/dri/i965/brw_save_draw.c index 84f74d3f6cf..cebdd8d0607 100644 --- a/src/mesa/drivers/dri/i965/brw_save_draw.c +++ b/src/mesa/drivers/dri/i965/brw_save_draw.c @@ -38,7 +38,10 @@ #include "brw_draw.h" #include "brw_fallback.h" - +/* + * After playback, copy everything but the position from the + * last vertex to the saved state + */ static void _playback_copy_to_current( GLcontext *ctx, const struct brw_save_vertex_list *node ) { @@ -47,21 +50,30 @@ static void _playback_copy_to_current( GLcontext *ctx, GLuint i, offset; if (node->count) - offset = node->buffer_offset + (node->count-1) * node->vertex_size; + offset = (node->buffer_offset + + (node->count-1) * node->vertex_size * sizeof(GLfloat)); else offset = node->buffer_offset; - ctx->Driver.GetBufferSubData( ctx, 0, offset, node->vertex_size, + ctx->Driver.GetBufferSubData( ctx, 0, offset, + node->vertex_size * sizeof(GLfloat), data, node->vertex_store->bufferobj ); - for (i = BRW_ATTRIB_POS+1 ; i <= BRW_ATTRIB_INDEX ; i++) { + for (i = 0 ; i < BRW_ATTRIB_MAX ; i++) { if (node->attrsz[i]) { - COPY_CLEAN_4V(save->current[i], node->attrsz[i], data); - data += node->attrsz[i]; + if (i != BRW_ATTRIB_POS) + COPY_CLEAN_4V(save->current[i], node->attrsz[i], data); if (i >= BRW_ATTRIB_MAT_FRONT_AMBIENT && i <= BRW_ATTRIB_MAT_BACK_INDEXES) ctx->NewState |= _NEW_LIGHT; + + /* Edgeflag requires special treatment: + */ + if (i == BRW_ATTRIB_EDGEFLAG) + ctx->Current.EdgeFlag = (data[0] == 1.0); + + data += node->attrsz[i] * sizeof(GLfloat); } } @@ -105,7 +117,7 @@ static void brw_bind_vertex_list( struct brw_save_context *save, memset(arrays, 0, BRW_ATTRIB_MAX * sizeof(arrays[0])); - for (attr = 0; attr <= BRW_ATTRIB_INDEX; attr++) { + for (attr = 0; attr < BRW_ATTRIB_MAX; attr++) { if (node->attrsz[attr]) { arrays[attr].Ptr = (const GLubyte *)data; arrays[attr].Size = node->attrsz[attr]; diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index da9d3bacb0e..8403e1bd7b6 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -78,7 +78,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) */ c->nr_inputs = 0; for (i = 0; i < BRW_ATTRIB_MAX; i++) { - if (c->prog_data.inputs_read & (1<<i)) { + if (c->prog_data.inputs_read & ((GLuint64EXT)1<<i)) { c->nr_inputs++; c->regs[PROGRAM_INPUT][i] = brw_vec8_grf(reg, 0); reg++; diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c index 52bdb9d7614..b7893ca3e55 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c +++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c @@ -146,8 +146,8 @@ static void make_state_key( GLcontext *ctx, struct state_key *key ) } /* BRW_NEW_INPUT_VARYING */ - for (i = BRW_ATTRIB_MAT_FRONT_AMBIENT ; i < BRW_ATTRIB_INDEX ; i++) - if (brw->vb.info.varying & (1<<i)) + for (i = BRW_ATTRIB_MAT_FRONT_AMBIENT ; i < BRW_ATTRIB_MAX ; i++) + if (brw->vb.info.varying & ((GLuint64EXT)1<<i)) key->light_material_mask |= 1<<(i-BRW_ATTRIB_MAT_FRONT_AMBIENT); for (i = 0; i < MAX_LIGHTS; i++) { @@ -374,16 +374,17 @@ static void release_temps( struct tnl_program *p ) static struct ureg register_input( struct tnl_program *p, GLuint input ) { + GLuint orig_input = input; /* Cram the material flags into the generic range. We'll translate * them back later. */ if (input >= BRW_ATTRIB_MAT_FRONT_AMBIENT) - input -= BRW_ATTRIB_MAT_FRONT_AMBIENT; + input -= BRW_ATTRIB_MAT_FRONT_AMBIENT - BRW_ATTRIB_GENERIC0; assert(input < 32); p->program->Base.InputsRead |= (1<<input); - return make_ureg(PROGRAM_INPUT, input); + return make_ureg(PROGRAM_INPUT, orig_input); } static struct ureg register_output( struct tnl_program *p, GLuint output ) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 0974f1f80ad..c8c5bf93c95 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -221,6 +221,29 @@ void intelEmitFillBlit( struct intel_context *intel, ADVANCE_BATCH(); } +static GLuint translate_raster_op(GLenum logicop) +{ + switch(logicop) { + case GL_CLEAR: return 0x00; + case GL_AND: return 0x88; + case GL_AND_REVERSE: return 0x44; + case GL_COPY: return 0xCC; + case GL_AND_INVERTED: return 0x22; + case GL_NOOP: return 0xAA; + case GL_XOR: return 0x66; + case GL_OR: return 0xEE; + case GL_NOR: return 0x11; + case GL_EQUIV: return 0x99; + case GL_INVERT: return 0x55; + case GL_OR_REVERSE: return 0xDD; + case GL_COPY_INVERTED: return 0x33; + case GL_OR_INVERTED: return 0xBB; + case GL_NAND: return 0x77; + case GL_SET: return 0xFF; + default: return 0; + } +} + /* Copy BitBlt */ @@ -236,7 +259,8 @@ void intelEmitCopyBlit( struct intel_context *intel, GLboolean dst_tiled, GLshort src_x, GLshort src_y, GLshort dst_x, GLshort dst_y, - GLshort w, GLshort h ) + GLshort w, GLshort h, + GLenum logic_op ) { GLuint CMD, BR13; int dst_y2 = dst_y + h; @@ -244,12 +268,15 @@ void intelEmitCopyBlit( struct intel_context *intel, BATCH_LOCALS; - DBG("%s src:buf(%d)/%d %d,%d dst:buf(%d)/%d %d,%d sz:%dx%d\n", + DBG("%s src:buf(%d)/%d %d,%d dst:buf(%d)/%d %d,%d sz:%dx%d op:%d\n", __FUNCTION__, src_buffer, src_pitch, src_x, src_y, dst_buffer, dst_pitch, dst_x, dst_y, - w,h); + w,h,logic_op); + assert( logic_op - GL_CLEAR >= 0 ); + assert( logic_op - GL_CLEAR < 0x10 ); + src_pitch *= cpp; dst_pitch *= cpp; @@ -257,11 +284,12 @@ void intelEmitCopyBlit( struct intel_context *intel, case 1: case 2: case 3: - BR13 = (0xCC << 16) | (1<<24); + BR13 = (translate_raster_op(logic_op) << 16) | (1<<24); CMD = XY_SRC_COPY_BLT_CMD; break; case 4: - BR13 = (0xCC << 16) | (1<<24) | (1<<25); + BR13 = (translate_raster_op(logic_op) << 16) | (1<<24) | + (1<<25); CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB); break; diff --git a/src/mesa/drivers/dri/i965/intel_blit.h b/src/mesa/drivers/dri/i965/intel_blit.h index b15fb1c2b7f..8b0cc65243c 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.h +++ b/src/mesa/drivers/dri/i965/intel_blit.h @@ -49,7 +49,8 @@ extern void intelEmitCopyBlit( struct intel_context *intel, GLboolean dst_tiled, GLshort srcx, GLshort srcy, GLshort dstx, GLshort dsty, - GLshort w, GLshort h ); + GLshort w, GLshort h, + GLenum logic_op ); extern void intelEmitFillBlit( struct intel_context *intel, GLuint cpp, diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index d5d48994529..55b58a8f670 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -92,9 +92,9 @@ intel_check_blit_fragment_ops(GLcontext * ctx) !ctx->Color.ColorMask[1] || !ctx->Color.ColorMask[2] || !ctx->Color.ColorMask[3] || /* can do this! */ - ctx->Color.ColorLogicOpEnabled || /* can do this! */ ctx->Texture._EnabledUnits || - ctx->FragmentProgram._Enabled); + ctx->FragmentProgram._Enabled || + ctx->Color.BlendEnabled); } @@ -210,7 +210,9 @@ do_blit_copypixels(GLcontext * ctx, rect.x1 + delta_x, rect.y1 + delta_y, /* srcx, srcy */ rect.x1, rect.y1, /* dstx, dsty */ - rect.x2 - rect.x1, rect.y2 - rect.y1); + rect.x2 - rect.x1, rect.y2 - rect.y1, + ctx->Color.ColorLogicOpEnabled ? + ctx->Color.LogicOp : GL_COPY); } intel->need_flush = GL_TRUE; diff --git a/src/mesa/drivers/dri/i965/intel_regions.c b/src/mesa/drivers/dri/i965/intel_regions.c index 53f05612377..398b0a0a3b5 100644 --- a/src/mesa/drivers/dri/i965/intel_regions.c +++ b/src/mesa/drivers/dri/i965/intel_regions.c @@ -269,7 +269,8 @@ void intel_region_copy( struct intel_context *intel, dst->pitch, dst->buffer, dst_offset, dst->tiled, srcx, srcy, dstx, dsty, - width, height); + width, height, + GL_COPY ); } /* Fill a rectangular sub-region. Need better logic about when to diff --git a/src/mesa/drivers/dri/r200/r200_fragshader.c b/src/mesa/drivers/dri/r200/r200_fragshader.c index c350b9aaf3f..5dd3adaef69 100644 --- a/src/mesa/drivers/dri/r200/r200_fragshader.c +++ b/src/mesa/drivers/dri/r200/r200_fragshader.c @@ -362,7 +362,7 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { if (shader->NumPasses < 2) { for (reg = 0; reg < R200_MAX_TEXTURE_UNITS; reg++) { - struct gl_texture_object *texObj = ctx->Texture.Unit[reg]._Current; + GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; R200_STATECHANGE( rmesa, tex[reg] ); rmesa->hw.tex[reg].cmd[TEX_PP_TXMULTI_CTL] = 0; if (shader->SetupInst[0][reg].Opcode) { @@ -385,15 +385,16 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { else { txformat_x |= R200_TEXCOORD_PROJ; } + rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; } - else if (texObj->Target == GL_TEXTURE_3D) { + else if (targetbit == TEXTURE_3D_BIT) { txformat_x |= R200_TEXCOORD_VOLUME; } - else if (texObj->Target == GL_TEXTURE_CUBE_MAP) { + else if (targetbit == TEXTURE_CUBE_BIT) { txformat_x |= R200_TEXCOORD_CUBIC_ENV; } else if (shader->SetupInst[0][reg].swizzle == GL_SWIZZLE_STR_ATI || - shader->SetupInst[0][reg].swizzle == GL_SWIZZLE_STQ_ATI) { + shader->SetupInst[0][reg].swizzle == GL_SWIZZLE_STQ_ATI) { txformat_x |= R200_TEXCOORD_NONPROJ; } else { @@ -401,16 +402,16 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { } rmesa->hw.tex[reg].cmd[TEX_PP_TXFORMAT] = txformat; rmesa->hw.tex[reg].cmd[TEX_PP_TXFORMAT_X] = txformat_x; - /* is this a good idea? Could potentially sample from not enabled unit. - results are probably undefined anyway (?) but I hope it doesn't lock up... */ - rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; + /* enabling texturing when unit isn't correctly configured may not be safe */ + if (targetbit) + rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; } } } else { /* setup 1st pass */ for (reg = 0; reg < R200_MAX_TEXTURE_UNITS; reg++) { - struct gl_texture_object *texObj = ctx->Texture.Unit[reg]._Current; + GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; R200_STATECHANGE( rmesa, tex[reg] ); GLuint txformat_multi = 0; if (shader->SetupInst[0][reg].Opcode) { @@ -425,11 +426,12 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { else { txformat_multi |= R200_PASS1_TEXCOORD_PROJ; } + rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg; } - else if (texObj->Target == GL_TEXTURE_3D) { + else if (targetbit == TEXTURE_3D_BIT) { txformat_multi |= R200_PASS1_TEXCOORD_VOLUME; } - else if (texObj->Target == GL_TEXTURE_CUBE_MAP) { + else if (targetbit == TEXTURE_CUBE_BIT) { txformat_multi |= R200_PASS1_TEXCOORD_CUBIC_ENV; } else if (shader->SetupInst[0][reg].swizzle == GL_SWIZZLE_STR_ATI || @@ -439,14 +441,15 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { else { txformat_multi |= R200_PASS1_TEXCOORD_PROJ; } - rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg; + if (targetbit) + rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg; } rmesa->hw.tex[reg].cmd[TEX_PP_TXMULTI_CTL] = txformat_multi; } /* setup 2nd pass */ for (reg=0; reg < R200_MAX_TEXTURE_UNITS; reg++) { - struct gl_texture_object *texObj = ctx->Texture.Unit[reg]._Current; + GLbitfield targetbit = ctx->Texture.Unit[reg]._ReallyEnabled; if (shader->SetupInst[1][reg].Opcode) { GLuint coord = shader->SetupInst[1][reg].src; GLuint txformat = rmesa->hw.tex[reg].cmd[TEX_PP_TXFORMAT] @@ -463,15 +466,16 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { else { txformat_x |= R200_TEXCOORD_PROJ; } + rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; } - else if (texObj->Target == GL_TEXTURE_3D) { + else if (targetbit == TEXTURE_3D_BIT) { txformat_x |= R200_TEXCOORD_VOLUME; } - else if (texObj->Target == GL_TEXTURE_CUBE_MAP) { + else if (targetbit == TEXTURE_CUBE_BIT) { txformat_x |= R200_TEXCOORD_CUBIC_ENV; } else if (shader->SetupInst[1][reg].swizzle == GL_SWIZZLE_STR_ATI || - shader->SetupInst[1][reg].swizzle == GL_SWIZZLE_STQ_ATI) { + shader->SetupInst[1][reg].swizzle == GL_SWIZZLE_STQ_ATI) { txformat_x |= R200_TEXCOORD_NONPROJ; } else { @@ -488,7 +492,8 @@ static void r200UpdateFSRouting( GLcontext *ctx ) { } rmesa->hw.tex[reg].cmd[TEX_PP_TXFORMAT_X] = txformat_x; rmesa->hw.tex[reg].cmd[TEX_PP_TXFORMAT] = txformat; - rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; + if (targetbit) + rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << reg; } } } diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c index cab54512146..32c0128eaa2 100644 --- a/src/mesa/drivers/dri/r300/r300_fragprog.c +++ b/src/mesa/drivers/dri/r300/r300_fragprog.c @@ -544,8 +544,6 @@ static pfs_reg_t t_scalar_src(struct r300_fragment_program *rp, struct prog_src_register src = fpsrc; int sc = GET_SWZ(fpsrc.Swizzle, 0); /* X */ - printf("sc %d\n",sc); - src.Swizzle = ((sc<<0)|(sc<<3)|(sc<<6)|(sc<<9)); return t_src(rp, src); @@ -1670,7 +1668,7 @@ void r300_translate_fragment_shader(struct r300_fragment_program *rp) assert(rp->alu_end >= 0); rp->translated = GL_TRUE; - if (1) dump_program(rp); + if (0) dump_program(rp); } update_params(rp); diff --git a/src/mesa/drivers/x11/sources b/src/mesa/drivers/x11/sources new file mode 100644 index 00000000000..d76d65eaad1 --- /dev/null +++ b/src/mesa/drivers/x11/sources @@ -0,0 +1,8 @@ +# Note: only listing sources needed for X server renderer +MESA_DRIVER_X11_SOURCES = \ +xm_api.c \ +xm_buffer.c \ +xm_dd.c \ +xm_line.c \ +xm_span.c \ +xm_tri.c |