588 files changed, 44902 insertions, 58457 deletions

diff --git a/src/mesa/drivers/dri/Makefile b/src/mesa/drivers/dri/Makefile
index f466ce6c3cc..9e49fb16f53 100644
--- a/src/mesa/drivers/dri/Makefile
+++ b/src/mesa/drivers/dri/Makefile
@@ -20,19 +20,36 @@ subdirs:
 		fi \
 	done
 
+pcedit = sed \
+	-e 's,@INSTALL_DIR@,$(INSTALL_DIR),' \
+	-e 's,@INSTALL_LIB_DIR@,$(INSTALL_LIB_DIR),' \
+	-e 's,@INSTALL_INC_DIR@,$(INSTALL_INC_DIR),' \
+	-e 's,@VERSION@,$(MESA_MAJOR).$(MESA_MINOR).$(MESA_TINY),' \
+	-e 's,@DRI_DRIVER_DIR@,$(DRI_DRIVER_SEARCH_DIR),' \
+	-e 's,@DRI_PC_REQ_PRIV@,$(DRI_PC_REQ_PRIV),'
 
-install:
+dri.pc: dri.pc.in
+	$(pcedit) $< > $@
+
+
+install: dri.pc
 	@for dir in $(DRI_DIRS) ; do \
 		if [ -d $$dir ] ; then \
 			(cd $$dir && $(MAKE) install) || exit 1 ; \
 		fi \
 	done
+	$(INSTALL) -d $(DESTDIR)$(INSTALL_INC_DIR)/GL/internal
+	$(INSTALL) -m 0644 $(TOP)/include/GL/internal/dri_interface.h \
+	  $(DESTDIR)$(INSTALL_INC_DIR)/GL/internal
+	$(INSTALL) -d $(DESTDIR)$(INSTALL_LIB_DIR)/pkgconfig
+	$(INSTALL) -m 0644 dri.pc $(DESTDIR)$(INSTALL_LIB_DIR)/pkgconfig
 
 
 clean:
-	@for dir in $(DRI_DIRS) ; do \
+	-@for dir in $(DRI_DIRS) ; do \
 		if [ -d $$dir ] ; then \
 			(cd $$dir && $(MAKE) clean) ; \
 		fi \
 	done
 	-rm -f common/*.o
+	-rm -f *.pc
diff --git a/src/mesa/drivers/dri/Makefile.template b/src/mesa/drivers/dri/Makefile.template
index 3e7e527a982..2fa36bab3f9 100644
--- a/src/mesa/drivers/dri/Makefile.template
+++ b/src/mesa/drivers/dri/Makefile.template
@@ -13,11 +13,6 @@ COMMON_SOURCES = $(COMMON_GALLIUM_SOURCES) \
         ../common/texmem.c \
         ../common/drirenderbuffer.c
 
-COMMON_BM_SOURCES = \
-	../common/dri_bufmgr.c \
-	../common/dri_drmpool.c
-
-
 ifeq ($(WINDOW_SYSTEM),dri)
 WINOBJ=
 WINLIB=
@@ -47,15 +42,7 @@ SHARED_INCLUDES = \
 	-I$(TOP)/src/mesa/drivers/dri/common \
 	-Iserver \
 	-I$(TOP)/include \
-	-I$(TOP)/include/GL/internal \
 	-I$(TOP)/src/mesa \
-	-I$(TOP)/src/mesa/main \
-	-I$(TOP)/src/mesa/glapi \
-	-I$(TOP)/src/mesa/math \
-	-I$(TOP)/src/mesa/transform \
-	-I$(TOP)/src/mesa/shader \
-	-I$(TOP)/src/mesa/swrast \
-	-I$(TOP)/src/mesa/swrast_setup \
 	-I$(TOP)/src/egl/main \
 	-I$(TOP)/src/egl/drivers/dri \
 	$(LIBDRM_CFLAGS)
@@ -72,12 +59,12 @@ SHARED_INCLUDES = \
 
 ##### TARGETS #####
 
-default: depend symlinks $(LIBNAME) $(TOP)/$(LIB_DIR)/$(LIBNAME)
+default: symlinks depend $(LIBNAME) $(TOP)/$(LIB_DIR)/$(LIBNAME)
 
 
 $(LIBNAME): $(OBJECTS) $(MESA_MODULES) $(PIPE_DRIVERS) $(WINOBJ) Makefile $(TOP)/src/mesa/drivers/dri/Makefile.template
-	$(TOP)/bin/mklib -noprefix -o $@ \
-		$(OBJECTS) $(PIPE_DRIVERS) $(MESA_MODULES)  $(WINOBJ) $(DRI_LIB_DEPS)
+	$(MKLIB) -o $@ -noprefix -linker '$(CC)' -ldflags '$(LDFLAGS)' \
+		$(OBJECTS) $(PIPE_DRIVERS) $(MESA_MODULES) $(WINOBJ) $(DRI_LIB_DEPS)
 
 
 $(TOP)/$(LIB_DIR)/$(LIBNAME): $(LIBNAME)
@@ -88,7 +75,7 @@ depend: $(C_SOURCES) $(ASM_SOURCES) $(SYMLINKS)
 	rm -f depend
 	touch depend
 	$(MKDEP) $(MKDEP_OPTIONS) $(DRIVER_DEFINES) $(INCLUDES) $(C_SOURCES) \
-		$(ASM_SOURCES) 2> /dev/null
+		$(ASM_SOURCES)
 
 
 # Emacs tags
@@ -103,8 +90,8 @@ clean:
 
 
 install: $(LIBNAME)
-	$(INSTALL) -d $(DRI_DRIVER_INSTALL_DIR)
-	$(INSTALL) -m 755 $(LIBNAME) $(DRI_DRIVER_INSTALL_DIR)
+	$(INSTALL) -d $(DESTDIR)$(DRI_DRIVER_INSTALL_DIR)
+	$(INSTALL) -m 755 $(LIBNAME) $(DESTDIR)$(DRI_DRIVER_INSTALL_DIR)
 
 
-include depend
+-include depend
diff --git a/src/mesa/drivers/dri/common/depthtmp.h b/src/mesa/drivers/dri/common/depthtmp.h
index 55199abf6a3..fd2dab3b422 100644
--- a/src/mesa/drivers/dri/common/depthtmp.h
+++ b/src/mesa/drivers/dri/common/depthtmp.h
@@ -29,7 +29,7 @@ static void TAG(WriteDepthSpan)( GLcontext *ctx,
 {
    HW_WRITE_LOCK()
       {
-         const GLuint *depth = (const GLuint *) values;
+         const VALUE_TYPE *depth = (const VALUE_TYPE *) values;
 	 GLint x1;
 	 GLint n1;
 	 LOCAL_DEPTH_VARS;
@@ -134,7 +134,7 @@ static void TAG(WriteDepthPixels)( GLcontext *ctx,
 {
    HW_WRITE_LOCK()
       {
-         const GLuint *depth = (const GLuint *) values;
+         const VALUE_TYPE *depth = (const VALUE_TYPE *) values;
 	 GLuint i;
 	 LOCAL_DEPTH_VARS;
 
@@ -180,7 +180,7 @@ static void TAG(ReadDepthSpan)( GLcontext *ctx,
 {
    HW_READ_LOCK()
       {
-         GLuint *depth = (GLuint *) values;
+         VALUE_TYPE *depth = (VALUE_TYPE *) values;
 	 GLint x1, n1;
 	 LOCAL_DEPTH_VARS;
 
@@ -215,7 +215,7 @@ static void TAG(ReadDepthPixels)( GLcontext *ctx,
 {
    HW_READ_LOCK()
       {
-         GLuint *depth = (GLuint *) values;
+         VALUE_TYPE *depth = (VALUE_TYPE *) values;
 	 GLuint i;
 	 LOCAL_DEPTH_VARS;
 
@@ -267,3 +267,4 @@ static void TAG(InitDepthPointers)(struct gl_renderbuffer *rb)
 #undef READ_DEPTH
 #endif
 #undef TAG
+#undef VALUE_TYPE
diff --git a/src/mesa/drivers/dri/common/dri_bufmgr.c b/src/mesa/drivers/dri/common/dri_bufmgr.c
deleted file mode 100644
index 5747307f3b6..00000000000
--- a/src/mesa/drivers/dri/common/dri_bufmgr.c
+++ /dev/null
@@ -1,535 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
- */
-
-#include <xf86drm.h>
-#include <stdlib.h>
-#include "glthread.h"
-#include "errno.h"
-#include "dri_bufmgr.h"
-#include "string.h"
-#include "imports.h"
-#include "dri_bufpool.h"
-
-_glthread_DECLARE_STATIC_MUTEX(bmMutex);
-
-/*
- * TODO: Introduce fence pools in the same way as 
- * buffer object pools.
- */
-
-
-
-typedef struct _DriFenceObject
-{
-   int fd;
-   _glthread_Mutex mutex;
-   int refCount;
-   const char *name;
-   drmFence fence;
-} DriFenceObject;
-
-typedef struct _DriBufferObject
-{
-   DriBufferPool *pool;
-   _glthread_Mutex mutex;
-   int refCount;
-   const char *name;
-   unsigned flags;
-   unsigned hint;
-   unsigned alignment;
-   void *private;
-   /* user-space buffer: */
-   unsigned userBuffer;
-   void *userData;
-   unsigned userSize;
-} DriBufferObject;
-
-
-void
-bmError(int val, const char *file, const char *function, int line)
-{
-   _mesa_printf("Fatal video memory manager error \"%s\".\n"
-                "Check kernel logs or set the LIBGL_DEBUG\n"
-                "environment variable to \"verbose\" for more info.\n"
-                "Detected in file %s, line %d, function %s.\n",
-                strerror(-val), file, line, function);
-#ifndef NDEBUG
-   abort();
-#else
-   abort();
-#endif
-}
-
-DriFenceObject *
-driFenceBuffers(int fd, char *name, unsigned flags)
-{
-   DriFenceObject *fence = (DriFenceObject *) malloc(sizeof(*fence));
-   int ret;
-
-   if (!fence)
-      BM_CKFATAL(-EINVAL);
-
-   _glthread_LOCK_MUTEX(bmMutex);
-   fence->refCount = 1;
-   fence->name = name;
-   fence->fd = fd;
-   _glthread_INIT_MUTEX(fence->mutex);
-   ret = drmFenceBuffers(fd, flags, &fence->fence);
-   _glthread_UNLOCK_MUTEX(bmMutex);
-   if (ret) {
-      free(fence);
-      BM_CKFATAL(ret);
-   }
-   return fence;
-}
-
-
-unsigned 
-driFenceType(DriFenceObject * fence)
-{
-    unsigned ret;
-
-    _glthread_LOCK_MUTEX(bmMutex);
-    ret = fence->fence.flags;
-    _glthread_UNLOCK_MUTEX(bmMutex);
-    
-    return ret;
-}
-
-
-DriFenceObject *
-driFenceReference(DriFenceObject * fence)
-{
-   _glthread_LOCK_MUTEX(bmMutex);
-   ++fence->refCount;
-   _glthread_UNLOCK_MUTEX(bmMutex);
-   return fence;
-}
-
-void
-driFenceUnReference(DriFenceObject * fence)
-{
-   if (!fence)
-      return;
-
-   _glthread_LOCK_MUTEX(bmMutex);
-   if (--fence->refCount == 0) {
-      drmFenceDestroy(fence->fd, &fence->fence);
-      free(fence);
-   }
-   _glthread_UNLOCK_MUTEX(bmMutex);
-}
-
-void
-driFenceFinish(DriFenceObject * fence, unsigned type, int lazy)
-{
-   int ret;
-   unsigned flags = (lazy) ? DRM_FENCE_FLAG_WAIT_LAZY : 0;
-
-   _glthread_LOCK_MUTEX(fence->mutex);
-   ret = drmFenceWait(fence->fd, flags, &fence->fence, type);
-   _glthread_UNLOCK_MUTEX(fence->mutex);
-   BM_CKFATAL(ret);
-}
-
-int
-driFenceSignaled(DriFenceObject * fence, unsigned type)
-{
-   int signaled;
-   int ret;
-
-   if (fence == NULL)
-      return GL_TRUE;
-
-   _glthread_LOCK_MUTEX(fence->mutex);
-   ret = drmFenceSignaled(fence->fd, &fence->fence, type, &signaled);
-   _glthread_UNLOCK_MUTEX(fence->mutex);
-   BM_CKFATAL(ret);
-   return signaled;
-}
-
-
-extern drmBO *
-driBOKernel(struct _DriBufferObject *buf)
-{
-   drmBO *ret;
-
-   assert(buf->private != NULL);
-   ret = buf->pool->kernel(buf->pool, buf->private);
-   if (!ret)
-      BM_CKFATAL(-EINVAL);
-
-   return ret;
-}
-
-void
-driBOWaitIdle(struct _DriBufferObject *buf, int lazy)
-{
-   struct _DriBufferPool *pool;
-   void *priv;
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   pool = buf->pool;
-   priv = buf->private;
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-   
-   assert(priv != NULL);
-   BM_CKFATAL(buf->pool->waitIdle(pool, priv, lazy));
-}
-
-void *
-driBOMap(struct _DriBufferObject *buf, unsigned flags, unsigned hint)
-{
-   if (buf->userBuffer) {
-      return buf->userData;
-   }
-   else {
-      void *virtual;
-
-      assert(buf->private != NULL);
-
-      _glthread_LOCK_MUTEX(buf->mutex);
-      BM_CKFATAL(buf->pool->map(buf->pool, buf->private, flags, hint, &virtual));
-      _glthread_UNLOCK_MUTEX(buf->mutex);
-      return virtual;
-   }
-}
-
-void
-driBOUnmap(struct _DriBufferObject *buf)
-{
-   if (!buf->userBuffer) {
-      assert(buf->private != NULL);
-
-      buf->pool->unmap(buf->pool, buf->private);
-   }
-}
-
-unsigned long
-driBOOffset(struct _DriBufferObject *buf)
-{
-   unsigned long ret;
-
-   assert(buf->private != NULL);
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   ret = buf->pool->offset(buf->pool, buf->private);
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-   return ret;
-}
-
-unsigned
-driBOFlags(struct _DriBufferObject *buf)
-{
-   unsigned ret;
-
-   assert(buf->private != NULL);
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   ret = buf->pool->flags(buf->pool, buf->private);
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-   return ret;
-}
-
-struct _DriBufferObject *
-driBOReference(struct _DriBufferObject *buf)
-{
-   _glthread_LOCK_MUTEX(bmMutex);
-   if (++buf->refCount == 1) {
-      BM_CKFATAL(-EINVAL);
-   }
-   _glthread_UNLOCK_MUTEX(bmMutex);
-   return buf;
-}
-
-void
-driBOUnReference(struct _DriBufferObject *buf)
-{
-   int tmp;
-
-   if (!buf)
-      return;
-
-   _glthread_LOCK_MUTEX(bmMutex);
-   tmp = --buf->refCount;
-   _glthread_UNLOCK_MUTEX(bmMutex);
-   if (!tmp) {
-      if (buf->private)
-         buf->pool->destroy(buf->pool, buf->private);
-      free(buf);
-   }
-}
-
-void
-driBOData(struct _DriBufferObject *buf,
-          unsigned size, const void *data, unsigned flags)
-{
-   void *virtual;
-   int newBuffer;
-   struct _DriBufferPool *pool;
-
-   assert(!buf->userBuffer); /* XXX just do a memcpy? */
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   pool = buf->pool;
-   if (!pool->create) {
-      _mesa_error(NULL, GL_INVALID_OPERATION,
-                  "driBOData called on invalid buffer\n");
-      BM_CKFATAL(-EINVAL);
-   }
-   newBuffer = !buf->private || (pool->size(pool, buf->private) < size) ||
-      pool->map(pool, buf->private, DRM_BO_FLAG_WRITE,
-                DRM_BO_HINT_DONT_BLOCK, &virtual);
-
-   if (newBuffer) {
-      if (buf->private)
-         pool->destroy(pool, buf->private);
-      if (!flags)
-         flags = buf->flags;
-      buf->private = pool->create(pool, size, flags, DRM_BO_HINT_DONT_FENCE, 
-				  buf->alignment);
-      if (!buf->private)
-         BM_CKFATAL(-ENOMEM);
-      BM_CKFATAL(pool->map(pool, buf->private,
-                           DRM_BO_FLAG_WRITE,
-                           DRM_BO_HINT_DONT_BLOCK, &virtual));
-   }
-
-   if (data != NULL)
-      memcpy(virtual, data, size);
-
-   BM_CKFATAL(pool->unmap(pool, buf->private));
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-}
-
-void
-driBOSubData(struct _DriBufferObject *buf,
-             unsigned long offset, unsigned long size, const void *data)
-{
-   void *virtual;
-
-   assert(!buf->userBuffer); /* XXX just do a memcpy? */
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   if (size && data) {
-      BM_CKFATAL(buf->pool->map(buf->pool, buf->private,
-                                DRM_BO_FLAG_WRITE, 0, &virtual));
-      memcpy((unsigned char *) virtual + offset, data, size);
-      BM_CKFATAL(buf->pool->unmap(buf->pool, buf->private));
-   }
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-}
-
-void
-driBOGetSubData(struct _DriBufferObject *buf,
-                unsigned long offset, unsigned long size, void *data)
-{
-   void *virtual;
-
-   assert(!buf->userBuffer); /* XXX just do a memcpy? */
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   if (size && data) {
-      BM_CKFATAL(buf->pool->map(buf->pool, buf->private,
-                                DRM_BO_FLAG_READ, 0, &virtual));
-      memcpy(data, (unsigned char *) virtual + offset, size);
-      BM_CKFATAL(buf->pool->unmap(buf->pool, buf->private));
-   }
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-}
-
-void
-driBOSetStatic(struct _DriBufferObject *buf,
-               unsigned long offset,
-               unsigned long size, void *virtual, unsigned flags)
-{
-   assert(!buf->userBuffer); /* XXX what to do? */
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   if (buf->private != NULL) {
-      _mesa_error(NULL, GL_INVALID_OPERATION,
-                  "Invalid buffer for setStatic\n");
-      BM_CKFATAL(-EINVAL);
-   }
-   if (buf->pool->setstatic == NULL) {
-      _mesa_error(NULL, GL_INVALID_OPERATION,
-                  "Invalid buffer pool for setStatic\n");
-      BM_CKFATAL(-EINVAL);
-   }
-
-   if (!flags)
-      flags = buf->flags;
-
-   buf->private = buf->pool->setstatic(buf->pool, offset, size,
-                                       virtual, flags);
-   if (!buf->private) {
-      _mesa_error(NULL, GL_OUT_OF_MEMORY,
-                  "Invalid buffer pool for setStatic\n");
-      BM_CKFATAL(-ENOMEM);
-   }
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-}
-
-
-
-void
-driGenBuffers(struct _DriBufferPool *pool,
-              const char *name,
-              unsigned n,
-              struct _DriBufferObject *buffers[],
-              unsigned alignment, unsigned flags, unsigned hint)
-{
-   struct _DriBufferObject *buf;
-   int i;
-
-   flags = (flags) ? flags : DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_MEM_VRAM |
-      DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE;
-
-
-   for (i = 0; i < n; ++i) {
-      buf = (struct _DriBufferObject *) calloc(1, sizeof(*buf));
-      if (!buf)
-         BM_CKFATAL(-ENOMEM);
-
-      _glthread_INIT_MUTEX(buf->mutex);
-      _glthread_LOCK_MUTEX(buf->mutex);
-      _glthread_LOCK_MUTEX(bmMutex);
-      buf->refCount = 1;
-      _glthread_UNLOCK_MUTEX(bmMutex);
-      buf->flags = flags;
-      buf->hint = hint;
-      buf->name = name;
-      buf->alignment = alignment;
-      buf->pool = pool;
-      _glthread_UNLOCK_MUTEX(buf->mutex);
-      buffers[i] = buf;
-   }
-}
-
-void
-driGenUserBuffer(struct _DriBufferPool *pool,
-                 const char *name,
-                 struct _DriBufferObject **buffers,
-                 void *ptr, unsigned bytes)
-{
-   const unsigned alignment = 1, flags = 0, hint = 0;
-
-   driGenBuffers(pool, name, 1, buffers, alignment, flags, hint);
-
-   (*buffers)->userBuffer = 1;
-   (*buffers)->userData = ptr;
-   (*buffers)->userSize = bytes;
-}
-
-
-void
-driDeleteBuffers(unsigned n, struct _DriBufferObject *buffers[])
-{
-   int i;
-
-   for (i = 0; i < n; ++i) {
-      driBOUnReference(buffers[i]);
-   }
-}
-
-
-void
-driInitBufMgr(int fd)
-{
-   ;
-}
-
-
-void
-driBOCreateList(int target, drmBOList * list)
-{
-   _glthread_LOCK_MUTEX(bmMutex);
-   BM_CKFATAL(drmBOCreateList(target, list));
-   _glthread_UNLOCK_MUTEX(bmMutex);
-}
-
-void
-driBOResetList(drmBOList * list)
-{
-   _glthread_LOCK_MUTEX(bmMutex);
-   BM_CKFATAL(drmBOResetList(list));
-   _glthread_UNLOCK_MUTEX(bmMutex);
-}
-
-void
-driBOAddListItem(drmBOList * list, struct _DriBufferObject *buf,
-                 unsigned flags, unsigned mask)
-{
-   int newItem;
-
-   _glthread_LOCK_MUTEX(buf->mutex);
-   _glthread_LOCK_MUTEX(bmMutex);
-   BM_CKFATAL(drmAddValidateItem(list, driBOKernel(buf),
-                                 flags, mask, &newItem));
-   _glthread_UNLOCK_MUTEX(bmMutex);
-
-   /*
-    * Tell userspace pools to validate the buffer. This should be a 
-    * noop if the pool is already validated.
-    * FIXME: We should have a list for this as well.
-    */
-
-   if (buf->pool->validate) {
-      BM_CKFATAL(buf->pool->validate(buf->pool, buf->private));
-   }
-
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-}
-
-void
-driBOFence(struct _DriBufferObject *buf, struct _DriFenceObject *fence)
-{
-   _glthread_LOCK_MUTEX(buf->mutex);
-   BM_CKFATAL(buf->pool->fence(buf->pool, buf->private, fence));
-   _glthread_UNLOCK_MUTEX(buf->mutex);
-
-}
-
-void
-driBOValidateList(int fd, drmBOList * list)
-{
-   _glthread_LOCK_MUTEX(bmMutex);
-   BM_CKFATAL(drmBOValidateList(fd, list));
-   _glthread_UNLOCK_MUTEX(bmMutex);
-}
-
-void
-driPoolTakeDown(struct _DriBufferPool *pool)
-{
-   pool->takeDown(pool);
-
-}
diff --git a/src/mesa/drivers/dri/common/dri_bufmgr.h b/src/mesa/drivers/dri/common/dri_bufmgr.h
deleted file mode 100644
index ee4ce2cbdef..00000000000
--- a/src/mesa/drivers/dri/common/dri_bufmgr.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
- */
-
-#ifndef _DRI_BUFMGR_H_
-#define _DRI_BUFMGR_H_
-#include <xf86drm.h>
-
-
-struct _DriFenceObject;
-struct _DriBufferObject;
-struct _DriBufferPool;
-
-extern struct _DriFenceObject *driFenceBuffers(int fd, char *name,
-                                               unsigned flags);
-
-extern struct _DriFenceObject *driFenceReference(struct _DriFenceObject *fence);
-
-extern void driFenceUnReference(struct _DriFenceObject *fence);
-
-extern void
-driFenceFinish(struct _DriFenceObject *fence, unsigned type, int lazy);
-
-extern int driFenceSignaled(struct _DriFenceObject *fence, unsigned type);
-extern unsigned driFenceType(struct _DriFenceObject *fence);
-
-/*
- * Return a pointer to the libdrm buffer object this DriBufferObject
- * uses.
- */
-
-extern drmBO *driBOKernel(struct _DriBufferObject *buf);
-extern void *driBOMap(struct _DriBufferObject *buf, unsigned flags,
-                      unsigned hint);
-extern void driBOUnmap(struct _DriBufferObject *buf);
-extern unsigned long driBOOffset(struct _DriBufferObject *buf);
-extern unsigned driBOFlags(struct _DriBufferObject *buf);
-extern struct _DriBufferObject *driBOReference(struct _DriBufferObject *buf);
-extern void driBOUnReference(struct _DriBufferObject *buf);
-extern void driBOData(struct _DriBufferObject *r_buf,
-                      unsigned size, const void *data, unsigned flags);
-extern void driBOSubData(struct _DriBufferObject *buf,
-                         unsigned long offset, unsigned long size,
-                         const void *data);
-extern void driBOGetSubData(struct _DriBufferObject *buf,
-                            unsigned long offset, unsigned long size,
-                            void *data);
-extern void driGenBuffers(struct _DriBufferPool *pool,
-                          const char *name,
-                          unsigned n,
-                          struct _DriBufferObject *buffers[],
-                          unsigned alignment, unsigned flags, unsigned hint);
-extern void driGenUserBuffer(struct _DriBufferPool *pool,
-                             const char *name,
-                             struct _DriBufferObject *buffers[],
-                             void *ptr, unsigned bytes);
-extern void driDeleteBuffers(unsigned n, struct _DriBufferObject *buffers[]);
-extern void driInitBufMgr(int fd);
-extern void driBOCreateList(int target, drmBOList * list);
-extern void driBOResetList(drmBOList * list);
-extern void driBOAddListItem(drmBOList * list, struct _DriBufferObject *buf,
-                             unsigned flags, unsigned mask);
-extern void driBOValidateList(int fd, drmBOList * list);
-
-extern void driBOFence(struct _DriBufferObject *buf,
-                       struct _DriFenceObject *fence);
-
-extern void driPoolTakeDown(struct _DriBufferPool *pool);
-extern void driBOSetStatic(struct _DriBufferObject *buf,
-                           unsigned long offset,
-                           unsigned long size, void *virtual, unsigned flags);
-extern void driBOWaitIdle(struct _DriBufferObject *buf, int lazy);
-extern void driPoolTakeDown(struct _DriBufferPool *pool);
-
-#endif
diff --git a/src/mesa/drivers/dri/common/dri_bufpool.h b/src/mesa/drivers/dri/common/dri_bufpool.h
deleted file mode 100644
index c6fb2c3ce01..00000000000
--- a/src/mesa/drivers/dri/common/dri_bufpool.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#ifndef _DRI_BUFPOOL_H_
-#define _DRI_BUFPOOL_H_
-
-#include <xf86drm.h>
-struct _DriFenceObject;
-
-typedef struct _DriBufferPool
-{
-   int fd;
-   int (*map) (struct _DriBufferPool * pool, void *private,
-               unsigned flags, int hint, void **virtual);
-   int (*unmap) (struct _DriBufferPool * pool, void *private);
-   int (*destroy) (struct _DriBufferPool * pool, void *private);
-   unsigned long (*offset) (struct _DriBufferPool * pool, void *private);
-   unsigned (*flags) (struct _DriBufferPool * pool, void *private);
-   unsigned long (*size) (struct _DriBufferPool * pool, void *private);
-   void *(*create) (struct _DriBufferPool * pool, unsigned long size,
-                    unsigned flags, unsigned hint, unsigned alignment);
-   int (*fence) (struct _DriBufferPool * pool, void *private,
-                 struct _DriFenceObject * fence);
-   drmBO *(*kernel) (struct _DriBufferPool * pool, void *private);
-   int (*validate) (struct _DriBufferPool * pool, void *private);
-   void *(*setstatic) (struct _DriBufferPool * pool, unsigned long offset,
-                       unsigned long size, void *virtual, unsigned flags);
-   int (*waitIdle) (struct _DriBufferPool *pool, void *private,
-		    int lazy);
-   void (*takeDown) (struct _DriBufferPool * pool);
-   void *data;
-} DriBufferPool;
-
-extern void bmError(int val, const char *file, const char *function,
-                    int line);
-#define BM_CKFATAL(val)					       \
-  do{							       \
-    int tstVal = (val);					       \
-    if (tstVal) 					       \
-      bmError(tstVal, __FILE__, __FUNCTION__, __LINE__);       \
-  } while(0);
-
-
-
-
-
-/*
- * Builtin pools.
- */
-
-/*
- * Kernel buffer objects. Size in multiples of page size. Page size aligned.
- */
-
-extern struct _DriBufferPool *driDRMPoolInit(int fd);
-extern struct _DriBufferPool *driDRMStaticPoolInit(int fd);
-
-#endif
diff --git a/src/mesa/drivers/dri/common/dri_drmpool.c b/src/mesa/drivers/dri/common/dri_drmpool.c
deleted file mode 100644
index 878a148b397..00000000000
--- a/src/mesa/drivers/dri/common/dri_drmpool.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * 
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include <xf86drm.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include "dri_bufpool.h"
-
-/*
- * Buffer pool implementation using DRM buffer objects as DRI buffer objects.
- */
-
-static void *
-pool_create(struct _DriBufferPool *pool,
-            unsigned long size, unsigned flags, unsigned hint,
-            unsigned alignment)
-{
-   drmBO *buf = (drmBO *) malloc(sizeof(*buf));
-   int ret;
-   unsigned pageSize = getpagesize();
-
-   if (!buf)
-      return NULL;
-
-   if ((alignment > pageSize) && (alignment % pageSize)) {
-      return NULL;
-   }
-
-   ret = drmBOCreate(pool->fd, 0, size, alignment / pageSize,
-		     NULL, drm_bo_type_dc,
-                     flags, hint, buf);
-   if (ret) {
-      free(buf);
-      return NULL;
-   }
-
-   return (void *) buf;
-}
-
-static int
-pool_destroy(struct _DriBufferPool *pool, void *private)
-{
-   int ret;
-   drmBO *buf = (drmBO *) private;
-   ret = drmBODestroy(pool->fd, buf);
-   free(buf);
-   return ret;
-}
-
-static int
-pool_map(struct _DriBufferPool *pool, void *private, unsigned flags,
-         int hint, void **virtual)
-{
-   drmBO *buf = (drmBO *) private;
-
-   return drmBOMap(pool->fd, buf, flags, hint, virtual);
-}
-
-static int
-pool_unmap(struct _DriBufferPool *pool, void *private)
-{
-   drmBO *buf = (drmBO *) private;
-   return drmBOUnmap(pool->fd, buf);
-}
-
-static unsigned long
-pool_offset(struct _DriBufferPool *pool, void *private)
-{
-   drmBO *buf = (drmBO *) private;
-   return buf->offset;
-}
-
-static unsigned
-pool_flags(struct _DriBufferPool *pool, void *private)
-{
-   drmBO *buf = (drmBO *) private;
-   return buf->flags;
-}
-
-
-static unsigned long
-pool_size(struct _DriBufferPool *pool, void *private)
-{
-   drmBO *buf = (drmBO *) private;
-   return buf->size;
-}
-
-static int
-pool_fence(struct _DriBufferPool *pool, void *private,
-           struct _DriFenceObject *fence)
-{
-   /*
-    * Noop. The kernel handles all fencing.
-    */
-
-   return 0;
-}
-
-static drmBO *
-pool_kernel(struct _DriBufferPool *pool, void *private)
-{
-   return (drmBO *) private;
-}
-
-static int
-pool_waitIdle(struct _DriBufferPool *pool, void *private, int lazy)
-{
-   drmBO *buf = (drmBO *) private;
-   return drmBOWaitIdle(pool->fd, buf, (lazy) ? DRM_BO_HINT_WAIT_LAZY:0);
-}
-
-    
-static void
-pool_takedown(struct _DriBufferPool *pool)
-{
-   free(pool);
-}
-
-
-struct _DriBufferPool *
-driDRMPoolInit(int fd)
-{
-   struct _DriBufferPool *pool;
-
-   pool = (struct _DriBufferPool *) malloc(sizeof(*pool));
-
-   if (!pool)
-      return NULL;
-
-   pool->fd = fd;
-   pool->map = &pool_map;
-   pool->unmap = &pool_unmap;
-   pool->destroy = &pool_destroy;
-   pool->offset = &pool_offset;
-   pool->flags = &pool_flags;
-   pool->size = &pool_size;
-   pool->create = &pool_create;
-   pool->fence = &pool_fence;
-   pool->kernel = &pool_kernel;
-   pool->validate = NULL;
-   pool->setstatic = NULL;
-   pool->waitIdle = &pool_waitIdle;
-   pool->takeDown = &pool_takedown;
-   pool->data = NULL;
-   return pool;
-}
-
-
-static void *
-pool_setstatic(struct _DriBufferPool *pool, unsigned long offset,
-               unsigned long size, void *virtual, unsigned flags)
-{
-   drmBO *buf = (drmBO *) malloc(sizeof(*buf));
-   int ret;
-
-   if (!buf)
-      return NULL;
-
-   ret = drmBOCreate(pool->fd, offset, size, 0, NULL, drm_bo_type_fake,
-                     flags, DRM_BO_HINT_DONT_FENCE, buf);
-
-   if (ret) {
-      free(buf);
-      return NULL;
-   }
-
-   buf->virtual = virtual;
-
-   return (void *) buf;
-}
-
-
-struct _DriBufferPool *
-driDRMStaticPoolInit(int fd)
-{
-   struct _DriBufferPool *pool;
-
-   pool = (struct _DriBufferPool *) malloc(sizeof(*pool));
-
-   if (!pool)
-      return NULL;
-
-   pool->fd = fd;
-   pool->map = &pool_map;
-   pool->unmap = &pool_unmap;
-   pool->destroy = &pool_destroy;
-   pool->offset = &pool_offset;
-   pool->flags = &pool_flags;
-   pool->size = &pool_size;
-   pool->create = NULL;
-   pool->fence = &pool_fence;
-   pool->kernel = &pool_kernel;
-   pool->validate = NULL;
-   pool->setstatic = &pool_setstatic;
-   pool->waitIdle = &pool_waitIdle;
-   pool->takeDown = &pool_takedown;
-   pool->data = NULL;
-   return pool;
-}
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c
index ac6e3cdda8e..a2316e2662b 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -1,28 +1,4 @@
-/*
- * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
+/* $XFree86: xc/lib/GL/dri/dri_util.c,v 1.7 2003/04/28 17:01:25 dawes Exp $ */
 /**
  * \file dri_util.c
  * DRI utility functions.
@@ -50,44 +26,24 @@
 #define MAP_FAILED ((void *)-1)
 #endif
 
-#include "imports.h"
+#include "main/imports.h"
 #define None 0
 
 #include "dri_util.h"
 #include "drm_sarea.h"
+#include "utils.h"
 
 #ifndef GLX_OML_sync_control
-typedef GLboolean ( * PFNGLXGETMSCRATEOMLPROC) (__DRInativeDisplay *dpy, __DRIid drawable, int32_t *numerator, int32_t *denominator);
+typedef GLboolean ( * PFNGLXGETMSCRATEOMLPROC) (__DRIdrawable *drawable, int32_t *numerator, int32_t *denominator);
 #endif
 
-/* This pointer *must* be set by the driver's __driCreateNewScreen funciton!
- */
-const __DRIinterfaceMethods * dri_interface = NULL;
-
-/**
- * This is used in a couple of places that call \c driCreateNewDrawable.
- */
-static const int empty_attribute_list[1] = { None };
-
-
 /**
- * Cached copy of the internal API version used by libGL and the client-side
- * DRI driver.
+ * This is just a token extension used to signal that the driver
+ * supports setting a read drawable.
  */
-static int api_ver = 0;
-
-/* forward declarations */
-static int driQueryFrameTracking( __DRInativeDisplay *dpy, void *priv,
-                                  int64_t *sbc, int64_t *missedFrames,
-                                  float *lastMissedUsage, float *usage );
-
-static void *driCreateNewDrawable(__DRInativeDisplay *dpy,
-                                  const __GLcontextModes *modes,
-                                  __DRIid draw, __DRIdrawable *pdraw,
-                                  int renderType, const int *attrs);
-
-static void driDestroyDrawable(__DRInativeDisplay *dpy, void *drawablePrivate);
-
+const __DRIextension driReadDrawableExtension = {
+    __DRI_READ_DRAWABLE, __DRI_READ_DRAWABLE_VERSION
+};
 
 /**
  * Print message to \c stderr if the \c LIBGL_DEBUG environment variable
@@ -111,64 +67,19 @@ __driUtilMessage(const char *f, ...)
     }
 }
 
-
-/*****************************************************************/
-/** \name Drawable list management */
-/*****************************************************************/
-/*@{*/
-
-static GLboolean __driAddDrawable(void *drawHash, __DRIdrawable *pdraw)
-{
-    __DRIdrawablePrivate *pdp = (__DRIdrawablePrivate *)pdraw->private;
-
-    if (drmHashInsert(drawHash, pdp->draw, pdraw))
-	return GL_FALSE;
-
-    return GL_TRUE;
-}
-
-static __DRIdrawable *__driFindDrawable(void *drawHash, __DRIid draw)
+GLint
+driIntersectArea( drm_clip_rect_t rect1, drm_clip_rect_t rect2 )
 {
-    int retcode;
-    __DRIdrawable *pdraw;
-
-    retcode = drmHashLookup(drawHash, draw, (void *)&pdraw);
-    if (retcode)
-	return NULL;
-
-    return pdraw;
-}
-
+   if (rect2.x1 > rect1.x1) rect1.x1 = rect2.x1;
+   if (rect2.x2 < rect1.x2) rect1.x2 = rect2.x2;
+   if (rect2.y1 > rect1.y1) rect1.y1 = rect2.y1;
+   if (rect2.y2 < rect1.y2) rect1.y2 = rect2.y2;
 
-/**
- * Find drawables in the local hash that have been destroyed on the
- * server.
- * 
- * \param drawHash  Hash-table containing all known drawables.
- */
-static void __driGarbageCollectDrawables(void *drawHash)
-{
-    __DRIid draw;
-    __DRInativeDisplay *dpy;
-    __DRIdrawable *pdraw;
+   if (rect1.x1 > rect1.x2 || rect1.y1 > rect1.y2) return 0;
 
-    if (drmHashFirst(drawHash, &draw, (void *)&pdraw) == 1) {
-	do {
-	    __DRIdrawablePrivate *pdp = (__DRIdrawablePrivate *)pdraw->private;
-	    dpy = pdp->driScreenPriv->display;
-	    if (! (*dri_interface->windowExists)(dpy, draw)) {
-		/* Destroy the local drawable data, if the drawable no
-		   longer exists in the Xserver */
-		(*pdraw->destroyDrawable)(dpy, pdraw->private);
-		_mesa_free(pdraw);
-	    }
-	} while (drmHashNext(drawHash, &draw, (void *)&pdraw) == 1);
-    }
+   return (rect1.x2 - rect1.x1) * (rect1.y2 - rect1.y1);
 }
 
-/*@}*/
-
-
 /*****************************************************************/
 /** \name Context (un)binding functions                          */
 /*****************************************************************/
@@ -177,10 +88,7 @@ static void __driGarbageCollectDrawables(void *drawHash)
 /**
  * Unbind context.
  * 
- * \param dpy the display handle.
- * \param scrn the screen number.
- * \param draw drawable.
- * \param read Current reading drawable.
+ * \param scrn the screen.
  * \param gc context.
  *
  * \return \c GL_TRUE on success, or \c GL_FALSE on failure.
@@ -193,56 +101,27 @@ static void __driGarbageCollectDrawables(void *drawHash)
  * While casting the opaque private pointers associated with the parameters
  * into their respective real types it also assures they are not \c NULL. 
  */
-static GLboolean driUnbindContext(__DRInativeDisplay *dpy, int scrn,
-			      __DRIid draw, __DRIid read,
-			      __DRIcontext *ctx)
+static int driUnbindContext(__DRIcontext *pcp)
 {
-    __DRIscreen *pDRIScreen;
-    __DRIdrawable *pdraw;
-    __DRIdrawable *pread;
-    __DRIcontextPrivate *pcp;
-    __DRIscreenPrivate *psp;
-    __DRIdrawablePrivate *pdp;
-    __DRIdrawablePrivate *prp;
+    __DRIscreen *psp;
+    __DRIdrawable *pdp;
+    __DRIdrawable *prp;
 
     /*
     ** Assume error checking is done properly in glXMakeCurrent before
     ** calling driUnbindContext.
     */
 
-    if (ctx == NULL || draw == None || read == None) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-
-    pDRIScreen = (*dri_interface->getScreen)(dpy, scrn);
-    if ( (pDRIScreen == NULL) || (pDRIScreen->private == NULL) ) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-
-    psp = (__DRIscreenPrivate *)pDRIScreen->private;
-    pcp = (__DRIcontextPrivate *)ctx->private;
-
-    pdraw = __driFindDrawable(psp->drawHash, draw);
-    if (!pdraw) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-    pdp = (__DRIdrawablePrivate *)pdraw->private;
-
-    pread = __driFindDrawable(psp->drawHash, read);
-    if (!pread) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-    prp = (__DRIdrawablePrivate *)pread->private;
+    if (pcp == NULL)
+        return GL_FALSE;
 
+    psp = pcp->driScreenPriv;
+    pdp = pcp->driDrawablePriv;
+    prp = pcp->driReadablePriv;
 
     /* Let driver unbind drawable from context */
     (*psp->DriverAPI.UnbindContext)(pcp);
 
-
     if (pdp->refcount == 0) {
 	/* ERROR!!! */
 	return GL_FALSE;
@@ -259,12 +138,6 @@ static GLboolean driUnbindContext(__DRInativeDisplay *dpy, int scrn,
 	prp->refcount--;
     }
 
-   /* destroy the drawables if they no longer exist on the server */
-   if ((pdp->refcount == 0) || (prp->refcount == 0)) {
-      /* probably shouldn't need the collector here,
-         as we know the affected drawables (or could there be others?) */
-      __driGarbageCollectDrawables(pdp->driScreenPriv->drawHash);
-   }
 
     /* XXX this is disabled so that if we call SwapBuffers on an unbound
      * window we can determine the last context bound to the window and
@@ -279,77 +152,24 @@ static GLboolean driUnbindContext(__DRInativeDisplay *dpy, int scrn,
     return GL_TRUE;
 }
 
-
 /**
  * This function takes both a read buffer and a draw buffer.  This is needed
  * for \c glXMakeCurrentReadSGI or GLX 1.3's \c glXMakeContextCurrent
  * function.
- * 
- * \bug This function calls \c driCreateNewDrawable in two places with the
- *      \c renderType hard-coded to \c GLX_WINDOW_BIT.  Some checking might
- *      be needed in those places when support for pbuffers and / or pixmaps
- *      is added.  Is it safe to assume that the drawable is a window?
  */
-static GLboolean DoBindContext(__DRInativeDisplay *dpy,
-			  __DRIid draw, __DRIid read,
-			  __DRIcontext *ctx, const __GLcontextModes * modes,
-			  __DRIscreenPrivate *psp)
+static int driBindContext(__DRIcontext *pcp,
+			  __DRIdrawable *pdp,
+			  __DRIdrawable *prp)
 {
-    __DRIdrawable *pdraw;
-    __DRIdrawablePrivate *pdp;
-    __DRIdrawable *pread;
-    __DRIdrawablePrivate *prp;
-    __DRIcontextPrivate * const pcp = ctx->private;
-
-
-    /* Find the _DRIdrawable which corresponds to the writing drawable. */
-    pdraw = __driFindDrawable(psp->drawHash, draw);
-    if (!pdraw) {
-	/* Allocate a new drawable */
-	pdraw = (__DRIdrawable *)_mesa_malloc(sizeof(__DRIdrawable));
-	if (!pdraw) {
-	    /* ERROR!!! */
-	    return GL_FALSE;
-	}
-
-	/* Create a new drawable */
-	driCreateNewDrawable(dpy, modes, draw, pdraw, GLX_WINDOW_BIT,
-			     empty_attribute_list);
-	if (!pdraw->private) {
-	    /* ERROR!!! */
-	    _mesa_free(pdraw);
-	    return GL_FALSE;
-	}
+    __DRIscreenPrivate *psp = pcp->driScreenPriv;
 
-    }
-    pdp = (__DRIdrawablePrivate *) pdraw->private;
+    /*
+    ** Assume error checking is done properly in glXMakeCurrent before
+    ** calling driBindContext.
+    */
 
-    /* Find the _DRIdrawable which corresponds to the reading drawable. */
-    if (read == draw) {
-        /* read buffer == draw buffer */
-        prp = pdp;
-    }
-    else {
-        pread = __driFindDrawable(psp->drawHash, read);
-        if (!pread) {
-            /* Allocate a new drawable */
-            pread = (__DRIdrawable *)_mesa_malloc(sizeof(__DRIdrawable));
-            if (!pread) {
-                /* ERROR!!! */
-                return GL_FALSE;
-            }
-
-            /* Create a new drawable */
-	    driCreateNewDrawable(dpy, modes, read, pread, GLX_WINDOW_BIT,
-				 empty_attribute_list);
-            if (!pread->private) {
-                /* ERROR!!! */
-                _mesa_free(pread);
-                return GL_FALSE;
-            }
-        }
-        prp = (__DRIdrawablePrivate *) pread->private;
-    }
+    if (pcp == NULL || pdp == None || prp == None)
+	return GL_FALSE;
 
     /* Bind the drawable to the context */
     pcp->driDrawablePriv = pdp;
@@ -364,16 +184,19 @@ static GLboolean DoBindContext(__DRInativeDisplay *dpy,
     ** Now that we have a context associated with this drawable, we can
     ** initialize the drawable information if has not been done before.
     */
-    if (!pdp->pStamp || *pdp->pStamp != pdp->lastStamp) {
-	DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
-	__driUtilUpdateDrawableInfo(pdp);
-	DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
-    }
 
-    if ((pdp != prp) && (!prp->pStamp || *prp->pStamp != prp->lastStamp)) {
-	DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
-	__driUtilUpdateDrawableInfo(prp);
-	DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
+    if (!psp->dri2.enabled) {
+	if (!pdp->pStamp || *pdp->pStamp != pdp->lastStamp) {
+	    DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
+	    __driUtilUpdateDrawableInfo(pdp);
+	    DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
+	}
+	
+	if ((pdp != prp) && (!prp->pStamp || *prp->pStamp != prp->lastStamp)) {
+	    DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
+	    __driUtilUpdateDrawableInfo(prp);
+	    DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
+	}
     }
 
     /* Call device-specific MakeCurrent */
@@ -382,37 +205,6 @@ static GLboolean DoBindContext(__DRInativeDisplay *dpy,
     return GL_TRUE;
 }
 
-
-/**
- * This function takes both a read buffer and a draw buffer.  This is needed
- * for \c glXMakeCurrentReadSGI or GLX 1.3's \c glXMakeContextCurrent
- * function.
- */
-static GLboolean driBindContext(__DRInativeDisplay *dpy, int scrn,
-                            __DRIid draw, __DRIid read,
-                            __DRIcontext * ctx)
-{
-    __DRIscreen *pDRIScreen;
-
-    /*
-    ** Assume error checking is done properly in glXMakeCurrent before
-    ** calling driBindContext.
-    */
-
-    if (ctx == NULL || draw == None || read == None) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-
-    pDRIScreen = (*dri_interface->getScreen)(dpy, scrn);
-    if ( (pDRIScreen == NULL) || (pDRIScreen->private == NULL) ) {
-	/* ERROR!!! */
-	return GL_FALSE;
-    }
-
-    return DoBindContext( dpy, draw, read, ctx, ctx->mode,
-			  (__DRIscreenPrivate *)pDRIScreen->private );
-}
 /*@}*/
 
 
@@ -436,7 +228,7 @@ static GLboolean driBindContext(__DRInativeDisplay *dpy, int scrn,
 void
 __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
 {
-    __DRIscreenPrivate *psp;
+    __DRIscreenPrivate *psp = pdp->driScreenPriv;
     __DRIcontextPrivate *pcp = pdp->driContextPriv;
     
     if (!pcp 
@@ -447,15 +239,6 @@ __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
 	 */
     }
 
-    psp = pdp->driScreenPriv;
-    if (!psp) {
-	/* ERROR!!! */
-       _mesa_problem(NULL, "Warning! Possible infinite loop due to bug "
-		     "in file %s, line %d\n",
-		     __FILE__, __LINE__);
-	return;
-    }
-
     if (pdp->pClipRects) {
 	_mesa_free(pdp->pClipRects); 
 	pdp->pClipRects = NULL;
@@ -468,15 +251,15 @@ __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
 
     DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
 
-    if (!__driFindDrawable(psp->drawHash, pdp->draw) ||
-	! (*dri_interface->getDrawableInfo)(pdp->display, pdp->screen, pdp->draw,
+    if (! (*psp->getDrawableInfo->getDrawableInfo)(pdp,
 			  &pdp->index, &pdp->lastStamp,
 			  &pdp->x, &pdp->y, &pdp->w, &pdp->h,
 			  &pdp->numClipRects, &pdp->pClipRects,
 			  &pdp->backX,
 			  &pdp->backY,
 			  &pdp->numBackClipRects,
-			  &pdp->pBackClipRects )) {
+			  &pdp->pBackClipRects,
+			  pdp->loaderPrivate)) {
 	/* Error -- eg the window may have been destroyed.  Keep going
 	 * with no cliprects.
 	 */
@@ -490,7 +273,6 @@ __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
        pdp->pStamp = &(psp->pSAREA->drawableTable[pdp->index].stamp);
 
     DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID);
-
 }
 
 /*@}*/
@@ -500,10 +282,28 @@ __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
 /*****************************************************************/
 /*@{*/
 
+static void driReportDamage(__DRIdrawable *pdp,
+			    struct drm_clip_rect *pClipRects, int numClipRects)
+{
+    __DRIscreen *psp = pdp->driScreenPriv;
+
+    /* Check that we actually have the new damage report method */
+    if (psp->damage) {
+	/* Report the damage.  Currently, all our drivers draw
+	 * directly to the front buffer, so we report the damage there
+	 * rather than to the backing storein (if any).
+	 */
+	(*psp->damage->reportDamage)(pdp,
+				     pdp->x, pdp->y,
+				     pClipRects, numClipRects,
+				     GL_TRUE, pdp->loaderPrivate);
+    }
+}
+
+
 /**
  * Swap buffers.
  *
- * \param dpy the display handle.
  * \param drawablePrivate opaque pointer to the per-drawable private info.
  * 
  * \internal
@@ -511,78 +311,29 @@ __driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp)
  * 
  * Is called directly from glXSwapBuffers().
  */
-static void driSwapBuffers( __DRInativeDisplay *dpy, void *drawablePrivate )
+static void driSwapBuffers(__DRIdrawable *dPriv)
 {
-    __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePrivate;
-    drm_clip_rect_t rect;
+    __DRIscreen *psp = dPriv->driScreenPriv;
 
-    dPriv->swapBuffers(dPriv);
-
-    /* Check that we actually have the new damage report method */
-    if (api_ver < 20070105 || dri_interface->reportDamage == NULL)
-	return;
-
-    /* Assume it's affecting the whole drawable for now */
-    rect.x1 = 0;
-    rect.y1 = 0;
-    rect.x2 = rect.x1 + dPriv->w;
-    rect.y2 = rect.y1 + dPriv->h;
-
-    /* Report the damage.  Currently, all our drivers draw directly to the
-     * front buffer, so we report the damage there rather than to the backing
-     * store (if any).
-     */
-    (*dri_interface->reportDamage)(dpy, dPriv->screen, dPriv->draw,
-				   dPriv->x, dPriv->y,
-				   &rect, 1, GL_TRUE);
-}
-
-/**
- * Called directly from a number of higher-level GLX functions.
- */
-static int driGetMSC( void *screenPrivate, int64_t *msc )
-{
-    __DRIscreenPrivate *sPriv = (__DRIscreenPrivate *) screenPrivate;
+    psp->DriverAPI.SwapBuffers(dPriv);
 
-    return sPriv->DriverAPI.GetMSC( sPriv, msc );
+    driReportDamage(dPriv, dPriv->pClipRects, dPriv->numClipRects);
 }
 
-/**
- * Called directly from a number of higher-level GLX functions.
- */
-static int driGetSBC( __DRInativeDisplay *dpy, void *drawablePrivate, int64_t *sbc )
+static int driDrawableGetMSC( __DRIscreen *sPriv, __DRIdrawable *dPriv,
+			      int64_t *msc )
 {
-   __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePrivate;
-   __DRIswapInfo  sInfo;
-   int  status;
-
-
-   status = dPriv->driScreenPriv->DriverAPI.GetSwapInfo( dPriv, & sInfo );
-   *sbc = sInfo.swap_count;
-
-   return status;
+    return sPriv->DriverAPI.GetDrawableMSC(sPriv, dPriv, msc);
 }
 
-static int driWaitForSBC( __DRInativeDisplay * dpy, void *drawablePriv,
-			  int64_t target_sbc,
-			  int64_t * msc, int64_t * sbc )
-{
-    __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePriv;
-
-    return dPriv->driScreenPriv->DriverAPI.WaitForSBC( dPriv, target_sbc,
-                                                       msc, sbc );
-}
 
-static int driWaitForMSC( __DRInativeDisplay * dpy, void *drawablePriv,
-			  int64_t target_msc,
-			  int64_t divisor, int64_t remainder,
-			  int64_t * msc, int64_t * sbc )
+static int driWaitForMSC(__DRIdrawable *dPriv, int64_t target_msc,
+			 int64_t divisor, int64_t remainder,
+			 int64_t * msc, int64_t * sbc)
 {
-    __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePriv;
     __DRIswapInfo  sInfo;
     int  status;
 
-
     status = dPriv->driScreenPriv->DriverAPI.WaitForMSC( dPriv, target_msc,
                                                          divisor, remainder,
                                                          msc );
@@ -600,63 +351,72 @@ static int driWaitForMSC( __DRInativeDisplay * dpy, void *drawablePriv,
     return status;
 }
 
-static int64_t driSwapBuffersMSC( __DRInativeDisplay * dpy, void *drawablePriv,
-				  int64_t target_msc,
-				  int64_t divisor, int64_t remainder )
-{
-    __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePriv;
 
-    return dPriv->driScreenPriv->DriverAPI.SwapBuffersMSC( dPriv, target_msc,
-                                                           divisor, 
-                                                           remainder );
-}
+const __DRImediaStreamCounterExtension driMediaStreamCounterExtension = {
+    { __DRI_MEDIA_STREAM_COUNTER, __DRI_MEDIA_STREAM_COUNTER_VERSION },
+    driWaitForMSC,
+    driDrawableGetMSC,
+};
+
 
-static void driCopySubBuffer( __DRInativeDisplay *dpy, void *drawablePrivate,
+static void driCopySubBuffer(__DRIdrawable *dPriv,
 			      int x, int y, int w, int h)
 {
-    __DRIdrawablePrivate *dPriv = (__DRIdrawablePrivate *) drawablePrivate;
+    drm_clip_rect_t rect;
+
+    rect.x1 = x;
+    rect.y1 = dPriv->h - y - h;
+    rect.x2 = x + w;
+    rect.y2 = rect.y1 + h;
+    driReportDamage(dPriv, &rect, 1);
+
     dPriv->driScreenPriv->DriverAPI.CopySubBuffer(dPriv, x, y, w, h);
-    (void) dpy;
 }
 
+const __DRIcopySubBufferExtension driCopySubBufferExtension = {
+    { __DRI_COPY_SUB_BUFFER, __DRI_COPY_SUB_BUFFER_VERSION },
+    driCopySubBuffer
+};
+
+static void driSetSwapInterval(__DRIdrawable *dPriv, unsigned int interval)
+{
+    dPriv->swap_interval = interval;
+}
+
+static unsigned int driGetSwapInterval(__DRIdrawable *dPriv)
+{
+    return dPriv->swap_interval;
+}
+
+const __DRIswapControlExtension driSwapControlExtension = {
+    { __DRI_SWAP_CONTROL, __DRI_SWAP_CONTROL_VERSION },
+    driSetSwapInterval,
+    driGetSwapInterval
+};
+
+
 /**
  * This is called via __DRIscreenRec's createNewDrawable pointer.
  */
-static void *driCreateNewDrawable(__DRInativeDisplay *dpy,
-				  const __GLcontextModes *modes,
-				  __DRIid draw,
-				  __DRIdrawable *pdraw,
-				  int renderType,
-				  const int *attrs)
+static __DRIdrawable *
+driCreateNewDrawable(__DRIscreen *psp, const __DRIconfig *config,
+		     drm_drawable_t hwDrawable, int renderType,
+		     const int *attrs, void *data)
 {
-    __DRIscreen * const pDRIScreen = (*dri_interface->getScreen)(dpy, modes->screen);
-    __DRIscreenPrivate *psp;
-    __DRIdrawablePrivate *pdp;
-
-
-    pdraw->private = NULL;
+    __DRIdrawable *pdp;
 
     /* Since pbuffers are not yet supported, no drawable attributes are
      * supported either.
      */
     (void) attrs;
 
-    if ( (pDRIScreen == NULL) || (pDRIScreen->private == NULL) ) {
-	return NULL;
-    }
-
-    pdp = (__DRIdrawablePrivate *)_mesa_malloc(sizeof(__DRIdrawablePrivate));
+    pdp = _mesa_malloc(sizeof *pdp);
     if (!pdp) {
 	return NULL;
     }
 
-    if (!(*dri_interface->createDrawable)(dpy, modes->screen, draw, &pdp->hHWDrawable)) {
-	_mesa_free(pdp);
-	return NULL;
-    }
-
-    pdp->draw = draw;
-    pdp->pdraw = pdraw;
+    pdp->loaderPrivate = data;
+    pdp->hHWDrawable = hwDrawable;
     pdp->refcount = 0;
     pdp->pStamp = NULL;
     pdp->lastStamp = 0;
@@ -669,80 +429,56 @@ static void *driCreateNewDrawable(__DRInativeDisplay *dpy,
     pdp->numBackClipRects = 0;
     pdp->pClipRects = NULL;
     pdp->pBackClipRects = NULL;
-    pdp->display = dpy;
-    pdp->screen = modes->screen;
+    pdp->vblSeq = 0;
+    pdp->vblFlags = 0;
 
-    psp = (__DRIscreenPrivate *)pDRIScreen->private;
     pdp->driScreenPriv = psp;
     pdp->driContextPriv = &psp->dummyContextPriv;
 
-    if (!(*psp->DriverAPI.CreateBuffer)(psp, pdp, modes,
+    if (!(*psp->DriverAPI.CreateBuffer)(psp, pdp, &config->modes,
 					renderType == GLX_PIXMAP_BIT)) {
-       (void)(*dri_interface->destroyDrawable)(dpy, modes->screen, pdp->draw);
        _mesa_free(pdp);
        return NULL;
     }
 
-    pdraw->private = pdp;
-    pdraw->destroyDrawable = driDestroyDrawable;
-    pdraw->swapBuffers = driSwapBuffers;  /* called by glXSwapBuffers() */
-
-    pdraw->getSBC = driGetSBC;
-    pdraw->waitForSBC = driWaitForSBC;
-    pdraw->waitForMSC = driWaitForMSC;
-    pdraw->swapBuffersMSC = driSwapBuffersMSC;
-    pdraw->frameTracking = NULL;
-    pdraw->queryFrameTracking = driQueryFrameTracking;
-
-    if (driCompareGLXAPIVersion (20060314) >= 0)
-	pdraw->copySubBuffer = driCopySubBuffer;
+    pdp->msc_base = 0;
 
     /* This special default value is replaced with the configured
      * default value when the drawable is first bound to a direct
      * rendering context. 
      */
-    pdraw->swap_interval = (unsigned)-1;
-
-    pdp->swapBuffers = psp->DriverAPI.SwapBuffers;
+    pdp->swap_interval = (unsigned)-1;
 
-    /* Add pdraw to drawable list */
-    if (!__driAddDrawable(psp->drawHash, pdraw)) {
-	/* ERROR!!! */
-	(*pdraw->destroyDrawable)(dpy, pdp);
-	_mesa_free(pdp);
-	pdp = NULL;
-	pdraw->private = NULL;
-    }
-
-   return (void *) pdp;
+    return pdp;
 }
 
+
 static __DRIdrawable *
-driGetDrawable(__DRInativeDisplay *dpy, __DRIid draw, void *screenPrivate)
+dri2CreateNewDrawable(__DRIscreen *screen,
+		      const __DRIconfig *config,
+		      void *loaderPrivate)
 {
-    __DRIscreenPrivate *psp = (__DRIscreenPrivate *) screenPrivate;
+    __DRIdrawable *pdraw;
 
-    /*
-    ** Make sure this routine returns NULL if the drawable is not bound
-    ** to a direct rendering context!
-    */
-    return __driFindDrawable(psp->drawHash, draw);
+    pdraw = driCreateNewDrawable(screen, config, 0, 0, NULL, loaderPrivate);
+    if (!pdraw)
+    	return NULL;
+
+    pdraw->pClipRects = _mesa_malloc(sizeof *pdraw->pBackClipRects);
+    pdraw->pBackClipRects = _mesa_malloc(sizeof *pdraw->pBackClipRects);
+
+    return pdraw;
 }
 
+
 static void
-driDestroyDrawable(__DRInativeDisplay *dpy, void *drawablePrivate)
+driDestroyDrawable(__DRIdrawable *pdp)
 {
-    __DRIdrawablePrivate *pdp = (__DRIdrawablePrivate *) drawablePrivate;
     __DRIscreenPrivate *psp;
-    int scrn;
 
     if (pdp) {
 	psp = pdp->driScreenPriv;
-	scrn = psp->myNum;
         (*psp->DriverAPI.DestroyBuffer)(pdp);
-	if ((*dri_interface->windowExists)(dpy, pdp->draw))
-	    (void)(*dri_interface->destroyDrawable)(dpy, scrn, pdp->draw);
-	drmHashDelete(psp->drawHash, pdp->draw);
 	if (pdp->pClipRects) {
 	    _mesa_free(pdp->pClipRects);
 	    pdp->pClipRects = NULL;
@@ -766,23 +502,15 @@ driDestroyDrawable(__DRInativeDisplay *dpy, void *drawablePrivate)
 /**
  * Destroy the per-context private information.
  * 
- * \param dpy the display handle.
- * \param scrn the screen number.
- * \param contextPrivate opaque pointer to the per-drawable private info.
- *
  * \internal
  * This function calls __DriverAPIRec::DestroyContext on \p contextPrivate, calls
  * drmDestroyContext(), and finally frees \p contextPrivate.
  */
 static void
-driDestroyContext(__DRInativeDisplay *dpy, int scrn, void *contextPrivate)
+driDestroyContext(__DRIcontext *pcp)
 {
-    __DRIcontextPrivate  *pcp   = (__DRIcontextPrivate *) contextPrivate;
-
     if (pcp) {
 	(*pcp->driScreenPriv->DriverAPI.DestroyContext)(pcp);
-	__driGarbageCollectDrawables(pcp->driScreenPriv->drawHash);
-	(void) (*dri_interface->destroyContext)(dpy, scrn, pcp->contextID);
 	_mesa_free(pcp);
     }
 }
@@ -791,13 +519,9 @@ driDestroyContext(__DRInativeDisplay *dpy, int scrn, void *contextPrivate)
 /**
  * Create the per-drawable private driver information.
  * 
- * \param dpy           The display handle.
- * \param modes         Mode used to create the new context.
  * \param render_type   Type of rendering target.  \c GLX_RGBA is the only
  *                      type likely to ever be supported for direct-rendering.
- * \param sharedPrivate The shared context dependent methods or \c NULL if
- *                      non-existent.
- * \param pctx          DRI context to receive the context dependent methods.
+ * \param shared        Context with which to share textures, etc. or NULL
  *
  * \returns An opaque pointer to the per-context private information on
  *          success, or \c NULL on failure.
@@ -809,36 +533,18 @@ driDestroyContext(__DRInativeDisplay *dpy, int scrn, void *contextPrivate)
  * context.
  *
  */
-static void *
-driCreateNewContext(__DRInativeDisplay *dpy, const __GLcontextModes *modes,
-		    int render_type, void *sharedPrivate, __DRIcontext *pctx)
+static __DRIcontext *
+driCreateNewContext(__DRIscreen *psp, const __DRIconfig *config,
+		    int render_type, __DRIcontext *shared, 
+		    drm_context_t hwContext, void *data)
 {
-    __DRIscreen *pDRIScreen;
-    __DRIcontextPrivate *pcp;
-    __DRIcontextPrivate *pshare = (__DRIcontextPrivate *) sharedPrivate;
-    __DRIscreenPrivate *psp;
-    void * const shareCtx = (pshare != NULL) ? pshare->driverPrivate : NULL;
-
-    pDRIScreen = (*dri_interface->getScreen)(dpy, modes->screen);
-    if ( (pDRIScreen == NULL) || (pDRIScreen->private == NULL) ) {
-	/* ERROR!!! */
-	return NULL;
-    } 
-
-    psp = (__DRIscreenPrivate *)pDRIScreen->private;
-
-    pcp = (__DRIcontextPrivate *)_mesa_malloc(sizeof(__DRIcontextPrivate));
-    if (!pcp) {
-	return NULL;
-    }
+    __DRIcontext *pcp;
+    void * const shareCtx = (shared != NULL) ? shared->driverPrivate : NULL;
 
-    if (! (*dri_interface->createContext)(dpy, modes->screen, modes->fbconfigID,
-					&pcp->contextID, &pcp->hHWContext)) {
-	_mesa_free(pcp);
+    pcp = _mesa_malloc(sizeof *pcp);
+    if (!pcp)
 	return NULL;
-    }
 
-    pcp->display = dpy;
     pcp->driScreenPriv = psp;
     pcp->driDrawablePriv = NULL;
 
@@ -846,8 +552,7 @@ driCreateNewContext(__DRInativeDisplay *dpy, const __GLcontextModes *modes,
      * context.
      */
 
-    if (!psp->dummyContextPriv.driScreenPriv) {
-        psp->dummyContextPriv.contextID = 0;
+    if (!psp->dri2.enabled && !psp->dummyContextPriv.driScreenPriv) {
         psp->dummyContextPriv.hHWContext = psp->pSAREA->dummy_context;
         psp->dummyContextPriv.driScreenPriv = psp;
         psp->dummyContextPriv.driDrawablePriv = NULL;
@@ -855,21 +560,31 @@ driCreateNewContext(__DRInativeDisplay *dpy, const __GLcontextModes *modes,
 	/* No other fields should be used! */
     }
 
-    pctx->destroyContext = driDestroyContext;
-    pctx->bindContext    = driBindContext;
-    pctx->unbindContext  = driUnbindContext;
+    pcp->hHWContext = hwContext;
 
-    if ( !(*psp->DriverAPI.CreateContext)(modes, pcp, shareCtx) ) {
-        (void) (*dri_interface->destroyContext)(dpy, modes->screen,
-						pcp->contextID);
+    if ( !(*psp->DriverAPI.CreateContext)(&config->modes, pcp, shareCtx) ) {
         _mesa_free(pcp);
         return NULL;
     }
 
-    __driGarbageCollectDrawables(pcp->driScreenPriv->drawHash);
-
     return pcp;
 }
+
+
+static __DRIcontext *
+dri2CreateNewContext(__DRIscreen *screen, const __DRIconfig *config,
+		      __DRIcontext *shared, void *data)
+{
+    return driCreateNewContext(screen, config, 0, shared, 0, data);
+}
+
+
+static int
+driCopyContext(__DRIcontext *dest, __DRIcontext *src, unsigned long mask)
+{
+    return GL_FALSE;
+}
+
 /*@}*/
 
 
@@ -881,18 +596,12 @@ driCreateNewContext(__DRInativeDisplay *dpy, const __GLcontextModes *modes,
 /**
  * Destroy the per-screen private information.
  * 
- * \param dpy the display handle.
- * \param scrn the screen number.
- * \param screenPrivate opaque pointer to the per-screen private information.
- *
  * \internal
  * This function calls __DriverAPIRec::DestroyScreen on \p screenPrivate, calls
  * drmClose(), and finally frees \p screenPrivate.
  */
-static void driDestroyScreen(__DRInativeDisplay *dpy, int scrn, void *screenPrivate)
+static void driDestroyScreen(__DRIscreen *psp)
 {
-    __DRIscreenPrivate *psp = (__DRIscreenPrivate *) screenPrivate;
-
     if (psp) {
 	/* No interaction with the X-server is possible at this point.  This
 	 * routine is called after XCloseDisplay, so there is no protocol
@@ -902,34 +611,44 @@ static void driDestroyScreen(__DRInativeDisplay *dpy, int scrn, void *screenPriv
 	if (psp->DriverAPI.DestroyScreen)
 	    (*psp->DriverAPI.DestroyScreen)(psp);
 
-	(void)drmUnmap((drmAddress)psp->pSAREA, SAREA_MAX);
-	(void)drmUnmap((drmAddress)psp->pFB, psp->fbSize);
-	_mesa_free(psp->pDevPriv);
-	(void)drmCloseOnce(psp->fd);
-	if ( psp->modes != NULL ) {
-	    (*dri_interface->destroyContextModes)( psp->modes );
+	if (!psp->dri2.enabled) {
+	   (void)drmUnmap((drmAddress)psp->pSAREA, SAREA_MAX);
+	   (void)drmUnmap((drmAddress)psp->pFB, psp->fbSize);
+	   (void)drmCloseOnce(psp->fd);
 	}
 
-	assert(psp->drawHash);
-	drmHashDestroy(psp->drawHash);
-
 	_mesa_free(psp);
     }
 }
 
+static void
+setupLoaderExtensions(__DRIscreen *psp,
+		      const __DRIextension **extensions)
+{
+    int i;
+
+    for (i = 0; extensions[i]; i++) {
+	if (strcmp(extensions[i]->name, __DRI_GET_DRAWABLE_INFO) == 0)
+	    psp->getDrawableInfo = (__DRIgetDrawableInfoExtension *) extensions[i];
+	if (strcmp(extensions[i]->name, __DRI_DAMAGE) == 0)
+	    psp->damage = (__DRIdamageExtension *) extensions[i];
+	if (strcmp(extensions[i]->name, __DRI_SYSTEM_TIME) == 0)
+	    psp->systemTime = (__DRIsystemTimeExtension *) extensions[i];
+	if (strcmp(extensions[i]->name, __DRI_DRI2_LOADER) == 0)
+	    psp->dri2.loader = (__DRIdri2LoaderExtension *) extensions[i];
+    }
+}
 
 /**
- * Utility function used to create a new driver-private screen structure.
+ * This is the bootstrap function for the driver.  libGL supplies all of the
+ * requisite information about the system, and the driver initializes itself.
+ * This routine also fills in the linked list pointed to by \c driver_modes
+ * with the \c __GLcontextModes that the driver can support for windows or
+ * pbuffers.
+ *
+ * For legacy DRI.
  * 
- * \param dpy   Display pointer
  * \param scrn  Index of the screen
- * \param psc   DRI screen data (not driver private)
- * \param modes Linked list of known display modes.  This list is, at a
- *              minimum, a list of modes based on the current display mode.
- *              These roughly match the set of available X11 visuals, but it
- *              need not be limited to X11!  The calling libGL should create
- *              a list that will inform the driver of the current display
- *              mode (i.e., color buffer depth, depth buffer depth, etc.).
  * \param ddx_version Version of the 2D DDX.  This may not be meaningful for
  *                    all drivers.
  * \param dri_version Version of the "server-side" DRI.
@@ -938,48 +657,33 @@ static void driDestroyScreen(__DRInativeDisplay *dpy, int scrn, void *screenPriv
  *                     framebuffer.
  * \param pSAREA       Pointer the the SAREA.
  * \param fd           Device handle for the DRM.
- * \param internal_api_version  Version of the internal interface between the
- *                              driver and libGL.
- * \param driverAPI Driver API functions used by other routines in dri_util.c.
+ * \param extensions   ??
+ * \param driver_modes  Returns modes suppoted by the driver
+ * \param loaderPrivate  ??
  * 
- * \note
- * There is no need to check the minimum API version in this function.  Since
- * the \c __driCreateNewScreen function is versioned, it is impossible for a
- * loader that is too old to even load this driver.
+ * \note There is no need to check the minimum API version in this
+ * function.  Since the name of this function is versioned, it is
+ * impossible for a loader that is too old to even load this driver.
  */
-__DRIscreenPrivate *
-__driUtilCreateNewScreen(__DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			 __GLcontextModes * modes,
-			 const __DRIversion * ddx_version,
-			 const __DRIversion * dri_version,
-			 const __DRIversion * drm_version,
-			 const __DRIframebuffer * frame_buffer,
-			 drm_sarea_t *pSAREA,
-			 int fd,
-			 int internal_api_version,
-			 const struct __DriverAPIRec *driverAPI)
+static __DRIscreen *
+driCreateNewScreen(int scrn,
+		   const __DRIversion *ddx_version,
+		   const __DRIversion *dri_version,
+		   const __DRIversion *drm_version,
+		   const __DRIframebuffer *frame_buffer,
+		   drmAddress pSAREA, int fd, 
+		   const __DRIextension **extensions,
+		   const __DRIconfig ***driver_modes,
+		   void *loaderPrivate)
 {
-    __DRIscreenPrivate *psp;
-
-
-    api_ver = internal_api_version;
-
-    psp = (__DRIscreenPrivate *)_mesa_calloc(sizeof(__DRIscreenPrivate));
-    if (!psp) {
-	return NULL;
-    }
+    static const __DRIextension *emptyExtensionList[] = { NULL };
+    __DRIscreen *psp;
 
-    /* Create the hash table */
-    psp->drawHash = drmHashCreate();
-    if ( psp->drawHash == NULL ) {
-	_mesa_free( psp );
+    psp = _mesa_calloc(sizeof *psp);
+    if (!psp)
 	return NULL;
-    }
 
-    psp->display = dpy;
-    psp->myNum = scrn;
-    psp->psc = psc;
-    psp->modes = modes;
+    setupLoaderExtensions(psp, extensions);
 
     /*
     ** NOT_DONE: This is used by the X server to detect when the client
@@ -988,20 +692,12 @@ __driUtilCreateNewScreen(__DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
     */
     psp->drawLockID = 1;
 
-    psp->drmMajor = drm_version->major;
-    psp->drmMinor = drm_version->minor;
-    psp->drmPatch = drm_version->patch;
-    psp->ddxMajor = ddx_version->major;
-    psp->ddxMinor = ddx_version->minor;
-    psp->ddxPatch = ddx_version->patch;
-    psp->driMajor = dri_version->major;
-    psp->driMinor = dri_version->minor;
-    psp->driPatch = dri_version->patch;
-
-    /* install driver's callback functions */
-    memcpy( &psp->DriverAPI, driverAPI, sizeof(struct __DriverAPIRec) );
+    psp->drm_version = *drm_version;
+    psp->ddx_version = *ddx_version;
+    psp->dri_version = *dri_version;
 
     psp->pSAREA = pSAREA;
+    psp->lock = (drmLock *) &psp->pSAREA->lock;
 
     psp->pFB = frame_buffer->base;
     psp->fbSize = frame_buffer->size;
@@ -1012,7 +708,10 @@ __driUtilCreateNewScreen(__DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
     psp->pDevPriv = frame_buffer->dev_priv;
     psp->fbBPP = psp->fbStride * 8 / frame_buffer->width;
 
+    psp->extensions = emptyExtensionList;
     psp->fd = fd;
+    psp->myNum = scrn;
+    psp->dri2.enabled = GL_FALSE;
 
     /*
     ** Do not init dummy context here; actual initialization will be
@@ -1021,63 +720,125 @@ __driUtilCreateNewScreen(__DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
     */
     psp->dummyContextPriv.driScreenPriv = NULL;
 
-    psc->destroyScreen     = driDestroyScreen;
-    psc->createNewDrawable = driCreateNewDrawable;
-    psc->getDrawable       = driGetDrawable;
-    psc->getMSC            = driGetMSC;
-    psc->createNewContext  = driCreateNewContext;
-
-    if (internal_api_version >= 20070121)
-	psc->setTexOffset  = psp->DriverAPI.setTexOffset;
+    psp->DriverAPI = driDriverAPI;
 
-    if ( (psp->DriverAPI.InitDriver != NULL)
-	 && !(*psp->DriverAPI.InitDriver)(psp) ) {
-	_mesa_free( psp );
+    *driver_modes = driDriverAPI.InitScreen(psp);
+    if (*driver_modes == NULL) {
+	_mesa_free(psp);
 	return NULL;
     }
 
-
     return psp;
 }
 
-
 /**
- * Compare the current GLX API version with a driver supplied required version.
- * 
- * The minimum required version is compared with the API version exported by
- * the \c __glXGetInternalVersion function (in libGL.so).
- * 
- * \param   required_version Minimum required internal GLX API version.
- * \return  A tri-value return, as from strcmp is returned.  A value less
- *          than, equal to, or greater than zero will be returned if the
- *          internal GLX API version is less than, equal to, or greater
- *          than \c required_version.
- *
- * \sa __glXGetInternalVersion().
+ * DRI2
  */
-int driCompareGLXAPIVersion( GLint required_version )
+static __DRIscreen *
+dri2CreateNewScreen(int scrn, int fd,
+		    const __DRIextension **extensions,
+		    const __DRIconfig ***driver_configs, void *data)
 {
-   if ( api_ver > required_version ) {
-      return 1;
-   }
-   else if ( api_ver == required_version ) {
-      return 0;
-   }
+    static const __DRIextension *emptyExtensionList[] = { NULL };
+    __DRIscreen *psp;
+    drmVersionPtr version;
+
+    if (driDriverAPI.InitScreen2 == NULL)
+        return NULL;
+
+    psp = _mesa_malloc(sizeof(*psp));
+    if (!psp)
+	return NULL;
+
+    setupLoaderExtensions(psp, extensions);
+
+    version = drmGetVersion(fd);
+    if (version) {
+	psp->drm_version.major = version->version_major;
+	psp->drm_version.minor = version->version_minor;
+	psp->drm_version.patch = version->version_patchlevel;
+	drmFreeVersion(version);
+    }
+
+    psp->extensions = emptyExtensionList;
+    psp->fd = fd;
+    psp->myNum = scrn;
+    psp->dri2.enabled = GL_TRUE;
 
-   return -1;
+    psp->DriverAPI = driDriverAPI;
+    *driver_configs = driDriverAPI.InitScreen2(psp);
+    if (*driver_configs == NULL) {
+	_mesa_free(psp);
+	return NULL;
+    }
+
+    psp->DriverAPI = driDriverAPI;
+
+    return psp;
 }
 
+static const __DRIextension **driGetExtensions(__DRIscreen *psp)
+{
+    return psp->extensions;
+}
+
+/** Core interface */
+const __DRIcoreExtension driCoreExtension = {
+    { __DRI_CORE, __DRI_CORE_VERSION },
+    NULL,
+    driDestroyScreen,
+    driGetExtensions,
+    driGetConfigAttrib,
+    driIndexConfigAttrib,
+    NULL,
+    driDestroyDrawable,
+    driSwapBuffers,
+    NULL,
+    driCopyContext,
+    driDestroyContext,
+    driBindContext,
+    driUnbindContext
+};
+
+/** Legacy DRI interface */
+const __DRIlegacyExtension driLegacyExtension = {
+    { __DRI_LEGACY, __DRI_LEGACY_VERSION },
+    driCreateNewScreen,
+    driCreateNewDrawable,
+    driCreateNewContext,
+};
+
+/** Legacy DRI interface */
+const __DRIdri2Extension driDRI2Extension = {
+    { __DRI_DRI2, __DRI_DRI2_VERSION },
+    dri2CreateNewScreen,
+    dri2CreateNewDrawable,
+    dri2CreateNewContext,
+};
+
+/* This is the table of extensions that the loader will dlsym() for. */
+PUBLIC const __DRIextension *__driDriverExtensions[] = {
+    &driCoreExtension.base,
+    &driLegacyExtension.base,
+    &driDRI2Extension.base,
+    NULL
+};
 
 static int
-driQueryFrameTracking( __DRInativeDisplay * dpy, void * priv,
-		       int64_t * sbc, int64_t * missedFrames,
-		       float * lastMissedUsage, float * usage )
+driFrameTracking(__DRIdrawable *drawable, GLboolean enable)
+{
+    return GLX_BAD_CONTEXT;
+}
+
+static int
+driQueryFrameTracking(__DRIdrawable *dpriv,
+		      int64_t * sbc, int64_t * missedFrames,
+		      float * lastMissedUsage, float * usage)
 {
    __DRIswapInfo   sInfo;
    int             status;
    int64_t         ust;
-   __DRIdrawablePrivate * dpriv = (__DRIdrawablePrivate *) priv;
-
+   __DRIscreenPrivate *psp = dpriv->driScreenPriv;
 
    status = dpriv->driScreenPriv->DriverAPI.GetSwapInfo( dpriv, & sInfo );
    if ( status == 0 ) {
@@ -1085,13 +846,18 @@ driQueryFrameTracking( __DRInativeDisplay * dpy, void * priv,
       *missedFrames = sInfo.swap_missed_count;
       *lastMissedUsage = sInfo.swap_missed_usage;
 
-      (*dri_interface->getUST)( & ust );
+      (*psp->systemTime->getUST)( & ust );
       *usage = driCalculateSwapUsage( dpriv, sInfo.swap_ust, ust );
    }
 
    return status;
 }
 
+const __DRIframeTrackingExtension driFrameTrackingExtension = {
+    { __DRI_FRAME_TRACKING, __DRI_FRAME_TRACKING_VERSION },
+    driFrameTracking,
+    driQueryFrameTracking    
+};
 
 /**
  * Calculate amount of swap interval used between GLX buffer swaps.
@@ -1129,11 +895,10 @@ driCalculateSwapUsage( __DRIdrawablePrivate *dPriv, int64_t last_swap_ust,
    int32_t   d;
    int       interval;
    float     usage = 1.0;
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
-
-   if ( (*dri_interface->getMSCRate)( dPriv->display, dPriv->draw, &n, &d ) ) {
-      interval = (dPriv->pdraw->swap_interval != 0)
-	  ? dPriv->pdraw->swap_interval : 1;
+   if ( (*psp->systemTime->getMSCRate)(dPriv, &n, &d, dPriv->loaderPrivate) ) {
+      interval = (dPriv->swap_interval != 0) ? dPriv->swap_interval : 1;
 
 
       /* We want to calculate
diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h
index c0cda5d25fc..0feb57b3c6e 100644
--- a/src/mesa/drivers/dri/common/dri_util.h
+++ b/src/mesa/drivers/dri/common/dri_util.h
@@ -48,21 +48,32 @@
 #define _DRI_UTIL_H_
 
 #include <GL/gl.h>
-#include "drm.h"
-#include "drm_sarea.h"
-#include "xf86drm.h"
+#include <drm.h>
+#include <drm_sarea.h>
+#include <xf86drm.h>
+#include "main/glheader.h"
 #include "GL/internal/glcore.h"
 #include "GL/internal/dri_interface.h"
 
 #define GLX_BAD_CONTEXT                    5
 
-typedef struct __DRIdisplayPrivateRec  __DRIdisplayPrivate;
-typedef struct __DRIscreenPrivateRec   __DRIscreenPrivate;
-typedef struct __DRIcontextPrivateRec  __DRIcontextPrivate;
-typedef struct __DRIdrawablePrivateRec __DRIdrawablePrivate;
 typedef struct __DRIswapInfoRec        __DRIswapInfo;
-typedef struct __DRIutilversionRec2    __DRIutilversion2;
 
+/* Typedefs to avoid rewriting the world. */
+typedef struct __DRIscreenRec	__DRIscreenPrivate;
+typedef struct __DRIdrawableRec	__DRIdrawablePrivate;
+typedef struct __DRIcontextRec	__DRIcontextPrivate;
+
+/**
+ * Extensions.
+ */
+extern const __DRIlegacyExtension driLegacyExtension;
+extern const __DRIcoreExtension driCoreExtension;
+extern const __DRIextension driReadDrawableExtension;
+extern const __DRIcopySubBufferExtension driCopySubBufferExtension;
+extern const __DRIswapControlExtension driSwapControlExtension;
+extern const __DRIframeTrackingExtension driFrameTrackingExtension;
+extern const __DRImediaStreamCounterExtension driMediaStreamCounterExtension;
 
 /**
  * Used by DRI_VALIDATE_DRAWABLE_INFO
@@ -78,7 +89,7 @@ typedef struct __DRIutilversionRec2    __DRIutilversion2;
 /**
  * Utility macro to validate the drawable information.
  *
- * See __DRIdrawablePrivate::pStamp and __DRIdrawablePrivate::lastStamp.
+ * See __DRIdrawable::pStamp and __DRIdrawable::lastStamp.
  */
 #define DRI_VALIDATE_DRAWABLE_INFO(psp, pdp)                            \
 do {                                                                    \
@@ -107,94 +118,95 @@ do {                                                                    \
  * this structure.
  */
 struct __DriverAPIRec {
-    /** 
-     * Driver initialization callback
-     */
-    GLboolean (*InitDriver)(__DRIscreenPrivate *driScrnPriv);
-    
+    const __DRIconfig **(*InitScreen) (__DRIscreen * priv);
+
     /**
      * Screen destruction callback
      */
-    void (*DestroyScreen)(__DRIscreenPrivate *driScrnPriv);
+    void (*DestroyScreen)(__DRIscreen *driScrnPriv);
 
     /**
      * Context creation callback
      */	    	    
     GLboolean (*CreateContext)(const __GLcontextModes *glVis,
-                               __DRIcontextPrivate *driContextPriv,
+                               __DRIcontext *driContextPriv,
                                void *sharedContextPrivate);
 
     /**
      * Context destruction callback
      */
-    void (*DestroyContext)(__DRIcontextPrivate *driContextPriv);
+    void (*DestroyContext)(__DRIcontext *driContextPriv);
 
     /**
      * Buffer (drawable) creation callback
      */
-    GLboolean (*CreateBuffer)(__DRIscreenPrivate *driScrnPriv,
-                              __DRIdrawablePrivate *driDrawPriv,
+    GLboolean (*CreateBuffer)(__DRIscreen *driScrnPriv,
+                              __DRIdrawable *driDrawPriv,
                               const __GLcontextModes *glVis,
                               GLboolean pixmapBuffer);
     
     /**
      * Buffer (drawable) destruction callback
      */
-    void (*DestroyBuffer)(__DRIdrawablePrivate *driDrawPriv);
+    void (*DestroyBuffer)(__DRIdrawable *driDrawPriv);
 
     /**
      * Buffer swapping callback 
      */
-    void (*SwapBuffers)(__DRIdrawablePrivate *driDrawPriv);
+    void (*SwapBuffers)(__DRIdrawable *driDrawPriv);
 
     /**
      * Context activation callback
      */
-    GLboolean (*MakeCurrent)(__DRIcontextPrivate *driContextPriv,
-                             __DRIdrawablePrivate *driDrawPriv,
-                             __DRIdrawablePrivate *driReadPriv);
+    GLboolean (*MakeCurrent)(__DRIcontext *driContextPriv,
+                             __DRIdrawable *driDrawPriv,
+                             __DRIdrawable *driReadPriv);
 
     /**
      * Context unbinding callback
      */
-    GLboolean (*UnbindContext)(__DRIcontextPrivate *driContextPriv);
+    GLboolean (*UnbindContext)(__DRIcontext *driContextPriv);
   
     /**
      * Retrieves statistics about buffer swap operations.  Required if
      * GLX_OML_sync_control or GLX_MESA_swap_frame_usage is supported.
      */
-    int (*GetSwapInfo)( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
-
+    int (*GetSwapInfo)( __DRIdrawable *dPriv, __DRIswapInfo * sInfo );
 
-    /**
-     * Required if GLX_SGI_video_sync or GLX_OML_sync_control is
-     * supported.
-     */
-    int (*GetMSC)( __DRIscreenPrivate * priv, int64_t * count );
 
     /**
      * These are required if GLX_OML_sync_control is supported.
      */
     /*@{*/
-    int (*WaitForMSC)( __DRIdrawablePrivate *priv, int64_t target_msc, 
+    int (*WaitForMSC)( __DRIdrawable *priv, int64_t target_msc, 
 		       int64_t divisor, int64_t remainder,
 		       int64_t * msc );
-    int (*WaitForSBC)( __DRIdrawablePrivate *priv, int64_t target_sbc,
+    int (*WaitForSBC)( __DRIdrawable *priv, int64_t target_sbc,
 		       int64_t * msc, int64_t * sbc );
 
-    int64_t (*SwapBuffersMSC)( __DRIdrawablePrivate *priv, int64_t target_msc,
+    int64_t (*SwapBuffersMSC)( __DRIdrawable *priv, int64_t target_msc,
 			       int64_t divisor, int64_t remainder );
     /*@}*/
-    void (*CopySubBuffer)(__DRIdrawablePrivate *driDrawPriv,
+    void (*CopySubBuffer)(__DRIdrawable *driDrawPriv,
 			  int x, int y, int w, int h);
 
     /**
-     * See corresponding field in \c __DRIscreenRec.
+     * New version of GetMSC so we can pass drawable data to the low
+     * level DRM driver (e.g. pipe info).  Required if
+     * GLX_SGI_video_sync or GLX_OML_sync_control is supported.
      */
-    void (*setTexOffset)(__DRIcontext *pDRICtx, GLint texname,
-			 unsigned long long offset, GLint depth, GLuint pitch);
+    int (*GetDrawableMSC) ( __DRIscreen * priv,
+			    __DRIdrawable *drawablePrivate,
+			    int64_t *count);
+
+
+
+    /* DRI2 Entry point */
+    const __DRIconfig **(*InitScreen2) (__DRIscreen * priv);
 };
 
+extern const struct __DriverAPIRec driDriverAPI;
+
 
 struct __DRIswapInfoRec {
     /** 
@@ -230,7 +242,7 @@ struct __DRIswapInfoRec {
 /**
  * Per-drawable private DRI driver information.
  */
-struct __DRIdrawablePrivateRec {
+struct __DRIdrawableRec {
     /**
      * Kernel drawable handle
      */
@@ -244,10 +256,10 @@ struct __DRIdrawablePrivateRec {
     void *driverPrivate;
 
     /**
-     * X's drawable ID associated with this private drawable.
+     * Private data from the loader.  We just hold on to it and pass
+     * it back when calling into loader provided functions.
      */
-    __DRIid draw;
-    __DRIdrawable *pdraw;
+    void *loaderPrivate;
 
     /**
      * Reference count for number of context's currently bound to this
@@ -272,7 +284,7 @@ struct __DRIdrawablePrivateRec {
     /**
      * Last value of the stamp.
      *
-     * If this differs from the value stored at __DRIdrawablePrivate::pStamp,
+     * If this differs from the value stored at __DRIdrawable::pStamp,
      * then the drawable information has been modified by the X server, and the
      * drawable information (below) should be retrieved from the X server.
      */
@@ -306,41 +318,52 @@ struct __DRIdrawablePrivateRec {
     /*@}*/
 
     /**
-     * Pointer to context to which this drawable is currently bound.
+     * \name Vertical blank tracking information
+     * Used for waiting on vertical blank events.
      */
-    __DRIcontextPrivate *driContextPriv;
+    /*@{*/
+    unsigned int vblSeq;
+    unsigned int vblFlags;
+    /*@}*/
 
     /**
-     * Pointer to screen on which this drawable was created.
+     * \name Monotonic MSC tracking
+     *
+     * Low level driver is responsible for updating msc_base and
+     * vblSeq values so that higher level code can calculate
+     * a new msc value or msc target for a WaitMSC call.  The new value
+     * will be:
+     *   msc = msc_base + get_vblank_count() - vblank_base;
+     *
+     * And for waiting on a value, core code will use:
+     *   actual_target = target_msc - msc_base + vblank_base;
      */
-    __DRIscreenPrivate *driScreenPriv;
+    /*@{*/
+    int64_t vblank_base;
+    int64_t msc_base;
+    /*@}*/
 
     /**
-     * \name Display and screen information.
-     * 
-     * Basically just need these for when the locking code needs to call
-     * \c __driUtilUpdateDrawableInfo.
+     * Pointer to context to which this drawable is currently bound.
      */
-    /*@{*/
-    __DRInativeDisplay *display;
-    int screen;
-    /*@}*/
+    __DRIcontext *driContextPriv;
 
     /**
-     * Called via glXSwapBuffers().
+     * Pointer to screen on which this drawable was created.
      */
-    void (*swapBuffers)( __DRIdrawablePrivate *dPriv );
+    __DRIscreen *driScreenPriv;
+
+    /**
+     * Controls swap interval as used by GLX_SGI_swap_control and
+     * GLX_MESA_swap_control.
+     */
+    unsigned int swap_interval;
 };
 
 /**
  * Per-context private driver information.
  */
-struct __DRIcontextPrivateRec {
-    /**
-     * Kernel context handle used to access the device lock.
-     */
-    __DRIid contextID;
-
+struct __DRIcontextRec {
     /**
      * Kernel context handle used to access the device lock.
      */
@@ -352,35 +375,30 @@ struct __DRIcontextPrivateRec {
     void *driverPrivate;
 
     /**
-     * This context's display pointer.
+     * Pointer back to the \c __DRIcontext that contains this structure.
      */
-    __DRInativeDisplay *display;
+    __DRIcontext *pctx;
 
     /**
      * Pointer to drawable currently bound to this context for drawing.
      */
-    __DRIdrawablePrivate *driDrawablePriv;
+    __DRIdrawable *driDrawablePriv;
 
     /**
      * Pointer to drawable currently bound to this context for reading.
      */
-    __DRIdrawablePrivate *driReadablePriv;
+    __DRIdrawable *driReadablePriv;
 
     /**
      * Pointer to screen on which this context was created.
      */
-    __DRIscreenPrivate *driScreenPriv;
+    __DRIscreen *driScreenPriv;
 };
 
 /**
  * Per-screen private driver information.
  */
-struct __DRIscreenPrivateRec {
-    /**
-     * Display for this screen
-     */
-    __DRInativeDisplay *display;
-
+struct __DRIscreenRec {
     /**
      * Current screen's number
      */
@@ -391,38 +409,21 @@ struct __DRIscreenPrivateRec {
      */
     struct __DriverAPIRec DriverAPI;
 
+    const __DRIextension **extensions;
     /**
-     * \name DDX version
      * DDX / 2D driver version information.
-     * \todo Replace these fields with a \c __DRIversionRec.
      */
-    /*@{*/
-    int ddxMajor;
-    int ddxMinor;
-    int ddxPatch;
-    /*@}*/
+    __DRIversion ddx_version;
 
     /**
-     * \name DRI version
      * DRI X extension version information.
-     * \todo Replace these fields with a \c __DRIversionRec.
      */
-    /*@{*/
-    int driMajor;
-    int driMinor;
-    int driPatch;
-    /*@}*/
+    __DRIversion dri_version;
 
     /**
-     * \name DRM version
      * DRM (kernel module) version information.
-     * \todo Replace these fields with a \c __DRIversionRec.
      */
-    /*@{*/
-    int drmMajor;
-    int drmMinor;
-    int drmPatch;
-    /*@}*/
+    __DRIversion drm_version;
 
     /**
      * ID used when the client sets the drawable lock.
@@ -485,12 +486,7 @@ struct __DRIscreenPrivateRec {
      * context is created when the first "real" context is created on this
      * screen.
      */
-    __DRIcontextPrivate dummyContextPriv;
-
-    /**
-     * Hash table to hold the drawable information for this screen.
-     */
-    void *drawHash;
+    __DRIcontext dummyContextPriv;
 
     /**
      * Device-dependent private information (not stored in the SAREA).
@@ -500,65 +496,38 @@ struct __DRIscreenPrivateRec {
     void *private;
 
     /**
-     * GLX visuals / FBConfigs for this screen.  These are stored as a
-     * linked list.
-     * 
-     * \note
-     * This field is \b only used in conjunction with the old interfaces.  If
-     * the new interfaces are used, this field will be set to \c NULL and will
-     * not be dereferenced.
-     */
-    __GLcontextModes *modes;
-
-    /**
      * Pointer back to the \c __DRIscreen that contains this structure.
      */
-
     __DRIscreen *psc;
-};
 
+    /* Extensions provided by the loader. */
+    const __DRIgetDrawableInfoExtension *getDrawableInfo;
+    const __DRIsystemTimeExtension *systemTime;
+    const __DRIdamageExtension *damage;
 
-/**
- * Used to store a version which includes a major range instead of a single
- * major version number.
- */
-struct __DRIutilversionRec2 {
-    int    major_min;    /** min allowed Major version number. */
-    int    major_max;    /** max allowed Major version number. */
-    int    minor;        /**< Minor version number. */
-    int    patch;        /**< Patch-level. */
-};
+    struct {
+	/* Flag to indicate that this is a DRI2 screen.  Many of the above
+	 * fields will not be valid or initializaed in that case. */
+	int enabled;
+	__DRIdri2LoaderExtension *loader;
+    } dri2;
 
+    /* The lock actually in use, old sarea or DRI2 */
+    drmLock *lock;
+};
 
 extern void
 __driUtilMessage(const char *f, ...);
 
 
 extern void
-__driUtilUpdateDrawableInfo(__DRIdrawablePrivate *pdp);
-
-
-extern __DRIscreenPrivate * __driUtilCreateNewScreen( __DRInativeDisplay *dpy,
-    int scrn, __DRIscreen *psc, __GLcontextModes * modes,
-    const __DRIversion * ddx_version, const __DRIversion * dri_version,
-    const __DRIversion * drm_version, const __DRIframebuffer * frame_buffer,
-    drm_sarea_t *pSAREA, int fd, int internal_api_version,
-    const struct __DriverAPIRec *driverAPI );
-
-/* Test the version of the internal GLX API.  Returns a value like strcmp. */
-extern int
-driCompareGLXAPIVersion( GLint required_version );
+__driUtilUpdateDrawableInfo(__DRIdrawable *pdp);
 
 extern float
-driCalculateSwapUsage( __DRIdrawablePrivate *dPriv,
+driCalculateSwapUsage( __DRIdrawable *dPriv,
 		       int64_t last_swap_ust, int64_t current_ust );
 
-/**
- * Pointer to the \c __DRIinterfaceMethods passed to the driver by the loader.
- * 
- * This pointer is set in the driver's \c __driCreateNewScreen function and
- * is defined in dri_util.c.
- */
-extern const __DRIinterfaceMethods * dri_interface;
+extern GLint
+driIntersectArea( drm_clip_rect_t rect1, drm_clip_rect_t rect2 );
 
 #endif /* _DRI_UTIL_H_ */
diff --git a/src/mesa/drivers/dri/common/drirenderbuffer.c b/src/mesa/drivers/dri/common/drirenderbuffer.c
index d34da53479e..15af99136cd 100644
--- a/src/mesa/drivers/dri/common/drirenderbuffer.c
+++ b/src/mesa/drivers/dri/common/drirenderbuffer.c
@@ -1,9 +1,9 @@
 
-#include "mtypes.h"
+#include "main/mtypes.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
+#include "main/imports.h"
 #include "drirenderbuffer.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
-#include "imports.h"
 
 
 /**
diff --git a/src/mesa/drivers/dri/common/drirenderbuffer.h b/src/mesa/drivers/dri/common/drirenderbuffer.h
index 747f92fcdbe..cf55286b30f 100644
--- a/src/mesa/drivers/dri/common/drirenderbuffer.h
+++ b/src/mesa/drivers/dri/common/drirenderbuffer.h
@@ -10,7 +10,7 @@
 #ifndef DRIRENDERBUFFER_H
 #define DRIRENDERBUFFER_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "dri_util.h"
 
 
diff --git a/src/mesa/drivers/dri/common/extension_helper.h b/src/mesa/drivers/dri/common/extension_helper.h
index 65e96657b8a..b977ebf0153 100644
--- a/src/mesa/drivers/dri/common/extension_helper.h
+++ b/src/mesa/drivers/dri/common/extension_helper.h
@@ -26,7 +26,7 @@
  */
 
 #include "utils.h"
-#include "dispatch.h"
+#include "glapi/dispatch.h"
 
 #ifndef NULL
 # define NULL 0
diff --git a/src/mesa/drivers/dri/common/memops.h b/src/mesa/drivers/dri/common/memops.h
index 4952d788e81..9cd1d8ec3fa 100644
--- a/src/mesa/drivers/dri/common/memops.h
+++ b/src/mesa/drivers/dri/common/memops.h
@@ -4,7 +4,7 @@
 * memset an area in I/O space
 * We need to be careful about this on some archs
 */
-static __inline__ void drimemsetio(void* address, int c, int size)
+static INLINE void drimemsetio(void* address, int c, int size)
 {
 #if defined(__powerpc__) || defined(__ia64__)
      int i;
diff --git a/src/mesa/drivers/dri/common/mmio.h b/src/mesa/drivers/dri/common/mmio.h
index 891056e1705..ce95d8c9075 100644
--- a/src/mesa/drivers/dri/common/mmio.h
+++ b/src/mesa/drivers/dri/common/mmio.h
@@ -33,11 +33,11 @@
 #ifndef MMIO_H
 #define MMIO_H
 
-#include "glheader.h"
+#include "main/glheader.h"
 
 #if defined( __powerpc__ )
 
-static __inline__ uint32_t
+static INLINE uint32_t
 read_MMIO_LE32( volatile void * base, unsigned long offset )
 {
    uint32_t val;
@@ -50,7 +50,7 @@ read_MMIO_LE32( volatile void * base, unsigned long offset )
 
 #else
 
-static __inline__ uint32_t
+static INLINE uint32_t
 read_MMIO_LE32( volatile void * base, unsigned long offset )
 {
    volatile uint32_t * p = (volatile uint32_t *) (((volatile char *) base) + offset);
diff --git a/src/mesa/drivers/dri/common/spantmp2.h b/src/mesa/drivers/dri/common/spantmp2.h
index 50f3cf55816..f2868cb58a6 100644
--- a/src/mesa/drivers/dri/common/spantmp2.h
+++ b/src/mesa/drivers/dri/common/spantmp2.h
@@ -33,7 +33,7 @@
  * \author Ian Romanick <idr@us.ibm.com>
  */
 
-#include "colormac.h"
+#include "main/colormac.h"
 #include "spantmp_common.h"
 
 #ifndef DBG
@@ -48,36 +48,34 @@
 #define HW_WRITE_CLIPLOOP()	HW_CLIPLOOP()
 #endif
 
-
 #if (SPANTMP_PIXEL_FMT == GL_RGB)  && (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_SHORT_5_6_5)
 
 /**
  ** GL_RGB, GL_UNSIGNED_SHORT_5_6_5
  **/
 
+#ifndef GET_VALUE
 #ifndef GET_PTR
 #define GET_PTR(_x, _y) (buf + (_x) * 2 + (_y) * pitch)
 #endif
 
+#define GET_VALUE(_x, _y) *(volatile GLushort *)(GET_PTR(_x, _y))
+#define PUT_VALUE(_x, _y, _v) *(volatile GLushort *)(GET_PTR(_x, _y)) = (_v)
+#endif /* GET_VALUE */
+
 #define INIT_MONO_PIXEL(p, color) \
   p = PACK_COLOR_565( color[0], color[1], color[2] )
 
 #define WRITE_RGBA( _x, _y, r, g, b, a )				\
-    do {                                                                \
-       GLshort * _p = (GLshort *) GET_PTR(_x, _y);                      \
-       _p[0] = ((((int)r & 0xf8) << 8) | (((int)g & 0xfc) << 3) |	\
-		   (((int)b & 0xf8) >> 3));                             \
-   } while(0)
+   PUT_VALUE(_x, _y, ((((int)r & 0xf8) << 8) |				\
+		      (((int)g & 0xfc) << 3) |				\
+		      (((int)b & 0xf8) >> 3)))				\
 
-#define WRITE_PIXEL( _x, _y, p )					\
-   do {                                                                 \
-      GLushort * _p = (GLushort *) GET_PTR(_x, _y);                     \
-      _p[0] = p;                                                        \
-   } while(0)
+#define WRITE_PIXEL( _x, _y, p ) PUT_VALUE(_x, _y, p)
 
 #define READ_RGBA( rgba, _x, _y )					\
    do {									\
-      GLushort p = *(volatile GLshort *) GET_PTR(_x, _y);               \
+      GLushort p = GET_VALUE(_x, _y);					\
       rgba[0] = ((p >> 8) & 0xf8) * 255 / 0xf8;				\
       rgba[1] = ((p >> 3) & 0xfc) * 255 / 0xfc;				\
       rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8;				\
@@ -90,31 +88,32 @@
  ** GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV
  **/
 
+#ifndef GET_VALUE
 #ifndef GET_PTR
 #define GET_PTR(_x, _y) (     buf + (_x) * 4 + (_y) * pitch)
 #endif
 
+#define GET_VALUE(_x, _y) *(volatile GLuint *)(GET_PTR(_x, _y))
+#define PUT_VALUE(_x, _y, _v) *(volatile GLuint *)(GET_PTR(_x, _y)) = (_v)
+#endif /* GET_VALUE */
+
 # define INIT_MONO_PIXEL(p, color)                       \
      p = PACK_COLOR_8888(color[3], color[0], color[1], color[2]) 
 
 # define WRITE_RGBA(_x, _y, r, g, b, a)                                 \
-    do {                                                                \
-       GLuint * _p = (GLuint *) GET_PTR(_x, _y);                        \
-       _p[0] = ((r << 16) | (g << 8) | (b << 0) | (a << 24));           \
-    } while(0)
+   PUT_VALUE(_x, _y, ((r << 16) |					\
+		      (g << 8) |					\
+		      (b << 0) |					\
+		      (a << 24)))
 
-#define WRITE_PIXEL(_x, _y, p)                                          \
-    do {                                                                \
-       GLuint * _p = (GLuint *) GET_PTR(_x, _y);                        \
-       _p[0] = p;                                                       \
-    } while(0)
+#define WRITE_PIXEL(_x, _y, p) PUT_VALUE(_x, _y, p)
 
 # if defined( USE_X86_ASM )
 #  define READ_RGBA(rgba, _x, _y)                                       \
     do {                                                                \
-        GLuint p = *(volatile GLuint *) GET_PTR(_x, _y);                \
+       GLuint p = GET_VALUE(_x, _y);					\
        __asm__ __volatile__( "bswap	%0; rorl $8, %0"                \
-				: "=r" (p) : "r" (p) );                 \
+				: "=r" (p) : "0" (p) );                 \
        ((GLuint *)rgba)[0] = p;                                         \
     } while (0)
 # elif defined( MESA_BIG_ENDIAN )
@@ -123,14 +122,14 @@
      */
 #  define READ_RGBA( rgba, _x, _y )				        \
      do {								\
-        GLuint p = *(volatile GLuint *) GET_PTR(_x, _y);                \
+        GLuint p = GET_VALUE(_x, _y);					\
         GLuint t = p;                                                   \
         *((uint32_t *) rgba) = (t >> 24) | (p << 8);                    \
      } while (0)
 # else
 #  define READ_RGBA( rgba, _x, _y )				        \
      do {								\
-        GLuint p = *(volatile GLuint *) GET_PTR(_x, _y);                \
+        GLuint p = GET_VALUE(_x, _y);					\
 	rgba[0] = (p >> 16) & 0xff;					\
 	rgba[1] = (p >>  8) & 0xff;					\
 	rgba[2] = (p >>  0) & 0xff;					\
@@ -389,7 +388,8 @@ static void TAG(ReadRGBASpan)( GLcontext *ctx,
 }
 
 
-#if defined(USE_MMX_ASM) && \
+#if defined(GET_PTR) && \
+   defined(USE_MMX_ASM) && \
    (((SPANTMP_PIXEL_FMT == GL_BGRA) && \
 	(SPANTMP_PIXEL_TYPE == GL_UNSIGNED_INT_8_8_8_8_REV)) || \
     ((SPANTMP_PIXEL_FMT == GL_RGB) && \
@@ -440,7 +440,8 @@ static void TAG2(ReadRGBASpan,_MMX)( GLcontext *ctx,
 #endif
 
 
-#if defined(USE_SSE_ASM) && \
+#if defined(GET_PTR) &&	\
+   defined(USE_SSE_ASM) && \
    (SPANTMP_PIXEL_FMT == GL_BGRA) && \
      (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_INT_8_8_8_8_REV)
 static void TAG2(ReadRGBASpan,_SSE2)( GLcontext *ctx,
@@ -474,7 +475,8 @@ static void TAG2(ReadRGBASpan,_SSE2)( GLcontext *ctx,
 }
 #endif
 
-#if defined(USE_SSE_ASM) && \
+#if defined(GET_PTR) &&	\
+   defined(USE_SSE_ASM) && \
    (SPANTMP_PIXEL_FMT == GL_BGRA) && \
      (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_INT_8_8_8_8_REV)
 static void TAG2(ReadRGBASpan,_SSE)( GLcontext *ctx,
@@ -567,6 +569,7 @@ static void TAG(InitPointers)(struct gl_renderbuffer *rb)
    rb->PutMonoValues = TAG(WriteMonoRGBAPixels);
    rb->GetValues = TAG(ReadRGBAPixels);
 
+#if defined(GET_PTR)
 #if defined(USE_SSE_ASM) && \
    (SPANTMP_PIXEL_FMT == GL_BGRA) && \
      (SPANTMP_PIXEL_TYPE == GL_UNSIGNED_INT_8_8_8_8_REV)
@@ -596,6 +599,7 @@ static void TAG(InitPointers)(struct gl_renderbuffer *rb)
    }
    else
 #endif
+#endif /* GET_PTR */
    {
       if (DBG) fprintf( stderr, "Using %s version of GetRow\n", "C" );
       rb->GetRow = TAG(ReadRGBASpan);
@@ -610,6 +614,8 @@ static void TAG(InitPointers)(struct gl_renderbuffer *rb)
 #undef READ_RGBA
 #undef TAG
 #undef TAG2
+#undef GET_VALUE
+#undef PUT_VALUE
 #undef GET_PTR
 #undef SPANTMP_PIXEL_FMT
 #undef SPANTMP_PIXEL_TYPE
diff --git a/src/mesa/drivers/dri/common/texmem.c b/src/mesa/drivers/dri/common/texmem.c
index a81cc2413d1..ff174a251d2 100644
--- a/src/mesa/drivers/dri/common/texmem.c
+++ b/src/mesa/drivers/dri/common/texmem.c
@@ -43,10 +43,10 @@
  */
 
 #include "texmem.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "macros.h"
-#include "texformat.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/texformat.h"
 
 #include <assert.h>
 
@@ -1277,6 +1277,7 @@ driCalculateTextureFirstLastLevel( driTextureObject * t )
       else {
 	 firstLevel = tObj->BaseLevel + (GLint)(tObj->MinLod + 0.5);
 	 firstLevel = MAX2(firstLevel, tObj->BaseLevel);
+	 firstLevel = MIN2(firstLevel, tObj->BaseLevel + baseImage->MaxLog2);
 	 lastLevel = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
 	 lastLevel = MAX2(lastLevel, t->tObj->BaseLevel);
 	 lastLevel = MIN2(lastLevel, t->tObj->BaseLevel + baseImage->MaxLog2);
diff --git a/src/mesa/drivers/dri/common/texmem.h b/src/mesa/drivers/dri/common/texmem.h
index ffed7dd66e6..9c065da8b4f 100644
--- a/src/mesa/drivers/dri/common/texmem.h
+++ b/src/mesa/drivers/dri/common/texmem.h
@@ -38,8 +38,8 @@
 #ifndef DRI_TEXMEM_H
 #define DRI_TEXMEM_H
 
-#include "mtypes.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
 #include "xf86drm.h"
 
 struct dri_tex_heap;
diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
index 67cffead00f..2a1ded3871d 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -31,10 +31,10 @@
 
 #include <string.h>
 #include <stdlib.h>
-#include "mtypes.h"
-#include "extensions.h"
+#include "main/mtypes.h"
+#include "main/extensions.h"
+#include "glapi/dispatch.h"
 #include "utils.h"
-#include "dispatch.h"
 
 int driDispatchRemapTable[ driDispatchRemapTable_size ];
 
@@ -421,21 +421,6 @@ driCheckDriDdxDrmVersions2(const char * driver_name,
 				drmActual, drmExpected);
 }
 
-
-
-GLint
-driIntersectArea( drm_clip_rect_t rect1, drm_clip_rect_t rect2 )
-{
-   if (rect2.x1 > rect1.x1) rect1.x1 = rect2.x1;
-   if (rect2.x2 < rect1.x2) rect1.x2 = rect2.x2;
-   if (rect2.y1 > rect1.y1) rect1.y1 = rect2.y1;
-   if (rect2.y2 < rect1.y2) rect1.y2 = rect2.y2;
-
-   if (rect1.x1 > rect1.x2 || rect1.y1 > rect1.y2) return 0;
-
-   return (rect1.x2 - rect1.x1) * (rect1.y2 - rect1.y1);
-}
-
 GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer,
 				    GLint *x, GLint *y,
 				    GLsizei *width, GLsizei *height )
@@ -469,8 +454,6 @@ GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer,
    return GL_TRUE;
 }
 
-
-
 /**
  * Creates a set of \c __GLcontextModes that a driver will expose.
  * 
@@ -541,85 +524,98 @@ GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer,
  * \c GL_UNSIGNED_3BYTE_8_8_8, \c GL_4FLOAT_32_32_32_32, 
  * \c GL_4HALF_16_16_16_16, etc.  We can cross that bridge when we come to it.
  */
-GLboolean
-driFillInModes( __GLcontextModes ** ptr_to_modes,
-		GLenum fb_format, GLenum fb_type,
-		const uint8_t * depth_bits, const uint8_t * stencil_bits,
-		unsigned num_depth_stencil_bits,
-		const GLenum * db_modes, unsigned num_db_modes,
-		const u_int8_t * msaa_samples, unsigned num_msaa_modes,
-		int visType )
+__DRIconfig **
+driCreateConfigs(GLenum fb_format, GLenum fb_type,
+		 const uint8_t * depth_bits, const uint8_t * stencil_bits,
+		 unsigned num_depth_stencil_bits,
+		 const GLenum * db_modes, unsigned num_db_modes,
+	 	 const u_int8_t * msaa_samples, unsigned num_msaa_modes)
 {
-   static const uint8_t bits_table[3][4] = {
+   static const uint8_t bits_table[4][4] = {
      /* R  G  B  A */
+      { 3, 3, 2, 0 }, /* Any GL_UNSIGNED_BYTE_3_3_2 */
       { 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */
       { 8, 8, 8, 0 }, /* Any RGB with any GL_UNSIGNED_INT_8_8_8_8 */
       { 8, 8, 8, 8 }  /* Any RGBA with any GL_UNSIGNED_INT_8_8_8_8 */
    };
 
-   /* The following arrays are all indexed by the fb_type masked with 0x07.
-    * Given the four supported fb_type values, this results in valid array
-    * indices of 3, 4, 5, and 7.
-    */
-   static const uint32_t masks_table_rgb[8][4] = {
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+   static const uint32_t masks_table_rgb[6][4] = {
+      { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 3_3_2       */
+      { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 2_3_3_REV   */
       { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5       */
       { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV   */
       { 0xFF000000, 0x00FF0000, 0x0000FF00, 0x00000000 }, /* 8_8_8_8     */
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
       { 0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000 }  /* 8_8_8_8_REV */
    };
 
-   static const uint32_t masks_table_rgba[8][4] = {
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+   static const uint32_t masks_table_rgba[6][4] = {
+      { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 3_3_2       */
+      { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 2_3_3_REV   */
       { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5       */
       { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5_REV   */
       { 0xFF000000, 0x00FF0000, 0x0000FF00, 0x000000FF }, /* 8_8_8_8     */
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
       { 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 }, /* 8_8_8_8_REV */
    };
 
-   static const uint32_t masks_table_bgr[8][4] = {
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+   static const uint32_t masks_table_bgr[6][4] = {
+      { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 3_3_2       */
+      { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 2_3_3_REV   */
       { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5       */
       { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV   */
       { 0x0000FF00, 0x00FF0000, 0xFF000000, 0x00000000 }, /* 8_8_8_8     */
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
       { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* 8_8_8_8_REV */
    };
 
-   static const uint32_t masks_table_bgra[8][4] = {
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
+   static const uint32_t masks_table_bgra[6][4] = {
+      { 0x00000007, 0x00000038, 0x000000C0, 0x00000000 }, /* 3_3_2       */
+      { 0x000000E0, 0x0000001C, 0x00000003, 0x00000000 }, /* 2_3_3_REV   */
       { 0x0000001F, 0x000007E0, 0x0000F800, 0x00000000 }, /* 5_6_5       */
       { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* 5_6_5_REV   */
       { 0x0000FF00, 0x00FF0000, 0xFF000000, 0x000000FF }, /* 8_8_8_8     */
-      { 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
       { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, /* 8_8_8_8_REV */
    };
 
-   static const uint8_t bytes_per_pixel[8] = {
-      0, 0, 0, 2, 2, 4, 0, 4
+   static const uint8_t bytes_per_pixel[6] = {
+      1, /* 3_3_2       */
+      1, /* 2_3_3_REV   */
+      2, /* 5_6_5       */
+      2, /* 5_6_5_REV   */
+      4, /* 8_8_8_8     */
+      4  /* 8_8_8_8_REV */
    };
 
    const uint8_t  * bits;
    const uint32_t * masks;
-   const int index = fb_type & 0x07;
-   __GLcontextModes * modes = *ptr_to_modes;
+   int index;
+   __DRIconfig **configs, **c;
+   __GLcontextModes *modes;
    unsigned i, j, k, h;
-
-
-   if ( bytes_per_pixel[ index ] == 0 ) {
-      fprintf( stderr, "[%s:%u] Framebuffer type 0x%04x has 0 bytes per pixel.\n",
-	       __FUNCTION__, __LINE__, fb_type );
-      return GL_FALSE;
+   unsigned num_modes;
+   unsigned num_accum_bits = 2;
+
+   switch ( fb_type ) {
+      case GL_UNSIGNED_BYTE_3_3_2:
+	 index = 0;
+	 break;
+      case GL_UNSIGNED_BYTE_2_3_3_REV:
+	 index = 1;
+	 break;
+      case GL_UNSIGNED_SHORT_5_6_5:
+	 index = 2;
+	 break;
+      case GL_UNSIGNED_SHORT_5_6_5_REV:
+	 index = 3;
+	 break;
+      case GL_UNSIGNED_INT_8_8_8_8:
+	 index = 4;
+	 break;
+      case GL_UNSIGNED_INT_8_8_8_8_REV:
+	 index = 5;
+	 break;
+      default:
+	 fprintf( stderr, "[%s:%u] Unknown framebuffer type 0x%04x.\n",
+               __FUNCTION__, __LINE__, fb_type );
+	 return NULL;
    }
 
 
@@ -631,41 +627,56 @@ driFillInModes( __GLcontextModes ** ptr_to_modes,
 
    switch ( fb_format ) {
       case GL_RGB:
-         bits = (bytes_per_pixel[ index ] == 2)
-	     ? bits_table[0] : bits_table[1];
          masks = masks_table_rgb[ index ];
          break;
 
       case GL_RGBA:
-         bits = (bytes_per_pixel[ index ] == 2)
-	     ? bits_table[0] : bits_table[2];
          masks = masks_table_rgba[ index ];
          break;
 
       case GL_BGR:
-         bits = (bytes_per_pixel[ index ] == 2)
-	     ? bits_table[0] : bits_table[1];
          masks = masks_table_bgr[ index ];
          break;
 
       case GL_BGRA:
-         bits = (bytes_per_pixel[ index ] == 2)
-	     ? bits_table[0] : bits_table[2];
          masks = masks_table_bgra[ index ];
          break;
 
       default:
-         fprintf( stderr, "[%s:%u] Framebuffer format 0x%04x is not GL_RGB, GL_RGBA, GL_BGR, or GL_BGRA.\n",
-	       __FUNCTION__, __LINE__, fb_format );
-         return GL_FALSE;
+         fprintf( stderr, "[%s:%u] Unknown framebuffer format 0x%04x.\n",
+               __FUNCTION__, __LINE__, fb_format );
+         return NULL;
+   }
+
+   switch ( bytes_per_pixel[ index ] ) {
+      case 1:
+	 bits = bits_table[0];
+	 break;
+      case 2:
+	 bits = bits_table[1];
+	 break;
+      default:
+	 bits = ((fb_format == GL_RGB) || (fb_format == GL_BGR))
+	    ? bits_table[2]
+	    : bits_table[3];
+	 break;
    }
 
+   num_modes = num_depth_stencil_bits * num_db_modes * num_accum_bits * num_msaa_modes;
+   configs = _mesa_calloc((num_modes + 1) * sizeof *configs);
+   if (configs == NULL)
+       return NULL;
 
+    c = configs;
     for ( k = 0 ; k < num_depth_stencil_bits ; k++ ) {
 	for ( i = 0 ; i < num_db_modes ; i++ ) {
 	    for ( h = 0 ; h < num_msaa_modes; h++ ) {
-		for ( j = 0 ; j < 2 ; j++ ) {
+	    	for ( j = 0 ; j < num_accum_bits ; j++ ) {
+		    *c = _mesa_malloc (sizeof **c);
+		    modes = &(*c)->modes;
+		    c++;
 
+		    memset(modes, 0, sizeof *modes);
 		    modes->redBits   = bits[0];
 		    modes->greenBits = bits[1];
 		    modes->blueBits  = bits[2];
@@ -675,7 +686,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes,
 		    modes->blueMask  = masks[2];
 		    modes->alphaMask = masks[3];
 		    modes->rgbBits   = modes->redBits + modes->greenBits
-			+ modes->blueBits + modes->alphaBits;
+		    	+ modes->blueBits + modes->alphaBits;
 
 		    modes->accumRedBits   = 16 * j;
 		    modes->accumGreenBits = 16 * j;
@@ -686,35 +697,190 @@ driFillInModes( __GLcontextModes ** ptr_to_modes,
 		    modes->stencilBits = stencil_bits[k];
 		    modes->depthBits = depth_bits[k];
 
-		    modes->visualType = visType;
+		    modes->transparentPixel = GLX_NONE;
+		    modes->transparentRed = GLX_DONT_CARE;
+		    modes->transparentGreen = GLX_DONT_CARE;
+		    modes->transparentBlue = GLX_DONT_CARE;
+		    modes->transparentAlpha = GLX_DONT_CARE;
+		    modes->transparentIndex = GLX_DONT_CARE;
+		    modes->visualType = GLX_DONT_CARE;
 		    modes->renderType = GLX_RGBA_BIT;
 		    modes->drawableType = GLX_WINDOW_BIT;
 		    modes->rgbMode = GL_TRUE;
 
 		    if ( db_modes[i] == GLX_NONE ) {
-			modes->doubleBufferMode = GL_FALSE;
+		    	modes->doubleBufferMode = GL_FALSE;
 		    }
 		    else {
-			modes->doubleBufferMode = GL_TRUE;
-			modes->swapMethod = db_modes[i];
+		    	modes->doubleBufferMode = GL_TRUE;
+		    	modes->swapMethod = db_modes[i];
 		    }
 
 		    modes->samples = msaa_samples[h];
 		    modes->sampleBuffers = modes->samples ? 1 : 0;
 
+
 		    modes->haveAccumBuffer = ((modes->accumRedBits +
-					       modes->accumGreenBits +
-					       modes->accumBlueBits +
-					       modes->accumAlphaBits) > 0);
+					   modes->accumGreenBits +
+					   modes->accumBlueBits +
+					   modes->accumAlphaBits) > 0);
 		    modes->haveDepthBuffer = (modes->depthBits > 0);
 		    modes->haveStencilBuffer = (modes->stencilBits > 0);
 
-		    modes = modes->next;
+		    modes->bindToTextureRgb = GL_TRUE;
+		    modes->bindToTextureRgba = GL_TRUE;
+		    modes->bindToMipmapTexture = GL_FALSE;
+		    modes->bindToTextureTargets = modes->rgbMode ?
+		    	__DRI_ATTRIB_TEXTURE_1D_BIT |
+		    	__DRI_ATTRIB_TEXTURE_2D_BIT |
+		    	__DRI_ATTRIB_TEXTURE_RECTANGLE_BIT :
+		    	0;
 		}
 	    }
 	}
     }
+    *c = NULL;
+
+    return configs;
+}
+
+const __DRIconfig **driConcatConfigs(__DRIconfig **a, __DRIconfig **b)
+{
+    const __DRIconfig **all;
+    int i, j, index;
+
+    i = 0;
+    while (a[i] != NULL)
+	i++;
+    j = 0;
+    while (b[j] != NULL)
+	j++;
+   
+    all = _mesa_malloc((i + j + 1) * sizeof *all);
+    index = 0;
+    for (i = 0; a[i] != NULL; i++)
+	all[index++] = a[i];
+    for (j = 0; b[j] != NULL; j++)
+	all[index++] = b[j];
+    all[index++] = NULL;
+
+    _mesa_free(a);
+    _mesa_free(b);
+
+    return all;
+}
+
+#define __ATTRIB(attrib, field) \
+    { attrib, offsetof(__GLcontextModes, field) }
+
+static const struct { unsigned int attrib, offset; } attribMap[] = {
+    __ATTRIB(__DRI_ATTRIB_BUFFER_SIZE,			rgbBits),
+    __ATTRIB(__DRI_ATTRIB_LEVEL,			level),
+    __ATTRIB(__DRI_ATTRIB_RED_SIZE,			redBits),
+    __ATTRIB(__DRI_ATTRIB_GREEN_SIZE,			greenBits),
+    __ATTRIB(__DRI_ATTRIB_BLUE_SIZE,			blueBits),
+    __ATTRIB(__DRI_ATTRIB_ALPHA_SIZE,			alphaBits),
+    __ATTRIB(__DRI_ATTRIB_DEPTH_SIZE,			depthBits),
+    __ATTRIB(__DRI_ATTRIB_STENCIL_SIZE,			stencilBits),
+    __ATTRIB(__DRI_ATTRIB_ACCUM_RED_SIZE,		accumRedBits),
+    __ATTRIB(__DRI_ATTRIB_ACCUM_GREEN_SIZE,		accumGreenBits),
+    __ATTRIB(__DRI_ATTRIB_ACCUM_BLUE_SIZE,		accumBlueBits),
+    __ATTRIB(__DRI_ATTRIB_ACCUM_ALPHA_SIZE,		accumAlphaBits),
+    __ATTRIB(__DRI_ATTRIB_SAMPLE_BUFFERS,		sampleBuffers),
+    __ATTRIB(__DRI_ATTRIB_SAMPLES,			samples),
+    __ATTRIB(__DRI_ATTRIB_DOUBLE_BUFFER,		doubleBufferMode),
+    __ATTRIB(__DRI_ATTRIB_STEREO,			stereoMode),
+    __ATTRIB(__DRI_ATTRIB_AUX_BUFFERS,			numAuxBuffers),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_TYPE,		transparentPixel),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_INDEX_VALUE,	transparentPixel),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_RED_VALUE,	transparentRed),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_GREEN_VALUE,	transparentGreen),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_BLUE_VALUE,	transparentBlue),
+    __ATTRIB(__DRI_ATTRIB_TRANSPARENT_ALPHA_VALUE,	transparentAlpha),
+    __ATTRIB(__DRI_ATTRIB_FLOAT_MODE,			floatMode),
+    __ATTRIB(__DRI_ATTRIB_RED_MASK,			redMask),
+    __ATTRIB(__DRI_ATTRIB_GREEN_MASK,			greenMask),
+    __ATTRIB(__DRI_ATTRIB_BLUE_MASK,			blueMask),
+    __ATTRIB(__DRI_ATTRIB_ALPHA_MASK,			alphaMask),
+    __ATTRIB(__DRI_ATTRIB_MAX_PBUFFER_WIDTH,		maxPbufferWidth),
+    __ATTRIB(__DRI_ATTRIB_MAX_PBUFFER_HEIGHT,		maxPbufferHeight),
+    __ATTRIB(__DRI_ATTRIB_MAX_PBUFFER_PIXELS,		maxPbufferPixels),
+    __ATTRIB(__DRI_ATTRIB_OPTIMAL_PBUFFER_WIDTH,	optimalPbufferWidth),
+    __ATTRIB(__DRI_ATTRIB_OPTIMAL_PBUFFER_HEIGHT,	optimalPbufferHeight),
+    __ATTRIB(__DRI_ATTRIB_SWAP_METHOD,			swapMethod),
+    __ATTRIB(__DRI_ATTRIB_BIND_TO_TEXTURE_RGB,		bindToTextureRgb),
+    __ATTRIB(__DRI_ATTRIB_BIND_TO_TEXTURE_RGBA,		bindToTextureRgba),
+    __ATTRIB(__DRI_ATTRIB_BIND_TO_MIPMAP_TEXTURE,	bindToMipmapTexture),
+    __ATTRIB(__DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS,	bindToTextureTargets),
+    __ATTRIB(__DRI_ATTRIB_YINVERTED,			yInverted),
+
+    /* The struct field doesn't matter here, these are handled by the
+     * switch in driGetConfigAttribIndex.  We need them in the array
+     * so the iterator includes them though.*/
+    __ATTRIB(__DRI_ATTRIB_RENDER_TYPE,			level),
+    __ATTRIB(__DRI_ATTRIB_CONFIG_CAVEAT,		level),
+    __ATTRIB(__DRI_ATTRIB_SWAP_METHOD,			level)
+};
+
+#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
+
+static int
+driGetConfigAttribIndex(const __DRIconfig *config,
+			unsigned int index, unsigned int *value)
+{
+    switch (attribMap[index].attrib) {
+    case __DRI_ATTRIB_RENDER_TYPE:
+	if (config->modes.rgbMode)
+	    *value = __DRI_ATTRIB_RGBA_BIT;
+	else
+	    *value = __DRI_ATTRIB_COLOR_INDEX_BIT;
+	break;
+    case __DRI_ATTRIB_CONFIG_CAVEAT:
+	if (config->modes.visualRating == GLX_NON_CONFORMANT_CONFIG)
+	    *value = __DRI_ATTRIB_NON_CONFORMANT_CONFIG;
+	else if (config->modes.visualRating == GLX_SLOW_CONFIG)
+	    *value = __DRI_ATTRIB_SLOW_BIT;
+	else
+	    *value = 0;
+	break;
+    case __DRI_ATTRIB_SWAP_METHOD:
+	break;
+
+    case __DRI_ATTRIB_FLOAT_MODE:
+        *value = config->modes.floatMode;
+        break;
+
+    default:
+	*value = *(unsigned int *)
+	    ((char *) &config->modes + attribMap[index].offset);
+	
+	break;
+    }
 
-    *ptr_to_modes = modes;
     return GL_TRUE;
 }
+
+int
+driGetConfigAttrib(const __DRIconfig *config,
+		   unsigned int attrib, unsigned int *value)
+{
+    int i;
+
+    for (i = 0; i < ARRAY_SIZE(attribMap); i++)
+	if (attribMap[i].attrib == attrib)
+	    return driGetConfigAttribIndex(config, i, value);
+
+    return GL_FALSE;
+}
+
+int
+driIndexConfigAttrib(const __DRIconfig *config, int index,
+		     unsigned int *attrib, unsigned int *value)
+{
+    if (index >= 0 && index < ARRAY_SIZE(attribMap)) {
+	*attrib = attribMap[index].attrib;
+	return driGetConfigAttribIndex(config, index, value);
+    }
+
+    return GL_FALSE;
+}
diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h
index 20940c21b4e..4e27bd21a1f 100644
--- a/src/mesa/drivers/dri/common/utils.h
+++ b/src/mesa/drivers/dri/common/utils.h
@@ -28,8 +28,11 @@
 #ifndef DRI_DEBUG_H
 #define DRI_DEBUG_H
 
-#include "context.h"
-#include "dri_util.h"
+#include <GL/gl.h>
+#include <GL/internal/dri_interface.h>
+#include "main/context.h"
+
+typedef struct __DRIutilversionRec2    __DRIutilversion2;
 
 struct dri_debug_control {
     const char * string;
@@ -83,6 +86,17 @@ struct dri_extension {
     const struct dri_extension_function * functions;
 };
 
+/**
+ * Used to store a version which includes a major range instead of a single
+ * major version number.
+ */
+struct __DRIutilversionRec2 {
+    int    major_min;    /** min allowed Major version number. */
+    int    major_max;    /** max allowed Major version number. */
+    int    minor;        /**< Minor version number. */
+    int    patch;        /**< Patch-level. */
+};
+
 extern unsigned driParseDebugString( const char * debug,
     const struct dri_debug_control * control );
 
@@ -105,17 +119,28 @@ extern GLboolean driCheckDriDdxDrmVersions3(const char * driver_name,
     const __DRIversion * ddxActual, const __DRIutilversion2 * ddxExpected,
     const __DRIversion * drmActual, const __DRIversion * drmExpected);
 
-extern GLint driIntersectArea( drm_clip_rect_t rect1, drm_clip_rect_t rect2 );
-
 extern GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer,
 					   GLint *x, GLint *y,
 					   GLsizei *width, GLsizei *height );
 
-extern GLboolean driFillInModes( __GLcontextModes ** modes,
-    GLenum fb_format, GLenum fb_type,
-    const uint8_t * depth_bits, const uint8_t * stencil_bits,
-    unsigned num_depth_stencil_bits,
-    const GLenum * db_modes, unsigned num_db_modes,
-    const u_int8_t * msaa_samples, unsigned num_msaa_modes, int visType );
+struct __DRIconfigRec {
+    __GLcontextModes modes;
+};
+
+extern __DRIconfig **
+driCreateConfigs(GLenum fb_format, GLenum fb_type,
+		 const uint8_t * depth_bits, const uint8_t * stencil_bits,
+		 unsigned num_depth_stencil_bits,
+		 const GLenum * db_modes, unsigned num_db_modes,
+    		 const uint8_t * msaa_samples, unsigned num_msaa_modes);
+
+const __DRIconfig **driConcatConfigs(__DRIconfig **a, __DRIconfig **b);
+
+int
+driGetConfigAttrib(const __DRIconfig *config,
+		   unsigned int attrib, unsigned int *value);
+int
+driIndexConfigAttrib(const __DRIconfig *config, int index,
+		     unsigned int *attrib, unsigned int *value);
 
 #endif /* DRI_DEBUG_H */
diff --git a/src/mesa/drivers/dri/common/vblank.c b/src/mesa/drivers/dri/common/vblank.c
index 094950d3626..d610253fe6f 100644
--- a/src/mesa/drivers/dri/common/vblank.c
+++ b/src/mesa/drivers/dri/common/vblank.c
@@ -26,14 +26,24 @@
  *    Ian Romanick <idr@us.ibm.com>
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "xf86drm.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/dd.h"
 #include "vblank.h"
 #include "xmlpool.h"
 
+static unsigned int msc_to_vblank(__DRIdrawablePrivate * dPriv, int64_t msc)
+{
+   return (unsigned int)(msc - dPriv->msc_base + dPriv->vblank_base);
+}
+
+static int64_t vblank_to_msc(__DRIdrawablePrivate * dPriv, unsigned int vblank)
+{
+   return (int64_t)(vblank - dPriv->vblank_base + dPriv->msc_base);
+}
+
 
 /****************************************************************************/
 /**
@@ -41,7 +51,7 @@
  *
  * Stores the 64-bit count of vertical refreshes since some (arbitrary)
  * point in time in \c count.  Unless the value wraps around, which it
- * may, it will never decrease.
+ * may, it will never decrease for a given drawable.
  *
  * \warning This function is called from \c glXGetVideoSyncSGI, which expects
  * a \c count of type \c unsigned (32-bit), and \c glXGetSyncValuesOML, which 
@@ -49,11 +59,14 @@
  * currently always returns a \c sequence of type \c unsigned.
  *
  * \param priv   Pointer to the DRI screen private struct.
+ * \param dPriv  Pointer to the DRI drawable private struct
  * \param count  Storage to hold MSC counter.
  * \return       Zero is returned on success.  A negative errno value
  *               is returned on failure.
  */
-int driGetMSC32( __DRIscreenPrivate * priv, int64_t * count )
+int driDrawableGetMSC32( __DRIscreenPrivate * priv,
+			 __DRIdrawablePrivate * dPriv,
+			 int64_t * count)
 {
    drmVBlank vbl;
    int ret;
@@ -62,14 +75,21 @@ int driGetMSC32( __DRIscreenPrivate * priv, int64_t * count )
 
    vbl.request.type = DRM_VBLANK_RELATIVE;
    vbl.request.sequence = 0;
+   if ( dPriv && dPriv->vblFlags & VBLANK_FLAG_SECONDARY )
+      vbl.request.type |= DRM_VBLANK_SECONDARY;
 
    ret = drmWaitVBlank( priv->fd, &vbl );
-   *count = (int64_t)vbl.reply.sequence;
+
+   if (dPriv) {
+      *count = vblank_to_msc(dPriv, vbl.reply.sequence);
+   } else {
+      /* Old driver (no knowledge of drawable MSC callback) */
+      *count = vbl.reply.sequence;
+   }
 
    return ret;
 }
 
-
 /****************************************************************************/
 /**
  * Wait for a specified refresh count.  This implements most of the
@@ -122,7 +142,9 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
           */
          vbl.request.type = dont_wait ? DRM_VBLANK_RELATIVE :
                                         DRM_VBLANK_ABSOLUTE;
-         vbl.request.sequence = next;
+         vbl.request.sequence = next ? msc_to_vblank(priv, next) : 0;
+	 if ( priv->vblFlags & VBLANK_FLAG_SECONDARY )
+	    vbl.request.type |= DRM_VBLANK_SECONDARY;
 
 	 if ( drmWaitVBlank( priv->driScreenPriv->fd, &vbl ) != 0 ) {
 	    /* FIXME: This doesn't seem like the right thing to return here.
@@ -130,8 +152,10 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
 	    return GLX_BAD_CONTEXT;
 	 }
 
+	 *msc = vblank_to_msc(priv, vbl.reply.sequence);
+
          dont_wait = 0;
-         if (target_msc != 0 && vbl.reply.sequence == target)
+         if (target_msc != 0 && *msc == target)
             break;
 
          /* Assuming the wait-done test fails, the next refresh to wait for
@@ -141,9 +165,9 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
           * If this refresh has already happened, we add divisor to obtain 
           * the next refresh after the current one that will satisfy it.
           */
-         r = (vbl.reply.sequence % (unsigned int)divisor);
-         next = (vbl.reply.sequence - r + (unsigned int)remainder);
-         if (next <= vbl.reply.sequence) next += (unsigned int)divisor;
+         r = (*msc % (unsigned int)divisor);
+         next = (*msc - r + (unsigned int)remainder);
+         if (next <= *msc) next += (unsigned int)divisor;
 
       } while ( r != (unsigned int)remainder );
    }
@@ -153,7 +177,10 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
        */
 
       vbl.request.type = DRM_VBLANK_ABSOLUTE;
-      vbl.request.sequence = target_msc;
+      vbl.request.sequence = target_msc ? msc_to_vblank(priv, target_msc) : 0;
+
+      if ( priv->vblFlags & VBLANK_FLAG_SECONDARY )
+	 vbl.request.type |= DRM_VBLANK_SECONDARY;
 
       if ( drmWaitVBlank( priv->driScreenPriv->fd, &vbl ) != 0 ) {
 	 /* FIXME: This doesn't seem like the right thing to return here.
@@ -162,8 +189,8 @@ int driWaitForMSC32( __DRIdrawablePrivate *priv,
       }
    }
 
-   *msc  = (target_msc & 0xffffffff00000000LL);
-   *msc |= vbl.reply.sequence;
+   *msc = vblank_to_msc(priv, vbl.reply.sequence);
+
    if ( *msc < target_msc ) {
       *msc += 0x0000000100000000LL;
    }
@@ -232,8 +259,8 @@ static int do_wait( drmVBlank * vbl, GLuint * vbl_seq, int fd )
       if ( first_time ) {
 	 fprintf(stderr, 
 		 "%s: drmWaitVBlank returned %d, IRQs don't seem to be"
-		 " working correctly.\nTry running with LIBGL_THROTTLE_REFRESH"
-		 " and LIBL_SYNC_REFRESH unset.\n", __FUNCTION__, ret);
+		 " working correctly.\nTry adjusting the vblank_mode"
+		 " configuration parameter.\n", __FUNCTION__, ret);
 	 first_time = GL_FALSE;
       }
 
@@ -247,20 +274,42 @@ static int do_wait( drmVBlank * vbl, GLuint * vbl_seq, int fd )
 
 /****************************************************************************/
 /**
+ * Returns the default swap interval of the given drawable.
+ */
+
+static unsigned
+driGetDefaultVBlankInterval( const  __DRIdrawablePrivate *priv )
+{
+   if ( (priv->vblFlags & (VBLANK_FLAG_THROTTLE | VBLANK_FLAG_SYNC)) != 0 ) {
+      return 1;
+   }
+   else {
+      return 0;
+   }
+}
+
+
+/****************************************************************************/
+/**
  * Sets the default swap interval when the drawable is first bound to a
  * direct rendering context.
  */
 
-void driDrawableInitVBlank( __DRIdrawablePrivate *priv, GLuint flags,
-			    GLuint *vbl_seq )
+void driDrawableInitVBlank( __DRIdrawablePrivate *priv )
 {
-   if ( priv->pdraw->swap_interval == (unsigned)-1 ) {
+   if ( priv->swap_interval == (unsigned)-1 &&
+	!( priv->vblFlags & VBLANK_FLAG_NO_IRQ ) ) {
       /* Get current vertical blank sequence */
-      drmVBlank vbl = { .request={ .type = DRM_VBLANK_RELATIVE, .sequence = 0 } };
-      do_wait( &vbl, vbl_seq, priv->driScreenPriv->fd );
-
-      priv->pdraw->swap_interval = (flags & (VBLANK_FLAG_THROTTLE |
-					     VBLANK_FLAG_SYNC)) != 0 ? 1 : 0;
+      drmVBlank vbl;
+ 
+      vbl.request.type = DRM_VBLANK_RELATIVE;
+      if ( priv->vblFlags & VBLANK_FLAG_SECONDARY )
+ 	 vbl.request.type |= DRM_VBLANK_SECONDARY;
+      vbl.request.sequence = 0;
+      do_wait( &vbl, &priv->vblSeq, priv->driScreenPriv->fd );
+      priv->vblank_base = priv->vblSeq;
+
+      priv->swap_interval = driGetDefaultVBlankInterval( priv );
    }
 }
 
@@ -271,21 +320,17 @@ void driDrawableInitVBlank( __DRIdrawablePrivate *priv, GLuint flags,
  */
 
 unsigned
-driGetVBlankInterval( const  __DRIdrawablePrivate *priv, GLuint flags )
+driGetVBlankInterval( const  __DRIdrawablePrivate *priv )
 {
-   if ( (flags & VBLANK_FLAG_INTERVAL) != 0 ) {
+   if ( (priv->vblFlags & VBLANK_FLAG_INTERVAL) != 0 ) {
       /* this must have been initialized when the drawable was first bound
        * to a direct rendering context. */
-      assert ( priv->pdraw->swap_interval != (unsigned)-1 );
+      assert ( priv->swap_interval != (unsigned)-1 );
 
-      return priv->pdraw->swap_interval;
-   }
-   else if ( (flags & (VBLANK_FLAG_THROTTLE | VBLANK_FLAG_SYNC)) != 0 ) {
-      return 1;
-   }
-   else {
-      return 0;
+      return priv->swap_interval;
    }
+   else 
+      return driGetDefaultVBlankInterval( priv );
 }
 
 
@@ -295,18 +340,17 @@ driGetVBlankInterval( const  __DRIdrawablePrivate *priv, GLuint flags )
  */
 
 void
-driGetCurrentVBlank( const  __DRIdrawablePrivate *priv, GLuint flags,
-		     GLuint *vbl_seq )
+driGetCurrentVBlank( __DRIdrawablePrivate *priv )
 {
    drmVBlank vbl;
 
    vbl.request.type = DRM_VBLANK_RELATIVE;
-   if ( flags & VBLANK_FLAG_SECONDARY ) {
+   if ( priv->vblFlags & VBLANK_FLAG_SECONDARY ) {
       vbl.request.type |= DRM_VBLANK_SECONDARY;
    }
    vbl.request.sequence = 0;
 
-   (void) do_wait( &vbl, vbl_seq, priv->driScreenPriv->fd );
+   (void) do_wait( &vbl, &priv->vblSeq, priv->driScreenPriv->fd );
 }
 
 
@@ -314,19 +358,15 @@ driGetCurrentVBlank( const  __DRIdrawablePrivate *priv, GLuint flags,
 /**
  * Waits for the vertical blank for use with glXSwapBuffers.
  * 
- * \param vbl_seq  Vertical blank sequence number (MSC) after the last buffer
- *                 swap.  Updated after this wait.
- * \param flags    \c VBLANK_FLAG bits that control how long to wait.
  * \param missed_deadline  Set to \c GL_TRUE if the MSC after waiting is later
- *                 than the "target" based on \c flags.  The idea is that if
- *                 \c missed_deadline is set, then the application is not 
- *                 achieving its desired framerate.
+ *                 than the "target" based on \c priv->vblFlags.  The idea is
+ *                 that if \c missed_deadline is set, then the application is
+ *                 not achieving its desired framerate.
  * \return         Zero on success, -1 on error.
  */
 
 int
-driWaitForVBlank( const  __DRIdrawablePrivate *priv, GLuint * vbl_seq,
-		  GLuint flags, GLboolean * missed_deadline )
+driWaitForVBlank( __DRIdrawablePrivate *priv, GLboolean * missed_deadline )
 {
    drmVBlank vbl;
    unsigned   original_seq;
@@ -335,10 +375,10 @@ driWaitForVBlank( const  __DRIdrawablePrivate *priv, GLuint * vbl_seq,
    unsigned   diff;
 
    *missed_deadline = GL_FALSE;
-   if ( (flags & (VBLANK_FLAG_INTERVAL |
-		  VBLANK_FLAG_THROTTLE |
-		  VBLANK_FLAG_SYNC)) == 0 ||
-	(flags & VBLANK_FLAG_NO_IRQ) != 0 ) {
+   if ( (priv->vblFlags & (VBLANK_FLAG_INTERVAL |
+			   VBLANK_FLAG_THROTTLE |
+			   VBLANK_FLAG_SYNC)) == 0 ||
+	(priv->vblFlags & VBLANK_FLAG_NO_IRQ) != 0 ) {
       return 0;
    }
 
@@ -349,44 +389,45 @@ driWaitForVBlank( const  __DRIdrawablePrivate *priv, GLuint * vbl_seq,
     *
     * VBLANK_FLAG_INTERVAL and VBLANK_FLAG_THROTTLE mean to wait for at
     * least one vertical blank since the last wait.  Since do_wait modifies
-    * vbl_seq, we have to save the original value of vbl_seq for the
+    * priv->vblSeq, we have to save the original value of priv->vblSeq for the
     * VBLANK_FLAG_INTERVAL / VBLANK_FLAG_THROTTLE calculation later.
     */
 
-   original_seq = *vbl_seq;
-   interval = driGetVBlankInterval(priv, flags);
+   original_seq = priv->vblSeq;
+   interval = driGetVBlankInterval(priv);
    deadline = original_seq + interval;
 
    vbl.request.type = DRM_VBLANK_RELATIVE;
-   if ( flags & VBLANK_FLAG_SECONDARY ) {
+   if ( priv->vblFlags & VBLANK_FLAG_SECONDARY ) {
       vbl.request.type |= DRM_VBLANK_SECONDARY;
    }
-   vbl.request.sequence = ((flags & VBLANK_FLAG_SYNC) != 0) ? 1 : 0;
+   vbl.request.sequence = ((priv->vblFlags & VBLANK_FLAG_SYNC) != 0) ? 1 : 0;
 
-   if ( do_wait( & vbl, vbl_seq, priv->driScreenPriv->fd ) != 0 ) {
+   if ( do_wait( & vbl, &priv->vblSeq, priv->driScreenPriv->fd ) != 0 ) {
       return -1;
    }
 
-   diff = *vbl_seq - deadline;
+   diff = priv->vblSeq - deadline;
 
    /* No need to wait again if we've already reached the target */
    if (diff <= (1 << 23)) {
-      *missed_deadline = (flags & VBLANK_FLAG_SYNC) ? (diff > 0) : GL_TRUE;
+      *missed_deadline = (priv->vblFlags & VBLANK_FLAG_SYNC) ? (diff > 0) :
+			 GL_TRUE;
       return 0;
    }
 
    /* Wait until the target vertical blank. */
    vbl.request.type = DRM_VBLANK_ABSOLUTE;
-   if ( flags & VBLANK_FLAG_SECONDARY ) {
+   if ( priv->vblFlags & VBLANK_FLAG_SECONDARY ) {
       vbl.request.type |= DRM_VBLANK_SECONDARY;
    }
    vbl.request.sequence = deadline;
 
-   if ( do_wait( & vbl, vbl_seq, priv->driScreenPriv->fd ) != 0 ) {
+   if ( do_wait( & vbl, &priv->vblSeq, priv->driScreenPriv->fd ) != 0 ) {
       return -1;
    }
 
-   diff = *vbl_seq - deadline;
+   diff = priv->vblSeq - deadline;
    *missed_deadline = diff > 0 && diff <= (1 << 23);
 
    return 0;
diff --git a/src/mesa/drivers/dri/common/vblank.h b/src/mesa/drivers/dri/common/vblank.h
index 52c1933ca5b..8b2c761a116 100644
--- a/src/mesa/drivers/dri/common/vblank.h
+++ b/src/mesa/drivers/dri/common/vblank.h
@@ -29,7 +29,7 @@
 #ifndef DRI_VBLANK_H
 #define DRI_VBLANK_H
 
-#include "context.h"
+#include "main/context.h"
 #include "dri_util.h"
 #include "xmlconfig.h"
 
@@ -45,17 +45,17 @@
 					  */
 
 extern int driGetMSC32( __DRIscreenPrivate * priv, int64_t * count );
+extern int driDrawableGetMSC32( __DRIscreenPrivate * priv,
+				__DRIdrawablePrivate * drawablePrivate,
+				int64_t * count);
 extern int driWaitForMSC32( __DRIdrawablePrivate *priv,
     int64_t target_msc, int64_t divisor, int64_t remainder, int64_t * msc );
 extern GLuint driGetDefaultVBlankFlags( const driOptionCache *optionCache );
-extern void driDrawableInitVBlank ( __DRIdrawablePrivate *priv, GLuint flags,
-				    GLuint *vbl_seq );
-extern unsigned driGetVBlankInterval( const  __DRIdrawablePrivate *priv,
-				      GLuint flags );
-extern void driGetCurrentVBlank( const  __DRIdrawablePrivate *priv,
-				 GLuint flags, GLuint *vbl_seq );
-extern int driWaitForVBlank( const __DRIdrawablePrivate *priv,
-    GLuint * vbl_seq, GLuint flags, GLboolean * missed_deadline );
+extern void driDrawableInitVBlank ( __DRIdrawablePrivate *priv );
+extern unsigned driGetVBlankInterval( const  __DRIdrawablePrivate *priv );
+extern void driGetCurrentVBlank( __DRIdrawablePrivate *priv );
+extern int driWaitForVBlank( __DRIdrawablePrivate *priv,
+			     GLboolean * missed_deadline );
 
 #undef usleep
 #include <unistd.h>  /* for usleep() */
diff --git a/src/mesa/drivers/dri/common/xmlconfig.c b/src/mesa/drivers/dri/common/xmlconfig.c
index b635894fe53..46ba2ffbfed 100644
--- a/src/mesa/drivers/dri/common/xmlconfig.c
+++ b/src/mesa/drivers/dri/common/xmlconfig.c
@@ -27,7 +27,7 @@
  * \author Felix Kuehling
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 
 #include <string.h>
 #include <assert.h>
@@ -35,7 +35,7 @@
 #include <fcntl.h>
 #include <unistd.h>
 #include <errno.h>
-#include "imports.h"
+#include "main/imports.h"
 #include "dri_util.h"
 #include "xmlconfig.h"
 
@@ -63,6 +63,12 @@ extern char *program_invocation_name, *program_invocation_short_name;
 #elif defined(__NetBSD__) && defined(__NetBSD_Version) && (__NetBSD_Version >= 106000100)
 #    include <stdlib.h>
 #    define GET_PROGRAM_NAME() getprogname()
+#elif defined(__sun)
+/* Solaris has getexecname() which returns the full path - return just
+   the basename to match BSD getprogname() */
+#    include <stdlib.h>
+#    include <libgen.h>
+#    define GET_PROGRAM_NAME() basename(getexecname())
 #endif
 
 #if !defined(GET_PROGRAM_NAME)
@@ -279,7 +285,7 @@ static GLfloat strToF (const XML_Char *string, const XML_Char **tail) {
 /** \brief Parse a value of a given type. */
 static GLboolean parseValue (driOptionValue *v, driOptionType type,
 			     const XML_Char *string) {
-    const XML_Char *tail;
+    const XML_Char *tail = NULL;
   /* skip leading white-space */
     string += strspn (string, " \f\n\r\t\v");
     switch (type) {
@@ -403,40 +409,40 @@ static GLboolean checkValue (const driOptionValue *v, const driOptionInfo *info)
 /** \brief Output a warning message. */
 #define XML_WARNING1(msg) do {\
     __driUtilMessage ("Warning in %s line %d, column %d: "msg, data->name, \
-                      XML_GetCurrentLineNumber(data->parser), \
-                      XML_GetCurrentColumnNumber(data->parser)); \
+                      (int) XML_GetCurrentLineNumber(data->parser), \
+                      (int) XML_GetCurrentColumnNumber(data->parser)); \
 } while (0)
 #define XML_WARNING(msg,args...) do { \
     __driUtilMessage ("Warning in %s line %d, column %d: "msg, data->name, \
-                      XML_GetCurrentLineNumber(data->parser), \
-                      XML_GetCurrentColumnNumber(data->parser), \
+                      (int) XML_GetCurrentLineNumber(data->parser), \
+                      (int) XML_GetCurrentColumnNumber(data->parser), \
                       args); \
 } while (0)
 /** \brief Output an error message. */
 #define XML_ERROR1(msg) do { \
     __driUtilMessage ("Error in %s line %d, column %d: "msg, data->name, \
-                      XML_GetCurrentLineNumber(data->parser), \
-                      XML_GetCurrentColumnNumber(data->parser)); \
+                      (int) XML_GetCurrentLineNumber(data->parser), \
+                      (int) XML_GetCurrentColumnNumber(data->parser)); \
 } while (0)
 #define XML_ERROR(msg,args...) do { \
     __driUtilMessage ("Error in %s line %d, column %d: "msg, data->name, \
-                      XML_GetCurrentLineNumber(data->parser), \
-                      XML_GetCurrentColumnNumber(data->parser), \
+                      (int) XML_GetCurrentLineNumber(data->parser), \
+                      (int) XML_GetCurrentColumnNumber(data->parser), \
                       args); \
 } while (0)
 /** \brief Output a fatal error message and abort. */
 #define XML_FATAL1(msg) do { \
     fprintf (stderr, "Fatal error in %s line %d, column %d: "msg"\n", \
              data->name, \
-             XML_GetCurrentLineNumber(data->parser), \
-             XML_GetCurrentColumnNumber(data->parser)); \
+             (int) XML_GetCurrentLineNumber(data->parser),	\
+             (int) XML_GetCurrentColumnNumber(data->parser)); \
     abort();\
 } while (0)
 #define XML_FATAL(msg,args...) do { \
     fprintf (stderr, "Fatal error in %s line %d, column %d: "msg"\n", \
              data->name, \
-             XML_GetCurrentLineNumber(data->parser), \
-             XML_GetCurrentColumnNumber(data->parser), \
+             (int) XML_GetCurrentLineNumber(data->parser),	\
+             (int) XML_GetCurrentColumnNumber(data->parser),		\
              args); \
     abort();\
 } while (0)
diff --git a/src/mesa/drivers/dri/common/xmlpool/Makefile b/src/mesa/drivers/dri/common/xmlpool/Makefile
index b077809cd18..62ec919ea68 100644
--- a/src/mesa/drivers/dri/common/xmlpool/Makefile
+++ b/src/mesa/drivers/dri/common/xmlpool/Makefile
@@ -57,8 +57,8 @@ all: options.h
 # Only intermediate files are cleaned up. options.h is not deleted because
 # it's in CVS. 
 clean:
-	rm -f $(POT) *~
-	rm -rf $(LANGS)
+	-rm -f $(POT) *~
+	-rm -rf $(LANGS)
 
 # Default target options.h
 options.h: t_options.h mo
diff --git a/src/mesa/drivers/dri/dri.pc.in b/src/mesa/drivers/dri/dri.pc.in
new file mode 100644
index 00000000000..695aa6cfd66
--- /dev/null
+++ b/src/mesa/drivers/dri/dri.pc.in
@@ -0,0 +1,11 @@
+prefix=@INSTALL_DIR@
+exec_prefix=${prefix}
+libdir=@INSTALL_LIB_DIR@
+includedir=@INSTALL_INC_DIR@
+dridriverdir=@DRI_DRIVER_DIR@
+
+Name: dri
+Description: Direct Rendering Infrastructure
+Version: @VERSION@
+Requires.private: @DRI_PC_REQ_PRIV@
+Cflags: -I${includedir}
diff --git a/src/mesa/drivers/dri/fb/fb_dri.c b/src/mesa/drivers/dri/fb/fb_dri.c
index 523a0c0380f..f1194d7ce82 100644
--- a/src/mesa/drivers/dri/fb/fb_dri.c
+++ b/src/mesa/drivers/dri/fb/fb_dri.c
@@ -47,14 +47,14 @@
 #include "drirenderbuffer.h"
 
 #include "buffers.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 #include "vbo/vbo.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 #include "tnl/t_pipeline.h"
 #include "drivers/common/driverfuncs.h"
 
@@ -657,8 +657,9 @@ struct DRIDriverRec __driDriver = {
 };
 
 static __GLcontextModes *
-fbFillInModes( unsigned pixel_bits, unsigned depth_bits,
-                 unsigned stencil_bits, GLboolean have_back_buffer )
+fbFillInModes( __DRIscreenPrivate *psp,
+	       unsigned pixel_bits, unsigned depth_bits,
+	       unsigned stencil_bits, GLboolean have_back_buffer )
 {
    __GLcontextModes * modes;
    __GLcontextModes * m;
@@ -705,7 +706,7 @@ fbFillInModes( unsigned pixel_bits, unsigned depth_bits,
       fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
    }
 
-   modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
+   modes = (*psp->contextModes->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
    m = modes;
    if ( ! driFillInModes( & m, fb_format, fb_type,
           depth_bits_array, stencil_bits_array, depth_buffer_factor,
@@ -776,7 +777,7 @@ void * __driCreateNewScreen( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc
                                          frame_buffer, pSAREA, fd,
                                          internal_api_version, &fbAPI);
           if ( psp != NULL ) {
-	     *driver_modes = fbFillInModes( psp->fbBPP,
+	     *driver_modes = fbFillInModes( psp, psp->fbBPP,
 					    (psp->fbBPP == 16) ? 16 : 24,
 					    (psp->fbBPP == 16) ? 0  : 8,
 					    1);
diff --git a/src/mesa/drivers/dri/fb/fb_egl.c b/src/mesa/drivers/dri/fb/fb_egl.c
index cc6a266df30..35c268441c3 100644
--- a/src/mesa/drivers/dri/fb/fb_egl.c
+++ b/src/mesa/drivers/dri/fb/fb_egl.c
@@ -14,20 +14,20 @@
 
 #include "utils.h"
 #include "buffers.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 #include "vbo/vbo.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 #include "tnl/t_pipeline.h"
 #include "drivers/common/driverfuncs.h"
 #include "drirenderbuffer.h"
 
 #include "eglconfig.h"
-#include "eglcontext.h"
+#include "eglmain/context.h"
 #include "egldisplay.h"
 #include "egldriver.h"
 #include "eglglobals.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_bitmap.c b/src/mesa/drivers/dri/ffb/ffb_bitmap.c
index 1aa66859a6f..f89c0412dfe 100644
--- a/src/mesa/drivers/dri/ffb/ffb_bitmap.c
+++ b/src/mesa/drivers/dri/ffb/ffb_bitmap.c
@@ -30,8 +30,8 @@
 #include "ffb_lock.h"
 #include "ffb_bitmap.h"
 #include "swrast/swrast.h"
-#include "image.h"
-#include "macros.h"
+#include "main/image.h"
+#include "main/macros.h"
 
 /* Compute ceiling of integer quotient of A divided by B: */
 #define CEILING( A, B )  ( (A) % (B) == 0 ? (A)/(B) : (A)/(B)+1 )
diff --git a/src/mesa/drivers/dri/ffb/ffb_clear.c b/src/mesa/drivers/dri/ffb/ffb_clear.c
index 7de05b5cf0c..776fb487f8d 100644
--- a/src/mesa/drivers/dri/ffb/ffb_clear.c
+++ b/src/mesa/drivers/dri/ffb/ffb_clear.c
@@ -25,10 +25,10 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
-#include "extensions.h"
+#include "main/mtypes.h"
+#include "main/extensions.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_depth.h"
@@ -79,7 +79,7 @@ struct ff_fixups {
 /* Compute fixups of non-page aligned areas after a page fill.
  * Return the number of fixups needed.
  */
-static __inline__ int
+static INLINE int
 CreatorComputePageFillFixups(struct ff_fixups *fixups,
 			     int x, int y, int w, int h,
 			     int paligned_x, int paligned_y,
diff --git a/src/mesa/drivers/dri/ffb/ffb_context.h b/src/mesa/drivers/dri/ffb/ffb_context.h
index 0ab75fce47c..77f87d41c30 100644
--- a/src/mesa/drivers/dri/ffb/ffb_context.h
+++ b/src/mesa/drivers/dri/ffb/ffb_context.h
@@ -5,7 +5,7 @@
 #include "dri_util.h"
 #include "drm.h"
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 #include "ffb_xmesa.h"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_dd.c b/src/mesa/drivers/dri/ffb/ffb_dd.c
index f64a577d1fc..cf83b91f0d4 100644
--- a/src/mesa/drivers/dri/ffb/ffb_dd.c
+++ b/src/mesa/drivers/dri/ffb/ffb_dd.c
@@ -25,8 +25,9 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
+#include "main/extensions.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_depth.h"
@@ -35,7 +36,6 @@
 #include "ffb_tris.h"
 #include "ffb_clear.h"
 #include "ffb_lock.h"
-#include "extensions.h"
 
 #define FFB_DATE	"20021125"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_dd.h b/src/mesa/drivers/dri/ffb/ffb_dd.h
index e065ebbecd9..1198cda30a1 100644
--- a/src/mesa/drivers/dri/ffb/ffb_dd.h
+++ b/src/mesa/drivers/dri/ffb/ffb_dd.h
@@ -28,7 +28,7 @@
 #ifndef _FFB_DD_H
 #define _FFB_DD_H
 
-#include "context.h"
+#include "main/context.h"
 
 void ffbDDInitDriverFuncs(GLcontext *ctx);
 void ffbDDExtensionsInit(GLcontext *ctx);
diff --git a/src/mesa/drivers/dri/ffb/ffb_depth.c b/src/mesa/drivers/dri/ffb/ffb_depth.c
index cca6212f501..71f204d21e2 100644
--- a/src/mesa/drivers/dri/ffb/ffb_depth.c
+++ b/src/mesa/drivers/dri/ffb/ffb_depth.c
@@ -25,7 +25,7 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
@@ -33,7 +33,6 @@
 #include "ffb_depth.h"
 #include "ffb_lock.h"
 
-#include "swrast/swrast.h"
 
 #undef DEPTH_TRACE
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_lines.c b/src/mesa/drivers/dri/ffb/ffb_lines.c
index 82947014644..19dff509354 100644
--- a/src/mesa/drivers/dri/ffb/ffb_lines.c
+++ b/src/mesa/drivers/dri/ffb/ffb_lines.c
@@ -25,8 +25,9 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
+#include "main/extensions.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_depth.h"
@@ -35,7 +36,6 @@
 #include "ffb_lines.h"
 #include "ffb_tris.h"
 #include "ffb_lock.h"
-#include "extensions.h"
 
 #undef FFB_LINE_TRACE
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_linetmp.h b/src/mesa/drivers/dri/ffb/ffb_linetmp.h
index e9d8260e1aa..10e1375259b 100644
--- a/src/mesa/drivers/dri/ffb/ffb_linetmp.h
+++ b/src/mesa/drivers/dri/ffb/ffb_linetmp.h
@@ -1,5 +1,5 @@
 
-static __inline void TAG(ffb_line)(GLcontext *ctx, ffb_vertex *v0, 
+static INLINE void TAG(ffb_line)(GLcontext *ctx, ffb_vertex *v0, 
 				   ffb_vertex *v1 )
 {
 	ffbContextPtr fmesa = FFB_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/ffb/ffb_points.c b/src/mesa/drivers/dri/ffb/ffb_points.c
index d00255ccee5..9c37a47aeb9 100644
--- a/src/mesa/drivers/dri/ffb/ffb_points.c
+++ b/src/mesa/drivers/dri/ffb/ffb_points.c
@@ -25,7 +25,7 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "ffb_dd.h"
 #include "ffb_context.h"
 #include "ffb_vb.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_pointtmp.h b/src/mesa/drivers/dri/ffb/ffb_pointtmp.h
index 2c91426b3a2..3003de70c69 100644
--- a/src/mesa/drivers/dri/ffb/ffb_pointtmp.h
+++ b/src/mesa/drivers/dri/ffb/ffb_pointtmp.h
@@ -1,5 +1,5 @@
 
-static __inline void TAG(ffb_draw_point)(GLcontext *ctx, ffb_vertex *tmp )
+static INLINE void TAG(ffb_draw_point)(GLcontext *ctx, ffb_vertex *tmp )
 {
 	ffbContextPtr fmesa = FFB_CONTEXT(ctx);
 	ffb_fbcPtr ffb = fmesa->regs;
diff --git a/src/mesa/drivers/dri/ffb/ffb_span.c b/src/mesa/drivers/dri/ffb/ffb_span.c
index 59ac4146786..0d3d6040955 100644
--- a/src/mesa/drivers/dri/ffb/ffb_span.c
+++ b/src/mesa/drivers/dri/ffb/ffb_span.c
@@ -25,7 +25,7 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_context.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_state.c b/src/mesa/drivers/dri/ffb/ffb_state.c
index 880ad8be0a8..ee0fe4e0dbe 100644
--- a/src/mesa/drivers/dri/ffb/ffb_state.c
+++ b/src/mesa/drivers/dri/ffb/ffb_state.c
@@ -25,9 +25,18 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
-#include "colormac.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/mm.h"
+#include "main/extensions.h"
+#include "main/enums.h"
+
+#include "vbo/vbo.h"
+#include "tnl/tnl.h"
+#include "tnl/t_pipeline.h"
+#include "swrast/swrast.h"
+#include "swrast_setup/swrast_setup.h"
+
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_depth.h"
@@ -36,15 +45,6 @@
 #include "ffb_tris.h"
 #include "ffb_state.h"
 #include "ffb_lock.h"
-#include "extensions.h"
-#include "enums.h"
-
-#include "swrast/swrast.h"
-#include "vbo/vbo.h"
-#include "tnl/tnl.h"
-#include "swrast_setup/swrast_setup.h"
-
-#include "tnl/t_pipeline.h"
 
 #undef STATE_TRACE
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_stencil.c b/src/mesa/drivers/dri/ffb/ffb_stencil.c
index d535b1b7781..921a83d2742 100644
--- a/src/mesa/drivers/dri/ffb/ffb_stencil.c
+++ b/src/mesa/drivers/dri/ffb/ffb_stencil.c
@@ -25,7 +25,7 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "ffb_dd.h"
 #include "ffb_span.h"
 #include "ffb_context.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_tex.c b/src/mesa/drivers/dri/ffb/ffb_tex.c
index 6503b0f4e78..69d30aedbaf 100644
--- a/src/mesa/drivers/dri/ffb/ffb_tex.c
+++ b/src/mesa/drivers/dri/ffb/ffb_tex.c
@@ -25,8 +25,8 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
 #include "ffb_tex.h"
 
 /* No texture unit, all software. */
diff --git a/src/mesa/drivers/dri/ffb/ffb_tris.c b/src/mesa/drivers/dri/ffb/ffb_tris.c
index c2857f61bde..d785c157181 100644
--- a/src/mesa/drivers/dri/ffb/ffb_tris.c
+++ b/src/mesa/drivers/dri/ffb/ffb_tris.c
@@ -25,12 +25,12 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
 #include "swrast/s_context.h"
+#include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_vb.c b/src/mesa/drivers/dri/ffb/ffb_vb.c
index edc9d791243..f9c6fd1f310 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vb.c
+++ b/src/mesa/drivers/dri/ffb/ffb_vb.c
@@ -28,7 +28,7 @@
 #include "ffb_xmesa.h"
 #include "ffb_context.h"
 #include "ffb_vb.h"
-#include "imports.h"
+#include "main/imports.h"
 #include "tnl/t_context.h"
 #include "swrast_setup/swrast_setup.h"
 #include "math/m_translate.h"
diff --git a/src/mesa/drivers/dri/ffb/ffb_vb.h b/src/mesa/drivers/dri/ffb/ffb_vb.h
index af669bce307..238b9940bfa 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vb.h
+++ b/src/mesa/drivers/dri/ffb/ffb_vb.h
@@ -2,8 +2,8 @@
 #ifndef _FFB_VB_H
 #define _FFB_VB_H
 
-#include "mtypes.h"
-#include "macros.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "tnl/t_context.h"
 #include "swrast/swrast.h"
 
diff --git a/src/mesa/drivers/dri/ffb/ffb_vtxfmt.c b/src/mesa/drivers/dri/ffb/ffb_vtxfmt.c
index 8b60f095c96..90f44b0e911 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vtxfmt.c
+++ b/src/mesa/drivers/dri/ffb/ffb_vtxfmt.c
@@ -25,27 +25,23 @@
  *    David S. Miller <davem@redhat.com>
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "api_noop.h"
-#include "context.h"
+#include "main/context.h"
 #include "light.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "simple_list.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
 #include "vtxfmt.h"
 #include "ffb_xmesa.h"
 #include "ffb_context.h"
 #include "ffb_vb.h"
 #include "tnl/tnl.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 
 #include "ffb_vtxfmt.h"
 
-#ifndef __GNUC__
-#define __inline  /**/
-#endif
-
 #define TNL_VERTEX			ffbTnlVertex
 
 #define INTERP_RGBA(t, out, a, b)		\
@@ -60,7 +56,7 @@ do {						\
 
 /* Color functions: */
 
-static __inline void ffb_recalc_base_color(GLcontext *ctx)
+static INLINE void ffb_recalc_base_color(GLcontext *ctx)
 {
 	ffbContextPtr fmesa = FFB_CONTEXT(ctx);
 	struct gl_light *light;
diff --git a/src/mesa/drivers/dri/ffb/ffb_xmesa.c b/src/mesa/drivers/dri/ffb/ffb_xmesa.c
index a31cd57e882..679f8561d24 100644
--- a/src/mesa/drivers/dri/ffb/ffb_xmesa.c
+++ b/src/mesa/drivers/dri/ffb/ffb_xmesa.c
@@ -26,12 +26,12 @@
  */
 
 #include "ffb_xmesa.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "matrix.h"
-#include "renderbuffer.h"
-#include "simple_list.h"
-#include "imports.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+#include "main/matrix.h"
+#include "main/renderbuffer.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
 #include "utils.h"
 
 #include "swrast/swrast.h"
@@ -226,7 +226,7 @@ ffbCreateContext(const __GLcontextModes *mesaVis,
 	fmesa->driScreen = sPriv;
 	fmesa->ffb_sarea = FFB_DRISHARE(sPriv->pSAREA);
 
-	/* Register and framebuffer hw pointers. */
+	/* Register and framebuffer pointers. */
 	fmesa->regs = ffbScreen->regs;
 	fmesa->sfb32 = ffbScreen->sfb32;
 
@@ -604,35 +604,18 @@ void ffbXMesaUpdateState(ffbContextPtr fmesa)
 	}
 }
 
-static const struct __DriverAPIRec ffbAPI = {
-   .InitDriver      = ffbInitDriver,
-   .DestroyScreen   = ffbDestroyScreen,
-   .CreateContext   = ffbCreateContext,
-   .DestroyContext  = ffbDestroyContext,
-   .CreateBuffer    = ffbCreateBuffer,
-   .DestroyBuffer   = ffbDestroyBuffer,
-   .SwapBuffers     = ffbSwapBuffers,
-   .MakeCurrent     = ffbMakeCurrent,
-   .UnbindContext   = ffbUnbindContext,
-   .GetSwapInfo     = NULL,
-   .GetMSC          = NULL,
-   .WaitForMSC      = NULL,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL
-};
-
-
-static __GLcontextModes *
-ffbFillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
+static const __DRIconfig **
+ffbFillInModes( __DRIscreenPrivate *psp,
+		unsigned pixel_bits, unsigned depth_bits,
+		unsigned stencil_bits, GLboolean have_back_buffer )
 {
-   __GLcontextModes * modes;
-   __GLcontextModes * m;
-   unsigned num_modes;
+   __DRIconfig **configs;
+   __GLcontextModes *m;
    unsigned depth_buffer_factor;
    unsigned back_buffer_factor;
    GLenum fb_format;
    GLenum fb_type;
+   int i;
 
    /* GLX_SWAP_COPY_OML is only supported because the FFB driver doesn't
     * support pageflipping at all.
@@ -644,7 +627,6 @@ ffbFillInModes( unsigned pixel_bits, unsigned depth_bits,
    uint8_t depth_bits_array[3];
    uint8_t stencil_bits_array[3];
 
-
    depth_bits_array[0] = 0;
    depth_bits_array[1] = depth_bits;
    depth_bits_array[2] = depth_bits;
@@ -660,8 +642,6 @@ ffbFillInModes( unsigned pixel_bits, unsigned depth_bits,
    depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
    back_buffer_factor  = (have_back_buffer) ? 3 : 1;
 
-   num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -671,82 +651,68 @@ ffbFillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-   modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-   m = modes;
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-   }
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_DIRECT_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
+   configs = driCreateConfigs(fb_format, fb_type,
+			      depth_bits_array, stencil_bits_array,
+			      depth_buffer_factor, back_buffer_modes,
+			      back_buffer_factor);
+   if (configs == NULL) {
+    fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+              __LINE__);
+      return NULL;
    }
 
-
    /* Mark the visual as slow if there are "fake" stencil bits.
     */
-   for ( m = modes ; m != NULL ; m = m->next ) {
-      if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
-	 m->visualRating = GLX_SLOW_CONFIG;
+   for (i = 0; configs[i]; i++) {
+      m = &configs[i]->modes;
+      if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
+         m->visualRating = GLX_SLOW_CONFIG;
       }
    }
 
-   return modes;
+   return (const __DRIconfig **) configs;
 }
 
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
+static const __DRIconfig **
+ffbInitScreen(__DRIscreen *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 0, 1, 1 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 0, 0, 1 };
 
-   dri_interface = interface;
-
    if ( ! driCheckDriDdxDrmVersions2( "ffb",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
 
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &ffbAPI);
-   if ( psp != NULL ) {
-      *driver_modes = ffbFillInModes( 32, 16, 0, GL_TRUE );
-   }
+   if (!ffbInitDriver(psp))
+       return NULL;
 
-   return (void *) psp;
+   return ffbFillInModes( psp, 32, 16, 0, GL_TRUE );
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = ffbInitScreen,
+   .DestroyScreen   = ffbDestroyScreen,
+   .CreateContext   = ffbCreateContext,
+   .DestroyContext  = ffbDestroyContext,
+   .CreateBuffer    = ffbCreateBuffer,
+   .DestroyBuffer   = ffbDestroyBuffer,
+   .SwapBuffers     = ffbSwapBuffers,
+   .MakeCurrent     = ffbMakeCurrent,
+   .UnbindContext   = ffbUnbindContext,
+   .GetSwapInfo     = NULL,
+   .GetDrawableMSC  = NULL,
+   .WaitForMSC      = NULL,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL
+};
diff --git a/src/mesa/drivers/dri/ffb/ffb_xmesa.h b/src/mesa/drivers/dri/ffb/ffb_xmesa.h
index bc8cfe9f217..255da4c5f84 100644
--- a/src/mesa/drivers/dri/ffb/ffb_xmesa.h
+++ b/src/mesa/drivers/dri/ffb/ffb_xmesa.h
@@ -4,7 +4,7 @@
 
 #include <sys/time.h>
 #include "dri_util.h"
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "ffb_drishare.h"
 #include "ffb_regs.h"
 #include "ffb_dac.h"
diff --git a/src/mesa/drivers/dri/gamma/gamma_context.c b/src/mesa/drivers/dri/gamma/gamma_context.c
index b1dcbfcdcfa..c91bedce3a8 100644
--- a/src/mesa/drivers/dri/gamma/gamma_context.c
+++ b/src/mesa/drivers/dri/gamma/gamma_context.c
@@ -24,7 +24,7 @@
  * 3DLabs Gamma driver.
  *
  */
-#include "gamma_context.h"
+#include "gammacontext.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -35,16 +35,16 @@
 
 #include "drivers/common/driverfuncs.h"
 
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
 #if defined(USE_X86_ASM)
 #include "x86/common_x86_asm.h"
 #endif
-#include "simple_list.h"
-#include "mm.h"
+#include "main/simple_list.h"
+#include "main/mm.h"
 
 
 #include "gamma_vb.h"
diff --git a/src/mesa/drivers/dri/gamma/gamma_context.h b/src/mesa/drivers/dri/gamma/gamma_context.h
index 86af674ae75..a32ccb6007b 100644
--- a/src/mesa/drivers/dri/gamma/gamma_context.h
+++ b/src/mesa/drivers/dri/gamma/gamma_context.h
@@ -31,12 +31,12 @@
 #include "drm_sarea.h"
 #include "colormac.h"
 #include "gamma_regs.h"
-#include "gamma_macros.h"
+#include "gamma_main/macros.h"
 #include "gamma_screen.h"
-#include "macros.h"
-#include "mtypes.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
 #include "glint_dri.h"
-#include "mm.h"
+#include "main/mm.h"
 
 typedef union {
     unsigned int i;
@@ -383,7 +383,7 @@ struct gamma_context {
     int                 TextureCount;
 };
 
-static __inline GLuint gammaPackColor( GLuint cpp,
+static INLINE GLuint gammaPackColor( GLuint cpp,
 					GLubyte r, GLubyte g,
 					GLubyte b, GLubyte a )
 {
diff --git a/src/mesa/drivers/dri/gamma/gamma_dd.c b/src/mesa/drivers/dri/gamma/gamma_dd.c
index 63e3ab8fa5d..7a81ef59937 100644
--- a/src/mesa/drivers/dri/gamma/gamma_dd.c
+++ b/src/mesa/drivers/dri/gamma/gamma_dd.c
@@ -23,14 +23,14 @@
  *
  */
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_vb.h"
 #include "gamma_lock.h"
 #if defined(USE_X86_ASM)
 #include "x86/common_x86_asm.h"
 #endif
 
-#include "context.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
 
 #define GAMMA_DATE	"20021125"
diff --git a/src/mesa/drivers/dri/gamma/gamma_inithw.c b/src/mesa/drivers/dri/gamma/gamma_inithw.c
index 79b54aacb5f..525ad89354b 100644
--- a/src/mesa/drivers/dri/gamma/gamma_inithw.c
+++ b/src/mesa/drivers/dri/gamma/gamma_inithw.c
@@ -24,7 +24,7 @@
  *
  */
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "glint_dri.h"
 
 void gammaInitHW( gammaContextPtr gmesa )
diff --git a/src/mesa/drivers/dri/gamma/gamma_lock.c b/src/mesa/drivers/dri/gamma/gamma_lock.c
index 97eea75541e..8f2d01688c9 100644
--- a/src/mesa/drivers/dri/gamma/gamma_lock.c
+++ b/src/mesa/drivers/dri/gamma/gamma_lock.c
@@ -1,5 +1,5 @@
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_lock.h"
 #include "drirenderbuffer.h"
 
diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c
index 9180ef925d0..1b9fd169f46 100644
--- a/src/mesa/drivers/dri/gamma/gamma_render.c
+++ b/src/mesa/drivers/dri/gamma/gamma_render.c
@@ -25,15 +25,15 @@
  *
  */
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_tris.h"
 #include "gamma_vb.h"
 
@@ -129,13 +129,13 @@ static const GLuint hw_prim[GL_POLYGON+1] = {
    B_PrimType_Polygon
 };
 
-static __inline void gammaStartPrimitive( gammaContextPtr gmesa, GLenum prim )
+static INLINE void gammaStartPrimitive( gammaContextPtr gmesa, GLenum prim )
 {
    CHECK_DMA_BUFFER(gmesa, 1);
    WRITE(gmesa->buf, Begin, gmesa->Begin | hw_prim[prim]);
 }
 
-static __inline void gammaEndPrimitive( gammaContextPtr gmesa )
+static INLINE void gammaEndPrimitive( gammaContextPtr gmesa )
 {
    GLcontext *ctx = gmesa->glCtx;
 
@@ -193,7 +193,7 @@ static GLboolean gamma_run_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/gamma/gamma_screen.c b/src/mesa/drivers/dri/gamma/gamma_screen.c
index 0b91d059e92..f899ebec96d 100644
--- a/src/mesa/drivers/dri/gamma/gamma_screen.c
+++ b/src/mesa/drivers/dri/gamma/gamma_screen.c
@@ -23,11 +23,11 @@
  *
  */
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_vb.h"
 #include "glint_dri.h"
 
-#include "imports.h"
+#include "main/imports.h"
 
 gammaScreenPtr gammaCreateScreen( __DRIscreenPrivate *sPriv )
 {
diff --git a/src/mesa/drivers/dri/gamma/gamma_span.c b/src/mesa/drivers/dri/gamma/gamma_span.c
index ea9a20595c9..cdaaac3f3ac 100644
--- a/src/mesa/drivers/dri/gamma/gamma_span.c
+++ b/src/mesa/drivers/dri/gamma/gamma_span.c
@@ -1,5 +1,5 @@
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_lock.h"
 #include "colormac.h"
 
@@ -111,6 +111,8 @@ do {									\
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d;
 
@@ -124,6 +126,8 @@ do {									\
 #if 0 /* Unused */
 /* 32 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = d;
 
@@ -137,6 +141,8 @@ do {									\
 
 /* 24/8 bit interleaved depth/stencil functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) {			\
    GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
    tmp &= 0xff;						\
diff --git a/src/mesa/drivers/dri/gamma/gamma_state.c b/src/mesa/drivers/dri/gamma/gamma_state.c
index 9e7626a6fd3..59272f9bc91 100644
--- a/src/mesa/drivers/dri/gamma/gamma_state.c
+++ b/src/mesa/drivers/dri/gamma/gamma_state.c
@@ -24,10 +24,10 @@
  * 3DLabs Gamma driver
  */
 
-#include "gamma_context.h"
-#include "gamma_macros.h"
+#include "gammacontext.h"
+#include "gamma_main/macros.h"
 #include "buffers.h"
-#include "macros.h"
+#include "main/macros.h"
 #include "glint_dri.h"
 #include "colormac.h"
 #include "swrast/swrast.h"
diff --git a/src/mesa/drivers/dri/gamma/gamma_tex.c b/src/mesa/drivers/dri/gamma/gamma_tex.c
index 3b4ee4e581c..2ffb790f28a 100644
--- a/src/mesa/drivers/dri/gamma/gamma_tex.c
+++ b/src/mesa/drivers/dri/gamma/gamma_tex.c
@@ -2,19 +2,19 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texstore.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/texstore.h"
 #include "teximage.h"
-#include "texformat.h"
+#include "main/texformat.h"
 #include "texobj.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
-#include "gamma_context.h"
+#include "main/mm.h"
+#include "gammacontext.h"
 #include "colormac.h"
 
 
diff --git a/src/mesa/drivers/dri/gamma/gamma_texmem.c b/src/mesa/drivers/dri/gamma/gamma_texmem.c
index 94ecb5c2f61..4cb47e179ee 100644
--- a/src/mesa/drivers/dri/gamma/gamma_texmem.c
+++ b/src/mesa/drivers/dri/gamma/gamma_texmem.c
@@ -2,16 +2,16 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "colormac.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "glint_dri.h"
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_lock.h"
 
 void gammaDestroyTexObj(gammaContextPtr gmesa, gammaTextureObjectPtr t)
diff --git a/src/mesa/drivers/dri/gamma/gamma_texstate.c b/src/mesa/drivers/dri/gamma/gamma_texstate.c
index b9bd6d4cee0..b3a318d581b 100644
--- a/src/mesa/drivers/dri/gamma/gamma_texstate.c
+++ b/src/mesa/drivers/dri/gamma/gamma_texstate.c
@@ -2,14 +2,14 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-
-#include "mm.h"
-#include "gamma_context.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+
+#include "main/mm.h"
+#include "gammacontext.h"
 
 static void gammaSetTexImages( gammaContextPtr gmesa, 
 			      struct gl_texture_object *tObj )
diff --git a/src/mesa/drivers/dri/gamma/gamma_tris.c b/src/mesa/drivers/dri/gamma/gamma_tris.c
index 83bf56a141a..2903daf3f12 100644
--- a/src/mesa/drivers/dri/gamma/gamma_tris.c
+++ b/src/mesa/drivers/dri/gamma/gamma_tris.c
@@ -25,19 +25,19 @@
  * 3DLabs Gamma driver.
  */
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_vb.h"
 #include "gamma_tris.h"
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "colormac.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 #include "tnl/t_pipeline.h"
 
 
diff --git a/src/mesa/drivers/dri/gamma/gamma_vb.c b/src/mesa/drivers/dri/gamma/gamma_vb.c
index f23f585fc02..23ca0714c59 100644
--- a/src/mesa/drivers/dri/gamma/gamma_vb.c
+++ b/src/mesa/drivers/dri/gamma/gamma_vb.c
@@ -25,17 +25,17 @@
  * 3DLabs Gamma driver.
  */
  
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
 #include "colormac.h"
 
 #include "swrast_setup/swrast_setup.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 #include "tnl/tnl.h"
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_vb.h"
 #include "gamma_tris.h"
 
diff --git a/src/mesa/drivers/dri/gamma/gamma_vb.h b/src/mesa/drivers/dri/gamma/gamma_vb.h
index feda25c4c6d..8701226f590 100644
--- a/src/mesa/drivers/dri/gamma/gamma_vb.h
+++ b/src/mesa/drivers/dri/gamma/gamma_vb.h
@@ -28,7 +28,7 @@
 #ifndef GAMMAVB_INC
 #define GAMMAVB_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 
 #define _GAMMA_NEW_VERTEX (_NEW_TEXTURE |		\
diff --git a/src/mesa/drivers/dri/gamma/gamma_xmesa.c b/src/mesa/drivers/dri/gamma/gamma_xmesa.c
index 4c0ebe18992..2a28902e1e9 100644
--- a/src/mesa/drivers/dri/gamma/gamma_xmesa.c
+++ b/src/mesa/drivers/dri/gamma/gamma_xmesa.c
@@ -24,10 +24,10 @@
  * 3DLabs Gamma driver
  */
 
-#include "gamma_context.h"
+#include "gammacontext.h"
 #include "gamma_vb.h"
-#include "context.h"
-#include "matrix.h"
+#include "main/context.h"
+#include "main/matrix.h"
 #include "glint_dri.h"
 
 #include "swrast/swrast.h"
@@ -237,7 +237,7 @@ gammaUnbindContext( __DRIcontextPrivate *driContextPriv )
    return GL_TRUE;
 }
 
-static struct __DriverAPIRec gammaAPI = {
+const struct __DriverAPIRec driDriverAPI = {
    gammaInitDriver,
    gammaDestroyScreen,
    gammaCreateContext,
diff --git a/src/mesa/drivers/dri/glcore/glcore_driver.c b/src/mesa/drivers/dri/glcore/glcore_driver.c
deleted file mode 100644
index 25778160419..00000000000
--- a/src/mesa/drivers/dri/glcore/glcore_driver.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright 2006 Red Hat, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * This implements a software-only "DRI" driver.  It doesn't actually speak
- * any DRI protocol or talk to the DRM, it just looks enough like a DRI driver
- * that libglx in the server can load it for software rendering in the
- * unaccelerated case.
- */
-
-static GLboolean
-glcoreInitDriver(__DRIscreenPrivate *driScreenPriv)
-{
-}
-
-static void
-glcoreDestroyScreen(__DRIScreenPrivate *driScreenPriv)
-{
-}
-
-static GLboolean
-glcoreCreateContext(const __GLcontextModes *glVisual,
-                    __DRIcontextPrivate *driContextPriv,
-                    void *shared_context)
-{
-}
-
-static void
-glcoreDestroyContext(__DRIcontextPrivate *driContextPriv)
-{
-}
-
-static GLboolean
-glcoreCreateBuffer(__DRIscreenPrivate *driScreenPriv,
-                   __DRIdrawablePrivate *driDrawablePriv,
-                   const __GLcontextModes *mesaVisual,
-                   GLboolean isPixmap)
-{
-}
-
-static void
-glcoreDestroyBuffer(__DRIdrawablePrivate *driDrawablePriv)
-{
-}
-
-static void
-glcoreSwapBuffers(__DRIdrawablePrivate *driDrawablePriv)
-{
-}
-
-static GLboolean
-glcoreMakeCurrent(__DRIcontextPrivate *driContextPriv,
-                  __DRIdrawablePrivate *driDrawablePriv,
-                  __DRIdrawablePrivate *driReadablePriv)
-{
-}
-
-static GLboolean
-glcoreUnbindContext(__DRIcontextPrivate *driContextPriv)
-{
-}
-
-static struct __DriverAPIRec glcore_api = {
-    .InitDriver     = glcoreInitDriver,
-    .DestroyScreen  = glcoreDestroyScreen,
-    .CreateContext  = glcoreCreateContext,
-    .DestroyContext = glcoreDestroyContext,
-    .CreateBuffer   = glcoreCreateBuffer,
-    .DestroyBuffer  = glcoreDestroyBuffer,
-    .SwapBuffers    = glcoreSwapBuffers,
-    .MakeCurrent    = glcoreMakeCurrent,
-    .UnbindContext  = glcoreUnbindContext,
-};  
-
-static __GLcontextModes *
-glcoreFillInModes(unsigned pixel_bits)
-{
-}
-
-PUBLIC void *
-__driCreateNewScreen_20050727(__DRInativeDisplay *dpy, int scrn,
-                              __DRIscreen *psc, const __GLcontextModes *modes,
-                              const __DRIversion *ddx_version,
-                              const __DRIversion *dri_version,
-                              const __DRIversion *drm_version,
-                              const __DRIframebuffer *fb, drmAddress pSarea,
-                              int fd, int internal_api_version,
-                              const ___DRIinterfaceMethods *interface,
-                              __GLcontextModes **driver_modes)
-{
-    __DRIscreenPrivate *driScreenPriv;
-    glcoreDriverPrivate *glcoreDriverPriv;
-    
-    /* would normally check ddx/dri/drm versions here */
-
-    driScreenPriv = __driUtilCreateNewScreen(dpy, scrn, psc, NULL, ddx_version,
-                                             dri_version, drm_version, fb,
-                                             internal_api_version, &glcore_api);
-    if (!driScreenPriv)
-        return NULL;
-
-    glcoreDriverPriv = driScreenPriv->pDrvPriv;
-
-    *driver_modes = glcoreFillInModes(glcoreDriverPriv->bpp);
-
-    driInitExtensions(NULL, NULL, GL_FALSE);
-
-    return driScreenPriv;
-}
diff --git a/src/mesa/drivers/dri/i810/i810context.c b/src/mesa/drivers/dri/i810/i810context.c
index f90b3682f83..c281a4990e4 100644
--- a/src/mesa/drivers/dri/i810/i810context.c
+++ b/src/mesa/drivers/dri/i810/i810context.c
@@ -32,14 +32,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 
-#include "glheader.h"
-#include "context.h"
-#include "matrix.h"
-#include "simple_list.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "imports.h"
-#include "points.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/matrix.h"
+#include "main/simple_list.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/imports.h"
+#include "main/points.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -423,11 +423,11 @@ void i810XMesaSetBackClipRects( i810ContextPtr imesa )
 static void i810XMesaWindowMoved( i810ContextPtr imesa )
 {
    /* Determine current color drawing buffer */
-   switch (imesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0]) {
-   case BUFFER_BIT_FRONT_LEFT:
+   switch (imesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
+   case BUFFER_FRONT_LEFT:
       i810XMesaSetFrontClipRects( imesa );
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       i810XMesaSetBackClipRects( imesa );
       break;
    default:
@@ -485,11 +485,11 @@ i810UpdatePageFlipping( i810ContextPtr imesa )
    int front = 0;
 
    /* Determine current color drawing buffer */
-   switch (ctx->DrawBuffer->_ColorDrawBufferMask[0]) {
-   case BUFFER_BIT_FRONT_LEFT:
+   switch (ctx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
+   case BUFFER_FRONT_LEFT:
       front = 1;
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       front = 0;
       break;
    default:
diff --git a/src/mesa/drivers/dri/i810/i810context.h b/src/mesa/drivers/dri/i810/i810context.h
index 47080420595..4b8c71d7c6c 100644
--- a/src/mesa/drivers/dri/i810/i810context.h
+++ b/src/mesa/drivers/dri/i810/i810context.h
@@ -30,8 +30,8 @@ typedef struct i810_context_t *i810ContextPtr;
 typedef struct i810_texture_object_t *i810TextureObjectPtr;
 
 #include "drm.h"
-#include "mtypes.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
 
 #include "i810screen.h"
 #include "i810tex.h"
diff --git a/src/mesa/drivers/dri/i810/i810ioctl.c b/src/mesa/drivers/dri/i810/i810ioctl.c
index 95726fb2525..3df9c2ac478 100644
--- a/src/mesa/drivers/dri/i810/i810ioctl.c
+++ b/src/mesa/drivers/dri/i810/i810ioctl.c
@@ -1,17 +1,17 @@
 
 #include <unistd.h> /* for usleep() */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/dd.h"
 #include "swrast/swrast.h"
-#include "mm.h"
+#include "main/mm.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
 
-#include "i810context.h"
+#include "main/context.h"
 #include "i810ioctl.h"
 #include "i810state.h"
 
diff --git a/src/mesa/drivers/dri/i810/i810ioctl.h b/src/mesa/drivers/dri/i810/i810ioctl.h
index 748d29ae36a..dfd6e210889 100644
--- a/src/mesa/drivers/dri/i810/i810ioctl.h
+++ b/src/mesa/drivers/dri/i810/i810ioctl.h
@@ -33,7 +33,7 @@ do {								\
    }								\
 } while (0)
 
-static __inline GLuint *i810AllocDmaLow( i810ContextPtr imesa, int bytes )
+static INLINE GLuint *i810AllocDmaLow( i810ContextPtr imesa, int bytes )
 {
    if (imesa->vertex_low + bytes > imesa->vertex_high) 
       i810FlushPrimsGetBuffer( imesa );
diff --git a/src/mesa/drivers/dri/i810/i810render.c b/src/mesa/drivers/dri/i810/i810render.c
index a31d54236cb..1d98e006885 100644
--- a/src/mesa/drivers/dri/i810/i810render.c
+++ b/src/mesa/drivers/dri/i810/i810render.c
@@ -31,11 +31,11 @@
  * dma buffers.  Use strip/fan hardware acceleration where possible.
  *
  */
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
 #include "tnl/t_context.h"
 
@@ -144,7 +144,7 @@ static GLboolean i810_run_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/i810/i810screen.c b/src/mesa/drivers/dri/i810/i810screen.c
index 733c97b2ad4..48603f5d79f 100644
--- a/src/mesa/drivers/dri/i810/i810screen.c
+++ b/src/mesa/drivers/dri/i810/i810screen.c
@@ -32,14 +32,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "fbobject.h"
-#include "matrix.h"
-#include "renderbuffer.h"
-#include "simple_list.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+#include "main/fbobject.h"
+#include "main/matrix.h"
+#include "main/renderbuffer.h"
+#include "main/simple_list.h"
 #include "utils.h"
 
 #include "i810screen.h"
@@ -55,77 +55,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 extern const struct dri_extension card_extensions[];
 
-static __GLcontextModes *fill_in_modes( __GLcontextModes *modes,
-				       unsigned pixel_bits,
-				       unsigned depth_bits,
-				       unsigned stencil_bits,
-				       const GLenum * db_modes,
-				       unsigned num_db_modes,
-				       int visType )
-{
-    static const uint8_t bits[1][4] = {
-	{          5,          6,          5,          0 }
-    };
-
-    static const uint32_t masks[1][4] = {
-	{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }
-    };
-
-    unsigned   i;
-    unsigned   j;
-    const unsigned index = 0;
-
-    for ( i = 0 ; i < num_db_modes ; i++ ) {
-	for ( j = 0 ; j < 2 ; j++ ) {
-
-	    modes->redBits   = bits[index][0];
-	    modes->greenBits = bits[index][1];
-	    modes->blueBits  = bits[index][2];
-	    modes->alphaBits = bits[index][3];
-	    modes->redMask   = masks[index][0];
-	    modes->greenMask = masks[index][1];
-	    modes->blueMask  = masks[index][2];
-	    modes->alphaMask = masks[index][3];
-	    modes->rgbBits   = modes->redBits + modes->greenBits
-		+ modes->blueBits + modes->alphaBits;
-
-	    modes->accumRedBits   = 16 * j;
-	    modes->accumGreenBits = 16 * j;
-	    modes->accumBlueBits  = 16 * j;
-	    modes->accumAlphaBits = (masks[index][3] != 0) ? 16 * j : 0;
-	    modes->visualRating = (j == 0) ? GLX_NONE : GLX_SLOW_CONFIG;
-
-	    modes->stencilBits = stencil_bits;
-	    modes->depthBits = depth_bits;
-
-	    modes->visualType = visType;
-	    modes->renderType = GLX_RGBA_BIT;
-	    modes->drawableType = GLX_WINDOW_BIT;
-	    modes->rgbMode = GL_TRUE;
-
-	    if ( db_modes[i] == GLX_NONE ) {
-		modes->doubleBufferMode = GL_FALSE;
-	    }
-	    else {
-		modes->doubleBufferMode = GL_TRUE;
-		modes->swapMethod = db_modes[i];
-	    }
-
-	    modes = modes->next;
-	}
-    }
-
-    return modes;
-
-}
-
-
-static __GLcontextModes *
-i810FillInModes( unsigned pixel_bits, unsigned depth_bits,
+static const __DRIconfig **
+i810FillInModes( __DRIscreenPrivate *psp,
+		 unsigned pixel_bits, unsigned depth_bits,
 		 unsigned stencil_bits, GLboolean have_back_buffer )
-{    __GLcontextModes * modes;
+{
+    __DRIconfig **configs;
     __GLcontextModes * m;
-    unsigned num_modes;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     unsigned i;
@@ -139,50 +75,42 @@ i810FillInModes( unsigned pixel_bits, unsigned depth_bits,
 	GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
     };
 
-    int depth_buffer_modes[2][2];
+    uint8_t depth_bits_array[2];
+    uint8_t stencil_bits_array[2];
 
-
-    depth_buffer_modes[0][0] = depth_bits;
-    depth_buffer_modes[1][0] = depth_bits;
+    depth_bits_array[0] = depth_bits;
+    depth_bits_array[1] = depth_bits;
 
     /* Just like with the accumulation buffer, always provide some modes
      * with a stencil buffer.  It will be a sw fallback, but some apps won't
      * care about that.
      */
-    depth_buffer_modes[0][1] = 0;
-    depth_buffer_modes[1][1] = (stencil_bits == 0) ? 8 : stencil_bits;
+    stencil_bits_array[0] = 0;
+    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
 
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    for ( i = 0 ; i < depth_buffer_factor ; i++ ) {
-	m = fill_in_modes( m, pixel_bits,
-			   depth_buffer_modes[i][0], depth_buffer_modes[i][1],
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR );
-    }
-
-    for ( i = 0 ; i < depth_buffer_factor ; i++ ) {
-	m = fill_in_modes( m, pixel_bits,
-			   depth_buffer_modes[i][0], depth_buffer_modes[i][1],
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR );
+    configs = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor,
+			       back_buffer_modes, back_buffer_factor);
+    if (configs == NULL) {
+	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
+		 __func__, __LINE__ );
+	return NULL;
     }
 
     /* Mark the visual as slow if there are "fake" stencil bits.
      */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
+    for (i = 0; configs[i]; i++) {
+	m = &configs[i]->modes;
+	if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
 	    m->visualRating = GLX_SLOW_CONFIG;
 	}
     }
 
-    return modes;
-
+    return (const __DRIconfig **) configs;
 }
 
      
@@ -218,12 +146,24 @@ static drmBufMapPtr i810_create_empty_buffers(void)
 }
 
 
-static GLboolean
-i810InitDriver(__DRIscreenPrivate *sPriv)
+static const __DRIconfig **
+i810InitScreen(__DRIscreen *sPriv)
 {
+   static const __DRIversion ddx_expected = { 1, 0, 0 };
+   static const __DRIversion dri_expected = { 4, 0, 0 };
+   static const __DRIversion drm_expected = { 1, 2, 0 };
    i810ScreenPrivate *i810Screen;
    I810DRIPtr         gDRIPriv = (I810DRIPtr)sPriv->pDevPriv;
 
+   if ( ! driCheckDriDdxDrmVersions2( "i810",
+				      &sPriv->dri_version, & dri_expected,
+				      &sPriv->ddx_version, & ddx_expected,
+				      &sPriv->drm_version, & drm_expected ) ) {
+      return NULL;
+   }
+
+   driInitExtensions( NULL, card_extensions, GL_TRUE );
+
    if (sPriv->devPrivSize != sizeof(I810DRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(I810DRIRec) does not match passed size from device driver\n");
       return GL_FALSE;
@@ -287,8 +227,8 @@ i810InitDriver(__DRIscreenPrivate *sPriv)
 	      i810Screen->depth.handle,
 	      i810Screen->depth.size,
 	      (drmAddress *)&i810Screen->depth.map) != 0) {
-      FREE(i810Screen);
       drmUnmap(i810Screen->back.map, i810Screen->back.size);
+      FREE(i810Screen);
       sPriv->private = NULL;
       __driUtilMessage("i810InitDriver: drmMap (2) failed");
       return GL_FALSE;
@@ -311,7 +251,7 @@ i810InitDriver(__DRIscreenPrivate *sPriv)
 
    i810Screen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
 
-   return GL_TRUE;
+   return i810FillInModes(sPriv, 16, 16, 0, 1);
 }
 
 static void
@@ -400,9 +340,8 @@ i810DestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
     _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
 }
 
-
-static const struct __DriverAPIRec i810API = {
-   .InitDriver      = i810InitDriver,
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = i810InitScreen,
    .DestroyScreen   = i810DestroyScreen,
    .CreateContext   = i810CreateContext,
    .DestroyContext  = i810DestroyContext,
@@ -412,60 +351,8 @@ static const struct __DriverAPIRec i810API = {
    .MakeCurrent     = i810MakeCurrent,
    .UnbindContext   = i810UnbindContext,
    .GetSwapInfo     = NULL,
-   .GetMSC          = NULL,
+   .GetDrawableMSC  = NULL,
    .WaitForMSC      = NULL,
    .WaitForSBC      = NULL,
    .SwapBuffersMSC  = NULL
 };
-
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- *
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd,
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-
-{
-   __DRIscreenPrivate *psp;
-   static const __DRIversion ddx_expected = { 1, 0, 0 };
-   static const __DRIversion dri_expected = { 4, 0, 0 };
-   static const __DRIversion drm_expected = { 1, 2, 0 };
-
-   dri_interface = interface;
-
-   if ( ! driCheckDriDdxDrmVersions2( "i810",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
-      return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &i810API);
-   if ( psp != NULL ) {
-      *driver_modes = i810FillInModes( 16,
-				       16, 0,
-				       1);
-      driInitExtensions( NULL, card_extensions, GL_TRUE );
-   }
-
-   return (void *) psp;
-}
diff --git a/src/mesa/drivers/dri/i810/i810span.c b/src/mesa/drivers/dri/i810/i810span.c
index 2112800eebc..510723f4456 100644
--- a/src/mesa/drivers/dri/i810/i810span.c
+++ b/src/mesa/drivers/dri/i810/i810span.c
@@ -1,14 +1,14 @@
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "swrast/swrast.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
 
 #include "i810span.h"
 #include "i810ioctl.h"
-#include "swrast/swrast.h"
 
 
 #define DBG 0
@@ -67,6 +67,8 @@ do {									\
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d ) \
    *(GLushort *)(buf + (_x)*2 + (_y)*pitch)  = d;
 
diff --git a/src/mesa/drivers/dri/i810/i810state.c b/src/mesa/drivers/dri/i810/i810state.c
index e203c74f52d..1e7a6cfe471 100644
--- a/src/mesa/drivers/dri/i810/i810state.c
+++ b/src/mesa/drivers/dri/i810/i810state.c
@@ -1,11 +1,16 @@
 
 #include <stdio.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "dd.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/dd.h"
+#include "main/colormac.h"
+#include "swrast/swrast.h"
+#include "tnl/tnl.h"
+#include "tnl/t_pipeline.h"
+#include "vbo/vbo.h"
+#include "swrast_setup/swrast_setup.h"
 
 #include "texmem.h"
 
@@ -19,14 +24,8 @@
 #include "i810tris.h"
 #include "i810ioctl.h"
 
-#include "swrast/swrast.h"
-#include "tnl/tnl.h"
-#include "vbo/vbo.h"
-#include "swrast_setup/swrast_setup.h"
-
-#include "tnl/t_pipeline.h"
 
-static __inline__ GLuint i810PackColor(GLuint format,
+static INLINE GLuint i810PackColor(GLuint format,
 				       GLubyte r, GLubyte g,
 				       GLubyte b, GLubyte a)
 {
@@ -291,18 +290,20 @@ void i810DrawBuffer(GLcontext *ctx, GLenum mode )
    i810ContextPtr imesa = I810_CONTEXT(ctx);
    int front = 0;
   
-   /*
-    * _DrawDestMask is easier to cope with than <mode>.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0]) {
-   case BUFFER_BIT_FRONT_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
+      FALLBACK( imesa, I810_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
+   case BUFFER_FRONT_LEFT:
      front = 1;
      break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
      front = 0;
      break;
    default:
-      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( imesa, I810_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
diff --git a/src/mesa/drivers/dri/i810/i810tex.c b/src/mesa/drivers/dri/i810/i810tex.c
index 730bc90eafd..ba4e6b5b0b1 100644
--- a/src/mesa/drivers/dri/i810/i810tex.c
+++ b/src/mesa/drivers/dri/i810/i810tex.c
@@ -22,20 +22,21 @@
  *
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texmem.h"
-#include "texobj.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+#include "main/colormac.h"
+#include "main/texobj.h"
+#include "main/mm.h"
 #include "swrast/swrast.h"
-#include "colormac.h"
-#include "texobj.h"
-#include "mm.h"
+
+#include "texmem.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
diff --git a/src/mesa/drivers/dri/i810/i810tex.h b/src/mesa/drivers/dri/i810/i810tex.h
index c6ab4c8e6d1..d9809270308 100644
--- a/src/mesa/drivers/dri/i810/i810tex.h
+++ b/src/mesa/drivers/dri/i810/i810tex.h
@@ -26,8 +26,8 @@
 #ifndef I810TEX_INC
 #define I810TEX_INC
 
-#include "mtypes.h"
-#include "mm.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
 
 #include "i810context.h"
 #include "i810_3d_reg.h"
diff --git a/src/mesa/drivers/dri/i810/i810texmem.c b/src/mesa/drivers/dri/i810/i810texmem.c
index 08900cc67d8..5ad66dbf5cb 100644
--- a/src/mesa/drivers/dri/i810/i810texmem.c
+++ b/src/mesa/drivers/dri/i810/i810texmem.c
@@ -23,18 +23,17 @@
  *
  */
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "colormac.h"
-#include "mm.h"
-#include "texformat.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/mm.h"
+#include "main/texformat.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
-
 #include "i810context.h"
 #include "i810tex.h"
 #include "i810state.h"
@@ -64,7 +63,7 @@ void i810DestroyTexObj(i810ContextPtr imesa, i810TextureObjectPtr t)
 /* From linux kernel i386 header files, copes with odd sizes better
  * than COPY_DWORDS would:
  */
-static __inline__ void * __memcpy(void * to, const void * from, size_t n)
+static INLINE void * __memcpy(void * to, const void * from, size_t n)
 {
 int d0, d1, d2;
 __asm__ __volatile__(
diff --git a/src/mesa/drivers/dri/i810/i810texstate.c b/src/mesa/drivers/dri/i810/i810texstate.c
index 558aef9eee4..0e09f54c41b 100644
--- a/src/mesa/drivers/dri/i810/i810texstate.c
+++ b/src/mesa/drivers/dri/i810/i810texstate.c
@@ -22,14 +22,13 @@
  *
  */
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "texformat.h"
-#include "simple_list.h"
-#include "enums.h"
-
-#include "mm.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/texformat.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/mm.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
diff --git a/src/mesa/drivers/dri/i810/i810tris.c b/src/mesa/drivers/dri/i810/i810tris.c
index 40ab436b951..b508496fb69 100644
--- a/src/mesa/drivers/dri/i810/i810tris.c
+++ b/src/mesa/drivers/dri/i810/i810tris.c
@@ -30,11 +30,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "enums.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/colormac.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -74,7 +74,7 @@ do {									\
 } while (0)
 #endif
 
-static __inline__ void i810_draw_triangle( i810ContextPtr imesa,
+static INLINE void i810_draw_triangle( i810ContextPtr imesa,
 					   i810VertexPtr v0,
 					   i810VertexPtr v1,
 					   i810VertexPtr v2 )
@@ -89,7 +89,7 @@ static __inline__ void i810_draw_triangle( i810ContextPtr imesa,
 }
 
 
-static __inline__ void i810_draw_quad( i810ContextPtr imesa,
+static INLINE void i810_draw_quad( i810ContextPtr imesa,
 				       i810VertexPtr v0,
 				       i810VertexPtr v1,
 				       i810VertexPtr v2,
@@ -108,7 +108,7 @@ static __inline__ void i810_draw_quad( i810ContextPtr imesa,
 }
 
 
-static __inline__ void i810_draw_point( i810ContextPtr imesa,
+static INLINE void i810_draw_point( i810ContextPtr imesa,
 					i810VertexPtr tmp )
 {
    GLfloat sz = 0.5 * CLAMP(imesa->glCtx->Point.Size,
@@ -132,7 +132,7 @@ static __inline__ void i810_draw_point( i810ContextPtr imesa,
 }
 
 
-static __inline__ void i810_draw_line( i810ContextPtr imesa,
+static INLINE void i810_draw_line( i810ContextPtr imesa,
 				       i810VertexPtr v0,
 				       i810VertexPtr v1 )
 {
diff --git a/src/mesa/drivers/dri/i810/i810tris.h b/src/mesa/drivers/dri/i810/i810tris.h
index 3d0dd916ca1..ab026be0a51 100644
--- a/src/mesa/drivers/dri/i810/i810tris.h
+++ b/src/mesa/drivers/dri/i810/i810tris.h
@@ -26,7 +26,7 @@
 #ifndef I810TRIS_INC
 #define I810TRIS_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void i810PrintRenderState( const char *msg, GLuint state );
 extern void i810InitTriFuncs( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/i810/i810vb.c b/src/mesa/drivers/dri/i810/i810vb.c
index 3439192b0d3..30890dc9b70 100644
--- a/src/mesa/drivers/dri/i810/i810vb.c
+++ b/src/mesa/drivers/dri/i810/i810vb.c
@@ -24,18 +24,17 @@
  */
  
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
 
 #include "i810screen.h"
 #include "i810_dri.h"
-
 #include "i810context.h"
 #include "i810vb.h"
 #include "i810ioctl.h"
diff --git a/src/mesa/drivers/dri/i810/i810vb.h b/src/mesa/drivers/dri/i810/i810vb.h
index 55d0d2409e1..1f704e45695 100644
--- a/src/mesa/drivers/dri/i810/i810vb.h
+++ b/src/mesa/drivers/dri/i810/i810vb.h
@@ -26,7 +26,7 @@
 #ifndef I810VB_INC
 #define I810VB_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 
 #define _I810_NEW_VERTEX (_NEW_TEXTURE |			\
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index 805abf75e08..5858e0ee9fd 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -7,16 +7,6 @@ LIBNAME = i915_dri.so
 MINIGLX_SOURCES = server/intel_dri.c
 
 DRIVER_SOURCES = \
-	i915_context.c \
-	i915_debug.c \
-	i915_fragprog.c \
-	i915_metaops.c \
-	i915_program.c \
-	i915_state.c \
-	i915_tex.c \
-	i915_texprog.c \
-	i915_texstate.c \
-	i915_vtbl.c \
 	i830_context.c \
 	i830_metaops.c \
 	i830_state.c \
@@ -24,18 +14,44 @@ DRIVER_SOURCES = \
 	i830_tex.c \
 	i830_texstate.c \
 	i830_vtbl.c \
+	intel_render.c \
+	intel_regions.c \
+	intel_buffer_objects.c \
 	intel_batchbuffer.c \
-	intel_context.c \
-	intel_ioctl.c \
+	intel_mipmap_tree.c \
+	i915_tex_layout.c \
+	intel_tex_layout.c \
+	intel_tex_image.c \
+	intel_tex_subimage.c \
+	intel_tex_copy.c \
+	intel_tex_validate.c \
+	intel_tex_format.c \
+	intel_tex.c \
 	intel_pixel.c \
-	intel_render.c \
-	intel_rotate.c \
+	intel_pixel_bitmap.c \
+	intel_pixel_copy.c \
+	intel_pixel_draw.c \
+	intel_pixel_read.c \
+	intel_buffers.c \
+	intel_blit.c \
+	i915_tex.c \
+	i915_texstate.c \
+	i915_context.c \
+	i915_debug.c \
+	i915_debug_fp.c \
+	i915_fragprog.c \
+	i915_metaops.c \
+	i915_program.c \
+	i915_state.c \
+	i915_vtbl.c \
+	intel_context.c \
+	intel_decode.c \
 	intel_screen.c \
 	intel_span.c \
 	intel_state.c \
-	intel_tex.c \
-	intel_texmem.c \
-	intel_tris.c 
+	intel_tris.c \
+	intel_fbo.c \
+	intel_depthstencil.c
 
 C_SOURCES = \
 	$(COMMON_SOURCES) \
@@ -43,8 +59,16 @@ C_SOURCES = \
 
 ASM_SOURCES = 
 
+DRIVER_DEFINES = -I../intel -I../intel/server -DI915 \
+	$(shell pkg-config libdrm --atleast-version=2.3.1 \
+				&& echo "-DDRM_VBLANK_FLIP=DRM_VBLANK_FLIP")
 
+DRI_LIB_DEPS += -ldrm_intel
 
 include ../Makefile.template
 
+intel_decode.o: ../intel/intel_decode.c
+
+intel_tex_layout.o: ../intel/intel_tex_layout.c
+
 symlinks:
diff --git a/src/mesa/drivers/dri/i915/i830_context.c b/src/mesa/drivers/dri/i915/i830_context.c
index 7ca601e1b5c..09b1ec922ff 100644
--- a/src/mesa/drivers/dri/i915/i830_context.c
+++ b/src/mesa/drivers/dri/i915/i830_context.c
@@ -26,99 +26,87 @@
  **************************************************************************/
 
 #include "i830_context.h"
-#include "imports.h"
+#include "main/imports.h"
 #include "texmem.h"
 #include "intel_tex.h"
 #include "tnl/tnl.h"
 #include "tnl/t_vertex.h"
 #include "tnl/t_context.h"
+#include "tnl/t_pipeline.h"
 #include "utils.h"
+#include "intel_span.h"
+#include "intel_pixel.h"
+#include "intel_tris.h"
 
 /***************************************
  * Mesa's Driver Functions
  ***************************************/
 
-static const struct dri_extension i830_extensions[] =
+static void
+i830InitDriverFunctions(struct dd_function_table *functions)
 {
-    { "GL_ARB_texture_env_crossbar",       NULL },
-    { NULL,                                NULL }
-};
-
-
-static void i830InitDriverFunctions( struct dd_function_table *functions )
-{
-   intelInitDriverFunctions( functions );
-   i830InitStateFuncs( functions );
-   i830InitTextureFuncs( functions );
+   intelInitDriverFunctions(functions);
+   i830InitStateFuncs(functions);
+   i830InitTextureFuncs(functions);
 }
 
+extern const struct tnl_pipeline_stage *intel_pipeline[];
 
-GLboolean i830CreateContext( const __GLcontextModes *mesaVis,
-			    __DRIcontextPrivate *driContextPriv,
-			    void *sharedContextPrivate)
+GLboolean
+i830CreateContext(const __GLcontextModes * mesaVis,
+                  __DRIcontextPrivate * driContextPriv,
+                  void *sharedContextPrivate)
 {
    struct dd_function_table functions;
-   i830ContextPtr i830 = (i830ContextPtr) CALLOC_STRUCT(i830_context);
-   intelContextPtr intel = &i830->intel;
+   struct i830_context *i830 = CALLOC_STRUCT(i830_context);
+   struct intel_context *intel = &i830->intel;
    GLcontext *ctx = &intel->ctx;
-   GLuint i;
-   if (!i830) return GL_FALSE;
+   if (!i830)
+      return GL_FALSE;
 
-   i830InitVtbl( i830 );
-   i830InitDriverFunctions( &functions );
+   i830InitVtbl(i830);
+   i830InitDriverFunctions(&functions);
 
-   if (!intelInitContext( intel, mesaVis, driContextPriv,
-			  sharedContextPrivate, &functions )) {
+   if (!intelInitContext(intel, mesaVis, driContextPriv,
+                         sharedContextPrivate, &functions)) {
       FREE(i830);
       return GL_FALSE;
    }
 
+   /* Initialize swrast, tnl driver tables: */
+   intelInitSpanFuncs(ctx);
+   intelInitTriFuncs(ctx);
+
+   /* Install the customized pipeline: */
+   _tnl_destroy_pipeline(ctx);
+   _tnl_install_pipeline(ctx, intel_pipeline);
+
+   if (intel->no_rast)
+      FALLBACK(intel, INTEL_FALLBACK_USER, 1);
+
    intel->ctx.Const.MaxTextureUnits = I830_TEX_UNITS;
    intel->ctx.Const.MaxTextureImageUnits = I830_TEX_UNITS;
    intel->ctx.Const.MaxTextureCoordUnits = I830_TEX_UNITS;
 
-   intel->nr_heaps = 1;
-   intel->texture_heaps[0] = 
-      driCreateTextureHeap( 0, intel,
-			    intel->intelScreen->tex.size,
-			    12,
-			    I830_NR_TEX_REGIONS,
-			    intel->sarea->texList,
-			    (unsigned *) & intel->sarea->texAge,
-			    & intel->swapped,
-			    sizeof( struct i830_texture_object ),
-			    (destroy_texture_object_t *)intelDestroyTexObj );
-
-   /* FIXME: driCalculateMaxTextureLevels assumes that mipmaps are tightly
-    * FIXME: packed, but they're not in Intel graphics hardware.
+   /* Advertise the full hardware capabilities.  The new memory
+    * manager should cope much better with overload situations:
     */
-   intel->ctx.Const.MaxTextureUnits = I830_TEX_UNITS;
-   i = driQueryOptioni( &intel->optionCache, "allow_large_textures");
-   driCalculateMaxTextureLevels( intel->texture_heaps,
-				 intel->nr_heaps,
-				 &intel->ctx.Const,
-				 4,
-				 11, /* max 2D texture size is 2048x2048 */
-				 8,  /* max 3D texture size is 256^3 */
-				 10, /* max CUBE texture size is 1024x1024 */
-				 11, /* max RECT. supported */
-				 12,
-				 GL_FALSE,
-				 i );
-
-   _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 
-		       18 * sizeof(GLfloat) );
-
-   intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf;
+   ctx->Const.MaxTextureLevels = 12;
+   ctx->Const.Max3DTextureLevels = 9;
+   ctx->Const.MaxCubeTextureLevels = 11;
+   ctx->Const.MaxTextureRectSize = (1 << 11);
+   ctx->Const.MaxTextureUnits = I830_TEX_UNITS;
 
-   driInitExtensions( ctx, i830_extensions, GL_FALSE );
+   _tnl_init_vertices(ctx, ctx->Const.MaxArrayLockSize + 12,
+                      18 * sizeof(GLfloat));
 
-   i830InitState( i830 );
+   intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf;
 
+   i830InitState(i830);
+   i830InitMetaFuncs(i830);
 
-   _tnl_allow_vertex_fog( ctx, 1 ); 
-   _tnl_allow_pixel_fog( ctx, 0 ); 
+   _tnl_allow_vertex_fog(ctx, 1);
+   _tnl_allow_pixel_fog(ctx, 0);
 
    return GL_TRUE;
 }
-
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h
index bae777dd5a4..1bdb32049d7 100644
--- a/src/mesa/drivers/dri/i915/i830_context.h
+++ b/src/mesa/drivers/dri/i915/i830_context.h
@@ -49,17 +49,21 @@
  */
 #define I830_DESTREG_CBUFADDR0 0
 #define I830_DESTREG_CBUFADDR1 1
-#define I830_DESTREG_CBUFADDR2 2
-#define I830_DESTREG_DBUFADDR0 3
-#define I830_DESTREG_DBUFADDR1 4
-#define I830_DESTREG_DBUFADDR2 5
-#define I830_DESTREG_DV0 6
-#define I830_DESTREG_DV1 7
-#define I830_DESTREG_SENABLE 8
-#define I830_DESTREG_SR0 9
-#define I830_DESTREG_SR1 10
-#define I830_DESTREG_SR2 11
-#define I830_DEST_SETUP_SIZE 12
+#define I830_DESTREG_DBUFADDR0 2
+#define I830_DESTREG_DBUFADDR1 3
+#define I830_DESTREG_DV0 4
+#define I830_DESTREG_DV1 5
+#define I830_DESTREG_SENABLE 6
+#define I830_DESTREG_SR0 7
+#define I830_DESTREG_SR1 8
+#define I830_DESTREG_SR2 9
+#define I830_DESTREG_DRAWRECT0 10
+#define I830_DESTREG_DRAWRECT1 11
+#define I830_DESTREG_DRAWRECT2 12
+#define I830_DESTREG_DRAWRECT3 13
+#define I830_DESTREG_DRAWRECT4 14
+#define I830_DESTREG_DRAWRECT5 15
+#define I830_DEST_SETUP_SIZE 16
 
 #define I830_CTXREG_STATE1		0
 #define I830_CTXREG_STATE2		1
@@ -73,7 +77,7 @@
 #define I830_CTXREG_AA			9
 #define I830_CTXREG_FOGCOLOR		10
 #define I830_CTXREG_BLENDCOLOR0		11
-#define I830_CTXREG_BLENDCOLOR1		12 
+#define I830_CTXREG_BLENDCOLOR1		12
 #define I830_CTXREG_VF			13
 #define I830_CTXREG_VF2			14
 #define I830_CTXREG_MCSB0		15
@@ -84,17 +88,16 @@
 #define I830_STPREG_ST1        1
 #define I830_STP_SETUP_SIZE    2
 
-#define I830_TEXREG_TM0LI      0 /* load immediate 2 texture map n */
-#define I830_TEXREG_TM0S0      1
-#define I830_TEXREG_TM0S1      2
-#define I830_TEXREG_TM0S2      3
-#define I830_TEXREG_TM0S3      4
-#define I830_TEXREG_TM0S4      5
-#define I830_TEXREG_MCS	       6	/* _3DSTATE_MAP_COORD_SETS */
-#define I830_TEXREG_CUBE       7	/* _3DSTATE_MAP_SUBE */
-#define I830_TEX_SETUP_SIZE    8
+#define I830_TEXREG_TM0LI      0        /* load immediate 2 texture map n */
+#define I830_TEXREG_TM0S1      1
+#define I830_TEXREG_TM0S2      2
+#define I830_TEXREG_TM0S3      3
+#define I830_TEXREG_TM0S4      4
+#define I830_TEXREG_MCS	       5        /* _3DSTATE_MAP_COORD_SETS */
+#define I830_TEXREG_CUBE       6        /* _3DSTATE_MAP_SUBE */
+#define I830_TEX_SETUP_SIZE    7
 
-#define I830_TEXBLEND_SIZE	12	/* (4 args + op) * 2 + COLOR_FACTOR */
+#define I830_TEXBLEND_SIZE	12      /* (4 args + op) * 2 + COLOR_FACTOR */
 
 struct i830_texture_object
 {
@@ -104,30 +107,39 @@ struct i830_texture_object
 
 #define I830_TEX_UNITS 4
 
-struct i830_hw_state {
+struct i830_hw_state
+{
    GLuint Ctx[I830_CTX_SETUP_SIZE];
    GLuint Buffer[I830_DEST_SETUP_SIZE];
    GLuint Stipple[I830_STP_SETUP_SIZE];
    GLuint Tex[I830_TEX_UNITS][I830_TEX_SETUP_SIZE];
    GLuint TexBlend[I830_TEX_UNITS][I830_TEXBLEND_SIZE];
    GLuint TexBlendWordsUsed[I830_TEX_UNITS];
-   GLuint emitted;		/* I810_UPLOAD_* */
+
+   struct intel_region *draw_region;
+   struct intel_region *depth_region;
+
+   /* Regions aren't actually that appropriate here as the memory may
+    * be from a PBO or FBO.  Will have to do this for draw and depth for
+    * FBO's...
+    */
+   dri_bo *tex_buffer[I830_TEX_UNITS];
+   GLuint tex_offset[I830_TEX_UNITS];
+
+   GLuint emitted;              /* I810_UPLOAD_* */
    GLuint active;
 };
 
-struct i830_context 
+struct i830_context
 {
    struct intel_context intel;
-   
-   DECLARE_RENDERINPUTS(last_index_bitset);
+
+   GLuint lodbias_tm0s3[MAX_TEXTURE_UNITS];
+     DECLARE_RENDERINPUTS(last_index_bitset);
 
    struct i830_hw_state meta, initial, state, *current;
 };
 
-typedef struct i830_context *i830ContextPtr;
-typedef struct i830_texture_object *i830TextureObjectPtr;
-
-#define I830_CONTEXT(ctx)	((i830ContextPtr)(ctx))
 
 
 
@@ -148,71 +160,56 @@ do {						\
 
 /* i830_vtbl.c
  */
-extern void 
-i830InitVtbl( i830ContextPtr i830 );
+extern void i830InitVtbl(struct i830_context *i830);
 
+extern void
+i830_state_draw_region(struct intel_context *intel,
+                       struct i830_hw_state *state,
+                       struct intel_region *color_region,
+                       struct intel_region *depth_region);
 /* i830_context.c
  */
-extern GLboolean 
-i830CreateContext( const __GLcontextModes *mesaVis,
-		   __DRIcontextPrivate *driContextPriv,
-		   void *sharedContextPrivate);
+extern GLboolean
+i830CreateContext(const __GLcontextModes * mesaVis,
+                  __DRIcontextPrivate * driContextPriv,
+                  void *sharedContextPrivate);
 
 /* i830_tex.c, i830_texstate.c
  */
-extern void 
-i830UpdateTextureState( intelContextPtr intel );
-
-extern void 
-i830InitTextureFuncs( struct dd_function_table *functions );
+extern void i830UpdateTextureState(struct intel_context *intel);
 
-extern intelTextureObjectPtr
-i830AllocTexObj( struct gl_texture_object *tObj );
+extern void i830InitTextureFuncs(struct dd_function_table *functions);
 
 /* i830_texblend.c
  */
-extern GLuint i830SetTexEnvCombine(i830ContextPtr i830,
-    const struct gl_tex_env_combine_state * combine, GLint blendUnit,
-     GLuint texel_op, GLuint *state, const GLfloat *factor );
+extern GLuint i830SetTexEnvCombine(struct i830_context *i830,
+                                   const struct gl_tex_env_combine_state
+                                   *combine, GLint blendUnit, GLuint texel_op,
+                                   GLuint * state, const GLfloat * factor);
 
-extern void 
-i830EmitTextureBlend( i830ContextPtr i830 );
+extern void i830EmitTextureBlend(struct i830_context *i830);
 
 
 /* i830_state.c
  */
-extern void 
-i830InitStateFuncs( struct dd_function_table *functions );
+extern void i830InitStateFuncs(struct dd_function_table *functions);
 
-extern void 
-i830EmitState( i830ContextPtr i830 );
+extern void i830EmitState(struct i830_context *i830);
 
-extern void 
-i830InitState( i830ContextPtr i830 );
+extern void i830InitState(struct i830_context *i830);
 
 /* i830_metaops.c
  */
-extern GLboolean
-i830TryTextureReadPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *pack,
-			  GLvoid *pixels );
-
-extern GLboolean
-i830TryTextureDrawPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *unpack,
-			  const GLvoid *pixels );
-
-extern void 
-i830ClearWithTris( intelContextPtr intel, GLbitfield mask,
-		   GLboolean all, GLint cx, GLint cy, GLint cw, GLint ch);
+extern void i830InitMetaFuncs(struct i830_context *i830);
 
-extern void
-i830RotateWindow(intelContextPtr intel, __DRIdrawablePrivate *dPriv,
-                 GLuint srcBuf);
+/*======================================================================
+ * Inline conversion functions.  These are better-typed than the
+ * macros used previously:
+ */
+static INLINE struct i830_context *
+i830_context(GLcontext * ctx)
+{
+   return (struct i830_context *) ctx;
+}
 
 #endif
-
diff --git a/src/mesa/drivers/dri/i915/i830_metaops.c b/src/mesa/drivers/dri/i915/i830_metaops.c
index c1d7fe349c0..2cce661c868 100644
--- a/src/mesa/drivers/dri/i915/i830_metaops.c
+++ b/src/mesa/drivers/dri/i915/i830_metaops.c
@@ -25,15 +25,15 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "enums.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "utils.h"
 
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
-#include "intel_ioctl.h"
+#include "intel_regions.h"
 
 #include "i830_context.h"
 #include "i830_reg.h"
@@ -41,34 +41,26 @@
 /* A large amount of state doesn't need to be uploaded.
  */
 #define ACTIVE (I830_UPLOAD_INVARIENT |         \
-		I830_UPLOAD_TEXBLEND(0) |	\
-		I830_UPLOAD_STIPPLE |		\
 		I830_UPLOAD_CTX |		\
 		I830_UPLOAD_BUFFERS |		\
-		I830_UPLOAD_TEX(0))		
+		I830_UPLOAD_STIPPLE |		\
+		I830_UPLOAD_TEXBLEND(0) |	\
+		I830_UPLOAD_TEX(0))
 
 
 #define SET_STATE( i830, STATE )		\
 do {						\
-   i830->current->emitted = 0;			\
+   i830->current->emitted &= ~ACTIVE;			\
    i830->current = &i830->STATE;		\
-   i830->current->emitted = 0;			\
+   i830->current->emitted &= ~ACTIVE;			\
 } while (0)
 
-/* Operations where the 3D engine is decoupled temporarily from the
- * current GL state and used for other purposes than simply rendering
- * incoming triangles.
- */
-static void set_initial_state( i830ContextPtr i830 )
-{
-   memcpy(&i830->meta, &i830->initial, sizeof(i830->meta) );
-   i830->meta.active = ACTIVE;
-   i830->meta.emitted = 0;
-}
-
 
-static void set_no_depth_stencil_write( i830ContextPtr i830 )
+static void
+set_no_stencil_write(struct intel_context *intel)
 {
+   struct i830_context *i830 = i830_context(&intel->ctx);
+
    /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
     */
    i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
@@ -76,6 +68,13 @@ static void set_no_depth_stencil_write( i830ContextPtr i830 )
    i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
    i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;
 
+   i830->meta.emitted &= ~I830_UPLOAD_CTX;
+}
+
+static void
+set_no_depth_write(struct intel_context *intel)
+{
+   struct i830_context *i830 = i830_context(&intel->ctx);
 
    /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
     */
@@ -87,35 +86,56 @@ static void set_no_depth_stencil_write( i830ContextPtr i830 )
    i830->meta.emitted &= ~I830_UPLOAD_CTX;
 }
 
-/* Set stencil unit to replace always with the reference value.
+/* Set depth unit to replace.
  */
-static void set_stencil_replace( i830ContextPtr i830,
-				 GLuint s_mask,
-				 GLuint s_clear)
+static void
+set_depth_replace(struct intel_context *intel)
 {
-   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
-    */
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
-
+   struct i830_context *i830 = i830_context(&intel->ctx);
 
    /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
+    * ctx->Driver.DepthMask( ctx, GL_TRUE )
     */
    i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
    i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
-   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
+   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
+   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
+
+   /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
+    */
+   i830->meta.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
+   i830->meta.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
+                                          DEPTH_TEST_FUNC
+                                          (COMPAREFUNC_ALWAYS));
+
+   i830->meta.emitted &= ~I830_UPLOAD_CTX;
+}
+
+
+/* Set stencil unit to replace always with the reference value.
+ */
+static void
+set_stencil_replace(struct intel_context *intel,
+                    GLuint s_mask, GLuint s_clear)
+{
+   struct i830_context *i830 = i830_context(&intel->ctx);
+
+   /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
+    */
+   i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
+   i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
 
    /* ctx->Driver.StencilMask( ctx, s_mask )
     */
    i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
    i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-					   STENCIL_WRITE_MASK((s_mask&0xff)));
+                                          STENCIL_WRITE_MASK((s_mask &
+                                                              0xff)));
 
    /* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
     */
    i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] |= 
+   i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
       (ENABLE_STENCIL_PARMS |
        STENCIL_FAIL_OP(STENCILOP_REPLACE) |
        STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_REPLACE) |
@@ -125,14 +145,14 @@ static void set_stencil_replace( i830ContextPtr i830,
     */
    i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
    i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-					   STENCIL_TEST_MASK(0xff));
+                                          STENCIL_TEST_MASK(0xff));
 
    i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
-						ENABLE_STENCIL_TEST_FUNC_MASK);
-   i830->meta.Ctx[I830_CTXREG_STENCILTST] |= 
+                                               ENABLE_STENCIL_TEST_FUNC_MASK);
+   i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
       (ENABLE_STENCIL_REF_VALUE |
        ENABLE_STENCIL_TEST_FUNC |
-       STENCIL_REF_VALUE((s_clear&0xff)) |
+       STENCIL_REF_VALUE((s_clear & 0xff)) |
        STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS));
 
 
@@ -141,38 +161,43 @@ static void set_stencil_replace( i830ContextPtr i830,
 }
 
 
-static void set_color_mask( i830ContextPtr i830, GLboolean state )
+static void
+set_color_mask(struct intel_context *intel, GLboolean state)
 {
+   struct i830_context *i830 = i830_context(&intel->ctx);
+
    const GLuint mask = ((1 << WRITEMASK_RED_SHIFT) |
-			(1 << WRITEMASK_GREEN_SHIFT) |
-			(1 << WRITEMASK_BLUE_SHIFT) |
-			(1 << WRITEMASK_ALPHA_SHIFT));
+                        (1 << WRITEMASK_GREEN_SHIFT) |
+                        (1 << WRITEMASK_BLUE_SHIFT) |
+                        (1 << WRITEMASK_ALPHA_SHIFT));
 
    i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~mask;
 
    if (state) {
-      i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= 
-	 (i830->state.Ctx[I830_CTXREG_ENABLES_2] & mask);
+      i830->meta.Ctx[I830_CTXREG_ENABLES_2] |=
+         (i830->state.Ctx[I830_CTXREG_ENABLES_2] & mask);
    }
-      
+
    i830->meta.emitted &= ~I830_UPLOAD_CTX;
 }
 
 /* Installs a one-stage passthrough texture blend pipeline.  Is there
  * more that can be done to turn off texturing?
  */
-static void set_no_texture( i830ContextPtr i830 )
+static void
+set_no_texture(struct intel_context *intel)
 {
+   struct i830_context *i830 = i830_context(&intel->ctx);
    static const struct gl_tex_env_combine_state comb = {
       GL_NONE, GL_NONE,
-      { GL_TEXTURE, 0, 0, }, { GL_TEXTURE, 0, 0, },
-      { GL_SRC_COLOR, 0, 0 }, { GL_SRC_ALPHA, 0, 0 },
+      {GL_TEXTURE, 0, 0,}, {GL_TEXTURE, 0, 0,},
+      {GL_SRC_COLOR, 0, 0}, {GL_SRC_ALPHA, 0, 0},
       0, 0, 0, 0
    };
 
    i830->meta.TexBlendWordsUsed[0] =
-     i830SetTexEnvCombine( i830, & comb, 0, TEXBLENDARG_TEXEL0,
-			   i830->meta.TexBlend[0], NULL);
+      i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
+                           i830->meta.TexBlend[0], NULL);
 
    i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
    i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
@@ -181,18 +206,22 @@ static void set_no_texture( i830ContextPtr i830 )
 /* Set up a single element blend stage for 'replace' texturing with no
  * funny ops.
  */
-static void enable_texture_blend_replace( i830ContextPtr i830 )
+static void
+set_texture_blend_replace(struct intel_context *intel)
 {
+   struct i830_context *i830 = i830_context(&intel->ctx);
    static const struct gl_tex_env_combine_state comb = {
       GL_REPLACE, GL_REPLACE,
-      { GL_TEXTURE, GL_TEXTURE, GL_TEXTURE }, { GL_TEXTURE, GL_TEXTURE, GL_TEXTURE, },
-      { GL_SRC_COLOR, GL_SRC_COLOR, GL_SRC_COLOR }, { GL_SRC_ALPHA, GL_SRC_ALPHA, GL_SRC_ALPHA },
+      {GL_TEXTURE, GL_TEXTURE, GL_TEXTURE,}, {GL_TEXTURE, GL_TEXTURE,
+                                              GL_TEXTURE,},
+      {GL_SRC_COLOR, GL_SRC_COLOR, GL_SRC_COLOR}, {GL_SRC_ALPHA, GL_SRC_ALPHA,
+                                                   GL_SRC_ALPHA},
       0, 0, 1, 1
    };
 
    i830->meta.TexBlendWordsUsed[0] =
-     i830SetTexEnvCombine( i830, & comb, 0, TEXBLENDARG_TEXEL0,
-			   i830->meta.TexBlend[0], NULL);
+      i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
+                           i830->meta.TexBlend[0], NULL);
 
    i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
    i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
@@ -206,717 +235,222 @@ static void enable_texture_blend_replace( i830ContextPtr i830 )
 /* Set up an arbitary piece of memory as a rectangular texture
  * (including the front or back buffer).
  */
-static void set_tex_rect_source( i830ContextPtr i830,
-				 GLuint offset,
-				 GLuint width, 
-				 GLuint height,
-				 GLuint pitch, /* in bytes */
-				 GLuint textureFormat )
+static GLboolean
+set_tex_rect_source(struct intel_context *intel,
+                    dri_bo *buffer,
+                    GLuint offset,
+                    GLuint pitch, GLuint height, GLenum format, GLenum type)
 {
-   GLint numLevels = 1;
+   struct i830_context *i830 = i830_context(&intel->ctx);
    GLuint *setup = i830->meta.Tex[0];
+   GLint numLevels = 1;
+   GLuint textureFormat;
+   GLuint cpp;
 
-/*    fprintf(stderr, "%s: offset: %x w: %d h: %d pitch %d format %x\n", */
-/* 	   __FUNCTION__, offset, width, height, pitch, textureFormat ); */
+   /* A full implementation of this would do the upload through
+    * glTexImage2d, and get all the conversion operations at that
+    * point.  We are restricted, but still at least have access to the
+    * fragment program swizzle.
+    */
+   switch (format) {
+   case GL_BGRA:
+      switch (type) {
+      case GL_UNSIGNED_INT_8_8_8_8_REV:
+      case GL_UNSIGNED_BYTE:
+         textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
+         cpp = 4;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_RGBA:
+      switch (type) {
+      case GL_UNSIGNED_INT_8_8_8_8_REV:
+      case GL_UNSIGNED_BYTE:
+         textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
+         cpp = 4;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_BGR:
+      switch (type) {
+      case GL_UNSIGNED_SHORT_5_6_5_REV:
+         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
+         cpp = 2;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_RGB:
+      switch (type) {
+      case GL_UNSIGNED_SHORT_5_6_5:
+         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
+         cpp = 2;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
 
-   setup[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 | 
-			       (LOAD_TEXTURE_MAP0 << 0) | 4);
-   setup[I830_TEXREG_TM0S0] = (TM0S0_USE_FENCE | offset);
+   default:
+      return GL_FALSE;
+   }
+
+   i830->meta.tex_buffer[0] = buffer;
+   i830->meta.tex_offset[0] = offset;
+
+   setup[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
+                               (LOAD_TEXTURE_MAP0 << 0) | 4);
    setup[I830_TEXREG_TM0S1] = (((height - 1) << TM0S1_HEIGHT_SHIFT) |
-			       ((width - 1) << TM0S1_WIDTH_SHIFT) |
-			       textureFormat);
-   setup[I830_TEXREG_TM0S2] = ((((pitch / 4) - 1) << TM0S2_PITCH_SHIFT));   
-   setup[I830_TEXREG_TM0S3] &= ~TM0S3_MAX_MIP_MASK;
-   setup[I830_TEXREG_TM0S3] &= ~TM0S3_MIN_MIP_MASK;
-   setup[I830_TEXREG_TM0S3] |= ((numLevels - 1)*4) << TM0S3_MIN_MIP_SHIFT;
+                               ((pitch - 1) << TM0S1_WIDTH_SHIFT) |
+                               textureFormat);
+   setup[I830_TEXREG_TM0S2] =
+      (((((pitch * cpp) / 4) -
+         1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK);
+
+   setup[I830_TEXREG_TM0S3] =
+      ((((numLevels -
+          1) *
+         4) << TM0S3_MIN_MIP_SHIFT) | (FILTER_NEAREST <<
+                                       TM0S3_MIN_FILTER_SHIFT) |
+       (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT) | (FILTER_NEAREST <<
+                                                     TM0S3_MAG_FILTER_SHIFT));
+
+   setup[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(0));
 
    setup[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
-			     MAP_UNIT(0) |
-			     ENABLE_TEXCOORD_PARAMS |
-			     TEXCOORDS_ARE_IN_TEXELUNITS |
-			     TEXCOORDTYPE_CARTESIAN |
-			     ENABLE_ADDR_V_CNTL |
-			     TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP) |
-			     ENABLE_ADDR_U_CNTL |
-			     TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP));
+                             MAP_UNIT(0) |
+                             ENABLE_TEXCOORD_PARAMS |
+                             TEXCOORDS_ARE_IN_TEXELUNITS |
+                             TEXCOORDTYPE_CARTESIAN |
+                             ENABLE_ADDR_V_CNTL |
+                             TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP) |
+                             ENABLE_ADDR_U_CNTL |
+                             TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP));
 
    i830->meta.emitted &= ~I830_UPLOAD_TEX(0);
+   return GL_TRUE;
 }
 
 
-/* Select between front and back draw buffers.
- */
-static void set_draw_region( i830ContextPtr i830,
-			      const intelRegion *region )
-{
-   i830->meta.Buffer[I830_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i830->meta.Buffer[I830_DESTREG_CBUFADDR2] = region->offset;
-   i830->meta.emitted &= ~I830_UPLOAD_BUFFERS;
-}
-
-/* Setup an arbitary draw format, useful for targeting
- * texture or agp memory.
- */
-#if 0
-static void set_draw_format( i830ContextPtr i830,
-			     GLuint format,
-			     GLuint depth_format)
-{
-   i830->meta.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					  DSTORG_VERT_BIAS(0x8) | /* .5 */
-					  format |
-					  DEPTH_IS_Z |
-					  depth_format);
-}
-#endif
-
-
-static void set_vertex_format( i830ContextPtr i830 )
+static void
+set_vertex_format(struct intel_context *intel)
 {
-   i830->meta.Ctx[I830_CTXREG_VF] =  (_3DSTATE_VFT0_CMD |
-				      VFT0_TEX_COUNT(1) |
-				      VFT0_DIFFUSE |
-				      VFT0_SPEC |
-				      VFT0_XYZW);
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   i830->meta.Ctx[I830_CTXREG_VF] = (_3DSTATE_VFT0_CMD |
+                                     VFT0_TEX_COUNT(1) |
+                                     VFT0_DIFFUSE | VFT0_XYZ);
    i830->meta.Ctx[I830_CTXREG_VF2] = (_3DSTATE_VFT1_CMD |
-				      VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
-				      VFT1_TEX1_FMT(TEXCOORDFMT_2D) | 
-				      VFT1_TEX2_FMT(TEXCOORDFMT_2D) |
-				      VFT1_TEX3_FMT(TEXCOORDFMT_2D));
+                                      VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
+                                      VFT1_TEX1_FMT(TEXCOORDFMT_2D) |
+                                      VFT1_TEX2_FMT(TEXCOORDFMT_2D) |
+                                      VFT1_TEX3_FMT(TEXCOORDFMT_2D));
    i830->meta.emitted &= ~I830_UPLOAD_CTX;
 }
 
 
-static void draw_quad(i830ContextPtr i830, 
-		      GLfloat x0, GLfloat x1,
-		      GLfloat y0, GLfloat y1, 
-		      GLubyte red, GLubyte green,
-		      GLubyte blue, GLubyte alpha,
-		      GLfloat s0, GLfloat s1,
-		      GLfloat t0, GLfloat t1 )
-{
-   GLuint vertex_size = 8;
-   GLuint *vb = intelEmitInlinePrimitiveLocked( &i830->intel, 
-						PRIM3D_TRIFAN, 
-						4*vertex_size,
-						vertex_size );
-   intelVertex tmp;
-   int i;
-
-   
-/*    fprintf(stderr, "%s: %f,%f-%f,%f 0x%x%x%x%x %f,%f-%f,%f\n", */
-/* 	   __FUNCTION__, */
-/* 	   x0,y0,x1,y1,red,green,blue,alpha,s0,t0,s1,t1); */
-
-
-   /* initial vertex, left bottom */
-   tmp.v.x = x0;
-   tmp.v.y = y0;
-   tmp.v.z = 1.0;
-   tmp.v.w = 1.0;
-   tmp.v.color.red = red;
-   tmp.v.color.green = green;
-   tmp.v.color.blue = blue;
-   tmp.v.color.alpha = alpha;
-   tmp.v.specular.red = 0;
-   tmp.v.specular.green = 0;
-   tmp.v.specular.blue = 0;
-   tmp.v.specular.alpha = 0;
-   tmp.v.u0 = s0;
-   tmp.v.v0 = t0;
-   for (i = 0 ; i < 8 ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* right bottom */
-   vb += 8;
-   tmp.v.x = x1;
-   tmp.v.u0 = s1;
-   for (i = 0 ; i < 8 ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* right top */
-   vb += 8;
-   tmp.v.y = y1;
-   tmp.v.v0 = t1;
-   for (i = 0 ; i < 8 ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* left top */
-   vb += 8;
-   tmp.v.x = x0;
-   tmp.v.u0 = s0;
-   for (i = 0 ; i < 8 ; i++)
-      vb[i] = tmp.ui[i];
-
-/*    fprintf(stderr, "%s: DV1: %x\n",  */
-/* 	   __FUNCTION__, i830->meta.Buffer[I830_DESTREG_DV1]); */
-}
-
-static void draw_poly(i830ContextPtr i830, 
-		      GLubyte red, GLubyte green, GLubyte blue, GLubyte alpha,
-                      GLuint numVerts,
-                      GLfloat verts[][2],
-                      GLfloat texcoords[][2])
+static void
+meta_import_pixel_state(struct intel_context *intel)
 {
-   GLuint vertex_size = 8;
-   GLuint *vb = intelEmitInlinePrimitiveLocked( &i830->intel, 
-						PRIM3D_TRIFAN, 
-						numVerts * vertex_size,
-						vertex_size );
-   intelVertex tmp;
-   int i, k;
-
-   /* initial constant vertex fields */
-   tmp.v.z = 1.0;
-   tmp.v.w = 1.0; 
-   tmp.v.color.red = red;
-   tmp.v.color.green = green;
-   tmp.v.color.blue = blue;
-   tmp.v.color.alpha = alpha;
-   tmp.v.specular.red = 0;
-   tmp.v.specular.green = 0;
-   tmp.v.specular.blue = 0;
-   tmp.v.specular.alpha = 0;
-
-   for (k = 0; k < numVerts; k++) {
-      tmp.v.x = verts[k][0];
-      tmp.v.y = verts[k][1];
-      tmp.v.u0 = texcoords[k][0];
-      tmp.v.v0 = texcoords[k][1];
-
-      for (i = 0 ; i < vertex_size ; i++)
-         vb[i] = tmp.ui[i];
-
-      vb += vertex_size;
-   }
-}
-
-void 
-i830ClearWithTris(intelContextPtr intel, GLbitfield mask,
-		  GLboolean allFoo,
-		  GLint cxFoo, GLint cyFoo, GLint cwFoo, GLint chFoo)
-{
-   i830ContextPtr i830 = I830_CONTEXT( intel );
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   intelScreenPrivate *screen = intel->intelScreen;
-   int x0, y0, x1, y1;
-   GLint cx, cy, cw, ch;
-   GLboolean all;
-
-   INTEL_FIREVERTICES(intel);
-   SET_STATE( i830, meta );
-   set_initial_state( i830 );
-/*    set_no_texture( i830 ); */
-   set_vertex_format( i830 ); 
-
-   LOCK_HARDWARE(intel);
-
-   /* get clear bounds after locking */
-   cx = intel->ctx.DrawBuffer->_Xmin;
-   cy = intel->ctx.DrawBuffer->_Ymin;
-   cw = intel->ctx.DrawBuffer->_Xmax - cx;
-   ch = intel->ctx.DrawBuffer->_Ymax - cy;
-   all = (cw == intel->ctx.DrawBuffer->Width &&
-          ch == intel->ctx.DrawBuffer->Height);
-
-   if(!all) {
-      x0 = cx;
-      y0 = cy;
-      x1 = x0 + cw;
-      y1 = y0 + ch;
-   } else {
-      x0 = 0;
-      y0 = 0;
-      x1 = x0 + dPriv->w;
-      y1 = y0 + dPriv->h;
-   }
-
-   /* Don't do any clipping to screen - these are window coordinates.
-    * The active cliprects will be applied as for any other geometry.
-    */
-
-   if(mask & BUFFER_BIT_FRONT_LEFT) {
-      set_no_depth_stencil_write( i830 );
-      set_color_mask( i830, GL_TRUE );
-      set_draw_region( i830, &screen->front );
-      draw_quad(i830, x0, x1, y0, y1,
-		intel->clear_red, intel->clear_green,
-		intel->clear_blue, intel->clear_alpha,
-		0, 0, 0, 0);
-   }
-
-   if(mask & BUFFER_BIT_BACK_LEFT) {
-      set_no_depth_stencil_write( i830 );
-      set_color_mask( i830, GL_TRUE );
-      set_draw_region( i830, &screen->back );
-
-      draw_quad(i830, x0, x1, y0, y1,
-		intel->clear_red, intel->clear_green,
-		intel->clear_blue, intel->clear_alpha,
-		0, 0, 0, 0);
-   }
-
-   if(mask & BUFFER_BIT_STENCIL) {
-      set_stencil_replace( i830, 
-			   intel->ctx.Stencil.WriteMask[0], 
-			   intel->ctx.Stencil.Clear);
-
-      set_color_mask( i830, GL_FALSE );
-      set_draw_region( i830, &screen->front );
-      draw_quad( i830, x0, x1, y0, y1, 0, 0, 0, 0, 0, 0, 0, 0 );
-   }
+   struct i830_context *i830 = i830_context(&intel->ctx);
+
+   i830->meta.Ctx[I830_CTXREG_STATE1] = i830->state.Ctx[I830_CTXREG_STATE1];
+   i830->meta.Ctx[I830_CTXREG_STATE2] = i830->state.Ctx[I830_CTXREG_STATE2];
+   i830->meta.Ctx[I830_CTXREG_STATE3] = i830->state.Ctx[I830_CTXREG_STATE3];
+   i830->meta.Ctx[I830_CTXREG_STATE4] = i830->state.Ctx[I830_CTXREG_STATE4];
+   i830->meta.Ctx[I830_CTXREG_STATE5] = i830->state.Ctx[I830_CTXREG_STATE5];
+   i830->meta.Ctx[I830_CTXREG_IALPHAB] = i830->state.Ctx[I830_CTXREG_IALPHAB];
+   i830->meta.Ctx[I830_CTXREG_STENCILTST] =
+      i830->state.Ctx[I830_CTXREG_STENCILTST];
+   i830->meta.Ctx[I830_CTXREG_ENABLES_1] =
+      i830->state.Ctx[I830_CTXREG_ENABLES_1];
+   i830->meta.Ctx[I830_CTXREG_ENABLES_2] =
+      i830->state.Ctx[I830_CTXREG_ENABLES_2];
+   i830->meta.Ctx[I830_CTXREG_AA] = i830->state.Ctx[I830_CTXREG_AA];
+   i830->meta.Ctx[I830_CTXREG_FOGCOLOR] =
+      i830->state.Ctx[I830_CTXREG_FOGCOLOR];
+   i830->meta.Ctx[I830_CTXREG_BLENDCOLOR0] =
+      i830->state.Ctx[I830_CTXREG_BLENDCOLOR0];
+   i830->meta.Ctx[I830_CTXREG_BLENDCOLOR1] =
+      i830->state.Ctx[I830_CTXREG_BLENDCOLOR1];
+   i830->meta.Ctx[I830_CTXREG_MCSB0] = i830->state.Ctx[I830_CTXREG_MCSB0];
+   i830->meta.Ctx[I830_CTXREG_MCSB1] = i830->state.Ctx[I830_CTXREG_MCSB1];
+
+
+   i830->meta.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
+   i830->meta.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
+   i830->meta.emitted &= ~I830_UPLOAD_CTX;
 
-   UNLOCK_HARDWARE(intel);
 
-   INTEL_FIREVERTICES(intel);
-   SET_STATE( i830, state );
+   i830->meta.Buffer[I830_DESTREG_SENABLE] =
+      i830->state.Buffer[I830_DESTREG_SENABLE];
+   i830->meta.Buffer[I830_DESTREG_SR1] = i830->state.Buffer[I830_DESTREG_SR1];
+   i830->meta.Buffer[I830_DESTREG_SR2] = i830->state.Buffer[I830_DESTREG_SR2];
+   i830->meta.emitted &= ~I830_UPLOAD_BUFFERS;
 }
 
 
-#if 0
 
-GLboolean
-i830TryTextureReadPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *pack,
-			  GLvoid *pixels )
+/* Select between front and back draw buffers.
+ */
+static void
+meta_draw_region(struct intel_context *intel,
+                 struct intel_region *color_region,
+                 struct intel_region *depth_region)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   intelScreenPrivate *screen = i830->intel.intelScreen;
-   GLint pitch = pack->RowLength ? pack->RowLength : width;
-   __DRIdrawablePrivate *dPriv = i830->intel.driDrawable;
-   int textureFormat;
-   GLenum glTextureFormat;
-   int src_offset = i830->meta.Buffer[I830_DESTREG_CBUFADDR2];
-   int destOffset = intelAgpOffsetFromVirtual( &i830->intel, pixels);
-   int destFormat, depthFormat, destPitch;
-   drm_clip_rect_t tmp;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-
-   if (	ctx->_ImageTransferState ||
-	pack->SwapBytes ||
-	pack->LsbFirst ||
-	!pack->Invert) {
-      fprintf(stderr, "%s: check_color failed\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   switch (screen->fbFormat) {
-   case DV_PF_565:
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-      glTextureFormat = GL_RGB;
-      break;
-   case DV_PF_555:
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB1555;
-      glTextureFormat = GL_RGBA;
-      break;
-   case DV_PF_8888:
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-      glTextureFormat = GL_RGBA;
-      break;
-   default:
-      fprintf(stderr, "%s: textureFormat failed %x\n", __FUNCTION__,
-	      screen->fbFormat);
-      return GL_FALSE;
-   }
-
-
-   switch (type) {
-   case GL_UNSIGNED_SHORT_5_6_5: 
-      if (format != GL_RGB) return GL_FALSE;
-      destFormat = COLR_BUF_RGB565; 
-      depthFormat = DEPTH_FRMT_16_FIXED;
-      destPitch = pitch * 2;
-      break;
-   case GL_UNSIGNED_INT_8_8_8_8_REV: 
-      if (format != GL_BGRA) return GL_FALSE;
-      destFormat = COLR_BUF_ARGB8888; 
-      depthFormat = DEPTH_FRMT_24_FIXED_8_OTHER;
-      destPitch = pitch * 4;
-      break;
-   default:
-      fprintf(stderr, "%s: destFormat failed %s\n", __FUNCTION__,
-	      _mesa_lookup_enum_by_nr(type));
-      return GL_FALSE;
-   }
-
-   destFormat |= (0x02<<24);
-
-/*    fprintf(stderr, "type: %s destFormat: %x\n", */
-/* 	   _mesa_lookup_enum_by_nr(type), */
-/* 	   destFormat); */
-
-   intelFlush( ctx );
-
-   SET_STATE( i830, meta );
-   set_initial_state( i830 );
-   set_no_depth_stencil_write( i830 );
-
-   LOCK_HARDWARE( intel );
-   {
-      intelWaitForIdle( intel ); /* required by GL */
-
-      if (!driClipRectToFramebuffer(ctx->ReadBuffer, &x, &y, &width, &height)) {
-	 UNLOCK_HARDWARE( intel );
-	 SET_STATE(i830, state);
-	 fprintf(stderr, "%s: cliprect failed\n", __FUNCTION__);
-	 return GL_TRUE;
-      }
-
-#if 0
-      /* FIXME -- Just emit the correct state
-       */
-      if (i830SetParam(i830->driFd, I830_SETPARAM_CBUFFER_PITCH, 
-		      destPitch) != 0) {
-	 UNLOCK_HARDWARE( intel );
-	 SET_STATE(i830, state);
-	 fprintf(stderr, "%s: setparam failed\n", __FUNCTION__);
-	 return GL_FALSE;
-      }
-#endif
-
-
-      y = dPriv->h - y - height;
-      x += dPriv->x;
-      y += dPriv->y;
-
-
-      /* Set the frontbuffer up as a large rectangular texture.
-       */
-      set_tex_rect_source( i830, 
-			   src_offset, 
-			   screen->width, 
-			   screen->height, 
-			   screen->front.pitch, 
-			   textureFormat ); 
-   
-   
-      enable_texture_blend_replace( i830 ); 
-
-
-      /* Set the 3d engine to draw into the agp memory
-       */
+   struct i830_context *i830 = i830_context(&intel->ctx);
 
-      set_draw_region( i830, destOffset ); 
-      set_draw_format( i830, destFormat, depthFormat );  
-
-
-      /* Draw a single quad, no cliprects:
-       */
-      i830->intel.numClipRects = 1;
-      i830->intel.pClipRects = &tmp;
-      i830->intel.pClipRects[0].x1 = 0;
-      i830->intel.pClipRects[0].y1 = 0;
-      i830->intel.pClipRects[0].x2 = width;
-      i830->intel.pClipRects[0].y2 = height;
-
-      draw_quad( i830, 
-		 0, width, 0, height, 
-		 0, 255, 0, 0, 
-		 x, x+width, y, y+height );
-
-      intelWindowMoved( intel );
-   }
-   UNLOCK_HARDWARE( intel );
-   intelFinish( ctx ); /* required by GL */
-
-   SET_STATE( i830, state );
-   return GL_TRUE;
+   i830_state_draw_region(intel, &i830->meta, color_region, depth_region);
 }
 
 
-GLboolean
-i830TryTextureDrawPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *unpack,
-			  const GLvoid *pixels )
+/* Operations where the 3D engine is decoupled temporarily from the
+ * current GL state and used for other purposes than simply rendering
+ * incoming triangles.
+ */
+static void
+install_meta_state(struct intel_context *intel)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   GLint pitch = unpack->RowLength ? unpack->RowLength : width;
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   int textureFormat;
-   GLenum glTextureFormat;
-   int dst_offset = i830->meta.Buffer[I830_DESTREG_CBUFADDR2];
-   int src_offset = intelAgpOffsetFromVirtual( intel, pixels );
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   /* Todo -- upload images that aren't in agp space, then texture
-    * from them.  
-    */
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   memcpy(&i830->meta, &i830->initial, sizeof(i830->meta));
 
-   if ( !intelIsAgpMemory( intel, pixels, pitch*height ) ) {
-      fprintf(stderr, "%s: intelIsAgpMemory failed\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   /* Todo -- don't want to clobber all the drawing state like we do
-    * for readpixels -- most of this state can be handled just fine.
-    */
-   if (	ctx->_ImageTransferState ||
-	unpack->SwapBytes ||
-	unpack->LsbFirst ||
-	ctx->Color.AlphaEnabled || 
-	ctx->Depth.Test ||
-	ctx->Fog.Enabled ||
-	ctx->Scissor.Enabled ||
-	ctx->Stencil.Enabled ||
-	!ctx->Color.ColorMask[0] ||
-	!ctx->Color.ColorMask[1] ||
-	!ctx->Color.ColorMask[2] ||
-	!ctx->Color.ColorMask[3] ||
-	ctx->Color.ColorLogicOpEnabled ||
-	ctx->Texture._EnabledUnits ||
-	ctx->Depth.OcclusionTest) {
-      fprintf(stderr, "%s: other tests failed\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   /* Todo -- remove these restrictions:
-    */
-   if (ctx->Pixel.ZoomX != 1.0F ||
-       ctx->Pixel.ZoomY != -1.0F)
-      return GL_FALSE;
-
-
-
-   switch (type) {
-   case GL_UNSIGNED_SHORT_1_5_5_5_REV:
-      if (format != GL_BGRA) return GL_FALSE;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB1555;
-      glTextureFormat = GL_RGBA;
-      break;
-   case GL_UNSIGNED_SHORT_5_6_5: 
-      if (format != GL_RGB) return GL_FALSE;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-      glTextureFormat = GL_RGB;
-      break;
-   case GL_UNSIGNED_SHORT_8_8_MESA: 
-      if (format != GL_YCBCR_MESA) return GL_FALSE;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_SWAPY 
-/*  		       | TM0S1_COLORSPACE_CONVERSION */
-	 );
-      glTextureFormat = GL_YCBCR_MESA;
-      break;
-   case GL_UNSIGNED_SHORT_8_8_REV_MESA: 
-      if (format != GL_YCBCR_MESA) return GL_FALSE;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_NORMAL 
-/* 		       | TM0S1_COLORSPACE_CONVERSION */
-	 );
-      glTextureFormat = GL_YCBCR_MESA;
-      break;
-   case GL_UNSIGNED_INT_8_8_8_8_REV: 
-      if (format != GL_BGRA) return GL_FALSE;
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-      glTextureFormat = GL_RGBA;
-      break;
-   default:
-      fprintf(stderr, "%s: destFormat failed\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   intelFlush( ctx );
-
-   SET_STATE( i830, meta );
-
-   LOCK_HARDWARE( intel );
-   {
-      intelWaitForIdle( intel ); /* required by GL */
-
-      y -= height;			/* cope with pixel zoom */
-
-      if (!driClipRectToFramebuffer(ctx->ReadBuffer, &x, &y, &width, &height)) {
-	 UNLOCK_HARDWARE( intel );
-	 SET_STATE(i830, state);
-	 fprintf(stderr, "%s: cliprect failed\n", __FUNCTION__);
-	 return GL_TRUE;
-      }
-
-
-      y = dPriv->h - y - height;
-
-      set_initial_state( i830 );
-
-      /* Set the pixel image up as a rectangular texture.
-       */
-      set_tex_rect_source( i830, 
-			   src_offset, 
-			   width, 
-			   height, 
-			   pitch, /* XXXX!!!! -- /2 sometimes */
-			   textureFormat ); 
-   
-   
-      enable_texture_blend_replace( i830 ); 
-
-   
-      /* Draw to the current draw buffer:
-       */
-      set_draw_offset( i830, dst_offset );
-
-      /* Draw a quad, use regular cliprects
-       */
-/*       fprintf(stderr, "x: %d y: %d width %d height %d\n", x, y, width, height); */
+   i830->meta.active = ACTIVE;
+   i830->meta.emitted = 0;
 
-      draw_quad( i830, 
-		 x, x+width, y, y+height,
-		 0, 255, 0, 0, 
-		 0, width, 0, height );
+   SET_STATE(i830, meta);
+   set_vertex_format(intel);
+   set_no_texture(intel);
+}
 
-      intelWindowMoved( intel );
-   }
-   UNLOCK_HARDWARE( intel );
-   intelFinish( ctx ); /* required by GL */
-   
+static void
+leave_meta_state(struct intel_context *intel)
+{
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   intel_region_release(&i830->meta.draw_region);
+   intel_region_release(&i830->meta.depth_region);
+/*    intel_region_release(intel, &i830->meta.tex_region[0]); */
    SET_STATE(i830, state);
-
-   return GL_TRUE;
 }
 
-#endif
 
-/**
- * Copy the window contents named by dPriv to the rotated (or reflected)
- * color buffer.
- * srcBuf is BUFFER_BIT_FRONT_LEFT or BUFFER_BIT_BACK_LEFT to indicate the source.
- */
+
 void
-i830RotateWindow(intelContextPtr intel, __DRIdrawablePrivate *dPriv,
-                 GLuint srcBuf)
+i830InitMetaFuncs(struct i830_context *i830)
 {
-   i830ContextPtr i830 = I830_CONTEXT( intel );
-   intelScreenPrivate *screen = intel->intelScreen;
-   const GLuint cpp = screen->cpp;
-   drm_clip_rect_t fullRect;
-   GLuint textureFormat, srcOffset, srcPitch;
-   const drm_clip_rect_t *clipRects;
-   int numClipRects;
-   int i;
-
-   int xOrig, yOrig;
-   int origNumClipRects;
-   drm_clip_rect_t *origRects;
-
-   /*
-    * set up hardware state
-    */
-   intelFlush( &intel->ctx );
-
-   SET_STATE( i830, meta ); 
-   set_initial_state( i830 ); 
-   set_no_texture( i830 ); 
-   set_vertex_format( i830 ); 
-   set_no_depth_stencil_write( i830 );
-   set_color_mask( i830, GL_FALSE );
-
-   LOCK_HARDWARE(intel);
-
-   /* save current drawing origin and cliprects (restored at end) */
-   xOrig = intel->drawX;
-   yOrig = intel->drawY;
-   origNumClipRects = intel->numClipRects;
-   origRects = intel->pClipRects;
-
-   if (!intel->numClipRects)
-      goto done;
-
-   /*
-    * set drawing origin, cliprects for full-screen access to rotated screen
-    */
-   fullRect.x1 = 0;
-   fullRect.y1 = 0;
-   fullRect.x2 = screen->rotatedWidth;
-   fullRect.y2 = screen->rotatedHeight;
-   intel->drawX = 0;
-   intel->drawY = 0;
-   intel->numClipRects = 1;
-   intel->pClipRects = &fullRect;
-
-   set_draw_region( i830, &screen->rotated );
-
-   if (cpp == 4)
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-   else
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-
-   if (srcBuf == BUFFER_BIT_FRONT_LEFT) {
-      srcPitch = screen->front.pitch;   /* in bytes */
-      srcOffset = screen->front.offset; /* bytes */
-      clipRects = dPriv->pClipRects;
-      numClipRects = dPriv->numClipRects;
-   }
-   else {
-      srcPitch = screen->back.pitch;   /* in bytes */
-      srcOffset = screen->back.offset; /* bytes */
-      clipRects = dPriv->pBackClipRects;
-      numClipRects = dPriv->numBackClipRects;
-   }
-
-   /* set the whole screen up as a texture to avoid alignment issues */
-   set_tex_rect_source(i830,
-                       srcOffset,
-                       screen->width,
-                       screen->height,
-                       srcPitch,
-                       textureFormat);
-
-   enable_texture_blend_replace(i830);
-
-   /*
-    * loop over the source window's cliprects
-    */
-   for (i = 0; i < numClipRects; i++) {
-      int srcX0 = clipRects[i].x1;
-      int srcY0 = clipRects[i].y1;
-      int srcX1 = clipRects[i].x2;
-      int srcY1 = clipRects[i].y2;
-      GLfloat verts[4][2], tex[4][2];
-      int j;
-
-      /* build vertices for four corners of clip rect */
-      verts[0][0] = srcX0;  verts[0][1] = srcY0;
-      verts[1][0] = srcX1;  verts[1][1] = srcY0;
-      verts[2][0] = srcX1;  verts[2][1] = srcY1;
-      verts[3][0] = srcX0;  verts[3][1] = srcY1;
-
-      /* .. and texcoords */
-      tex[0][0] = srcX0;  tex[0][1] = srcY0;
-      tex[1][0] = srcX1;  tex[1][1] = srcY0;
-      tex[2][0] = srcX1;  tex[2][1] = srcY1;
-      tex[3][0] = srcX0;  tex[3][1] = srcY1;
-
-      /* transform coords to rotated screen coords */
-
-      for (j = 0; j < 4; j++) {
-         matrix23TransformCoordf(&screen->rotMatrix,
-                                 &verts[j][0], &verts[j][1]);
-      }
-
-      /* draw polygon to map source image to dest region */
-      draw_poly(i830, 255, 255, 255, 255, 4, verts, tex);
-
-   } /* cliprect loop */
-
-   intelFlushBatchLocked( intel, GL_FALSE, GL_FALSE, GL_FALSE );
-
- done:
-   /* restore original drawing origin and cliprects */
-   intel->drawX = xOrig;
-   intel->drawY = yOrig;
-   intel->numClipRects = origNumClipRects;
-   intel->pClipRects = origRects;
-
-   UNLOCK_HARDWARE(intel);
-
-   SET_STATE( i830, state );
+   i830->intel.vtbl.install_meta_state = install_meta_state;
+   i830->intel.vtbl.leave_meta_state = leave_meta_state;
+   i830->intel.vtbl.meta_no_depth_write = set_no_depth_write;
+   i830->intel.vtbl.meta_no_stencil_write = set_no_stencil_write;
+   i830->intel.vtbl.meta_stencil_replace = set_stencil_replace;
+   i830->intel.vtbl.meta_depth_replace = set_depth_replace;
+   i830->intel.vtbl.meta_color_mask = set_color_mask;
+   i830->intel.vtbl.meta_no_texture = set_no_texture;
+   i830->intel.vtbl.meta_texture_blend_replace = set_texture_blend_replace;
+   i830->intel.vtbl.meta_tex_rect_source = set_tex_rect_source;
+   i830->intel.vtbl.meta_draw_region = meta_draw_region;
+   i830->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
 }
-
diff --git a/src/mesa/drivers/dri/i915/i830_reg.h b/src/mesa/drivers/dri/i915/i830_reg.h
index 98cee2f214c..d210c2d08e4 100644
--- a/src/mesa/drivers/dri/i915/i830_reg.h
+++ b/src/mesa/drivers/dri/i915/i830_reg.h
@@ -407,7 +407,7 @@
 #define LOGICOP_SET			0xf
 #define MODE4_ENABLE_STENCIL_TEST_MASK	((1<<17)|(0xff00))
 #define ENABLE_STENCIL_TEST_MASK	(1<<17)
-#define STENCIL_TEST_MASK(x)		((x)<<8)
+#define STENCIL_TEST_MASK(x)		(((x)&0xff)<<8)
 #define MODE4_ENABLE_STENCIL_WRITE_MASK	((1<<16)|(0x00ff))
 #define ENABLE_STENCIL_WRITE_MASK	(1<<16)
 #define STENCIL_WRITE_MASK(x)		((x)&0xff)
@@ -494,10 +494,6 @@
 #define VFT1_TEX0_FMT(x)	(x)
 #define VFT1_TEX0_MASK          3
 #define VFT1_TEX1_SHIFT         2
-#define TEXCOORDFMT_2D		0
-#define TEXCOORDFMT_3D		1
-#define TEXCOORDFMT_4D		2
-#define TEXCOORDFMT_1D		3
 
 /*New stuff picked up along the way */
 
@@ -554,8 +550,8 @@
 #define    MAPSURF_4BIT_INDEXED		   (7<<6)
 #define TM0S1_MT_FORMAT_MASK         (0x7 << 3)
 #define TM0S1_MT_FORMAT_SHIFT        3
-#define    MT_4BIT_IDX_ARGB8888	           (7<<3) /* SURFACE_4BIT_INDEXED */
-#define    MT_8BIT_IDX_RGB565	           (0<<3) /* SURFACE_8BIT_INDEXED */
+#define    MT_4BIT_IDX_ARGB8888	           (7<<3)       /* SURFACE_4BIT_INDEXED */
+#define    MT_8BIT_IDX_RGB565	           (0<<3)       /* SURFACE_8BIT_INDEXED */
 #define    MT_8BIT_IDX_ARGB1555	           (1<<3)
 #define    MT_8BIT_IDX_ARGB4444	           (2<<3)
 #define    MT_8BIT_IDX_AY88		   (3<<3)
@@ -563,9 +559,9 @@
 #define    MT_8BIT_IDX_BUMP_88DVDU 	   (5<<3)
 #define    MT_8BIT_IDX_BUMP_655LDVDU	   (6<<3)
 #define    MT_8BIT_IDX_ARGB8888	           (7<<3)
-#define    MT_8BIT_I8		           (0<<3) /* SURFACE_8BIT */
+#define    MT_8BIT_I8		           (0<<3)       /* SURFACE_8BIT */
 #define    MT_8BIT_L8		           (1<<3)
-#define    MT_16BIT_RGB565 		   (0<<3) /* SURFACE_16BIT */
+#define    MT_16BIT_RGB565 		   (0<<3)       /* SURFACE_16BIT */
 #define    MT_16BIT_ARGB1555		   (1<<3)
 #define    MT_16BIT_ARGB4444		   (2<<3)
 #define    MT_16BIT_AY88		   (3<<3)
@@ -573,16 +569,17 @@
 #define    MT_16BIT_BUMP_88DVDU	           (5<<3)
 #define    MT_16BIT_BUMP_655LDVDU	   (6<<3)
 #define    MT_16BIT_DIB_RGB565_8888	   (7<<3)
-#define    MT_32BIT_ARGB8888		   (0<<3) /* SURFACE_32BIT */
+#define    MT_32BIT_ARGB8888		   (0<<3)       /* SURFACE_32BIT */
 #define    MT_32BIT_ABGR8888		   (1<<3)
+#define    MT_32BIT_XRGB8888		   (2<<3)       /* XXX: Guess from i915_reg.h */
 #define    MT_32BIT_BUMP_XLDVDU_8888	   (6<<3)
 #define    MT_32BIT_DIB_8888		   (7<<3)
-#define    MT_411_YUV411		   (0<<3) /* SURFACE_411 */
-#define    MT_422_YCRCB_SWAPY	           (0<<3) /* SURFACE_422 */
+#define    MT_411_YUV411		   (0<<3)       /* SURFACE_411 */
+#define    MT_422_YCRCB_SWAPY	           (0<<3)       /* SURFACE_422 */
 #define    MT_422_YCRCB_NORMAL	           (1<<3)
 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
-#define    MT_COMPRESS_DXT1		   (0<<3) /* SURFACE_COMPRESSED */
+#define    MT_COMPRESS_DXT1		   (0<<3)       /* SURFACE_COMPRESSED */
 #define    MT_COMPRESS_DXT2_3	           (1<<3)
 #define    MT_COMPRESS_DXT4_5	           (2<<3)
 #define    MT_COMPRESS_FXT1		   (3<<3)
@@ -634,8 +631,4 @@
 #define ENABLE_TEX_STREAM_MAP_IDX	(1<<3)
 #define TEX_STREAM_MAP_IDX(x)		(x)
 
-
-#define MI_FLUSH           ((0<<29)|(4<<23))
-#define FLUSH_MAP_CACHE    (1<<0)
-
 #endif
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c
index f7980201f9a..d9cad0c4bf8 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -26,11 +26,11 @@
  **************************************************************************/
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/dd.h"
 
 #include "texmem.h"
 
@@ -38,149 +38,151 @@
 
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
+#include "intel_fbo.h"
 
 #include "i830_context.h"
 #include "i830_reg.h"
 
+#define FILE_DEBUG_FLAG DEBUG_STATE
+
 static void
-i830StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func, GLint ref,
+i830StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
                         GLuint mask)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    int test = intel_translate_compare_func(func);
 
    mask = mask & 0xff;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
-	      _mesa_lookup_enum_by_nr(func), ref, mask);
+   DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(func), ref, mask);
 
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-					STENCIL_TEST_MASK(mask));
+                                           STENCIL_TEST_MASK(mask));
    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
-					     ENABLE_STENCIL_TEST_FUNC_MASK);
+                                                ENABLE_STENCIL_TEST_FUNC_MASK);
    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
-					    ENABLE_STENCIL_TEST_FUNC |
-					    STENCIL_REF_VALUE(ref) |
-					    STENCIL_TEST_FUNC(test));
+                                               ENABLE_STENCIL_TEST_FUNC |
+                                               STENCIL_REF_VALUE(ref) |
+                                               STENCIL_TEST_FUNC(test));
 }
 
 static void
-i830StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
+i830StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s : mask 0x%x\n", __FUNCTION__, mask);
+   struct i830_context *i830 = i830_context(ctx);
 
+   DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
+   
    mask = mask & 0xff;
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-					STENCIL_WRITE_MASK(mask));
+                                           STENCIL_WRITE_MASK(mask));
 }
 
 static void
-i830StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, GLenum zfail,
+i830StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
                       GLenum zpass)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    int fop, dfop, dpop;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
-	      _mesa_lookup_enum_by_nr(fail),
-	      _mesa_lookup_enum_by_nr(zfail),
-	      _mesa_lookup_enum_by_nr(zpass));
+   DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(fail),
+       _mesa_lookup_enum_by_nr(zfail), 
+       _mesa_lookup_enum_by_nr(zpass));
 
-   fop = 0; dfop = 0; dpop = 0;
+   fop = 0;
+   dfop = 0;
+   dpop = 0;
 
-   switch(fail) {
-   case GL_KEEP: 
-      fop = STENCILOP_KEEP; 
+   switch (fail) {
+   case GL_KEEP:
+      fop = STENCILOP_KEEP;
       break;
-   case GL_ZERO: 
-      fop = STENCILOP_ZERO; 
+   case GL_ZERO:
+      fop = STENCILOP_ZERO;
       break;
-   case GL_REPLACE: 
-      fop = STENCILOP_REPLACE; 
+   case GL_REPLACE:
+      fop = STENCILOP_REPLACE;
       break;
-   case GL_INCR: 
+   case GL_INCR:
       fop = STENCILOP_INCRSAT;
       break;
-   case GL_DECR: 
+   case GL_DECR:
       fop = STENCILOP_DECRSAT;
       break;
    case GL_INCR_WRAP:
-      fop = STENCILOP_INCR; 
+      fop = STENCILOP_INCR;
       break;
    case GL_DECR_WRAP:
-      fop = STENCILOP_DECR; 
+      fop = STENCILOP_DECR;
       break;
-   case GL_INVERT: 
-      fop = STENCILOP_INVERT; 
+   case GL_INVERT:
+      fop = STENCILOP_INVERT;
       break;
-   default: 
+   default:
       break;
    }
-   switch(zfail) {
-   case GL_KEEP: 
-      dfop = STENCILOP_KEEP; 
+   switch (zfail) {
+   case GL_KEEP:
+      dfop = STENCILOP_KEEP;
       break;
-   case GL_ZERO: 
-      dfop = STENCILOP_ZERO; 
+   case GL_ZERO:
+      dfop = STENCILOP_ZERO;
       break;
-   case GL_REPLACE: 
-      dfop = STENCILOP_REPLACE; 
+   case GL_REPLACE:
+      dfop = STENCILOP_REPLACE;
       break;
-   case GL_INCR: 
+   case GL_INCR:
       dfop = STENCILOP_INCRSAT;
       break;
-   case GL_DECR: 
+   case GL_DECR:
       dfop = STENCILOP_DECRSAT;
       break;
    case GL_INCR_WRAP:
-      dfop = STENCILOP_INCR; 
+      dfop = STENCILOP_INCR;
       break;
    case GL_DECR_WRAP:
-      dfop = STENCILOP_DECR; 
+      dfop = STENCILOP_DECR;
       break;
-   case GL_INVERT: 
-      dfop = STENCILOP_INVERT; 
+   case GL_INVERT:
+      dfop = STENCILOP_INVERT;
       break;
-   default: 
+   default:
       break;
    }
-   switch(zpass) {
-   case GL_KEEP: 
-      dpop = STENCILOP_KEEP; 
+   switch (zpass) {
+   case GL_KEEP:
+      dpop = STENCILOP_KEEP;
       break;
-   case GL_ZERO: 
-      dpop = STENCILOP_ZERO; 
+   case GL_ZERO:
+      dpop = STENCILOP_ZERO;
       break;
-   case GL_REPLACE: 
-      dpop = STENCILOP_REPLACE; 
+   case GL_REPLACE:
+      dpop = STENCILOP_REPLACE;
       break;
-   case GL_INCR: 
+   case GL_INCR:
       dpop = STENCILOP_INCRSAT;
       break;
-   case GL_DECR: 
+   case GL_DECR:
       dpop = STENCILOP_DECRSAT;
       break;
    case GL_INCR_WRAP:
-      dpop = STENCILOP_INCR; 
+      dpop = STENCILOP_INCR;
       break;
    case GL_DECR_WRAP:
-      dpop = STENCILOP_DECR; 
+      dpop = STENCILOP_DECR;
       break;
-   case GL_INVERT: 
-      dpop = STENCILOP_INVERT; 
+   case GL_INVERT:
+      dpop = STENCILOP_INVERT;
       break;
-   default: 
+   default:
       break;
    }
 
@@ -188,27 +190,30 @@ i830StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, GLenum zfail,
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
-					    STENCIL_FAIL_OP(fop) |
-					    STENCIL_PASS_DEPTH_FAIL_OP(dfop) |
-					    STENCIL_PASS_DEPTH_PASS_OP(dpop));
+                                               STENCIL_FAIL_OP(fop) |
+                                               STENCIL_PASS_DEPTH_FAIL_OP
+                                               (dfop) |
+                                               STENCIL_PASS_DEPTH_PASS_OP
+                                               (dpop));
 }
 
-static void i830AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
+static void
+i830AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    int test = intel_translate_compare_func(func);
    GLubyte refByte;
    GLuint refInt;
 
    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
-   refInt = (GLuint)refByte;
+   refInt = (GLuint) refByte;
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
    i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
-					ENABLE_ALPHA_REF_VALUE |
-					ALPHA_TEST_FUNC(test) |
-					ALPHA_REF_VALUE(refInt));
+                                           ENABLE_ALPHA_REF_VALUE |
+                                           ALPHA_TEST_FUNC(test) |
+                                           ALPHA_REF_VALUE(refInt));
 }
 
 /**
@@ -221,45 +226,49 @@ static void i830AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
  * This function is substantially different from the old i830-specific driver.
  * I'm not sure which is correct.
  */
-static void i830EvalLogicOpBlendState(GLcontext *ctx)
+static void
+i830EvalLogicOpBlendState(GLcontext * ctx)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 
    if (RGBA_LOGICOP_ENABLED(ctx)) {
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
-					       ENABLE_LOGIC_OP_MASK);
+                                                  ENABLE_LOGIC_OP_MASK);
       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
-					      ENABLE_LOGIC_OP);
-   } else if (ctx->Color.BlendEnabled) {
+                                                 ENABLE_LOGIC_OP);
+   }
+   else if (ctx->Color.BlendEnabled) {
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
-					       ENABLE_LOGIC_OP_MASK);
+                                                  ENABLE_LOGIC_OP_MASK);
       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
-					      DISABLE_LOGIC_OP);
-   } else {
+                                                 DISABLE_LOGIC_OP);
+   }
+   else {
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
-					       ENABLE_LOGIC_OP_MASK);
+                                                  ENABLE_LOGIC_OP_MASK);
       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
-					      DISABLE_LOGIC_OP);
+                                                 DISABLE_LOGIC_OP);
    }
 }
 
-static void i830BlendColor(GLcontext *ctx, const GLfloat color[4])
+static void
+i830BlendColor(GLcontext * ctx, const GLfloat color[4])
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    GLubyte r, g, b, a;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
-   i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = (a<<24) | (r<<16) | (g<<8) | b;
+   i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
+      (a << 24) | (r << 16) | (g << 8) | b;
 }
 
 /**
@@ -268,9 +277,10 @@ static void i830BlendColor(GLcontext *ctx, const GLfloat color[4])
  * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
  * change the interpretation of the blend function.
  */
-static void i830_set_blend_state( GLcontext * ctx )
+static void
+i830_set_blend_state(GLcontext * ctx)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    int funcA;
    int funcRGB;
    int eqnA;
@@ -279,71 +289,72 @@ static void i830_set_blend_state( GLcontext * ctx )
    int s1;
 
 
-   funcRGB = SRC_BLND_FACT( intel_translate_blend_factor( ctx->Color.BlendSrcRGB ) )
-       | DST_BLND_FACT( intel_translate_blend_factor( ctx->Color.BlendDstRGB ) );
+   funcRGB =
+      SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcRGB))
+      | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstRGB));
 
-   switch(ctx->Color.BlendEquationRGB) {
+   switch (ctx->Color.BlendEquationRGB) {
    case GL_FUNC_ADD:
-      eqnRGB = BLENDFUNC_ADD; 
+      eqnRGB = BLENDFUNC_ADD;
       break;
    case GL_MIN:
       eqnRGB = BLENDFUNC_MIN;
       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
       break;
-   case GL_MAX: 
+   case GL_MAX:
       eqnRGB = BLENDFUNC_MAX;
       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
       break;
-   case GL_FUNC_SUBTRACT: 
-      eqnRGB = BLENDFUNC_SUB; 
+   case GL_FUNC_SUBTRACT:
+      eqnRGB = BLENDFUNC_SUB;
       break;
    case GL_FUNC_REVERSE_SUBTRACT:
-      eqnRGB = BLENDFUNC_RVRSE_SUB; 
+      eqnRGB = BLENDFUNC_RVRSE_SUB;
       break;
    default:
-      fprintf( stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
-	       __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB );
+      fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
+              __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
       return;
    }
 
 
-   funcA = SRC_ABLEND_FACT( intel_translate_blend_factor( ctx->Color.BlendSrcA ) )
-       | DST_ABLEND_FACT( intel_translate_blend_factor( ctx->Color.BlendDstA ) );
+   funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcA))
+      | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstA));
 
-   switch(ctx->Color.BlendEquationA) {
+   switch (ctx->Color.BlendEquationA) {
    case GL_FUNC_ADD:
-      eqnA = BLENDFUNC_ADD; 
+      eqnA = BLENDFUNC_ADD;
       break;
-   case GL_MIN: 
+   case GL_MIN:
       eqnA = BLENDFUNC_MIN;
       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
       break;
-   case GL_MAX: 
+   case GL_MAX:
       eqnA = BLENDFUNC_MAX;
       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
       break;
-   case GL_FUNC_SUBTRACT: 
-      eqnA = BLENDFUNC_SUB; 
+   case GL_FUNC_SUBTRACT:
+      eqnA = BLENDFUNC_SUB;
       break;
    case GL_FUNC_REVERSE_SUBTRACT:
-      eqnA = BLENDFUNC_RVRSE_SUB; 
+      eqnA = BLENDFUNC_RVRSE_SUB;
       break;
    default:
-      fprintf( stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
-	       __FUNCTION__, __LINE__, ctx->Color.BlendEquationA );
+      fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
+              __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
       return;
    }
 
    iab = eqnA | funcA
-       | _3DSTATE_INDPT_ALPHA_BLEND_CMD
-       | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
-       | ENABLE_ALPHA_BLENDFUNC;
+      | _3DSTATE_INDPT_ALPHA_BLEND_CMD
+      | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
+      | ENABLE_ALPHA_BLENDFUNC;
    s1 = eqnRGB | funcRGB
-       | _3DSTATE_MODES_1_CMD
-       | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
-       | ENABLE_COLR_BLND_FUNC;
+      | _3DSTATE_MODES_1_CMD
+      | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
+      | ENABLE_COLR_BLND_FUNC;
 
-   if ( (eqnA | funcA) != (eqnRGB | funcRGB) )
+   if ((eqnA | funcA) != (eqnRGB | funcRGB))
       iab |= ENABLE_INDPT_ALPHA_BLEND;
    else
       iab |= DISABLE_INDPT_ALPHA_BLEND;
@@ -363,70 +374,68 @@ static void i830_set_blend_state( GLcontext * ctx )
    i830EvalLogicOpBlendState(ctx);
 
    if (0) {
-      fprintf(stderr, "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
-	      __FUNCTION__, __LINE__,
-	      i830->state.Ctx[I830_CTXREG_STATE1],
-	      i830->state.Ctx[I830_CTXREG_IALPHAB],
-	      (ctx->Color.BlendEnabled) ? "en" : "dis");
+      fprintf(stderr,
+              "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
+              __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
+              i830->state.Ctx[I830_CTXREG_IALPHAB],
+              (ctx->Color.BlendEnabled) ? "en" : "dis");
    }
 }
 
 
-static void i830BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB,
-				      GLenum modeA) 
+static void
+i830BlendEquationSeparate(GLcontext * ctx, GLenum modeRGB, GLenum modeA)
 {
-   if (INTEL_DEBUG&DEBUG_DRI)
-     fprintf(stderr, "%s -> %s, %s\n", __FUNCTION__,
-	     _mesa_lookup_enum_by_nr(modeRGB),
-	     _mesa_lookup_enum_by_nr(modeA));
+   DBG("%s -> %s, %s\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(modeRGB),
+       _mesa_lookup_enum_by_nr(modeA));
 
    (void) modeRGB;
    (void) modeA;
-   i830_set_blend_state( ctx );
+   i830_set_blend_state(ctx);
 }
 
 
-static void i830BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, 
-				  GLenum dfactorRGB, GLenum sfactorA,
-				  GLenum dfactorA )
+static void
+i830BlendFuncSeparate(GLcontext * ctx, GLenum sfactorRGB,
+                      GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
 {
-   if (INTEL_DEBUG&DEBUG_DRI)
-     fprintf(stderr, "%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
-	     _mesa_lookup_enum_by_nr(sfactorRGB),
-	     _mesa_lookup_enum_by_nr(dfactorRGB),
-	     _mesa_lookup_enum_by_nr(sfactorA),
-	     _mesa_lookup_enum_by_nr(dfactorA));
+   DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(sfactorRGB),
+       _mesa_lookup_enum_by_nr(dfactorRGB),
+       _mesa_lookup_enum_by_nr(sfactorA),
+       _mesa_lookup_enum_by_nr(dfactorA));
 
    (void) sfactorRGB;
    (void) dfactorRGB;
    (void) sfactorA;
    (void) dfactorA;
-   i830_set_blend_state( ctx );
+   i830_set_blend_state(ctx);
 }
 
 
 
-static void i830DepthFunc(GLcontext *ctx, GLenum func)
+static void
+i830DepthFunc(GLcontext * ctx, GLenum func)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    int test = intel_translate_compare_func(func);
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
    i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
-				       DEPTH_TEST_FUNC(test));
+                                           DEPTH_TEST_FUNC(test));
 }
 
-static void i830DepthMask(GLcontext *ctx, GLboolean flag)
+static void
+i830DepthMask(GLcontext * ctx, GLboolean flag)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s flag (%d)\n", __FUNCTION__, flag);
+   struct i830_context *i830 = i830_context(ctx);
 
+   DBG("%s flag (%d)\n", __FUNCTION__, flag);
+   
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 
    i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
@@ -443,14 +452,15 @@ static void i830DepthMask(GLcontext *ctx, GLboolean flag)
  * The i830 supports a 4x4 stipple natively, GL wants 32x32.
  * Fortunately stipple is usually a repeating pattern.
  */
-static void i830PolygonStipple( GLcontext *ctx, const GLubyte *mask )
+static void
+i830PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    const GLubyte *m = mask;
    GLubyte p[4];
-   int i,j,k;
+   int i, j, k;
    int active = (ctx->Polygon.StippleFlag &&
-		 i830->intel.reduced_primitive == GL_TRIANGLES);
+                 i830->intel.reduced_primitive == GL_TRIANGLES);
    GLuint newMask;
 
    if (active) {
@@ -458,23 +468,26 @@ static void i830PolygonStipple( GLcontext *ctx, const GLubyte *mask )
       i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
    }
 
-   p[0] = mask[12] & 0xf; p[0] |= p[0] << 4;
-   p[1] = mask[8] & 0xf; p[1] |= p[1] << 4;
-   p[2] = mask[4] & 0xf; p[2] |= p[2] << 4;
-   p[3] = mask[0] & 0xf; p[3] |= p[3] << 4;
-
-   for (k = 0 ; k < 8 ; k++)
-      for (j = 3 ; j >= 0; j--)
-	 for (i = 0 ; i < 4 ; i++, m++)
-	    if (*m != p[j]) {
-	       i830->intel.hw_stipple = 0;
-	       return;
-	    }
+   p[0] = mask[12] & 0xf;
+   p[0] |= p[0] << 4;
+   p[1] = mask[8] & 0xf;
+   p[1] |= p[1] << 4;
+   p[2] = mask[4] & 0xf;
+   p[2] |= p[2] << 4;
+   p[3] = mask[0] & 0xf;
+   p[3] |= p[3] << 4;
+
+   for (k = 0; k < 8; k++)
+      for (j = 3; j >= 0; j--)
+         for (i = 0; i < 4; i++, m++)
+            if (*m != p[j]) {
+               i830->intel.hw_stipple = 0;
+               return;
+            }
 
    newMask = (((p[0] & 0xf) << 0) |
-	      ((p[1] & 0xf) << 4) |
-	      ((p[2] & 0xf) << 8) |
-	      ((p[3] & 0xf) << 12));
+              ((p[1] & 0xf) << 4) |
+              ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 
 
    if (newMask == 0xffff || newMask == 0x0) {
@@ -495,49 +508,54 @@ static void i830PolygonStipple( GLcontext *ctx, const GLubyte *mask )
 /* =============================================================
  * Hardware clipping
  */
-static void i830Scissor(GLcontext *ctx, GLint x, GLint y, 
-			GLsizei w, GLsizei h)
+static void
+i830Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   intelScreenPrivate *screen = i830->intel.intelScreen;
+   struct i830_context *i830 = i830_context(ctx);
    int x1, y1, x2, y2;
 
-   if (!i830->intel.driDrawable)
+   if (!ctx->DrawBuffer)
       return;
 
-   x1 = x;
-   y1 = i830->intel.driDrawable->h - (y + h);
-   x2 = x + w - 1;
-   y2 = y1 + h - 1;
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "[%s] x(%d) y(%d) w(%d) h(%d)\n", __FUNCTION__,
-	      x, y, w, h);
+   DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 
-   if (x1 < 0) x1 = 0;
-   if (y1 < 0) y1 = 0;
-   if (x2 < 0) x2 = 0;
-   if (y2 < 0) y2 = 0;
-
-   if (x2 >= screen->width) x2 = screen->width-1;
-   if (y2 >= screen->height) y2 = screen->height-1;
-   if (x1 >= screen->width) x1 = screen->width-1;
-   if (y1 >= screen->height) y1 = screen->height-1;
+   if (ctx->DrawBuffer->Name == 0) {
+      x1 = x;
+      y1 = ctx->DrawBuffer->Height - (y + h);
+      x2 = x + w - 1;
+      y2 = y1 + h - 1;
+      DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
+   }
+   else {
+      /* FBO - not inverted
+       */
+      x1 = x;
+      y1 = y;
+      x2 = x + w - 1;
+      y2 = y + h - 1;
+      DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
+   }
 
+   x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
+   y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
+   x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
+   y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
+   
+   DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 
    I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
    i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
    i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 }
 
-static void i830LogicOp(GLcontext *ctx, GLenum opcode)
+static void
+i830LogicOp(GLcontext * ctx, GLenum opcode)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   int tmp = intel_translate_logic_op( opcode );
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
+   struct i830_context *i830 = i830_context(ctx);
+   int tmp = intel_translate_logic_op(opcode);
 
+   DBG("%s\n", __FUNCTION__);
+   
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
    i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
@@ -545,14 +563,14 @@ static void i830LogicOp(GLcontext *ctx, GLenum opcode)
 
 
 
-static void i830CullFaceFrontFace(GLcontext *ctx, GLenum unused)
+static void
+i830CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    GLuint mode;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    if (!ctx->Polygon.CullFlag) {
       mode = CULLMODE_NONE;
    }
@@ -560,9 +578,9 @@ static void i830CullFaceFrontFace(GLcontext *ctx, GLenum unused)
       mode = CULLMODE_CW;
 
       if (ctx->Polygon.CullFaceMode == GL_FRONT)
-	 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
+         mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
       if (ctx->Polygon.FrontFace != GL_CCW)
-	 mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
+         mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
    }
    else {
       mode = CULLMODE_BOTH;
@@ -573,18 +591,18 @@ static void i830CullFaceFrontFace(GLcontext *ctx, GLenum unused)
    i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
 }
 
-static void i830LineWidth( GLcontext *ctx, GLfloat widthf )
+static void
+i830LineWidth(GLcontext * ctx, GLfloat widthf)
 {
-   i830ContextPtr i830 = I830_CONTEXT( ctx );
+   struct i830_context *i830 = i830_context(ctx);
    int width;
    int state5;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   width = (int)(widthf * 2);
-   CLAMP_SELF(width, 1, 15);
+   DBG("%s\n", __FUNCTION__);
    
+   width = (int) (widthf * 2);
+   CLAMP_SELF(width, 1, 15);
+
    state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
    state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
 
@@ -594,19 +612,19 @@ static void i830LineWidth( GLcontext *ctx, GLfloat widthf )
    }
 }
 
-static void i830PointSize(GLcontext *ctx, GLfloat size)
+static void
+i830PointSize(GLcontext * ctx, GLfloat size)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   GLint point_size = (int)size;
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-     fprintf(stderr, "%s\n", __FUNCTION__);
+   struct i830_context *i830 = i830_context(ctx);
+   GLint point_size = (int) size;
 
+   DBG("%s\n", __FUNCTION__);
+   
    CLAMP_SELF(point_size, 1, 256);
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
    i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
-				       FIXED_POINT_WIDTH(point_size));
+                                           FIXED_POINT_WIDTH(point_size));
 }
 
 
@@ -614,23 +632,21 @@ static void i830PointSize(GLcontext *ctx, GLfloat size)
  * Color masks
  */
 
-static void i830ColorMask(GLcontext *ctx,
-			  GLboolean r, GLboolean g,
-			  GLboolean b, GLboolean a)
+static void
+i830ColorMask(GLcontext * ctx,
+              GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 {
-   i830ContextPtr i830 = I830_CONTEXT( ctx );
+   struct i830_context *i830 = i830_context(ctx);
    GLuint tmp = 0;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
+   DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
 
    tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
-	  ENABLE_COLOR_MASK |
-	  ENABLE_COLOR_WRITE |
-	  ((!r) << WRITEMASK_RED_SHIFT) |
-	  ((!g) << WRITEMASK_GREEN_SHIFT) |
-	  ((!b) << WRITEMASK_BLUE_SHIFT) |
-	  ((!a) << WRITEMASK_ALPHA_SHIFT));
+          ENABLE_COLOR_MASK |
+          ENABLE_COLOR_WRITE |
+          ((!r) << WRITEMASK_RED_SHIFT) |
+          ((!g) << WRITEMASK_GREEN_SHIFT) |
+          ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
 
    if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
@@ -638,9 +654,10 @@ static void i830ColorMask(GLcontext *ctx,
    }
 }
 
-static void update_specular( GLcontext *ctx )
+static void
+update_specular(GLcontext * ctx)
 {
-   i830ContextPtr i830 = I830_CONTEXT( ctx );
+   struct i830_context *i830 = i830_context(ctx);
 
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
    i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
@@ -651,22 +668,22 @@ static void update_specular( GLcontext *ctx )
       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
 }
 
-static void i830LightModelfv(GLcontext *ctx, GLenum pname, 
-			     const GLfloat *param)
+static void
+i830LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 {
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
-      update_specular( ctx );
+      update_specular(ctx);
    }
 }
 
 /* In Mesa 3.5 we can reliably do native flatshading.
  */
-static void i830ShadeModel(GLcontext *ctx, GLenum mode)
+static void
+i830ShadeModel(GLcontext * ctx, GLenum mode)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 
 
@@ -675,58 +692,62 @@ static void i830ShadeModel(GLcontext *ctx, GLenum mode)
    i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
 
    if (mode == GL_FLAT) {
-     i830->state.Ctx[I830_CTXREG_STATE3] |= (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) |
-					  FOG_SHADE_MODE(SHADE_MODE_FLAT) |
-					  SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
-					  COLOR_SHADE_MODE(SHADE_MODE_FLAT));
-   } else {
-     i830->state.Ctx[I830_CTXREG_STATE3] |= (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
+      i830->state.Ctx[I830_CTXREG_STATE3] |=
+         (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
+          | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
+          COLOR_SHADE_MODE(SHADE_MODE_FLAT));
+   }
+   else {
+      i830->state.Ctx[I830_CTXREG_STATE3] |=
+         (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
+          FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
+          SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
+          COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
    }
 }
 
 /* =============================================================
  * Fog
  */
-static void i830Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param)
+static void
+i830Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
+   struct i830_context *i830 = i830_context(ctx);
 
-   if (pname == GL_FOG_COLOR) {      
-      GLuint color = (((GLubyte)(ctx->Fog.Color[0]*255.0F) << 16) |
-		      ((GLubyte)(ctx->Fog.Color[1]*255.0F) << 8) |
-		      ((GLubyte)(ctx->Fog.Color[2]*255.0F) << 0));
+   DBG("%s\n", __FUNCTION__);
+   
+   if (pname == GL_FOG_COLOR) {
+      GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
+                      ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
+                      ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
-      i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD | color);
+      i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
+         (_3DSTATE_FOG_COLOR_CMD | color);
    }
 }
 
 /* =============================================================
  */
 
-static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
+static void
+i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 {
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   struct i830_context *i830 = i830_context(ctx);
 
-   switch(cap) {
+   switch (cap) {
    case GL_LIGHTING:
    case GL_COLOR_SUM:
-      update_specular( ctx );
+      update_specular(ctx);
       break;
 
    case GL_ALPHA_TEST:
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
       if (state)
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
       else
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
 
       break;
 
@@ -739,18 +760,18 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
 
       /* Logicop doesn't seem to work at 16bpp:
        */
-      if (i830->intel.intelScreen->cpp == 2)
-	 FALLBACK( &i830->intel, I830_FALLBACK_LOGICOP, state );
+      if (i830->intel.ctx.Visual.rgbBits == 16)
+         FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
       break;
- 
+
    case GL_DITHER:
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
       i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
 
       if (state)
-	 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
+         i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
       else
-	 i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
+         i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
       break;
 
    case GL_DEPTH_TEST:
@@ -758,46 +779,44 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
 
       if (state)
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
       else
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
 
       /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
        */
-      i830DepthMask( ctx, ctx->Depth.Mask );
+      i830DepthMask(ctx, ctx->Depth.Mask);
       break;
 
    case GL_SCISSOR_TEST:
       I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
-      
+
       if (state)
-	 i830->state.Buffer[I830_DESTREG_SENABLE] = 
-	    (_3DSTATE_SCISSOR_ENABLE_CMD |
-	     ENABLE_SCISSOR_RECT);
+         i830->state.Buffer[I830_DESTREG_SENABLE] =
+            (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
       else
-	 i830->state.Buffer[I830_DESTREG_SENABLE] = 
-	    (_3DSTATE_SCISSOR_ENABLE_CMD |
-	     DISABLE_SCISSOR_RECT);
+         i830->state.Buffer[I830_DESTREG_SENABLE] =
+            (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 
       break;
 
    case GL_LINE_SMOOTH:
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
-      
+
       i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
       if (state)
-	 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
+         i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
       else
-	 i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
+         i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
       break;
 
    case GL_FOG:
       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
       if (state)
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
       else
-	 i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
+         i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
       break;
 
    case GL_CULL_FACE:
@@ -808,20 +827,32 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
       break;
 
    case GL_STENCIL_TEST:
-      if (i830->intel.hw_stencil) {
-	 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
-
-	 if (state) {
-	    i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
-	    i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
-	 } else {
-	    i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
-	    i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_STENCIL_WRITE;
-	    i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
-	    i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;
-	 }
-      } else {
-	 FALLBACK( &i830->intel, I830_FALLBACK_STENCIL, state );
+      {
+         GLboolean hw_stencil = GL_FALSE;
+         if (ctx->DrawBuffer) {
+            struct intel_renderbuffer *irbStencil
+               = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
+            hw_stencil = (irbStencil && irbStencil->region);
+         }
+         if (hw_stencil) {
+            I830_STATECHANGE(i830, I830_UPLOAD_CTX);
+
+            if (state) {
+               i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
+               i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
+            }
+            else {
+               i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
+               i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
+                  ~ENABLE_STENCIL_WRITE;
+               i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
+               i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
+                  DISABLE_STENCIL_WRITE;
+            }
+         }
+         else {
+            FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
+         }
       }
       break;
 
@@ -830,13 +861,12 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
        * I'll do more testing later to find out exactly which hardware
        * supports it.  Disabled for now.
        */
-      if (i830->intel.hw_stipple && 
-	  i830->intel.reduced_primitive == GL_TRIANGLES)
-      {
-	 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
-	 i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
-	 if (state)
-	    i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
+      if (i830->intel.hw_stipple &&
+          i830->intel.reduced_primitive == GL_TRIANGLES) {
+         I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
+         i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
+         if (state)
+            i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
       }
       break;
 
@@ -846,206 +876,172 @@ static void i830Enable(GLcontext *ctx, GLenum cap, GLboolean state)
 }
 
 
-static void i830_init_packets( i830ContextPtr i830 )
+static void
+i830_init_packets(struct i830_context *i830)
 {
-   intelScreenPrivate *screen = i830->intel.intelScreen;
-
    /* Zero all state */
    memset(&i830->state, 0, sizeof(i830->state));
 
    /* Set default blend state */
    i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
-				  TEXPIPE_COLOR |
-				  ENABLE_TEXOUTPUT_WRT_SEL |
-				  TEXOP_OUTPUT_CURRENT |
-				  DISABLE_TEX_CNTRL_STAGE |
-				  TEXOP_SCALE_1X |
-				  TEXOP_MODIFY_PARMS |
-				  TEXOP_LAST_STAGE |
-				  TEXBLENDOP_ARG1);
+                                 TEXPIPE_COLOR |
+                                 ENABLE_TEXOUTPUT_WRT_SEL |
+                                 TEXOP_OUTPUT_CURRENT |
+                                 DISABLE_TEX_CNTRL_STAGE |
+                                 TEXOP_SCALE_1X |
+                                 TEXOP_MODIFY_PARMS |
+                                 TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
    i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
-				  TEXPIPE_ALPHA |
-				  ENABLE_TEXOUTPUT_WRT_SEL |
-				  TEXOP_OUTPUT_CURRENT |
-				  TEXOP_SCALE_1X |
-				  TEXOP_MODIFY_PARMS |
-				  TEXBLENDOP_ARG1);
+                                 TEXPIPE_ALPHA |
+                                 ENABLE_TEXOUTPUT_WRT_SEL |
+                                 TEXOP_OUTPUT_CURRENT |
+                                 TEXOP_SCALE_1X |
+                                 TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
    i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
-				  TEXPIPE_COLOR |
-				  TEXBLEND_ARG1 |
-				  TEXBLENDARG_MODIFY_PARMS |
-				  TEXBLENDARG_DIFFUSE);
+                                 TEXPIPE_COLOR |
+                                 TEXBLEND_ARG1 |
+                                 TEXBLENDARG_MODIFY_PARMS |
+                                 TEXBLENDARG_DIFFUSE);
    i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
-				  TEXPIPE_ALPHA |
-				  TEXBLEND_ARG1 |
-				  TEXBLENDARG_MODIFY_PARMS |
-				  TEXBLENDARG_DIFFUSE);
+                                 TEXPIPE_ALPHA |
+                                 TEXBLEND_ARG1 |
+                                 TEXBLENDARG_MODIFY_PARMS |
+                                 TEXBLENDARG_DIFFUSE);
 
    i830->state.TexBlendWordsUsed[0] = 4;
 
 
-   i830->state.Ctx[I830_CTXREG_VF] =  0;
+   i830->state.Ctx[I830_CTXREG_VF] = 0;
    i830->state.Ctx[I830_CTXREG_VF2] = 0;
 
    i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
-				      AA_LINE_ECAAR_WIDTH_ENABLE |
-				      AA_LINE_ECAAR_WIDTH_1_0 |
-				      AA_LINE_REGION_WIDTH_ENABLE |
-				      AA_LINE_REGION_WIDTH_1_0 | 
-				      AA_LINE_DISABLE);
+                                      AA_LINE_ECAAR_WIDTH_ENABLE |
+                                      AA_LINE_ECAAR_WIDTH_1_0 |
+                                      AA_LINE_REGION_WIDTH_ENABLE |
+                                      AA_LINE_REGION_WIDTH_1_0 |
+                                      AA_LINE_DISABLE);
 
    i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
-					     DISABLE_LOGIC_OP |
-					     DISABLE_STENCIL_TEST |
-					     DISABLE_DEPTH_BIAS |
-					     DISABLE_SPEC_ADD |
-					     DISABLE_FOG |
-					     DISABLE_ALPHA_TEST |
-					     DISABLE_COLOR_BLEND |
-					     DISABLE_DEPTH_TEST);
-
+                                             DISABLE_LOGIC_OP |
+                                             DISABLE_STENCIL_TEST |
+                                             DISABLE_DEPTH_BIAS |
+                                             DISABLE_SPEC_ADD |
+                                             DISABLE_FOG |
+                                             DISABLE_ALPHA_TEST |
+                                             DISABLE_COLOR_BLEND |
+                                             DISABLE_DEPTH_TEST);
+
+#if 000                         /* XXX all the stencil enable state is set in i830Enable(), right? */
    if (i830->intel.hw_stencil) {
       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
-						ENABLE_STENCIL_WRITE |
-						ENABLE_TEX_CACHE |
-						ENABLE_DITHER |
-						ENABLE_COLOR_MASK |
-						/* set no color comps disabled */
-						ENABLE_COLOR_WRITE |
-						ENABLE_DEPTH_WRITE);
-   } else {
+                                                ENABLE_STENCIL_WRITE |
+                                                ENABLE_TEX_CACHE |
+                                                ENABLE_DITHER |
+                                                ENABLE_COLOR_MASK |
+                                                /* set no color comps disabled */
+                                                ENABLE_COLOR_WRITE |
+                                                ENABLE_DEPTH_WRITE);
+   }
+   else
+#endif
+   {
       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
-						DISABLE_STENCIL_WRITE |
-						ENABLE_TEX_CACHE |
-						ENABLE_DITHER |
-						ENABLE_COLOR_MASK |
-						/* set no color comps disabled */
-						ENABLE_COLOR_WRITE |
-						ENABLE_DEPTH_WRITE);
+                                                DISABLE_STENCIL_WRITE |
+                                                ENABLE_TEX_CACHE |
+                                                ENABLE_DITHER |
+                                                ENABLE_COLOR_MASK |
+                                                /* set no color comps disabled */
+                                                ENABLE_COLOR_WRITE |
+                                                ENABLE_DEPTH_WRITE);
    }
 
    i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
-					  ENABLE_COLR_BLND_FUNC |
-					  BLENDFUNC_ADD |
-					  ENABLE_SRC_BLND_FACTOR |
-					  SRC_BLND_FACT(BLENDFACT_ONE) | 
-					  ENABLE_DST_BLND_FACTOR |
-					  DST_BLND_FACT(BLENDFACT_ZERO) );
+                                          ENABLE_COLR_BLND_FUNC |
+                                          BLENDFUNC_ADD |
+                                          ENABLE_SRC_BLND_FACTOR |
+                                          SRC_BLND_FACT(BLENDFACT_ONE) |
+                                          ENABLE_DST_BLND_FACTOR |
+                                          DST_BLND_FACT(BLENDFACT_ZERO));
 
    i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
-					  ENABLE_GLOBAL_DEPTH_BIAS | 
-					  GLOBAL_DEPTH_BIAS(0) |
-					  ENABLE_ALPHA_TEST_FUNC | 
-					  ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS) |
-					  ALPHA_REF_VALUE(0) );
+                                          ENABLE_GLOBAL_DEPTH_BIAS |
+                                          GLOBAL_DEPTH_BIAS(0) |
+                                          ENABLE_ALPHA_TEST_FUNC |
+                                          ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
+                                          | ALPHA_REF_VALUE(0));
 
    i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
-					  ENABLE_DEPTH_TEST_FUNC |
-					  DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
-					  ENABLE_ALPHA_SHADE_MODE |
-					  ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  ENABLE_FOG_SHADE_MODE |
-					  FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  ENABLE_SPEC_SHADE_MODE |
-					  SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  ENABLE_COLOR_SHADE_MODE |
-					  COLOR_SHADE_MODE(SHADE_MODE_LINEAR) |
-					  ENABLE_CULL_MODE |
-					  CULLMODE_NONE);
+                                          ENABLE_DEPTH_TEST_FUNC |
+                                          DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
+                                          ENABLE_ALPHA_SHADE_MODE |
+                                          ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
+                                          | ENABLE_FOG_SHADE_MODE |
+                                          FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
+                                          ENABLE_SPEC_SHADE_MODE |
+                                          SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
+                                          ENABLE_COLOR_SHADE_MODE |
+                                          COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
+                                          | ENABLE_CULL_MODE | CULLMODE_NONE);
 
    i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
-					  ENABLE_LOGIC_OP_FUNC |
-					  LOGIC_OP_FUNC(LOGICOP_COPY) |
-					  ENABLE_STENCIL_TEST_MASK |
-					  STENCIL_TEST_MASK(0xff) |
-					  ENABLE_STENCIL_WRITE_MASK |
-					  STENCIL_WRITE_MASK(0xff));
+                                          ENABLE_LOGIC_OP_FUNC |
+                                          LOGIC_OP_FUNC(LOGICOP_COPY) |
+                                          ENABLE_STENCIL_TEST_MASK |
+                                          STENCIL_TEST_MASK(0xff) |
+                                          ENABLE_STENCIL_WRITE_MASK |
+                                          STENCIL_WRITE_MASK(0xff));
 
    i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
-					      ENABLE_STENCIL_PARMS |
-					      STENCIL_FAIL_OP(STENCILOP_KEEP) |
-					      STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_KEEP) |
-					      STENCIL_PASS_DEPTH_PASS_OP(STENCILOP_KEEP) |
-					      ENABLE_STENCIL_TEST_FUNC |
-					      STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS) |
-					      ENABLE_STENCIL_REF_VALUE |
-					      STENCIL_REF_VALUE(0) );
-
-   i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD |
-					  FLUSH_TEXTURE_CACHE |
-					  ENABLE_SPRITE_POINT_TEX |
-					  SPRITE_POINT_TEX_OFF |
-					  ENABLE_FIXED_LINE_WIDTH |
-					  FIXED_LINE_WIDTH(0x2) | /* 1.0 */
-					  ENABLE_FIXED_POINT_WIDTH |
-					  FIXED_POINT_WIDTH(1) );
+                                              ENABLE_STENCIL_PARMS |
+                                              STENCIL_FAIL_OP(STENCILOP_KEEP)
+                                              |
+                                              STENCIL_PASS_DEPTH_FAIL_OP
+                                              (STENCILOP_KEEP) |
+                                              STENCIL_PASS_DEPTH_PASS_OP
+                                              (STENCILOP_KEEP) |
+                                              ENABLE_STENCIL_TEST_FUNC |
+                                              STENCIL_TEST_FUNC
+                                              (COMPAREFUNC_ALWAYS) |
+                                              ENABLE_STENCIL_REF_VALUE |
+                                              STENCIL_REF_VALUE(0));
+
+   i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) |       /* 1.0 */
+                                          ENABLE_FIXED_POINT_WIDTH |
+                                          FIXED_POINT_WIDTH(1));
 
    i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
-					   DISABLE_INDPT_ALPHA_BLEND |
-					   ENABLE_ALPHA_BLENDFUNC |
-					   ABLENDFUNC_ADD);
+                                           DISABLE_INDPT_ALPHA_BLEND |
+                                           ENABLE_ALPHA_BLENDFUNC |
+                                           ABLENDFUNC_ADD);
 
    i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
-					    FOG_COLOR_RED(0) |
-					    FOG_COLOR_GREEN(0) |
-					    FOG_COLOR_BLUE(0));
+                                            FOG_COLOR_RED(0) |
+                                            FOG_COLOR_GREEN(0) |
+                                            FOG_COLOR_BLUE(0));
 
    i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
 
    i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
    i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
-					 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
-					 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
-					 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
-					 
-
-   i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
-
-   i830->state.Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
-   i830->state.Buffer[I830_DESTREG_CBUFADDR1] = 
-      (BUF_3D_ID_COLOR_BACK | 
-       BUF_3D_PITCH(screen->front.pitch) |  /* pitch in bytes */
-       BUF_3D_USE_FENCE);
+                                         TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
+                                         TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
+                                         TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
 
 
-   i830->state.Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
-   i830->state.Buffer[I830_DESTREG_DBUFADDR1] = 
-      (BUF_3D_ID_DEPTH |
-       BUF_3D_PITCH(screen->depth.pitch) |  /* pitch in bytes */
-       BUF_3D_USE_FENCE);
-   i830->state.Buffer[I830_DESTREG_DBUFADDR2] = screen->depth.offset;
-
+   i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
 
    i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
-
-   switch (screen->fbFormat) {
-   case DV_PF_555:
-   case DV_PF_565:
-      i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					      DSTORG_VERT_BIAS(0x8) | /* .5 */
-					      screen->fbFormat |
-					      DEPTH_IS_Z |
-					      DEPTH_FRMT_16_FIXED);
-      break;
-   case DV_PF_8888:
-      i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					      DSTORG_VERT_BIAS(0x8) | /* .5 */
-					      screen->fbFormat |
-					      DEPTH_IS_Z |
-					      DEPTH_FRMT_24_FIXED_8_OTHER);
-      break;
-   }
-
    i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
-					       DISABLE_SCISSOR_RECT);
+                                               DISABLE_SCISSOR_RECT);
    i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
    i830->state.Buffer[I830_DESTREG_SR1] = 0;
    i830->state.Buffer[I830_DESTREG_SR2] = 0;
 }
 
 
-void i830InitStateFuncs( struct dd_function_table *functions )
+void
+i830InitStateFuncs(struct dd_function_table *functions)
 {
    functions->AlphaFunc = i830AlphaFunc;
    functions->BlendColor = i830BlendColor;
@@ -1070,20 +1066,21 @@ void i830InitStateFuncs( struct dd_function_table *functions )
    functions->StencilOpSeparate = i830StencilOpSeparate;
 }
 
-void i830InitState( i830ContextPtr i830 )
+void
+i830InitState(struct i830_context *i830)
 {
    GLcontext *ctx = &i830->intel.ctx;
 
-   i830_init_packets( i830 );
+   i830_init_packets(i830);
 
    _mesa_init_driver_state(ctx);
 
-   memcpy( &i830->initial, &i830->state, sizeof(i830->state) );
+   memcpy(&i830->initial, &i830->state, sizeof(i830->state));
 
    i830->current = &i830->state;
    i830->state.emitted = 0;
-   i830->state.active = (I830_UPLOAD_TEXBLEND(0) |
-			 I830_UPLOAD_STIPPLE |
-			 I830_UPLOAD_CTX |
-			 I830_UPLOAD_BUFFERS);
+   i830->state.active = (I830_UPLOAD_INVARIENT |
+                         I830_UPLOAD_TEXBLEND(0) |
+                         I830_UPLOAD_STIPPLE |
+                         I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
 }
diff --git a/src/mesa/drivers/dri/i915/i830_tex.c b/src/mesa/drivers/dri/i915/i830_tex.c
index 3c4aedb35cb..34ac42a78e0 100644
--- a/src/mesa/drivers/dri/i915/i830_tex.c
+++ b/src/mesa/drivers/dri/i915/i830_tex.c
@@ -25,281 +25,31 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "image.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "texmem.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/mm.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
-
-#include "intel_ioctl.h"
+#include "texmem.h"
 
 #include "i830_context.h"
 #include "i830_reg.h"
 
 
 
-
-/**
- * Set the texture wrap modes.
- * 
- * The i830M (and related graphics cores) do not support GL_CLAMP.  The Intel
- * drivers for "other operating systems" implement GL_CLAMP as
- * GL_CLAMP_TO_EDGE, so the same is done here.
- * 
- * \param t Texture object whose wrap modes are to be set
- * \param swrap Wrap mode for the \a s texture coordinate
- * \param twrap Wrap mode for the \a t texture coordinate
- */
-static void i830SetTexWrapping(i830TextureObjectPtr tex,
-			       GLenum swrap, 
-			       GLenum twrap)
-{
-   tex->Setup[I830_TEXREG_MCS] &= ~(TEXCOORD_ADDR_U_MASK|TEXCOORD_ADDR_V_MASK);
-
-   switch( swrap ) {
-   case GL_REPEAT:
-      tex->Setup[I830_TEXREG_MCS] |= TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP);
-      break;
-   case GL_CLAMP:
-   case GL_CLAMP_TO_EDGE:
-      tex->Setup[I830_TEXREG_MCS] |= TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_CLAMP);
-      break;
-   case GL_CLAMP_TO_BORDER:
-      tex->Setup[I830_TEXREG_MCS] |= 
-			TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_CLAMP_BORDER);
-      break;
-   case GL_MIRRORED_REPEAT:
-      tex->Setup[I830_TEXREG_MCS] |= 
-			TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_MIRROR);
-      break;
-   default:
-      break;
-   }
-
-   switch( twrap ) {
-   case GL_REPEAT:
-      tex->Setup[I830_TEXREG_MCS] |= TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP);
-      break;
-   case GL_CLAMP:
-   case GL_CLAMP_TO_EDGE:
-      tex->Setup[I830_TEXREG_MCS] |= TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_CLAMP);
-      break;
-   case GL_CLAMP_TO_BORDER:
-      tex->Setup[I830_TEXREG_MCS] |= 
-			TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_CLAMP_BORDER);
-      break;
-   case GL_MIRRORED_REPEAT:
-      tex->Setup[I830_TEXREG_MCS] |=
-			TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_MIRROR);
-      break;
-   default:
-      break;
-   }
-}
-
-
-/**
- * Set the texture magnification and minification modes.
- * 
- * \param t Texture whose filter modes are to be set
- * \param minf Texture minification mode
- * \param magf Texture magnification mode
- * \param bias LOD bias for this texture unit.
- */
-
-static void i830SetTexFilter( i830TextureObjectPtr t, GLenum minf, GLenum magf,
-			      GLfloat maxanisotropy )
-{
-   int minFilt = 0, mipFilt = 0, magFilt = 0;
-
-   if(INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if ( maxanisotropy > 1.0 ) {
-      minFilt = FILTER_ANISOTROPIC;
-      magFilt = FILTER_ANISOTROPIC;
-   }
-   else {
-      switch (minf) {
-      case GL_NEAREST:
-	 minFilt = FILTER_NEAREST;
-	 mipFilt = MIPFILTER_NONE;
-	 break;
-      case GL_LINEAR:
-	 minFilt = FILTER_LINEAR;
-	 mipFilt = MIPFILTER_NONE;
-	 break;
-      case GL_NEAREST_MIPMAP_NEAREST:
-	 minFilt = FILTER_NEAREST;
-	 mipFilt = MIPFILTER_NEAREST;
-	 break;
-      case GL_LINEAR_MIPMAP_NEAREST:
-	 minFilt = FILTER_LINEAR;
-	 mipFilt = MIPFILTER_NEAREST;
-	 break;
-      case GL_NEAREST_MIPMAP_LINEAR:
-	 minFilt = FILTER_NEAREST;
-	 mipFilt = MIPFILTER_LINEAR;
-	 break;
-      case GL_LINEAR_MIPMAP_LINEAR:
-	 minFilt = FILTER_LINEAR;
-	 mipFilt = MIPFILTER_LINEAR;
-	 break;
-      default:
-	 break;
-      }
-
-      switch (magf) {
-      case GL_NEAREST:
-	 magFilt = FILTER_NEAREST;
-	 break;
-      case GL_LINEAR:
-	 magFilt = FILTER_LINEAR;
-	 break;
-      default:
-	 break;
-      }  
-   }
-
-   t->Setup[I830_TEXREG_TM0S3] &= ~TM0S3_MIN_FILTER_MASK;
-   t->Setup[I830_TEXREG_TM0S3] &= ~TM0S3_MIP_FILTER_MASK;
-   t->Setup[I830_TEXREG_TM0S3] &= ~TM0S3_MAG_FILTER_MASK;
-   t->Setup[I830_TEXREG_TM0S3] |= ((minFilt << TM0S3_MIN_FILTER_SHIFT) |
-				   (mipFilt << TM0S3_MIP_FILTER_SHIFT) |
-				   (magFilt << TM0S3_MAG_FILTER_SHIFT));
-}
-
-static void i830SetTexBorderColor(i830TextureObjectPtr t, GLubyte color[4])
+static void
+i830TexEnv(GLcontext * ctx, GLenum target,
+           GLenum pname, const GLfloat * param)
 {
-   if(INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-    t->Setup[I830_TEXREG_TM0S4] = 
-        INTEL_PACKCOLOR8888(color[0],color[1],color[2],color[3]);
-}
-
-
-/**
- * Allocate space for and load the mesa images into the texture memory block.
- * This will happen before drawing with a new texture, or drawing with a
- * texture after it was swapped out or teximaged again.
- */
-
-intelTextureObjectPtr i830AllocTexObj( struct gl_texture_object *texObj )
-{
-   i830TextureObjectPtr t = CALLOC_STRUCT( i830_texture_object );
-   if ( !t ) 
-      return NULL;
-
-   texObj->DriverData = t;
-   t->intel.base.tObj = texObj;
-   t->intel.dirty = I830_UPLOAD_TEX_ALL;
-   make_empty_list( &t->intel.base );
-
-   t->Setup[I830_TEXREG_TM0LI] = 0; /* not used */
-   t->Setup[I830_TEXREG_TM0S0] = 0;
-   t->Setup[I830_TEXREG_TM0S1] = 0;
-   t->Setup[I830_TEXREG_TM0S2] = 0;
-   t->Setup[I830_TEXREG_TM0S3] = 0;
-   t->Setup[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
-				MAP_UNIT(0) |
-				ENABLE_TEXCOORD_PARAMS |
-				TEXCOORDS_ARE_NORMAL |
-				TEXCOORDTYPE_CARTESIAN |
-				ENABLE_ADDR_V_CNTL |
-				TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP) |
-				ENABLE_ADDR_U_CNTL |
-				TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP));
-
-   
-   i830SetTexWrapping( t, texObj->WrapS, texObj->WrapT );
-   i830SetTexFilter( t, texObj->MinFilter, texObj->MagFilter, 
-		     texObj->MaxAnisotropy );
-   i830SetTexBorderColor( t, texObj->_BorderChan );
-
-   return &t->intel;
-}
-
-
-static void i830TexParameter( GLcontext *ctx, GLenum target,
-			      struct gl_texture_object *tObj,
-			      GLenum pname, const GLfloat *params )
-{
-   i830TextureObjectPtr t = (i830TextureObjectPtr) tObj->DriverData;
-   if (!t)
-      return;
 
    switch (pname) {
-   case GL_TEXTURE_MIN_FILTER:
-   case GL_TEXTURE_MAG_FILTER:
-   case GL_TEXTURE_MAX_ANISOTROPY_EXT:
-      i830SetTexFilter( t, tObj->MinFilter, tObj->MagFilter,
-			tObj->MaxAnisotropy);
-      break;
-
-   case GL_TEXTURE_WRAP_S:
-   case GL_TEXTURE_WRAP_T:
-      i830SetTexWrapping( t, tObj->WrapS, tObj->WrapT );
-      break;
-  
-   case GL_TEXTURE_BORDER_COLOR:
-      i830SetTexBorderColor( t, tObj->_BorderChan );
-      break;
-
-   case GL_TEXTURE_BASE_LEVEL:
-   case GL_TEXTURE_MAX_LEVEL:
-   case GL_TEXTURE_MIN_LOD:
-   case GL_TEXTURE_MAX_LOD:
-      /* The i830 and its successors can do a lot of this without
-       * reloading the textures.  A project for someone?
-       */
-      intelFlush( ctx );
-      driSwapOutTextureObject( (driTextureObject *) t );
-      break;
-
-   default:
-      return;
-   }
-
-   t->intel.dirty = I830_UPLOAD_TEX_ALL;
-}
-
-
-static void i830TexEnv( GLcontext *ctx, GLenum target, 
-			GLenum pname, const GLfloat *param )
-{
-   i830ContextPtr i830 = I830_CONTEXT( ctx );
-   GLuint unit = ctx->Texture.CurrentUnit;
-
-   switch (pname) {
-   case GL_TEXTURE_ENV_COLOR: 
-#if 0
-   {
-      GLubyte r, g, b, a;
-      GLuint col;
-      
-      UNCLAMPED_FLOAT_TO_UBYTE(r, param[RCOMP]);
-      UNCLAMPED_FLOAT_TO_UBYTE(g, param[GCOMP]);
-      UNCLAMPED_FLOAT_TO_UBYTE(b, param[BCOMP]);
-      UNCLAMPED_FLOAT_TO_UBYTE(a, param[ACOMP]);
-
-      col = ((a << 24) | (r << 16) | (g << 8) | b);
-
-      if (col != i830->state.TexEnv[unit][I830_TEXENVREG_COL1]) {
-	 I830_STATECHANGE(i830, I830_UPLOAD_TEXENV);
-	 i830->state.TexEnv[unit][I830_TEXENVREG_COL1] = col;
-      }
-
-      break;
-   }
-#endif
+   case GL_TEXTURE_ENV_COLOR:
    case GL_TEXTURE_ENV_MODE:
    case GL_COMBINE_RGB:
    case GL_COMBINE_ALPHA:
@@ -319,38 +69,32 @@ static void i830TexEnv( GLcontext *ctx, GLenum target,
    case GL_ALPHA_SCALE:
       break;
 
-   case GL_TEXTURE_LOD_BIAS: {
-      int b = (int) ((*param) * 16.0);
-      if (b > 63) b = 63;
-      if (b < -64) b = -64;
-      I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
-      i830->state.Tex[unit][I830_TEXREG_TM0S3] &= ~TM0S3_LOD_BIAS_MASK;
-      i830->state.Tex[unit][I830_TEXREG_TM0S3] |= 
-	 ((b << TM0S3_LOD_BIAS_SHIFT) & TM0S3_LOD_BIAS_MASK);
-      break;
-   }
+   case GL_TEXTURE_LOD_BIAS:{
+         struct i830_context *i830 = i830_context(ctx);
+         GLuint unit = ctx->Texture.CurrentUnit;
+         int b = (int) ((*param) * 16.0);
+         if (b > 63)
+            b = 63;
+         if (b < -64)
+            b = -64;
+         I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
+         i830->lodbias_tm0s3[unit] =
+            ((b << TM0S3_LOD_BIAS_SHIFT) & TM0S3_LOD_BIAS_MASK);
+         break;
+      }
 
    default:
       break;
    }
 }
 
-static void i830BindTexture( GLcontext *ctx, GLenum target,
-			    struct gl_texture_object *texObj )
-{
-   i830TextureObjectPtr tex;
-   
-   if (!texObj->DriverData)
-      i830AllocTexObj( texObj );
-   
-   tex = (i830TextureObjectPtr)texObj->DriverData;
-}
 
 
 
-void i830InitTextureFuncs( struct dd_function_table *functions )
+void
+i830InitTextureFuncs(struct dd_function_table *functions)
 {
-   functions->BindTexture 		= i830BindTexture;
-   functions->TexEnv                    = i830TexEnv;
-   functions->TexParameter              = i830TexParameter;
+/*
+   functions->TexEnv = i830TexEnv;
+*/
 }
diff --git a/src/mesa/drivers/dri/i915/i830_texblend.c b/src/mesa/drivers/dri/i915/i830_texblend.c
index 49e0347643c..09f7f37e765 100644
--- a/src/mesa/drivers/dri/i915/i830_texblend.c
+++ b/src/mesa/drivers/dri/i915/i830_texblend.c
@@ -25,18 +25,16 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texformat.h"
-#include "texstore.h"
-
-#include "mm.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/mm.h"
 
 #include "intel_screen.h"
-#include "intel_ioctl.h"
 #include "intel_tex.h"
 
 #include "i830_context.h"
@@ -46,46 +44,42 @@
 /* ================================================================
  * Texture combine functions
  */
-static GLuint pass_through( GLuint *state, GLuint blendUnit )
+static GLuint
+pass_through(GLuint * state, GLuint blendUnit)
 {
    state[0] = (_3DSTATE_MAP_BLEND_OP_CMD(blendUnit) |
-	       TEXPIPE_COLOR |
-	       ENABLE_TEXOUTPUT_WRT_SEL |
-	       TEXOP_OUTPUT_CURRENT |
-	       DISABLE_TEX_CNTRL_STAGE |
-	       TEXOP_SCALE_1X |
-	       TEXOP_MODIFY_PARMS |
-	       TEXBLENDOP_ARG1);
+               TEXPIPE_COLOR |
+               ENABLE_TEXOUTPUT_WRT_SEL |
+               TEXOP_OUTPUT_CURRENT |
+               DISABLE_TEX_CNTRL_STAGE |
+               TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
    state[1] = (_3DSTATE_MAP_BLEND_OP_CMD(blendUnit) |
-	       TEXPIPE_ALPHA |
-	       ENABLE_TEXOUTPUT_WRT_SEL |
-	       TEXOP_OUTPUT_CURRENT |
-	       TEXOP_SCALE_1X |
-	       TEXOP_MODIFY_PARMS |
-	       TEXBLENDOP_ARG1);
+               TEXPIPE_ALPHA |
+               ENABLE_TEXOUTPUT_WRT_SEL |
+               TEXOP_OUTPUT_CURRENT |
+               TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
    state[2] = (_3DSTATE_MAP_BLEND_ARG_CMD(blendUnit) |
-	       TEXPIPE_COLOR |
-	       TEXBLEND_ARG1 |
-	       TEXBLENDARG_MODIFY_PARMS |
-	       TEXBLENDARG_CURRENT);
+               TEXPIPE_COLOR |
+               TEXBLEND_ARG1 |
+               TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_CURRENT);
    state[3] = (_3DSTATE_MAP_BLEND_ARG_CMD(blendUnit) |
-	       TEXPIPE_ALPHA |
-	       TEXBLEND_ARG1 |
-	       TEXBLENDARG_MODIFY_PARMS |
-	       TEXBLENDARG_CURRENT);
+               TEXPIPE_ALPHA |
+               TEXBLEND_ARG1 |
+               TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_CURRENT);
 
    return 4;
 }
 
-static GLuint emit_factor( GLuint blendUnit, GLuint *state, GLuint count, 
-			   const GLfloat *factor )
+static GLuint
+emit_factor(GLuint blendUnit, GLuint * state, GLuint count,
+            const GLfloat * factor)
 {
    GLubyte r, g, b, a;
    GLuint col;
-      
+
    if (0)
       fprintf(stderr, "emit constant %d: %.2f %.2f %.2f %.2f\n",
-	  blendUnit, factor[0], factor[1], factor[2], factor[3]);
+              blendUnit, factor[0], factor[1], factor[2], factor[3]);
 
    UNCLAMPED_FLOAT_TO_UBYTE(r, factor[0]);
    UNCLAMPED_FLOAT_TO_UBYTE(g, factor[1]);
@@ -94,21 +88,27 @@ static GLuint emit_factor( GLuint blendUnit, GLuint *state, GLuint count,
 
    col = ((a << 24) | (r << 16) | (g << 8) | b);
 
-   state[count++] = _3DSTATE_COLOR_FACTOR_N_CMD(blendUnit); 
+   state[count++] = _3DSTATE_COLOR_FACTOR_N_CMD(blendUnit);
    state[count++] = col;
 
    return count;
 }
 
 
-static __inline__ GLuint GetTexelOp(GLint unit)
+static INLINE GLuint
+GetTexelOp(GLint unit)
 {
-   switch(unit) {
-   case 0: return TEXBLENDARG_TEXEL0;
-   case 1: return TEXBLENDARG_TEXEL1;
-   case 2: return TEXBLENDARG_TEXEL2;
-   case 3: return TEXBLENDARG_TEXEL3;
-   default: return TEXBLENDARG_TEXEL0;
+   switch (unit) {
+   case 0:
+      return TEXBLENDARG_TEXEL0;
+   case 1:
+      return TEXBLENDARG_TEXEL1;
+   case 2:
+      return TEXBLENDARG_TEXEL2;
+   case 3:
+      return TEXBLENDARG_TEXEL3;
+   default:
+      return TEXBLENDARG_TEXEL0;
    }
 }
 
@@ -132,12 +132,10 @@ static __inline__ GLuint GetTexelOp(GLint unit)
  * partial support for the extension?
  */
 GLuint
-i830SetTexEnvCombine(i830ContextPtr i830,
-		     const struct gl_tex_env_combine_state * combine,
-		     GLint blendUnit,
-		     GLuint texel_op,
-		     GLuint *state,
-		     const GLfloat *factor )
+i830SetTexEnvCombine(struct i830_context * i830,
+                     const struct gl_tex_env_combine_state * combine,
+                     GLint blendUnit,
+                     GLuint texel_op, GLuint * state, const GLfloat * factor)
 {
    const GLuint numColorArgs = combine->_NumArgsRGB;
    const GLuint numAlphaArgs = combine->_NumArgsA;
@@ -162,7 +160,7 @@ i830SetTexEnvCombine(i830ContextPtr i830,
       TEXPIPE_ALPHA | TEXBLEND_ARG0 | TEXBLENDARG_MODIFY_PARMS,
    };
 
-   if(INTEL_DEBUG&DEBUG_TEXTURE)
+   if (INTEL_DEBUG & DEBUG_TEXTURE)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
 
@@ -188,23 +186,23 @@ i830SetTexEnvCombine(i830ContextPtr i830,
    }
 
 
-   switch(combine->ModeRGB) {
-   case GL_REPLACE: 
+   switch (combine->ModeRGB) {
+   case GL_REPLACE:
       blendop = TEXBLENDOP_ARG1;
       break;
-   case GL_MODULATE: 
+   case GL_MODULATE:
       blendop = TEXBLENDOP_MODULATE;
       break;
-   case GL_ADD: 
+   case GL_ADD:
       blendop = TEXBLENDOP_ADD;
       break;
    case GL_ADD_SIGNED:
-      blendop = TEXBLENDOP_ADDSIGNED; 
+      blendop = TEXBLENDOP_ADDSIGNED;
       break;
    case GL_INTERPOLATE:
-      blendop = TEXBLENDOP_BLEND; 
+      blendop = TEXBLENDOP_BLEND;
       break;
-   case GL_SUBTRACT: 
+   case GL_SUBTRACT:
       blendop = TEXBLENDOP_SUBTRACT;
       break;
    case GL_DOT3_RGB_EXT:
@@ -215,55 +213,54 @@ i830SetTexEnvCombine(i830ContextPtr i830,
    case GL_DOT3_RGBA:
       blendop = TEXBLENDOP_DOT3;
       break;
-   default: 
-      return pass_through( state, blendUnit );
+   default:
+      return pass_through(state, blendUnit);
    }
 
    blendop |= (rgb_shift << TEXOP_SCALE_SHIFT);
 
 
    /* Handle RGB args */
-   for(i = 0; i < 3; i++) {
-      switch(combine->SourceRGB[i]) {
-      case GL_TEXTURE: 
-	 args_RGB[i] = texel_op;
-	 break;
+   for (i = 0; i < 3; i++) {
+      switch (combine->SourceRGB[i]) {
+      case GL_TEXTURE:
+         args_RGB[i] = texel_op;
+         break;
       case GL_TEXTURE0:
       case GL_TEXTURE1:
       case GL_TEXTURE2:
       case GL_TEXTURE3:
-	 args_RGB[i] = GetTexelOp( combine->SourceRGB[i] - GL_TEXTURE0 );
-	 break;
+         args_RGB[i] = GetTexelOp(combine->SourceRGB[i] - GL_TEXTURE0);
+         break;
       case GL_CONSTANT:
-	 args_RGB[i] = TEXBLENDARG_FACTOR_N; 
-	 need_factor = 1;
-	 break;
+         args_RGB[i] = TEXBLENDARG_FACTOR_N;
+         need_factor = 1;
+         break;
       case GL_PRIMARY_COLOR:
-	 args_RGB[i] = TEXBLENDARG_DIFFUSE;
-	 break;
+         args_RGB[i] = TEXBLENDARG_DIFFUSE;
+         break;
       case GL_PREVIOUS:
-	 args_RGB[i] = TEXBLENDARG_CURRENT; 
-	 break;
-      default: 
-	 return pass_through( state, blendUnit );
+         args_RGB[i] = TEXBLENDARG_CURRENT;
+         break;
+      default:
+         return pass_through(state, blendUnit);
       }
 
-      switch(combine->OperandRGB[i]) {
-      case GL_SRC_COLOR: 
-	 args_RGB[i] |= 0;
-	 break;
-      case GL_ONE_MINUS_SRC_COLOR: 
-	 args_RGB[i] |= TEXBLENDARG_INV_ARG;
-	 break;
-      case GL_SRC_ALPHA: 
-	 args_RGB[i] |= TEXBLENDARG_REPLICATE_ALPHA;
-	 break;
-      case GL_ONE_MINUS_SRC_ALPHA: 
-	 args_RGB[i] |= (TEXBLENDARG_REPLICATE_ALPHA | 
-			 TEXBLENDARG_INV_ARG);
-	 break;
-      default: 
-	 return pass_through( state, blendUnit );
+      switch (combine->OperandRGB[i]) {
+      case GL_SRC_COLOR:
+         args_RGB[i] |= 0;
+         break;
+      case GL_ONE_MINUS_SRC_COLOR:
+         args_RGB[i] |= TEXBLENDARG_INV_ARG;
+         break;
+      case GL_SRC_ALPHA:
+         args_RGB[i] |= TEXBLENDARG_REPLICATE_ALPHA;
+         break;
+      case GL_ONE_MINUS_SRC_ALPHA:
+         args_RGB[i] |= (TEXBLENDARG_REPLICATE_ALPHA | TEXBLENDARG_INV_ARG);
+         break;
+      default:
+         return pass_through(state, blendUnit);
       }
    }
 
@@ -275,76 +272,76 @@ i830SetTexEnvCombine(i830ContextPtr i830,
     * Note - the global factor is set up with alpha == .5, so 
     * the alpha part of the DOT4 calculation should be zero.
     */
-   if ( combine->ModeRGB == GL_DOT3_RGBA_EXT || 
-	combine->ModeRGB == GL_DOT3_RGBA ) {
+   if (combine->ModeRGB == GL_DOT3_RGBA_EXT ||
+       combine->ModeRGB == GL_DOT3_RGBA) {
       ablendop = TEXBLENDOP_DOT4;
-      args_A[0] = TEXBLENDARG_FACTOR; /* the global factor */
+      args_A[0] = TEXBLENDARG_FACTOR;   /* the global factor */
       args_A[1] = TEXBLENDARG_FACTOR;
       args_A[2] = TEXBLENDARG_FACTOR;
    }
    else {
-      switch(combine->ModeA) {
-      case GL_REPLACE: 
-	 ablendop = TEXBLENDOP_ARG1;
-	 break;
-      case GL_MODULATE: 
-	 ablendop = TEXBLENDOP_MODULATE;
-	 break;
-      case GL_ADD: 
-	 ablendop = TEXBLENDOP_ADD;
-	 break;
+      switch (combine->ModeA) {
+      case GL_REPLACE:
+         ablendop = TEXBLENDOP_ARG1;
+         break;
+      case GL_MODULATE:
+         ablendop = TEXBLENDOP_MODULATE;
+         break;
+      case GL_ADD:
+         ablendop = TEXBLENDOP_ADD;
+         break;
       case GL_ADD_SIGNED:
-	 ablendop = TEXBLENDOP_ADDSIGNED; 
-	 break;
+         ablendop = TEXBLENDOP_ADDSIGNED;
+         break;
       case GL_INTERPOLATE:
-	 ablendop = TEXBLENDOP_BLEND; 
-	 break;
-      case GL_SUBTRACT: 
-	 ablendop = TEXBLENDOP_SUBTRACT;
-	 break;
+         ablendop = TEXBLENDOP_BLEND;
+         break;
+      case GL_SUBTRACT:
+         ablendop = TEXBLENDOP_SUBTRACT;
+         break;
       default:
-	 return pass_through( state, blendUnit );
+         return pass_through(state, blendUnit);
       }
 
 
       ablendop |= (alpha_shift << TEXOP_SCALE_SHIFT);
 
       /* Handle A args */
-      for(i = 0; i < 3; i++) {
-	 switch(combine->SourceA[i]) {
-	 case GL_TEXTURE: 
-	    args_A[i] = texel_op;
-	    break;
-	 case GL_TEXTURE0:
-	 case GL_TEXTURE1:
-	 case GL_TEXTURE2:
-	 case GL_TEXTURE3:
-	    args_A[i] = GetTexelOp( combine->SourceA[i] - GL_TEXTURE0 );
-	    break;
-	 case GL_CONSTANT:
-	    args_A[i] = TEXBLENDARG_FACTOR_N; 
-	    need_factor = 1;
-	    break;
-	 case GL_PRIMARY_COLOR:
-	    args_A[i] = TEXBLENDARG_DIFFUSE; 
-	    break;
-	 case GL_PREVIOUS:
-	    args_A[i] = TEXBLENDARG_CURRENT; 
-	    break;
-	 default: 
-	    return pass_through( state, blendUnit );
-	 }
-
-	 switch(combine->OperandA[i]) {
-	 case GL_SRC_ALPHA: 
-	    args_A[i] |= 0;
-	    break;
-	 case GL_ONE_MINUS_SRC_ALPHA: 
-	    args_A[i] |= TEXBLENDARG_INV_ARG;
-	    break;
-	 default: 
-	    return pass_through( state, blendUnit );
-	 }
+      for (i = 0; i < 3; i++) {
+         switch (combine->SourceA[i]) {
+         case GL_TEXTURE:
+            args_A[i] = texel_op;
+            break;
+         case GL_TEXTURE0:
+         case GL_TEXTURE1:
+         case GL_TEXTURE2:
+         case GL_TEXTURE3:
+            args_A[i] = GetTexelOp(combine->SourceA[i] - GL_TEXTURE0);
+            break;
+         case GL_CONSTANT:
+            args_A[i] = TEXBLENDARG_FACTOR_N;
+            need_factor = 1;
+            break;
+         case GL_PRIMARY_COLOR:
+            args_A[i] = TEXBLENDARG_DIFFUSE;
+            break;
+         case GL_PREVIOUS:
+            args_A[i] = TEXBLENDARG_CURRENT;
+            break;
+         default:
+            return pass_through(state, blendUnit);
+         }
+
+         switch (combine->OperandA[i]) {
+         case GL_SRC_ALPHA:
+            args_A[i] |= 0;
+            break;
+         case GL_ONE_MINUS_SRC_ALPHA:
+            args_A[i] |= TEXBLENDARG_INV_ARG;
+            break;
+         default:
+            return pass_through(state, blendUnit);
+         }
       }
    }
 
@@ -363,86 +360,86 @@ i830SetTexEnvCombine(i830ContextPtr i830,
 
    used = 0;
    state[used++] = (_3DSTATE_MAP_BLEND_OP_CMD(blendUnit) |
-		    TEXPIPE_COLOR |
-		    ENABLE_TEXOUTPUT_WRT_SEL |
-		    TEXOP_OUTPUT_CURRENT |
-		    DISABLE_TEX_CNTRL_STAGE |
-		    TEXOP_MODIFY_PARMS |
-		    blendop);
+                    TEXPIPE_COLOR |
+                    ENABLE_TEXOUTPUT_WRT_SEL |
+                    TEXOP_OUTPUT_CURRENT |
+                    DISABLE_TEX_CNTRL_STAGE | TEXOP_MODIFY_PARMS | blendop);
    state[used++] = (_3DSTATE_MAP_BLEND_OP_CMD(blendUnit) |
-		    TEXPIPE_ALPHA |
-		    ENABLE_TEXOUTPUT_WRT_SEL |
-		    TEXOP_OUTPUT_CURRENT |
-		    TEXOP_MODIFY_PARMS |
-		    ablendop);
+                    TEXPIPE_ALPHA |
+                    ENABLE_TEXOUTPUT_WRT_SEL |
+                    TEXOP_OUTPUT_CURRENT | TEXOP_MODIFY_PARMS | ablendop);
 
-   for ( i = 0 ; i < numColorArgs ; i++ ) {
+   for (i = 0; i < numColorArgs; i++) {
       state[used++] = (_3DSTATE_MAP_BLEND_ARG_CMD(blendUnit) |
-		       tex_blend_rgb[i] | args_RGB[i]);
+                       tex_blend_rgb[i] | args_RGB[i]);
    }
 
-   for ( i = 0 ; i < numAlphaArgs ; i++ ) {
+   for (i = 0; i < numAlphaArgs; i++) {
       state[used++] = (_3DSTATE_MAP_BLEND_ARG_CMD(blendUnit) |
-		       tex_blend_a[i] | args_A[i]);
+                       tex_blend_a[i] | args_A[i]);
    }
 
 
-   if (need_factor) 
-      return emit_factor( blendUnit, state, used, factor );
-   else 
+   if (need_factor)
+      return emit_factor(blendUnit, state, used, factor);
+   else
       return used;
 }
 
 
-static void emit_texblend( i830ContextPtr i830, GLuint unit, GLuint blendUnit,
-			   GLboolean last_stage )
+static void
+emit_texblend(struct i830_context *i830, GLuint unit, GLuint blendUnit,
+              GLboolean last_stage)
 {
    struct gl_texture_unit *texUnit = &i830->intel.ctx.Texture.Unit[unit];
    GLuint tmp[I830_TEXBLEND_SIZE], tmp_sz;
 
 
-   if (0) fprintf(stderr, "%s unit %d\n", __FUNCTION__, unit);
+   if (0)
+      fprintf(stderr, "%s unit %d\n", __FUNCTION__, unit);
 
    /* Update i830->state.TexBlend
-    */ 
-   tmp_sz = i830SetTexEnvCombine(i830, texUnit->_CurrentCombine, blendUnit, 
-				 GetTexelOp(unit), tmp,
-				 texUnit->EnvColor );
+    */
+   tmp_sz = i830SetTexEnvCombine(i830, texUnit->_CurrentCombine, blendUnit,
+                                 GetTexelOp(unit), tmp, texUnit->EnvColor);
 
-   if (last_stage) 
+   if (last_stage)
       tmp[0] |= TEXOP_LAST_STAGE;
 
    if (tmp_sz != i830->state.TexBlendWordsUsed[blendUnit] ||
-       memcmp( tmp, i830->state.TexBlend[blendUnit], tmp_sz * sizeof(GLuint))) {
-      
-      I830_STATECHANGE( i830, I830_UPLOAD_TEXBLEND(blendUnit) );
-      memcpy( i830->state.TexBlend[blendUnit], tmp, tmp_sz * sizeof(GLuint));
+       memcmp(tmp, i830->state.TexBlend[blendUnit],
+              tmp_sz * sizeof(GLuint))) {
+
+      I830_STATECHANGE(i830, I830_UPLOAD_TEXBLEND(blendUnit));
+      memcpy(i830->state.TexBlend[blendUnit], tmp, tmp_sz * sizeof(GLuint));
       i830->state.TexBlendWordsUsed[blendUnit] = tmp_sz;
    }
 
    I830_ACTIVESTATE(i830, I830_UPLOAD_TEXBLEND(blendUnit), GL_TRUE);
 }
 
-static void emit_passthrough( i830ContextPtr i830 )
+static void
+emit_passthrough(struct i830_context *i830)
 {
    GLuint tmp[I830_TEXBLEND_SIZE], tmp_sz;
    GLuint unit = 0;
 
-   tmp_sz = pass_through( tmp, unit );
+   tmp_sz = pass_through(tmp, unit);
    tmp[0] |= TEXOP_LAST_STAGE;
 
    if (tmp_sz != i830->state.TexBlendWordsUsed[unit] ||
-       memcmp( tmp, i830->state.TexBlend[unit], tmp_sz * sizeof(GLuint))) {
-      
-      I830_STATECHANGE( i830, I830_UPLOAD_TEXBLEND(unit) );
-      memcpy( i830->state.TexBlend[unit], tmp, tmp_sz * sizeof(GLuint));
+       memcmp(tmp, i830->state.TexBlend[unit], tmp_sz * sizeof(GLuint))) {
+
+      I830_STATECHANGE(i830, I830_UPLOAD_TEXBLEND(unit));
+      memcpy(i830->state.TexBlend[unit], tmp, tmp_sz * sizeof(GLuint));
       i830->state.TexBlendWordsUsed[unit] = tmp_sz;
    }
 
    I830_ACTIVESTATE(i830, I830_UPLOAD_TEXBLEND(unit), GL_TRUE);
 }
 
-void i830EmitTextureBlend( i830ContextPtr i830 )
+void
+i830EmitTextureBlend(struct i830_context *i830)
 {
    GLcontext *ctx = &i830->intel.ctx;
    GLuint unit, last_stage = 0, blendunit = 0;
@@ -450,16 +447,15 @@ void i830EmitTextureBlend( i830ContextPtr i830 )
    I830_ACTIVESTATE(i830, I830_UPLOAD_TEXBLEND_ALL, GL_FALSE);
 
    if (ctx->Texture._EnabledUnits) {
-      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits ; unit++)
-	 if (ctx->Texture.Unit[unit]._ReallyEnabled) 
-	    last_stage = unit;
+      for (unit = 0; unit < ctx->Const.MaxTextureUnits; unit++)
+         if (ctx->Texture.Unit[unit]._ReallyEnabled)
+            last_stage = unit;
 
-      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits ; unit++)
-	 if (ctx->Texture.Unit[unit]._ReallyEnabled) 
-	    emit_texblend( i830, unit, blendunit++, last_stage == unit );
+      for (unit = 0; unit < ctx->Const.MaxTextureUnits; unit++)
+         if (ctx->Texture.Unit[unit]._ReallyEnabled)
+            emit_texblend(i830, unit, blendunit++, last_stage == unit);
    }
    else {
-      emit_passthrough( i830 );
+      emit_passthrough(i830);
    }
 }
-
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index ba972dac8f1..c718bb0055d 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -25,459 +25,326 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texformat.h"
-#include "texstore.h"
-
-#include "mm.h"
-
-#include "intel_screen.h"
-#include "intel_ioctl.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/texformat.h"
+
+#include "intel_mipmap_tree.h"
 #include "intel_tex.h"
 
 #include "i830_context.h"
 #include "i830_reg.h"
 
-static const GLint initial_offsets[6][2] = { {0,0},
-				       {0,2},
-				       {1,0},
-				       {1,2},
-				       {1,1},
-				       {1,3} };
-
-static const GLint step_offsets[6][2] = { {0,2},
-				    {0,2},
-				    {-1,2},
-				    {-1,2},
-				    {-1,1},
-				    {-1,1} };
 
-#define I830_TEX_UNIT_ENABLED(unit)		(1<<unit)
 
-static GLboolean i830SetTexImages( i830ContextPtr i830, 
-				  struct gl_texture_object *tObj )
+static GLuint
+translate_texture_format(GLuint mesa_format)
 {
-   GLuint total_height, pitch, i, textureFormat;
-   i830TextureObjectPtr t = (i830TextureObjectPtr) tObj->DriverData;
-   const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
-   GLint firstLevel, lastLevel, numLevels;
-
-   switch( baseImage->TexFormat->MesaFormat ) {
+   switch (mesa_format) {
    case MESA_FORMAT_L8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_L8;
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_L8;
    case MESA_FORMAT_I8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_I8;
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_I8;
    case MESA_FORMAT_A8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_I8; /* Kludge -- check with conform, glean */
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_I8; /* Kludge! */
    case MESA_FORMAT_AL88:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_AY88;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_AY88;
    case MESA_FORMAT_RGB565:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_RGB565;
    case MESA_FORMAT_ARGB1555:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB1555;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_ARGB1555;
    case MESA_FORMAT_ARGB4444:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB4444;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_ARGB4444;
    case MESA_FORMAT_ARGB8888:
-      t->intel.texelBytes = 4;
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-      break;
-
+      return MAPSURF_32BIT | MT_32BIT_ARGB8888;
    case MESA_FORMAT_YCBCR_REV:
-      t->intel.texelBytes = 2;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_NORMAL | 
-		       TM0S1_COLORSPACE_CONVERSION);
-      break;
-
+      return (MAPSURF_422 | MT_422_YCRCB_NORMAL);
    case MESA_FORMAT_YCBCR:
-      t->intel.texelBytes = 2;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_SWAPY | /* ??? */
-		       TM0S1_COLORSPACE_CONVERSION);
-      break;
-
+      return (MAPSURF_422 | MT_422_YCRCB_SWAPY);
    case MESA_FORMAT_RGB_FXT1:
    case MESA_FORMAT_RGBA_FXT1:
-     t->intel.texelBytes = 2;
-     textureFormat = MAPSURF_COMPRESSED | MT_COMPRESS_FXT1;
-     break;
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_FXT1);
    case MESA_FORMAT_RGBA_DXT1:
    case MESA_FORMAT_RGB_DXT1:
-     /* 
-      * DXTn pitches are Width/4 * blocksize in bytes 
-      * for DXT1: blocksize=8 so Width/4*8 = Width * 2 
-      * for DXT3/5: blocksize=16 so Width/4*16 = Width * 4
-      */
-     t->intel.texelBytes = 2;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT1);
-     break;
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT1);
    case MESA_FORMAT_RGBA_DXT3:
-     t->intel.texelBytes = 4;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT2_3);
-     break;
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT2_3);
    case MESA_FORMAT_RGBA_DXT5:
-     t->intel.texelBytes = 4;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
-     break;
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
    default:
-      fprintf(stderr, "%s: bad image format\n", __FUNCTION__);
+      fprintf(stderr, "%s: bad image format %x\n", __FUNCTION__, mesa_format);
       abort();
+      return 0;
    }
-
-   /* Compute which mipmap levels we really want to send to the hardware.
-    * This depends on the base image size, GL_TEXTURE_MIN_LOD,
-    * GL_TEXTURE_MAX_LOD, GL_TEXTURE_BASE_LEVEL, and GL_TEXTURE_MAX_LEVEL.
-    * Yes, this looks overly complicated, but it's all needed.
-    */
-   driCalculateTextureFirstLastLevel( (driTextureObject *) t );
+}
 
 
-   /* Figure out the amount of memory required to hold all the mipmap
-    * levels.  Choose the smallest pitch to accomodate the largest
-    * mipmap:
-    */
-   firstLevel = t->intel.base.firstLevel;
-   lastLevel = t->intel.base.lastLevel;
-   numLevels = lastLevel - firstLevel + 1;
 
 
-   /* All images must be loaded at this pitch.  Count the number of
-    * lines required:
-    */
-   switch (tObj->Target) {
-   case GL_TEXTURE_CUBE_MAP: {
-      const GLuint dim = tObj->Image[0][firstLevel]->Width;
-      GLuint face;
-
-      pitch = dim * t->intel.texelBytes;
-      pitch *= 2;		/* double pitch for cube layouts */
-      pitch = (pitch + 3) & ~3;
-      
-      total_height = dim * 4;
-
-      for ( face = 0 ; face < 6 ; face++) {
-	 GLuint x = initial_offsets[face][0] * dim;
-	 GLuint y = initial_offsets[face][1] * dim;
-	 GLuint d = dim;
-	 
-	 t->intel.base.dirty_images[face] = ~0;
-
-	 assert(tObj->Image[face][firstLevel]->Width == dim);
-	 assert(tObj->Image[face][firstLevel]->Height == dim);
-
-	 for (i = 0; i < numLevels; i++) {
-	    t->intel.image[face][i].image = tObj->Image[face][firstLevel + i];
-	    if (!t->intel.image[face][i].image) {
-	       fprintf(stderr, "no image %d %d\n", face, i);
-	       break;		/* can't happen */
-	    }
-	 
-	    t->intel.image[face][i].offset = 
-	       y * pitch + x * t->intel.texelBytes;
-	    t->intel.image[face][i].internalFormat = baseImage->_BaseFormat;
-
-	    d >>= 1;
-	    x += step_offsets[face][0] * d;
-	    y += step_offsets[face][1] * d;
-	 }
-      }
-      break;
-   }
+/* The i915 (and related graphics cores) do not support GL_CLAMP.  The
+ * Intel drivers for "other operating systems" implement GL_CLAMP as
+ * GL_CLAMP_TO_EDGE, so the same is done here.
+ */
+static GLuint
+translate_wrap_mode(GLenum wrap)
+{
+   switch (wrap) {
+   case GL_REPEAT:
+      return TEXCOORDMODE_WRAP;
+   case GL_CLAMP:
+   case GL_CLAMP_TO_EDGE:
+      return TEXCOORDMODE_CLAMP;        /* not really correct */
+   case GL_CLAMP_TO_BORDER:
+      return TEXCOORDMODE_CLAMP_BORDER;
+   case GL_MIRRORED_REPEAT:
+      return TEXCOORDMODE_MIRROR;
    default:
-      pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
-      pitch = (pitch + 3) & ~3;
-      t->intel.base.dirty_images[0] = ~0;
-
-      for ( total_height = i = 0 ; i < numLevels ; i++ ) {
-	 t->intel.image[0][i].image = tObj->Image[0][firstLevel + i];
-	 if (!t->intel.image[0][i].image) 
-	    break;
-	 
-	 t->intel.image[0][i].offset = total_height * pitch;
-	 t->intel.image[0][i].internalFormat = baseImage->_BaseFormat;
-	 if (t->intel.image[0][i].image->IsCompressed)
-	 {
-	   if (t->intel.image[0][i].image->Height > 4)
-	     total_height += t->intel.image[0][i].image->Height/4;
-	   else
-	     total_height += 1;
-	 }
-	 else
-	   total_height += MAX2(2, t->intel.image[0][i].image->Height);
-      }
-      break;
+      return TEXCOORDMODE_WRAP;
    }
-
-   t->intel.Pitch = pitch;
-   t->intel.base.totalSize = total_height*pitch;
-   t->intel.max_level = i-1;
-   t->Setup[I830_TEXREG_TM0S1] = 
-      (((tObj->Image[0][firstLevel]->Height - 1) << TM0S1_HEIGHT_SHIFT) |
-       ((tObj->Image[0][firstLevel]->Width - 1) << TM0S1_WIDTH_SHIFT) |
-       textureFormat);
-   t->Setup[I830_TEXREG_TM0S2] = 
-      (((pitch / 4) - 1) << TM0S2_PITCH_SHIFT) |
-      TM0S2_CUBE_FACE_ENA_MASK;
-   t->Setup[I830_TEXREG_TM0S3] &= ~TM0S3_MAX_MIP_MASK;
-   t->Setup[I830_TEXREG_TM0S3] &= ~TM0S3_MIN_MIP_MASK;
-   t->Setup[I830_TEXREG_TM0S3] |= ((numLevels - 1)*4) << TM0S3_MIN_MIP_SHIFT;
-   t->intel.dirty = I830_UPLOAD_TEX_ALL;
-
-   return intelUploadTexImages( &i830->intel, &t->intel, 0 );
 }
 
 
-static void i830_import_tex_unit( i830ContextPtr i830, 
-			   i830TextureObjectPtr t,
-			   GLuint unit )
+/* Recalculate all state from scratch.  Perhaps not the most
+ * efficient, but this has gotten complex enough that we need
+ * something which is understandable and reliable.
+ */
+static GLboolean
+i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 {
-   if(INTEL_DEBUG&DEBUG_TEXTURE)
-      fprintf(stderr, "%s unit(%d)\n", __FUNCTION__, unit);
-   
-   if (i830->intel.CurrentTexObj[unit]) 
-      i830->intel.CurrentTexObj[unit]->base.bound &= ~(1U << unit);
-
-   i830->intel.CurrentTexObj[unit] = (intelTextureObjectPtr)t;
-   t->intel.base.bound |= (1 << unit);
-
-   I830_STATECHANGE( i830, I830_UPLOAD_TEX(unit) );
-
-   i830->state.Tex[unit][I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 | 
-					       (LOAD_TEXTURE_MAP0 << unit) | 4);
-   i830->state.Tex[unit][I830_TEXREG_TM0S0] = (TM0S0_USE_FENCE |
-					       t->intel.TextureOffset);
-
-   i830->state.Tex[unit][I830_TEXREG_TM0S1] = t->Setup[I830_TEXREG_TM0S1];
-   i830->state.Tex[unit][I830_TEXREG_TM0S2] = t->Setup[I830_TEXREG_TM0S2];
-
-   i830->state.Tex[unit][I830_TEXREG_TM0S3] &= TM0S3_LOD_BIAS_MASK;
-   i830->state.Tex[unit][I830_TEXREG_TM0S3] |= (t->Setup[I830_TEXREG_TM0S3] &
-						~TM0S3_LOD_BIAS_MASK);
-
-   i830->state.Tex[unit][I830_TEXREG_TM0S4] = t->Setup[I830_TEXREG_TM0S4];
-   i830->state.Tex[unit][I830_TEXREG_MCS] = (t->Setup[I830_TEXREG_MCS] & 
-					     ~MAP_UNIT_MASK);   
-   i830->state.Tex[unit][I830_TEXREG_CUBE] = t->Setup[I830_TEXREG_CUBE];
-   i830->state.Tex[unit][I830_TEXREG_MCS] |= MAP_UNIT(unit);
-
-   t->intel.dirty &= ~I830_UPLOAD_TEX(unit);
-}
-
+   GLcontext *ctx = &intel->ctx;
+   struct i830_context *i830 = i830_context(ctx);
+   struct gl_texture_unit *tUnit = &ctx->Texture.Unit[unit];
+   struct gl_texture_object *tObj = tUnit->_Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   struct gl_texture_image *firstImage;
+   GLuint *state = i830->state.Tex[unit], format, pitch;
+   GLint lodbias;
 
+   memset(state, 0, sizeof(state));
 
-static GLboolean enable_tex_common( GLcontext *ctx, GLuint unit )
-{
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i830TextureObjectPtr t = (i830TextureObjectPtr)tObj->DriverData;
+   /*We need to refcount these. */
 
-   if (0) fprintf(stderr, "%s\n", __FUNCTION__);
+   if (i830->state.tex_buffer[unit] != NULL) {
+       dri_bo_unreference(i830->state.tex_buffer[unit]);
+       i830->state.tex_buffer[unit] = NULL;
+   }
 
-   /* Fallback if there's a texture border */
-   if ( tObj->Image[0][tObj->BaseLevel]->Border > 0 ) {
-      fprintf(stderr, "Texture border\n");
+   if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit))
       return GL_FALSE;
-   }
 
-   /* Upload teximages (not pipelined)
+   /* Get first image here, since intelObj->firstLevel will get set in
+    * the intel_finalize_mipmap_tree() call above.
     */
-   if (t->intel.base.dirty_images[0]) {
-      if (!i830SetTexImages( i830, tObj )) {
-	 return GL_FALSE;
+   firstImage = tObj->Image[0][intelObj->firstLevel];
+
+   if (intelObj->imageOverride) {
+      i830->state.tex_buffer[unit] = NULL;
+      i830->state.tex_offset[unit] = intelObj->textureOffset;
+
+      switch (intelObj->depthOverride) {
+      case 32:
+	 format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
+	 break;
+      case 24:
+      default:
+	 format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
+	 break;
+      case 16:
+	 format = MAPSURF_16BIT | MT_16BIT_RGB565;
+	 break;
       }
-   }
-
-   /* Update state if this is a different texture object to last
-    * time.
-    */
-   if (i830->intel.CurrentTexObj[unit] != &t->intel || 
-       (t->intel.dirty & I830_UPLOAD_TEX(unit))) {
-      i830_import_tex_unit( i830, t, unit);
-   }
-
-   I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);
-
-   return GL_TRUE;
-}
-
-static GLboolean enable_tex_rect( GLcontext *ctx, GLuint unit )
-{
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   GLuint mcs = i830->state.Tex[unit][I830_TEXREG_MCS];
 
-   mcs &= ~TEXCOORDS_ARE_NORMAL;
-   mcs |= TEXCOORDS_ARE_IN_TEXELUNITS;
+      pitch = intelObj->pitchOverride;
+   } else {
+      dri_bo_reference(intelObj->mt->region->buffer);
+      i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+      i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt,
+								0, intelObj->
+								firstLevel);
 
-   if ((mcs != i830->state.Tex[unit][I830_TEXREG_MCS])
-       || (0 != i830->state.Tex[unit][I830_TEXREG_CUBE])) {
-      I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
-      i830->state.Tex[unit][I830_TEXREG_MCS] = mcs;
-      i830->state.Tex[unit][I830_TEXREG_CUBE] = 0;
+      format = translate_texture_format(firstImage->TexFormat->MesaFormat);
+      pitch = intelObj->mt->pitch * intelObj->mt->cpp;
    }
 
-   return GL_TRUE;
-}
+   state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
+                               (LOAD_TEXTURE_MAP0 << unit) | 4);
 
+/*    state[I830_TEXREG_TM0S0] = (TM0S0_USE_FENCE | */
+/* 			       t->intel.TextureOffset); */
 
-static GLboolean enable_tex_2d( GLcontext *ctx, GLuint unit )
-{
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   GLuint mcs = i830->state.Tex[unit][I830_TEXREG_MCS];
 
-   mcs &= ~TEXCOORDS_ARE_IN_TEXELUNITS;
-   mcs |= TEXCOORDS_ARE_NORMAL;
+   state[I830_TEXREG_TM0S1] =
+      (((firstImage->Height - 1) << TM0S1_HEIGHT_SHIFT) |
+       ((firstImage->Width - 1) << TM0S1_WIDTH_SHIFT) | format);
+
+   state[I830_TEXREG_TM0S2] =
+      ((((pitch / 4) - 1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK);
 
-   if ((mcs != i830->state.Tex[unit][I830_TEXREG_MCS])
-       || (0 != i830->state.Tex[unit][I830_TEXREG_CUBE])) {
-      I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
-      i830->state.Tex[unit][I830_TEXREG_MCS] = mcs;
-      i830->state.Tex[unit][I830_TEXREG_CUBE] = 0;
+   {
+      if (tObj->Target == GL_TEXTURE_CUBE_MAP)
+         state[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(unit) |
+                                    CUBE_NEGX_ENABLE |
+                                    CUBE_POSX_ENABLE |
+                                    CUBE_NEGY_ENABLE |
+                                    CUBE_POSY_ENABLE |
+                                    CUBE_NEGZ_ENABLE | CUBE_POSZ_ENABLE);
+      else
+         state[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(unit));
    }
 
-   return GL_TRUE;
-}
 
- 
-static GLboolean enable_tex_cube( GLcontext *ctx, GLuint unit )
-{
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i830TextureObjectPtr t = (i830TextureObjectPtr)tObj->DriverData;
-   GLuint mcs = i830->state.Tex[unit][I830_TEXREG_MCS];
-   const GLuint cube = CUBE_NEGX_ENABLE | CUBE_POSX_ENABLE
-     | CUBE_NEGY_ENABLE | CUBE_POSY_ENABLE
-     | CUBE_NEGZ_ENABLE | CUBE_POSZ_ENABLE;
-   GLuint face;
-
-   mcs &= ~TEXCOORDS_ARE_IN_TEXELUNITS;
-   mcs |= TEXCOORDS_ARE_NORMAL;
-
-   if ((mcs != i830->state.Tex[unit][I830_TEXREG_MCS])
-       || (cube != i830->state.Tex[unit][I830_TEXREG_CUBE])) {
-      I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
-      i830->state.Tex[unit][I830_TEXREG_MCS] = mcs;
-      i830->state.Tex[unit][I830_TEXREG_CUBE] = cube;
-   }
 
-   /* Upload teximages (not pipelined)
-    */
-   if ( t->intel.base.dirty_images[0] || t->intel.base.dirty_images[1] ||
-        t->intel.base.dirty_images[2] || t->intel.base.dirty_images[3] ||
-        t->intel.base.dirty_images[4] || t->intel.base.dirty_images[5] ) {
-      i830SetTexImages( i830, tObj );
-   }
 
-   /* upload (per face) */
-   for (face = 0; face < 6; face++) {
-      if (t->intel.base.dirty_images[face]) {
-	 if (!intelUploadTexImages( &i830->intel, &t->intel, face )) {
-	    return GL_FALSE;
-	 }
+   {
+      GLuint minFilt, mipFilt, magFilt;
+
+      switch (tObj->MinFilter) {
+      case GL_NEAREST:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_NONE;
+         break;
+      case GL_LINEAR:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_NONE;
+         break;
+      case GL_NEAREST_MIPMAP_NEAREST:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_NEAREST;
+         break;
+      case GL_LINEAR_MIPMAP_NEAREST:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_NEAREST;
+         break;
+      case GL_NEAREST_MIPMAP_LINEAR:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_LINEAR;
+         break;
+      case GL_LINEAR_MIPMAP_LINEAR:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_LINEAR;
+         break;
+      default:
+         return GL_FALSE;
       }
-   }
-
 
-   return GL_TRUE;
-}
+      if (tObj->MaxAnisotropy > 1.0) {
+         minFilt = FILTER_ANISOTROPIC;
+         magFilt = FILTER_ANISOTROPIC;
+      }
+      else {
+         switch (tObj->MagFilter) {
+         case GL_NEAREST:
+            magFilt = FILTER_NEAREST;
+            break;
+         case GL_LINEAR:
+            magFilt = FILTER_LINEAR;
+            break;
+         default:
+            return GL_FALSE;
+         }
+      }
 
+      lodbias = (int) ((tUnit->LodBias + tObj->LodBias) * 16.0);
+      if (lodbias < -64)
+          lodbias = -64;
+      if (lodbias > 63)
+          lodbias = 63;
+      
+      state[I830_TEXREG_TM0S3] = ((lodbias << TM0S3_LOD_BIAS_SHIFT) & 
+                                  TM0S3_LOD_BIAS_MASK);
+#if 0
+      /* YUV conversion:
+       */
+      if (firstImage->TexFormat->MesaFormat == MESA_FORMAT_YCBCR ||
+          firstImage->TexFormat->MesaFormat == MESA_FORMAT_YCBCR_REV)
+         state[I830_TEXREG_TM0S3] |= SS2_COLORSPACE_CONVERSION;
+#endif
+
+      state[I830_TEXREG_TM0S3] |= ((intelObj->lastLevel -
+                                    intelObj->firstLevel) *
+                                   4) << TM0S3_MIN_MIP_SHIFT;
+
+      state[I830_TEXREG_TM0S3] |= ((minFilt << TM0S3_MIN_FILTER_SHIFT) |
+                                   (mipFilt << TM0S3_MIP_FILTER_SHIFT) |
+                                   (magFilt << TM0S3_MAG_FILTER_SHIFT));
+   }
 
-static GLboolean disable_tex( GLcontext *ctx, GLuint unit )
-{
-   i830ContextPtr i830 = I830_CONTEXT(ctx);
+   {
+      GLenum ws = tObj->WrapS;
+      GLenum wt = tObj->WrapT;
 
-   /* This is happening too often.  I need to conditionally send diffuse
-    * state to the card.  Perhaps a diffuse dirty flag of some kind.
-    * Will need to change this logic if more than 2 texture units are
-    * used.  We need to only do this up to the last unit enabled, or unit
-    * one if nothing is enabled.
-    */
 
-   if ( i830->intel.CurrentTexObj[unit] != NULL ) {
-      /* The old texture is no longer bound to this texture unit.
-       * Mark it as such.
+      /* 3D textures not available on i830
        */
-
-      i830->intel.CurrentTexObj[unit]->base.bound &= ~(1U << 0);
-      i830->intel.CurrentTexObj[unit] = NULL;
+      if (tObj->Target == GL_TEXTURE_3D)
+         return GL_FALSE;
+
+      state[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
+                                MAP_UNIT(unit) |
+                                ENABLE_TEXCOORD_PARAMS |
+                                ss3 |
+                                ENABLE_ADDR_V_CNTL |
+                                TEXCOORD_ADDR_V_MODE(translate_wrap_mode(wt))
+                                | ENABLE_ADDR_U_CNTL |
+                                TEXCOORD_ADDR_U_MODE(translate_wrap_mode
+                                                     (ws)));
    }
 
-   return GL_TRUE;
-}
 
-static GLboolean i830UpdateTexUnit( GLcontext *ctx, GLuint unit )
-{
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
+   state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
+                                                  tObj->_BorderChan[1],
+                                                  tObj->_BorderChan[2],
+                                                  tObj->_BorderChan[3]);
 
-   if (texUnit->_ReallyEnabled &&
-       INTEL_CONTEXT(ctx)->intelScreen->tex.size < 2048 * 1024)
-      return GL_FALSE;
 
-   switch(texUnit->_ReallyEnabled) {
-   case TEXTURE_1D_BIT:
-   case TEXTURE_2D_BIT:
-      return (enable_tex_common( ctx, unit ) &&
-	      enable_tex_2d( ctx, unit ));
-   case TEXTURE_RECT_BIT:
-      return (enable_tex_common( ctx, unit ) &&
-	      enable_tex_rect( ctx, unit ));
-   case TEXTURE_CUBE_BIT:
-      return (enable_tex_common( ctx, unit ) &&
-	      enable_tex_cube( ctx, unit ));
-   case 0:
-      return disable_tex( ctx, unit );
-   default:
-      return GL_FALSE;
-   }
+   I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);
+   /* memcmp was already disabled, but definitely won't work as the
+    * region might now change and that wouldn't be detected:
+    */
+   I830_STATECHANGE(i830, I830_UPLOAD_TEX(unit));
+   return GL_TRUE;
 }
 
 
-void i830UpdateTextureState( intelContextPtr intel )
-{
-   i830ContextPtr i830 = I830_CONTEXT(intel);
-   GLcontext *ctx = &intel->ctx;
-   GLboolean ok;
-
-   if (0) fprintf(stderr, "%s\n", __FUNCTION__);
 
-   I830_ACTIVESTATE(i830, I830_UPLOAD_TEX_ALL, GL_FALSE);
 
-   ok = (i830UpdateTexUnit( ctx, 0 ) &&
-	 i830UpdateTexUnit( ctx, 1 ) &&
-	 i830UpdateTexUnit( ctx, 2 ) &&
-	 i830UpdateTexUnit( ctx, 3 ));
+void
+i830UpdateTextureState(struct intel_context *intel)
+{
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   GLboolean ok = GL_TRUE;
+   GLuint i;
+
+   for (i = 0; i < I830_TEX_UNITS && ok; i++) {
+      switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) {
+      case TEXTURE_1D_BIT:
+      case TEXTURE_2D_BIT:
+      case TEXTURE_CUBE_BIT:
+         ok = i830_update_tex_unit(intel, i, TEXCOORDS_ARE_NORMAL);
+         break;
+      case TEXTURE_RECT_BIT:
+         ok = i830_update_tex_unit(intel, i, TEXCOORDS_ARE_IN_TEXELUNITS);
+         break;
+      case 0:{
+	 struct i830_context *i830 = i830_context(&intel->ctx);
+         if (i830->state.active & I830_UPLOAD_TEX(i)) 
+            I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(i), GL_FALSE);
+
+	 if (i830->state.tex_buffer[i] != NULL) {
+	    dri_bo_unreference(i830->state.tex_buffer[i]);
+	    i830->state.tex_buffer[i] = NULL;
+	 }
+         break;
+      }
+      case TEXTURE_3D_BIT:
+      default:
+         ok = GL_FALSE;
+         break;
+      }
+   }
 
-   FALLBACK( intel, I830_FALLBACK_TEXTURE, !ok );
+   FALLBACK(intel, I830_FALLBACK_TEXTURE, !ok);
 
    if (ok)
-      i830EmitTextureBlend( i830 );
+      i830EmitTextureBlend(i830);
 }
-
-
-
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index d40cf705a35..3b3ff2bceda 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -25,17 +25,20 @@
  * 
  **************************************************************************/
 
+#include "glapi/glapi.h"
 
 #include "i830_context.h"
 #include "i830_reg.h"
-
 #include "intel_batchbuffer.h"
-
+#include "intel_regions.h"
+#include "intel_tris.h"
 #include "tnl/t_context.h"
 #include "tnl/t_vertex.h"
 
-static GLboolean i830_check_vertex_size( intelContextPtr intel,
-					 GLuint expected );
+#define FILE_DEBUG_FLAG DEBUG_STATE
+
+static GLboolean i830_check_vertex_size(struct intel_context *intel,
+                                        GLuint expected);
 
 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
@@ -59,10 +62,16 @@ do {									\
 #define VRTX_TEX_SET_FMT(n, x)          ((x)<<((n)*2))
 #define TEXBIND_SET(n, x) 		((x)<<((n)*4))
 
-static void i830_render_start( intelContextPtr intel )
+static void
+i830_render_prevalidate(struct intel_context *intel)
+{
+}
+
+static void
+i830_render_start(struct intel_context *intel)
 {
    GLcontext *ctx = &intel->ctx;
-   i830ContextPtr i830 = I830_CONTEXT(intel);
+   struct i830_context *i830 = i830_context(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    struct vertex_buffer *VB = &tnl->vb;
    DECLARE_RENDERINPUTS(index_bitset);
@@ -70,7 +79,7 @@ static void i830_render_start( intelContextPtr intel )
    GLuint v2 = _3DSTATE_VFT1_CMD;
    GLuint mcsb1 = 0;
 
-   RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
+   RENDERINPUTS_COPY(index_bitset, tnl->render_inputs_bitset);
 
    /* Important:
     */
@@ -80,196 +89,215 @@ static void i830_render_start( intelContextPtr intel )
    /* EMIT_ATTR's must be in order as they tell t_vertex.c how to
     * build up a hardware vertex.
     */
-   if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, VFT0_XYZW );
+   if (RENDERINPUTS_TEST_RANGE(index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX)) {
+      EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, VFT0_XYZW);
       intel->coloroffset = 4;
    }
    else {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, VFT0_XYZ );
+      EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, VFT0_XYZ);
       intel->coloroffset = 3;
    }
 
-   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) {
-      EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F, VFT0_POINT_WIDTH );
+   if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_POINTSIZE)) {
+      EMIT_ATTR(_TNL_ATTRIB_POINTSIZE, EMIT_1F, VFT0_POINT_WIDTH);
    }
 
-   EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, VFT0_DIFFUSE );
-      
+   EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, VFT0_DIFFUSE);
+
    intel->specoffset = 0;
-   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) ||
-       RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
-      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
+   if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_COLOR1) ||
+       RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_FOG)) {
+      if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_COLOR1)) {
          intel->specoffset = intel->coloroffset + 1;
-         EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, VFT0_SPEC );
+         EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, VFT0_SPEC);
       }
       else
-         EMIT_PAD( 3 );
+         EMIT_PAD(3);
 
-      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG ))
-         EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, VFT0_SPEC );
+      if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_FOG))
+         EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F, VFT0_SPEC);
       else
-         EMIT_PAD( 1 );
+         EMIT_PAD(1);
    }
 
-   if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
+   if (RENDERINPUTS_TEST_RANGE(index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX)) {
       int i, count = 0;
 
       for (i = 0; i < I830_TEX_UNITS; i++) {
-         if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
+         if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) {
             GLuint sz = VB->TexCoordPtr[i]->size;
             GLuint emit;
-            GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & 
+            GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &
                           ~TEXCOORDTYPE_MASK);
 
-	    switch (sz) {
-	    case 1: 
-	    case 2: 
-	       emit = EMIT_2F; 
-	       sz = 2; 
-	       mcs |= TEXCOORDTYPE_CARTESIAN; 
-	       break;
-	    case 3:
-	       emit = EMIT_3F; 
-	       sz = 3;
-	       mcs |= TEXCOORDTYPE_VECTOR;
-	       break;
-	    case 4: 
-	       emit = EMIT_3F_XYW; 
-	       sz = 3;     
-	       mcs |= TEXCOORDTYPE_HOMOGENEOUS;
-	       break;
-	    default: 
-	       continue;
-	    };
-	      
-
-	    EMIT_ATTR( _TNL_ATTRIB_TEX0+i, emit, 0 );	       
-	    v2 |= VRTX_TEX_SET_FMT(count, SZ_TO_HW(sz));
-	    mcsb1 |= (count+8)<<(i*4);
-
-	    if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) {
-	       I830_STATECHANGE(i830, I830_UPLOAD_TEX(i));
-	       i830->state.Tex[i][I830_TEXREG_MCS] = mcs;
-	    }
-
-	    count++;
-	 }
+            switch (sz) {
+            case 1:
+            case 2:
+               emit = EMIT_2F;
+               sz = 2;
+               mcs |= TEXCOORDTYPE_CARTESIAN;
+               break;
+            case 3:
+               emit = EMIT_3F;
+               sz = 3;
+               mcs |= TEXCOORDTYPE_VECTOR;
+               break;
+            case 4:
+               emit = EMIT_3F_XYW;
+               sz = 3;
+               mcs |= TEXCOORDTYPE_HOMOGENEOUS;
+               break;
+            default:
+               continue;
+            };
+
+
+            EMIT_ATTR(_TNL_ATTRIB_TEX0 + i, emit, 0);
+            v2 |= VRTX_TEX_SET_FMT(count, SZ_TO_HW(sz));
+            mcsb1 |= (count + 8) << (i * 4);
+
+            if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) {
+               I830_STATECHANGE(i830, I830_UPLOAD_TEX(i));
+               i830->state.Tex[i][I830_TEXREG_MCS] = mcs;
+            }
+
+            count++;
+         }
       }
 
       v0 |= VFT0_TEX_COUNT(count);
    }
-   
+
    /* Only need to change the vertex emit code if there has been a
     * statechange to a new hardware vertex format:
     */
    if (v0 != i830->state.Ctx[I830_CTXREG_VF] ||
        v2 != i830->state.Ctx[I830_CTXREG_VF2] ||
        mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] ||
-       !RENDERINPUTS_EQUAL( index_bitset, i830->last_index_bitset )) {
-    
-      I830_STATECHANGE( i830, I830_UPLOAD_CTX );
+       !RENDERINPUTS_EQUAL(index_bitset, i830->last_index_bitset)) {
+      int k;
+
+      I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 
       /* Must do this *after* statechange, so as not to affect
        * buffered vertices reliant on the old state:
        */
-      intel->vertex_size = 
-	 _tnl_install_attrs( ctx, 
-			     intel->vertex_attrs, 
-			     intel->vertex_attr_count,
-			     intel->ViewportMatrix.m, 0 );
+      intel->vertex_size =
+         _tnl_install_attrs(ctx,
+                            intel->vertex_attrs,
+                            intel->vertex_attr_count,
+                            intel->ViewportMatrix.m, 0);
 
       intel->vertex_size >>= 2;
 
       i830->state.Ctx[I830_CTXREG_VF] = v0;
       i830->state.Ctx[I830_CTXREG_VF2] = v2;
       i830->state.Ctx[I830_CTXREG_MCSB1] = mcsb1;
-      RENDERINPUTS_COPY( i830->last_index_bitset, index_bitset );
+      RENDERINPUTS_COPY(i830->last_index_bitset, index_bitset);
 
-      assert(i830_check_vertex_size( intel, intel->vertex_size ));
+      k = i830_check_vertex_size(intel, intel->vertex_size);
+      assert(k);
    }
 }
 
-static void i830_reduced_primitive_state( intelContextPtr intel,
-					  GLenum rprim )
+static void
+i830_reduced_primitive_state(struct intel_context *intel, GLenum rprim)
 {
-    i830ContextPtr i830 = I830_CONTEXT(intel);
-    GLuint st1 = i830->state.Stipple[I830_STPREG_ST1];
-
-    st1 &= ~ST1_ENABLE;
-
-    switch (rprim) {
-    case GL_TRIANGLES:
-       if (intel->ctx.Polygon.StippleFlag &&
-	   intel->hw_stipple)
-	  st1 |= ST1_ENABLE;
-       break;
-    case GL_LINES:
-    case GL_POINTS:
-    default:
-       break;
-    }
-
-    i830->intel.reduced_primitive = rprim;
-
-    if (st1 != i830->state.Stipple[I830_STPREG_ST1]) {
-       I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
-       i830->state.Stipple[I830_STPREG_ST1] = st1;
-    }
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   GLuint st1 = i830->state.Stipple[I830_STPREG_ST1];
+
+   st1 &= ~ST1_ENABLE;
+
+   switch (rprim) {
+   case GL_TRIANGLES:
+      if (intel->ctx.Polygon.StippleFlag && intel->hw_stipple)
+         st1 |= ST1_ENABLE;
+      break;
+   case GL_LINES:
+   case GL_POINTS:
+   default:
+      break;
+   }
+
+   i830->intel.reduced_primitive = rprim;
+
+   if (st1 != i830->state.Stipple[I830_STPREG_ST1]) {
+      INTEL_FIREVERTICES(intel);
+
+      I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
+      i830->state.Stipple[I830_STPREG_ST1] = st1;
+   }
 }
 
 /* Pull apart the vertex format registers and figure out how large a
  * vertex is supposed to be. 
  */
-static GLboolean i830_check_vertex_size( intelContextPtr intel,
-					 GLuint expected )
+static GLboolean
+i830_check_vertex_size(struct intel_context *intel, GLuint expected)
 {
-   i830ContextPtr i830 = I830_CONTEXT(intel);
+   struct i830_context *i830 = i830_context(&intel->ctx);
    int vft0 = i830->current->Ctx[I830_CTXREG_VF];
    int vft1 = i830->current->Ctx[I830_CTXREG_VF2];
    int nrtex = (vft0 & VFT0_TEX_COUNT_MASK) >> VFT0_TEX_COUNT_SHIFT;
    int i, sz = 0;
 
    switch (vft0 & VFT0_XYZW_MASK) {
-   case VFT0_XY: sz = 2; break;
-   case VFT0_XYZ: sz = 3; break;
-   case VFT0_XYW: sz = 3; break;
-   case VFT0_XYZW: sz = 4; break;
-   default: 
+   case VFT0_XY:
+      sz = 2;
+      break;
+   case VFT0_XYZ:
+      sz = 3;
+      break;
+   case VFT0_XYW:
+      sz = 3;
+      break;
+   case VFT0_XYZW:
+      sz = 4;
+      break;
+   default:
       fprintf(stderr, "no xyzw specified\n");
       return 0;
    }
 
-   if (vft0 & VFT0_SPEC) sz++;
-   if (vft0 & VFT0_DIFFUSE) sz++;
-   if (vft0 & VFT0_DEPTH_OFFSET) sz++;
-   if (vft0 & VFT0_POINT_WIDTH) sz++;
-	
-   for (i = 0 ; i < nrtex ; i++) { 
+   if (vft0 & VFT0_SPEC)
+      sz++;
+   if (vft0 & VFT0_DIFFUSE)
+      sz++;
+   if (vft0 & VFT0_DEPTH_OFFSET)
+      sz++;
+   if (vft0 & VFT0_POINT_WIDTH)
+      sz++;
+
+   for (i = 0; i < nrtex; i++) {
       switch (vft1 & VFT1_TEX0_MASK) {
-      case TEXCOORDFMT_2D: sz += 2; break;
-      case TEXCOORDFMT_3D: sz += 3; break;
-      case TEXCOORDFMT_4D: sz += 4; break;
-      case TEXCOORDFMT_1D: sz += 1; break;
+      case TEXCOORDFMT_2D:
+         sz += 2;
+         break;
+      case TEXCOORDFMT_3D:
+         sz += 3;
+         break;
+      case TEXCOORDFMT_4D:
+         sz += 4;
+         break;
+      case TEXCOORDFMT_1D:
+         sz += 1;
+         break;
       }
       vft1 >>= VFT1_TEX1_SHIFT;
    }
-	
-   if (sz != expected) 
+
+   if (sz != expected)
       fprintf(stderr, "vertex size mismatch %d/%d\n", sz, expected);
-   
+
    return sz == expected;
 }
 
-static void i830_emit_invarient_state( intelContextPtr intel )
+static void
+i830_emit_invarient_state(struct intel_context *intel)
 {
    BATCH_LOCALS;
 
-   BEGIN_BATCH( 40 );
-
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3));
+   BEGIN_BATCH(40, IGNORE_CLIPRECTS);
 
    OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
    OUT_BATCH(0);
@@ -282,37 +310,35 @@ static void i830_emit_invarient_state( intelContextPtr intel )
 
    OUT_BATCH(_3DSTATE_FOG_MODE_CMD);
    OUT_BATCH(FOGFUNC_ENABLE |
-	     FOG_LINEAR_CONST | 
-	     FOGSRC_INDEX_Z | 
-	     ENABLE_FOG_DENSITY);
+             FOG_LINEAR_CONST | FOGSRC_INDEX_Z | ENABLE_FOG_DENSITY);
    OUT_BATCH(0);
    OUT_BATCH(0);
 
 
    OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(0) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(0) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0));
+             MAP_UNIT(0) |
+             DISABLE_TEX_STREAM_BUMP |
+             ENABLE_TEX_STREAM_COORD_SET |
+             TEX_STREAM_COORD_SET(0) |
+             ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0));
    OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(1) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(1) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1));
+             MAP_UNIT(1) |
+             DISABLE_TEX_STREAM_BUMP |
+             ENABLE_TEX_STREAM_COORD_SET |
+             TEX_STREAM_COORD_SET(1) |
+             ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1));
    OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(2) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(2) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2));
+             MAP_UNIT(2) |
+             DISABLE_TEX_STREAM_BUMP |
+             ENABLE_TEX_STREAM_COORD_SET |
+             TEX_STREAM_COORD_SET(2) |
+             ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2));
    OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(3) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(3) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
+             MAP_UNIT(3) |
+             DISABLE_TEX_STREAM_BUMP |
+             ENABLE_TEX_STREAM_COORD_SET |
+             TEX_STREAM_COORD_SET(3) |
+             ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
 
    OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
    OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0));
@@ -324,21 +350,13 @@ static void i830_emit_invarient_state( intelContextPtr intel )
    OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
 
    OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
-	     ENABLE_POINT_RASTER_RULE |
-	     OGL_POINT_RASTER_RULE |
-	     ENABLE_LINE_STRIP_PROVOKE_VRTX |
-	     ENABLE_TRI_FAN_PROVOKE_VRTX |
-	     ENABLE_TRI_STRIP_PROVOKE_VRTX |
-	     LINE_STRIP_PROVOKE_VRTX(1) |
-	     TRI_FAN_PROVOKE_VRTX(2) | 
-	     TRI_STRIP_PROVOKE_VRTX(2));
-
-   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | 
-	     DISABLE_SCISSOR_RECT);
-
-   OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
+             ENABLE_POINT_RASTER_RULE |
+             OGL_POINT_RASTER_RULE |
+             ENABLE_LINE_STRIP_PROVOKE_VRTX |
+             ENABLE_TRI_FAN_PROVOKE_VRTX |
+             ENABLE_TRI_STRIP_PROVOKE_VRTX |
+             LINE_STRIP_PROVOKE_VRTX(1) |
+             TRI_FAN_PROVOKE_VRTX(2) | TRI_STRIP_PROVOKE_VRTX(2));
 
    OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM);
    OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE);
@@ -349,45 +367,46 @@ static void i830_emit_invarient_state( intelContextPtr intel )
 
 
    OUT_BATCH(_3DSTATE_COLOR_FACTOR_CMD);
-   OUT_BATCH(0x80808080);	/* .5 required in alpha for GL_DOT3_RGBA_EXT */
+   OUT_BATCH(0x80808080);       /* .5 required in alpha for GL_DOT3_RGBA_EXT */
 
    ADVANCE_BATCH();
 }
 
 
 #define emit( intel, state, size )			\
-do {							\
-   int k;						\
-   BEGIN_BATCH( size / sizeof(GLuint));			\
-   for (k = 0 ; k < size / sizeof(GLuint) ; k++)	\
-      OUT_BATCH(state[k]);				\
-   ADVANCE_BATCH();					\
-} while (0);
-
-static GLuint get_state_size( struct i830_hw_state *state )
+   intel_batchbuffer_data(intel->batch, state, size, IGNORE_CLIPRECTS )
+
+static GLuint
+get_dirty(struct i830_hw_state *state)
+{
+   return state->active & ~state->emitted;
+}
+
+static GLuint
+get_state_size(struct i830_hw_state *state)
 {
-   GLuint dirty = state->active & ~state->emitted;
+   GLuint dirty = get_dirty(state);
    GLuint sz = 0;
    GLuint i;
 
    if (dirty & I830_UPLOAD_INVARIENT)
       sz += 40 * sizeof(int);
 
-   if (dirty & I830_UPLOAD_CTX) 
+   if (dirty & I830_UPLOAD_CTX)
       sz += sizeof(state->Ctx);
 
-   if (dirty & I830_UPLOAD_BUFFERS) 
+   if (dirty & I830_UPLOAD_BUFFERS)
       sz += sizeof(state->Buffer);
 
-   if (dirty & I830_UPLOAD_STIPPLE) 
+   if (dirty & I830_UPLOAD_STIPPLE)
       sz += sizeof(state->Stipple);
 
    for (i = 0; i < I830_TEX_UNITS; i++) {
-      if ((dirty & I830_UPLOAD_TEX(i)))  
-	 sz += sizeof(state->Tex[i]); 
+      if ((dirty & I830_UPLOAD_TEX(i)))
+         sz += sizeof(state->Tex[i]);
 
-      if (dirty & I830_UPLOAD_TEXBLEND(i)) 
-	 sz += state->TexBlendWordsUsed[i] * 4;
+      if (dirty & I830_UPLOAD_TEXBLEND(i))
+         sz += state->TexBlendWordsUsed[i] * 4;
    }
 
    return sz;
@@ -396,139 +415,349 @@ static GLuint get_state_size( struct i830_hw_state *state )
 
 /* Push the state into the sarea and/or texture memory.
  */
-static void i830_emit_state( intelContextPtr intel )
+static void
+i830_emit_state(struct intel_context *intel)
 {
-   i830ContextPtr i830 = I830_CONTEXT(intel);
+   struct i830_context *i830 = i830_context(&intel->ctx);
    struct i830_hw_state *state = i830->current;
-   int i;
-   GLuint dirty = state->active & ~state->emitted;
-   GLuint counter = intel->batch.counter;
+   int i, count;
+   GLuint dirty;
+   GET_CURRENT_CONTEXT(ctx);
    BATCH_LOCALS;
+   dri_bo *aper_array[3 + I830_TEX_UNITS];
+   int aper_count;
+
+   /* We don't hold the lock at this point, so want to make sure that
+    * there won't be a buffer wrap between the state emits and the primitive
+    * emit header.
+    *
+    * It might be better to talk about explicit places where
+    * scheduling is allowed, rather than assume that it is whenever a
+    * batchbuffer fills up.
+    *
+    * Set the space as LOOP_CLIPRECTS now, since that's what our primitives
+    * will be emitted under.
+    */
+   intel_batchbuffer_require_space(intel->batch,
+				   get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
+				   LOOP_CLIPRECTS);
+   count = 0;
+ again:
+   aper_count = 0;
+   dirty = get_dirty(state);
+
+   aper_array[aper_count++] = intel->batch->buf;
+   if (dirty & I830_UPLOAD_BUFFERS) {
+      aper_array[aper_count++] = state->draw_region->buffer;
+      if (state->depth_region)
+         aper_array[aper_count++] = state->depth_region->buffer;
+   }
 
-   if (intel->batch.space < get_state_size(state)) {
-      intelFlushBatch(intel, GL_TRUE);
-      dirty = state->active & ~state->emitted;
-      counter = intel->batch.counter;
+   for (i = 0; i < I830_TEX_UNITS; i++)
+     if (dirty & I830_UPLOAD_TEX(i)) {
+	if (state->tex_buffer[i]) {
+	   aper_array[aper_count++] = state->tex_buffer[i];
+	}
+     }
+
+   if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
+       if (count == 0) {
+	   count++;
+	   intel_batchbuffer_flush(intel->batch);
+	   goto again;
+       } else {
+	   _mesa_error(ctx, GL_OUT_OF_MEMORY, "i830 emit state");
+	   assert(0);
+       }
    }
 
+
+   /* Do this here as we may have flushed the batchbuffer above,
+    * causing more state to be dirty!
+    */
+   dirty = get_dirty(state);
+   state->emitted |= dirty;
+   assert(get_dirty(state) == 0);
+
    if (dirty & I830_UPLOAD_INVARIENT) {
-      if (VERBOSE) fprintf(stderr, "I830_UPLOAD_INVARIENT:\n"); 
-      i830_emit_invarient_state( intel );
+      DBG("I830_UPLOAD_INVARIENT:\n");
+      i830_emit_invarient_state(intel);
    }
 
    if (dirty & I830_UPLOAD_CTX) {
-      if (VERBOSE) fprintf(stderr, "I830_UPLOAD_CTX:\n"); 
-      emit( i830, state->Ctx, sizeof(state->Ctx) );
+      DBG("I830_UPLOAD_CTX:\n");
+      emit(intel, state->Ctx, sizeof(state->Ctx));
+
    }
 
    if (dirty & I830_UPLOAD_BUFFERS) {
-      if (VERBOSE) fprintf(stderr, "I830_UPLOAD_BUFFERS:\n"); 
-      emit( i830, state->Buffer, sizeof(state->Buffer) );
-   }
+      DBG("I830_UPLOAD_BUFFERS:\n");
+      BEGIN_BATCH(I830_DEST_SETUP_SIZE + 2, IGNORE_CLIPRECTS);
+      OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR0]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]);
+      OUT_RELOC(state->draw_region->buffer,
+		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                state->draw_region->draw_offset);
+
+      if (state->depth_region) {
+         OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR0]);
+         OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR1]);
+         OUT_RELOC(state->depth_region->buffer,
+		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                   state->depth_region->draw_offset);
+      }
 
+      OUT_BATCH(state->Buffer[I830_DESTREG_DV0]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_DV1]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_SENABLE]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_SR0]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_SR1]);
+      OUT_BATCH(state->Buffer[I830_DESTREG_SR2]);
+
+      if (intel->constant_cliprect) {
+	 assert(state->Buffer[I830_DESTREG_DRAWRECT0] != MI_NOOP);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT0]);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT1]);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT2]);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT3]);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT4]);
+	 OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT5]);
+      }
+      ADVANCE_BATCH();
+   }
+   
    if (dirty & I830_UPLOAD_STIPPLE) {
-      if (VERBOSE) fprintf(stderr, "I830_UPLOAD_STIPPLE:\n"); 
-      emit( i830, state->Stipple, sizeof(state->Stipple) );
+      DBG("I830_UPLOAD_STIPPLE:\n");
+      emit(intel, state->Stipple, sizeof(state->Stipple));
    }
 
    for (i = 0; i < I830_TEX_UNITS; i++) {
-      if ((dirty & I830_UPLOAD_TEX(i))) { 
- 	 if (VERBOSE) fprintf(stderr, "I830_UPLOAD_TEX(%d):\n", i); 
-	 emit( i830, state->Tex[i], sizeof(state->Tex[i])); 
-      } 
+      if ((dirty & I830_UPLOAD_TEX(i))) {
+         DBG("I830_UPLOAD_TEX(%d):\n", i);
+
+         BEGIN_BATCH(I830_TEX_SETUP_SIZE + 1, IGNORE_CLIPRECTS);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_TM0LI]);
+
+         if (state->tex_buffer[i]) {
+            OUT_RELOC(state->tex_buffer[i],
+		      I915_GEM_DOMAIN_SAMPLER, 0,
+                      state->tex_offset[i] | TM0S0_USE_FENCE);
+         }
+	 else if (state == &i830->meta) {
+	    assert(i == 0);
+	    OUT_BATCH(0);
+	 }
+	 else {
+	    OUT_BATCH(state->tex_offset[i]);
+	 }
+
+         OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S1]);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S2]);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S3]);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_TM0S4]);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_MCS]);
+         OUT_BATCH(state->Tex[i][I830_TEXREG_CUBE]);
+      }
 
       if (dirty & I830_UPLOAD_TEXBLEND(i)) {
-	 if (VERBOSE) fprintf(stderr, "I830_UPLOAD_TEXBLEND(%d):\n", i); 
-	 emit( i830, state->TexBlend[i], 
-	       state->TexBlendWordsUsed[i] * 4 );
+         DBG("I830_UPLOAD_TEXBLEND(%d): %d words\n", i,
+             state->TexBlendWordsUsed[i]);
+         emit(intel, state->TexBlend[i], state->TexBlendWordsUsed[i] * 4);
       }
    }
 
-   state->emitted |= dirty;
-   intel->batch.last_emit_state = counter;
-   assert(counter == intel->batch.counter);
+   intel->batch->dirty_state &= ~dirty;
+   assert(get_dirty(state) == 0);
+   assert((intel->batch->dirty_state & (1<<1)) == 0);
 }
 
-static void i830_destroy_context( intelContextPtr intel )
+static void
+i830_destroy_context(struct intel_context *intel)
 {
+   GLuint i;
+   struct i830_context *i830 = i830_context(&intel->ctx);
+
+   intel_region_release(&i830->state.draw_region);
+   intel_region_release(&i830->state.depth_region);
+   intel_region_release(&i830->meta.draw_region);
+   intel_region_release(&i830->meta.depth_region);
+   intel_region_release(&i830->initial.draw_region);
+   intel_region_release(&i830->initial.depth_region);
+
+   for (i = 0; i < I830_TEX_UNITS; i++) {
+      if (i830->state.tex_buffer[i] != NULL) {
+	 dri_bo_unreference(i830->state.tex_buffer[i]);
+	 i830->state.tex_buffer[i] = NULL;
+      }
+   }
+
    _tnl_free_vertices(&intel->ctx);
 }
 
-static void
-i830_set_color_region(intelContextPtr intel, const intelRegion *region)
+
+void
+i830_state_draw_region(struct intel_context *intel,
+		       struct i830_hw_state *state,
+		       struct intel_region *color_region,
+		       struct intel_region *depth_region)
 {
-   i830ContextPtr i830 = I830_CONTEXT(intel);
-   I830_STATECHANGE( i830, I830_UPLOAD_BUFFERS );
-   i830->state.Buffer[I830_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i830->state.Buffer[I830_DESTREG_CBUFADDR2] = region->offset;
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   GLcontext *ctx = &intel->ctx;
+   GLuint value;
+
+   ASSERT(state == &i830->state || state == &i830->meta);
+
+   if (state->draw_region != color_region) {
+      intel_region_release(&state->draw_region);
+      intel_region_reference(&state->draw_region, color_region);
+   }
+   if (state->depth_region != depth_region) {
+      intel_region_release(&state->depth_region);
+      intel_region_reference(&state->depth_region, depth_region);
+   }
+
+   /*
+    * Set stride/cpp values
+    */
+   if (color_region) {
+      state->Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
+      state->Buffer[I830_DESTREG_CBUFADDR1] =
+         (BUF_3D_ID_COLOR_BACK |
+          BUF_3D_PITCH(color_region->pitch * color_region->cpp) |
+          BUF_3D_USE_FENCE);
+   }
+
+   if (depth_region) {
+      state->Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
+      state->Buffer[I830_DESTREG_DBUFADDR1] =
+         (BUF_3D_ID_DEPTH |
+          BUF_3D_PITCH(depth_region->pitch * depth_region->cpp) |
+          BUF_3D_USE_FENCE);
+   }
+
+   /*
+    * Compute/set I830_DESTREG_DV1 value
+    */
+   value = (DSTORG_HORT_BIAS(0x8) |     /* .5 */
+            DSTORG_VERT_BIAS(0x8) | DEPTH_IS_Z);    /* .5 */
+            
+   if (color_region && color_region->cpp == 4) {
+      value |= DV_PF_8888;
+   }
+   else {
+      value |= DV_PF_565;
+   }
+   if (depth_region && depth_region->cpp == 4) {
+      value |= DEPTH_FRMT_24_FIXED_8_OTHER;
+   }
+   else {
+      value |= DEPTH_FRMT_16_FIXED;
+   }
+   state->Buffer[I830_DESTREG_DV1] = value;
+
+   if (intel->constant_cliprect) {
+      state->Buffer[I830_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
+      state->Buffer[I830_DESTREG_DRAWRECT1] = 0;
+      state->Buffer[I830_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
+      state->Buffer[I830_DESTREG_DRAWRECT3] =
+	 (ctx->DrawBuffer->Width & 0xffff) |
+	 (ctx->DrawBuffer->Height << 16);
+      state->Buffer[I830_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
+      state->Buffer[I830_DESTREG_DRAWRECT5] = 0;
+   } else {
+      state->Buffer[I830_DESTREG_DRAWRECT0] = MI_NOOP;
+      state->Buffer[I830_DESTREG_DRAWRECT1] = MI_NOOP;
+      state->Buffer[I830_DESTREG_DRAWRECT2] = MI_NOOP;
+      state->Buffer[I830_DESTREG_DRAWRECT3] = MI_NOOP;
+      state->Buffer[I830_DESTREG_DRAWRECT4] = MI_NOOP;
+      state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP;
+   }
+
+   I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
+
+
 }
 
 
 static void
-i830_set_z_region(intelContextPtr intel, const intelRegion *region)
+i830_set_draw_region(struct intel_context *intel,
+                     struct intel_region *color_regions[],
+                     struct intel_region *depth_region,
+		     GLuint num_regions)
 {
-   i830ContextPtr i830 = I830_CONTEXT(intel);
-   I830_STATECHANGE( i830, I830_UPLOAD_BUFFERS );
-   i830->state.Buffer[I830_DESTREG_DBUFADDR1] =
-      (BUF_3D_ID_DEPTH | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i830->state.Buffer[I830_DESTREG_DBUFADDR2] = region->offset;
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   i830_state_draw_region(intel, &i830->state, color_regions[0], depth_region);
 }
 
-
+#if 0
 static void
 i830_update_color_z_regions(intelContextPtr intel,
-                            const intelRegion *colorRegion,
-                            const intelRegion *depthRegion)
+                            const intelRegion * colorRegion,
+                            const intelRegion * depthRegion)
 {
    i830ContextPtr i830 = I830_CONTEXT(intel);
 
    i830->state.Buffer[I830_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(colorRegion->pitch) | BUF_3D_USE_FENCE);
+      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(colorRegion->pitch) |
+       BUF_3D_USE_FENCE);
    i830->state.Buffer[I830_DESTREG_CBUFADDR2] = colorRegion->offset;
 
    i830->state.Buffer[I830_DESTREG_DBUFADDR1] =
       (BUF_3D_ID_DEPTH | BUF_3D_PITCH(depthRegion->pitch) | BUF_3D_USE_FENCE);
    i830->state.Buffer[I830_DESTREG_DBUFADDR2] = depthRegion->offset;
 }
+#endif
 
 
 /* This isn't really handled at the moment.
  */
-static void i830_lost_hardware( intelContextPtr intel )
+static void
+i830_new_batch(struct intel_context *intel)
 {
-   I830_CONTEXT(intel)->state.emitted = 0;
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   i830->state.emitted = 0;
+
+   /* Check that we didn't just wrap our batchbuffer at a bad time. */
+   assert(!intel->no_batch_wrap);
 }
 
 
 
-static void i830_emit_flush( intelContextPtr intel )
+static GLuint
+i830_flush_cmd(void)
 {
-   BATCH_LOCALS;
-
-   BEGIN_BATCH(2);
-   OUT_BATCH( MI_FLUSH | FLUSH_MAP_CACHE ); 
-   OUT_BATCH( 0 );
-   ADVANCE_BATCH();
+   return MI_FLUSH | FLUSH_MAP_CACHE;
 }
 
 
+static void 
+i830_assert_not_dirty( struct intel_context *intel )
+{
+   struct i830_context *i830 = i830_context(&intel->ctx);
+   struct i830_hw_state *state = i830->current;
+   assert(!get_dirty(state));
+}
 
+static void
+i830_note_unlock( struct intel_context *intel )
+{
+    /* nothing */
+}
 
-void i830InitVtbl( i830ContextPtr i830 )
+void
+i830InitVtbl(struct i830_context *i830)
 {
-   i830->intel.vtbl.alloc_tex_obj = i830AllocTexObj;
    i830->intel.vtbl.check_vertex_size = i830_check_vertex_size;
-   i830->intel.vtbl.clear_with_tris = i830ClearWithTris;
-   i830->intel.vtbl.rotate_window = i830RotateWindow;
    i830->intel.vtbl.destroy = i830_destroy_context;
    i830->intel.vtbl.emit_state = i830_emit_state;
-   i830->intel.vtbl.lost_hardware = i830_lost_hardware;
+   i830->intel.vtbl.new_batch = i830_new_batch;
    i830->intel.vtbl.reduced_primitive_state = i830_reduced_primitive_state;
-   i830->intel.vtbl.set_color_region = i830_set_color_region;
-   i830->intel.vtbl.set_z_region = i830_set_z_region;
-   i830->intel.vtbl.update_color_z_regions = i830_update_color_z_regions;
+   i830->intel.vtbl.set_draw_region = i830_set_draw_region;
    i830->intel.vtbl.update_texture_state = i830UpdateTextureState;
-   i830->intel.vtbl.emit_flush = i830_emit_flush;
+   i830->intel.vtbl.flush_cmd = i830_flush_cmd;
    i830->intel.vtbl.render_start = i830_render_start;
+   i830->intel.vtbl.render_prevalidate = i830_render_prevalidate;
+   i830->intel.vtbl.assert_not_dirty = i830_assert_not_dirty;
+   i830->intel.vtbl.note_unlock = i830_note_unlock; 
+   i830->intel.vtbl.finish_batch = intel_finish_vb;
 }
diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c
index 2bc1cae9c31..e0ddc7fd613 100644
--- a/src/mesa/drivers/dri/i915/i915_context.c
+++ b/src/mesa/drivers/dri/i915/i915_context.c
@@ -26,7 +26,7 @@
  **************************************************************************/
 
 #include "i915_context.h"
-#include "imports.h"
+#include "main/imports.h"
 #include "intel_tex.h"
 #include "intel_tris.h"
 #include "tnl/t_context.h"
@@ -36,151 +36,151 @@
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
-#include "vbo/vbo.h"
-
 
 #include "utils.h"
 #include "i915_reg.h"
 
+#include "intel_regions.h"
+#include "intel_batchbuffer.h"
+#include "intel_tris.h"
+#include "intel_span.h"
+#include "intel_pixel.h"
+
 /***************************************
  * Mesa's Driver Functions
  ***************************************/
 
-static const struct dri_extension i915_extensions[] =
-{
-    { "GL_ARB_depth_texture",              NULL },
-    { "GL_ARB_fragment_program",           NULL },
-    { "GL_ARB_shadow",                     NULL },
-    { "GL_ARB_texture_env_crossbar",       NULL },
-    { "GL_EXT_shadow_funcs",               NULL },
-    /* ARB extn won't work if not enabled */
-    { "GL_SGIX_depth_texture",             NULL },
-    { NULL,                                NULL }
+static const struct dri_extension i915_extensions[] = {
+   {"GL_ARB_depth_texture", NULL},
+   {"GL_ARB_fragment_program", NULL},
+   {"GL_ARB_shadow", NULL},
+   {"GL_ARB_texture_non_power_of_two", NULL},
+   {"GL_EXT_shadow_funcs", NULL},
+   {NULL, NULL}
 };
 
 /* Override intel default.
  */
-static void i915InvalidateState( GLcontext *ctx, GLuint new_state )
+static void
+i915InvalidateState(GLcontext * ctx, GLuint new_state)
 {
-   _swrast_InvalidateState( ctx, new_state );
-   _swsetup_InvalidateState( ctx, new_state );
-   _vbo_InvalidateState( ctx, new_state );
-   _tnl_InvalidateState( ctx, new_state );
-   _tnl_invalidate_vertex_state( ctx, new_state );
-   INTEL_CONTEXT(ctx)->NewGLState |= new_state;
+   _swrast_InvalidateState(ctx, new_state);
+   _swsetup_InvalidateState(ctx, new_state);
+   _vbo_InvalidateState(ctx, new_state);
+   _tnl_InvalidateState(ctx, new_state);
+   _tnl_invalidate_vertex_state(ctx, new_state);
+   intel_context(ctx)->NewGLState |= new_state;
 
    /* Todo: gather state values under which tracked parameters become
     * invalidated, add callbacks for things like
     * ProgramLocalParameters, etc.
     */
    {
-      struct i915_fragment_program *p = 
-	 (struct i915_fragment_program *)ctx->FragmentProgram._Current;
+      struct i915_fragment_program *p =
+         (struct i915_fragment_program *) ctx->FragmentProgram._Current;
       if (p && p->nr_params)
-	 p->params_uptodate = 0;
+         p->params_uptodate = 0;
    }
 
-   if (new_state & (_NEW_FOG|_NEW_HINT|_NEW_PROGRAM))
+   if (new_state & (_NEW_FOG | _NEW_HINT | _NEW_PROGRAM))
       i915_update_fog(ctx);
 }
 
 
-static void i915InitDriverFunctions( struct dd_function_table *functions )
+static void
+i915InitDriverFunctions(struct dd_function_table *functions)
 {
-   intelInitDriverFunctions( functions );
-   i915InitStateFunctions( functions );
-   i915InitTextureFuncs( functions );
-   i915InitFragProgFuncs( functions );
+   intelInitDriverFunctions(functions);
+   i915InitStateFunctions(functions);
+   i915InitTextureFuncs(functions);
+   i915InitFragProgFuncs(functions);
    functions->UpdateState = i915InvalidateState;
 }
 
 
+extern const struct tnl_pipeline_stage *intel_pipeline[];
 
-GLboolean i915CreateContext( const __GLcontextModes *mesaVis,
-			    __DRIcontextPrivate *driContextPriv,
-			    void *sharedContextPrivate)
+GLboolean
+i915CreateContext(const __GLcontextModes * mesaVis,
+                  __DRIcontextPrivate * driContextPriv,
+                  void *sharedContextPrivate)
 {
    struct dd_function_table functions;
-   i915ContextPtr i915 = (i915ContextPtr) CALLOC_STRUCT(i915_context);
-   intelContextPtr intel = &i915->intel;
+   struct i915_context *i915 =
+      (struct i915_context *) CALLOC_STRUCT(i915_context);
+   struct intel_context *intel = &i915->intel;
    GLcontext *ctx = &intel->ctx;
-   GLuint i;
 
-   if (!i915) return GL_FALSE;
+   if (!i915)
+      return GL_FALSE;
+
+   if (0)
+      _mesa_printf("\ntexmem-0-3 branch\n\n");
 
-   i915InitVtbl( i915 );
+   i915InitVtbl(i915);
+   i915InitMetaFuncs(i915);
 
-   i915InitDriverFunctions( &functions );
+   i915InitDriverFunctions(&functions);
 
-   if (!intelInitContext( intel, mesaVis, driContextPriv,
-			  sharedContextPrivate, &functions )) {
+   if (!intelInitContext(intel, mesaVis, driContextPriv,
+                         sharedContextPrivate, &functions)) {
       FREE(i915);
       return GL_FALSE;
    }
 
+   /* Initialize swrast, tnl driver tables: */
+   intelInitSpanFuncs(ctx);
+   intelInitTriFuncs(ctx);
+
+   /* Install the customized pipeline: */
+   _tnl_destroy_pipeline(ctx);
+   _tnl_install_pipeline(ctx, intel_pipeline);
+
+   if (intel->no_rast)
+      FALLBACK(intel, INTEL_FALLBACK_USER, 1);
+
    ctx->Const.MaxTextureUnits = I915_TEX_UNITS;
    ctx->Const.MaxTextureImageUnits = I915_TEX_UNITS;
    ctx->Const.MaxTextureCoordUnits = I915_TEX_UNITS;
 
-   intel->nr_heaps = 1;
-   intel->texture_heaps[0] = 
-      driCreateTextureHeap( 0, intel,
-			    intel->intelScreen->tex.size,
-			    12,
-			    I830_NR_TEX_REGIONS,
-			    intel->sarea->texList,
-			    (unsigned *) & intel->sarea->texAge,
-			    & intel->swapped,
-			    sizeof( struct i915_texture_object ),
-			    (destroy_texture_object_t *)intelDestroyTexObj );
-
-   /* FIXME: driCalculateMaxTextureLevels assumes that mipmaps are
-    * tightly packed, but they're not in Intel graphics
-    * hardware.
+
+   /* Advertise the full hardware capabilities.  The new memory
+    * manager should cope much better with overload situations:
     */
+   ctx->Const.MaxTextureLevels = 12;
+   ctx->Const.Max3DTextureLevels = 9;
+   ctx->Const.MaxCubeTextureLevels = 12;
+   ctx->Const.MaxTextureRectSize = (1 << 11);
    ctx->Const.MaxTextureUnits = I915_TEX_UNITS;
-   i = driQueryOptioni( &intel->optionCache, "allow_large_textures");
-   driCalculateMaxTextureLevels( intel->texture_heaps,
-				 intel->nr_heaps,
-				 &intel->ctx.Const,
-				 4,
-				 11, /* max 2D texture size is 2048x2048 */
-				 8,  /* 3D texture */
-				 11, /* cube texture. */
-				 11, /* rect texture */
-				 12,
-				 GL_FALSE,
-				 i );
 
    /* GL_ARB_fragment_program limits - don't think Mesa actually
     * validates programs against these, and in any case one ARB
     * instruction can translate to more than one HW instruction, so
     * we'll still have to check and fallback each time.
     */
-   
    ctx->Const.FragmentProgram.MaxNativeTemps = I915_MAX_TEMPORARY;
-   ctx->Const.FragmentProgram.MaxNativeAttribs = 11; /* 8 tex, 2 color, fog */
+   ctx->Const.FragmentProgram.MaxNativeAttribs = 11;    /* 8 tex, 2 color, fog */
    ctx->Const.FragmentProgram.MaxNativeParameters = I915_MAX_CONSTANT;
    ctx->Const.FragmentProgram.MaxNativeAluInstructions = I915_MAX_ALU_INSN;
    ctx->Const.FragmentProgram.MaxNativeTexInstructions = I915_MAX_TEX_INSN;
-   ctx->Const.FragmentProgram.MaxNativeInstructions = (I915_MAX_ALU_INSN + 
-						I915_MAX_TEX_INSN);
-   ctx->Const.FragmentProgram.MaxNativeTexIndirections = I915_MAX_TEX_INDIRECT;
+   ctx->Const.FragmentProgram.MaxNativeInstructions = (I915_MAX_ALU_INSN +
+                                                       I915_MAX_TEX_INSN);
+   ctx->Const.FragmentProgram.MaxNativeTexIndirections =
+      I915_MAX_TEX_INDIRECT;
    ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* I don't think we have one */
+
    ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
    ctx->FragmentProgram._UseTexEnvProgram = GL_TRUE;
 
-
-   driInitExtensions( ctx, i915_extensions, GL_FALSE );
+   driInitExtensions(ctx, i915_extensions, GL_FALSE);
 
 
-   _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 
-		       36 * sizeof(GLfloat) );
+   _tnl_init_vertices(ctx, ctx->Const.MaxArrayLockSize + 12,
+                      36 * sizeof(GLfloat));
 
    intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf;
 
-   i915InitState( i915 );
+   i915InitState(i915);
 
    return GL_TRUE;
 }
-
diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index ec1550126a6..87bbf5f9271 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -29,6 +29,7 @@
 #define I915CONTEXT_INC
 
 #include "intel_context.h"
+#include "i915_reg.h"
 
 #define I915_FALLBACK_TEXTURE		 0x1000
 #define I915_FALLBACK_COLORMASK		 0x2000
@@ -46,6 +47,7 @@
 #define I915_UPLOAD_CONSTANTS        0x10
 #define I915_UPLOAD_FOG              0x20
 #define I915_UPLOAD_INVARIENT        0x40
+#define I915_UPLOAD_DEFAULTS         0x80
 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
 #define I915_UPLOAD_TEX_0_SHIFT      16
@@ -55,17 +57,21 @@
  */
 #define I915_DESTREG_CBUFADDR0 0
 #define I915_DESTREG_CBUFADDR1 1
-#define I915_DESTREG_CBUFADDR2 2
 #define I915_DESTREG_DBUFADDR0 3
 #define I915_DESTREG_DBUFADDR1 4
-#define I915_DESTREG_DBUFADDR2 5
 #define I915_DESTREG_DV0 6
 #define I915_DESTREG_DV1 7
 #define I915_DESTREG_SENABLE 8
 #define I915_DESTREG_SR0 9
 #define I915_DESTREG_SR1 10
 #define I915_DESTREG_SR2 11
-#define I915_DEST_SETUP_SIZE 12
+#define I915_DESTREG_DRAWRECT0 12
+#define I915_DESTREG_DRAWRECT1 13
+#define I915_DESTREG_DRAWRECT2 14
+#define I915_DESTREG_DRAWRECT3 15
+#define I915_DESTREG_DRAWRECT4 16
+#define I915_DESTREG_DRAWRECT5 17
+#define I915_DEST_SETUP_SIZE 18
 
 #define I915_CTXREG_STATE4		0
 #define I915_CTXREG_LI	        	1
@@ -89,7 +95,6 @@
 #define I915_STPREG_ST1        1
 #define I915_STP_SETUP_SIZE    2
 
-#define I915_TEXREG_MS2        0
 #define I915_TEXREG_MS3        1
 #define I915_TEXREG_MS4        2
 #define I915_TEXREG_SS2        3
@@ -97,24 +102,38 @@
 #define I915_TEXREG_SS4        5
 #define I915_TEX_SETUP_SIZE    6
 
+#define I915_DEFREG_C0    0
+#define I915_DEFREG_C1    1
+#define I915_DEFREG_S0    2
+#define I915_DEFREG_S1    3
+#define I915_DEFREG_Z0    4
+#define I915_DEFREG_Z1    5
+#define I915_DEF_SETUP_SIZE    6
+
+
 #define I915_MAX_CONSTANT      32
 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
 
 
 #define I915_PROGRAM_SIZE      192
 
+#define I915_MAX_INSN          (I915_MAX_TEX_INSN+I915_MAX_ALU_INSN)
 
 /* Hardware version of a parsed fragment program.  "Derived" from the
  * mesa fragment_program struct.
  */
-struct i915_fragment_program {
+struct i915_fragment_program
+{
    struct gl_fragment_program FragProg;
 
    GLboolean translated;
    GLboolean params_uptodate;
    GLboolean on_hardware;
-   GLboolean error;		/* If program is malformed for any reason. */
+   GLboolean error;             /* If program is malformed for any reason. */
 
+   /** Record of which phases R registers were last written in. */
+   GLuint register_phases[16];
+   GLuint indirections;
    GLuint nr_tex_indirect;
    GLuint nr_tex_insn;
    GLuint nr_alu_insn;
@@ -135,52 +154,40 @@ struct i915_fragment_program {
    GLuint constant_flags[I915_MAX_CONSTANT];
    GLuint nr_constants;
 
-   GLuint *csr;			/* Cursor, points into program.
-				 */
+   GLuint *csr;                 /* Cursor, points into program.
+                                 */
 
-   GLuint *decl;		/* Cursor, points into declarations.
-				 */
-   
-   GLuint decl_s;		/* flags for which s regs need to be decl'd */
-   GLuint decl_t;		/* flags for which t regs need to be decl'd */
+   GLuint *decl;                /* Cursor, points into declarations.
+                                 */
 
-   GLuint temp_flag;		/* Tracks temporary regs which are in
-				 * use.
-				 */
+   GLuint decl_s;               /* flags for which s regs need to be decl'd */
+   GLuint decl_t;               /* flags for which t regs need to be decl'd */
 
-   GLuint utemp_flag;		/* Tracks TYPE_U temporary regs which are in
-				 * use.
-				 */
+   GLuint temp_flag;            /* Tracks temporary regs which are in
+                                 * use.
+                                 */
 
+   GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
+                                 * use.
+                                 */
 
 
+   /* Track which R registers are "live" for each instruction.
+    * A register is live between the time it's written to and the last time
+    * it's read. */
+   GLuint usedRegs[I915_MAX_INSN];
+
    /* Helpers for i915_fragprog.c:
     */
    GLuint wpos_tex;
    GLboolean depth_written;
 
-   struct { 
-      GLuint reg;		/* Hardware constant idx */
-      const GLfloat *values; 	/* Pointer to tracked values */
+   struct
+   {
+      GLuint reg;               /* Hardware constant idx */
+      const GLfloat *values;    /* Pointer to tracked values */
    } param[I915_MAX_CONSTANT];
    GLuint nr_params;
-      
-
-
-
-   /* Helpers for i915_texprog.c:
-    */
-   GLuint src_texture;		/* Reg containing sampled texture color,
-				 * else UREG_BAD.
-				 */
-
-   GLuint src_previous;		/* Reg containing color from previous 
-				 * stage.  May need to be decl'd.
-				 */
-
-   GLuint last_tex_stage;	/* Number of last enabled texture unit */
-
-   struct vertex_buffer *VB;
 };
 
 
@@ -188,67 +195,68 @@ struct i915_fragment_program {
 
 
 
-struct i915_texture_object
-{
-   struct intel_texture_object intel;
-   GLenum lastTarget;
-   GLboolean refs_border_color;
-   GLuint Setup[I915_TEX_SETUP_SIZE];
-};
 
 #define I915_TEX_UNITS 8
 
 
-struct i915_hw_state {
+struct i915_hw_state
+{
    GLuint Ctx[I915_CTX_SETUP_SIZE];
    GLuint Buffer[I915_DEST_SETUP_SIZE];
    GLuint Stipple[I915_STP_SETUP_SIZE];
    GLuint Fog[I915_FOG_SETUP_SIZE];
+   GLuint Defaults[I915_DEF_SETUP_SIZE];
    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
    GLuint Constant[I915_CONSTANT_SIZE];
    GLuint ConstantSize;
    GLuint Program[I915_PROGRAM_SIZE];
    GLuint ProgramSize;
-   GLuint active;		/* I915_UPLOAD_* */
-   GLuint emitted;		/* I915_UPLOAD_* */
+
+   /* Region pointers for relocation: 
+    */
+   struct intel_region *draw_region;
+   struct intel_region *depth_region;
+/*    struct intel_region *tex_region[I915_TEX_UNITS]; */
+
+   /* Regions aren't actually that appropriate here as the memory may
+    * be from a PBO or FBO.  Will have to do this for draw and depth for
+    * FBO's...
+    */
+   dri_bo *tex_buffer[I915_TEX_UNITS];
+   GLuint tex_offset[I915_TEX_UNITS];
+
+
+   GLuint active;               /* I915_UPLOAD_* */
+   GLuint emitted;              /* I915_UPLOAD_* */
 };
 
 #define I915_FOG_PIXEL  2
 #define I915_FOG_VERTEX 1
 #define I915_FOG_NONE   0
 
-struct i915_context 
+struct i915_context
 {
    struct intel_context intel;
 
    GLuint last_ReallyEnabled;
    GLuint vertex_fog;
+   GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
+
 
-   struct i915_fragment_program tex_program;
    struct i915_fragment_program *current_program;
 
    struct i915_hw_state meta, initial, state, *current;
 };
 
 
-typedef struct i915_context *i915ContextPtr;
-typedef struct i915_texture_object *i915TextureObjectPtr;
-
-#define I915_CONTEXT(ctx)	((i915ContextPtr)(ctx))
-
-
-
 #define I915_STATECHANGE(i915, flag)					\
 do {									\
-   if (0) fprintf(stderr, "I915_STATECHANGE %x in %s\n", flag, __FUNCTION__);	\
    INTEL_FIREVERTICES( &(i915)->intel );					\
    (i915)->state.emitted &= ~(flag);					\
 } while (0)
 
 #define I915_ACTIVESTATE(i915, flag, mode)			\
 do {								\
-   if (0) fprintf(stderr, "I915_ACTIVESTATE %x %d in %s\n",	\
-		  flag, mode, __FUNCTION__);			\
    INTEL_FIREVERTICES( &(i915)->intel );				\
    if (mode)							\
       (i915)->state.active |= (flag);				\
@@ -260,7 +268,13 @@ do {								\
 /*======================================================================
  * i915_vtbl.c
  */
-extern void i915InitVtbl( i915ContextPtr i915 );
+extern void i915InitVtbl(struct i915_context *i915);
+
+extern void
+i915_state_draw_region(struct intel_context *intel,
+                       struct i915_hw_state *state,
+                       struct intel_region *color_region,
+                       struct intel_region *depth_region);
 
 
 
@@ -289,70 +303,58 @@ do {									\
 /*======================================================================
  * i915_context.c
  */
-extern GLboolean i915CreateContext( const __GLcontextModes *mesaVis,
-				    __DRIcontextPrivate *driContextPriv,
-				    void *sharedContextPrivate);
-
-
-/*======================================================================
- * i915_texprog.c
- */
-extern void i915ValidateTextureProgram( i915ContextPtr i915 );
+extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
+                                   __DRIcontextPrivate * driContextPriv,
+                                   void *sharedContextPrivate);
 
 
 /*======================================================================
  * i915_debug.c
  */
-extern void i915_disassemble_program( const GLuint *program, GLuint sz );
-extern void i915_print_ureg( const char *msg, GLuint ureg );
+extern void i915_disassemble_program(const GLuint * program, GLuint sz);
+extern void i915_print_ureg(const char *msg, GLuint ureg);
 
 
 /*======================================================================
  * i915_state.c
  */
-extern void i915InitStateFunctions( struct dd_function_table *functions );
-extern void i915InitState( i915ContextPtr i915 );
-extern void i915_update_fog(GLcontext *ctxx);
+extern void i915InitStateFunctions(struct dd_function_table *functions);
+extern void i915InitState(struct i915_context *i915);
+extern void i915_update_fog(GLcontext * ctx);
 
 
 /*======================================================================
  * i915_tex.c
  */
-extern void i915UpdateTextureState( intelContextPtr intel );
-extern void i915InitTextureFuncs( struct dd_function_table *functions );
-extern intelTextureObjectPtr i915AllocTexObj( struct gl_texture_object *texObj );
+extern void i915UpdateTextureState(struct intel_context *intel);
+extern void i915InitTextureFuncs(struct dd_function_table *functions);
 
 /*======================================================================
  * i915_metaops.c
  */
-extern GLboolean
-i915TryTextureReadPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *pack,
-			  GLvoid *pixels );
-
-extern GLboolean
-i915TryTextureDrawPixels( GLcontext *ctx,
-			  GLint x, GLint y, GLsizei width, GLsizei height,
-			  GLenum format, GLenum type,
-			  const struct gl_pixelstore_attrib *unpack,
-			  const GLvoid *pixels );
+void i915InitMetaFuncs(struct i915_context *i915);
 
-extern void 
-i915ClearWithTris( intelContextPtr intel, GLbitfield mask,
-		   GLboolean all, GLint cx, GLint cy, GLint cw, GLint ch);
-
-
-extern void
-i915RotateWindow(intelContextPtr intel, __DRIdrawablePrivate *dPriv,
-                 GLuint srcBuf);
 
 /*======================================================================
  * i915_fragprog.c
  */
-extern void i915ValidateFragmentProgram( i915ContextPtr i915 );
-extern void i915InitFragProgFuncs( struct dd_function_table *functions );
-	
-#endif
+extern void i915ValidateFragmentProgram(struct i915_context *i915);
+extern void i915InitFragProgFuncs(struct dd_function_table *functions);
+
+/*======================================================================
+ * Inline conversion functions.  These are better-typed than the
+ * macros used previously:
+ */
+static INLINE struct i915_context *
+i915_context(GLcontext * ctx)
+{
+   return (struct i915_context *) ctx;
+}
+
 
+
+#define I915_CONTEXT(ctx)	i915_context(ctx)
+
+
+
+#endif
diff --git a/src/mesa/drivers/dri/i915/i915_debug.c b/src/mesa/drivers/dri/i915/i915_debug.c
index 054b561605a..f7bb7ea44c9 100644
--- a/src/mesa/drivers/dri/i915/i915_debug.c
+++ b/src/mesa/drivers/dri/i915/i915_debug.c
@@ -25,275 +25,824 @@
  * 
  **************************************************************************/
 
+#include "main/imports.h"
+
 #include "i915_reg.h"
 #include "i915_context.h"
-#include <stdio.h>
-
-
-static const char *opcodes[0x20] = {
-   "NOP",
-   "ADD",
-   "MOV",
-   "MUL",
-   "MAD",
-   "DP2ADD",
-   "DP3",
-   "DP4",
-   "FRC",
-   "RCP",
-   "RSQ",
-   "EXP",
-   "LOG",
-   "CMP",
-   "MIN",
-   "MAX",
-   "FLR",
-   "MOD",
-   "TRC",
-   "SGE",
-   "SLT",
-   "TEXLD",
-   "TEXLDP",
-   "TEXLDB",
-   "TEXKILL",
-   "DCL",
-   "0x1a",
-   "0x1b",
-   "0x1c",
-   "0x1d",
-   "0x1e",
-   "0x1f",
-};
-
-
-static const int args[0x20] = {
-   0,				/* 0 nop */
-   2,				/* 1 add */
-   1,				/* 2 mov */
-   2,				/* 3 m ul */
-   3, 				/* 4 mad */
-   3,				/* 5 dp2add */
-   2,				/* 6 dp3 */
-   2,				/* 7 dp4 */
-   1,				/* 8 frc */
-   1,				/* 9 rcp */
-   1,				/* a rsq */
-   1,				/* b exp */
-   1,				/* c log */
-   3,				/* d cmp */
-   2,				/* e min */
-   2,				/* f max */
-   1,				/* 10 flr */
-   1,				/* 11 mod */
-   1,				/* 12 trc */
-   2,				/* 13 sge */
-   2,				/* 14 slt */
-   1,
-   1,
-   1,
-   1,
-   0,
-   0,
-   0,
-   0,
-   0,
-   0,
-   0,
-};
-
-
-static const char *regname[0x8] = {
-   "R",
-   "T",
-   "CONST",
-   "S",
-   "OC",
-   "OD",
-   "U",
-   "UNKNOWN",
-};
-
-static void print_reg_type_nr( GLuint type, GLuint nr )
+#include "i915_debug.h"
+
+#define PRINTF( ... ) _mesa_printf( __VA_ARGS__ )
+
+static GLboolean debug( struct debug_stream *stream, const char *name, GLuint len )
 {
-   switch (type) {
-   case REG_TYPE_T:
-      switch (nr) {
-      case T_DIFFUSE: fprintf(stderr, "T_DIFFUSE"); return;
-      case T_SPECULAR: fprintf(stderr, "T_SPECULAR"); return;
-      case T_FOG_W: fprintf(stderr, "T_FOG_W"); return;
-      default: fprintf(stderr, "T_TEX%d", nr); return;
-      }
-   case REG_TYPE_OC:
-      if (nr == 0) {
-	 fprintf(stderr, "oC");
-	 return;
-      }
-      break;
-   case REG_TYPE_OD:
-      if (nr == 0) {
-	 fprintf(stderr, "oD");
-	 return;
-      }
-      break;
-   default:
-      break;
+   GLuint i;
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   
+   if (len == 0) {
+      PRINTF("Error - zero length packet (0x%08x)\n", stream->ptr[0]);
+      assert(0);
+      return GL_FALSE;
    }
 
-   fprintf(stderr, "%s[%d]", regname[type], nr);
-}
+   if (stream->print_addresses)
+      PRINTF("%08x:  ", stream->offset);
+
 
-#define REG_SWIZZLE_MASK 0x7777
-#define REG_NEGATE_MASK 0x8888
+   PRINTF("%s (%d dwords):\n", name, len);
+   for (i = 0; i < len; i++)
+      PRINTF("\t0x%08x\n",  ptr[i]);   
+   PRINTF("\n");
 
-#define REG_SWIZZLE_XYZW ((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) |	\
-		      (SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) |	\
-		      (SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) |	\
-		      (SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
+   stream->offset += len * sizeof(GLuint);
+   
+   return GL_TRUE;
+}
 
 
-static void print_reg_neg_swizzle( GLuint reg )
+static const char *get_prim_name( GLuint val )
 {
-   int i;
-
-   if ((reg & REG_SWIZZLE_MASK) == REG_SWIZZLE_XYZW &&
-       (reg & REG_NEGATE_MASK) == 0)
-      return;
-
-   fprintf(stderr, ".");
-
-   for (i = 3 ; i >= 0; i--) {
-      if (reg & (1<<((i*4)+3))) 
-	 fprintf(stderr, "-");
-	 
-      switch ((reg>>(i*4)) & 0x7) {
-      case 0: fprintf(stderr, "x"); break;
-      case 1: fprintf(stderr, "y"); break;
-      case 2: fprintf(stderr, "z"); break;
-      case 3: fprintf(stderr, "w"); break;
-      case 4: fprintf(stderr, "0"); break;
-      case 5: fprintf(stderr, "1"); break;
-      default: fprintf(stderr, "?"); break;
-      }
+   switch (val & PRIM3D_MASK) {
+   case PRIM3D_TRILIST: return "TRILIST"; break;
+   case PRIM3D_TRISTRIP: return "TRISTRIP"; break;
+   case PRIM3D_TRISTRIP_RVRSE: return "TRISTRIP_RVRSE"; break;
+   case PRIM3D_TRIFAN: return "TRIFAN"; break;
+   case PRIM3D_POLY: return "POLY"; break;
+   case PRIM3D_LINELIST: return "LINELIST"; break;
+   case PRIM3D_LINESTRIP: return "LINESTRIP"; break;
+   case PRIM3D_RECTLIST: return "RECTLIST"; break;
+   case PRIM3D_POINTLIST: return "POINTLIST"; break;
+   case PRIM3D_DIB: return "DIB"; break;
+   case PRIM3D_CLEAR_RECT: return "CLEAR_RECT"; break;
+   case PRIM3D_ZONE_INIT: return "ZONE_INIT"; break;
+   default: return "????"; break;
    }
 }
 
-
-static void print_src_reg( GLuint dword )
+static GLboolean debug_prim( struct debug_stream *stream, const char *name, 
+			     GLboolean dump_floats,
+			     GLuint len )
 {
-   GLuint nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK;
-   GLuint type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK;
-   print_reg_type_nr( type, nr );
-   print_reg_neg_swizzle( dword );
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   const char *prim = get_prim_name( ptr[0] );
+   GLuint i;
+   
+
+
+   PRINTF("%s %s (%d dwords):\n", name, prim, len);
+   PRINTF("\t0x%08x\n",  ptr[0]);   
+   for (i = 1; i < len; i++) {
+      if (dump_floats)
+	 PRINTF("\t0x%08x // %f\n",  ptr[i], *(GLfloat *)&ptr[i]);   
+      else
+	 PRINTF("\t0x%08x\n",  ptr[i]);   
+   }
+
+      
+   PRINTF("\n");
+
+   stream->offset += len * sizeof(GLuint);
+   
+   return GL_TRUE;
 }
+   
+
 
-void i915_print_ureg( const char *msg, GLuint ureg )
+
+static GLboolean debug_program( struct debug_stream *stream, const char *name, GLuint len )
 {
-   fprintf(stderr, "%s: ", msg);
-   print_src_reg( ureg >> 8 );
-   fprintf(stderr, "\n");
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+
+   if (len == 0) {
+      PRINTF("Error - zero length packet (0x%08x)\n", stream->ptr[0]);
+      assert(0);
+      return GL_FALSE;
+   }
+
+   if (stream->print_addresses)
+      PRINTF("%08x:  ", stream->offset);
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   i915_disassemble_program( ptr, len );
+
+   stream->offset += len * sizeof(GLuint);
+   return GL_TRUE;
 }
 
-static void print_dest_reg( GLuint dword )
+
+static GLboolean debug_chain( struct debug_stream *stream, const char *name, GLuint len )
 {
-   GLuint nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK;
-   GLuint type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK;
-   print_reg_type_nr( type, nr );
-   if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL)
-      return;
-   fprintf(stderr, ".");
-   if (dword & A0_DEST_CHANNEL_X) fprintf(stderr, "x");
-   if (dword & A0_DEST_CHANNEL_Y) fprintf(stderr, "y");
-   if (dword & A0_DEST_CHANNEL_Z) fprintf(stderr, "z");
-   if (dword & A0_DEST_CHANNEL_W) fprintf(stderr, "w");
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   GLuint old_offset = stream->offset + len * sizeof(GLuint);
+   GLuint i;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   for (i = 0; i < len; i++)
+      PRINTF("\t0x%08x\n",  ptr[i]);
+
+   stream->offset = ptr[1] & ~0x3;
+   
+   if (stream->offset < old_offset)
+      PRINTF("\n... skipping backwards from 0x%x --> 0x%x ...\n\n", 
+		   old_offset, stream->offset );
+   else
+      PRINTF("\n... skipping from 0x%x --> 0x%x ...\n\n", 
+		   old_offset, stream->offset );
+
+
+   return GL_TRUE;
 }
 
 
-#define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
-#define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
-#define GET_SRC2_REG(r)      (r)
+static GLboolean debug_variable_length_prim( struct debug_stream *stream )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   const char *prim = get_prim_name( ptr[0] );
+   GLuint i, len;
+
+   GLushort *idx = (GLushort *)(ptr+1);
+   for (i = 0; idx[i] != 0xffff; i++)
+      ;
+
+   len = 1+(i+2)/2;
+
+   PRINTF("3DPRIM, %s variable length %d indicies (%d dwords):\n", prim, i, len);
+   for (i = 0; i < len; i++)
+      PRINTF("\t0x%08x\n",  ptr[i]);
+   PRINTF("\n");
+
+   stream->offset += len * sizeof(GLuint);
+   return GL_TRUE;
+}
 
 
-static void print_arith_op( GLuint opcode, const GLuint *program )
+#define BITS( dw, hi, lo, ... )				\
+do {							\
+   unsigned himask = 0xffffffffU >> (31 - (hi));		\
+   PRINTF("\t\t ");				\
+   PRINTF(__VA_ARGS__);			\
+   PRINTF(": 0x%x\n", ((dw) & himask) >> (lo));	\
+} while (0)
+
+#define MBZ( dw, hi, lo) do {							\
+   unsigned x = (dw) >> (lo);				\
+   unsigned lomask = (1 << (lo)) - 1;			\
+   unsigned himask;					\
+   himask = (1UL << (hi)) - 1;				\
+   assert ((x & himask & ~lomask) == 0);	\
+} while (0)
+
+#define FLAG( dw, bit, ... )			\
+do {							\
+   if (((dw) >> (bit)) & 1) {				\
+      PRINTF("\t\t ");				\
+      PRINTF(__VA_ARGS__);			\
+      PRINTF("\n");				\
+   }							\
+} while (0)
+
+static GLboolean debug_load_immediate( struct debug_stream *stream,
+				       const char *name,
+				       GLuint len )
 {
-   if (opcode != A0_NOP) {
-      print_dest_reg(program[0]);
-      if (program[0] & A0_DEST_SATURATE)
-	 fprintf(stderr, " = SATURATE ");
-      else
-	 fprintf(stderr, " = ");
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   GLuint bits = (ptr[0] >> 4) & 0xff;
+   GLuint j = 0;
+   
+   PRINTF("%s (%d dwords, flags: %x):\n", name, len, bits);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+
+   if (bits & (1<<0)) {
+      PRINTF("\t  LIS0: 0x%08x\n", ptr[j]);
+      PRINTF("\t vb address: 0x%08x\n", (ptr[j] & ~0x3));
+      BITS(ptr[j], 0, 0, "vb invalidate disable");
+      j++;
+   }
+   if (bits & (1<<1)) {
+      PRINTF("\t  LIS1: 0x%08x\n", ptr[j]);
+      BITS(ptr[j], 29, 24, "vb dword width");
+      BITS(ptr[j], 21, 16, "vb dword pitch");
+      BITS(ptr[j], 15, 0, "vb max index");
+      j++;
    }
+   if (bits & (1<<2)) {
+      int i;
+      PRINTF("\t  LIS2: 0x%08x\n", ptr[j]);
+      for (i = 0; i < 8; i++) {
+	 unsigned tc = (ptr[j] >> (i * 4)) & 0xf;
+	 if (tc != 0xf)
+	    BITS(tc, 3, 0, "tex coord %d", i);
+      }
+      j++;
+   }
+   if (bits & (1<<3)) {
+      PRINTF("\t  LIS3: 0x%08x\n", ptr[j]);
+      j++;
+   }
+   if (bits & (1<<4)) {
+      PRINTF("\t  LIS4: 0x%08x\n", ptr[j]);
+      BITS(ptr[j], 31, 23, "point width");
+      BITS(ptr[j], 22, 19, "line width");
+      FLAG(ptr[j], 18, "alpha flatshade");
+      FLAG(ptr[j], 17, "fog flatshade");
+      FLAG(ptr[j], 16, "spec flatshade");
+      FLAG(ptr[j], 15, "rgb flatshade");
+      BITS(ptr[j], 14, 13, "cull mode");
+      FLAG(ptr[j], 12, "vfmt: point width");
+      FLAG(ptr[j], 11, "vfmt: specular/fog");
+      FLAG(ptr[j], 10, "vfmt: rgba");
+      FLAG(ptr[j], 9, "vfmt: depth offset");
+      BITS(ptr[j], 8, 6, "vfmt: position (2==xyzw)");
+      FLAG(ptr[j], 5, "force dflt diffuse");
+      FLAG(ptr[j], 4, "force dflt specular");
+      FLAG(ptr[j], 3, "local depth offset enable");
+      FLAG(ptr[j], 2, "vfmt: fp32 fog coord");
+      FLAG(ptr[j], 1, "sprite point");
+      FLAG(ptr[j], 0, "antialiasing");
+      j++;
+   }
+   if (bits & (1<<5)) {
+      PRINTF("\t  LIS5: 0x%08x\n", ptr[j]);
+      BITS(ptr[j], 31, 28, "rgba write disables");
+      FLAG(ptr[j], 27,     "force dflt point width");
+      FLAG(ptr[j], 26,     "last pixel enable");
+      FLAG(ptr[j], 25,     "global z offset enable");
+      FLAG(ptr[j], 24,     "fog enable");
+      BITS(ptr[j], 23, 16, "stencil ref");
+      BITS(ptr[j], 15, 13, "stencil test");
+      BITS(ptr[j], 12, 10, "stencil fail op");
+      BITS(ptr[j], 9, 7,   "stencil pass z fail op");
+      BITS(ptr[j], 6, 4,   "stencil pass z pass op");
+      FLAG(ptr[j], 3,      "stencil write enable");
+      FLAG(ptr[j], 2,      "stencil test enable");
+      FLAG(ptr[j], 1,      "color dither enable");
+      FLAG(ptr[j], 0,      "logiop enable");
+      j++;
+   }
+   if (bits & (1<<6)) {
+      PRINTF("\t  LIS6: 0x%08x\n", ptr[j]);
+      FLAG(ptr[j], 31,      "alpha test enable");
+      BITS(ptr[j], 30, 28,  "alpha func");
+      BITS(ptr[j], 27, 20,  "alpha ref");
+      FLAG(ptr[j], 19,      "depth test enable");
+      BITS(ptr[j], 18, 16,  "depth func");
+      FLAG(ptr[j], 15,      "blend enable");
+      BITS(ptr[j], 14, 12,  "blend func");
+      BITS(ptr[j], 11, 8,   "blend src factor");
+      BITS(ptr[j], 7,  4,   "blend dst factor");
+      FLAG(ptr[j], 3,       "depth write enable");
+      FLAG(ptr[j], 2,       "color write enable");
+      BITS(ptr[j], 1,  0,   "provoking vertex"); 
+      j++;
+   }
+
 
-   fprintf(stderr, "%s ", opcodes[opcode]);
+   PRINTF("\n");
 
-   print_src_reg(GET_SRC0_REG(program[0], program[1]));
-   if (args[opcode] == 1) {
-      fprintf(stderr, "\n");
-      return;
+   assert(j == len);
+
+   stream->offset += len * sizeof(GLuint);
+   
+   return GL_TRUE;
+}
+ 
+
+
+static GLboolean debug_load_indirect( struct debug_stream *stream,
+				      const char *name,
+				      GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   GLuint bits = (ptr[0] >> 8) & 0x3f;
+   GLuint i, j = 0;
+   
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+
+   for (i = 0; i < 6; i++) {
+      if (bits & (1<<i)) {
+	 switch (1<<(8+i)) {
+	 case LI0_STATE_STATIC_INDIRECT:
+	    PRINTF("        STATIC: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    PRINTF("                0x%08x\n", ptr[j++]);
+	    break;
+	 case LI0_STATE_DYNAMIC_INDIRECT:
+	    PRINTF("       DYNAMIC: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    break;
+	 case LI0_STATE_SAMPLER:
+	    PRINTF("       SAMPLER: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    PRINTF("                0x%08x\n", ptr[j++]);
+	    break;
+	 case LI0_STATE_MAP:
+	    PRINTF("           MAP: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    PRINTF("                0x%08x\n", ptr[j++]);
+	    break;
+	 case LI0_STATE_PROGRAM:
+	    PRINTF("       PROGRAM: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    PRINTF("                0x%08x\n", ptr[j++]);
+	    break;
+	 case LI0_STATE_CONSTANTS:
+	    PRINTF("     CONSTANTS: 0x%08x | %x\n", ptr[j]&~3, ptr[j]&3); j++;
+	    PRINTF("                0x%08x\n", ptr[j++]);
+	    break;
+	 default:
+	    assert(0);
+	    break;
+	 }
+      }
    }
 
-   fprintf(stderr, ", ");
-   print_src_reg(GET_SRC1_REG(program[1], program[2]));
-   if (args[opcode] == 2) { 
-      fprintf(stderr, "\n");
-      return;
+   if (bits == 0) {
+      PRINTF("\t  DUMMY: 0x%08x\n", ptr[j++]);
    }
 
-   fprintf(stderr, ", ");
-   print_src_reg(GET_SRC2_REG(program[2]));
-   fprintf(stderr, "\n");
-   return;
+   PRINTF("\n");
+
+
+   assert(j == len);
+
+   stream->offset += len * sizeof(GLuint);
+   
+   return GL_TRUE;
+}
+ 	
+static void BR13( struct debug_stream *stream,
+		  GLuint val )
+{
+   PRINTF("\t0x%08x\n",  val);
+   FLAG(val, 30, "clipping enable");
+   BITS(val, 25, 24, "color depth (3==32bpp)");
+   BITS(val, 23, 16, "raster op");
+   BITS(val, 15, 0,  "dest pitch");
 }
 
 
-static void print_tex_op( GLuint opcode, const GLuint *program )
+static void BR2223( struct debug_stream *stream,
+		    GLuint val22, GLuint val23 )
 {
-   print_dest_reg(program[0] | A0_DEST_CHANNEL_ALL);
-   fprintf(stderr, " = ");
+   union { GLuint val; short field[2]; } BR22, BR23;
 
-   fprintf(stderr, "%s ", opcodes[opcode]);
+   BR22.val = val22;
+   BR23.val = val23;
 
-   fprintf(stderr, "S[%d],", 
-	   program[0] & T0_SAMPLER_NR_MASK);
+   PRINTF("\t0x%08x\n",  val22);
+   BITS(val22, 31, 16, "dest y1");
+   BITS(val22, 15, 0,  "dest x1");
 
-   print_reg_type_nr( (program[1]>>T1_ADDRESS_REG_TYPE_SHIFT) & REG_TYPE_MASK,
-		      (program[1]>>T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK );
-   fprintf(stderr, "\n");
+   PRINTF("\t0x%08x\n",  val23);
+   BITS(val23, 31, 16, "dest y2");
+   BITS(val23, 15, 0,  "dest x2");
+
+   /* The blit engine may produce unexpected results when these aren't met */
+   assert(BR22.field[0] < BR23.field[0]);
+   assert(BR22.field[1] < BR23.field[1]);
 }
 
-static void print_dcl_op( GLuint opcode, const GLuint *program )
+static void BR09( struct debug_stream *stream,
+		  GLuint val )
 {
-   fprintf(stderr, "%s ", opcodes[opcode]);
-   print_dest_reg(program[0] | A0_DEST_CHANNEL_ALL);
-   fprintf(stderr, "\n");
+   PRINTF("\t0x%08x -- dest address\n",  val);
 }
 
+static void BR26( struct debug_stream *stream,
+		  GLuint val )
+{
+   PRINTF("\t0x%08x\n",  val);
+   BITS(val, 31, 16, "src y1");
+   BITS(val, 15, 0,  "src x1");
+}
+
+static void BR11( struct debug_stream *stream,
+		  GLuint val )
+{
+   PRINTF("\t0x%08x\n",  val);
+   BITS(val, 15, 0,  "src pitch");
+}
 
-void i915_disassemble_program( const GLuint *program, GLuint sz )
+static void BR12( struct debug_stream *stream,
+		  GLuint val )
 {
-   GLuint size = program[0] & 0x1ff;
-   GLint i;
+   PRINTF("\t0x%08x -- src address\n",  val);
+}
+
+static void BR16( struct debug_stream *stream,
+		  GLuint val )
+{
+   PRINTF("\t0x%08x -- color\n",  val);
+}
+   
+static GLboolean debug_copy_blit( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+   
+   BR13(stream, ptr[j++]);
+   BR2223(stream, ptr[j], ptr[j+1]);
+   j += 2;
+   BR09(stream, ptr[j++]);
+   BR26(stream, ptr[j++]);
+   BR11(stream, ptr[j++]);
+   BR12(stream, ptr[j++]);
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
+
+static GLboolean debug_color_blit( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+
+   BR13(stream, ptr[j++]);
+   BR2223(stream, ptr[j], ptr[j+1]);
+   j += 2;
+   BR09(stream, ptr[j++]);
+   BR16(stream, ptr[j++]);
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
+
+static GLboolean debug_modes4( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j]);
+   BITS(ptr[j], 21, 18, "logicop func");
+   FLAG(ptr[j], 17, "stencil test mask modify-enable");
+   FLAG(ptr[j], 16, "stencil write mask modify-enable");
+   BITS(ptr[j], 15, 8, "stencil test mask");
+   BITS(ptr[j], 7, 0,  "stencil write mask");
+   j++;
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
+
+static GLboolean debug_map_state( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+   
+   {
+      PRINTF("\t0x%08x\n",  ptr[j]);
+      BITS(ptr[j], 15, 0,   "map mask");
+      j++;
+   }
+
+   while (j < len) {
+      {
+	 PRINTF("\t  TMn.0: 0x%08x\n", ptr[j]);
+	 PRINTF("\t map address: 0x%08x\n", (ptr[j] & ~0x3));
+	 FLAG(ptr[j], 1, "vertical line stride");
+	 FLAG(ptr[j], 0, "vertical line stride offset");
+	 j++;
+      }
+
+      {
+	 PRINTF("\t  TMn.1: 0x%08x\n", ptr[j]);
+	 BITS(ptr[j], 31, 21, "height");
+	 BITS(ptr[j], 20, 10, "width");
+	 BITS(ptr[j], 9, 7, "surface format");
+	 BITS(ptr[j], 6, 3, "texel format");
+	 FLAG(ptr[j], 2, "use fence regs");
+	 FLAG(ptr[j], 1, "tiled surface");
+	 FLAG(ptr[j], 0, "tile walk ymajor");
+	 j++;
+      }
+      {
+	 PRINTF("\t  TMn.2: 0x%08x\n", ptr[j]);
+	 BITS(ptr[j], 31, 21, "dword pitch");
+	 BITS(ptr[j], 20, 15, "cube face enables");
+	 BITS(ptr[j], 14, 9, "max lod");
+	 FLAG(ptr[j], 8,     "mip layout right");
+	 BITS(ptr[j], 7, 0, "depth");
+	 j++;
+      }
+   }
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
+
+static GLboolean debug_sampler_state( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+   
+   {
+      PRINTF("\t0x%08x\n",  ptr[j]);
+      BITS(ptr[j], 15, 0,   "sampler mask");
+      j++;
+   }
+
+   while (j < len) {
+      {
+	 PRINTF("\t  TSn.0: 0x%08x\n", ptr[j]);
+	 FLAG(ptr[j], 31, "reverse gamma");
+	 FLAG(ptr[j], 30, "planar to packed");
+	 FLAG(ptr[j], 29, "yuv->rgb");
+	 BITS(ptr[j], 28, 27, "chromakey index");
+	 BITS(ptr[j], 26, 22, "base mip level");
+	 BITS(ptr[j], 21, 20, "mip mode filter");
+	 BITS(ptr[j], 19, 17, "mag mode filter");
+	 BITS(ptr[j], 16, 14, "min mode filter");
+	 BITS(ptr[j], 13, 5,  "lod bias (s4.4)");
+	 FLAG(ptr[j], 4,      "shadow enable");
+	 FLAG(ptr[j], 3,      "max-aniso-4");
+	 BITS(ptr[j], 2, 0,   "shadow func");
+	 j++;
+      }
+
+      {
+	 PRINTF("\t  TSn.1: 0x%08x\n", ptr[j]);
+	 BITS(ptr[j], 31, 24, "min lod");
+	 MBZ( ptr[j], 23, 18 );
+	 FLAG(ptr[j], 17,     "kill pixel enable");
+	 FLAG(ptr[j], 16,     "keyed tex filter mode");
+	 FLAG(ptr[j], 15,     "chromakey enable");
+	 BITS(ptr[j], 14, 12, "tcx wrap mode");
+	 BITS(ptr[j], 11, 9,  "tcy wrap mode");
+	 BITS(ptr[j], 8,  6,  "tcz wrap mode");
+	 FLAG(ptr[j], 5,      "normalized coords");
+	 BITS(ptr[j], 4,  1,  "map (surface) index");
+	 FLAG(ptr[j], 0,      "EAST deinterlacer enable");
+	 j++;
+      }
+      {
+	 PRINTF("\t  TSn.2: 0x%08x  (default color)\n", ptr[j]);
+	 j++;
+      }
+   }
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
+
+static GLboolean debug_dest_vars( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+
+   {
+      PRINTF("\t0x%08x\n",  ptr[j]);
+      FLAG(ptr[j], 31,     "early classic ztest");
+      FLAG(ptr[j], 30,     "opengl tex default color");
+      FLAG(ptr[j], 29,     "bypass iz");
+      FLAG(ptr[j], 28,     "lod preclamp");
+      BITS(ptr[j], 27, 26, "dither pattern");
+      FLAG(ptr[j], 25,     "linear gamma blend");
+      FLAG(ptr[j], 24,     "debug dither");
+      BITS(ptr[j], 23, 20, "dstorg x");
+      BITS(ptr[j], 19, 16, "dstorg y");
+      MBZ (ptr[j], 15, 15 );
+      BITS(ptr[j], 14, 12, "422 write select");
+      BITS(ptr[j], 11, 8,  "cbuf format");
+      BITS(ptr[j], 3, 2,   "zbuf format");
+      FLAG(ptr[j], 1,      "vert line stride");
+      FLAG(ptr[j], 1,      "vert line stride offset");
+      j++;
+   }
    
-   fprintf(stderr, "BEGIN\n");
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
 
-   if (size+2 != sz) {
-      fprintf(stderr, "%s: program size mismatch %d/%d\n", __FUNCTION__,
-	      size+2, sz);
-      exit(1);
+static GLboolean debug_buf_info( struct debug_stream *stream,
+				  const char *name,
+				  GLuint len )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   int j = 0;
+
+   PRINTF("%s (%d dwords):\n", name, len);
+   PRINTF("\t0x%08x\n",  ptr[j++]);
+
+   {
+      PRINTF("\t0x%08x\n",  ptr[j]);
+      BITS(ptr[j], 28, 28, "aux buffer id");
+      BITS(ptr[j], 27, 24, "buffer id (7=depth, 3=back)");
+      FLAG(ptr[j], 23,     "use fence regs");
+      FLAG(ptr[j], 22,     "tiled surface");
+      FLAG(ptr[j], 21,     "tile walk ymajor");
+      MBZ (ptr[j], 20, 14);
+      BITS(ptr[j], 13, 2,  "dword pitch");
+      MBZ (ptr[j], 2,  0);
+      j++;
    }
+   
+   PRINTF("\t0x%08x -- buffer base address\n",  ptr[j++]);
+
+   stream->offset += len * sizeof(GLuint);
+   assert(j == len);
+   return GL_TRUE;
+}
 
-   program ++;
-   for (i = 1 ; i < sz ; i+=3, program+=3) {
-      GLuint opcode = program[0] & (0x1f<<24);
-
-      if ((GLint) opcode >= A0_NOP && opcode <= A0_SLT)
-	 print_arith_op(opcode >> 24, program);
-      else if (opcode >= T0_TEXLD && opcode <= T0_TEXKILL)
-	 print_tex_op(opcode >> 24, program);
-      else if (opcode == D0_DCL)
-	 print_dcl_op(opcode >> 24, program);
-      else 
-	 fprintf(stderr, "Unknown opcode 0x%x\n", opcode);
+static GLboolean i915_debug_packet( struct debug_stream *stream )
+{
+   GLuint *ptr = (GLuint *)(stream->ptr + stream->offset);
+   GLuint cmd = *ptr;
+   
+   switch (((cmd >> 29) & 0x7)) {
+   case 0x0:
+      switch ((cmd >> 23) & 0x3f) {
+      case 0x0:
+	 return debug(stream, "MI_NOOP", 1);
+      case 0x3:
+	 return debug(stream, "MI_WAIT_FOR_EVENT", 1);
+      case 0x4:
+	 return debug(stream, "MI_FLUSH", 1);
+      case 0xA:
+	 debug(stream, "MI_BATCH_BUFFER_END", 1);
+	 return GL_FALSE;
+      case 0x22:
+	 return debug(stream, "MI_LOAD_REGISTER_IMM", 3);
+      case 0x31:
+	 return debug_chain(stream, "MI_BATCH_BUFFER_START", 2);
+      default:
+	 break;
+      }
+      break;
+   case 0x1:
+      break;
+   case 0x2:
+      switch ((cmd >> 22) & 0xff) {	 
+      case 0x50:
+	 return debug_color_blit(stream, "XY_COLOR_BLT", (cmd & 0xff) + 2);
+      case 0x53:
+	 return debug_copy_blit(stream, "XY_SRC_COPY_BLT", (cmd & 0xff) + 2);
+      default:
+	 return debug(stream, "blit command", (cmd & 0xff) + 2);
+      }
+      break;
+   case 0x3:
+      switch ((cmd >> 24) & 0x1f) {	 
+      case 0x6:
+	 return debug(stream, "3DSTATE_ANTI_ALIASING", 1);
+      case 0x7:
+	 return debug(stream, "3DSTATE_RASTERIZATION_RULES", 1);
+      case 0x8:
+	 return debug(stream, "3DSTATE_BACKFACE_STENCIL_OPS", 2);
+      case 0x9:
+	 return debug(stream, "3DSTATE_BACKFACE_STENCIL_MASKS", 1);
+      case 0xb:
+	 return debug(stream, "3DSTATE_INDEPENDENT_ALPHA_BLEND", 1);
+      case 0xc:
+	 return debug(stream, "3DSTATE_MODES5", 1);	 
+      case 0xd:
+	 return debug_modes4(stream, "3DSTATE_MODES4", 1);
+      case 0x15:
+	 return debug(stream, "3DSTATE_FOG_COLOR", 1);
+      case 0x16:
+	 return debug(stream, "3DSTATE_COORD_SET_BINDINGS", 1);
+      case 0x1c:
+	 /* 3DState16NP */
+	 switch((cmd >> 19) & 0x1f) {
+	 case 0x10:
+	    return debug(stream, "3DSTATE_SCISSOR_ENABLE", 1);
+	 case 0x11:
+	    return debug(stream, "3DSTATE_DEPTH_SUBRECTANGLE_DISABLE", 1);
+	 default:
+	    break;
+	 }
+	 break;
+      case 0x1d:
+	 /* 3DStateMW */
+	 switch ((cmd >> 16) & 0xff) {
+	 case 0x0:
+	    return debug_map_state(stream, "3DSTATE_MAP_STATE", (cmd & 0x1f) + 2);
+	 case 0x1:
+	    return debug_sampler_state(stream, "3DSTATE_SAMPLER_STATE", (cmd & 0x1f) + 2);
+	 case 0x4:
+	    return debug_load_immediate(stream, "3DSTATE_LOAD_STATE_IMMEDIATE", (cmd & 0xf) + 2);
+	 case 0x5:
+	    return debug_program(stream, "3DSTATE_PIXEL_SHADER_PROGRAM", (cmd & 0x1ff) + 2);
+	 case 0x6:
+	    return debug(stream, "3DSTATE_PIXEL_SHADER_CONSTANTS", (cmd & 0xff) + 2);
+	 case 0x7:
+	    return debug_load_indirect(stream, "3DSTATE_LOAD_INDIRECT", (cmd & 0xff) + 2);
+	 case 0x80:
+	    return debug(stream, "3DSTATE_DRAWING_RECTANGLE", (cmd & 0xffff) + 2);
+	 case 0x81:
+	    return debug(stream, "3DSTATE_SCISSOR_RECTANGLE", (cmd & 0xffff) + 2);
+	 case 0x83:
+	    return debug(stream, "3DSTATE_SPAN_STIPPLE", (cmd & 0xffff) + 2);
+	 case 0x85:
+	    return debug_dest_vars(stream, "3DSTATE_DEST_BUFFER_VARS", (cmd & 0xffff) + 2);
+	 case 0x88:
+	    return debug(stream, "3DSTATE_CONSTANT_BLEND_COLOR", (cmd & 0xffff) + 2);
+	 case 0x89:
+	    return debug(stream, "3DSTATE_FOG_MODE", (cmd & 0xffff) + 2);
+	 case 0x8e:
+	    return debug_buf_info(stream, "3DSTATE_BUFFER_INFO", (cmd & 0xffff) + 2);
+	 case 0x97:
+	    return debug(stream, "3DSTATE_DEPTH_OFFSET_SCALE", (cmd & 0xffff) + 2);
+	 case 0x98:
+	    return debug(stream, "3DSTATE_DEFAULT_Z", (cmd & 0xffff) + 2);
+	 case 0x99:
+	    return debug(stream, "3DSTATE_DEFAULT_DIFFUSE", (cmd & 0xffff) + 2);
+	 case 0x9a:
+	    return debug(stream, "3DSTATE_DEFAULT_SPECULAR", (cmd & 0xffff) + 2);
+	 case 0x9c:
+	    return debug(stream, "3DSTATE_CLEAR_PARAMETERS", (cmd & 0xffff) + 2);
+	 default:
+	    assert(0);
+	    return 0;
+	 }
+	 break;
+      case 0x1e:
+	 if (cmd & (1 << 23))
+	    return debug(stream, "???", (cmd & 0xffff) + 1);
+	 else
+	    return debug(stream, "", 1);
+	 break;
+      case 0x1f:
+	 if ((cmd & (1 << 23)) == 0)	
+	    return debug_prim(stream, "3DPRIM (inline)", 1, (cmd & 0x1ffff) + 2);
+	 else if (cmd & (1 << 17)) 
+	 {
+	    if ((cmd & 0xffff) == 0)
+	       return debug_variable_length_prim(stream);
+	    else
+	       return debug_prim(stream, "3DPRIM (indexed)", 0, (((cmd & 0xffff) + 1) / 2) + 1);
+	 }
+	 else
+	    return debug_prim(stream, "3DPRIM  (indirect sequential)", 0, 2); 
+	 break;
+      default:
+	 return debug(stream, "", 0);
+      }
+   default:
+      assert(0);
+      return 0;
+   }
+
+   assert(0);
+   return 0;
+}
+
+
+
+void
+i915_dump_batchbuffer( GLuint *start,
+		       GLuint *end )
+{
+   struct debug_stream stream;
+   GLuint bytes = (end - start) * 4;
+   GLboolean done = GL_FALSE;
+
+   PRINTF("\n\nBATCH: (%d)\n", bytes / 4);
+
+   stream.offset = 0;
+   stream.ptr = (char *)start;
+   stream.print_addresses = 0;
+
+   while (!done &&
+	  stream.offset < bytes &&
+	  stream.offset >= 0)
+   {
+      if (!i915_debug_packet( &stream ))
+	 break;
+
+      assert(stream.offset <= bytes &&
+	     stream.offset >= 0);
    }
 
-   fprintf(stderr, "END\n\n");
+   PRINTF("END-BATCH\n\n\n");
 }
+
+
diff --git a/src/mesa/drivers/dri/i965/intel_tex.h b/src/mesa/drivers/dri/i915/i915_debug.h
index e389d521461..0643a8c631c 100644
--- a/src/mesa/drivers/dri/i965/intel_tex.h
+++ b/src/mesa/drivers/dri/i915/i915_debug.h
@@ -1,8 +1,8 @@
 /**************************************************************************
  * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the
  * "Software"), to deal in the Software without restriction, including
@@ -25,18 +25,31 @@
  * 
  **************************************************************************/
 
-#ifndef INTELTEX_INC
-#define INTELTEX_INC
+/* Authors:  Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+#ifndef I915_DEBUG_H
+#define I915_DEBUG_H
+
+struct i915_context;
+
+struct debug_stream 
+{
+   unsigned offset;		/* current gtt offset */
+   char *ptr;		/* pointer to gtt offset zero */
+   char *end;		/* pointer to gtt offset zero */
+   unsigned print_addresses;
+};
 
-#include "mtypes.h"
-#include "intel_context.h"
 
 
-void intelInitTextureFuncs( struct dd_function_table *functions );
+extern void i915_disassemble_program(const unsigned *program, unsigned sz);
+extern void i915_print_ureg(const char *msg, unsigned ureg);
 
 
-GLuint intel_finalize_mipmap_tree( struct intel_context *intel,
-				   struct gl_texture_object *tObj );
+void
+i915_dump_batchbuffer( unsigned *start,
+		       unsigned *end );
 
 
 #endif
diff --git a/src/mesa/drivers/dri/i915/i915_debug_fp.c b/src/mesa/drivers/dri/i915/i915_debug_fp.c
new file mode 100644
index 00000000000..84347a01efe
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/i915_debug_fp.c
@@ -0,0 +1,333 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include <stdio.h>
+
+#include "i915_reg.h"
+#include "i915_debug.h"
+#include "main/imports.h"
+#include "shader/program.h"
+#include "shader/prog_instruction.h"
+#include "shader/prog_print.h"
+
+#define PRINTF( ... ) _mesa_printf( __VA_ARGS__ )
+
+static const char *opcodes[0x20] = {
+   "NOP",
+   "ADD",
+   "MOV",
+   "MUL",
+   "MAD",
+   "DP2ADD",
+   "DP3",
+   "DP4",
+   "FRC",
+   "RCP",
+   "RSQ",
+   "EXP",
+   "LOG",
+   "CMP",
+   "MIN",
+   "MAX",
+   "FLR",
+   "MOD",
+   "TRC",
+   "SGE",
+   "SLT",
+   "TEXLD",
+   "TEXLDP",
+   "TEXLDB",
+   "TEXKILL",
+   "DCL",
+   "0x1a",
+   "0x1b",
+   "0x1c",
+   "0x1d",
+   "0x1e",
+   "0x1f",
+};
+
+
+static const int args[0x20] = {
+   0,                           /* 0 nop */
+   2,                           /* 1 add */
+   1,                           /* 2 mov */
+   2,                           /* 3 m ul */
+   3,                           /* 4 mad */
+   3,                           /* 5 dp2add */
+   2,                           /* 6 dp3 */
+   2,                           /* 7 dp4 */
+   1,                           /* 8 frc */
+   1,                           /* 9 rcp */
+   1,                           /* a rsq */
+   1,                           /* b exp */
+   1,                           /* c log */
+   3,                           /* d cmp */
+   2,                           /* e min */
+   2,                           /* f max */
+   1,                           /* 10 flr */
+   1,                           /* 11 mod */
+   1,                           /* 12 trc */
+   2,                           /* 13 sge */
+   2,                           /* 14 slt */
+   1,
+   1,
+   1,
+   1,
+   0,
+   0,
+   0,
+   0,
+   0,
+   0,
+   0,
+};
+
+
+static const char *regname[0x8] = {
+   "R",
+   "T",
+   "CONST",
+   "S",
+   "OC",
+   "OD",
+   "U",
+   "UNKNOWN",
+};
+
+static void
+print_reg_type_nr(GLuint type, GLuint nr)
+{
+   switch (type) {
+   case REG_TYPE_T:
+      switch (nr) {
+      case T_DIFFUSE:
+         PRINTF("T_DIFFUSE");
+         return;
+      case T_SPECULAR:
+         PRINTF("T_SPECULAR");
+         return;
+      case T_FOG_W:
+         PRINTF("T_FOG_W");
+         return;
+      default:
+         PRINTF("T_TEX%d", nr);
+         return;
+      }
+   case REG_TYPE_OC:
+      if (nr == 0) {
+         PRINTF("oC");
+         return;
+      }
+      break;
+   case REG_TYPE_OD:
+      if (nr == 0) {
+         PRINTF("oD");
+         return;
+      }
+      break;
+   default:
+      break;
+   }
+
+   PRINTF("%s[%d]", regname[type], nr);
+}
+
+#define REG_SWIZZLE_MASK 0x7777
+#define REG_NEGATE_MASK 0x8888
+
+#define REG_SWIZZLE_XYZW ((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) |	\
+		      (SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) |	\
+		      (SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) |	\
+		      (SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
+
+
+static void
+print_reg_neg_swizzle(GLuint reg)
+{
+   int i;
+
+   if ((reg & REG_SWIZZLE_MASK) == REG_SWIZZLE_XYZW &&
+       (reg & REG_NEGATE_MASK) == 0)
+      return;
+
+   PRINTF(".");
+
+   for (i = 3; i >= 0; i--) {
+      if (reg & (1 << ((i * 4) + 3)))
+         PRINTF("-");
+
+      switch ((reg >> (i * 4)) & 0x7) {
+      case 0:
+         PRINTF("x");
+         break;
+      case 1:
+         PRINTF("y");
+         break;
+      case 2:
+         PRINTF("z");
+         break;
+      case 3:
+         PRINTF("w");
+         break;
+      case 4:
+         PRINTF("0");
+         break;
+      case 5:
+         PRINTF("1");
+         break;
+      default:
+         PRINTF("?");
+         break;
+      }
+   }
+}
+
+
+static void
+print_src_reg(GLuint dword)
+{
+   GLuint nr = (dword >> A2_SRC2_NR_SHIFT) & REG_NR_MASK;
+   GLuint type = (dword >> A2_SRC2_TYPE_SHIFT) & REG_TYPE_MASK;
+   print_reg_type_nr(type, nr);
+   print_reg_neg_swizzle(dword);
+}
+
+
+static void
+print_dest_reg(GLuint dword)
+{
+   GLuint nr = (dword >> A0_DEST_NR_SHIFT) & REG_NR_MASK;
+   GLuint type = (dword >> A0_DEST_TYPE_SHIFT) & REG_TYPE_MASK;
+   print_reg_type_nr(type, nr);
+   if ((dword & A0_DEST_CHANNEL_ALL) == A0_DEST_CHANNEL_ALL)
+      return;
+   PRINTF(".");
+   if (dword & A0_DEST_CHANNEL_X)
+      PRINTF("x");
+   if (dword & A0_DEST_CHANNEL_Y)
+      PRINTF("y");
+   if (dword & A0_DEST_CHANNEL_Z)
+      PRINTF("z");
+   if (dword & A0_DEST_CHANNEL_W)
+      PRINTF("w");
+}
+
+
+#define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
+#define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
+#define GET_SRC2_REG(r)      (r)
+
+
+static void
+print_arith_op(GLuint opcode, const GLuint * program)
+{
+   if (opcode != A0_NOP) {
+      print_dest_reg(program[0]);
+      if (program[0] & A0_DEST_SATURATE)
+         PRINTF(" = SATURATE ");
+      else
+         PRINTF(" = ");
+   }
+
+   PRINTF("%s ", opcodes[opcode]);
+
+   print_src_reg(GET_SRC0_REG(program[0], program[1]));
+   if (args[opcode] == 1) {
+      PRINTF("\n");
+      return;
+   }
+
+   PRINTF(", ");
+   print_src_reg(GET_SRC1_REG(program[1], program[2]));
+   if (args[opcode] == 2) {
+      PRINTF("\n");
+      return;
+   }
+
+   PRINTF(", ");
+   print_src_reg(GET_SRC2_REG(program[2]));
+   PRINTF("\n");
+   return;
+}
+
+
+static void
+print_tex_op(GLuint opcode, const GLuint * program)
+{
+   print_dest_reg(program[0] | A0_DEST_CHANNEL_ALL);
+   PRINTF(" = ");
+
+   PRINTF("%s ", opcodes[opcode]);
+
+   PRINTF("S[%d],", program[0] & T0_SAMPLER_NR_MASK);
+
+   print_reg_type_nr((program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) &
+                     REG_TYPE_MASK,
+                     (program[1] >> T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK);
+   PRINTF("\n");
+}
+
+static void
+print_dcl_op(GLuint opcode, const GLuint * program)
+{
+   PRINTF("%s ", opcodes[opcode]);
+   print_dest_reg(program[0] | A0_DEST_CHANNEL_ALL);
+   PRINTF("\n");
+}
+
+
+void
+i915_disassemble_program(const GLuint * program, GLuint sz)
+{
+   GLuint size = program[0] & 0x1ff;
+   GLint i;
+
+   PRINTF("\t\tBEGIN\n");
+
+   assert(size + 2 == sz);
+
+   program++;
+   for (i = 1; i < sz; i += 3, program += 3) {
+      GLuint opcode = program[0] & (0x1f << 24);
+
+      PRINTF("\t\t");
+
+      if ((GLint) opcode >= A0_NOP && opcode <= A0_SLT)
+         print_arith_op(opcode >> 24, program);
+      else if (opcode >= T0_TEXLD && opcode <= T0_TEXKILL)
+         print_tex_op(opcode >> 24, program);
+      else if (opcode == D0_DCL)
+         print_dcl_op(opcode >> 24, program);
+      else
+         PRINTF("Unknown opcode 0x%x\n", opcode);
+   }
+
+   PRINTF("\t\tEND\n\n");
+}
+
+
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 702b8788282..8bd761ec6a1 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -25,44 +25,60 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
+
+#include "shader/prog_instruction.h"
+#include "shader/prog_parameter.h"
+#include "shader/program.h"
+#include "shader/programopt.h"
 
 #include "tnl/tnl.h"
 #include "tnl/t_context.h"
+
 #include "intel_batchbuffer.h"
 
 #include "i915_reg.h"
 #include "i915_context.h"
 #include "i915_program.h"
 
-#include "prog_instruction.h"
-#include "prog_parameter.h"
-#include "program.h"
-#include "programopt.h"
-
-
+static const GLfloat sin_quad_constants[2][4] = {
+   {
+      2.0,
+      -1.0,
+      .5,
+      .75
+   },
+   {
+      4.0,
+      -4.0,
+      1.0 / (2.0 * M_PI),
+      .2225
+   }
+};
 
-/* 1, -1/3!, 1/5!, -1/7! */
-static const GLfloat sin_constants[4] = {  1.0, 
-					   -1.0/(3*2*1),
-					   1.0/(5*4*3*2*1),
-					   -1.0/(7*6*5*4*3*2*1) };
+static const GLfloat sin_constants[4] = { 1.0,
+   -1.0 / (3 * 2 * 1),
+   1.0 / (5 * 4 * 3 * 2 * 1),
+   -1.0 / (7 * 6 * 5 * 4 * 3 * 2 * 1)
+};
 
 /* 1, -1/2!, 1/4!, -1/6! */
-static const GLfloat cos_constants[4] = {  1.0, 
-					   -1.0/(2*1),
-					   1.0/(4*3*2*1),
-					   -1.0/(6*5*4*3*2*1) };
+static const GLfloat cos_constants[4] = { 1.0,
+   -1.0 / (2 * 1),
+   1.0 / (4 * 3 * 2 * 1),
+   -1.0 / (6 * 5 * 4 * 3 * 2 * 1)
+};
 
 /**
  * Retrieve a ureg for the given source register.  Will emit
  * constants, apply swizzling and negation as needed.
  */
-static GLuint src_vector( struct i915_fragment_program *p,
-			  const struct prog_src_register *source,
-			  const struct gl_fragment_program *program )
+static GLuint
+src_vector(struct i915_fragment_program *p,
+           const struct prog_src_register *source,
+           const struct gl_fragment_program *program)
 {
    GLuint src;
 
@@ -70,136 +86,152 @@ static GLuint src_vector( struct i915_fragment_program *p,
 
       /* Registers:
        */
-      case PROGRAM_TEMPORARY:
-	 if (source->Index >= I915_MAX_TEMPORARY) {
-	    i915_program_error( p, "Exceeded max temporary reg" );
-	    return 0;
-	 }
-	 src = UREG( REG_TYPE_R, source->Index );
+   case PROGRAM_TEMPORARY:
+      if (source->Index >= I915_MAX_TEMPORARY) {
+         i915_program_error(p, "Exceeded max temporary reg");
+         return 0;
+      }
+      src = UREG(REG_TYPE_R, source->Index);
+      break;
+   case PROGRAM_INPUT:
+      switch (source->Index) {
+      case FRAG_ATTRIB_WPOS:
+         src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
          break;
-      case PROGRAM_INPUT:
-	 switch (source->Index) {
-	 case FRAG_ATTRIB_WPOS:
-	    src = i915_emit_decl( p,  REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL ); 
-	    break;
-	 case FRAG_ATTRIB_COL0:
-	    src = i915_emit_decl( p,  REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL ); 
-	    break;
-	 case FRAG_ATTRIB_COL1:
-	    src = i915_emit_decl( p,  REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ ); 
-	    src = swizzle( src, X, Y, Z, ONE );
-	    break;
-	 case FRAG_ATTRIB_FOGC:
-	    src = i915_emit_decl( p,  REG_TYPE_T, T_FOG_W, D0_CHANNEL_W ); 
-	    src = swizzle( src, W, W, W, W );
-	    break;
-	 case FRAG_ATTRIB_TEX0:
-	 case FRAG_ATTRIB_TEX1:
-	 case FRAG_ATTRIB_TEX2:
-	 case FRAG_ATTRIB_TEX3:
-	 case FRAG_ATTRIB_TEX4:
-	 case FRAG_ATTRIB_TEX5:
-	 case FRAG_ATTRIB_TEX6:
-	 case FRAG_ATTRIB_TEX7:
-	    src = i915_emit_decl( p,  REG_TYPE_T, 
-				 T_TEX0 + (source->Index - FRAG_ATTRIB_TEX0),
-				 D0_CHANNEL_ALL ); 
-	    break;
-
-	 default:
-	    i915_program_error( p, "Bad source->Index" ); 
-	    return 0;
-	 }
+      case FRAG_ATTRIB_COL0:
+         src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
+         break;
+      case FRAG_ATTRIB_COL1:
+         src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
+         src = swizzle(src, X, Y, Z, ONE);
+         break;
+      case FRAG_ATTRIB_FOGC:
+         src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
+         src = swizzle(src, W, ZERO, ZERO, ONE);
+         break;
+      case FRAG_ATTRIB_TEX0:
+      case FRAG_ATTRIB_TEX1:
+      case FRAG_ATTRIB_TEX2:
+      case FRAG_ATTRIB_TEX3:
+      case FRAG_ATTRIB_TEX4:
+      case FRAG_ATTRIB_TEX5:
+      case FRAG_ATTRIB_TEX6:
+      case FRAG_ATTRIB_TEX7:
+         src = i915_emit_decl(p, REG_TYPE_T,
+                              T_TEX0 + (source->Index - FRAG_ATTRIB_TEX0),
+                              D0_CHANNEL_ALL);
          break;
-
-	 /* Various paramters and env values.  All emitted to
-	  * hardware as program constants.
-	  */
-      case PROGRAM_LOCAL_PARAM:
-         src = i915_emit_param4fv( 
-	    p, program->Base.LocalParams[source->Index]);
-	 break;
-
-      case PROGRAM_ENV_PARAM:
-         src = i915_emit_param4fv( 
-	    p, p->ctx->FragmentProgram.Parameters[source->Index]);
-	 break;
-
-      case PROGRAM_CONSTANT:
-      case PROGRAM_STATE_VAR:
-      case PROGRAM_NAMED_PARAM:
-         src = i915_emit_param4fv( 
-	    p, program->Base.Parameters->ParameterValues[source->Index] );
-	 break;
 
       default:
-	 i915_program_error( p, "Bad source->File" ); 
-	 return 0;
+         i915_program_error(p, "Bad source->Index");
+         return 0;
+      }
+      break;
+
+      /* Various paramters and env values.  All emitted to
+       * hardware as program constants.
+       */
+   case PROGRAM_LOCAL_PARAM:
+      src = i915_emit_param4fv(p, program->Base.LocalParams[source->Index]);
+      break;
+
+   case PROGRAM_ENV_PARAM:
+      src =
+         i915_emit_param4fv(p,
+                            p->ctx->FragmentProgram.Parameters[source->
+                                                               Index]);
+      break;
+
+   case PROGRAM_CONSTANT:
+   case PROGRAM_STATE_VAR:
+   case PROGRAM_NAMED_PARAM:
+      src =
+         i915_emit_param4fv(p,
+                            program->Base.Parameters->ParameterValues[source->
+                                                                      Index]);
+      break;
+
+   default:
+      i915_program_error(p, "Bad source->File");
+      return 0;
    }
 
-   src = swizzle(src, 
-		 GET_SWZ(source->Swizzle, 0),
-		 GET_SWZ(source->Swizzle, 1),
-		 GET_SWZ(source->Swizzle, 2),
-		 GET_SWZ(source->Swizzle, 3));
+   src = swizzle(src,
+                 GET_SWZ(source->Swizzle, 0),
+                 GET_SWZ(source->Swizzle, 1),
+                 GET_SWZ(source->Swizzle, 2), GET_SWZ(source->Swizzle, 3));
 
    if (source->NegateBase)
-      src = negate( src, 
-		    GET_BIT(source->NegateBase, 0),
-		    GET_BIT(source->NegateBase, 1),
-		    GET_BIT(source->NegateBase, 2),
-		    GET_BIT(source->NegateBase, 3));
+      src = negate(src,
+                   GET_BIT(source->NegateBase, 0),
+                   GET_BIT(source->NegateBase, 1),
+                   GET_BIT(source->NegateBase, 2),
+                   GET_BIT(source->NegateBase, 3));
 
    return src;
 }
 
 
-static GLuint get_result_vector( struct i915_fragment_program *p,
-				 const struct prog_instruction *inst )
+static GLuint
+get_result_vector(struct i915_fragment_program *p,
+                  const struct prog_instruction *inst)
 {
    switch (inst->DstReg.File) {
    case PROGRAM_OUTPUT:
       switch (inst->DstReg.Index) {
-      case FRAG_RESULT_COLR: 
-	 return UREG(REG_TYPE_OC, 0);
-      case FRAG_RESULT_DEPR: 
-	 p->depth_written = 1;
-	 return UREG(REG_TYPE_OD, 0);
-      default: 
-	 i915_program_error( p, "Bad inst->DstReg.Index" ); 
-	 return 0;
+      case FRAG_RESULT_COLR:
+         return UREG(REG_TYPE_OC, 0);
+      case FRAG_RESULT_DEPR:
+         p->depth_written = 1;
+         return UREG(REG_TYPE_OD, 0);
+      default:
+         i915_program_error(p, "Bad inst->DstReg.Index");
+         return 0;
       }
    case PROGRAM_TEMPORARY:
       return UREG(REG_TYPE_R, inst->DstReg.Index);
    default:
-      i915_program_error( p, "Bad inst->DstReg.File" ); 
+      i915_program_error(p, "Bad inst->DstReg.File");
       return 0;
    }
 }
-   
-static GLuint get_result_flags( const struct prog_instruction *inst )
+
+static GLuint
+get_result_flags(const struct prog_instruction *inst)
 {
    GLuint flags = 0;
 
-   if (inst->SaturateMode == SATURATE_ZERO_ONE) flags |= A0_DEST_SATURATE;
-   if (inst->DstReg.WriteMask & WRITEMASK_X) flags |= A0_DEST_CHANNEL_X;
-   if (inst->DstReg.WriteMask & WRITEMASK_Y) flags |= A0_DEST_CHANNEL_Y;
-   if (inst->DstReg.WriteMask & WRITEMASK_Z) flags |= A0_DEST_CHANNEL_Z;
-   if (inst->DstReg.WriteMask & WRITEMASK_W) flags |= A0_DEST_CHANNEL_W;
+   if (inst->SaturateMode == SATURATE_ZERO_ONE)
+      flags |= A0_DEST_SATURATE;
+   if (inst->DstReg.WriteMask & WRITEMASK_X)
+      flags |= A0_DEST_CHANNEL_X;
+   if (inst->DstReg.WriteMask & WRITEMASK_Y)
+      flags |= A0_DEST_CHANNEL_Y;
+   if (inst->DstReg.WriteMask & WRITEMASK_Z)
+      flags |= A0_DEST_CHANNEL_Z;
+   if (inst->DstReg.WriteMask & WRITEMASK_W)
+      flags |= A0_DEST_CHANNEL_W;
 
    return flags;
 }
 
-static GLuint translate_tex_src_target( struct i915_fragment_program *p,
-				     GLubyte bit )
+static GLuint
+translate_tex_src_target(struct i915_fragment_program *p, GLubyte bit)
 {
    switch (bit) {
-   case TEXTURE_1D_INDEX:   return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_2D_INDEX:   return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_RECT_INDEX: return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_3D_INDEX:   return D0_SAMPLE_TYPE_VOLUME;
-   case TEXTURE_CUBE_INDEX: return D0_SAMPLE_TYPE_CUBE;
-   default: i915_program_error(p, "TexSrcBit"); return 0;
+   case TEXTURE_1D_INDEX:
+      return D0_SAMPLE_TYPE_2D;
+   case TEXTURE_2D_INDEX:
+      return D0_SAMPLE_TYPE_2D;
+   case TEXTURE_RECT_INDEX:
+      return D0_SAMPLE_TYPE_2D;
+   case TEXTURE_3D_INDEX:
+      return D0_SAMPLE_TYPE_VOLUME;
+   case TEXTURE_CUBE_INDEX:
+      return D0_SAMPLE_TYPE_CUBE;
+   default:
+      i915_program_error(p, "TexSrcBit");
+      return 0;
    }
 }
 
@@ -211,7 +243,7 @@ do {								\
    GLuint coord = src_vector( p, &inst->SrcReg[0], program);	\
    /* Texel lookup */						\
 								\
-   i915_emit_texld( p,						\
+   i915_emit_texld( p, get_live_regs(p, inst),						\
 	       get_result_vector( p, inst ),			\
 	       get_result_flags( inst ),			\
 	       sampler,						\
@@ -234,6 +266,43 @@ do {									\
 #define EMIT_2ARG_ARITH( OP ) EMIT_ARITH( OP, 2 )
 #define EMIT_3ARG_ARITH( OP ) EMIT_ARITH( OP, 3 )
 
+/* 
+ * TODO: consider moving this into core 
+ */
+static void calc_live_regs( struct i915_fragment_program *p )
+{
+    const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
+    GLuint regsUsed = 0xffff0000;
+    GLint i;
+   
+    for (i = program->Base.NumInstructions - 1; i >= 0; i--) {
+        struct prog_instruction *inst = &program->Base.Instructions[i];
+        int opArgs = _mesa_num_inst_src_regs(inst->Opcode);
+        int a;
+
+        /* Register is written to: unmark as live for this and preceeding ops */ 
+        if (inst->DstReg.File == PROGRAM_TEMPORARY)
+            regsUsed &= ~(1 << inst->DstReg.Index);
+
+        for (a = 0; a < opArgs; a++) {
+            /* Register is read from: mark as live for this and preceeding ops */ 
+            if (inst->SrcReg[a].File == PROGRAM_TEMPORARY)
+                regsUsed |= 1 << inst->SrcReg[a].Index;
+        }
+
+        p->usedRegs[i] = regsUsed;
+    }
+}
+
+static GLuint get_live_regs( struct i915_fragment_program *p, 
+                             const struct prog_instruction *inst )
+{
+    const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
+    GLuint nr = inst - program->Base.Instructions;
+
+    return p->usedRegs[nr];
+}
+ 
 
 /* Possible concerns:
  *
@@ -246,9 +315,11 @@ do {									\
  * can lead to confusion -- hopefully we cope with it ok now.
  *
  */
-static void upload_program( struct i915_fragment_program *p )
+static void
+upload_program(struct i915_fragment_program *p)
 {
-   const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
+   const struct gl_fragment_program *program =
+      p->ctx->FragmentProgram._Current;
    const struct prog_instruction *inst = program->Base.Instructions;
 
 /*    _mesa_debug_fp_inst(program->Base.NumInstructions, inst); */
@@ -258,510 +329,551 @@ static void upload_program( struct i915_fragment_program *p )
     * this being uploaded to hardware.
     */
    if (inst[0].Opcode == OPCODE_END) {
-      GLuint tmp = i915_get_utemp( p );
-      i915_emit_arith( p,
-		      A0_MOV,
-		      UREG(REG_TYPE_OC, 0), 
-		      A0_DEST_CHANNEL_ALL, 0,
-		      swizzle(tmp,ONE,ZERO,ONE,ONE), 0, 0);
+      GLuint tmp = i915_get_utemp(p);
+      i915_emit_arith(p,
+                      A0_MOV,
+                      UREG(REG_TYPE_OC, 0),
+                      A0_DEST_CHANNEL_ALL, 0,
+                      swizzle(tmp, ONE, ZERO, ONE, ONE), 0, 0);
       return;
    }
 
+   if (program->Base.NumInstructions > I915_MAX_INSN) {
+       i915_program_error( p, "Exceeded max instructions" );
+       return;
+    }
+
+   /* Not always needed:
+    */
+   calc_live_regs(p);
+
    while (1) {
       GLuint src0, src1, src2, flags;
-      GLuint tmp = 0;
+      GLuint tmp = 0, consts0 = 0, consts1 = 0;
 
       switch (inst->Opcode) {
-      case OPCODE_ABS: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 i915_emit_arith( p, 
-			 A0_MAX,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 src0, negate(src0, 1,1,1,1), 0);
-	 break;
-
-      case OPCODE_ADD: 
-	 EMIT_2ARG_ARITH( A0_ADD );
-	 break;
-
-      case OPCODE_CMP: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-	 src2 = src_vector( p, &inst->SrcReg[2], program);
-	 i915_emit_arith( p, 
-			 A0_CMP,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 src0, src2, src1);	/* NOTE: order of src2, src1 */
-	 break;
+      case OPCODE_ABS:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         i915_emit_arith(p,
+                         A0_MAX,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         src0, negate(src0, 1, 1, 1, 1), 0);
+         break;
 
-      case OPCODE_COS:
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 tmp = i915_get_utemp( p );
+      case OPCODE_ADD:
+         EMIT_2ARG_ARITH(A0_ADD);
+         break;
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 src0, 
-			 i915_emit_const1f(p, 1.0/(M_PI * 2)),
-			 0);
+      case OPCODE_CMP:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+         src2 = src_vector(p, &inst->SrcReg[2], program);
+         i915_emit_arith(p, A0_CMP, get_result_vector(p, inst), get_result_flags(inst), 0, src0, src2, src1);   /* NOTE: order of src2, src1 */
+         break;
 
-	 i915_emit_arith( p, 
-			 A0_MOD,
+      case OPCODE_COS:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         tmp = i915_get_utemp(p);
+	 consts0 = i915_emit_const4fv(p, sin_quad_constants[0]);
+	 consts1 = i915_emit_const4fv(p, sin_quad_constants[1]);
+
+	 /* Reduce range from repeating about [-pi,pi] to [-1,1] */
+         i915_emit_arith(p,
+                         A0_MAD,
+                         tmp, A0_DEST_CHANNEL_X, 0,
+                         src0,
+			 swizzle(consts1, Z, ZERO, ZERO, ZERO), /* 1/(2pi) */
+			 swizzle(consts0, W, ZERO, ZERO, ZERO)); /* .75 */
+
+         i915_emit_arith(p, A0_FRC, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
+
+	 i915_emit_arith(p,
+			 A0_MAD,
 			 tmp, A0_DEST_CHANNEL_X, 0,
-			 tmp, 
-			 0, 0 );
+			 tmp,
+			 swizzle(consts0, X, ZERO, ZERO, ZERO), /* 2 */
+			 swizzle(consts0, Y, ZERO, ZERO, ZERO)); /* -1 */
 
-	 /* By choosing different taylor constants, could get rid of this mul:
+	 /* Compute COS with the same calculation used for SIN, but a
+	  * different source range has been mapped to [-1,1] this time.
 	  */
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 tmp, 
-			 i915_emit_const1f(p, (M_PI * 2)),
+
+	 /* tmp.y = abs(tmp.x); {x, abs(x), 0, 0} */
+	 i915_emit_arith(p,
+                         A0_MAX,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0),
 			 0);
 
-	 /* 
-	  * t0.xy = MUL x.xx11, x.x1111  ; x^2, x, 1, 1
-	  * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
-	  * t0 = MUL t0.xxz1 t0.z111    ; x^6 x^4 x^2 1
-	  * result = DP4 t0, cos_constants
-	  */
-	 i915_emit_arith( p, 
+	 /* tmp.y = tmp.y * tmp.x; {x, x * abs(x), 0, 0} */
+	 i915_emit_arith(p,
 			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_XY, 0,
-			 swizzle(tmp, X,X,ONE,ONE), 
-			 swizzle(tmp, X,ONE,ONE,ONE), 0);
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 tmp,
+			 0);
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_XYZ, 0,
-			 swizzle(tmp, X,Y,X,ONE), 
-			 swizzle(tmp, X,X,ONE,ONE), 0);
+	 /* tmp.x = tmp.xy DP sin_quad_constants[2].xy */
+         i915_emit_arith(p,
+                         A0_DP3,
+                         tmp, A0_DEST_CHANNEL_X, 0,
+			 tmp,
+                         swizzle(consts1, X, Y, ZERO, ZERO),
+			 0);
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_XYZ, 0,
-			 swizzle(tmp, X,X,Z,ONE), 
-			 swizzle(tmp, Z,ONE,ONE,ONE), 0);
-	    
-	 i915_emit_arith( p, 
-			 A0_DP4,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(tmp, ONE,Z,Y,X),
-			 i915_emit_const4fv( p, cos_constants ), 0);
-
-	 break;
-
-      case OPCODE_DP3: 
-	 EMIT_2ARG_ARITH( A0_DP3 );
-	 break;
-
-      case OPCODE_DP4: 
-	 EMIT_2ARG_ARITH( A0_DP4 );
-	 break;
-
-      case OPCODE_DPH:  
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-
-	 i915_emit_arith( p, 
-			 A0_DP4,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0, X,Y,Z,ONE), src1, 0);
-	 break;
-
-      case OPCODE_DST: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-
-	 /* result[0] = 1    * 1;
-	  * result[1] = a[1] * b[1];
-	  * result[2] = a[2] * 1;
-	  * result[3] = 1    * b[3];
+	 /* tmp.x now contains a first approximation (y).  Now, weight it
+	  * against tmp.y**2 to get closer.
 	  */
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0, ONE, Y, Z,   ONE), 
-			 swizzle(src1, ONE, Y, ONE, W  ),
+	 i915_emit_arith(p,
+                         A0_MAX,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0),
 			 0);
-	 break;
 
-      case OPCODE_EX2: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
+	 /* tmp.y = tmp.x * tmp.y - tmp.x; {y, y * abs(y) - y, 0, 0} */
+	 i915_emit_arith(p,
+			 A0_MAD,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 swizzle(tmp, ZERO, Y, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0));
+
+	 /* result = .2225 * tmp.y + tmp.x =.2225(y * abs(y) - y) + y= */
+	 i915_emit_arith(p,
+			 A0_MAD,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+			 swizzle(consts1, W, W, W, W),
+			 swizzle(tmp, Y, Y, Y, Y),
+			 swizzle(tmp, X, X, X, X));
+         break;
+
+      case OPCODE_DP3:
+         EMIT_2ARG_ARITH(A0_DP3);
+         break;
+
+      case OPCODE_DP4:
+         EMIT_2ARG_ARITH(A0_DP4);
+         break;
+
+      case OPCODE_DPH:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
 
-	 i915_emit_arith( p, 
-			 A0_EXP,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0,X,X,X,X), 0, 0);
-	 break;
+         i915_emit_arith(p,
+                         A0_DP4,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, X, Y, Z, ONE), src1, 0);
+         break;
+
+      case OPCODE_DST:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+
+         /* result[0] = 1    * 1;
+          * result[1] = a[1] * b[1];
+          * result[2] = a[2] * 1;
+          * result[3] = 1    * b[3];
+          */
+         i915_emit_arith(p,
+                         A0_MUL,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, ONE, Y, Z, ONE),
+                         swizzle(src1, ONE, Y, ONE, W), 0);
+         break;
 
-      case OPCODE_FLR: 
-	 EMIT_1ARG_ARITH( A0_FLR );
-	 break;
+      case OPCODE_EX2:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
 
-      case OPCODE_FRC: 
-	 EMIT_1ARG_ARITH( A0_FRC );
-	 break;
+         i915_emit_arith(p,
+                         A0_EXP,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, X, X, X, X), 0, 0);
+         break;
+
+      case OPCODE_FLR:
+         EMIT_1ARG_ARITH(A0_FLR);
+         break;
+
+      case OPCODE_FRC:
+         EMIT_1ARG_ARITH(A0_FRC);
+         break;
 
       case OPCODE_KIL:
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 tmp = i915_get_utemp( p );
-
-	 i915_emit_texld( p,
-			 tmp, A0_DEST_CHANNEL_ALL, /* use a dummy dest reg */
-			 0,
-			 src0,
-			 T0_TEXKILL );
-	 break;
-
-      case OPCODE_LG2: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-
-	 i915_emit_arith( p, 
-			 A0_LOG,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0,X,X,X,X), 0, 0);
-	 break;
-
-      case OPCODE_LIT: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 tmp = i915_get_utemp( p );
-
-	 /* tmp = max( a.xyzw, a.00zw )
-	  * XXX: Clamp tmp.w to -128..128
-	  * tmp.y = log(tmp.y)
-	  * tmp.y = tmp.w * tmp.y
-	  * tmp.y = exp(tmp.y)
-	  * result = cmp (a.11-x1, a.1x01, a.1xy1 )
-	  */
-	 i915_emit_arith( p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0, 
-			 src0, swizzle(src0, ZERO, ZERO, Z, W), 0 );
-
-	 i915_emit_arith( p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0, 
-			 swizzle(tmp, Y, Y, Y, Y), 0, 0 );
-
-	 i915_emit_arith( p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0, 
-			 swizzle(tmp, ZERO, Y, ZERO, ZERO), 
-			 swizzle(tmp, ZERO, W, ZERO, ZERO), 0 );
-
-	 i915_emit_arith( p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0, 
-			 swizzle(tmp, Y, Y, Y, Y), 0, 0 );
-
-	 i915_emit_arith( p, A0_CMP,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 negate(swizzle(tmp, ONE, ONE, X, ONE),0,0,1,0),
-			 swizzle(tmp, ONE, X, ZERO, ONE),
-			 swizzle(tmp, ONE, X, Y, ONE));
-		     
-	 break;
-
-      case OPCODE_LRP: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-	 src2 = src_vector( p, &inst->SrcReg[2], program);
-	 flags = get_result_flags( inst );
-	 tmp = i915_get_utemp( p );
-
-	 /* b*a + c*(1-a)
-	  *
-	  * b*a + c - ca 
-	  *
-	  * tmp = b*a + c, 
-	  * result = (-c)*a + tmp 
-	  */
-	 i915_emit_arith( p, A0_MAD, tmp, 
-			 flags & A0_DEST_CHANNEL_ALL, 0,
-			 src1, src0, src2 );
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         tmp = i915_get_utemp(p);
+
+         i915_emit_texld(p, get_live_regs(p, inst),
+                         tmp, A0_DEST_CHANNEL_ALL,   /* use a dummy dest reg */
+                         0, src0, T0_TEXKILL);
+         break;
+
+      case OPCODE_LG2:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+
+         i915_emit_arith(p,
+                         A0_LOG,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, X, X, X, X), 0, 0);
+         break;
+
+      case OPCODE_LIT:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         tmp = i915_get_utemp(p);
+
+         /* tmp = max( a.xyzw, a.00zw )
+          * XXX: Clamp tmp.w to -128..128
+          * tmp.y = log(tmp.y)
+          * tmp.y = tmp.w * tmp.y
+          * tmp.y = exp(tmp.y)
+          * result = cmp (a.11-x1, a.1x01, a.1xy1 )
+          */
+         i915_emit_arith(p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0,
+                         src0, swizzle(src0, ZERO, ZERO, Z, W), 0);
+
+         i915_emit_arith(p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0,
+                         swizzle(tmp, Y, Y, Y, Y), 0, 0);
+
+         i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0,
+                         swizzle(tmp, ZERO, Y, ZERO, ZERO),
+                         swizzle(tmp, ZERO, W, ZERO, ZERO), 0);
+
+         i915_emit_arith(p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0,
+                         swizzle(tmp, Y, Y, Y, Y), 0, 0);
+
+         i915_emit_arith(p, A0_CMP,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
+                         swizzle(tmp, ONE, X, ZERO, ONE),
+                         swizzle(tmp, ONE, X, Y, ONE));
 
-	 i915_emit_arith( p, A0_MAD, 
-			 get_result_vector( p, inst ), 
-			 flags, 0, 
-			 negate(src2, 1,1,1,1), src0, tmp );
-	 break;
+         break;
+
+      case OPCODE_LRP:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+         src2 = src_vector(p, &inst->SrcReg[2], program);
+         flags = get_result_flags(inst);
+         tmp = i915_get_utemp(p);
+
+         /* b*a + c*(1-a)
+          *
+          * b*a + c - ca 
+          *
+          * tmp = b*a + c, 
+          * result = (-c)*a + tmp 
+          */
+         i915_emit_arith(p, A0_MAD, tmp,
+                         flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
+
+         i915_emit_arith(p, A0_MAD,
+                         get_result_vector(p, inst),
+                         flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
+         break;
 
       case OPCODE_MAD:
-	 EMIT_3ARG_ARITH( A0_MAD );
-	 break;
+         EMIT_3ARG_ARITH(A0_MAD);
+         break;
 
       case OPCODE_MAX:
-	 EMIT_2ARG_ARITH( A0_MAX );
-	 break;
-
-      case OPCODE_MIN: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-	 tmp = i915_get_utemp( p );
-	 flags = get_result_flags( inst );
-
-	 i915_emit_arith( p, 
-			 A0_MAX,
-			 tmp, flags & A0_DEST_CHANNEL_ALL, 0,
-			 negate(src0,1,1,1,1), 
-			 negate(src1,1,1,1,1), 0);
-
-	 i915_emit_arith( p,
-			 A0_MOV,
-			 get_result_vector( p, inst ), 
-			 flags, 0,
-			 negate(tmp, 1,1,1,1), 0, 0);
-	 break;
-
-      case OPCODE_MOV: 
-	 EMIT_1ARG_ARITH( A0_MOV );
-	 break;
-
-      case OPCODE_MUL: 
-	 EMIT_2ARG_ARITH( A0_MUL );
-	 break;
-
-      case OPCODE_POW: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-	 tmp = i915_get_utemp( p );
-	 flags = get_result_flags( inst );
-
-	 /* XXX: masking on intermediate values, here and elsewhere.
-	  */
-	 i915_emit_arith( p, 
-			 A0_LOG,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 swizzle(src0,X,X,X,X), 0, 0);
+         EMIT_2ARG_ARITH(A0_MAX);
+         break;
 
-	 i915_emit_arith( p,
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 tmp, src1, 0);
+      case OPCODE_MIN:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+         tmp = i915_get_utemp(p);
+         flags = get_result_flags(inst);
+
+         i915_emit_arith(p,
+                         A0_MAX,
+                         tmp, flags & A0_DEST_CHANNEL_ALL, 0,
+                         negate(src0, 1, 1, 1, 1),
+                         negate(src1, 1, 1, 1, 1), 0);
+
+         i915_emit_arith(p,
+                         A0_MOV,
+                         get_result_vector(p, inst),
+                         flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
+         break;
 
+      case OPCODE_MOV:
+         EMIT_1ARG_ARITH(A0_MOV);
+         break;
 
-	 i915_emit_arith( p,
-			 A0_EXP,
-			 get_result_vector( p, inst ), 
-			 flags, 0,
-			 swizzle(tmp,X,X,X,X), 0, 0);
+      case OPCODE_MUL:
+         EMIT_2ARG_ARITH(A0_MUL);
+         break;
 
-	 break;
+      case OPCODE_POW:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+         tmp = i915_get_utemp(p);
+         flags = get_result_flags(inst);
 
-      case OPCODE_RCP: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
+         /* XXX: masking on intermediate values, here and elsewhere.
+          */
+         i915_emit_arith(p,
+                         A0_LOG,
+                         tmp, A0_DEST_CHANNEL_X, 0,
+                         swizzle(src0, X, X, X, X), 0, 0);
 
-	 i915_emit_arith( p, 
-			 A0_RCP,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0,X,X,X,X), 0, 0);
-	 break;
+         i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_X, 0, tmp, src1, 0);
 
-      case OPCODE_RSQ: 
 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
+         i915_emit_arith(p,
+                         A0_EXP,
+                         get_result_vector(p, inst),
+                         flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
+
+         break;
+
+      case OPCODE_RCP:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+
+         i915_emit_arith(p,
+                         A0_RCP,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, X, X, X, X), 0, 0);
+         break;
+
+      case OPCODE_RSQ:
+
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+
+         i915_emit_arith(p,
+                         A0_RSQ,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, X, X, X, X), 0, 0);
+         break;
 
-	 i915_emit_arith( p, 
-			 A0_RSQ,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0,X,X,X,X), 0, 0);
-	 break;
-	 
       case OPCODE_SCS:
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 tmp = i915_get_utemp( p );
-
-	 /* 
-	  * t0.xy = MUL x.xx11, x.x1111  ; x^2, x, 1, 1
-	  * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
-	  * t1 = MUL t0.xyyw t0.yz11    ; x^7 x^5 x^3 x
-	  * scs.x = DP4 t1, sin_constants
-	  * t1 = MUL t0.xxz1 t0.z111    ; x^6 x^4 x^2 1
-	  * scs.y = DP4 t1, cos_constants
-	  */
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_XY, 0,
-			 swizzle(src0, X,X,ONE,ONE), 
-			 swizzle(src0, X,ONE,ONE,ONE), 0);
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         tmp = i915_get_utemp(p);
+
+         /* 
+          * t0.xy = MUL x.xx11, x.x1111  ; x^2, x, 1, 1
+          * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
+          * t1 = MUL t0.xyyw t0.yz11    ; x^7 x^5 x^3 x
+          * scs.x = DP4 t1, sin_constants
+          * t1 = MUL t0.xxz1 t0.z111    ; x^6 x^4 x^2 1
+          * scs.y = DP4 t1, cos_constants
+          */
+         i915_emit_arith(p,
+                         A0_MUL,
+                         tmp, A0_DEST_CHANNEL_XY, 0,
+                         swizzle(src0, X, X, ONE, ONE),
+                         swizzle(src0, X, ONE, ONE, ONE), 0);
+
+         i915_emit_arith(p,
+                         A0_MUL,
+                         tmp, A0_DEST_CHANNEL_ALL, 0,
+                         swizzle(tmp, X, Y, X, Y),
+                         swizzle(tmp, X, X, ONE, ONE), 0);
+
+         if (inst->DstReg.WriteMask & WRITEMASK_Y) {
+            GLuint tmp1;
+
+            if (inst->DstReg.WriteMask & WRITEMASK_X)
+               tmp1 = i915_get_utemp(p);
+            else
+               tmp1 = tmp;
+
+            i915_emit_arith(p,
+                            A0_MUL,
+                            tmp1, A0_DEST_CHANNEL_ALL, 0,
+                            swizzle(tmp, X, Y, Y, W),
+                            swizzle(tmp, X, Z, ONE, ONE), 0);
+
+            i915_emit_arith(p,
+                            A0_DP4,
+                            get_result_vector(p, inst),
+                            A0_DEST_CHANNEL_Y, 0,
+                            swizzle(tmp1, W, Z, Y, X),
+                            i915_emit_const4fv(p, sin_constants), 0);
+         }
+
+         if (inst->DstReg.WriteMask & WRITEMASK_X) {
+            i915_emit_arith(p,
+                            A0_MUL,
+                            tmp, A0_DEST_CHANNEL_XYZ, 0,
+                            swizzle(tmp, X, X, Z, ONE),
+                            swizzle(tmp, Z, ONE, ONE, ONE), 0);
+
+            i915_emit_arith(p,
+                            A0_DP4,
+                            get_result_vector(p, inst),
+                            A0_DEST_CHANNEL_X, 0,
+                            swizzle(tmp, ONE, Z, Y, X),
+                            i915_emit_const4fv(p, cos_constants), 0);
+         }
+         break;
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_ALL, 0,
-			 swizzle(tmp, X,Y,X,Y), 
-			 swizzle(tmp, X,X,ONE,ONE), 0);
-
-	 if (inst->DstReg.WriteMask & WRITEMASK_Y) {
-	    GLuint tmp1;
-	    
-	    if (inst->DstReg.WriteMask & WRITEMASK_X)
-	       tmp1 = i915_get_utemp( p );
-	    else
-	       tmp1 = tmp;
-
-	    i915_emit_arith( p, 
-			    A0_MUL,
-			    tmp1, A0_DEST_CHANNEL_ALL, 0,
-			    swizzle(tmp, X,Y,Y,W), 
-			    swizzle(tmp, X,Z,ONE,ONE), 0);
-	    
-	    i915_emit_arith( p, 
-			    A0_DP4,
-			    get_result_vector( p, inst ), 
-			    A0_DEST_CHANNEL_Y, 0,
-			    swizzle(tmp1, W,Z,Y,X),
-			    i915_emit_const4fv( p, sin_constants ), 0);
-	 }
-
-	 if (inst->DstReg.WriteMask & WRITEMASK_X) {
-	    i915_emit_arith( p, 
-			    A0_MUL,
-			    tmp, A0_DEST_CHANNEL_XYZ, 0,
-			    swizzle(tmp, X,X,Z,ONE), 
-			    swizzle(tmp, Z,ONE,ONE,ONE), 0);
-	    
-	    i915_emit_arith( p, 
-			    A0_DP4,
-			    get_result_vector( p, inst ), 
-			    A0_DEST_CHANNEL_X, 0,
-			    swizzle(tmp, ONE,Z,Y,X), 
-			    i915_emit_const4fv( p, cos_constants ), 0);
-	 }
-	 break;
-
-      case OPCODE_SGE: 
-	 EMIT_2ARG_ARITH( A0_SGE );
-	 break;
+      case OPCODE_SGE:
+         EMIT_2ARG_ARITH(A0_SGE);
+         break;
 
       case OPCODE_SIN:
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 tmp = i915_get_utemp( p );
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         tmp = i915_get_utemp(p);
+	 consts0 = i915_emit_const4fv(p, sin_quad_constants[0]);
+	 consts1 = i915_emit_const4fv(p, sin_quad_constants[1]);
+
+	 /* Reduce range from repeating about [-pi,pi] to [-1,1] */
+         i915_emit_arith(p,
+                         A0_MAD,
+                         tmp, A0_DEST_CHANNEL_X, 0,
+                         src0,
+			 swizzle(consts1, Z, ZERO, ZERO, ZERO), /* 1/(2pi) */
+			 swizzle(consts0, Z, ZERO, ZERO, ZERO)); /* .5 */
+
+         i915_emit_arith(p, A0_FRC, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
+
+	 i915_emit_arith(p,
+			 A0_MAD,
+			 tmp, A0_DEST_CHANNEL_X, 0,
+			 tmp,
+			 swizzle(consts0, X, ZERO, ZERO, ZERO), /* 2 */
+			 swizzle(consts0, Y, ZERO, ZERO, ZERO)); /* -1 */
 
-	 i915_emit_arith( p, 
+	 /* Compute sin using a quadratic and quartic.  It gives continuity
+	  * that repeating the Taylor series lacks every 2*pi, and has
+	  * reduced error.
+	  *
+	  * The idea was described at:
+	  * http://www.devmaster.net/forums/showthread.php?t=5784
+	  */
+
+	 /* tmp.y = abs(tmp.x); {x, abs(x), 0, 0} */
+	 i915_emit_arith(p,
+                         A0_MAX,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0),
+			 0);
+
+	 /* tmp.y = tmp.y * tmp.x; {x, x * abs(x), 0, 0} */
+	 i915_emit_arith(p,
 			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 src0, 
-			 i915_emit_const1f(p, 1.0/(M_PI * 2)),
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 tmp,
 			 0);
 
-	 i915_emit_arith( p, 
-			 A0_MOD,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 tmp, 
-			 0, 0 );
+	 /* tmp.x = tmp.xy DP sin_quad_constants[2].xy */
+         i915_emit_arith(p,
+                         A0_DP3,
+                         tmp, A0_DEST_CHANNEL_X, 0,
+			 tmp,
+                         swizzle(consts1, X, Y, ZERO, ZERO),
+			 0);
 
-	 /* By choosing different taylor constants, could get rid of this mul:
+	 /* tmp.x now contains a first approximation (y).  Now, weight it
+	  * against tmp.y**2 to get closer.
 	  */
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_X, 0,
-			 tmp, 
-			 i915_emit_const1f(p, (M_PI * 2)),
+	 i915_emit_arith(p,
+                         A0_MAX,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0),
 			 0);
 
-	 /* 
-	  * t0.xy = MUL x.xx11, x.x1111  ; x^2, x, 1, 1
-	  * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
-	  * t1 = MUL t0.xyyw t0.yz11    ; x^7 x^5 x^3 x
-	  * result = DP4 t1.wzyx, sin_constants
-	  */
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_XY, 0,
-			 swizzle(tmp, X,X,ONE,ONE), 
-			 swizzle(tmp, X,ONE,ONE,ONE), 0);
+	 /* tmp.y = tmp.x * tmp.y - tmp.x; {y, y * abs(y) - y, 0, 0} */
+	 i915_emit_arith(p,
+			 A0_MAD,
+			 tmp, A0_DEST_CHANNEL_Y, 0,
+			 swizzle(tmp, ZERO, X, ZERO, ZERO),
+			 swizzle(tmp, ZERO, Y, ZERO, ZERO),
+			 negate(swizzle(tmp, ZERO, X, ZERO, ZERO), 0, 1, 0, 0));
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_ALL, 0,
-			 swizzle(tmp, X,Y,X,Y), 
-			 swizzle(tmp, X,X,ONE,ONE), 0);
+	 /* result = .2225 * tmp.y + tmp.x =.2225(y * abs(y) - y) + y= */
+	 i915_emit_arith(p,
+			 A0_MAD,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+			 swizzle(consts1, W, W, W, W),
+			 swizzle(tmp, Y, Y, Y, Y),
+			 swizzle(tmp, X, X, X, X));
 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_ALL, 0,
-			 swizzle(tmp, X,Y,Y,W), 
-			 swizzle(tmp, X,Z,ONE,ONE), 0);
-	    
-	 i915_emit_arith( p, 
-			 A0_DP4,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(tmp, W, Z, Y, X ),
-			 i915_emit_const4fv( p, sin_constants ), 0);
-	 break;
-
-      case OPCODE_SLT: 
-	 EMIT_2ARG_ARITH( A0_SLT );
-	 break;
-
-      case OPCODE_SUB: 
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-
-	 i915_emit_arith( p, 
-			 A0_ADD,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 src0, negate(src1, 1,1,1,1), 0);
-	 break;
-
-      case OPCODE_SWZ: 
-	 EMIT_1ARG_ARITH( A0_MOV ); /* extended swizzle handled natively */
-	 break;
-
-      case OPCODE_TEX: 
-	 EMIT_TEX( T0_TEXLD );
-	 break;
+         break;
+
+      case OPCODE_SLT:
+         EMIT_2ARG_ARITH(A0_SLT);
+         break;
+
+      case OPCODE_SUB:
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+
+         i915_emit_arith(p,
+                         A0_ADD,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         src0, negate(src1, 1, 1, 1, 1), 0);
+         break;
+
+      case OPCODE_SWZ:
+         EMIT_1ARG_ARITH(A0_MOV);       /* extended swizzle handled natively */
+         break;
+
+      case OPCODE_TEX:
+         EMIT_TEX(T0_TEXLD);
+         break;
 
       case OPCODE_TXB:
-	 EMIT_TEX( T0_TEXLDB );
-	 break;
+         EMIT_TEX(T0_TEXLDB);
+         break;
 
       case OPCODE_TXP:
-	 EMIT_TEX( T0_TEXLDP );
-	 break;
+         EMIT_TEX(T0_TEXLDP);
+         break;
 
       case OPCODE_XPD:
-	 /* Cross product:
-	  *      result.x = src0.y * src1.z - src0.z * src1.y;
-	  *      result.y = src0.z * src1.x - src0.x * src1.z;
-	  *      result.z = src0.x * src1.y - src0.y * src1.x;
-	  *      result.w = undef;
-	  */
-	 src0 = src_vector( p, &inst->SrcReg[0], program);
-	 src1 = src_vector( p, &inst->SrcReg[1], program);
-	 tmp = i915_get_utemp( p );
-	 
-	 i915_emit_arith( p, 
-			 A0_MUL,
-			 tmp, A0_DEST_CHANNEL_ALL, 0,
-			 swizzle(src0,Z,X,Y,ONE), 
-			 swizzle(src1,Y,Z,X,ONE), 0);
-
-	 i915_emit_arith( p, 
-			 A0_MAD,
-			 get_result_vector( p, inst ), 
-			 get_result_flags( inst ), 0,
-			 swizzle(src0,Y,Z,X,ONE), 
-			 swizzle(src1,Z,X,Y,ONE), 
-			 negate(tmp,1,1,1,0));
-	 break;
+         /* Cross product:
+          *      result.x = src0.y * src1.z - src0.z * src1.y;
+          *      result.y = src0.z * src1.x - src0.x * src1.z;
+          *      result.z = src0.x * src1.y - src0.y * src1.x;
+          *      result.w = undef;
+          */
+         src0 = src_vector(p, &inst->SrcReg[0], program);
+         src1 = src_vector(p, &inst->SrcReg[1], program);
+         tmp = i915_get_utemp(p);
+
+         i915_emit_arith(p,
+                         A0_MUL,
+                         tmp, A0_DEST_CHANNEL_ALL, 0,
+                         swizzle(src0, Z, X, Y, ONE),
+                         swizzle(src1, Y, Z, X, ONE), 0);
+
+         i915_emit_arith(p,
+                         A0_MAD,
+                         get_result_vector(p, inst),
+                         get_result_flags(inst), 0,
+                         swizzle(src0, Y, Z, X, ONE),
+                         swizzle(src1, Z, X, Y, ONE),
+                         negate(tmp, 1, 1, 1, 0));
+         break;
 
       case OPCODE_END:
-	 return;
-	 
+         return;
+
       default:
-	 i915_program_error( p, "bad opcode" );
-	 return;
+         i915_program_error(p, "bad opcode");
+         return;
       }
 
       inst++;
-      i915_release_utemps( p ); 
+      i915_release_utemps(p);
    }
 }
 
@@ -769,21 +881,22 @@ static void upload_program( struct i915_fragment_program *p )
  * emit, just move the value into its correct position at the end of
  * the program:
  */
-static void fixup_depth_write( struct i915_fragment_program *p )
+static void
+fixup_depth_write(struct i915_fragment_program *p)
 {
    if (p->depth_written) {
       GLuint depth = UREG(REG_TYPE_OD, 0);
 
-      i915_emit_arith( p, 
-		      A0_MOV,
-		      depth, A0_DEST_CHANNEL_W, 0,
-		      swizzle(depth,X,Y,Z,Z), 
-		      0, 0);
+      i915_emit_arith(p,
+                      A0_MOV,
+                      depth, A0_DEST_CHANNEL_W, 0,
+                      swizzle(depth, X, Y, Z, Z), 0, 0);
    }
 }
 
 
-static void check_wpos( struct i915_fragment_program *p )
+static void
+check_wpos(struct i915_fragment_program *p)
 {
    GLuint inputs = p->FragProg.Base.InputsRead;
    GLint i;
@@ -791,12 +904,12 @@ static void check_wpos( struct i915_fragment_program *p )
    p->wpos_tex = -1;
 
    for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
-      if (inputs & FRAG_BIT_TEX(i)) 
-	 continue;
+      if (inputs & FRAG_BIT_TEX(i))
+         continue;
       else if (inputs & FRAG_BIT_WPOS) {
-	 p->wpos_tex = i;
-	 inputs &= ~FRAG_BIT_WPOS;
-      }   
+         p->wpos_tex = i;
+         inputs &= ~FRAG_BIT_WPOS;
+      }
    }
 
    if (inputs & FRAG_BIT_WPOS) {
@@ -805,53 +918,54 @@ static void check_wpos( struct i915_fragment_program *p )
 }
 
 
-static void translate_program( struct i915_fragment_program *p )
+static void
+translate_program(struct i915_fragment_program *p)
 {
-   i915ContextPtr i915 = I915_CONTEXT(p->ctx);
-   
-   i915_init_program( i915, p );
-   check_wpos( p ); 
-   upload_program( p );
-   fixup_depth_write( p );
-   i915_fini_program( p ); 
-   
+   struct i915_context *i915 = I915_CONTEXT(p->ctx);
+
+   i915_init_program(i915, p);
+   check_wpos(p);
+   upload_program(p);
+   fixup_depth_write(p);
+   i915_fini_program(p);
+
    p->translated = 1;
 }
 
 
-static void track_params( struct i915_fragment_program *p )
+static void
+track_params(struct i915_fragment_program *p)
 {
    GLint i;
 
    if (p->nr_params)
-      _mesa_load_state_parameters(p->ctx, p->FragProg.Base.Parameters); 
+      _mesa_load_state_parameters(p->ctx, p->FragProg.Base.Parameters);
 
    for (i = 0; i < p->nr_params; i++) {
       GLint reg = p->param[i].reg;
-      COPY_4V( p->constant[reg], p->param[i].values );
+      COPY_4V(p->constant[reg], p->param[i].values);
    }
-   
+
    p->params_uptodate = 1;
-   p->on_hardware = 0;		/* overkill */
+   p->on_hardware = 0;          /* overkill */
 }
 
 
-static void i915BindProgram( GLcontext *ctx,
-			    GLenum target, 
-			    struct gl_program *prog )
+static void
+i915BindProgram(GLcontext * ctx, GLenum target, struct gl_program *prog)
 {
    if (target == GL_FRAGMENT_PROGRAM_ARB) {
-      i915ContextPtr i915 = I915_CONTEXT(ctx);
-      struct i915_fragment_program *p = (struct i915_fragment_program *)prog;
+      struct i915_context *i915 = I915_CONTEXT(ctx);
+      struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
+
+      if (i915->current_program == p)
+         return;
 
-      if (i915->current_program == p) 
-	 return;
-      
       if (i915->current_program) {
-	 i915->current_program->on_hardware = 0;
-	 i915->current_program->params_uptodate = 0;
+         i915->current_program->on_hardware = 0;
+         i915->current_program->params_uptodate = 0;
       }
-      
+
       i915->current_program = p;
 
       assert(p->on_hardware == 0);
@@ -860,71 +974,70 @@ static void i915BindProgram( GLcontext *ctx,
    }
 }
 
-static struct gl_program *i915NewProgram( GLcontext *ctx,
-				      GLenum target, 
-				      GLuint id )
+static struct gl_program *
+i915NewProgram(GLcontext * ctx, GLenum target, GLuint id)
 {
    switch (target) {
    case GL_VERTEX_PROGRAM_ARB:
-      return _mesa_init_vertex_program( ctx, CALLOC_STRUCT(gl_vertex_program),
-					target, id );
-
-   case GL_FRAGMENT_PROGRAM_ARB: {
-      struct i915_fragment_program *prog = CALLOC_STRUCT(i915_fragment_program);
-      if (prog) {
-	 i915_init_program( I915_CONTEXT(ctx), prog );
-
-	 return _mesa_init_fragment_program( ctx, &prog->FragProg,
-					     target, id );
+      return _mesa_init_vertex_program(ctx, CALLOC_STRUCT(gl_vertex_program),
+                                       target, id);
+
+   case GL_FRAGMENT_PROGRAM_ARB:{
+         struct i915_fragment_program *prog =
+            CALLOC_STRUCT(i915_fragment_program);
+         if (prog) {
+            i915_init_program(I915_CONTEXT(ctx), prog);
+
+            return _mesa_init_fragment_program(ctx, &prog->FragProg,
+                                               target, id);
+         }
+         else
+            return NULL;
       }
-      else
-	 return NULL;
-   }
 
    default:
       /* Just fallback:
        */
-      return _mesa_new_program( ctx, target, id );
+      return _mesa_new_program(ctx, target, id);
    }
 }
 
-static void i915DeleteProgram( GLcontext *ctx,
-			      struct gl_program *prog )
+static void
+i915DeleteProgram(GLcontext * ctx, struct gl_program *prog)
 {
    if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
-      i915ContextPtr i915 = I915_CONTEXT(ctx);
-      struct i915_fragment_program *p = (struct i915_fragment_program *)prog;
-      
-      if (i915->current_program == p) 
-	 i915->current_program = 0;
+      struct i915_context *i915 = I915_CONTEXT(ctx);
+      struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
+
+      if (i915->current_program == p)
+         i915->current_program = 0;
    }
 
-   _mesa_delete_program( ctx, prog );
+   _mesa_delete_program(ctx, prog);
 }
 
 
-static GLboolean i915IsProgramNative( GLcontext *ctx,
-				     GLenum target, 
-				     struct gl_program *prog )
+static GLboolean
+i915IsProgramNative(GLcontext * ctx, GLenum target, struct gl_program *prog)
 {
    if (target == GL_FRAGMENT_PROGRAM_ARB) {
-      struct i915_fragment_program *p = (struct i915_fragment_program *)prog;
+      struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
 
       if (!p->translated)
-	 translate_program( p );
-      
+         translate_program(p);
+
       return !p->error;
    }
    else
       return GL_TRUE;
 }
 
-static void i915ProgramStringNotify( GLcontext *ctx,
-				    GLenum target,
-				    struct gl_program *prog )
+static void
+i915ProgramStringNotify(GLcontext * ctx,
+                        GLenum target, struct gl_program *prog)
 {
    if (target == GL_FRAGMENT_PROGRAM_ARB) {
-      struct i915_fragment_program *p = (struct i915_fragment_program *)prog;
+      struct i915_fragment_program *p = (struct i915_fragment_program *) prog;
       p->translated = 0;
 
       /* Hack: make sure fog is correctly enabled according to this
@@ -941,28 +1054,28 @@ static void i915ProgramStringNotify( GLcontext *ctx,
 }
 
 
-void i915ValidateFragmentProgram( i915ContextPtr i915 )
+void
+i915ValidateFragmentProgram(struct i915_context *i915)
 {
    GLcontext *ctx = &i915->intel.ctx;
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    struct vertex_buffer *VB = &tnl->vb;
 
-   struct i915_fragment_program *p = 
-      (struct i915_fragment_program *)ctx->FragmentProgram._Current;
+   struct i915_fragment_program *p =
+      (struct i915_fragment_program *) ctx->FragmentProgram._Current;
 
    const GLuint inputsRead = p->FragProg.Base.InputsRead;
    GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
    GLuint s2 = S2_TEXCOORD_NONE;
    int i, offset = 0;
 
-   if (i915->current_program != p) 
-   {
+   if (i915->current_program != p) {
       if (i915->current_program) {
-	 i915->current_program->on_hardware = 0;
-	 i915->current_program->params_uptodate = 0;
+         i915->current_program->on_hardware = 0;
+         i915->current_program->params_uptodate = 0;
       }
-      
+
       i915->current_program = p;
    }
 
@@ -971,8 +1084,8 @@ void i915ValidateFragmentProgram( i915ContextPtr i915 )
     */
    VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr;
 
-   if (!p->translated) 
-      translate_program( p );
+   if (!p->translated)
+      translate_program(p);
 
    intel->vertex_attr_count = 0;
    intel->wpos_offset = 0;
@@ -981,31 +1094,31 @@ void i915ValidateFragmentProgram( i915ContextPtr i915 )
    intel->specoffset = 0;
 
    if (inputsRead & FRAG_BITS_TEX_ANY) {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16 );
+      EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16);
    }
    else {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, S4_VFMT_XYZ, 12 );
+      EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, S4_VFMT_XYZ, 12);
    }
 
    if (inputsRead & FRAG_BIT_COL0) {
       intel->coloroffset = offset / 4;
-      EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4 );
+      EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4);
    }
-   
-   if ((inputsRead & (FRAG_BIT_COL1|FRAG_BIT_FOGC)) || 
+
+   if ((inputsRead & (FRAG_BIT_COL1 | FRAG_BIT_FOGC)) ||
        i915->vertex_fog != I915_FOG_NONE) {
 
       if (inputsRead & FRAG_BIT_COL1) {
-	 intel->specoffset = offset / 4;
-	 EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3 );
+         intel->specoffset = offset / 4;
+         EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3);
       }
       else
-	 EMIT_PAD(3);
+         EMIT_PAD(3);
 
-      if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) 
-	 EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1 );
+      if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE)
+         EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1);
       else
-	 EMIT_PAD( 1 );
+         EMIT_PAD(1);
    }
 
    /* XXX this was disabled, but enabling this code helped fix the Glean
@@ -1013,63 +1126,66 @@ void i915ValidateFragmentProgram( i915ContextPtr i915 )
     */
 #if 1
    if ((inputsRead & FRAG_BIT_FOGC) || i915->vertex_fog != I915_FOG_NONE) {
-      EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4 );
+      EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1F, S4_VFMT_FOG_PARAM, 4);
    }
 #endif
 
    for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
       if (inputsRead & FRAG_BIT_TEX(i)) {
-	 int sz = VB->TexCoordPtr[i]->size;
-	    
-	 s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
-	 s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
+         int sz = VB->TexCoordPtr[i]->size;
 
-	 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_SZ(sz), 0, sz * 4 );
+         s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
+         s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
+
+         EMIT_ATTR(_TNL_ATTRIB_TEX0 + i, EMIT_SZ(sz), 0, sz * 4);
       }
       else if (i == p->wpos_tex) {
-	
-	 /* If WPOS is required, duplicate the XYZ position data in an
-	  * unused texture coordinate:
-	  */
-	 s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
-	 s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(3));
 
-	 intel->wpos_offset = offset;
-	 intel->wpos_size = 3 * sizeof(GLuint);
+         /* If WPOS is required, duplicate the XYZ position data in an
+          * unused texture coordinate:
+          */
+         s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
+         s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(3));
+
+         intel->wpos_offset = offset;
+         intel->wpos_size = 3 * sizeof(GLuint);
 
-	 EMIT_PAD( intel->wpos_size );
-      }   
+         EMIT_PAD(intel->wpos_size);
+      }
    }
 
    if (s2 != i915->state.Ctx[I915_CTXREG_LIS2] ||
        s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
-    
-      I915_STATECHANGE( i915, I915_UPLOAD_CTX );
+      int k;
+
+      I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
       /* Must do this *after* statechange, so as not to affect
        * buffered vertices reliant on the old state:
        */
-      intel->vertex_size = _tnl_install_attrs( &intel->ctx, 
-					       intel->vertex_attrs, 
-					       intel->vertex_attr_count,
-					       intel->ViewportMatrix.m, 0 ); 
+      intel->vertex_size = _tnl_install_attrs(&intel->ctx,
+                                              intel->vertex_attrs,
+                                              intel->vertex_attr_count,
+                                              intel->ViewportMatrix.m, 0);
 
       intel->vertex_size >>= 2;
 
       i915->state.Ctx[I915_CTXREG_LIS2] = s2;
       i915->state.Ctx[I915_CTXREG_LIS4] = s4;
 
-      assert(intel->vtbl.check_vertex_size( intel, intel->vertex_size ));
+      k = intel->vtbl.check_vertex_size(intel, intel->vertex_size);
+      assert(k);
    }
 
-   if (!p->params_uptodate) 
-      track_params( p );
+   if (!p->params_uptodate)
+      track_params(p);
 
-   if (!p->on_hardware) 
-      i915_upload_program( i915, p );
+   if (!p->on_hardware)
+      i915_upload_program(i915, p);
 }
 
-void i915InitFragProgFuncs( struct dd_function_table *functions )
+void
+i915InitFragProgFuncs(struct dd_function_table *functions)
 {
    functions->BindProgram = i915BindProgram;
    functions->NewProgram = i915NewProgram;
diff --git a/src/mesa/drivers/dri/i915/i915_metaops.c b/src/mesa/drivers/dri/i915/i915_metaops.c
index 1be7ac4c485..90a78c6082b 100644
--- a/src/mesa/drivers/dri/i915/i915_metaops.c
+++ b/src/mesa/drivers/dri/i915/i915_metaops.c
@@ -25,137 +25,177 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "enums.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "utils.h"
 
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
-#include "intel_ioctl.h"
-#include "intel_rotate.h"
+#include "intel_regions.h"
 
 #include "i915_context.h"
 #include "i915_reg.h"
 
-/* A large amount of state doesn't need to be uploaded.
+/* We touch almost everything:
  */
-#define ACTIVE (I915_UPLOAD_INVARIENT |         \
-		I915_UPLOAD_PROGRAM | 		\
-		I915_UPLOAD_STIPPLE |		\
+#define ACTIVE (I915_UPLOAD_INVARIENT | 	\
 		I915_UPLOAD_CTX |		\
 		I915_UPLOAD_BUFFERS |		\
-		I915_UPLOAD_TEX(0))		
+		I915_UPLOAD_STIPPLE |		\
+                I915_UPLOAD_PROGRAM | 		\
+                I915_UPLOAD_FOG | 		\
+		I915_UPLOAD_TEX(0))
 
-#define SET_STATE( i915, STATE )			\
+#define SET_STATE( i915, STATE )		\
 do {						\
    i915->current->emitted &= ~ACTIVE;		\
-   i915->current = &i915->STATE;			\
+   i915->current = &i915->STATE;		\
    i915->current->emitted &= ~ACTIVE;		\
 } while (0)
 
-/* Operations where the 3D engine is decoupled temporarily from the
- * current GL state and used for other purposes than simply rendering
- * incoming triangles.
- */
-static void set_initial_state( i915ContextPtr i915 )
-{
-   memcpy(&i915->meta, &i915->initial, sizeof(i915->meta) );
-   i915->meta.active = ACTIVE;
-   i915->meta.emitted = 0;
-}
 
-
-static void set_no_depth_stencil_write( i915ContextPtr i915 )
+static void
+meta_no_stencil_write(struct intel_context *intel)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
+
    /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
     */
-   i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE | 
-				       S5_STENCIL_WRITE_ENABLE);
+   i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
+                                         S5_STENCIL_WRITE_ENABLE);
+
+   i915->meta.emitted &= ~I915_UPLOAD_CTX;
+}
+
+static void
+meta_no_depth_write(struct intel_context *intel)
+{
+   struct i915_context *i915 = i915_context(&intel->ctx);
 
    /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
     */
    i915->meta.Ctx[I915_CTXREG_LIS6] &= ~(S6_DEPTH_TEST_ENABLE |
-				       S6_DEPTH_WRITE_ENABLE);
+                                         S6_DEPTH_WRITE_ENABLE);
 
    i915->meta.emitted &= ~I915_UPLOAD_CTX;
 }
 
+static void
+meta_depth_replace(struct intel_context *intel)
+{
+   struct i915_context *i915 = i915_context(&intel->ctx);
+
+   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_TRUE )
+    * ctx->Driver.DepthMask( ctx, GL_TRUE )
+    */
+   i915->meta.Ctx[I915_CTXREG_LIS6] |= (S6_DEPTH_TEST_ENABLE |
+                                        S6_DEPTH_WRITE_ENABLE);
+
+   /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
+    */
+   i915->meta.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
+   i915->meta.Ctx[I915_CTXREG_LIS6] |=
+      COMPAREFUNC_ALWAYS << S6_DEPTH_TEST_FUNC_SHIFT;
+
+   i915->meta.emitted &= ~I915_UPLOAD_CTX;
+}
+
+
 /* Set stencil unit to replace always with the reference value.
  */
-static void set_stencil_replace( i915ContextPtr i915,
-				 GLuint s_mask,
-				 GLuint s_clear)
+static void
+meta_stencil_replace(struct intel_context *intel,
+                     GLuint s_mask, GLuint s_clear)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
    GLuint op = STENCILOP_REPLACE;
    GLuint func = COMPAREFUNC_ALWAYS;
 
    /* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
     */
-   i915->meta.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE | 
-				      S5_STENCIL_WRITE_ENABLE);
-
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
-    */
-   i915->meta.Ctx[I915_CTXREG_LIS6] &= ~(S6_DEPTH_TEST_ENABLE |
-				       S6_DEPTH_WRITE_ENABLE);
-
+   i915->meta.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
+                                        S5_STENCIL_WRITE_ENABLE);
 
    /* ctx->Driver.StencilMask( ctx, s_mask )
     */
    i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
 
    i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-					STENCIL_WRITE_MASK(s_mask));
-
+                                          STENCIL_WRITE_MASK(s_mask));
 
    /* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
     */
    i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
-				       S5_STENCIL_PASS_Z_FAIL_MASK |
-				       S5_STENCIL_PASS_Z_PASS_MASK);
+                                         S5_STENCIL_PASS_Z_FAIL_MASK |
+                                         S5_STENCIL_PASS_Z_PASS_MASK);
 
    i915->meta.Ctx[I915_CTXREG_LIS5] |= ((op << S5_STENCIL_FAIL_SHIFT) |
-				      (op << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
-				      (op << S5_STENCIL_PASS_Z_PASS_SHIFT));
+                                        (op << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
+                                        (op << S5_STENCIL_PASS_Z_PASS_SHIFT));
 
 
    /* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_ref, ~0 )
     */
    i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
    i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-					STENCIL_TEST_MASK(0xff));
+                                          STENCIL_TEST_MASK(0xff));
 
    i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
-				       S5_STENCIL_TEST_FUNC_MASK);
-					
-   i915->meta.Ctx[I915_CTXREG_LIS5] |= ((s_clear << S5_STENCIL_REF_SHIFT) |  
-				      (func << S5_STENCIL_TEST_FUNC_SHIFT)); 
+                                         S5_STENCIL_TEST_FUNC_MASK);
+
+   i915->meta.Ctx[I915_CTXREG_LIS5] |= ((s_clear << S5_STENCIL_REF_SHIFT) |
+                                        (func << S5_STENCIL_TEST_FUNC_SHIFT));
 
 
    i915->meta.emitted &= ~I915_UPLOAD_CTX;
 }
 
 
-static void set_color_mask( i915ContextPtr i915, GLboolean state )
+static void
+meta_color_mask(struct intel_context *intel, GLboolean state)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
    const GLuint mask = (S5_WRITEDISABLE_RED |
-			S5_WRITEDISABLE_GREEN |
-			S5_WRITEDISABLE_BLUE |
-			S5_WRITEDISABLE_ALPHA);
+                        S5_WRITEDISABLE_GREEN |
+                        S5_WRITEDISABLE_BLUE | S5_WRITEDISABLE_ALPHA);
 
    /* Copy colormask state from "regular" hw context.
     */
    if (state) {
       i915->meta.Ctx[I915_CTXREG_LIS5] &= ~mask;
-      i915->meta.Ctx[I915_CTXREG_LIS5] |= 
-	 (i915->state.Ctx[I915_CTXREG_LIS5] & mask);
+      i915->meta.Ctx[I915_CTXREG_LIS5] |=
+         (i915->state.Ctx[I915_CTXREG_LIS5] & mask);
    }
-   else 
+   else
       i915->meta.Ctx[I915_CTXREG_LIS5] |= mask;
-      
+
+   i915->meta.emitted &= ~I915_UPLOAD_CTX;
+}
+
+
+
+static void
+meta_import_pixel_state(struct intel_context *intel)
+{
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   memcpy(i915->meta.Fog, i915->state.Fog, I915_FOG_SETUP_SIZE * 4);
+
+   i915->meta.Ctx[I915_CTXREG_LIS5] = i915->state.Ctx[I915_CTXREG_LIS5];
+   i915->meta.Ctx[I915_CTXREG_LIS6] = i915->state.Ctx[I915_CTXREG_LIS6];
+   i915->meta.Ctx[I915_CTXREG_STATE4] = i915->state.Ctx[I915_CTXREG_STATE4];
+   i915->meta.Ctx[I915_CTXREG_BLENDCOLOR1] =
+      i915->state.Ctx[I915_CTXREG_BLENDCOLOR1];
+   i915->meta.Ctx[I915_CTXREG_IAB] = i915->state.Ctx[I915_CTXREG_IAB];
+
+   i915->meta.Buffer[I915_DESTREG_SENABLE] =
+      i915->state.Buffer[I915_DESTREG_SENABLE];
+   i915->meta.Buffer[I915_DESTREG_SR1] = i915->state.Buffer[I915_DESTREG_SR1];
+   i915->meta.Buffer[I915_DESTREG_SR2] = i915->state.Buffer[I915_DESTREG_SR2];
+
+   i915->meta.emitted &= ~I915_UPLOAD_FOG;
+   i915->meta.emitted &= ~I915_UPLOAD_BUFFERS;
    i915->meta.emitted &= ~I915_UPLOAD_CTX;
 }
 
@@ -212,69 +252,64 @@ static void set_color_mask( i915ContextPtr i915, GLboolean state )
 
 
 
-static void set_no_texture( i915ContextPtr i915 )
+static void
+meta_no_texture(struct intel_context *intel)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
+
    static const GLuint prog[] = {
       _3DSTATE_PIXEL_SHADER_PROGRAM,
 
       /* Declare incoming diffuse color:
        */
-      (D0_DCL |
-       D0_DECL_REG( REG_T_DIFFUSE ) |
-       D0_CHANNEL_ALL),
+      (D0_DCL | D0_DECL_REG(REG_T_DIFFUSE) | D0_CHANNEL_ALL),
       D1_MBZ,
       D2_MBZ,
 
       /* output-color = mov(t_diffuse)
        */
       (A0_MOV |
-       A0_DEST_REG( REG_OC ) |
-       A0_DEST_CHANNEL_ALL |
-       A0_SRC0_REG( REG_T_DIFFUSE )),
+       A0_DEST_REG(REG_OC) |
+       A0_DEST_CHANNEL_ALL | A0_SRC0_REG(REG_T_DIFFUSE)),
       (A1_SRC0_XYZW),
       0,
    };
 
-   
-   memcpy( i915->meta.Program, prog, sizeof(prog) );
+
+   memcpy(i915->meta.Program, prog, sizeof(prog));
    i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
    i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
    i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
 }
 
-
-static void enable_texture_blend_replace( i915ContextPtr i915 )
+static void
+meta_texture_blend_replace(struct intel_context *intel)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
+
    static const GLuint prog[] = {
       _3DSTATE_PIXEL_SHADER_PROGRAM,
 
       /* Declare the sampler:
        */
-      (D0_DCL |
-       D0_DECL_REG( REG_S(0) ) |
-       D0_SAMPLE_TYPE_2D |
-       D0_CHANNEL_NONE),
+      (D0_DCL | D0_DECL_REG(REG_S(0)) | D0_SAMPLE_TYPE_2D | D0_CHANNEL_NONE),
       D1_MBZ,
       D2_MBZ,
 
       /* Declare the interpolated texture coordinate:
        */
-      (D0_DCL |
-       D0_DECL_REG( REG_T_TEX(0) ) |
-       D0_CHANNEL_ALL),
+      (D0_DCL | D0_DECL_REG(REG_T_TEX(0)) | D0_CHANNEL_ALL),
       D1_MBZ,
       D2_MBZ,
 
       /* output-color = texld(sample0, texcoord0) 
        */
-      (T0_TEXLD | 
-       T0_DEST_REG( REG_OC ) |
-       T0_SAMPLER( 0 )),
+      (T0_TEXLD | T0_DEST_REG(REG_OC) | T0_SAMPLER(0)),
       T1_ADDRESS_REG(REG_TYPE_T, 0),
       T2_MBZ
    };
 
-   memcpy( i915->meta.Program, prog, sizeof(prog) );
+   memcpy(i915->meta.Program, prog, sizeof(prog));
    i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
    i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
    i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
@@ -287,425 +322,186 @@ static void enable_texture_blend_replace( i915ContextPtr i915 )
 /* Set up an arbitary piece of memory as a rectangular texture
  * (including the front or back buffer).
  */
-static void set_tex_rect_source( i915ContextPtr i915,
-				 GLuint offset,
-				 GLuint width, 
-				 GLuint height,
-				 GLuint pitch, /* in bytes! */
-				 GLuint textureFormat )
+static GLboolean
+meta_tex_rect_source(struct intel_context *intel,
+                     dri_bo *buffer,
+                     GLuint offset,
+                     GLuint pitch, GLuint height, GLenum format, GLenum type)
 {
+   struct i915_context *i915 = i915_context(&intel->ctx);
    GLuint unit = 0;
    GLint numLevels = 1;
    GLuint *state = i915->meta.Tex[0];
+   GLuint textureFormat;
+   GLuint cpp;
 
-#if 0
-   printf("TexRect source offset 0x%x  pitch %d\n", offset, pitch);
-#endif
+   /* A full implementation of this would do the upload through
+    * glTexImage2d, and get all the conversion operations at that
+    * point.  We are restricted, but still at least have access to the
+    * fragment program swizzle.
+    */
+   switch (format) {
+   case GL_BGRA:
+      switch (type) {
+      case GL_UNSIGNED_INT_8_8_8_8_REV:
+      case GL_UNSIGNED_BYTE:
+         textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
+         cpp = 4;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_RGBA:
+      switch (type) {
+      case GL_UNSIGNED_INT_8_8_8_8_REV:
+      case GL_UNSIGNED_BYTE:
+         textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
+         cpp = 4;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_BGR:
+      switch (type) {
+      case GL_UNSIGNED_SHORT_5_6_5_REV:
+         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
+         cpp = 2;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
+   case GL_RGB:
+      switch (type) {
+      case GL_UNSIGNED_SHORT_5_6_5:
+         textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
+         cpp = 2;
+         break;
+      default:
+         return GL_FALSE;
+      }
+      break;
 
-/*    fprintf(stderr, "%s: offset: %x w: %d h: %d pitch %d format %x\n", */
-/* 	   __FUNCTION__, offset, width, height, pitch, textureFormat ); */
+   default:
+      return GL_FALSE;
+   }
+
+
+   if ((pitch * cpp) & 3) {
+      _mesa_printf("%s: texture is not dword pitch\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+/*    intel_region_release(&i915->meta.tex_region[0]); */
+/*    intel_region_reference(&i915->meta.tex_region[0], region); */
+   i915->meta.tex_buffer[0] = buffer;
+   i915->meta.tex_offset[0] = offset;
 
-   state[I915_TEXREG_MS2] = offset;
    state[I915_TEXREG_MS3] = (((height - 1) << MS3_HEIGHT_SHIFT) |
-			    ((width - 1) << MS3_WIDTH_SHIFT) |
-			    textureFormat |
-			    MS3_USE_FENCE_REGS);
+                             ((pitch - 1) << MS3_WIDTH_SHIFT) |
+                             textureFormat | MS3_USE_FENCE_REGS);
 
-   state[I915_TEXREG_MS4] = ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | 
-			    ((((numLevels-1) * 4)) << MS4_MAX_LOD_SHIFT));
+   state[I915_TEXREG_MS4] = (((((pitch * cpp) / 4) - 1) << MS4_PITCH_SHIFT) |
+                             MS4_CUBE_FACE_ENA_MASK |
+                             ((((numLevels - 1) * 4)) << MS4_MAX_LOD_SHIFT));
 
    state[I915_TEXREG_SS2] = ((FILTER_NEAREST << SS2_MIN_FILTER_SHIFT) |
-			    (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT) |
-			    (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT));
+                             (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT) |
+                             (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT));
+
    state[I915_TEXREG_SS3] = ((TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT) |
-			    (TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT) |
-			    (TEXCOORDMODE_WRAP << SS3_TCZ_ADDR_MODE_SHIFT) |
-			    (unit<<SS3_TEXTUREMAP_INDEX_SHIFT));
+                             (TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT) |
+                             (TEXCOORDMODE_WRAP << SS3_TCZ_ADDR_MODE_SHIFT) |
+                             (unit << SS3_TEXTUREMAP_INDEX_SHIFT));
 
    state[I915_TEXREG_SS4] = 0;
 
    i915->meta.emitted &= ~I915_UPLOAD_TEX(0);
+   return GL_TRUE;
 }
 
 
-/* Select between front and back draw buffers.
+/**
+ * Set the color and depth drawing region for meta ops.
  */
-static void set_draw_region( i915ContextPtr i915, const intelRegion *region )
+static void
+meta_draw_region(struct intel_context *intel,
+                 struct intel_region *color_region,
+                 struct intel_region *depth_region)
 {
-#if 0
-   printf("Rotate into region: offset 0x%x  pitch %d\n",
-          region->offset, region->pitch);
-#endif
-   i915->meta.Buffer[I915_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i915->meta.Buffer[I915_DESTREG_CBUFADDR2] = region->offset;
-   i915->meta.emitted &= ~I915_UPLOAD_BUFFERS;
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   i915_state_draw_region(intel, &i915->meta, color_region, depth_region);
 }
 
 
-#if 0
-/* Setup an arbitary draw format, useful for targeting texture or agp
- * memory.
- */
-static void set_draw_format( i915ContextPtr i915,
-			     GLuint format,
-			     GLuint depth_format)
+static void
+set_vertex_format(struct intel_context *intel)
 {
-   i915->meta.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					DSTORG_VERT_BIAS(0x8) | /* .5 */
-					format |
-					LOD_PRECLAMP_OGL |
-					TEX_DEFAULT_COLOR_OGL |
-					depth_format);
-
-   i915->meta.emitted &= ~I915_UPLOAD_BUFFERS;
-/*    fprintf(stderr, "%s: DV1: %x\n",  */
-/* 	   __FUNCTION__, i915->meta.Buffer[I915_DESTREG_DV1]); */
-}
-#endif
+   struct i915_context *i915 = i915_context(&intel->ctx);
 
-static void set_vertex_format( i915ContextPtr i915 )
-{
-   i915->meta.Ctx[I915_CTXREG_LIS2] = 
+   i915->meta.Ctx[I915_CTXREG_LIS2] =
       (S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
-       S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) | 
+       S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
-       S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) | 
+       S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
        S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
 
    i915->meta.Ctx[I915_CTXREG_LIS4] &= ~S4_VFMT_MASK;
 
-   i915->meta.Ctx[I915_CTXREG_LIS4] |= 
-      (S4_VFMT_COLOR |
-       S4_VFMT_SPEC_FOG |
-       S4_VFMT_XYZW);
+   i915->meta.Ctx[I915_CTXREG_LIS4] |= (S4_VFMT_COLOR | S4_VFMT_XYZ);
 
    i915->meta.emitted &= ~I915_UPLOAD_CTX;
-
 }
 
 
-static void draw_quad(i915ContextPtr i915, 
-		      GLfloat x0, GLfloat x1,
-		      GLfloat y0, GLfloat y1, 
-		      GLubyte red, GLubyte green,
-		      GLubyte blue, GLubyte alpha,
-		      GLfloat s0, GLfloat s1,
-		      GLfloat t0, GLfloat t1 )
-{
-   GLuint vertex_size = 8;
-   GLuint *vb = intelEmitInlinePrimitiveLocked( &i915->intel, 
-						PRIM3D_TRIFAN, 
-						4 * vertex_size,
-						vertex_size );
-   intelVertex tmp;
-   int i;
-
-   if (0)
-      fprintf(stderr, "%s: %f,%f-%f,%f 0x%x%x%x%x %f,%f-%f,%f\n",
-	      __FUNCTION__,
-	      x0,y0,x1,y1,red,green,blue,alpha,s0,t0,s1,t1);
-
-
-   /* initial vertex, left bottom */
-   tmp.v.x = x0;
-   tmp.v.y = y0;
-   tmp.v.z = 1.0;
-   tmp.v.w = 1.0; 
-   tmp.v.color.red = red;
-   tmp.v.color.green = green;
-   tmp.v.color.blue = blue;
-   tmp.v.color.alpha = alpha;
-   tmp.v.specular.red = 0;
-   tmp.v.specular.green = 0;
-   tmp.v.specular.blue = 0;
-   tmp.v.specular.alpha = 0;
-   tmp.v.u0 = s0;
-   tmp.v.v0 = t0;
-
-   for (i = 0 ; i < vertex_size ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* right bottom */
-   vb += vertex_size;
-   tmp.v.x = x1;
-   tmp.v.u0 = s1;
-   for (i = 0 ; i < vertex_size ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* right top */
-   vb += vertex_size;
-   tmp.v.y = y1;
-   tmp.v.v0 = t1;
-   for (i = 0 ; i < vertex_size ; i++)
-      vb[i] = tmp.ui[i];
-
-   /* left top */
-   vb += vertex_size;
-   tmp.v.x = x0;
-   tmp.v.u0 = s0;
-   for (i = 0 ; i < vertex_size ; i++)
-      vb[i] = tmp.ui[i];
-}
-
 
-static void draw_poly(i915ContextPtr i915, 
-		      GLubyte red, GLubyte green, GLubyte blue, GLubyte alpha,
-                      GLuint numVerts,
-                      /*const*/ GLfloat verts[][2],
-                      /*const*/ GLfloat texcoords[][2])
+/* Operations where the 3D engine is decoupled temporarily from the
+ * current GL state and used for other purposes than simply rendering
+ * incoming triangles.
+ */
+static void
+install_meta_state(struct intel_context *intel)
 {
-   GLuint vertex_size = 8;
-   GLuint *vb = intelEmitInlinePrimitiveLocked( &i915->intel, 
-						PRIM3D_TRIFAN, 
-						numVerts * vertex_size,
-						vertex_size );
-   intelVertex tmp;
-   int i, k;
-
-   /* initial constant vertex fields */
-   tmp.v.z = 1.0;
-   tmp.v.w = 1.0; 
-   tmp.v.color.red = red;
-   tmp.v.color.green = green;
-   tmp.v.color.blue = blue;
-   tmp.v.color.alpha = alpha;
-   tmp.v.specular.red = 0;
-   tmp.v.specular.green = 0;
-   tmp.v.specular.blue = 0;
-   tmp.v.specular.alpha = 0;
-
-   for (k = 0; k < numVerts; k++) {
-      tmp.v.x = verts[k][0];
-      tmp.v.y = verts[k][1];
-      tmp.v.u0 = texcoords[k][0];
-      tmp.v.v0 = texcoords[k][1];
-
-      for (i = 0 ; i < vertex_size ; i++)
-         vb[i] = tmp.ui[i];
-
-      vb += vertex_size;
-   }
-}
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   memcpy(&i915->meta, &i915->initial, sizeof(i915->meta));
+   i915->meta.active = ACTIVE;
+   i915->meta.emitted = 0;
 
+   SET_STATE(i915, meta);
+   set_vertex_format(intel);
+   meta_no_texture(intel);
+}
 
-void 
-i915ClearWithTris(intelContextPtr intel, GLbitfield buffers,
-		  GLboolean allFoo,
-		  GLint cxFoo, GLint cyFoo, GLint cwFoo, GLint chFoo)
+static void
+leave_meta_state(struct intel_context *intel)
 {
-   i915ContextPtr i915 = I915_CONTEXT( intel );
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   intelScreenPrivate *screen = intel->intelScreen;
-   int x0, y0, x1, y1;
-   GLint cx, cy, cw, ch;
-   GLboolean all;
-
-   SET_STATE( i915, meta ); 
-   set_initial_state( i915 ); 
-   set_no_texture( i915 ); 
-   set_vertex_format( i915 ); 
-
-   LOCK_HARDWARE(intel);
-
-   /* get clear bounds after locking */
-   cx = intel->ctx.DrawBuffer->_Xmin;
-   cy = intel->ctx.DrawBuffer->_Ymin;
-   cw = intel->ctx.DrawBuffer->_Xmax - cx;
-   ch = intel->ctx.DrawBuffer->_Ymax - cy;
-   all = (cw == intel->ctx.DrawBuffer->Width &&
-          ch == intel->ctx.DrawBuffer->Height);
-
-   if (!all) {
-      x0 = cx;
-      y0 = cy;
-      x1 = x0 + cw;
-      y1 = y0 + ch;
-   } else {
-      x0 = 0;
-      y0 = 0;
-      x1 = x0 + dPriv->w;
-      y1 = y0 + dPriv->h;
-   }
-
-   /* Don't do any clipping to screen - these are window coordinates.
-    * The active cliprects will be applied as for any other geometry.
-    */
-
-   if (buffers & BUFFER_BIT_FRONT_LEFT) { 
-      set_no_depth_stencil_write( i915 );
-      set_color_mask( i915, GL_TRUE );
-      set_draw_region( i915, &screen->front );
-
-      draw_quad(i915, x0, x1, y0, y1,
-		intel->clear_red, intel->clear_green, 
- 		intel->clear_blue, intel->clear_alpha, 
-		0, 0, 0, 0);
-   }
-
-   if (buffers & BUFFER_BIT_BACK_LEFT) {
-      set_no_depth_stencil_write( i915 );
-      set_color_mask( i915, GL_TRUE );
-      set_draw_region( i915, &screen->back );
-
-      draw_quad(i915, x0, x1, y0, y1,
-		intel->clear_red, intel->clear_green,
-		intel->clear_blue, intel->clear_alpha,
-		0, 0, 0, 0);
-   }
-
-   if (buffers & BUFFER_BIT_STENCIL) {
-      set_stencil_replace( i915, 
-			   intel->ctx.Stencil.WriteMask[0], 
-			   intel->ctx.Stencil.Clear);
-      
-      set_color_mask( i915, GL_FALSE );
-      set_draw_region( i915, &screen->front ); /* could be either? */
-
-      draw_quad( i915, x0, x1, y0, y1, 0, 0, 0, 0, 0, 0, 0, 0 );
-   }
-
-   UNLOCK_HARDWARE(intel);
-
-   SET_STATE( i915, state );
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   intel_region_release(&i915->meta.draw_region);
+   intel_region_release(&i915->meta.depth_region);
+/*    intel_region_release(&i915->meta.tex_region[0]); */
+   SET_STATE(i915, state);
 }
 
 
-/**
- * Copy the window contents named by dPriv to the rotated (or reflected)
- * color buffer.
- * srcBuf is BUFFER_BIT_FRONT_LEFT or BUFFER_BIT_BACK_LEFT to indicate the source.
- */
+
 void
-i915RotateWindow(intelContextPtr intel, __DRIdrawablePrivate *dPriv,
-                 GLuint srcBuf)
+i915InitMetaFuncs(struct i915_context *i915)
 {
-   i915ContextPtr i915 = I915_CONTEXT( intel );
-   intelScreenPrivate *screen = intel->intelScreen;
-   const GLuint cpp = screen->cpp;
-   drm_clip_rect_t fullRect;
-   GLuint textureFormat, srcOffset, srcPitch;
-   const drm_clip_rect_t *clipRects;
-   int numClipRects;
-   int i;
-
-   int xOrig, yOrig;
-   int origNumClipRects;
-   drm_clip_rect_t *origRects;
-
-   /*
-    * set up hardware state
-    */
-   intelFlush( &intel->ctx );
-
-   SET_STATE( i915, meta ); 
-   set_initial_state( i915 ); 
-   set_no_texture( i915 ); 
-   set_vertex_format( i915 ); 
-   set_no_depth_stencil_write( i915 );
-   set_color_mask( i915, GL_TRUE );
-
-   LOCK_HARDWARE(intel);
-
-   /* save current drawing origin and cliprects (restored at end) */
-   xOrig = intel->drawX;
-   yOrig = intel->drawY;
-   origNumClipRects = intel->numClipRects;
-   origRects = intel->pClipRects;
-
-   if (!intel->numClipRects)
-      goto done;
-
-   /*
-    * set drawing origin, cliprects for full-screen access to rotated screen
-    */
-   fullRect.x1 = 0;
-   fullRect.y1 = 0;
-   fullRect.x2 = screen->rotatedWidth;
-   fullRect.y2 = screen->rotatedHeight;
-   intel->drawX = 0;
-   intel->drawY = 0;
-   intel->numClipRects = 1;
-   intel->pClipRects = &fullRect;
-
-   set_draw_region( i915, &screen->rotated );
-
-   if (cpp == 4)
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-   else
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-
-   if (srcBuf == BUFFER_BIT_FRONT_LEFT) {
-      srcPitch = screen->front.pitch;   /* in bytes */
-      srcOffset = screen->front.offset; /* bytes */
-      clipRects = dPriv->pClipRects;
-      numClipRects = dPriv->numClipRects;
-   }
-   else {
-      srcPitch = screen->back.pitch;   /* in bytes */
-      srcOffset = screen->back.offset; /* bytes */
-      clipRects = dPriv->pBackClipRects;
-      numClipRects = dPriv->numBackClipRects;
-   }
-
-   /* set the whole screen up as a texture to avoid alignment issues */
-   set_tex_rect_source(i915,
-                       srcOffset,
-                       screen->width,
-		       screen->height,
-                       srcPitch,
-                       textureFormat);
-
-   enable_texture_blend_replace(i915);
-
-   /*
-    * loop over the source window's cliprects
-    */
-   for (i = 0; i < numClipRects; i++) {
-      int srcX0 = clipRects[i].x1;
-      int srcY0 = clipRects[i].y1;
-      int srcX1 = clipRects[i].x2;
-      int srcY1 = clipRects[i].y2;
-      GLfloat verts[4][2], tex[4][2];
-      int j;
-
-      /* build vertices for four corners of clip rect */
-      verts[0][0] = srcX0;  verts[0][1] = srcY0;
-      verts[1][0] = srcX1;  verts[1][1] = srcY0;
-      verts[2][0] = srcX1;  verts[2][1] = srcY1;
-      verts[3][0] = srcX0;  verts[3][1] = srcY1;
-
-      /* .. and texcoords */
-      tex[0][0] = srcX0;  tex[0][1] = srcY0;
-      tex[1][0] = srcX1;  tex[1][1] = srcY0;
-      tex[2][0] = srcX1;  tex[2][1] = srcY1;
-      tex[3][0] = srcX0;  tex[3][1] = srcY1;
-
-      /* transform coords to rotated screen coords */
-      for (j = 0; j < 4; j++) {
-         matrix23TransformCoordf(&screen->rotMatrix,
-                                 &verts[j][0], &verts[j][1]);
-      }
-
-      /* draw polygon to map source image to dest region */
-      draw_poly(i915, 255, 255, 255, 255, 4, verts, tex);
-
-   } /* cliprect loop */
-
-   intelFlushBatchLocked( intel, GL_FALSE, GL_FALSE, GL_FALSE );
-
- done:
-   /* restore original drawing origin and cliprects */
-   intel->drawX = xOrig;
-   intel->drawY = yOrig;
-   intel->numClipRects = origNumClipRects;
-   intel->pClipRects = origRects;
-
-   UNLOCK_HARDWARE(intel);
-
-   SET_STATE( i915, state );
+   i915->intel.vtbl.install_meta_state = install_meta_state;
+   i915->intel.vtbl.leave_meta_state = leave_meta_state;
+   i915->intel.vtbl.meta_no_depth_write = meta_no_depth_write;
+   i915->intel.vtbl.meta_no_stencil_write = meta_no_stencil_write;
+   i915->intel.vtbl.meta_stencil_replace = meta_stencil_replace;
+   i915->intel.vtbl.meta_depth_replace = meta_depth_replace;
+   i915->intel.vtbl.meta_color_mask = meta_color_mask;
+   i915->intel.vtbl.meta_no_texture = meta_no_texture;
+   i915->intel.vtbl.meta_texture_blend_replace = meta_texture_blend_replace;
+   i915->intel.vtbl.meta_tex_rect_source = meta_tex_rect_source;
+   i915->intel.vtbl.meta_draw_region = meta_draw_region;
+   i915->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
 }
-
diff --git a/src/mesa/drivers/dri/i915/i915_program.c b/src/mesa/drivers/dri/i915/i915_program.c
index 68491124449..e87700f8e0a 100644
--- a/src/mesa/drivers/dri/i915/i915_program.c
+++ b/src/mesa/drivers/dri/i915/i915_program.c
@@ -27,9 +27,9 @@
 
 #include <strings.h>
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "tnl/t_context.h"
 #include "intel_batchbuffer.h"
@@ -72,58 +72,62 @@
 
 #define I915_CONSTFLAG_PARAM 0x1f
 
-GLuint i915_get_temp( struct i915_fragment_program *p )
+GLuint
+i915_get_temp(struct i915_fragment_program *p)
 {
-   int bit = ffs( ~p->temp_flag );
+   int bit = ffs(~p->temp_flag);
    if (!bit) {
       fprintf(stderr, "%s: out of temporaries\n", __FILE__);
       exit(1);
    }
 
-   p->temp_flag |= 1<<(bit-1);
-   return UREG(REG_TYPE_R, (bit-1));
+   p->temp_flag |= 1 << (bit - 1);
+   return UREG(REG_TYPE_R, (bit - 1));
 }
 
 
-GLuint i915_get_utemp( struct i915_fragment_program *p )
+GLuint
+i915_get_utemp(struct i915_fragment_program * p)
 {
-   int bit = ffs( ~p->utemp_flag );
+   int bit = ffs(~p->utemp_flag);
    if (!bit) {
       fprintf(stderr, "%s: out of temporaries\n", __FILE__);
       exit(1);
    }
 
-   p->utemp_flag |= 1<<(bit-1);
-   return UREG(REG_TYPE_U, (bit-1));
+   p->utemp_flag |= 1 << (bit - 1);
+   return UREG(REG_TYPE_U, (bit - 1));
 }
 
-void i915_release_utemps( struct i915_fragment_program *p )
+void
+i915_release_utemps(struct i915_fragment_program *p)
 {
    p->utemp_flag = ~0x7;
 }
 
 
-GLuint i915_emit_decl( struct i915_fragment_program *p,
-		      GLuint type, GLuint nr, GLuint d0_flags )
+GLuint
+i915_emit_decl(struct i915_fragment_program *p,
+               GLuint type, GLuint nr, GLuint d0_flags)
 {
    GLuint reg = UREG(type, nr);
 
    if (type == REG_TYPE_T) {
-      if (p->decl_t & (1<<nr))
-	 return reg;
+      if (p->decl_t & (1 << nr))
+         return reg;
 
-      p->decl_t |= (1<<nr);
+      p->decl_t |= (1 << nr);
    }
    else if (type == REG_TYPE_S) {
-      if (p->decl_s & (1<<nr))
-	 return reg;
+      if (p->decl_s & (1 << nr))
+         return reg;
 
-      p->decl_s |= (1<<nr);
+      p->decl_s |= (1 << nr);
    }
-   else 
+   else
       return reg;
 
-   *(p->decl++) = (D0_DCL | D0_DEST( reg ) | d0_flags);
+   *(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags);
    *(p->decl++) = D1_MBZ;
    *(p->decl++) = D2_MBZ;
 
@@ -131,24 +135,26 @@ GLuint i915_emit_decl( struct i915_fragment_program *p,
    return reg;
 }
 
-GLuint i915_emit_arith( struct i915_fragment_program *p,
-		       GLuint op,
-		       GLuint dest,
-		       GLuint mask,
-		       GLuint saturate,
-		       GLuint src0,
-		       GLuint src1,
-		       GLuint src2 )
+GLuint
+i915_emit_arith(struct i915_fragment_program * p,
+                GLuint op,
+                GLuint dest,
+                GLuint mask,
+                GLuint saturate, GLuint src0, GLuint src1, GLuint src2)
 {
    GLuint c[3];
    GLuint nr_const = 0;
 
    assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
-   assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
+   dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
+   assert(dest);
 
-   if (GET_UREG_TYPE(src0) == REG_TYPE_CONST) c[nr_const++] = 0;
-   if (GET_UREG_TYPE(src1) == REG_TYPE_CONST) c[nr_const++] = 1;
-   if (GET_UREG_TYPE(src2) == REG_TYPE_CONST) c[nr_const++] = 2;
+   if (GET_UREG_TYPE(src0) == REG_TYPE_CONST)
+      c[nr_const++] = 0;
+   if (GET_UREG_TYPE(src1) == REG_TYPE_CONST)
+      c[nr_const++] = 1;
+   if (GET_UREG_TYPE(src2) == REG_TYPE_CONST)
+      c[nr_const++] = 2;
 
    /* Recursively call this function to MOV additional const values
     * into temporary registers.  Use utemp registers for this -
@@ -164,67 +170,105 @@ GLuint i915_emit_arith( struct i915_fragment_program *p,
       old_utemp_flag = p->utemp_flag;
 
       first = GET_UREG_NR(s[c[0]]);
-      for (i = 1 ; i < nr_const ; i++) {
-	 if (GET_UREG_NR(s[c[i]]) != first) {
-	    GLuint tmp = i915_get_utemp(p);
-
-	    i915_emit_arith( p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
-			    s[c[i]], 0, 0 );
-	    s[c[i]] = tmp;
-	 }
+      for (i = 1; i < nr_const; i++) {
+         if (GET_UREG_NR(s[c[i]]) != first) {
+            GLuint tmp = i915_get_utemp(p);
+
+            i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
+                            s[c[i]], 0, 0);
+            s[c[i]] = tmp;
+         }
       }
 
       src0 = s[0];
       src1 = s[1];
       src2 = s[2];
-      p->utemp_flag = old_utemp_flag; /* restore */
+      p->utemp_flag = old_utemp_flag;   /* restore */
    }
 
-   *(p->csr++) = (op | 
-		  A0_DEST( dest ) |
-		  mask | 
-		  saturate |
-		  A0_SRC0( src0 ));
-   *(p->csr++) = (A1_SRC0( src0 ) |
-		  A1_SRC1( src1 ));
-   *(p->csr++) = (A2_SRC1( src1 ) |
-		  A2_SRC2( src2 ));
+   *(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
+   *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
+   *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
+
+   if (GET_UREG_TYPE(dest) == REG_TYPE_R)
+      p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;
 
    p->nr_alu_insn++;
    return dest;
 }
 
+static GLuint get_free_rreg (struct i915_fragment_program *p, 
+                             GLuint live_regs)
+{
+    int bit = ffs(~live_regs);
+    if (!bit) {
+        i915_program_error(p, "Can't find free R reg");
+        return UREG_BAD;
+    }
+    return UREG(REG_TYPE_R, bit - 1);
+}
+
 GLuint i915_emit_texld( struct i915_fragment_program *p,
+			GLuint live_regs,               
 			GLuint dest,
 			GLuint destmask,
 			GLuint sampler,
 			GLuint coord,
 			GLuint op )
 {
-   if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
-      /* No real way to work around this in the general case - need to
-       * allocate and declare a new temporary register (a utemp won't
-       * do).  Will fallback for now.
-       */
-      i915_program_error(p, "Can't (yet) swizzle TEX arguments");
-      return 0;
-   }
-
-   /* Don't worry about saturate as we only support  
+    if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
+        /* With the help of the "needed registers" table created earlier, pick
+         * a register we can MOV the swizzled TC to (since TEX doesn't support
+         * swizzled sources) */
+        GLuint swizCoord = get_free_rreg(p, live_regs);
+        if (swizCoord == UREG_BAD) 
+            return 0;
+
+        i915_emit_arith( p, A0_MOV, swizCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0 );
+        coord = swizCoord;
+    }
+
+   /* Don't worry about saturate as we only support texture formats
+    * that are always in the 0..1 range.
     */
    if (destmask != A0_DEST_CHANNEL_ALL) {
       GLuint tmp = i915_get_utemp(p);
-      i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
+      i915_emit_texld( p, 0, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
       i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
       return dest;
    }
    else {
       assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
       assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
+      /* Can't use unsaved temps for coords, as the phase boundary would result
+       * in the contents becoming undefined.
+       */
+      assert(GET_UREG_TYPE(coord) != REG_TYPE_U);
+
+      if ((GET_UREG_TYPE(coord) != REG_TYPE_R) &&
+          (GET_UREG_TYPE(coord) != REG_TYPE_OC) &&
+          (GET_UREG_TYPE(coord) != REG_TYPE_OD) &&
+          (GET_UREG_TYPE(coord) != REG_TYPE_T)) {
+          GLuint  tmpCoord = get_free_rreg(p, live_regs);
+          
+          if (tmpCoord == UREG_BAD) 
+              return 0;
+
+          i915_emit_arith(p, A0_MOV, tmpCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0);
+          coord = tmpCoord;
+      }
 
-      if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
+      /* Output register being oC or oD defines a phase boundary */
+      if (GET_UREG_TYPE(dest) == REG_TYPE_OC ||
+	  GET_UREG_TYPE(dest) == REG_TYPE_OD)
+	 p->nr_tex_indirect++;
+
+      /* Reading from an r# register whose contents depend on output of the
+       * current phase defines a phase boundary.
+       */
+      if (GET_UREG_TYPE(coord) == REG_TYPE_R &&
+	  p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect)
 	 p->nr_tex_indirect++;
-      }
 
       *(p->csr++) = (op | 
 		     T0_DEST( dest ) |
@@ -233,30 +277,37 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
       *(p->csr++) = T1_ADDRESS_REG( coord );
       *(p->csr++) = T2_MBZ;
 
+      if (GET_UREG_TYPE(dest) == REG_TYPE_R)
+	 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect;
+
       p->nr_tex_insn++;
       return dest;
    }
 }
 
 
-GLuint i915_emit_const1f( struct i915_fragment_program *p, GLfloat c0 )
+GLuint
+i915_emit_const1f(struct i915_fragment_program * p, GLfloat c0)
 {
    GLint reg, idx;
 
-   if (c0 == 0.0) return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
-   if (c0 == 1.0) return swizzle(UREG(REG_TYPE_R, 0), ONE,  ONE,  ONE,  ONE );
+   if (c0 == 0.0)
+      return swizzle(UREG(REG_TYPE_R, 0), ZERO, ZERO, ZERO, ZERO);
+   if (c0 == 1.0)
+      return swizzle(UREG(REG_TYPE_R, 0), ONE, ONE, ONE, ONE);
 
    for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
       if (p->constant_flags[reg] == I915_CONSTFLAG_PARAM)
-	 continue;
+         continue;
       for (idx = 0; idx < 4; idx++) {
-	 if (!(p->constant_flags[reg] & (1<<idx)) ||
-	     p->constant[reg][idx] == c0) {
-	    p->constant[reg][idx] = c0;
-	    p->constant_flags[reg] |= 1<<idx;
-	    if (reg+1 > p->nr_constants) p->nr_constants = reg+1;
-	    return swizzle(UREG(REG_TYPE_CONST, reg),idx,ZERO,ZERO,ONE);
-	 }
+         if (!(p->constant_flags[reg] & (1 << idx)) ||
+             p->constant[reg][idx] == c0) {
+            p->constant[reg][idx] = c0;
+            p->constant_flags[reg] |= 1 << idx;
+            if (reg + 1 > p->nr_constants)
+               p->nr_constants = reg + 1;
+            return swizzle(UREG(REG_TYPE_CONST, reg), idx, ZERO, ZERO, ONE);
+         }
       }
    }
 
@@ -265,29 +316,35 @@ GLuint i915_emit_const1f( struct i915_fragment_program *p, GLfloat c0 )
    return 0;
 }
 
-GLuint i915_emit_const2f( struct i915_fragment_program *p, 
-			 GLfloat c0, GLfloat c1 )
+GLuint
+i915_emit_const2f(struct i915_fragment_program * p, GLfloat c0, GLfloat c1)
 {
    GLint reg, idx;
 
-   if (c0 == 0.0) return swizzle(i915_emit_const1f(p, c1), ZERO, X, Z, W);
-   if (c0 == 1.0) return swizzle(i915_emit_const1f(p, c1), ONE,  X, Z, W); 
+   if (c0 == 0.0)
+      return swizzle(i915_emit_const1f(p, c1), ZERO, X, Z, W);
+   if (c0 == 1.0)
+      return swizzle(i915_emit_const1f(p, c1), ONE, X, Z, W);
 
-   if (c1 == 0.0) return swizzle(i915_emit_const1f(p, c0), X, ZERO, Z, W);
-   if (c1 == 1.0) return swizzle(i915_emit_const1f(p, c0), X, ONE,  Z, W);
+   if (c1 == 0.0)
+      return swizzle(i915_emit_const1f(p, c0), X, ZERO, Z, W);
+   if (c1 == 1.0)
+      return swizzle(i915_emit_const1f(p, c0), X, ONE, Z, W);
 
    for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
       if (p->constant_flags[reg] == 0xf ||
-	  p->constant_flags[reg] == I915_CONSTFLAG_PARAM)
-	 continue;
+          p->constant_flags[reg] == I915_CONSTFLAG_PARAM)
+         continue;
       for (idx = 0; idx < 3; idx++) {
-	 if (!(p->constant_flags[reg] & (3<<idx))) {
-	    p->constant[reg][idx] = c0;
-	    p->constant[reg][idx+1] = c1;
-	    p->constant_flags[reg] |= 3<<idx;
-	    if (reg+1 > p->nr_constants) p->nr_constants = reg+1;
-	    return swizzle(UREG(REG_TYPE_CONST, reg),idx,idx+1,ZERO,ONE);
-	 }
+         if (!(p->constant_flags[reg] & (3 << idx))) {
+            p->constant[reg][idx] = c0;
+            p->constant[reg][idx + 1] = c1;
+            p->constant_flags[reg] |= 3 << idx;
+            if (reg + 1 > p->nr_constants)
+               p->nr_constants = reg + 1;
+            return swizzle(UREG(REG_TYPE_CONST, reg), idx, idx + 1, ZERO,
+                           ONE);
+         }
       }
    }
 
@@ -298,27 +355,28 @@ GLuint i915_emit_const2f( struct i915_fragment_program *p,
 
 
 
-GLuint i915_emit_const4f( struct i915_fragment_program *p, 
-			 GLfloat c0, GLfloat c1, GLfloat c2, GLfloat c3 )
+GLuint
+i915_emit_const4f(struct i915_fragment_program * p,
+                  GLfloat c0, GLfloat c1, GLfloat c2, GLfloat c3)
 {
    GLint reg;
 
    for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
       if (p->constant_flags[reg] == 0xf &&
-	  p->constant[reg][0] == c0 &&
-	  p->constant[reg][1] == c1 &&
-	  p->constant[reg][2] == c2 &&
-	  p->constant[reg][3] == c3) {
-	 return UREG(REG_TYPE_CONST, reg);
+          p->constant[reg][0] == c0 &&
+          p->constant[reg][1] == c1 &&
+          p->constant[reg][2] == c2 && p->constant[reg][3] == c3) {
+         return UREG(REG_TYPE_CONST, reg);
       }
       else if (p->constant_flags[reg] == 0) {
-	 p->constant[reg][0] = c0;
-	 p->constant[reg][1] = c1;
-	 p->constant[reg][2] = c2;
-	 p->constant[reg][3] = c3;
-	 p->constant_flags[reg] = 0xf;
-	 if (reg+1 > p->nr_constants) p->nr_constants = reg+1;
-	 return UREG(REG_TYPE_CONST, reg);
+         p->constant[reg][0] = c0;
+         p->constant[reg][1] = c1;
+         p->constant[reg][2] = c2;
+         p->constant[reg][3] = c3;
+         p->constant_flags[reg] = 0xf;
+         if (reg + 1 > p->nr_constants)
+            p->nr_constants = reg + 1;
+         return UREG(REG_TYPE_CONST, reg);
       }
    }
 
@@ -328,34 +386,36 @@ GLuint i915_emit_const4f( struct i915_fragment_program *p,
 }
 
 
-GLuint i915_emit_const4fv( struct i915_fragment_program *p, const GLfloat *c )
+GLuint
+i915_emit_const4fv(struct i915_fragment_program * p, const GLfloat * c)
 {
-   return i915_emit_const4f( p, c[0], c[1], c[2], c[3] );
+   return i915_emit_const4f(p, c[0], c[1], c[2], c[3]);
 }
 
 
-GLuint i915_emit_param4fv( struct i915_fragment_program *p, 
-			  const GLfloat *values )
+GLuint
+i915_emit_param4fv(struct i915_fragment_program * p, const GLfloat * values)
 {
    GLint reg, i;
 
    for (i = 0; i < p->nr_params; i++) {
       if (p->param[i].values == values)
-	 return UREG(REG_TYPE_CONST, p->param[i].reg);
+         return UREG(REG_TYPE_CONST, p->param[i].reg);
    }
 
 
    for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
       if (p->constant_flags[reg] == 0) {
-	 p->constant_flags[reg] = I915_CONSTFLAG_PARAM;
-	 i = p->nr_params++;
+         p->constant_flags[reg] = I915_CONSTFLAG_PARAM;
+         i = p->nr_params++;
 
-	 p->param[i].values = values;
-	 p->param[i].reg = reg;
-	 p->params_uptodate = 0;
+         p->param[i].values = values;
+         p->param[i].reg = reg;
+         p->params_uptodate = 0;
 
-	 if (reg+1 > p->nr_constants) p->nr_constants = reg+1;
-	 return UREG(REG_TYPE_CONST, reg);
+         if (reg + 1 > p->nr_constants)
+            p->nr_constants = reg + 1;
+         return UREG(REG_TYPE_CONST, reg);
       }
    }
 
@@ -366,30 +426,32 @@ GLuint i915_emit_param4fv( struct i915_fragment_program *p,
 
 
 
-
-void i915_program_error( struct i915_fragment_program *p, const char *msg )
+void
+i915_program_error(struct i915_fragment_program *p, const char *msg)
 {
    _mesa_problem(NULL, "i915_program_error: %s", msg);
    p->error = 1;
 }
 
-void i915_init_program( i915ContextPtr i915, struct i915_fragment_program *p )
+
+void
+i915_init_program(struct i915_context *i915, struct i915_fragment_program *p)
 {
    GLcontext *ctx = &i915->intel.ctx;
-   TNLcontext *tnl = TNL_CONTEXT( ctx );
-   
+
    p->translated = 0;
    p->params_uptodate = 0;
    p->on_hardware = 0;
    p->error = 0;
 
-   p->nr_tex_indirect = 1;	/* correct? */
+   memset(&p->register_phases, 0, sizeof(p->register_phases));
+   p->nr_tex_indirect = 1;
    p->nr_tex_insn = 0;
    p->nr_alu_insn = 0;
    p->nr_decl_insn = 0;
 
-   p->ctx = ctx;  
-   memset( p->constant_flags, 0, sizeof(p->constant_flags) );
+   p->ctx = ctx;
+   memset(p->constant_flags, 0, sizeof(p->constant_flags));
 
    p->nr_constants = 0;
    p->csr = p->program;
@@ -402,21 +464,17 @@ void i915_init_program( i915ContextPtr i915, struct i915_fragment_program *p )
    p->depth_written = 0;
    p->nr_params = 0;
 
-   p->src_texture = UREG_BAD;
-   p->src_previous = UREG(REG_TYPE_T, T_DIFFUSE);
-   p->last_tex_stage = 0;
-   p->VB = &tnl->vb;
-
    *(p->decl++) = _3DSTATE_PIXEL_SHADER_PROGRAM;
 }
 
 
-void i915_fini_program( struct i915_fragment_program *p )
+void
+i915_fini_program(struct i915_fragment_program *p)
 {
    GLuint program_size = p->csr - p->program;
    GLuint decl_size = p->decl - p->declarations;
-   
-   if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT) 
+
+   if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT)
       i915_program_error(p, "Exceeded max nr indirect texture lookups");
 
    if (p->nr_tex_insn > I915_MAX_TEX_INSN)
@@ -446,22 +504,24 @@ void i915_fini_program( struct i915_fragment_program *p )
    p->declarations[0] |= program_size + decl_size - 2;
 }
 
-void i915_upload_program( i915ContextPtr i915, struct i915_fragment_program *p )
+void
+i915_upload_program(struct i915_context *i915,
+                    struct i915_fragment_program *p)
 {
    GLuint program_size = p->csr - p->program;
    GLuint decl_size = p->decl - p->declarations;
 
-   FALLBACK( &i915->intel, I915_FALLBACK_PROGRAM, p->error );
+   FALLBACK(&i915->intel, I915_FALLBACK_PROGRAM, p->error);
 
    /* Could just go straight to the batchbuffer from here:
     */
    if (i915->state.ProgramSize != (program_size + decl_size) ||
-       memcmp(i915->state.Program + decl_size, p->program, 
-	      program_size*sizeof(int)) != 0) {
-      I915_STATECHANGE( i915, I915_UPLOAD_PROGRAM );
-      memcpy(i915->state.Program, p->declarations, decl_size*sizeof(int));
+       memcmp(i915->state.Program + decl_size, p->program,
+              program_size * sizeof(int)) != 0) {
+      I915_STATECHANGE(i915, I915_UPLOAD_PROGRAM);
+      memcpy(i915->state.Program, p->declarations, decl_size * sizeof(int));
       memcpy(i915->state.Program + decl_size, p->program,
-	     program_size*sizeof(int));
+             program_size * sizeof(int));
       i915->state.ProgramSize = decl_size + program_size;
    }
 
@@ -470,30 +530,28 @@ void i915_upload_program( i915ContextPtr i915, struct i915_fragment_program *p )
     */
    if (p->nr_constants) {
       GLuint nr = p->nr_constants;
-      
-      I915_ACTIVESTATE( i915, I915_UPLOAD_CONSTANTS, 1 );
-      I915_STATECHANGE( i915, I915_UPLOAD_CONSTANTS );
+
+      I915_ACTIVESTATE(i915, I915_UPLOAD_CONSTANTS, 1);
+      I915_STATECHANGE(i915, I915_UPLOAD_CONSTANTS);
 
       i915->state.Constant[0] = _3DSTATE_PIXEL_SHADER_CONSTANTS | ((nr) * 4);
-      i915->state.Constant[1] = (1<<(nr-1)) | ((1<<(nr-1))-1);
-      
-      memcpy(&i915->state.Constant[2], p->constant, 4*sizeof(int)*(nr));
+      i915->state.Constant[1] = (1 << (nr - 1)) | ((1 << (nr - 1)) - 1);
+
+      memcpy(&i915->state.Constant[2], p->constant, 4 * sizeof(int) * (nr));
       i915->state.ConstantSize = 2 + (nr) * 4;
 
       if (0) {
-	 GLuint i;
-	 for (i = 0; i < nr; i++) {
-	    fprintf(stderr, "const[%d]: %f %f %f %f\n", i, 
-		    p->constant[i][0],
-		    p->constant[i][1],
-		    p->constant[i][2],
-		    p->constant[i][3]);
-	 }
+         GLuint i;
+         for (i = 0; i < nr; i++) {
+            fprintf(stderr, "const[%d]: %f %f %f %f\n", i,
+                    p->constant[i][0],
+                    p->constant[i][1], p->constant[i][2], p->constant[i][3]);
+         }
       }
    }
    else {
-      I915_ACTIVESTATE( i915, I915_UPLOAD_CONSTANTS, 0 );
-   }  
+      I915_ACTIVESTATE(i915, I915_UPLOAD_CONSTANTS, 0);
+   }
 
    p->on_hardware = 1;
 }
diff --git a/src/mesa/drivers/dri/i915/i915_program.h b/src/mesa/drivers/dri/i915/i915_program.h
index 8891a177855..14a3f08801f 100644
--- a/src/mesa/drivers/dri/i915/i915_program.h
+++ b/src/mesa/drivers/dri/i915/i915_program.h
@@ -48,11 +48,11 @@
 #define UREG_CHANNEL_W_NEGATE_SHIFT   11
 #define UREG_CHANNEL_W_SHIFT          8
 #define UREG_CHANNEL_ZERO_NEGATE_MBZ  5
-#define UREG_CHANNEL_ZERO_SHIFT       4      
+#define UREG_CHANNEL_ZERO_SHIFT       4
 #define UREG_CHANNEL_ONE_NEGATE_MBZ   1
-#define UREG_CHANNEL_ONE_SHIFT        0      
+#define UREG_CHANNEL_ONE_SHIFT        0
 
-#define UREG_BAD          0xffffffff /* not a valid ureg */
+#define UREG_BAD          0xffffffff    /* not a valid ureg */
 
 #define X    SRC_X
 #define Y    SRC_Y
@@ -84,78 +84,76 @@
 
 /* One neat thing about the UREG representation:  
  */
-static __inline int swizzle( int reg, int x, int y, int z, int w )
+static INLINE int
+swizzle(int reg, int x, int y, int z, int w)
 {
    return ((reg & ~UREG_XYZW_CHANNEL_MASK) |
-	   CHANNEL_SRC( GET_CHANNEL_SRC( reg, x ), 0 ) |
-	   CHANNEL_SRC( GET_CHANNEL_SRC( reg, y ), 1 ) |
-	   CHANNEL_SRC( GET_CHANNEL_SRC( reg, z ), 2 ) |
-	   CHANNEL_SRC( GET_CHANNEL_SRC( reg, w ), 3 ));
+           CHANNEL_SRC(GET_CHANNEL_SRC(reg, x), 0) |
+           CHANNEL_SRC(GET_CHANNEL_SRC(reg, y), 1) |
+           CHANNEL_SRC(GET_CHANNEL_SRC(reg, z), 2) |
+           CHANNEL_SRC(GET_CHANNEL_SRC(reg, w), 3));
 }
 
 /* Another neat thing about the UREG representation:  
  */
-static __inline int negate( int reg, int x, int y, int z, int w )
+static INLINE int
+negate(int reg, int x, int y, int z, int w)
 {
-   return reg ^ (((x&1)<<UREG_CHANNEL_X_NEGATE_SHIFT)|
-		 ((y&1)<<UREG_CHANNEL_Y_NEGATE_SHIFT)|
-		 ((z&1)<<UREG_CHANNEL_Z_NEGATE_SHIFT)|
-		 ((w&1)<<UREG_CHANNEL_W_NEGATE_SHIFT));
+   return reg ^ (((x & 1) << UREG_CHANNEL_X_NEGATE_SHIFT) |
+                 ((y & 1) << UREG_CHANNEL_Y_NEGATE_SHIFT) |
+                 ((z & 1) << UREG_CHANNEL_Z_NEGATE_SHIFT) |
+                 ((w & 1) << UREG_CHANNEL_W_NEGATE_SHIFT));
 }
 
 
-extern GLuint i915_get_temp( struct i915_fragment_program *p );
-extern GLuint i915_get_utemp( struct i915_fragment_program *p );
-extern void i915_release_utemps( struct i915_fragment_program *p );
+extern GLuint i915_get_temp(struct i915_fragment_program *p);
+extern GLuint i915_get_utemp(struct i915_fragment_program *p);
+extern void i915_release_utemps(struct i915_fragment_program *p);
 
 
-extern GLuint i915_emit_texld( struct i915_fragment_program *p,
-			      GLuint dest,
-			      GLuint destmask,
-			      GLuint sampler,
-			      GLuint coord,
-			      GLuint op );
+extern GLuint i915_emit_texld(struct i915_fragment_program *p,
+                              GLuint live_regs,
+                              GLuint dest,
+                              GLuint destmask,
+                              GLuint sampler, GLuint coord, GLuint op);
 
-extern GLuint i915_emit_arith( struct i915_fragment_program *p,
-			      GLuint op,
-			      GLuint dest,
-			      GLuint mask,
-			      GLuint saturate,
-			      GLuint src0,
-			      GLuint src1,
-			      GLuint src2 );
+extern GLuint i915_emit_arith(struct i915_fragment_program *p,
+                              GLuint op,
+                              GLuint dest,
+                              GLuint mask,
+                              GLuint saturate,
+                              GLuint src0, GLuint src1, GLuint src2);
 
-extern GLuint i915_emit_decl( struct i915_fragment_program *p,
-			     GLuint type, GLuint nr, GLuint d0_flags );
+extern GLuint i915_emit_decl(struct i915_fragment_program *p,
+                             GLuint type, GLuint nr, GLuint d0_flags);
 
 
-extern GLuint i915_emit_const1f( struct i915_fragment_program *p, 
-				GLfloat c0 );
+extern GLuint i915_emit_const1f(struct i915_fragment_program *p, GLfloat c0);
 
-extern GLuint i915_emit_const2f( struct i915_fragment_program *p, 
-				GLfloat c0, GLfloat c1 );
+extern GLuint i915_emit_const2f(struct i915_fragment_program *p,
+                                GLfloat c0, GLfloat c1);
 
-extern GLuint i915_emit_const4fv( struct i915_fragment_program *p,
-				 const GLfloat *c );
+extern GLuint i915_emit_const4fv(struct i915_fragment_program *p,
+                                 const GLfloat * c);
 
-extern GLuint i915_emit_const4f( struct i915_fragment_program *p, 
-				GLfloat c0, GLfloat c1, 
-				GLfloat c2, GLfloat c3 );
+extern GLuint i915_emit_const4f(struct i915_fragment_program *p,
+                                GLfloat c0, GLfloat c1,
+                                GLfloat c2, GLfloat c3);
 
 
-extern GLuint i915_emit_param4fv( struct i915_fragment_program *p, 
-				 const GLfloat *values );
+extern GLuint i915_emit_param4fv(struct i915_fragment_program *p,
+                                 const GLfloat * values);
 
-extern void i915_program_error( struct i915_fragment_program *p,
-                                const char *msg );
+extern void i915_program_error(struct i915_fragment_program *p,
+                               const char *msg);
 
-extern void i915_init_program( i915ContextPtr i915,
-			      struct i915_fragment_program *p );
+extern void i915_init_program(struct i915_context *i915,
+                              struct i915_fragment_program *p);
 
-extern void i915_upload_program( i915ContextPtr i915, 
-				struct i915_fragment_program *p );
+extern void i915_upload_program(struct i915_context *i915,
+                                struct i915_fragment_program *p);
 
-extern void i915_fini_program( struct i915_fragment_program *p );
+extern void i915_fini_program(struct i915_fragment_program *p);
 
 
 
diff --git a/src/mesa/drivers/dri/i915/i915_reg.h b/src/mesa/drivers/dri/i915/i915_reg.h
index 694cd4c8c3c..8891e11c6fd 100644
--- a/src/mesa/drivers/dri/i915/i915_reg.h
+++ b/src/mesa/drivers/dri/i915/i915_reg.h
@@ -34,8 +34,6 @@
 
 #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
 
-#define CMD_3D (0x3<<29)
-
 #define PRIM3D_INLINE		(CMD_3D | (0x1f<<24))
 #define PRIM3D_TRILIST		(0x0<<18)
 #define PRIM3D_TRISTRIP 	(0x1<<18)
@@ -112,6 +110,20 @@
 /* 3DSTATE_CHROMA_KEY */
 
 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
+/* 
+ * Sets the color, depth and stencil clear values used by the
+ * CLEAR_RECT and ZONE_INIT primitive types, respectively.  These
+ * primitives set override most 3d state and only take a minimal x/y
+ * vertex.  The color/z/stencil information is supplied here and
+ * therefore cannot vary per vertex.
+ */
+#define _3DSTATE_CLEAR_PARAMETERS	(CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
+/* Dword 1 */
+#define CLEARPARAM_CLEAR_RECT		(1 << 16)
+#define CLEARPARAM_ZONE_INIT		(0 << 16)
+#define CLEARPARAM_WRITE_COLOR		(1 << 2)
+#define CLEARPARAM_WRITE_DEPTH		(1 << 1)
+#define CLEARPARAM_WRITE_STENCIL	(1 << 0)
 
 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
 #define _3DSTATE_CONST_BLEND_COLOR_CMD	(CMD_3D | (0x1d<<24) | (0x88<<16))
@@ -313,120 +325,21 @@
 #define SCISSOR_RECT_0_YMAX(x)		((x)<<16)
 #define SCISSOR_RECT_0_XMAX(x)		(x)
 
-/* p189 */
-#define _3DSTATE_LOAD_STATE_IMMEDIATE_1   ((0x3<<29)|(0x1d<<24)|(0x04<<16))
-#define I1_LOAD_S(n)                      (1<<(4+n))
-
-#define S0_VB_OFFSET_MASK              0xffffffc
-#define S0_AUTO_CACHE_INV_DISABLE      (1<<0)
-
-#define S1_VERTEX_WIDTH_SHIFT          24
-#define S1_VERTEX_WIDTH_MASK           (0x3f<<24)
-#define S1_VERTEX_PITCH_SHIFT          16
-#define S1_VERTEX_PITCH_MASK           (0x3f<<16)
-
-#define TEXCOORDFMT_2D                 0x0
-#define TEXCOORDFMT_3D                 0x1
-#define TEXCOORDFMT_4D                 0x2
-#define TEXCOORDFMT_1D                 0x3
-#define TEXCOORDFMT_2D_16              0x4
-#define TEXCOORDFMT_4D_16              0x5
-#define TEXCOORDFMT_NOT_PRESENT        0xf
-#define S2_TEXCOORD_FMT0_MASK            0xf
-#define S2_TEXCOORD_FMT1_SHIFT           4
-#define S2_TEXCOORD_FMT(unit, type)    ((type)<<(unit*4))
-#define S2_TEXCOORD_NONE               (~0)
-
-/* S3 not interesting */
-
-#define S4_POINT_WIDTH_SHIFT           23
-#define S4_POINT_WIDTH_MASK            (0x1ff<<23)
-#define S4_LINE_WIDTH_SHIFT            19
-#define S4_LINE_WIDTH_ONE              (0x2<<19)
-#define S4_LINE_WIDTH_MASK             (0xf<<19)
-#define S4_FLATSHADE_ALPHA             (1<<18)
-#define S4_FLATSHADE_FOG               (1<<17)
-#define S4_FLATSHADE_SPECULAR          (1<<16)
-#define S4_FLATSHADE_COLOR             (1<<15)
-#define S4_CULLMODE_BOTH	       (0<<13)
-#define S4_CULLMODE_NONE	       (1<<13)
-#define S4_CULLMODE_CW		       (2<<13)
-#define S4_CULLMODE_CCW		       (3<<13)
-#define S4_CULLMODE_MASK	       (3<<13)
-#define S4_VFMT_POINT_WIDTH            (1<<12)
-#define S4_VFMT_SPEC_FOG               (1<<11)
-#define S4_VFMT_COLOR                  (1<<10)
-#define S4_VFMT_DEPTH_OFFSET           (1<<9)
-#define S4_VFMT_XYZ     	       (1<<6)
-#define S4_VFMT_XYZW     	       (2<<6)
-#define S4_VFMT_XY     		       (3<<6)
-#define S4_VFMT_XYW     	       (4<<6)
-#define S4_VFMT_XYZW_MASK              (7<<6)
-#define S4_FORCE_DEFAULT_DIFFUSE       (1<<5)
-#define S4_FORCE_DEFAULT_SPECULAR      (1<<4)
-#define S4_LOCAL_DEPTH_OFFSET_ENABLE   (1<<3)
-#define S4_VFMT_FOG_PARAM              (1<<2)
-#define S4_SPRITE_POINT_ENABLE         (1<<1)
-#define S4_LINE_ANTIALIAS_ENABLE       (1<<0)
-
-#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH   | 	\
-		      S4_VFMT_SPEC_FOG      |	\
-		      S4_VFMT_COLOR         |	\
-		      S4_VFMT_DEPTH_OFFSET  |	\
-		      S4_VFMT_XYZW_MASK     |	\
-		      S4_VFMT_FOG_PARAM)
-
-
-#define S5_WRITEDISABLE_ALPHA          (1<<31)
-#define S5_WRITEDISABLE_RED            (1<<30)
-#define S5_WRITEDISABLE_GREEN          (1<<29)
-#define S5_WRITEDISABLE_BLUE           (1<<28)
-#define S5_WRITEDISABLE_MASK           (0xf<<28)
-#define S5_FORCE_DEFAULT_POINT_SIZE    (1<<27)
-#define S5_LAST_PIXEL_ENABLE           (1<<26)
-#define S5_GLOBAL_DEPTH_OFFSET_ENABLE  (1<<25)
-#define S5_FOG_ENABLE                  (1<<24)
-#define S5_STENCIL_REF_SHIFT           16
-#define S5_STENCIL_REF_MASK            (0xff<<16)
-#define S5_STENCIL_TEST_FUNC_SHIFT     13
-#define S5_STENCIL_TEST_FUNC_MASK      (0x7<<13)
-#define S5_STENCIL_FAIL_SHIFT          10
-#define S5_STENCIL_FAIL_MASK           (0x7<<10)
-#define S5_STENCIL_PASS_Z_FAIL_SHIFT   7
-#define S5_STENCIL_PASS_Z_FAIL_MASK    (0x7<<7)
-#define S5_STENCIL_PASS_Z_PASS_SHIFT   4
-#define S5_STENCIL_PASS_Z_PASS_MASK    (0x7<<4)
-#define S5_STENCIL_WRITE_ENABLE        (1<<3)
-#define S5_STENCIL_TEST_ENABLE         (1<<2)
-#define S5_COLOR_DITHER_ENABLE         (1<<1)
-#define S5_LOGICOP_ENABLE              (1<<0)
-
-
-#define S6_ALPHA_TEST_ENABLE           (1<<31)
-#define S6_ALPHA_TEST_FUNC_SHIFT       28
-#define S6_ALPHA_TEST_FUNC_MASK        (0x7<<28)
-#define S6_ALPHA_REF_SHIFT             20
-#define S6_ALPHA_REF_MASK              (0xff<<20)
-#define S6_DEPTH_TEST_ENABLE           (1<<19)
-#define S6_DEPTH_TEST_FUNC_SHIFT       16
-#define S6_DEPTH_TEST_FUNC_MASK        (0x7<<16)
-#define S6_CBUF_BLEND_ENABLE           (1<<15)
-#define S6_CBUF_BLEND_FUNC_SHIFT       12
-#define S6_CBUF_BLEND_FUNC_MASK        (0x7<<12)
-#define S6_CBUF_SRC_BLEND_FACT_SHIFT   8
-#define S6_CBUF_SRC_BLEND_FACT_MASK    (0xf<<8)
-#define S6_CBUF_DST_BLEND_FACT_SHIFT   4
-#define S6_CBUF_DST_BLEND_FACT_MASK    (0xf<<4)
-#define S6_DEPTH_WRITE_ENABLE          (1<<3)
-#define S6_COLOR_WRITE_ENABLE          (1<<2)
-#define S6_TRISTRIP_PV_SHIFT           0
-#define S6_TRISTRIP_PV_MASK            (0x3<<0)
-
-#define S7_DEPTH_OFFSET_CONST_MASK     ~0
+/* Helper macros for blend factors
+ */
+#define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
+#define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
+#define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
+#define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
+
+
+
 
 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
-/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
 
+/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
+#define _3DSTATE_MAP_PALETTE_LOAD_32    (CMD_3D|(0x1d<<24)|(0x8f<<16))
+/* subsequent dwords up to length (max 16) are ARGB8888 color values */
 
 /* _3DSTATE_MODES_4, p218 */
 #define _3DSTATE_MODES_4_CMD		(CMD_3D|(0x0d<<24))
@@ -435,7 +348,7 @@
 #define LOGICOP_MASK			(0xf<<18)
 #define MODE4_ENABLE_STENCIL_TEST_MASK	((1<<17)|(0xff00))
 #define ENABLE_STENCIL_TEST_MASK	(1<<17)
-#define STENCIL_TEST_MASK(x)		((x)<<8)
+#define STENCIL_TEST_MASK(x)		(((x)&0xff)<<8)
 #define MODE4_ENABLE_STENCIL_WRITE_MASK	((1<<16)|(0x00ff))
 #define ENABLE_STENCIL_WRITE_MASK	(1<<16)
 #define STENCIL_WRITE_MASK(x)		((x)&0xff)
@@ -458,7 +371,7 @@
 
 
 #define I915_MAX_TEX_INDIRECT 4
-#define I915_MAX_TEX_INSN     32     
+#define I915_MAX_TEX_INSN     32
 #define I915_MAX_ALU_INSN     64
 #define I915_MAX_DECL_INSN    27
 #define I915_MAX_TEMPORARY    16
@@ -470,33 +383,33 @@
  */
 #define _3DSTATE_PIXEL_SHADER_PROGRAM    (CMD_3D|(0x1d<<24)|(0x5<<16))
 
-#define REG_TYPE_R                 0 /* temporary regs, no need to
-				      * dcl, must be written before
-				      * read -- Preserved between
-				      * phases. 
-				      */
-#define REG_TYPE_T                 1 /* Interpolated values, must be
-				      * dcl'ed before use.
-				      *
-				      * 0..7: texture coord,
-				      * 8: diffuse spec,
-				      * 9: specular color,
-				      * 10: fog parameter in w.
-				      */
-#define REG_TYPE_CONST             2 /* Restriction: only one const
-				      * can be referenced per
-				      * instruction, though it may be
-				      * selected for multiple inputs.
-				      * Constants not initialized
-				      * default to zero.
-				      */
-#define REG_TYPE_S                 3 /* sampler */
-#define REG_TYPE_OC                4 /* output color (rgba) */
-#define REG_TYPE_OD                5 /* output depth (w), xyz are
-				      * temporaries.  If not written,
-				      * interpolated depth is used?
-				      */
-#define REG_TYPE_U                 6 /* unpreserved temporaries */
+#define REG_TYPE_R                 0    /* temporary regs, no need to
+                                         * dcl, must be written before
+                                         * read -- Preserved between
+                                         * phases. 
+                                         */
+#define REG_TYPE_T                 1    /* Interpolated values, must be
+                                         * dcl'ed before use.
+                                         *
+                                         * 0..7: texture coord,
+                                         * 8: diffuse spec,
+                                         * 9: specular color,
+                                         * 10: fog parameter in w.
+                                         */
+#define REG_TYPE_CONST             2    /* Restriction: only one const
+                                         * can be referenced per
+                                         * instruction, though it may be
+                                         * selected for multiple inputs.
+                                         * Constants not initialized
+                                         * default to zero.
+                                         */
+#define REG_TYPE_S                 3    /* sampler */
+#define REG_TYPE_OC                4    /* output color (rgba) */
+#define REG_TYPE_OD                5    /* output depth (w), xyz are
+                                         * temporaries.  If not written,
+                                         * interpolated depth is used?
+                                         */
+#define REG_TYPE_U                 6    /* unpreserved temporaries */
 #define REG_TYPE_MASK              0x7
 #define REG_NR_MASK                0xf
 
@@ -513,34 +426,34 @@
 #define T_TEX7     7
 #define T_DIFFUSE  8
 #define T_SPECULAR 9
-#define T_FOG_W    10		/* interpolated fog is in W coord */
+#define T_FOG_W    10           /* interpolated fog is in W coord */
 
 /* Arithmetic instructions */
 
 /* .replicate_swizzle == selection and replication of a particular
  * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww 
  */
-#define A0_NOP    (0x0<<24)		/* no operation */
-#define A0_ADD    (0x1<<24)		/* dst = src0 + src1 */
-#define A0_MOV    (0x2<<24)		/* dst = src0 */
-#define A0_MUL    (0x3<<24)		/* dst = src0 * src1 */
-#define A0_MAD    (0x4<<24)		/* dst = src0 * src1 + src2 */
-#define A0_DP2ADD (0x5<<24)		/* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
-#define A0_DP3    (0x6<<24)		/* dst.xyzw = src0.xyz dot src1.xyz */
-#define A0_DP4    (0x7<<24)		/* dst.xyzw = src0.xyzw dot src1.xyzw */
-#define A0_FRC    (0x8<<24)		/* dst = src0 - floor(src0) */
-#define A0_RCP    (0x9<<24)		/* dst.xyzw = 1/(src0.replicate_swizzle) */
-#define A0_RSQ    (0xa<<24)		/* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
-#define A0_EXP    (0xb<<24)		/* dst.xyzw = exp2(src0.replicate_swizzle) */
-#define A0_LOG    (0xc<<24)		/* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
-#define A0_CMP    (0xd<<24)		/* dst = (src0 >= 0.0) ? src1 : src2 */
-#define A0_MIN    (0xe<<24)		/* dst = (src0 < src1) ? src0 : src1 */
-#define A0_MAX    (0xf<<24)		/* dst = (src0 >= src1) ? src0 : src1 */
-#define A0_FLR    (0x10<<24)		/* dst = floor(src0) */
-#define A0_MOD    (0x11<<24)		/* dst = src0 fmod 1.0 */
-#define A0_TRC    (0x12<<24)		/* dst = int(src0) */
-#define A0_SGE    (0x13<<24)		/* dst = src0 >= src1 ? 1.0 : 0.0 */
-#define A0_SLT    (0x14<<24)		/* dst = src0 < src1 ? 1.0 : 0.0 */
+#define A0_NOP    (0x0<<24)     /* no operation */
+#define A0_ADD    (0x1<<24)     /* dst = src0 + src1 */
+#define A0_MOV    (0x2<<24)     /* dst = src0 */
+#define A0_MUL    (0x3<<24)     /* dst = src0 * src1 */
+#define A0_MAD    (0x4<<24)     /* dst = src0 * src1 + src2 */
+#define A0_DP2ADD (0x5<<24)     /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
+#define A0_DP3    (0x6<<24)     /* dst.xyzw = src0.xyz dot src1.xyz */
+#define A0_DP4    (0x7<<24)     /* dst.xyzw = src0.xyzw dot src1.xyzw */
+#define A0_FRC    (0x8<<24)     /* dst = src0 - floor(src0) */
+#define A0_RCP    (0x9<<24)     /* dst.xyzw = 1/(src0.replicate_swizzle) */
+#define A0_RSQ    (0xa<<24)     /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
+#define A0_EXP    (0xb<<24)     /* dst.xyzw = exp2(src0.replicate_swizzle) */
+#define A0_LOG    (0xc<<24)     /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
+#define A0_CMP    (0xd<<24)     /* dst = (src0 >= 0.0) ? src1 : src2 */
+#define A0_MIN    (0xe<<24)     /* dst = (src0 < src1) ? src0 : src1 */
+#define A0_MAX    (0xf<<24)     /* dst = (src0 >= src1) ? src0 : src1 */
+#define A0_FLR    (0x10<<24)    /* dst = floor(src0) */
+#define A0_MOD    (0x11<<24)    /* dst = src0 fmod 1.0 */
+#define A0_TRC    (0x12<<24)    /* dst = int(src0) */
+#define A0_SGE    (0x13<<24)    /* dst = src0 >= src1 ? 1.0 : 0.0 */
+#define A0_SLT    (0x14<<24)    /* dst = src0 < src1 ? 1.0 : 0.0 */
 #define A0_DEST_SATURATE                 (1<<22)
 #define A0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
@@ -599,23 +512,23 @@
 
 
 /* Texture instructions */
-#define T0_TEXLD     (0x15<<24)	/* Sample texture using predeclared
-				 * sampler and address, and output
-				 * filtered texel data to destination
-				 * register */
-#define T0_TEXLDP    (0x16<<24)	/* Same as texld but performs a
-				 * perspective divide of the texture
-				 * coordinate .xyz values by .w before
-				 * sampling. */
-#define T0_TEXLDB    (0x17<<24)	/* Same as texld but biases the
-				 * computed LOD by w.  Only S4.6 two's
-				 * comp is used.  This implies that a
-				 * float to fixed conversion is
-				 * done. */
-#define T0_TEXKILL   (0x18<<24)	/* Does not perform a sampling
-				 * operation.  Simply kills the pixel
-				 * if any channel of the address
-				 * register is < 0.0. */
+#define T0_TEXLD     (0x15<<24) /* Sample texture using predeclared
+                                 * sampler and address, and output
+                                 * filtered texel data to destination
+                                 * register */
+#define T0_TEXLDP    (0x16<<24) /* Same as texld but performs a
+                                 * perspective divide of the texture
+                                 * coordinate .xyz values by .w before
+                                 * sampling. */
+#define T0_TEXLDB    (0x17<<24) /* Same as texld but biases the
+                                 * computed LOD by w.  Only S4.6 two's
+                                 * comp is used.  This implies that a
+                                 * float to fixed conversion is
+                                 * done. */
+#define T0_TEXKILL   (0x18<<24) /* Does not perform a sampling
+                                 * operation.  Simply kills the pixel
+                                 * if any channel of the address
+                                 * register is < 0.0. */
 #define T0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
 /* Note: U (unpreserved) regs do not retain their values between
@@ -627,18 +540,18 @@
  */
 #define T0_DEST_NR_SHIFT                 14
 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
-#define T0_SAMPLER_NR_SHIFT              0 /* This field ignored for TEXKILL */
+#define T0_SAMPLER_NR_SHIFT              0      /* This field ignored for TEXKILL */
 #define T0_SAMPLER_NR_MASK               (0xf<<0)
 
-#define T1_ADDRESS_REG_TYPE_SHIFT        24 /* Reg to use as texture coord */
+#define T1_ADDRESS_REG_TYPE_SHIFT        24     /* Reg to use as texture coord */
 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
 #define T1_ADDRESS_REG_NR_SHIFT          17
 #define T2_MBZ                           0
 
 /* Declaration instructions */
-#define D0_DCL       (0x19<<24)	/* Declare a t (interpolated attrib)
-				 * register or an s (sampler)
-				 * register. */
+#define D0_DCL       (0x19<<24) /* Declare a t (interpolated attrib)
+                                 * register or an s (sampler)
+                                 * register. */
 #define D0_SAMPLE_TYPE_SHIFT              22
 #define D0_SAMPLE_TYPE_2D                 (0x0<<22)
 #define D0_SAMPLE_TYPE_CUBE               (0x1<<22)
@@ -695,12 +608,12 @@
 #define    MAPSURF_4BIT_INDEXED		   (7<<7)
 #define MS3_MT_FORMAT_MASK         (0x7 << 3)
 #define MS3_MT_FORMAT_SHIFT        3
-#define    MT_4BIT_IDX_ARGB8888	           (7<<3) /* SURFACE_4BIT_INDEXED */
-#define    MT_8BIT_I8		           (0<<3) /* SURFACE_8BIT */
+#define    MT_4BIT_IDX_ARGB8888	           (7<<3)       /* SURFACE_4BIT_INDEXED */
+#define    MT_8BIT_I8		           (0<<3)       /* SURFACE_8BIT */
 #define    MT_8BIT_L8		           (1<<3)
 #define    MT_8BIT_A8		           (4<<3)
 #define    MT_8BIT_MONO8	           (5<<3)
-#define    MT_16BIT_RGB565 		   (0<<3) /* SURFACE_16BIT */
+#define    MT_16BIT_RGB565 		   (0<<3)       /* SURFACE_16BIT */
 #define    MT_16BIT_ARGB1555		   (1<<3)
 #define    MT_16BIT_ARGB4444		   (2<<3)
 #define    MT_16BIT_AY88		   (3<<3)
@@ -709,7 +622,7 @@
 #define    MT_16BIT_I16	                   (7<<3)
 #define    MT_16BIT_L16	                   (8<<3)
 #define    MT_16BIT_A16	                   (9<<3)
-#define    MT_32BIT_ARGB8888		   (0<<3) /* SURFACE_32BIT */
+#define    MT_32BIT_ARGB8888		   (0<<3)       /* SURFACE_32BIT */
 #define    MT_32BIT_ABGR8888		   (1<<3)
 #define    MT_32BIT_XRGB8888		   (2<<3)
 #define    MT_32BIT_XBGR8888		   (3<<3)
@@ -725,11 +638,11 @@
 #define    MT_32BIT_xI824	           (0xD<<3)
 #define    MT_32BIT_xA824	           (0xE<<3)
 #define    MT_32BIT_xL824	           (0xF<<3)
-#define    MT_422_YCRCB_SWAPY	           (0<<3) /* SURFACE_422 */
+#define    MT_422_YCRCB_SWAPY	           (0<<3)       /* SURFACE_422 */
 #define    MT_422_YCRCB_NORMAL	           (1<<3)
 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
-#define    MT_COMPRESS_DXT1		   (0<<3) /* SURFACE_COMPRESSED */
+#define    MT_COMPRESS_DXT1		   (0<<3)       /* SURFACE_COMPRESSED */
 #define    MT_COMPRESS_DXT2_3	           (1<<3)
 #define    MT_COMPRESS_DXT4_5	           (2<<3)
 #define    MT_COMPRESS_FXT1		   (3<<3)
@@ -751,7 +664,7 @@
 #define MS4_MIP_LAYOUT_LEGACY           (0<<8)
 #define MS4_MIP_LAYOUT_BELOW_LPT        (0<<8)
 #define MS4_MIP_LAYOUT_RIGHT_LPT        (1<<8)
-#define MS4_VOLUME_DEPTH_SHIFT          0    
+#define MS4_VOLUME_DEPTH_SHIFT          0
 #define MS4_VOLUME_DEPTH_MASK           (0xff<<0)
 
 /* p244 */
@@ -779,7 +692,7 @@
 #define   FILTER_4X4_1    	3
 #define   FILTER_4X4_2    	4
 #define   FILTER_4X4_FLAT 	5
-#define   FILTER_6X5_MONO   	6 /* XXX - check */
+#define   FILTER_6X5_MONO   	6       /* XXX - check */
 #define SS2_MIN_FILTER_SHIFT          14
 #define SS2_MIN_FILTER_MASK           (0x7<<14)
 #define SS2_LOD_BIAS_SHIFT            5
@@ -826,10 +739,8 @@
 #define ST1_ENABLE               (1<<16)
 #define ST1_MASK                 (0xffff)
 
-
-#define MI_FLUSH           ((0<<29)|(4<<23))
-#define FLUSH_MAP_CACHE    (1<<0)
-#define FLUSH_RENDER_CACHE (1<<1)
-
+#define _3DSTATE_DEFAULT_Z          ((0x3<<29)|(0x1d<<24)|(0x98<<16))
+#define _3DSTATE_DEFAULT_DIFFUSE    ((0x3<<29)|(0x1d<<24)|(0x99<<16))
+#define _3DSTATE_DEFAULT_SPECULAR   ((0x3<<29)|(0x1d<<24)|(0x9a<<16))
 
 #endif
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 1c4ec747558..9d04358e4f3 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -26,11 +26,11 @@
  **************************************************************************/
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/dd.h"
 #include "tnl/tnl.h"
 #include "tnl/t_context.h"
 
@@ -38,97 +38,99 @@
 
 #include "drivers/common/driverfuncs.h"
 
+#include "intel_fbo.h"
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
 
 #include "i915_context.h"
 #include "i915_reg.h"
 
-
+#define FILE_DEBUG_FLAG DEBUG_STATE
 
 static void
-i915StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func, GLint ref,
+i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
                         GLuint mask)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   int test = intel_translate_compare_func( func );
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   int test = intel_translate_compare_func(func);
 
    mask = mask & 0xff;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
-	      _mesa_lookup_enum_by_nr(func), ref, mask);
+   DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(func), ref, mask);
 
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
-					 STENCIL_TEST_MASK(mask));
+                                           STENCIL_TEST_MASK(mask));
 
    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
-					S5_STENCIL_TEST_FUNC_MASK);
-					
-   i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |  
- 				       (test << S5_STENCIL_TEST_FUNC_SHIFT)); 
+                                          S5_STENCIL_TEST_FUNC_MASK);
+
+   i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
+                                         (test <<
+                                          S5_STENCIL_TEST_FUNC_SHIFT));
 }
 
 static void
-i915StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
+i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s : mask 0x%x\n", __FUNCTION__, mask);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
+   DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
+   
    mask = mask & 0xff;
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
-					STENCIL_WRITE_MASK(mask));
+                                           STENCIL_WRITE_MASK(mask));
 }
 
 
 static void
-i915StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail, GLenum zfail,
+i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
                       GLenum zpass)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   int fop = intel_translate_stencil_op(fail); 
-   int dfop = intel_translate_stencil_op(zfail); 
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   int fop = intel_translate_stencil_op(fail);
+   int dfop = intel_translate_stencil_op(zfail);
    int dpop = intel_translate_stencil_op(zpass);
 
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
-	      _mesa_lookup_enum_by_nr(fail),
-	      _mesa_lookup_enum_by_nr(zfail),
-	      _mesa_lookup_enum_by_nr(zpass));
+   DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(fail),
+       _mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
-					S5_STENCIL_PASS_Z_FAIL_MASK |
-					S5_STENCIL_PASS_Z_PASS_MASK);
+                                          S5_STENCIL_PASS_Z_FAIL_MASK |
+                                          S5_STENCIL_PASS_Z_PASS_MASK);
 
    i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
-				       (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
-				       (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
+                                         (dfop <<
+                                          S5_STENCIL_PASS_Z_FAIL_SHIFT) |
+                                         (dpop <<
+                                          S5_STENCIL_PASS_Z_PASS_SHIFT));
 }
 
-static void i915AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
+static void
+i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   int test = intel_translate_compare_func( func );
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   int test = intel_translate_compare_func(func);
    GLubyte refByte;
 
    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
-					S6_ALPHA_REF_MASK);
+                                          S6_ALPHA_REF_MASK);
    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
-				       (((GLuint)refByte) << S6_ALPHA_REF_SHIFT));
+                                         (((GLuint) refByte) <<
+                                          S6_ALPHA_REF_SHIFT));
 }
 
 /* This function makes sure that the proper enables are
@@ -137,41 +139,45 @@ static void i915AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
  * could change the LogicOp or Independant Alpha Blend without subsequent
  * calls to glEnable.
  */
-static void i915EvalLogicOpBlendState(GLcontext *ctx)
+static void
+i915EvalLogicOpBlendState(GLcontext * ctx)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
    if (RGBA_LOGICOP_ENABLED(ctx)) {
       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
-   } else {
+   }
+   else {
       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 
       if (ctx->Color.BlendEnabled) {
-	 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
-      } else {
-	 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
+      }
+      else {
+         i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
       }
    }
 }
 
-static void i915BlendColor(GLcontext *ctx, const GLfloat color[4])
+static void
+i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    GLubyte r, g, b, a;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
-   i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = (a<<24) | (r<<16) | (g<<8) | b;
+   i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
+      (a << 24) | (r << 16) | (g << 8) | b;
 }
 
 
@@ -182,31 +188,37 @@ static void i915BlendColor(GLcontext *ctx, const GLfloat color[4])
 
 
 
-static GLuint translate_blend_equation( GLenum mode )
+static GLuint
+translate_blend_equation(GLenum mode)
 {
    switch (mode) {
-   case GL_FUNC_ADD: return BLENDFUNC_ADD; 
-   case GL_MIN: return BLENDFUNC_MIN; 
-   case GL_MAX: return BLENDFUNC_MAX; 
-   case GL_FUNC_SUBTRACT: return BLENDFUNC_SUBTRACT; 
-   case GL_FUNC_REVERSE_SUBTRACT: return BLENDFUNC_REVERSE_SUBTRACT; 
-   default: return 0;
+   case GL_FUNC_ADD:
+      return BLENDFUNC_ADD;
+   case GL_MIN:
+      return BLENDFUNC_MIN;
+   case GL_MAX:
+      return BLENDFUNC_MAX;
+   case GL_FUNC_SUBTRACT:
+      return BLENDFUNC_SUBTRACT;
+   case GL_FUNC_REVERSE_SUBTRACT:
+      return BLENDFUNC_REVERSE_SUBTRACT;
+   default:
+      return 0;
    }
 }
 
-static void i915UpdateBlendState( GLcontext *ctx )
+static void
+i915UpdateBlendState(GLcontext * ctx)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] & 
-		 ~(IAB_SRC_FACTOR_MASK |
-		   IAB_DST_FACTOR_MASK |
-		   (BLENDFUNC_MASK << IAB_FUNC_SHIFT) |
-		   IAB_ENABLE));
-
-   GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] & 
-		  ~(S6_CBUF_SRC_BLEND_FACT_MASK |
-		    S6_CBUF_DST_BLEND_FACT_MASK |
-		    S6_CBUF_BLEND_FUNC_MASK));
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
+                 ~(IAB_SRC_FACTOR_MASK |
+                   IAB_DST_FACTOR_MASK |
+                   (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
+
+   GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
+                  ~(S6_CBUF_SRC_BLEND_FACT_MASK |
+                    S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 
    GLuint eqRGB = ctx->Color.BlendEquationRGB;
    GLuint eqA = ctx->Color.BlendEquationA;
@@ -223,15 +235,15 @@ static void i915UpdateBlendState( GLcontext *ctx )
       srcA = dstA = GL_ONE;
    }
 
-   lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB)); 
-   lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB)); 
-   lis6 |= translate_blend_equation( eqRGB ) << S6_CBUF_BLEND_FUNC_SHIFT;
+   lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
+   lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
+   lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 
-   iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA)); 
-   iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA)); 
-   iab |= translate_blend_equation( eqA ) << IAB_FUNC_SHIFT;
+   iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
+   iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
+   iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 
-   if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) 
+   if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
       iab |= IAB_ENABLE;
 
    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
@@ -246,41 +258,41 @@ static void i915UpdateBlendState( GLcontext *ctx )
 }
 
 
-static void i915BlendFuncSeparate(GLcontext *ctx, GLenum srcRGB, 
-				 GLenum dstRGB, GLenum srcA,
-				 GLenum dstA )
-{  
-   i915UpdateBlendState( ctx );
+static void
+i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
+                      GLenum dstRGB, GLenum srcA, GLenum dstA)
+{
+   i915UpdateBlendState(ctx);
 }
 
 
-static void i915BlendEquationSeparate(GLcontext *ctx, GLenum eqRGB,
-				     GLenum eqA) 
+static void
+i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 {
-   i915UpdateBlendState( ctx );
+   i915UpdateBlendState(ctx);
 }
 
 
-static void i915DepthFunc(GLcontext *ctx, GLenum func)
+static void
+i915DepthFunc(GLcontext * ctx, GLenum func)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   int test = intel_translate_compare_func( func );
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   int test = intel_translate_compare_func(func);
 
+   DBG("%s\n", __FUNCTION__);
+   
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 }
 
-static void i915DepthMask(GLcontext *ctx, GLboolean flag)
+static void
+i915DepthMask(GLcontext * ctx, GLboolean flag)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s flag (%d)\n", __FUNCTION__, flag);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
+   DBG("%s flag (%d)\n", __FUNCTION__, flag);
+   
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
    if (flag && ctx->Depth.Test)
@@ -295,14 +307,15 @@ static void i915DepthMask(GLcontext *ctx, GLboolean flag)
  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
  * Fortunately stipple is usually a repeating pattern.
  */
-static void i915PolygonStipple( GLcontext *ctx, const GLubyte *mask )
+static void
+i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   const GLubyte *m = mask;
+   struct i915_context *i915 = I915_CONTEXT(ctx);
+   const GLubyte *m;
    GLubyte p[4];
-   int i,j,k;
+   int i, j, k;
    int active = (ctx->Polygon.StippleFlag &&
-		 i915->intel.reduced_primitive == GL_TRIANGLES);
+                 i915->intel.reduced_primitive == GL_TRIANGLES);
    GLuint newMask;
 
    if (active) {
@@ -310,23 +323,32 @@ static void i915PolygonStipple( GLcontext *ctx, const GLubyte *mask )
       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
    }
 
-   p[0] = mask[12] & 0xf; p[0] |= p[0] << 4;
-   p[1] = mask[8] & 0xf; p[1] |= p[1] << 4;
-   p[2] = mask[4] & 0xf; p[2] |= p[2] << 4;
-   p[3] = mask[0] & 0xf; p[3] |= p[3] << 4;
-
-   for (k = 0 ; k < 8 ; k++)
-      for (j = 3 ; j >= 0; j--)
-	 for (i = 0 ; i < 4 ; i++, m++)
-	    if (*m != p[j]) {
-	       i915->intel.hw_stipple = 0;
-	       return;
-	    }
+   /* Use the already unpacked stipple data from the context rather than the
+    * uninterpreted mask passed in.
+    */
+   mask = (const GLubyte *)ctx->PolygonStipple;
+   m = mask;
+
+   p[0] = mask[12] & 0xf;
+   p[0] |= p[0] << 4;
+   p[1] = mask[8] & 0xf;
+   p[1] |= p[1] << 4;
+   p[2] = mask[4] & 0xf;
+   p[2] |= p[2] << 4;
+   p[3] = mask[0] & 0xf;
+   p[3] |= p[3] << 4;
+
+   for (k = 0; k < 8; k++)
+      for (j = 3; j >= 0; j--)
+         for (i = 0; i < 4; i++, m++)
+            if (*m != p[j]) {
+               i915->intel.hw_stipple = 0;
+               return;
+            }
 
    newMask = (((p[0] & 0xf) << 0) |
-	      ((p[1] & 0xf) << 4) |
-	      ((p[2] & 0xf) << 8) |
-	      ((p[3] & 0xf) << 12));
+              ((p[1] & 0xf) << 4) |
+              ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 
 
    if (newMask == 0xffff || newMask == 0x0) {
@@ -347,49 +369,54 @@ static void i915PolygonStipple( GLcontext *ctx, const GLubyte *mask )
 /* =============================================================
  * Hardware clipping
  */
-static void i915Scissor(GLcontext *ctx, GLint x, GLint y, 
-			GLsizei w, GLsizei h)
+static void
+i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   intelScreenPrivate *screen = i915->intel.intelScreen;
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    int x1, y1, x2, y2;
 
-   if (!i915->intel.driDrawable)
+   if (!ctx->DrawBuffer)
       return;
 
-   x1 = x;
-   y1 = i915->intel.driDrawable->h - (y + h);
-   x2 = x + w - 1;
-   y2 = y1 + h - 1;
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "[%s] x(%d) y(%d) w(%d) h(%d)\n", __FUNCTION__,
-	      x, y, w, h);
-
-   if (x1 < 0) x1 = 0;
-   if (y1 < 0) y1 = 0;
-   if (x2 < 0) x2 = 0;
-   if (y2 < 0) y2 = 0;
-
-   if (x2 >= screen->width) x2 = screen->width-1;
-   if (y2 >= screen->height) y2 = screen->height-1;
-   if (x1 >= screen->width) x1 = screen->width-1;
-   if (y1 >= screen->height) y1 = screen->height-1;
+   DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 
+   if (ctx->DrawBuffer->Name == 0) {
+      x1 = x;
+      y1 = ctx->DrawBuffer->Height - (y + h);
+      x2 = x + w - 1;
+      y2 = y1 + h - 1;
+      DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
+   }
+   else {
+      /* FBO - not inverted
+       */
+      x1 = x;
+      y1 = y;
+      x2 = x + w - 1;
+      y2 = y + h - 1;
+      DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
+   }
+   
+   x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
+   y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
+   x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
+   y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
+   
+   DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 
    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 }
 
-static void i915LogicOp(GLcontext *ctx, GLenum opcode)
+static void
+i915LogicOp(GLcontext * ctx, GLenum opcode)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    int tmp = intel_translate_logic_op(opcode);
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
@@ -397,13 +424,14 @@ static void i915LogicOp(GLcontext *ctx, GLenum opcode)
 
 
 
-static void i915CullFaceFrontFace(GLcontext *ctx, GLenum unused)
+static void
+i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    GLuint mode;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
+   DBG("%s %d\n", __FUNCTION__,
+       ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 
    if (!ctx->Polygon.CullFlag) {
       mode = S4_CULLMODE_NONE;
@@ -411,10 +439,12 @@ static void i915CullFaceFrontFace(GLcontext *ctx, GLenum unused)
    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
       mode = S4_CULLMODE_CW;
 
+      if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
+         mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
       if (ctx->Polygon.CullFaceMode == GL_FRONT)
-	 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
+         mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
       if (ctx->Polygon.FrontFace != GL_CCW)
-	 mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
+         mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
    }
    else {
       mode = S4_CULLMODE_BOTH;
@@ -425,16 +455,16 @@ static void i915CullFaceFrontFace(GLcontext *ctx, GLenum unused)
    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 }
 
-static void i915LineWidth( GLcontext *ctx, GLfloat widthf )
+static void
+i915LineWidth(GLcontext * ctx, GLfloat widthf)
 {
-   i915ContextPtr i915 = I915_CONTEXT( ctx );
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
    int width;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   width = (int)(widthf * 2);
+   DBG("%s\n", __FUNCTION__);
+   
+   width = (int) (widthf * 2);
    CLAMP_SELF(width, 1, 0xf);
    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 
@@ -444,15 +474,15 @@ static void i915LineWidth( GLcontext *ctx, GLfloat widthf )
    }
 }
 
-static void i915PointSize(GLcontext *ctx, GLfloat size)
+static void
+i915PointSize(GLcontext * ctx, GLfloat size)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
-   GLint point_size = (int)size;
-
-   if (INTEL_DEBUG&DEBUG_DRI)
-     fprintf(stderr, "%s\n", __FUNCTION__);
+   GLint point_size = (int) size;
 
+   DBG("%s\n", __FUNCTION__);
+   
    CLAMP_SELF(point_size, 1, 255);
    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 
@@ -467,20 +497,24 @@ static void i915PointSize(GLcontext *ctx, GLfloat size)
  * Color masks
  */
 
-static void i915ColorMask(GLcontext *ctx,
-			 GLboolean r, GLboolean g,
-			 GLboolean b, GLboolean a)
+static void
+i915ColorMask(GLcontext * ctx,
+              GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 {
-   i915ContextPtr i915 = I915_CONTEXT( ctx );
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
+   DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
+       a);
 
-   if (!r) tmp |= S5_WRITEDISABLE_RED;
-   if (!g) tmp |= S5_WRITEDISABLE_GREEN;
-   if (!b) tmp |= S5_WRITEDISABLE_BLUE;
-   if (!a) tmp |= S5_WRITEDISABLE_ALPHA;
+   if (!r)
+      tmp |= S5_WRITEDISABLE_RED;
+   if (!g)
+      tmp |= S5_WRITEDISABLE_GREEN;
+   if (!b)
+      tmp |= S5_WRITEDISABLE_BLUE;
+   if (!a)
+      tmp |= S5_WRITEDISABLE_ALPHA;
 
    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
@@ -488,54 +522,55 @@ static void i915ColorMask(GLcontext *ctx,
    }
 }
 
-static void update_specular( GLcontext *ctx )
+static void
+update_specular(GLcontext * ctx)
 {
    /* A hack to trigger the rebuild of the fragment program.
     */
-   INTEL_CONTEXT(ctx)->NewGLState |= _NEW_TEXTURE;
-   I915_CONTEXT(ctx)->tex_program.translated = 0; 
+   intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 }
 
-static void i915LightModelfv(GLcontext *ctx, GLenum pname, 
-			     const GLfloat *param)
+static void
+i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 {
-   if (INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
+   DBG("%s\n", __FUNCTION__);
+   
    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
-      update_specular( ctx );
+      update_specular(ctx);
    }
 }
 
-static void i915ShadeModel(GLcontext *ctx, GLenum mode)
+static void
+i915ShadeModel(GLcontext * ctx, GLenum mode)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
    if (mode == GL_SMOOTH) {
-     i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA | 
-					  S4_FLATSHADE_COLOR | 
-					  S4_FLATSHADE_SPECULAR);
-   } else {
-     i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA | 
-					 S4_FLATSHADE_COLOR | 
-					 S4_FLATSHADE_SPECULAR);
+      i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
+                                             S4_FLATSHADE_COLOR |
+                                             S4_FLATSHADE_SPECULAR);
+   }
+   else {
+      i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
+                                            S4_FLATSHADE_COLOR |
+                                            S4_FLATSHADE_SPECULAR);
    }
 }
 
 /* =============================================================
  * Fog
  */
-void i915_update_fog( GLcontext *ctx )
+void
+i915_update_fog(GLcontext * ctx)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
    GLenum mode;
    GLboolean enabled;
    GLboolean try_pixel_fog;
-   
+
    if (ctx->FragmentProgram._Active) {
       /* Pull in static fog state from program */
-      
       mode = ctx->FragmentProgram._Current->FogOption;
       enabled = (mode != GL_NONE);
       try_pixel_fog = 0;
@@ -546,7 +581,7 @@ void i915_update_fog( GLcontext *ctx )
 #if 0
       /* XXX - DISABLED -- Need ortho fallback */
       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT
-                       &&ctx->Hint.Fog == GL_NICEST);
+                       && ctx->Hint.Fog == GL_NICEST);
 #else
       try_pixel_fog = 0;
 #endif
@@ -559,48 +594,49 @@ void i915_update_fog( GLcontext *ctx )
       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
       i915->vertex_fog = I915_FOG_PIXEL;
-	 
+
       switch (mode) {
       case GL_LINEAR:
-	 if (ctx->Fog.End <= ctx->Fog.Start) {
-	    /* XXX - this won't work with fragment programs.  Need to
-	     * either fallback or append fog instructions to end of
-	     * program in the case of linear fog.
-	     */
-	    i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
-	    i915->vertex_fog = I915_FOG_VERTEX;
-	 }
-	 else {
+         if (ctx->Fog.End <= ctx->Fog.Start) {
+            /* XXX - this won't work with fragment programs.  Need to
+             * either fallback or append fog instructions to end of
+             * program in the case of linear fog.
+             */
+            printf("vertex fog!\n");
+            i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
+            i915->vertex_fog = I915_FOG_VERTEX;
+         }
+         else {
             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
             GLfloat c1 = ctx->Fog.End * c2;
 
-	    i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
-	    i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
-	    i915->state.Fog[I915_FOGREG_MODE1] |= 
-	       ((GLuint)(c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
-
-	    if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
-	       i915->state.Fog[I915_FOGREG_MODE2]
-                  = (GLuint)(c2 * FMC2_C2_ONE);
-	    }
-	    else {
-	       fi_type fi;
-	       fi.f = c2; 
-	       i915->state.Fog[I915_FOGREG_MODE2] = fi.i; 
-	    }
-	 }
-	 break;
+            i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
+            i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
+            i915->state.Fog[I915_FOGREG_MODE1] |=
+               ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
+
+            if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
+               i915->state.Fog[I915_FOGREG_MODE2]
+                  = (GLuint) (c2 * FMC2_C2_ONE);
+            }
+            else {
+               fi_type fi;
+               fi.f = c2;
+               i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
+            }
+         }
+         break;
       case GL_EXP:
-	 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
-	 break;
+         i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
+         break;
       case GL_EXP2:
-	 i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
-	 break;
+         i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
+         break;
       default:
-	 break;
+         break;
       }
    }
-   else /* if (i915->vertex_fog != I915_FOG_VERTEX) */ {      
+   else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
@@ -622,38 +658,38 @@ void i915_update_fog( GLcontext *ctx )
 }
 
 static void
-i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param)
+i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
    switch (pname) {
-   case GL_FOG_COORDINATE_SOURCE_EXT: 
+   case GL_FOG_COORDINATE_SOURCE_EXT:
    case GL_FOG_MODE:
    case GL_FOG_START:
-   case GL_FOG_END: 
+   case GL_FOG_END:
       break;
 
    case GL_FOG_DENSITY:
       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 
       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
-	 i915->state.Fog[I915_FOGREG_MODE3]
-            = (GLuint)(ctx->Fog.Density * FMC3_D_ONE);
+         i915->state.Fog[I915_FOGREG_MODE3] =
+            (GLuint) (ctx->Fog.Density * FMC3_D_ONE);
       }
       else {
-	 union { float f; int i; } fi;
-	 fi.f = ctx->Fog.Density; 
-	 i915->state.Fog[I915_FOGREG_MODE3] = fi.i; 
+         fi_type fi;
+         fi.f = ctx->Fog.Density;
+         i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
       }
       break;
 
-   case GL_FOG_COLOR: 
+   case GL_FOG_COLOR:
       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
-      i915->state.Fog[I915_FOGREG_COLOR] = 
-	 (_3DSTATE_FOG_COLOR_CMD | 
-	  ((GLubyte)(ctx->Fog.Color[0]*255.0F) << 16) |
-	  ((GLubyte)(ctx->Fog.Color[1]*255.0F) << 8) |
-	  ((GLubyte)(ctx->Fog.Color[2]*255.0F) << 0));
+      i915->state.Fog[I915_FOGREG_COLOR] =
+         (_3DSTATE_FOG_COLOR_CMD |
+          ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
+          ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
+          ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
       break;
 
    default:
@@ -661,7 +697,8 @@ i915Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *param)
    }
 }
 
-static void i915Hint(GLcontext *ctx, GLenum target, GLenum state)
+static void
+i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 {
    switch (target) {
    case GL_FOG_HINT:
@@ -674,25 +711,26 @@ static void i915Hint(GLcontext *ctx, GLenum target, GLenum state)
 /* =============================================================
  */
 
-static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
+static void
+i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 {
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
-   switch(cap) {
+   switch (cap) {
    case GL_TEXTURE_2D:
       break;
 
    case GL_LIGHTING:
    case GL_COLOR_SUM:
-      update_specular( ctx );
+      update_specular(ctx);
       break;
 
    case GL_ALPHA_TEST:
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
       if (state)
-	 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
       else
-	 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
       break;
 
    case GL_BLEND:
@@ -704,8 +742,8 @@ static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
 
       /* Logicop doesn't seem to work at 16bpp:
        */
-      if (i915->intel.intelScreen->cpp == 2)
-	 FALLBACK( &i915->intel, I915_FALLBACK_LOGICOP, state );
+      if (ctx->Visual.rgbBits == 16)
+         FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
       break;
 
    case GL_FRAGMENT_PROGRAM_ARB:
@@ -714,37 +752,37 @@ static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
    case GL_DITHER:
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
       if (state)
-	 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
       else
-	 i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
       break;
 
    case GL_DEPTH_TEST:
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
       if (state)
-	 i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
       else
-	 i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 
-      i915DepthMask( ctx, ctx->Depth.Mask );
+      i915DepthMask(ctx, ctx->Depth.Mask);
       break;
 
    case GL_SCISSOR_TEST:
       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
       if (state)
-	 i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
-						   ENABLE_SCISSOR_RECT);
+         i915->state.Buffer[I915_DESTREG_SENABLE] =
+            (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
       else
-	 i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
-						   DISABLE_SCISSOR_RECT);
+         i915->state.Buffer[I915_DESTREG_SENABLE] =
+            (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
       break;
 
    case GL_LINE_SMOOTH:
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
       if (state)
-	 i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
       else
-	 i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
+         i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
       break;
 
    case GL_FOG:
@@ -755,16 +793,25 @@ static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
       break;
 
    case GL_STENCIL_TEST:
-      if (i915->intel.hw_stencil) {
-	 I915_STATECHANGE(i915, I915_UPLOAD_CTX);
-	 if (state)
-	    i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
-						S5_STENCIL_WRITE_ENABLE);
-	 else
-	    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE | 
-						 S5_STENCIL_WRITE_ENABLE);
-      } else {
-	 FALLBACK( &i915->intel, I915_FALLBACK_STENCIL, state );
+      {
+         GLboolean hw_stencil = GL_FALSE;
+         if (ctx->DrawBuffer) {
+            struct intel_renderbuffer *irbStencil
+               = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
+            hw_stencil = (irbStencil && irbStencil->region);
+         }
+         if (hw_stencil) {
+            I915_STATECHANGE(i915, I915_UPLOAD_CTX);
+            if (state)
+               i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
+                                                     S5_STENCIL_WRITE_ENABLE);
+            else
+               i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
+                                                      S5_STENCIL_WRITE_ENABLE);
+         }
+         else {
+            FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
+         }
       }
       break;
 
@@ -773,23 +820,20 @@ static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
        * I'll do more testing later to find out exactly which hardware
        * supports it.  Disabled for now.
        */
-      if (i915->intel.hw_stipple && 
-	  i915->intel.reduced_primitive == GL_TRIANGLES)
-      {
-	 I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
-	 if (state)
-	    i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
-	 else
-	    i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
+      if (i915->intel.hw_stipple &&
+          i915->intel.reduced_primitive == GL_TRIANGLES) {
+         I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
+         if (state)
+            i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
+         else
+            i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
       }
       break;
 
    case GL_POLYGON_SMOOTH:
-      FALLBACK( &i915->intel, I915_FALLBACK_POLYGON_SMOOTH, state );
       break;
 
    case GL_POINT_SMOOTH:
-      FALLBACK( &i915->intel, I915_FALLBACK_POINT_SMOOTH, state );
       break;
 
    default:
@@ -798,10 +842,9 @@ static void i915Enable(GLcontext *ctx, GLenum cap, GLboolean state)
 }
 
 
-static void i915_init_packets( i915ContextPtr i915 )
+static void
+i915_init_packets(struct i915_context *i915)
 {
-   intelScreenPrivate *screen = i915->intel.intelScreen;
-
    /* Zero all state */
    memset(&i915->state, 0, sizeof(i915->state));
 
@@ -811,39 +854,35 @@ static void i915_init_packets( i915ContextPtr i915 )
       /* Probably don't want to upload all this stuff every time one 
        * piece changes.
        */
-      i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | 
-				       I1_LOAD_S(2) |
-				       I1_LOAD_S(4) |
-				       I1_LOAD_S(5) |
-				       I1_LOAD_S(6) | 
-				       (3));
+      i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
+                                         I1_LOAD_S(2) |
+                                         I1_LOAD_S(4) |
+                                         I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 
-      if (screen->cpp == 2)
-	 i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
+      if (i915->intel.ctx.Visual.rgbBits == 16)
+         i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 
 
       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
-					 (2 << S6_TRISTRIP_PV_SHIFT));
+                                           (2 << S6_TRISTRIP_PV_SHIFT));
 
       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
-					   ENABLE_LOGIC_OP_FUNC |
-					   LOGIC_OP_FUNC(LOGICOP_COPY) |
-					   ENABLE_STENCIL_TEST_MASK |
-					   STENCIL_TEST_MASK(0xff) |
-					   ENABLE_STENCIL_WRITE_MASK |
-					   STENCIL_WRITE_MASK(0xff));
-
-
-      i915->state.Ctx[I915_CTXREG_IAB] = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
-					IAB_MODIFY_ENABLE |
-					IAB_MODIFY_FUNC |
-					IAB_MODIFY_SRC_FACTOR |
-					IAB_MODIFY_DST_FACTOR);
-
-      i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
+                                             ENABLE_LOGIC_OP_FUNC |
+                                             LOGIC_OP_FUNC(LOGICOP_COPY) |
+                                             ENABLE_STENCIL_TEST_MASK |
+                                             STENCIL_TEST_MASK(0xff) |
+                                             ENABLE_STENCIL_WRITE_MASK |
+                                             STENCIL_WRITE_MASK(0xff));
+
+      i915->state.Ctx[I915_CTXREG_IAB] =
+         (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
+          IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
+
+      i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
+         _3DSTATE_CONST_BLEND_COLOR_CMD;
       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
 
    }
@@ -858,79 +897,50 @@ static void i915_init_packets( i915ContextPtr i915 )
       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
-					  FMC1_FOGFUNC_VERTEX |
-					  FMC1_FOGINDEX_MODIFY_ENABLE |
-					  FMC1_FOGINDEX_W |
-					  FMC1_C1_C2_MODIFY_ENABLE |
-					  FMC1_DENSITY_MODIFY_ENABLE);
+                                            FMC1_FOGFUNC_VERTEX |
+                                            FMC1_FOGINDEX_MODIFY_ENABLE |
+                                            FMC1_FOGINDEX_W |
+                                            FMC1_C1_C2_MODIFY_ENABLE |
+                                            FMC1_DENSITY_MODIFY_ENABLE);
       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
    }
 
-
    {
-      I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
-      /* color buffer offset/stride */
-      i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
-      i915->state.Buffer[I915_DESTREG_CBUFADDR1] = 
-	 (BUF_3D_ID_COLOR_BACK | 
-	  BUF_3D_PITCH(screen->front.pitch) |  /* pitch in bytes */
-	  BUF_3D_USE_FENCE);
-      /*i915->state.Buffer[I915_DESTREG_CBUFADDR2] is the offset */
-
-
-      /* depth/Z buffer offset/stride */
-      i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
-      i915->state.Buffer[I915_DESTREG_DBUFADDR1] = 
-	 (BUF_3D_ID_DEPTH |
-	  BUF_3D_PITCH(screen->depth.pitch) |  /* pitch in bytes */
-	  BUF_3D_USE_FENCE);
-      i915->state.Buffer[I915_DESTREG_DBUFADDR2] = screen->depth.offset;
-
-
       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 
-      /* color/depth pixel format */
-      switch (screen->fbFormat) {
-      case DV_PF_555:
-      case DV_PF_565:
-	 i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					       DSTORG_VERT_BIAS(0x8) | /* .5 */
-					       LOD_PRECLAMP_OGL |
-					       TEX_DEFAULT_COLOR_OGL |
-					       DITHER_FULL_ALWAYS |
-					       screen->fbFormat |
-					       DEPTH_FRMT_16_FIXED);
-	 break;
-      case DV_PF_8888:
-	 i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
-					       DSTORG_VERT_BIAS(0x8) | /* .5 */
-					       LOD_PRECLAMP_OGL |
-					       TEX_DEFAULT_COLOR_OGL |
-					       screen->fbFormat |
-					       DEPTH_FRMT_24_FIXED_8_OTHER);
-	 break;
-      }
-
       /* scissor */
-      i915->state.Buffer[I915_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
-						DISABLE_SCISSOR_RECT);
+      i915->state.Buffer[I915_DESTREG_SENABLE] =
+         (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
       i915->state.Buffer[I915_DESTREG_SR1] = 0;
       i915->state.Buffer[I915_DESTREG_SR2] = 0;
    }
 
 
+#if 0
+   {
+      I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
+      i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
+      i915->state.Default[I915_DEFREG_C1] = 0;
+      i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
+      i915->state.Default[I915_DEFREG_S1] = 0;
+      i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
+      i915->state.Default[I915_DEFREG_Z1] = 0;
+   }
+#endif
+
+
    /* These will be emitted every at the head of every buffer, unless
     * we get hardware contexts working.
     */
-   i915->state.active = (I915_UPLOAD_PROGRAM | 
-			 I915_UPLOAD_STIPPLE | 
-			 I915_UPLOAD_CTX | 
-			 I915_UPLOAD_BUFFERS | 
-			 I915_UPLOAD_INVARIENT);
+   i915->state.active = (I915_UPLOAD_PROGRAM |
+                         I915_UPLOAD_STIPPLE |
+                         I915_UPLOAD_CTX |
+                         I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
 }
 
-void i915InitStateFunctions( struct dd_function_table *functions )
+void
+i915InitStateFunctions(struct dd_function_table *functions)
 {
    functions->AlphaFunc = i915AlphaFunc;
    functions->BlendColor = i915BlendColor;
@@ -957,14 +967,15 @@ void i915InitStateFunctions( struct dd_function_table *functions )
 }
 
 
-void i915InitState( i915ContextPtr i915 )
+void
+i915InitState(struct i915_context *i915)
 {
    GLcontext *ctx = &i915->intel.ctx;
 
-   i915_init_packets( i915 );
+   i915_init_packets(i915);
 
    _mesa_init_driver_state(ctx);
 
-   memcpy( &i915->initial, &i915->state, sizeof(i915->state) );
+   memcpy(&i915->initial, &i915->state, sizeof(i915->state));
    i915->current = &i915->state;
 }
diff --git a/src/mesa/drivers/dri/i915/i915_tex.c b/src/mesa/drivers/dri/i915/i915_tex.c
index d9609d31933..e38d8fe79d1 100644
--- a/src/mesa/drivers/dri/i915/i915_tex.c
+++ b/src/mesa/drivers/dri/i915/i915_tex.c
@@ -25,129 +25,43 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "image.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "texmem.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/mm.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
-
-#include "intel_ioctl.h"
+#include "texmem.h"
 
 #include "i915_context.h"
 #include "i915_reg.h"
 
 
 
-
-
-
-/**
- * Allocate space for and load the mesa images into the texture memory block.
- * This will happen before drawing with a new texture, or drawing with a
- * texture after it was swapped out or teximaged again.
- */
-
-intelTextureObjectPtr i915AllocTexObj( struct gl_texture_object *texObj )
-{
-   i915TextureObjectPtr t = CALLOC_STRUCT( i915_texture_object );
-   if ( !t ) 
-      return NULL;
-
-   texObj->DriverData = t;
-   t->intel.base.tObj = texObj;
-   t->intel.dirty = I915_UPLOAD_TEX_ALL;
-   make_empty_list( &t->intel.base );
-   return &t->intel;
-}
-
-
-static void i915TexParameter( GLcontext *ctx, GLenum target,
-			     struct gl_texture_object *tObj,
-			     GLenum pname, const GLfloat *params )
-{
-   i915TextureObjectPtr t = (i915TextureObjectPtr) tObj->DriverData;
- 
-   switch (pname) {
-   case GL_TEXTURE_MIN_FILTER:
-   case GL_TEXTURE_MAG_FILTER:
-   case GL_TEXTURE_MAX_ANISOTROPY_EXT:
-   case GL_TEXTURE_WRAP_S:
-   case GL_TEXTURE_WRAP_T:
-   case GL_TEXTURE_WRAP_R:
-   case GL_TEXTURE_BORDER_COLOR:
-      t->intel.dirty = I915_UPLOAD_TEX_ALL;
-      break;
-
-   case GL_TEXTURE_COMPARE_MODE:
-      t->intel.dirty = I915_UPLOAD_TEX_ALL;
-      break;
-   case GL_TEXTURE_COMPARE_FUNC:
-      t->intel.dirty = I915_UPLOAD_TEX_ALL;
-      break;
-
-   case GL_TEXTURE_BASE_LEVEL:
-   case GL_TEXTURE_MAX_LEVEL:
-   case GL_TEXTURE_MIN_LOD:
-   case GL_TEXTURE_MAX_LOD:
-      /* The i915 and its successors can do a lot of this without
-       * reloading the textures.  A project for someone?
-       */
-      intelFlush( ctx );
-      driSwapOutTextureObject( (driTextureObject *) t );
-      t->intel.dirty = I915_UPLOAD_TEX_ALL;
-      break;
-
-   default:
-      return;
-   }
-}
-
-
-static void i915TexEnv( GLcontext *ctx, GLenum target, 
-			GLenum pname, const GLfloat *param )
+static void
+i915TexEnv(GLcontext * ctx, GLenum target,
+           GLenum pname, const GLfloat * param)
 {
-   i915ContextPtr i915 = I915_CONTEXT( ctx );
-   GLuint unit = ctx->Texture.CurrentUnit;
+   struct i915_context *i915 = I915_CONTEXT(ctx);
 
    switch (pname) {
-   case GL_TEXTURE_ENV_COLOR: 	/* Should be a tracked param */
-   case GL_TEXTURE_ENV_MODE:
-   case GL_COMBINE_RGB:
-   case GL_COMBINE_ALPHA:
-   case GL_SOURCE0_RGB:
-   case GL_SOURCE1_RGB:
-   case GL_SOURCE2_RGB:
-   case GL_SOURCE0_ALPHA:
-   case GL_SOURCE1_ALPHA:
-   case GL_SOURCE2_ALPHA:
-   case GL_OPERAND0_RGB:
-   case GL_OPERAND1_RGB:
-   case GL_OPERAND2_RGB:
-   case GL_OPERAND0_ALPHA:
-   case GL_OPERAND1_ALPHA:
-   case GL_OPERAND2_ALPHA:
-   case GL_RGB_SCALE:
-   case GL_ALPHA_SCALE:
-      i915->tex_program.translated = 0; 
-      break;
-
-   case GL_TEXTURE_LOD_BIAS: {
-      int b = (int) ((*param) * 16.0);
-      if (b > 255) b = 255;
-      if (b < -256) b = -256;
-      I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
-      i915->state.Tex[unit][I915_TEXREG_SS2] &= ~SS2_LOD_BIAS_MASK;
-      i915->state.Tex[unit][I915_TEXREG_SS2] |= 
-	 ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
-      break;
-   }
+   case GL_TEXTURE_LOD_BIAS:{
+         GLuint unit = ctx->Texture.CurrentUnit;
+         GLint b = (int) ((*param) * 16.0);
+         if (b > 255)
+            b = 255;
+         if (b < -256)
+            b = -256;
+         I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
+         i915->lodbias_ss2[unit] =
+            ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
+         break;
+      }
 
    default:
       break;
@@ -155,33 +69,10 @@ static void i915TexEnv( GLcontext *ctx, GLenum target,
 }
 
 
-static void i915BindTexture( GLcontext *ctx, GLenum target,
-			    struct gl_texture_object *texObj )
-{
-   i915TextureObjectPtr tex;
-   
-   if (!texObj->DriverData)
-      i915AllocTexObj( texObj );
-   
-   tex = (i915TextureObjectPtr)texObj->DriverData;
-
-   if (tex->lastTarget != texObj->Target) {
-      tex->intel.dirty = I915_UPLOAD_TEX_ALL;
-      tex->lastTarget = texObj->Target;
-   }
-
-   /* Need this if image format changes between bound textures.
-    * Could try and shortcircuit by checking for differences in
-    * state between incoming and outgoing textures:
-    */
-   I915_CONTEXT(ctx)->tex_program.translated = 0; 
-}
-
-
-
-void i915InitTextureFuncs( struct dd_function_table *functions )
+void
+i915InitTextureFuncs(struct dd_function_table *functions)
 {
-   functions->BindTexture = i915BindTexture;
+/*
    functions->TexEnv = i915TexEnv;
-   functions->TexParameter = i915TexParameter;
+*/
 }
diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
new file mode 100644
index 00000000000..d44a2f47b37
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -0,0 +1,477 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+/** @file i915_tex_layout.c
+ * Code to layout images in a mipmap tree for i830M-GM915 and G945 and beyond.
+ */
+
+#include "intel_mipmap_tree.h"
+#include "intel_tex_layout.h"
+#include "main/macros.h"
+#include "intel_context.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+static GLint initial_offsets[6][2] = {
+   [FACE_POS_X] = {0, 0},
+   [FACE_POS_Y] = {1, 0},
+   [FACE_POS_Z] = {1, 1},
+   [FACE_NEG_X] = {0, 2},
+   [FACE_NEG_Y] = {1, 2},
+   [FACE_NEG_Z] = {1, 3},
+};
+
+
+static GLint step_offsets[6][2] = {
+   [FACE_POS_X] = {0, 2},
+   [FACE_POS_Y] = {-1, 2},
+   [FACE_POS_Z] = {-1, 1},
+   [FACE_NEG_X] = {0, 2},
+   [FACE_NEG_Y] = {-1, 2},
+   [FACE_NEG_Z] = {-1, 1},
+};
+
+/**
+ * Cube texture map layout for i830M-GM915.
+ *
+ * Hardware layout looks like:
+ *
+ * +-------+-------+
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |  +x   |  +y   |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * +---+---+-------+
+ * |   |   |       |
+ * | +x| +y|       |
+ * |   |   |       |
+ * |   |   |       |
+ * +-+-+---+  +z   |
+ * | | |   |       |
+ * +-+-+ +z|       |
+ *   | |   |       |
+ * +-+-+---+-------+
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |  -x   |  -y   |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * +---+---+-------+
+ * |   |   |       |
+ * | -x| -y|       |
+ * |   |   |       |
+ * |   |   |       |
+ * +-+-+---+  -z   |
+ * | | |   |       |
+ * +-+-+ -z|       |
+ *   | |   |       |
+ *   +-+---+-------+
+ *
+ */
+static void
+i915_miptree_layout_cube(struct intel_context *intel,
+			 struct intel_mipmap_tree * mt)
+{
+   const GLuint dim = mt->width0;
+   GLuint face;
+   GLuint lvlWidth = mt->width0, lvlHeight = mt->height0;
+   GLint level;
+
+   assert(lvlWidth == lvlHeight); /* cubemap images are square */
+
+   /* double pitch for cube layouts */
+   mt->pitch = intel_miptree_pitch_align (intel, mt, dim * 2);
+   mt->total_height = dim * 4;
+
+   for (level = mt->first_level; level <= mt->last_level; level++) {
+      intel_miptree_set_level_info(mt, level, 6,
+				   0, 0,
+				   /*OLD: mt->pitch, mt->total_height,*/
+				   lvlWidth, lvlHeight,
+				   1);
+      lvlWidth /= 2;
+      lvlHeight /= 2;
+   }
+
+   for (face = 0; face < 6; face++) {
+      GLuint x = initial_offsets[face][0] * dim;
+      GLuint y = initial_offsets[face][1] * dim;
+      GLuint d = dim;
+
+      for (level = mt->first_level; level <= mt->last_level; level++) {
+	 intel_miptree_set_image_offset(mt, level, face, x, y);
+
+	 if (d == 0)
+	    _mesa_printf("cube mipmap %d/%d (%d..%d) is 0x0\n",
+			 face, level, mt->first_level, mt->last_level);
+
+	 d >>= 1;
+	 x += step_offsets[face][0] * d;
+	 y += step_offsets[face][1] * d;
+      }
+   }
+}
+
+static void
+i915_miptree_layout_3d(struct intel_context *intel,
+		       struct intel_mipmap_tree * mt)
+{
+   GLuint width = mt->width0;
+   GLuint height = mt->height0;
+   GLuint depth = mt->depth0;
+   GLuint stack_height = 0;
+   GLint level;
+
+   /* Calculate the size of a single slice. */
+   mt->pitch = intel_miptree_pitch_align (intel, mt, mt->width0);
+
+   /* XXX: hardware expects/requires 9 levels at minimum. */
+   for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
+      intel_miptree_set_level_info(mt, level, depth, 0, mt->total_height,
+				   width, height, depth);
+
+      stack_height += MAX2(2, height);
+
+      width = minify(width);
+      height = minify(height);
+      depth = minify(depth);
+   }
+
+   /* Fixup depth image_offsets: */
+   depth = mt->depth0;
+   for (level = mt->first_level; level <= mt->last_level; level++) {
+      GLuint i;
+      for (i = 0; i < depth; i++) {
+	 intel_miptree_set_image_offset(mt, level, i,
+					0, i * stack_height);
+      }
+
+      depth = minify(depth);
+   }
+
+   /* Multiply slice size by texture depth for total size.  It's
+    * remarkable how wasteful of memory the i915 texture layouts
+    * are.  They are largely fixed in the i945.
+    */
+   mt->total_height = stack_height * mt->depth0;
+}
+
+static void
+i915_miptree_layout_2d(struct intel_context *intel,
+		       struct intel_mipmap_tree * mt)
+{
+   GLuint width = mt->width0;
+   GLuint height = mt->height0;
+   GLuint img_height;
+   GLint level;
+
+   mt->pitch = intel_miptree_pitch_align (intel, mt, mt->width0);
+   mt->total_height = 0;
+
+   for (level = mt->first_level; level <= mt->last_level; level++) {
+      intel_miptree_set_level_info(mt, level, 1,
+				   0, mt->total_height,
+				   width, height, 1);
+
+      if (mt->compressed)
+	 img_height = MAX2(1, height / 4);
+      else
+	 img_height = (MAX2(2, height) + 1) & ~1;
+
+      mt->total_height += img_height;
+
+      width = minify(width);
+      height = minify(height);
+   }
+}
+
+GLboolean
+i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt)
+{
+   switch (mt->target) {
+   case GL_TEXTURE_CUBE_MAP:
+      i915_miptree_layout_cube(intel, mt);
+      break;
+   case GL_TEXTURE_3D:
+      i915_miptree_layout_3d(intel, mt);
+      break;
+   case GL_TEXTURE_1D:
+   case GL_TEXTURE_2D:
+   case GL_TEXTURE_RECTANGLE_ARB:
+      i915_miptree_layout_2d(intel, mt);
+      break;
+   default:
+      _mesa_problem(NULL, "Unexpected tex target in i915_miptree_layout()");
+      break;
+   }
+
+   DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
+       mt->pitch,
+       mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+
+   return GL_TRUE;
+}
+
+
+/**
+ * Cube texture map layout for GM945 and later.
+ *
+ * The hardware layout looks like the 830-915 layout, except for the small
+ * sizes.  A zoomed in view of the layout for 945 is:
+ *
+ * +-------+-------+
+ * |  8x8  |  8x8  |
+ * |       |       |
+ * |       |       |
+ * |  +x   |  +y   |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * +---+---+-------+
+ * |4x4|   |  8x8  |
+ * | +x|   |       |
+ * |   |   |       |
+ * |   |   |       |
+ * +---+   |  +z   |
+ * |4x4|   |       |
+ * | +y|   |       |
+ * |   |   |       |
+ * +---+   +-------+
+ *
+ * ...
+ *
+ * +-------+-------+
+ * |  8x8  |  8x8  |
+ * |       |       |
+ * |       |       |
+ * |  -x   |  -y   |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * |       |       |
+ * +---+---+-------+
+ * |4x4|   |  8x8  |
+ * | -x|   |       |
+ * |   |   |       |
+ * |   |   |       |
+ * +---+   |  -z   |
+ * |4x4|   |       |
+ * | -y|   |       |
+ * |   |   |       |
+ * +---+   +---+---+---+---+---+---+---+---+---+
+ * |4x4|   |4x4|   |2x2|   |2x2|   |2x2|   |2x2|
+ * | +z|   | -z|   | +x|   | +y|   | +z|   | -x| ...
+ * |   |   |   |   |   |   |   |   |   |   |   |
+ * +---+   +---+   +---+   +---+   +---+   +---+
+ *
+ * The bottom row continues with the remaining 2x2 then the 1x1 mip contents
+ * in order, with each of them aligned to a 4x4 block boundary.  Thus, for
+ * 32x32 cube maps and smaller, the bottom row layout is going to dictate the
+ * pitch of the tree.  For a tree with 4x4 images, the pitch is at least
+ * 14 * 8 = 112 texels, for 2x2 it is at least 12 * 8 texels, and for 1x1
+ * it is 6 * 8 texels.
+ */
+
+static void
+i945_miptree_layout_cube(struct intel_context *intel,
+			 struct intel_mipmap_tree * mt)
+{
+   const GLuint dim = mt->width0;
+   GLuint face;
+   GLuint lvlWidth = mt->width0, lvlHeight = mt->height0;
+   GLint level;
+
+   assert(lvlWidth == lvlHeight); /* cubemap images are square */
+
+   /* Depending on the size of the largest images, pitch can be
+    * determined either by the old-style packing of cubemap faces,
+    * or the final row of 4x4, 2x2 and 1x1 faces below this.
+    */
+   if (dim > 32)
+      mt->pitch = intel_miptree_pitch_align (intel, mt, dim * 2);
+   else
+      mt->pitch = intel_miptree_pitch_align (intel, mt, 14 * 8);
+
+   if (dim >= 4)
+      mt->total_height = dim * 4 + 4;
+   else
+      mt->total_height = 4;
+
+   /* Set all the levels to effectively occupy the whole rectangular region. */
+   for (level = mt->first_level; level <= mt->last_level; level++) {
+      intel_miptree_set_level_info(mt, level, 6,
+				   0, 0,
+				   lvlWidth, lvlHeight, 1);
+      lvlWidth /= 2;
+      lvlHeight /= 2;
+   }
+
+   for (face = 0; face < 6; face++) {
+      GLuint x = initial_offsets[face][0] * dim;
+      GLuint y = initial_offsets[face][1] * dim;
+      GLuint d = dim;
+
+      if (dim == 4 && face >= 4) {
+	 y = mt->total_height - 4;
+	 x = (face - 4) * 8;
+      } else if (dim < 4 && (face > 0 || mt->first_level > 0)) {
+	 y = mt->total_height - 4;
+	 x = face * 8;
+      }
+
+      for (level = mt->first_level; level <= mt->last_level; level++) {
+	 intel_miptree_set_image_offset(mt, level, face, x, y);
+
+	 d >>= 1;
+
+	 switch (d) {
+	 case 4:
+	    switch (face) {
+	    case FACE_POS_X:
+	    case FACE_NEG_X:
+	       x += step_offsets[face][0] * d;
+	       y += step_offsets[face][1] * d;
+	       break;
+	    case FACE_POS_Y:
+	    case FACE_NEG_Y:
+	       y += 12;
+	       x -= 8;
+	       break;
+	    case FACE_POS_Z:
+	    case FACE_NEG_Z:
+	       y = mt->total_height - 4;
+	       x = (face - 4) * 8;
+	       break;
+	    }
+
+	 case 2:
+	    y = mt->total_height - 4;
+	    x = 16 + face * 8;
+	    break;
+
+	 case 1:
+	    x += 48;
+	    break;
+
+	 default:
+	    x += step_offsets[face][0] * d;
+	    y += step_offsets[face][1] * d;
+	    break;
+	 }
+      }
+   }
+}
+
+static void
+i945_miptree_layout_3d(struct intel_context *intel,
+		       struct intel_mipmap_tree * mt)
+{
+   GLuint width = mt->width0;
+   GLuint height = mt->height0;
+   GLuint depth = mt->depth0;
+   GLuint pack_x_pitch, pack_x_nr;
+   GLuint pack_y_pitch;
+   GLuint level;
+
+   mt->pitch = intel_miptree_pitch_align (intel, mt, mt->width0);
+   mt->total_height = 0;
+
+   pack_y_pitch = MAX2(mt->height0, 2);
+   pack_x_pitch = mt->pitch;
+   pack_x_nr = 1;
+
+   for (level = mt->first_level; level <= mt->last_level; level++) {
+      GLint x = 0;
+      GLint y = 0;
+      GLint q, j;
+
+      intel_miptree_set_level_info(mt, level, depth,
+				   0, mt->total_height,
+				   width, height, depth);
+
+      for (q = 0; q < depth;) {
+	 for (j = 0; j < pack_x_nr && q < depth; j++, q++) {
+	    intel_miptree_set_image_offset(mt, level, q, x, y);
+	    x += pack_x_pitch;
+	 }
+
+	 x = 0;
+	 y += pack_y_pitch;
+      }
+
+      mt->total_height += y;
+
+      if (pack_x_pitch > 4) {
+	 pack_x_pitch >>= 1;
+	 pack_x_nr <<= 1;
+	 assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+      }
+
+      if (pack_y_pitch > 2) {
+	 pack_y_pitch >>= 1;
+      }
+
+      width = minify(width);
+      height = minify(height);
+      depth = minify(depth);
+   }
+}
+
+GLboolean
+i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt)
+{
+   switch (mt->target) {
+   case GL_TEXTURE_CUBE_MAP:
+      i945_miptree_layout_cube(intel, mt);
+      break;
+   case GL_TEXTURE_3D:
+      i945_miptree_layout_3d(intel, mt);
+      break;
+   case GL_TEXTURE_1D:
+   case GL_TEXTURE_2D:
+   case GL_TEXTURE_RECTANGLE_ARB:
+      i945_miptree_layout_2d(intel, mt);
+      break;
+   default:
+      _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");
+      break;
+   }
+
+   DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
+       mt->pitch,
+       mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+
+   return GL_TRUE;
+}
diff --git a/src/mesa/drivers/dri/i915/i915_texprog.c b/src/mesa/drivers/dri/i915/i915_texprog.c
deleted file mode 100644
index f6a8b0205a6..00000000000
--- a/src/mesa/drivers/dri/i915/i915_texprog.c
+++ /dev/null
@@ -1,676 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include <strings.h>
-
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
-#include "tnl/t_context.h"
-#include "intel_batchbuffer.h"
-
-#include "i915_reg.h"
-#include "i915_context.h"
-#include "i915_program.h"
-
-static GLuint translate_tex_src_bit( struct i915_fragment_program *p,
-				     GLubyte bit )
-{
-   switch (bit) {
-   case TEXTURE_1D_BIT:   return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_2D_BIT:   return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_RECT_BIT: return D0_SAMPLE_TYPE_2D;
-   case TEXTURE_3D_BIT:   return D0_SAMPLE_TYPE_VOLUME;
-   case TEXTURE_CUBE_BIT: return D0_SAMPLE_TYPE_CUBE;
-   default: i915_program_error(p, "TexSrcBit"); return 0;
-   }
-}
-
-static GLuint get_source( struct i915_fragment_program *p, 
-			  GLenum src, GLuint unit )
-{
-   switch (src) {
-   case GL_TEXTURE: 
-      if (p->src_texture == UREG_BAD) {
-
-	 /* TODO: Use D0_CHANNEL_XY where possible.
-	  */
-	 GLuint dim = translate_tex_src_bit( p, p->ctx->Texture.Unit[unit]._ReallyEnabled);
-	 GLuint sampler = i915_emit_decl(p, REG_TYPE_S, unit, dim);
-	 GLuint texcoord = i915_emit_decl(p, REG_TYPE_T, unit, D0_CHANNEL_ALL);
-	 GLuint tmp = i915_get_temp( p );
-	 GLuint op = T0_TEXLD;
-
-	 if (p->VB->TexCoordPtr[unit]->size == 4)
-	    op = T0_TEXLDP;
-
-	 p->src_texture = i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, 
-					  sampler, texcoord, op );
-      }
-
-      return p->src_texture;
-
-      /* Crossbar: */
-   case GL_TEXTURE0:
-   case GL_TEXTURE1:
-   case GL_TEXTURE2:
-   case GL_TEXTURE3:
-   case GL_TEXTURE4:
-   case GL_TEXTURE5:
-   case GL_TEXTURE6:
-   case GL_TEXTURE7: {
-      return UREG_BAD;
-   }
-
-   case GL_CONSTANT:
-      return i915_emit_const4fv( p, p->ctx->Texture.Unit[unit].EnvColor );
-   case GL_PRIMARY_COLOR:
-      return i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
-   case GL_PREVIOUS:
-   default: 
-      i915_emit_decl(p, 
-		GET_UREG_TYPE(p->src_previous),
-		GET_UREG_NR(p->src_previous), D0_CHANNEL_ALL); 
-      return p->src_previous;
-   }
-}
-			
-
-static GLuint emit_combine_source( struct i915_fragment_program *p, 
-				   GLuint mask,
-				   GLuint unit,
-				   GLenum source, 
-				   GLenum operand )
-{
-   GLuint arg, src;
-
-   src = get_source(p, source, unit);
-
-   switch (operand) {
-   case GL_ONE_MINUS_SRC_COLOR: 
-      /* Get unused tmp,
-       * Emit tmp = 1.0 + arg.-x-y-z-w
-       */
-      arg = i915_get_temp( p );
-      return i915_emit_arith( p, A0_ADD, arg, mask, 0,
-		  swizzle(src, ONE, ONE, ONE, ONE ),
-		  negate(src, 1,1,1,1), 0);
-
-   case GL_SRC_ALPHA: 
-      if (mask == A0_DEST_CHANNEL_W)
-	 return src;
-      else
-	 return swizzle( src, W, W, W, W );
-   case GL_ONE_MINUS_SRC_ALPHA: 
-      /* Get unused tmp,
-       * Emit tmp = 1.0 + arg.-w-w-w-w
-       */
-      arg = i915_get_temp( p );
-      return i915_emit_arith( p, A0_ADD, arg, mask, 0,
-			 swizzle(src, ONE, ONE, ONE, ONE ),
-			 negate( swizzle(src,W,W,W,W), 1,1,1,1), 0);
-   case GL_SRC_COLOR: 
-   default:
-      return src;
-   }
-}
-
-
-
-static int nr_args( GLenum mode )
-{
-   switch (mode) {
-   case GL_REPLACE: return 1; 
-   case GL_MODULATE: return 2;
-   case GL_ADD: return 2;
-   case GL_ADD_SIGNED: return 2;
-   case GL_INTERPOLATE:	return 3;
-   case GL_SUBTRACT: return 2;
-   case GL_DOT3_RGB_EXT: return 2;
-   case GL_DOT3_RGBA_EXT: return 2;
-   case GL_DOT3_RGB: return 2;
-   case GL_DOT3_RGBA: return 2;
-   default: return 0;
-   }
-}
-
-
-static GLboolean args_match( struct gl_texture_unit *texUnit )
-{
-   int i, nr = nr_args(texUnit->Combine.ModeRGB);
-
-   for (i = 0 ; i < nr ; i++) {
-      if (texUnit->Combine.SourceA[i] != texUnit->Combine.SourceRGB[i]) 
-	 return GL_FALSE;
-
-      switch(texUnit->Combine.OperandA[i]) {
-      case GL_SRC_ALPHA: 
-	 switch(texUnit->Combine.OperandRGB[i]) {
-	 case GL_SRC_COLOR: 
-	 case GL_SRC_ALPHA: 
-	    break;
-	 default:
-	    return GL_FALSE;
-	 }
-	 break;
-      case GL_ONE_MINUS_SRC_ALPHA: 
-	 switch(texUnit->Combine.OperandRGB[i]) {
-	 case GL_ONE_MINUS_SRC_COLOR: 
-	 case GL_ONE_MINUS_SRC_ALPHA: 
-	    break;
-	 default:
-	    return GL_FALSE;
-	 }
-	 break;
-      default: 
-	 return GL_FALSE;	/* impossible */
-      }
-   }
-
-   return GL_TRUE;
-}
-
-
-static GLuint emit_combine( struct i915_fragment_program *p,
-			    GLuint dest,
-			    GLuint mask,
-			    GLuint saturate,
-			    GLuint unit,
-			    GLenum mode,
-			    const GLenum *source,
-			    const GLenum *operand)
-{
-   int tmp, src[3], nr = nr_args(mode);
-   int i;
-
-   for (i = 0; i < nr; i++)
-      src[i] = emit_combine_source( p, mask, unit, source[i], operand[i] );
-
-   switch (mode) {
-   case GL_REPLACE: 
-      if (mask == A0_DEST_CHANNEL_ALL && !saturate)
-	 return src[0];
-      else
-	 return i915_emit_arith( p, A0_MOV, dest, mask, saturate, src[0], 0, 0 );
-   case GL_MODULATE: 
-      return i915_emit_arith( p, A0_MUL, dest, mask, saturate,
-			     src[0], src[1], 0 );
-   case GL_ADD: 
-      return i915_emit_arith( p, A0_ADD, dest, mask, saturate, 
-			     src[0], src[1], 0 );
-   case GL_ADD_SIGNED:
-      /* tmp = arg0 + arg1
-       * result = tmp + -.5
-       */
-      tmp = i915_emit_const1f(p, .5);
-      tmp = negate(swizzle(tmp,X,X,X,X),1,1,1,1);
-      i915_emit_arith( p, A0_ADD, dest, mask, 0, src[0], src[1], 0 );
-      i915_emit_arith( p, A0_ADD, dest, mask, saturate, dest, tmp, 0 );
-      return dest;
-   case GL_INTERPOLATE:		/* TWO INSTRUCTIONS */
-      /* Arg0 * (Arg2) + Arg1 * (1-Arg2)
-       *
-       * Arg0*Arg2 + Arg1 - Arg1Arg2 
-       *
-       * tmp = Arg0*Arg2 + Arg1, 
-       * result = (-Arg1)Arg2 + tmp 
-       */
-      tmp = i915_get_temp( p );
-      i915_emit_arith( p, A0_MAD, tmp, mask, 0, src[0], src[2], src[1] );
-      i915_emit_arith( p, A0_MAD, dest, mask, saturate, 
-		      negate(src[1], 1,1,1,1), src[2], tmp );
-      return dest;
-   case GL_SUBTRACT: 
-      /* negate src[1] */
-      return i915_emit_arith( p, A0_ADD, dest, mask, saturate, src[0],
-			 negate(src[1],1,1,1,1), 0 );
-
-   case GL_DOT3_RGBA:
-   case GL_DOT3_RGBA_EXT: 
-   case GL_DOT3_RGB_EXT:
-   case GL_DOT3_RGB: {
-      GLuint tmp0 = i915_get_temp( p );
-      GLuint tmp1 = i915_get_temp( p );
-      GLuint neg1 = negate(swizzle(i915_emit_const1f(p, 1),X,X,X,X), 1,1,1,1);
-      GLuint two = swizzle(i915_emit_const1f(p, 2),X,X,X,X);
-      i915_emit_arith( p, A0_MAD, tmp0, A0_DEST_CHANNEL_ALL, 0, 
-		      two, src[0], neg1);
-      if (src[0] == src[1])
-	 tmp1 = tmp0;
-      else
-	 i915_emit_arith( p, A0_MAD, tmp1, A0_DEST_CHANNEL_ALL, 0, 
-			 two, src[1], neg1);
-      i915_emit_arith( p, A0_DP3, dest, mask, saturate, tmp0, tmp1, 0);
-      return dest;
-   }
-
-   default: 
-      return src[0];
-   }
-}
-
-static GLuint get_dest( struct i915_fragment_program *p, int unit )
-{
-   if (p->ctx->_TriangleCaps & DD_SEPARATE_SPECULAR)
-      return i915_get_temp( p );
-   else if (unit != p->last_tex_stage)
-      return i915_get_temp( p );
-   else
-      return UREG(REG_TYPE_OC, 0);
-}
-      
-
-
-static GLuint emit_texenv( struct i915_fragment_program *p, int unit )
-{
-   struct gl_texture_unit *texUnit = &p->ctx->Texture.Unit[unit];
-   GLenum envMode = texUnit->EnvMode;
-   struct gl_texture_object *tObj = texUnit->_Current;
-   GLenum format = tObj->Image[0][tObj->BaseLevel]->_BaseFormat;
-   GLuint saturate = unit < p->last_tex_stage ? A0_DEST_SATURATE : 0;
-
-   switch(envMode) {
-   case GL_BLEND: {
-      const int cf = get_source(p, GL_PREVIOUS, unit);
-      const int cc = get_source(p, GL_CONSTANT, unit);
-      const int cs = get_source(p, GL_TEXTURE, unit);
-      const int out = get_dest(p, unit);
-
-      if (format == GL_INTENSITY) {
-	 /* cv = cf(1 - cs) + cc.cs
-	  * cv = cf - cf.cs + cc.cs
-	  */
-	 /* u[2] = MAD( -cf * cs + cf )
-	  * cv   = MAD( cc * cs + u[2] )
-	  */
-	 
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, 0, 
-			 negate(cf,1,1,1,1), cs, cf );
-
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, saturate, 
-			 cc, cs, out );
-
-	 return out;
-      } else {
-	 /* cv = cf(1 - cs) + cc.cs
-	  * cv = cf - cf.cs + cc.cs
-	  * av =      af.as
-	  */
-	 /* u[2] = MAD( cf.-x-y-zw * cs.xyzw + cf.xyz0 )
-	  * oC   = MAD( cc.xyz0 * cs.xyz0 + u[2].xyzw )
-	  */
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, 0,
-			 negate(cf,1,1,1,0),  
-			 cs,
-			 swizzle(cf,X,Y,Z,ZERO) );
-
-
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, saturate,
-			 swizzle(cc,X,Y,Z,ZERO),  
-			 swizzle(cs,X,Y,Z,ZERO),
-			 out );
-
-	 return out;
-      }
-   }
-
-   case GL_DECAL: {
-      if (format == GL_RGB ||
-	  format == GL_RGBA) {
-	 int cf = get_source( p, GL_PREVIOUS, unit );
-	 int cs = get_source( p, GL_TEXTURE, unit );
-	 int out = get_dest(p, unit);
-	 
-	 /* cv = cf(1-as) + cs.as
-	  * cv = cf.(-as) + cf + cs.as
-	  * av = af
-	  */ 
-	 
-	 /* u[2] = mad( cf.xyzw * cs.-w-w-w1 + cf.xyz0 )
-	  * oc = mad( cs.xyz0 * cs.www0 + u[2].xyzw )
-	  */
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, 0,
-			 cf,  
-			 negate(swizzle(cs,W,W,W,ONE),1,1,1,0),
-			 swizzle(cf,X,Y,Z,ZERO) );
-	 
-	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, saturate,
-			 swizzle(cs,X,Y,Z,ZERO),  
-			 swizzle(cs,W,W,W,ZERO),
-			 out );
-	 return out;
-      }
-      else {
-	 return get_source( p, GL_PREVIOUS, unit );
-      }
-   }
-
-   case GL_REPLACE: {
-      const int cs = get_source( p, GL_TEXTURE, unit );	/* saturated */
-      switch (format) {
-      case GL_ALPHA: {
-	 const int cf = get_source( p, GL_PREVIOUS, unit ); /* saturated */
-	 i915_emit_arith( p, A0_MOV, cs, A0_DEST_CHANNEL_XYZ, 0, cf, 0, 0 );
-	 return cs;
-      }
-      case GL_RGB:
-      case GL_LUMINANCE: {
-	 const int cf = get_source( p, GL_PREVIOUS, unit ); /* saturated */
-	 i915_emit_arith( p, A0_MOV, cs, A0_DEST_CHANNEL_W, 0, cf, 0, 0 );
-	 return cs;
-      }
-      default:
-	 return cs;
-      }
-   }
-
-   case GL_MODULATE: {
-      const int cf = get_source( p, GL_PREVIOUS, unit );
-      const int cs = get_source( p, GL_TEXTURE, unit );
-      const int out = get_dest(p, unit);
-      switch (format) {
-      case GL_ALPHA: 
-	 i915_emit_arith( p, A0_MUL, out, A0_DEST_CHANNEL_ALL, saturate,
-			 swizzle(cs, ONE, ONE, ONE, W), cf, 0 );
-	 break;
-      default:
-	 i915_emit_arith( p, A0_MUL, out, A0_DEST_CHANNEL_ALL, saturate, 
-			 cs, cf, 0 );
-	 break;
-      }
-      return out;
-   }
-   case GL_ADD: {
-      int cf = get_source( p, GL_PREVIOUS, unit );
-      int cs = get_source( p, GL_TEXTURE, unit );
-      const int out = get_dest( p, unit );
-
-      if (format == GL_INTENSITY) {
-	 /* output-color.rgba = add( incoming, u[1] )
-	  */
-	 i915_emit_arith( p, A0_ADD, out, A0_DEST_CHANNEL_ALL, saturate, 
-			 cs, cf, 0 );
-	 return out;
-      }
-      else {
-	 /* cv.xyz = cf.xyz + cs.xyz
-	  * cv.w   = cf.w * cs.w
-	  *
-	  * cv.xyzw = MAD( cf.111w * cs.xyzw + cf.xyz0 )
-	  */
- 	 i915_emit_arith( p, A0_MAD, out, A0_DEST_CHANNEL_ALL, saturate,
-			 swizzle(cf,ONE,ONE,ONE,W), 
-			 cs,  
-			 swizzle(cf,X,Y,Z,ZERO) ); 
-	 return out;
-      }
-      break;
-   }
-   case GL_COMBINE: {
-      GLuint rgb_shift, alpha_shift, out, shift;
-      GLuint dest = get_dest(p, unit);
-
-      /* The EXT version of the DOT3 extension does not support the
-       * scale factor, but the ARB version (and the version in OpenGL
-       * 1.3) does.
-       */
-      switch (texUnit->Combine.ModeRGB) {
-      case GL_DOT3_RGB_EXT:
-	 alpha_shift = texUnit->Combine.ScaleShiftA;
-	 rgb_shift = 0;
-	 break;
-
-      case GL_DOT3_RGBA_EXT:
-	 alpha_shift = 0;
-	 rgb_shift = 0;
-	 break;
-
-      default:
-	 rgb_shift = texUnit->Combine.ScaleShiftRGB;
-	 alpha_shift = texUnit->Combine.ScaleShiftA;
-	 break;
-      }
-
-
-      /* Emit the RGB and A combine ops
-       */
-      if (texUnit->Combine.ModeRGB == texUnit->Combine.ModeA && 
-	  args_match( texUnit )) {
-	 out = emit_combine( p, dest, A0_DEST_CHANNEL_ALL, saturate,
-			     unit,
-			     texUnit->Combine.ModeRGB,
-			     texUnit->Combine.SourceRGB,
-			     texUnit->Combine.OperandRGB );
-      }
-      else if (texUnit->Combine.ModeRGB == GL_DOT3_RGBA_EXT ||
-	       texUnit->Combine.ModeRGB == GL_DOT3_RGBA) {
-
-	 out = emit_combine( p, dest, A0_DEST_CHANNEL_ALL, saturate,
-			     unit,
-			     texUnit->Combine.ModeRGB,
-			     texUnit->Combine.SourceRGB,
-			     texUnit->Combine.OperandRGB );
-      }
-      else {
-	 /* Need to do something to stop from re-emitting identical
-	  * argument calculations here:
-	  */
-	 out = emit_combine( p, dest, A0_DEST_CHANNEL_XYZ, saturate,
-			     unit,
-			     texUnit->Combine.ModeRGB,
-			     texUnit->Combine.SourceRGB,
-			     texUnit->Combine.OperandRGB );
-	 out = emit_combine( p, dest, A0_DEST_CHANNEL_W, saturate,
-			     unit,
-			     texUnit->Combine.ModeA,
-			     texUnit->Combine.SourceA,
-			     texUnit->Combine.OperandA );
-      }
-
-      /* Deal with the final shift:
-       */
-      if (alpha_shift || rgb_shift) {
-	 if (rgb_shift == alpha_shift) {
-	    shift = i915_emit_const1f(p, 1<<rgb_shift);
-	    shift = swizzle(shift,X,X,X,X);
-	 }
-	 else {
-	    shift = i915_emit_const2f(p, 1<<rgb_shift, 1<<alpha_shift);
-	    shift = swizzle(shift,X,X,X,Y);
-	 }
-	 return i915_emit_arith( p, A0_MUL, dest, A0_DEST_CHANNEL_ALL, 
-				saturate, out, shift, 0 );
-      }
-
-      return out;
-   }
-
-   default:
-      return get_source(p, GL_PREVIOUS, 0);
-   }
-}
-
-static void emit_program_fini( struct i915_fragment_program *p )
-{
-   int cf = get_source( p, GL_PREVIOUS, 0 );
-   int out = UREG( REG_TYPE_OC, 0 );
-
-   if (p->ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
-      /* Emit specular add.
-       */
-      GLuint s = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_ALL);
-      i915_emit_arith( p, A0_ADD, out, A0_DEST_CHANNEL_ALL, 0, cf, 
-		  swizzle(s, X,Y,Z,ZERO), 0 );
-   }
-   else if (cf != out) {
-      /* Will wind up in here if no texture enabled or a couple of
-       * other scenarios (GL_REPLACE for instance).
-       */
-      i915_emit_arith( p, A0_MOV, out, A0_DEST_CHANNEL_ALL, 0, cf, 0, 0 );
-   }
-}
-
-
-static void i915EmitTextureProgram( i915ContextPtr i915 )
-{
-   GLcontext *ctx = &i915->intel.ctx;
-   struct i915_fragment_program *p = &i915->tex_program;
-   GLuint unit;
-
-   if (0) fprintf(stderr, "%s\n", __FUNCTION__);
-
-   i915_init_program( i915, p );
-
-   if (ctx->Texture._EnabledUnits) {
-      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits ; unit++)
-	 if (ctx->Texture.Unit[unit]._ReallyEnabled) {
-	    p->last_tex_stage = unit;
-	 }
-
-      for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++)
-	 if (ctx->Texture.Unit[unit]._ReallyEnabled) {
-	    p->src_previous = emit_texenv( p, unit );
-	    p->src_texture = UREG_BAD;
-	    p->temp_flag = 0xffff000;
-	    p->temp_flag |= 1 << GET_UREG_NR(p->src_previous);
-	 }
-   }
-
-   emit_program_fini( p );
-
-   i915_fini_program( p );
-   i915_upload_program( i915, p );
-
-   p->translated = 1;
-}
-
-
-void i915ValidateTextureProgram( i915ContextPtr i915 )
-{
-   intelContextPtr intel = &i915->intel;
-   GLcontext *ctx = &intel->ctx;
-   TNLcontext *tnl = TNL_CONTEXT(ctx);
-   struct vertex_buffer *VB = &tnl->vb;
-   DECLARE_RENDERINPUTS(index_bitset);
-   int i, offset;
-   GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
-   GLuint s2 = S2_TEXCOORD_NONE;
-
-   RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
-
-   /* Important:
-    */
-   VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr;
-   intel->vertex_attr_count = 0;
-   intel->coloroffset = 0;
-   intel->specoffset = 0;
-   offset = 0;
-
-   if (i915->current_program) {
-      i915->current_program->on_hardware = 0;
-      i915->current_program->params_uptodate = 0;
-   }
-
-   if (i915->vertex_fog == I915_FOG_PIXEL) {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16 );
-      RENDERINPUTS_CLEAR( index_bitset, _TNL_ATTRIB_FOG );
-   }
-   else if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16 );
-   }
-   else {
-      EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, S4_VFMT_XYZ, 12 );
-   }
-
-   /* How undefined is undefined? */
-   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) {
-      EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F, S4_VFMT_POINT_WIDTH, 4 );
-   }
-      
-   intel->coloroffset = offset / 4;
-   EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4 );
-            
-   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) ||
-       RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
-      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
-	 intel->specoffset = offset / 4;
-	 EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3 );
-      } else 
-	 EMIT_PAD( 3 );
-      
-      if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG ))
-	 EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1 );
-      else
-	 EMIT_PAD( 1 );
-   }
-
-   if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
-      for (i = 0; i < 8; i++) {
-	 if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
-	    int sz = VB->TexCoordPtr[i]->size;
-	    
-	    s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
-	    s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
-
-	    EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_SZ(sz), 0, sz * 4 );
-	 }
-      }
-   }
-
-   /* Only need to change the vertex emit code if there has been a
-    * statechange to a new hardware vertex format:
-    */
-   if (s2 != i915->state.Ctx[I915_CTXREG_LIS2] ||
-       s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
-    
-      I915_STATECHANGE( i915, I915_UPLOAD_CTX );
-
-      i915->tex_program.translated = 0;
-
-      /* Must do this *after* statechange, so as not to affect
-       * buffered vertices reliant on the old state:
-       */
-      intel->vertex_size = _tnl_install_attrs( ctx, 
-					       intel->vertex_attrs, 
-					       intel->vertex_attr_count,
-					       intel->ViewportMatrix.m, 0 ); 
-
-      intel->vertex_size >>= 2;
-
-      i915->state.Ctx[I915_CTXREG_LIS2] = s2;
-      i915->state.Ctx[I915_CTXREG_LIS4] = s4;
-
-      assert(intel->vtbl.check_vertex_size( intel, intel->vertex_size ));
-   }
-
-   if (!i915->tex_program.translated ||
-       i915->last_ReallyEnabled != ctx->Texture._EnabledUnits) {
-      i915EmitTextureProgram( i915 );      
-      i915->last_ReallyEnabled = ctx->Texture._EnabledUnits;
-   }
-}
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index a19d4b65840..d53e2cbd5aa 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -25,902 +25,368 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texformat.h"
-#include "texstore.h"
-
-#include "mm.h"
-
-#include "intel_screen.h"
-#include "intel_ioctl.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/texformat.h"
+
+#include "intel_mipmap_tree.h"
 #include "intel_tex.h"
 
 #include "i915_context.h"
 #include "i915_reg.h"
 
-static GLint initial_offsets[6][2] = { {0,0},
-				       {0,2},
-				       {1,0},
-				       {1,2},
-				       {1,1},
-				       {1,3} };
-
-
-static GLint step_offsets[6][2] = { {0,2},
-				    {0,2},
-				    {-1,2},
-				    {-1,2},
-				    {-1,1},
-				    {-1,1} };
-
-
-#define I915_TEX_UNIT_ENABLED(unit)		(1<<unit)
-
-static void i915LayoutTextureImages( i915ContextPtr i915,
-				     struct gl_texture_object *tObj )
-{
-   const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
-   i915TextureObjectPtr t = (i915TextureObjectPtr) tObj->DriverData;
-   GLint firstLevel, lastLevel, numLevels;
-   GLint i, total_height, pitch;
-
-   /* Compute which mipmap levels we really want to send to the hardware.
-    */
-   driCalculateTextureFirstLastLevel( (driTextureObject *) t );
-
-   /* Figure out the amount of memory required to hold all the mipmap
-    * levels.  Choose the smallest pitch to accomodate the largest
-    * mipmap:
-    */
-   firstLevel = t->intel.base.firstLevel;
-   lastLevel = t->intel.base.lastLevel;
-   numLevels = lastLevel - firstLevel + 1;
-
-
-
-   /* All images must be loaded at this pitch.  Count the number of
-    * lines required:
-    */
-   switch (tObj->Target) {
-   case GL_TEXTURE_CUBE_MAP: {
-      const GLuint dim = tObj->Image[0][firstLevel]->Width;
-      GLuint face;
-
-      pitch = dim * t->intel.texelBytes;
-      pitch *= 2;		/* double pitch for cube layouts */
-      pitch = (pitch + 3) & ~3;
-      
-      total_height = dim * 4;
-
-      for ( face = 0 ; face < 6 ; face++) {
-	 GLuint x = initial_offsets[face][0] * dim;
-	 GLuint y = initial_offsets[face][1] * dim;
-	 GLuint d = dim;
-	 
-	 t->intel.base.dirty_images[face] = ~0;
-
-	 assert(tObj->Image[face][firstLevel]->Width == dim);
-	 assert(tObj->Image[face][firstLevel]->Height == dim);
-
-	 for (i = 0; i < numLevels; i++) {
-	    t->intel.image[face][i].image = tObj->Image[face][firstLevel + i];
-	    if (!t->intel.image[face][i].image) {
-	       fprintf(stderr, "no image %d %d\n", face, i);
-	       break;		/* can't happen */
-	    }
-	 
-	    t->intel.image[face][i].offset = 
-	       y * pitch + x * t->intel.texelBytes;
-	    t->intel.image[face][i].internalFormat = baseImage->_BaseFormat;
-
-	    d >>= 1;
-	    x += step_offsets[face][0] * d;
-	    y += step_offsets[face][1] * d;
-	 }
-      }
-      break;
-   }
-   case GL_TEXTURE_3D: {
-      GLuint virtual_height;
-      GLuint tmp_numLevels = numLevels;
-      pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
-      pitch = (pitch + 3) & ~3;
-      t->intel.base.dirty_images[0] = ~0;
-
-      /* Calculate the size of a single slice.  Hardware demands a
-       * minimum of 8 mipmaps, some of which might ultimately not be
-       * used:
-       */
-      if (tmp_numLevels < 9)
-	 tmp_numLevels = 9;
-
-      virtual_height = tObj->Image[0][firstLevel]->Height;
-
-      for ( total_height = i = 0 ; i < tmp_numLevels ; i++ ) {
-	 t->intel.image[0][i].image = tObj->Image[0][firstLevel + i];
-	 if (t->intel.image[0][i].image) {
-	    t->intel.image[0][i].offset = total_height * pitch;
-	    t->intel.image[0][i].internalFormat = baseImage->_BaseFormat;
-	 }
-
-	 total_height += MAX2(2, virtual_height);
-	 virtual_height >>= 1;
-      }
-
-      t->intel.depth_pitch = total_height * pitch;
-
-      /* Multiply slice size by texture depth for total size.  It's
-       * remarkable how wasteful of memory all the i8x0 texture
-       * layouts are.
-       */
-      total_height *= t->intel.image[0][0].image->Depth;
-      break;
-   }
-   default:
-      pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
-      pitch = (pitch + 3) & ~3;
-      t->intel.base.dirty_images[0] = ~0;
-
-      for ( total_height = i = 0 ; i < numLevels ; i++ ) {
-	 t->intel.image[0][i].image = tObj->Image[0][firstLevel + i];
-	 if (!t->intel.image[0][i].image) 
-	    break;
-	 
-	 t->intel.image[0][i].offset = total_height * pitch;
-	 t->intel.image[0][i].internalFormat = baseImage->_BaseFormat;
-	 if (t->intel.image[0][i].image->IsCompressed) {
-	    total_height += (t->intel.image[0][i].image->Height + 3) / 4;
-	 }
-	 else
-	   total_height += MAX2(2, t->intel.image[0][i].image->Height);
-      }
-      break;
-   }
-
-   t->intel.Pitch = pitch;
-   t->intel.base.totalSize = total_height*pitch;
-   t->intel.max_level = numLevels-1;
-}
-
-
-static void i945LayoutTextureImages( i915ContextPtr i915,
-				    struct gl_texture_object *tObj )
-{
-   const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
-   i915TextureObjectPtr t = (i915TextureObjectPtr) tObj->DriverData;
-   GLint firstLevel, lastLevel, numLevels;
-   GLint i, total_height, pitch, sz, max_offset = 0, offset;
-
-
-   /* Compute which mipmap levels we really want to send to the hardware.
-    */
-   driCalculateTextureFirstLastLevel( (driTextureObject *) t );
-
-   /* Figure out the amount of memory required to hold all the mipmap
-    * levels.  Choose the smallest pitch to accomodate the largest
-    * mipmap:
-    */
-   firstLevel = t->intel.base.firstLevel;
-   lastLevel = t->intel.base.lastLevel;
-   numLevels = lastLevel - firstLevel + 1;
-
-
-
-   /* All images must be loaded at this pitch.  Count the number of
-    * lines required:
-    */
-   switch (tObj->Target) {
-   case GL_TEXTURE_CUBE_MAP: {
-      const GLuint dim = tObj->Image[0][firstLevel]->Width;
-      GLuint face;
-
-      /* Depending on the size of the largest images, pitch can be
-       * determined either by the old-style packing of cubemap faces,
-       * or the final row of 4x4, 2x2 and 1x1 faces below this. 
-       */
-      if (dim > 32) {
-	 pitch = dim * t->intel.texelBytes;
-	 pitch *= 2;		/* double pitch for cube layouts */
-	 pitch = (pitch + 3) & ~3;
-      }
-      else {
-	 pitch = 14 * 8 * t->intel.texelBytes; /* determined by row of
-						* little maps at
-						* bottom */
-      }
-      
-      total_height = dim * 4 + 4;
-
-      for ( face = 0 ; face < 6 ; face++) {
-	 GLuint x = initial_offsets[face][0] * dim;
-	 GLuint y = initial_offsets[face][1] * dim;
-	 GLuint d = dim;
-	 
-	 if (dim == 4 && face >= 4) {
-	    y = total_height - 4;
-	    x = (face - 4) * 8;
-	 }
-	 else if (dim < 4) {
-	    y = total_height - 4;
-	    x = face * 8;
-	 }
-
-	 t->intel.base.dirty_images[face] = ~0;
-
-	 assert(tObj->Image[face][firstLevel]->Width == dim);
-	 assert(tObj->Image[face][firstLevel]->Height == dim);
-
-	 for (i = 0; i < numLevels; i++) {
-
-
-	    t->intel.image[face][i].image = tObj->Image[face][firstLevel + i];
-	    assert(t->intel.image[face][i].image);
-	 
-	    t->intel.image[face][i].offset = 
-	       y * pitch + x * t->intel.texelBytes;
-	    t->intel.image[face][i].internalFormat = baseImage->_BaseFormat;
-
-	    d >>= 1;
-	    
-	    switch (d) {
-	    case 4:
-	       switch (face) {
-	       case FACE_POS_X:
-	       case FACE_NEG_X:
-		  x += step_offsets[face][0] * d;
-		  y += step_offsets[face][1] * d;
-		  break;
-	       case FACE_POS_Y:
-	       case FACE_NEG_Y:
-		  y += 12;
-		  x -= 8;
-		  break;
-	       case FACE_POS_Z:
-	       case FACE_NEG_Z:
-		  y = total_height - 4;
-		  x = (face - 4) * 8;
-		  break;
-	       }
-
-	    case 2:
-	       y = total_height - 4;
-	       x = 16 + face * 8;
-	       break;
-
-	    case 1:
-	       x += 48;
-	       break;
-	       
-	    default:
-	       x += step_offsets[face][0] * d;
-	       y += step_offsets[face][1] * d;
-	       break;
-	    }
-	 }
-      }
-      max_offset = total_height * pitch;
-      break;
-   }
-   case GL_TEXTURE_3D: {
-      GLuint depth_packing = 0, depth_pack_pitch;
-      GLuint tmp_numLevels = numLevels;
-      pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
-      pitch = (pitch + 3) & ~3;
-      depth_pack_pitch = pitch;
-      
-      t->intel.base.dirty_images[0] = ~0;
-
-
-      for ( total_height = i = 0 ; i < tmp_numLevels ; i++ ) {
-	 t->intel.image[0][i].image = tObj->Image[0][firstLevel + i];
-	 if (!t->intel.image[0][i].image) 
-	    break;
-
-	 
-	 t->intel.image[0][i].offset = total_height * pitch;
-	 t->intel.image[0][i].internalFormat = baseImage->_BaseFormat;
-	 
-
-
-	 total_height += MAX2(2, t->intel.image[0][i].image->Height) * 
-	    MAX2((t->intel.image[0][i].image->Depth >> depth_packing), 1);
-
-	 /* When alignment dominates, can't increase depth packing?
-	  * Or does pitch grow???  What are the alignment constraints,
-	  * anyway?
-	  */
-	 if (depth_pack_pitch > 4) {
-	    depth_packing++;
-	    depth_pack_pitch <<= 2;
-	 }
-      }
-
-      max_offset = total_height * pitch;
-      break;
-   }
-   default:
-      pitch = tObj->Image[0][firstLevel]->Width * t->intel.texelBytes;
-      pitch = (pitch + 3) & ~3;
-      t->intel.base.dirty_images[0] = ~0;
-      max_offset = 0;
-
-      for ( offset = i = 0 ; i < numLevels ; i++ ) {
-	 t->intel.image[0][i].image = tObj->Image[0][firstLevel + i];
-	 if (!t->intel.image[0][i].image) 
-	    break;
-	 
-	 t->intel.image[0][i].offset = offset;
-	 t->intel.image[0][i].internalFormat = baseImage->_BaseFormat;
-
-	 if (t->intel.image[0][i].image->IsCompressed)
-	    sz = MAX2(1, t->intel.image[0][i].image->Height/4) * pitch;
-	 else
-	    sz = MAX2(2, t->intel.image[0][i].image->Height) * pitch;
-	 
-	 /* Because the images are packed better, the final offset
-	  * might not be the maximal one:
-	  */
-	 max_offset = MAX2(max_offset, offset + sz);
-
-	 /* LPT change: step right after second mipmap.
-	  */
-	 if (i == 1) 
-	    offset += pitch / 2;
-	 else 
-	    offset += sz;
 
-      }
-      break;
-   }
-
-   t->intel.Pitch = pitch;
-   t->intel.base.totalSize = max_offset;
-   t->intel.max_level = numLevels-1;
-}
-
-
-
-
-static void i915SetTexImages( i915ContextPtr i915, 
-			     struct gl_texture_object *tObj )
+static GLuint
+translate_texture_format(GLuint mesa_format, GLenum DepthMode)
 {
-   GLuint textureFormat;
-   i915TextureObjectPtr t = (i915TextureObjectPtr) tObj->DriverData;
-   const struct gl_texture_image *baseImage = tObj->Image[0][tObj->BaseLevel];
-   GLint ss2 = 0;
-
-   switch( baseImage->TexFormat->MesaFormat ) {
+   switch (mesa_format) {
    case MESA_FORMAT_L8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_L8;
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_L8;
    case MESA_FORMAT_I8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_I8;
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_I8;
    case MESA_FORMAT_A8:
-      t->intel.texelBytes = 1;
-      textureFormat = MAPSURF_8BIT | MT_8BIT_A8; 
-      break;
-
+      return MAPSURF_8BIT | MT_8BIT_A8;
    case MESA_FORMAT_AL88:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_AY88;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_AY88;
    case MESA_FORMAT_RGB565:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_RGB565;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_RGB565;
    case MESA_FORMAT_ARGB1555:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB1555;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_ARGB1555;
    case MESA_FORMAT_ARGB4444:
-      t->intel.texelBytes = 2;
-      textureFormat = MAPSURF_16BIT | MT_16BIT_ARGB4444;
-      break;
-
+      return MAPSURF_16BIT | MT_16BIT_ARGB4444;
    case MESA_FORMAT_ARGB8888:
-      t->intel.texelBytes = 4;
-      textureFormat = MAPSURF_32BIT | MT_32BIT_ARGB8888;
-      break;
-
+      return MAPSURF_32BIT | MT_32BIT_ARGB8888;
    case MESA_FORMAT_YCBCR_REV:
-      t->intel.texelBytes = 2;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_NORMAL);
-      ss2 |= SS2_COLORSPACE_CONVERSION;
-      break;
-
+      return (MAPSURF_422 | MT_422_YCRCB_NORMAL);
    case MESA_FORMAT_YCBCR:
-      t->intel.texelBytes = 2;
-      textureFormat = (MAPSURF_422 | MT_422_YCRCB_SWAPY);
-      ss2 |= SS2_COLORSPACE_CONVERSION;
-      break;
-
+      return (MAPSURF_422 | MT_422_YCRCB_SWAPY);
    case MESA_FORMAT_RGB_FXT1:
    case MESA_FORMAT_RGBA_FXT1:
-     t->intel.texelBytes = 2;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_FXT1);
-     break;
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_FXT1);
    case MESA_FORMAT_Z16:
-      t->intel.texelBytes = 2;
-      textureFormat = (MAPSURF_16BIT | MT_16BIT_L16);
-      break;
-
+      if (DepthMode == GL_ALPHA)
+          return (MAPSURF_16BIT | MT_16BIT_A16);
+      else if (DepthMode == GL_INTENSITY)
+          return (MAPSURF_16BIT | MT_16BIT_I16);
+      else
+          return (MAPSURF_16BIT | MT_16BIT_L16);
    case MESA_FORMAT_RGBA_DXT1:
    case MESA_FORMAT_RGB_DXT1:
-     /* 
-      * DXTn pitches are Width/4 * blocksize in bytes 
-      * for DXT1: blocksize=8 so Width/4*8 = Width * 2 
-      * for DXT3/5: blocksize=16 so Width/4*16 = Width * 4
-      */
-     t->intel.texelBytes = 2;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT1);
-     break;
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT1);
    case MESA_FORMAT_RGBA_DXT3:
-     t->intel.texelBytes = 4;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT2_3);
-     break;
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT2_3);
    case MESA_FORMAT_RGBA_DXT5:
-     t->intel.texelBytes = 4;
-     textureFormat = (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
-     break;
-
-#if 0
-   case MESA_FORMAT_Z24_S8:
-      t->intel.texelBytes = 4;
-      textureFormat = (MAPSURF_32BIT | MT_32BIT_xL824);
-      break;
-#endif
-
+      return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
+   case MESA_FORMAT_S8_Z24:
+      return (MAPSURF_32BIT | MT_32BIT_xI824);
    default:
-      fprintf(stderr, "%s: bad image format %x\n", __FUNCTION__,
-	      baseImage->TexFormat->MesaFormat);
+      fprintf(stderr, "%s: bad image format %x\n", __FUNCTION__, mesa_format);
       abort();
+      return 0;
    }
+}
 
-   switch (i915->intel.intelScreen->deviceID) {
-   case PCI_CHIP_I945_G:
-   case PCI_CHIP_I945_GM:
-   case PCI_CHIP_I945_GME:
-   case PCI_CHIP_G33_G:
-   case PCI_CHIP_Q33_G:
-   case PCI_CHIP_Q35_G:
-       i945LayoutTextureImages( i915, tObj );
-       break;
-   default:
-       i915LayoutTextureImages( i915, tObj );
-       break;
-   }
-
-   t->Setup[I915_TEXREG_MS3] = 
-      (((tObj->Image[0][t->intel.base.firstLevel]->Height - 1) << MS3_HEIGHT_SHIFT) |
-       ((tObj->Image[0][t->intel.base.firstLevel]->Width - 1) << MS3_WIDTH_SHIFT) |
-       textureFormat |
-       MS3_USE_FENCE_REGS);
-
-   t->Setup[I915_TEXREG_MS4] = 
-      ((((t->intel.Pitch / 4) - 1) << MS4_PITCH_SHIFT) | 
-       MS4_CUBE_FACE_ENA_MASK |
-       (((t->intel.max_level * 4)) << MS4_MAX_LOD_SHIFT) |
-       ((tObj->Image[0][t->intel.base.firstLevel]->Depth - 1) << MS4_VOLUME_DEPTH_SHIFT));
-
-   t->Setup[I915_TEXREG_SS2] &= ~(SS2_COLORSPACE_CONVERSION);
-   t->Setup[I915_TEXREG_SS2] |= ss2;
-
-   t->intel.dirty = I915_UPLOAD_TEX_ALL;
 
-}
 
 
 /* The i915 (and related graphics cores) do not support GL_CLAMP.  The
  * Intel drivers for "other operating systems" implement GL_CLAMP as
  * GL_CLAMP_TO_EDGE, so the same is done here.
  */
-static GLuint translate_wrap_mode( GLenum wrap )
+static GLuint
+translate_wrap_mode(GLenum wrap)
 {
-   switch( wrap ) {
-   case GL_REPEAT: return TEXCOORDMODE_WRAP;
-   case GL_CLAMP:  return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
-   case GL_CLAMP_TO_EDGE: return TEXCOORDMODE_CLAMP_EDGE;
-   case GL_CLAMP_TO_BORDER: return TEXCOORDMODE_CLAMP_BORDER;
-   case GL_MIRRORED_REPEAT: return TEXCOORDMODE_MIRROR;
-   default: return TEXCOORDMODE_WRAP;
-   }
-}
-
-
-/**
- */
-static void i915ImportTexObjState( struct gl_texture_object *texObj )
-{   
-   i915TextureObjectPtr t = (i915TextureObjectPtr)texObj->DriverData;
-   int minFilt = 0, mipFilt = 0, magFilt = 0, shadow = 0;
-
-   if(INTEL_DEBUG&DEBUG_DRI)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   switch (texObj->MinFilter) {
-   case GL_NEAREST:
-      minFilt = FILTER_NEAREST;
-      mipFilt = MIPFILTER_NONE;
-      break;
-   case GL_LINEAR:
-      minFilt = FILTER_LINEAR;
-      mipFilt = MIPFILTER_NONE;
-      break;
-   case GL_NEAREST_MIPMAP_NEAREST:
-      minFilt = FILTER_NEAREST;
-      mipFilt = MIPFILTER_NEAREST;
-      break;
-   case GL_LINEAR_MIPMAP_NEAREST:
-      minFilt = FILTER_LINEAR;
-      mipFilt = MIPFILTER_NEAREST;
-      break;
-   case GL_NEAREST_MIPMAP_LINEAR:
-      minFilt = FILTER_NEAREST;
-      mipFilt = MIPFILTER_LINEAR;
-      break;
-   case GL_LINEAR_MIPMAP_LINEAR:
-      minFilt = FILTER_LINEAR;
-      mipFilt = MIPFILTER_LINEAR;
-      break;
+   switch (wrap) {
+   case GL_REPEAT:
+      return TEXCOORDMODE_WRAP;
+   case GL_CLAMP:
+      return TEXCOORDMODE_CLAMP_EDGE;   /* not quite correct */
+   case GL_CLAMP_TO_EDGE:
+      return TEXCOORDMODE_CLAMP_EDGE;
+   case GL_CLAMP_TO_BORDER:
+      return TEXCOORDMODE_CLAMP_BORDER;
+   case GL_MIRRORED_REPEAT:
+      return TEXCOORDMODE_MIRROR;
    default:
-      break;
-   }
-
-   if ( texObj->MaxAnisotropy > 1.0 ) {
-      minFilt = FILTER_ANISOTROPIC; 
-      magFilt = FILTER_ANISOTROPIC;
-   }
-   else {
-      switch (texObj->MagFilter) {
-      case GL_NEAREST:
-	 magFilt = FILTER_NEAREST;
-	 break;
-      case GL_LINEAR:
-	 magFilt = FILTER_LINEAR;
-	 break;
-      default:
-	 break;
-      }  
-   }
-
-   if (texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB && 
-       texObj->Target != GL_TEXTURE_3D) {
-
-      shadow = SS2_SHADOW_ENABLE;
-      shadow |= intel_translate_compare_func( texObj->CompareFunc );
-      
-      minFilt = FILTER_4X4_FLAT;
-      magFilt = FILTER_4X4_FLAT;
-   }
-
-
-   t->Setup[I915_TEXREG_SS2] &= ~(SS2_MIN_FILTER_MASK |
-				 SS2_MIP_FILTER_MASK |
-				 SS2_MAG_FILTER_MASK |
-				 SS2_SHADOW_ENABLE |
-				 SS2_SHADOW_FUNC_MASK);
-   t->Setup[I915_TEXREG_SS2] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
-				(mipFilt << SS2_MIP_FILTER_SHIFT) |
-				(magFilt << SS2_MAG_FILTER_SHIFT) |
-				shadow);
-
-   {
-      GLuint ss3 = t->Setup[I915_TEXREG_SS3] & ~(SS3_TCX_ADDR_MODE_MASK |
-						SS3_TCY_ADDR_MODE_MASK |
-						SS3_TCZ_ADDR_MODE_MASK);
-      GLenum ws = texObj->WrapS;
-      GLenum wt = texObj->WrapT;
-      GLenum wr = texObj->WrapR;
-      
-      t->refs_border_color = 0;
-
-      if (texObj->Target == GL_TEXTURE_3D &&
-	  (texObj->MinFilter != GL_NEAREST ||
-	   texObj->MagFilter != GL_NEAREST)) {
-	 
-	 /* Try to mimic GL_CLAMP functionality a little better -
-	  * switch to CLAMP_TO_BORDER whenever a non-NEAREST filter is
-	  * in use.  Only do this for 3D textures at the moment --
-	  * doing it universally would fix the conform texbc.c
-	  * failure, though.
-	  */
-	 if (ws == GL_CLAMP) ws = GL_CLAMP_TO_BORDER;
-	 if (wt == GL_CLAMP) wt = GL_CLAMP_TO_BORDER;
-	 if (wr == GL_CLAMP) wr = GL_CLAMP_TO_BORDER;
-
-	 /* 3D textures don't seem to respect the border color.
-	  * Fallback if there's ever a danger that they might refer to
-	  * it.
-	  */
-	 if (ws == GL_CLAMP_TO_BORDER) t->refs_border_color = 1;
-	 if (wt == GL_CLAMP_TO_BORDER) t->refs_border_color = 1;
-	 if (wr == GL_CLAMP_TO_BORDER) t->refs_border_color = 1;
-      }
-
-      ss3 |= translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT;
-      ss3 |= translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT;
-      ss3 |= translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT;
-   
-      if (ss3 != t->Setup[I915_TEXREG_SS3]) {
-	 t->intel.dirty = I915_UPLOAD_TEX_ALL;
-	 t->Setup[I915_TEXREG_SS3] = ss3;
-      }
-   }
-
-   {   
-      const GLubyte *color = texObj->_BorderChan;
-
-      t->Setup[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(color[0],color[1],
-						     color[2],color[3]);
+      return TEXCOORDMODE_WRAP;
    }
 }
 
 
 
-static void i915_import_tex_unit( i915ContextPtr i915, 
-				 i915TextureObjectPtr t,
-				 GLuint unit )
+/* Recalculate all state from scratch.  Perhaps not the most
+ * efficient, but this has gotten complex enough that we need
+ * something which is understandable and reliable.
+ */
+static GLboolean
+i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 {
-   GLuint state[I915_TEX_SETUP_SIZE];
+   GLcontext *ctx = &intel->ctx;
+   struct i915_context *i915 = i915_context(ctx);
+   struct gl_texture_unit *tUnit = &ctx->Texture.Unit[unit];
+   struct gl_texture_object *tObj = tUnit->_Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   struct gl_texture_image *firstImage;
+   GLuint *state = i915->state.Tex[unit], format, pitch;
+   GLint lodbias;
 
-   if(INTEL_DEBUG&DEBUG_TEXTURE)
-      fprintf(stderr, "%s unit(%d)\n", __FUNCTION__, unit);
-   
-   if (i915->intel.CurrentTexObj[unit]) 
-      i915->intel.CurrentTexObj[unit]->base.bound &= ~(1U << unit);
+   memset(state, 0, sizeof(state));
 
-   i915->intel.CurrentTexObj[unit] = (intelTextureObjectPtr)t;
-   t->intel.base.bound |= (1 << unit);
+   /*We need to refcount these. */
 
-   if (t->intel.dirty & I915_UPLOAD_TEX(unit)) {
-      i915ImportTexObjState( t->intel.base.tObj );
-      t->intel.dirty &= ~I915_UPLOAD_TEX(unit);
+   if (i915->state.tex_buffer[unit] != NULL) {
+       dri_bo_unreference(i915->state.tex_buffer[unit]);
+       i915->state.tex_buffer[unit] = NULL;
    }
 
-   state[I915_TEXREG_MS2] = t->intel.TextureOffset;
-   state[I915_TEXREG_MS3] = t->Setup[I915_TEXREG_MS3];
-   state[I915_TEXREG_MS4] = t->Setup[I915_TEXREG_MS4];
-
-   state[I915_TEXREG_SS2] = (i915->state.Tex[unit][I915_TEXREG_SS2] &
-			    SS2_LOD_BIAS_MASK);
-   state[I915_TEXREG_SS2] |= (t->Setup[I915_TEXREG_SS2] & ~SS2_LOD_BIAS_MASK);
-
-   state[I915_TEXREG_SS3] = (i915->state.Tex[unit][I915_TEXREG_SS3] &
-			    SS3_NORMALIZED_COORDS);
-   state[I915_TEXREG_SS3] |= (t->Setup[I915_TEXREG_SS3] &
-			     ~(SS3_NORMALIZED_COORDS|
-			       SS3_TEXTUREMAP_INDEX_MASK));
+   if (!intelObj->imageOverride && !intel_finalize_mipmap_tree(intel, unit))
+      return GL_FALSE;
 
-   state[I915_TEXREG_SS3] |= (unit<<SS3_TEXTUREMAP_INDEX_SHIFT);
+   /* Get first image here, since intelObj->firstLevel will get set in
+    * the intel_finalize_mipmap_tree() call above.
+    */
+   firstImage = tObj->Image[0][intelObj->firstLevel];
 
-   state[I915_TEXREG_SS4] = t->Setup[I915_TEXREG_SS4];
+   if (intelObj->imageOverride) {
+      i915->state.tex_buffer[unit] = NULL;
+      i915->state.tex_offset[unit] = intelObj->textureOffset;
 
+      switch (intelObj->depthOverride) {
+      case 32:
+	 format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
+	 break;
+      case 24:
+      default:
+	 format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
+	 break;
+      case 16:
+	 format = MAPSURF_16BIT | MT_16BIT_RGB565;
+	 break;
+      }
 
-   if (memcmp(state, i915->state.Tex[unit], sizeof(state)) != 0) {
-      I915_STATECHANGE( i915, I915_UPLOAD_TEX(unit) );
-      memcpy(i915->state.Tex[unit], state, sizeof(state));
+      pitch = intelObj->pitchOverride;
+   } else {
+      dri_bo_reference(intelObj->mt->region->buffer);
+      i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+      i915->state.tex_offset[unit] =  intel_miptree_image_offset(intelObj->mt,
+								 0, intelObj->
+								 firstLevel);
+
+      format = translate_texture_format(firstImage->TexFormat->MesaFormat, 
+		tObj->DepthMode);
+      pitch = intelObj->mt->pitch * intelObj->mt->cpp;
    }
-}
-
 
+   state[I915_TEXREG_MS3] =
+      (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |
+       ((firstImage->Width - 1) << MS3_WIDTH_SHIFT) | format |
+       MS3_USE_FENCE_REGS);
 
-static GLboolean enable_tex_common( GLcontext *ctx, GLuint unit )
-{
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i915TextureObjectPtr t = (i915TextureObjectPtr)tObj->DriverData;
-
-   if (0) fprintf(stderr, "%s %d\n", __FUNCTION__, unit);
+   state[I915_TEXREG_MS4] =
+     ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK |
+       ((((intelObj->lastLevel - intelObj->firstLevel) * 4)) <<
+	MS4_MAX_LOD_SHIFT) | ((firstImage->Depth - 1) <<
+			      MS4_VOLUME_DEPTH_SHIFT));
 
-   if (!(i915->state.active & I915_UPLOAD_TEX(unit))) {
-      I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(unit), GL_TRUE);
-   }
 
-   /* Fallback if there's a texture border */
-   if ( tObj->Image[0][tObj->BaseLevel]->Border > 0 ) {
-      return GL_FALSE;
-   }
+   {
+      GLuint minFilt, mipFilt, magFilt;
 
+      switch (tObj->MinFilter) {
+      case GL_NEAREST:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_NONE;
+         break;
+      case GL_LINEAR:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_NONE;
+         break;
+      case GL_NEAREST_MIPMAP_NEAREST:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_NEAREST;
+         break;
+      case GL_LINEAR_MIPMAP_NEAREST:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_NEAREST;
+         break;
+      case GL_NEAREST_MIPMAP_LINEAR:
+         minFilt = FILTER_NEAREST;
+         mipFilt = MIPFILTER_LINEAR;
+         break;
+      case GL_LINEAR_MIPMAP_LINEAR:
+         minFilt = FILTER_LINEAR;
+         mipFilt = MIPFILTER_LINEAR;
+         break;
+      default:
+         return GL_FALSE;
+      }
 
-   /* Update state if this is a different texture object to last
-    * time.
-    */
-   if (i915->intel.CurrentTexObj[unit] != &t->intel || 
-       (t->intel.dirty & I915_UPLOAD_TEX(unit))) {
-      i915_import_tex_unit( i915, t, unit);
-      i915->tex_program.translated = 0;
-   }
+      if (tObj->MaxAnisotropy > 1.0) {
+         minFilt = FILTER_ANISOTROPIC;
+         magFilt = FILTER_ANISOTROPIC;
+      }
+      else {
+         switch (tObj->MagFilter) {
+         case GL_NEAREST:
+            magFilt = FILTER_NEAREST;
+            break;
+         case GL_LINEAR:
+            magFilt = FILTER_LINEAR;
+            break;
+         default:
+            return GL_FALSE;
+         }
+      }
 
-   return GL_TRUE;
-}
+      lodbias = (int) ((tUnit->LodBias + tObj->LodBias) * 16.0);
+      if (lodbias < -256)
+          lodbias = -256;
+      if (lodbias > 255)
+          lodbias = 255;
+      state[I915_TEXREG_SS2] = ((lodbias << SS2_LOD_BIAS_SHIFT) & 
+                                SS2_LOD_BIAS_MASK);
 
-static GLboolean enable_tex_rect( GLcontext *ctx, GLuint unit )
-{
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i915TextureObjectPtr t = (i915TextureObjectPtr)tObj->DriverData;
-   GLuint ss3 = i915->state.Tex[unit][I915_TEXREG_SS3];
+      /* YUV conversion:
+       */
+      if (firstImage->TexFormat->MesaFormat == MESA_FORMAT_YCBCR ||
+          firstImage->TexFormat->MesaFormat == MESA_FORMAT_YCBCR_REV)
+         state[I915_TEXREG_SS2] |= SS2_COLORSPACE_CONVERSION;
 
-   ss3 &= ~SS3_NORMALIZED_COORDS;
+      /* Shadow:
+       */
+      if (tObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB &&
+          tObj->Target != GL_TEXTURE_3D) {
+         if (tObj->Target == GL_TEXTURE_1D) 
+            return GL_FALSE;
 
-   if (ss3 != i915->state.Tex[unit][I915_TEXREG_SS3]) {
-      I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
-      i915->state.Tex[unit][I915_TEXREG_SS3] = ss3;
-   }
+         state[I915_TEXREG_SS2] |=
+            (SS2_SHADOW_ENABLE |
+             intel_translate_shadow_compare_func(tObj->CompareFunc));
 
-   /* Upload teximages (not pipelined)
-    */
-   if (t->intel.base.dirty_images[0]) {
-      i915SetTexImages( i915, tObj );
-      if (!intelUploadTexImages( &i915->intel, &t->intel, 0 )) {
-	 return GL_FALSE;
+         minFilt = FILTER_4X4_FLAT;
+         magFilt = FILTER_4X4_FLAT;
       }
-   }
-
-   return GL_TRUE;
-}
 
+      state[I915_TEXREG_SS2] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
+                                 (mipFilt << SS2_MIP_FILTER_SHIFT) |
+                                 (magFilt << SS2_MAG_FILTER_SHIFT));
+   }
 
-static GLboolean enable_tex_2d( GLcontext *ctx, GLuint unit )
-{
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i915TextureObjectPtr t = (i915TextureObjectPtr)tObj->DriverData;
-   GLuint ss3 = i915->state.Tex[unit][I915_TEXREG_SS3];
+   {
+      GLenum ws = tObj->WrapS;
+      GLenum wt = tObj->WrapT;
+      GLenum wr = tObj->WrapR;
 
-   ss3 |= SS3_NORMALIZED_COORDS;
 
-   if (ss3 != i915->state.Tex[unit][I915_TEXREG_SS3]) {
-      I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
-      i915->state.Tex[unit][I915_TEXREG_SS3] = ss3;
-   }
+      /* 3D textures don't seem to respect the border color.
+       * Fallback if there's ever a danger that they might refer to
+       * it.  
+       * 
+       * Effectively this means fallback on 3D clamp or
+       * clamp_to_border.
+       */
+      if (tObj->Target == GL_TEXTURE_3D &&
+          (tObj->MinFilter != GL_NEAREST ||
+           tObj->MagFilter != GL_NEAREST) &&
+          (ws == GL_CLAMP ||
+           wt == GL_CLAMP ||
+           wr == GL_CLAMP ||
+           ws == GL_CLAMP_TO_BORDER ||
+           wt == GL_CLAMP_TO_BORDER || wr == GL_CLAMP_TO_BORDER))
+         return GL_FALSE;
+
+      /* Only support TEXCOORDMODE_CLAMP_EDGE and TEXCOORDMODE_CUBE (not 
+       * used) when using cube map texture coordinates
+       */
+      if (tObj->Target == GL_TEXTURE_CUBE_MAP_ARB &&
+          (((ws != GL_CLAMP) && (ws != GL_CLAMP_TO_EDGE)) ||
+           ((wr != GL_CLAMP) && (wr != GL_CLAMP_TO_EDGE))))
+          return GL_FALSE;
 
-   /* Upload teximages (not pipelined)
-    */
-   if (t->intel.base.dirty_images[0]) {
-      i915SetTexImages( i915, tObj );
-      if (!intelUploadTexImages( &i915->intel, &t->intel, 0 )) {
-	 return GL_FALSE;
-      }
-   }
+      state[I915_TEXREG_SS3] = ss3;     /* SS3_NORMALIZED_COORDS */
 
-   return GL_TRUE;
-}
+      state[I915_TEXREG_SS3] |=
+         ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
+          (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
+          (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
 
-static GLboolean enable_tex_cube( GLcontext *ctx, GLuint unit )
-{
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-   struct gl_texture_object *tObj = texUnit->_Current;
-   i915TextureObjectPtr t = (i915TextureObjectPtr)tObj->DriverData;
-   GLuint ss3 = i915->state.Tex[unit][I915_TEXREG_SS3];
-   GLuint face;
-
-   ss3 |= SS3_NORMALIZED_COORDS;
-
-   if (ss3 != i915->state.Tex[unit][I915_TEXREG_SS3]) {
-      I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
-      i915->state.Tex[unit][I915_TEXREG_SS3] = ss3;
+      state[I915_TEXREG_SS3] |= (unit << SS3_TEXTUREMAP_INDEX_SHIFT);
    }
 
-   /* Upload teximages (not pipelined)
-    */
-   if ( t->intel.base.dirty_images[0] || t->intel.base.dirty_images[1] ||
-        t->intel.base.dirty_images[2] || t->intel.base.dirty_images[3] ||
-        t->intel.base.dirty_images[4] || t->intel.base.dirty_images[5] ) {
-      i915SetTexImages( i915, tObj );
-   }
 
-   /* upload (per face) */
-   for (face = 0; face < 6; face++) {
-      if (t->intel.base.dirty_images[face]) {
-	 if (!intelUploadTexImages( &i915->intel, &t->intel, face )) {
-	    return GL_FALSE;
-	 }
-      }
+   if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
+      /* GL specs that border color for depth textures is taken from the
+       * R channel, while the hardware uses A.  Spam R into all the channels
+       * for safety.
+       */
+      state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
+						   tObj->_BorderChan[0],
+						   tObj->_BorderChan[0],
+						   tObj->_BorderChan[0]);
+   } else {
+      state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
+						   tObj->_BorderChan[1],
+						   tObj->_BorderChan[2],
+						   tObj->_BorderChan[3]);
    }
 
 
-   return GL_TRUE;
-}
-
-static GLboolean enable_tex_3d( GLcontext *ctx, GLuint unit )
-{
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
-   i915TextureObjectPtr t = (i915TextureObjectPtr)tObj->DriverData;
-
-   /* 3D textures on I915 seem to get bogus border colors, hence this
-    * fallback:
+   I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(unit), GL_TRUE);
+   /* memcmp was already disabled, but definitely won't work as the
+    * region might now change and that wouldn't be detected:
     */
-   if (t->refs_border_color)
-      return GL_FALSE;
-
-   return GL_TRUE;
-}
-
-
+   I915_STATECHANGE(i915, I915_UPLOAD_TEX(unit));
 
- 
-static GLboolean disable_tex( GLcontext *ctx, GLuint unit )
-{
-   i915ContextPtr i915 = I915_CONTEXT(ctx);
-
-   if (i915->state.active & I915_UPLOAD_TEX(unit)) {
-      I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(unit), GL_FALSE);
-   }
 
-   /* The old texture is no longer bound to this texture unit.
-    * Mark it as such.
-    */
-   if ( i915->intel.CurrentTexObj[unit] != NULL ) {
-      i915->intel.CurrentTexObj[unit]->base.bound &= ~(1U << 0);
-      i915->intel.CurrentTexObj[unit] = NULL;
-   }
+#if 0
+   DBG(TEXTURE, "state[I915_TEXREG_SS2] = 0x%x\n", state[I915_TEXREG_SS2]);
+   DBG(TEXTURE, "state[I915_TEXREG_SS3] = 0x%x\n", state[I915_TEXREG_SS3]);
+   DBG(TEXTURE, "state[I915_TEXREG_SS4] = 0x%x\n", state[I915_TEXREG_SS4]);
+   DBG(TEXTURE, "state[I915_TEXREG_MS2] = 0x%x\n", state[I915_TEXREG_MS2]);
+   DBG(TEXTURE, "state[I915_TEXREG_MS3] = 0x%x\n", state[I915_TEXREG_MS3]);
+   DBG(TEXTURE, "state[I915_TEXREG_MS4] = 0x%x\n", state[I915_TEXREG_MS4]);
+#endif
 
    return GL_TRUE;
 }
 
-static GLboolean i915UpdateTexUnit( GLcontext *ctx, GLuint unit )
-{
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-
-   if (texUnit->_ReallyEnabled &&
-       INTEL_CONTEXT(ctx)->intelScreen->tex.size < 2048 * 1024)
-      return GL_FALSE;
 
-   switch (texUnit->_ReallyEnabled) {
-   case TEXTURE_1D_BIT:
-   case TEXTURE_2D_BIT:
-      return (enable_tex_2d( ctx, unit ) &&
-	      enable_tex_common( ctx, unit ));
-   case TEXTURE_RECT_BIT:
-      return (enable_tex_rect( ctx, unit ) &&
-	      enable_tex_common( ctx, unit ));
-   case TEXTURE_CUBE_BIT:
-      return (enable_tex_cube( ctx, unit ) &&
-	      enable_tex_common( ctx, unit ));
-   case TEXTURE_3D_BIT:
-       return (enable_tex_2d( ctx, unit ) && 
-	       enable_tex_common( ctx, unit ) &&
-	       enable_tex_3d( ctx, unit)); 
-   case 0:
-      return disable_tex( ctx, unit );
-   default:
-      return GL_FALSE;
-   }
-}
 
 
-void i915UpdateTextureState( intelContextPtr intel )
+void
+i915UpdateTextureState(struct intel_context *intel)
 {
-   GLcontext *ctx = &intel->ctx;
    GLboolean ok = GL_TRUE;
    GLuint i;
 
-   for (i = 0 ; i < I915_TEX_UNITS && ok ; i++) {
-      ok = i915UpdateTexUnit( ctx, i );
+   for (i = 0; i < I915_TEX_UNITS && ok; i++) {
+      switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) {
+      case TEXTURE_1D_BIT:
+      case TEXTURE_2D_BIT:
+      case TEXTURE_CUBE_BIT:
+      case TEXTURE_3D_BIT:
+         ok = i915_update_tex_unit(intel, i, SS3_NORMALIZED_COORDS);
+         break;
+      case TEXTURE_RECT_BIT:
+         ok = i915_update_tex_unit(intel, i, 0);
+         break;
+      case 0:{
+            struct i915_context *i915 = i915_context(&intel->ctx);
+            if (i915->state.active & I915_UPLOAD_TEX(i))
+               I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(i), GL_FALSE);
+
+	    if (i915->state.tex_buffer[i] != NULL) {
+	       dri_bo_unreference(i915->state.tex_buffer[i]);
+	       i915->state.tex_buffer[i] = NULL;
+	    }
+
+            break;
+         }
+      default:
+         ok = GL_FALSE;
+         break;
+      }
    }
 
-   FALLBACK( intel, I915_FALLBACK_TEXTURE, !ok );
+   FALLBACK(intel, I915_FALLBACK_TEXTURE, !ok);
 }
-
-
-
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index cc8a605e505..e79c955d64d 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -27,125 +27,158 @@
 
 
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "tnl/t_context.h"
 #include "tnl/t_vertex.h"
 
 #include "intel_batchbuffer.h"
+#include "intel_tex.h"
+#include "intel_regions.h"
+#include "intel_tris.h"
 
 #include "i915_reg.h"
 #include "i915_context.h"
 
-static void i915_render_start( intelContextPtr intel )
+#include "glapi/glapi.h"
+
+static void
+i915_render_prevalidate(struct intel_context *intel)
 {
-   GLcontext *ctx = &intel->ctx;
-   i915ContextPtr i915 = I915_CONTEXT(intel);
+   struct i915_context *i915 = i915_context(&intel->ctx);
 
-   if (ctx->FragmentProgram._Active) 
-      i915ValidateFragmentProgram( i915 );
-   else {
-      assert(!ctx->FragmentProgram._MaintainTexEnvProgram);
-      i915ValidateTextureProgram( i915 );
-   }
+   if (!intel->Fallback)
+       i915ValidateFragmentProgram(i915);
+}
+
+static void
+i915_render_start(struct intel_context *intel)
+{
 }
 
 
-static void i915_reduced_primitive_state( intelContextPtr intel,
-					  GLenum rprim )
+static void
+i915_reduced_primitive_state(struct intel_context *intel, GLenum rprim)
 {
-    i915ContextPtr i915 = I915_CONTEXT(intel);
-    GLuint st1 = i915->state.Stipple[I915_STPREG_ST1];
-
-    st1 &= ~ST1_ENABLE;
-
-    switch (rprim) {
-    case GL_QUADS: /* from RASTERIZE(GL_QUADS) in t_dd_tritemp.h */
-    case GL_TRIANGLES:
-       if (intel->ctx.Polygon.StippleFlag &&
-	   intel->hw_stipple)
-	  st1 |= ST1_ENABLE;
-       break;
-    case GL_LINES:
-    case GL_POINTS:
-    default:
-       break;
-    }
-
-    i915->intel.reduced_primitive = rprim;
-
-    if (st1 != i915->state.Stipple[I915_STPREG_ST1]) {
-       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
-       i915->state.Stipple[I915_STPREG_ST1] = st1;
-    }
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   GLuint st1 = i915->state.Stipple[I915_STPREG_ST1];
+
+   st1 &= ~ST1_ENABLE;
+
+   switch (rprim) {
+   case GL_QUADS: /* from RASTERIZE(GL_QUADS) in t_dd_tritemp.h */
+   case GL_TRIANGLES:
+      if (intel->ctx.Polygon.StippleFlag && intel->hw_stipple)
+         st1 |= ST1_ENABLE;
+      break;
+   case GL_LINES:
+   case GL_POINTS:
+   default:
+      break;
+   }
+
+   i915->intel.reduced_primitive = rprim;
+
+   if (st1 != i915->state.Stipple[I915_STPREG_ST1]) {
+      INTEL_FIREVERTICES(intel);
+
+      I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
+      i915->state.Stipple[I915_STPREG_ST1] = st1;
+   }
 }
 
 
 /* Pull apart the vertex format registers and figure out how large a
  * vertex is supposed to be. 
  */
-static GLboolean i915_check_vertex_size( intelContextPtr intel,
-					 GLuint expected )
+static GLboolean
+i915_check_vertex_size(struct intel_context *intel, GLuint expected)
 {
-   i915ContextPtr i915 = I915_CONTEXT(intel);
+   struct i915_context *i915 = i915_context(&intel->ctx);
    int lis2 = i915->current->Ctx[I915_CTXREG_LIS2];
    int lis4 = i915->current->Ctx[I915_CTXREG_LIS4];
    int i, sz = 0;
 
    switch (lis4 & S4_VFMT_XYZW_MASK) {
-   case S4_VFMT_XY: sz = 2; break;
-   case S4_VFMT_XYZ: sz = 3; break;
-   case S4_VFMT_XYW: sz = 3; break;
-   case S4_VFMT_XYZW: sz = 4; break;
-   default: 
+   case S4_VFMT_XY:
+      sz = 2;
+      break;
+   case S4_VFMT_XYZ:
+      sz = 3;
+      break;
+   case S4_VFMT_XYW:
+      sz = 3;
+      break;
+   case S4_VFMT_XYZW:
+      sz = 4;
+      break;
+   default:
       fprintf(stderr, "no xyzw specified\n");
       return 0;
    }
 
-   if (lis4 & S4_VFMT_SPEC_FOG) sz++;
-   if (lis4 & S4_VFMT_COLOR) sz++;
-   if (lis4 & S4_VFMT_DEPTH_OFFSET) sz++;
-   if (lis4 & S4_VFMT_POINT_WIDTH) sz++;
-   if (lis4 & S4_VFMT_FOG_PARAM) sz++;
-	
-   for (i = 0 ; i < 8 ; i++) { 
+   if (lis4 & S4_VFMT_SPEC_FOG)
+      sz++;
+   if (lis4 & S4_VFMT_COLOR)
+      sz++;
+   if (lis4 & S4_VFMT_DEPTH_OFFSET)
+      sz++;
+   if (lis4 & S4_VFMT_POINT_WIDTH)
+      sz++;
+   if (lis4 & S4_VFMT_FOG_PARAM)
+      sz++;
+
+   for (i = 0; i < 8; i++) {
       switch (lis2 & S2_TEXCOORD_FMT0_MASK) {
-      case TEXCOORDFMT_2D: sz += 2; break;
-      case TEXCOORDFMT_3D: sz += 3; break;
-      case TEXCOORDFMT_4D: sz += 4; break;
-      case TEXCOORDFMT_1D: sz += 1; break;
-      case TEXCOORDFMT_2D_16: sz += 1; break;
-      case TEXCOORDFMT_4D_16: sz += 2; break;
-      case TEXCOORDFMT_NOT_PRESENT: break;
+      case TEXCOORDFMT_2D:
+         sz += 2;
+         break;
+      case TEXCOORDFMT_3D:
+         sz += 3;
+         break;
+      case TEXCOORDFMT_4D:
+         sz += 4;
+         break;
+      case TEXCOORDFMT_1D:
+         sz += 1;
+         break;
+      case TEXCOORDFMT_2D_16:
+         sz += 1;
+         break;
+      case TEXCOORDFMT_4D_16:
+         sz += 2;
+         break;
+      case TEXCOORDFMT_NOT_PRESENT:
+         break;
       default:
-	 fprintf(stderr, "bad texcoord fmt %d\n", i);
-	 return GL_FALSE;
+         fprintf(stderr, "bad texcoord fmt %d\n", i);
+         return GL_FALSE;
       }
       lis2 >>= S2_TEXCOORD_FMT1_SHIFT;
    }
-	
-   if (sz != expected) 
+
+   if (sz != expected)
       fprintf(stderr, "vertex size mismatch %d/%d\n", sz, expected);
-   
+
    return sz == expected;
 }
 
 
-static void i915_emit_invarient_state( intelContextPtr intel )
+static void
+i915_emit_invarient_state(struct intel_context *intel)
 {
    BATCH_LOCALS;
 
-   BEGIN_BATCH( 20 );
+   BEGIN_BATCH(200, IGNORE_CLIPRECTS);
 
    OUT_BATCH(_3DSTATE_AA_CMD |
-	     AA_LINE_ECAAR_WIDTH_ENABLE |
-	     AA_LINE_ECAAR_WIDTH_1_0 |
-	     AA_LINE_REGION_WIDTH_ENABLE |
-	     AA_LINE_REGION_WIDTH_1_0);
+             AA_LINE_ECAAR_WIDTH_ENABLE |
+             AA_LINE_ECAAR_WIDTH_1_0 |
+             AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
 
    OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
    OUT_BATCH(0);
@@ -158,35 +191,27 @@ static void i915_emit_invarient_state( intelContextPtr intel )
 
    /* Don't support texture crossbar yet */
    OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
-	     CSB_TCB(0, 0) |
-	     CSB_TCB(1, 1) |
-	     CSB_TCB(2, 2) |
-	     CSB_TCB(3, 3) |
-	     CSB_TCB(4, 4) |
-	     CSB_TCB(5, 5) |
-	     CSB_TCB(6, 6) |
-	     CSB_TCB(7, 7));
+             CSB_TCB(0, 0) |
+             CSB_TCB(1, 1) |
+             CSB_TCB(2, 2) |
+             CSB_TCB(3, 3) |
+             CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7));
 
    OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
-	     ENABLE_POINT_RASTER_RULE |
-	     OGL_POINT_RASTER_RULE |
-	     ENABLE_LINE_STRIP_PROVOKE_VRTX |
-	     ENABLE_TRI_FAN_PROVOKE_VRTX |
-	     LINE_STRIP_PROVOKE_VRTX(1) |
-	     TRI_FAN_PROVOKE_VRTX(2) | 
-	     ENABLE_TEXKILL_3D_4D |
-	     TEXKILL_4D);
+             ENABLE_POINT_RASTER_RULE |
+             OGL_POINT_RASTER_RULE |
+             ENABLE_LINE_STRIP_PROVOKE_VRTX |
+             ENABLE_TRI_FAN_PROVOKE_VRTX |
+             LINE_STRIP_PROVOKE_VRTX(1) |
+             TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D);
 
    /* Need to initialize this to zero.
     */
-   OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | 
-	     I1_LOAD_S(3) |
-	     (0));
+   OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
    OUT_BATCH(0);
- 
+
    /* XXX: Use this */
-   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | 
-	     DISABLE_SCISSOR_RECT);
+   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 
    OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
    OUT_BATCH(0);
@@ -194,29 +219,23 @@ static void i915_emit_invarient_state( intelContextPtr intel )
 
    OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
 
-   OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
+   OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);       /* disable indirect state */
    OUT_BATCH(0);
 
 
    /* Don't support twosided stencil yet */
-   OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS |
-	     BFO_ENABLE_STENCIL_TWO_SIDE |
-	     0 );
-   
+   OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0);
+   OUT_BATCH(0);
+
    ADVANCE_BATCH();
 }
 
 
-#define emit( intel, state, size )			\
-do {							\
-   int k;						\
-   BEGIN_BATCH( (size) / sizeof(GLuint));		\
-   for (k = 0 ; k < (size) / sizeof(GLuint) ; k++)	\
-      OUT_BATCH((state)[k]);				\
-   ADVANCE_BATCH();					\
-} while (0);
+#define emit(intel, state, size )		     \
+   intel_batchbuffer_data(intel->batch, state, size, IGNORE_CLIPRECTS )
 
-static GLuint get_dirty( struct i915_hw_state *state )
+static GLuint
+get_dirty(struct i915_hw_state *state)
 {
    GLuint dirty;
 
@@ -227,94 +246,183 @@ static GLuint get_dirty( struct i915_hw_state *state )
    if (dirty & I915_UPLOAD_TEX_ALL)
       state->emitted &= ~I915_UPLOAD_TEX_ALL;
    dirty = state->active & ~state->emitted;
-
    return dirty;
 }
 
 
-static GLuint get_state_size( struct i915_hw_state *state )
+static GLuint
+get_state_size(struct i915_hw_state *state)
 {
    GLuint dirty = get_dirty(state);
    GLuint i;
    GLuint sz = 0;
 
    if (dirty & I915_UPLOAD_INVARIENT)
-      sz += 20 * sizeof(int);
+      sz += 30 * 4;
 
    if (dirty & I915_UPLOAD_CTX)
       sz += sizeof(state->Ctx);
 
-   if (dirty & I915_UPLOAD_BUFFERS) 
+   if (dirty & I915_UPLOAD_BUFFERS)
       sz += sizeof(state->Buffer);
 
    if (dirty & I915_UPLOAD_STIPPLE)
       sz += sizeof(state->Stipple);
 
-   if (dirty & I915_UPLOAD_FOG) 
+   if (dirty & I915_UPLOAD_FOG)
       sz += sizeof(state->Fog);
 
    if (dirty & I915_UPLOAD_TEX_ALL) {
       int nr = 0;
-      for (i = 0; i < I915_TEX_UNITS; i++) 
-	 if (dirty & I915_UPLOAD_TEX(i)) 
-	    nr++;
+      for (i = 0; i < I915_TEX_UNITS; i++)
+         if (dirty & I915_UPLOAD_TEX(i))
+            nr++;
 
-      sz += (2+nr*3) * sizeof(GLuint) * 2;
+      sz += (2 + nr * 3) * sizeof(GLuint) * 2;
    }
 
-   if (dirty & I915_UPLOAD_CONSTANTS) 
+   if (dirty & I915_UPLOAD_CONSTANTS)
       sz += state->ConstantSize * sizeof(GLuint);
 
-   if (dirty & I915_UPLOAD_PROGRAM) 
+   if (dirty & I915_UPLOAD_PROGRAM)
       sz += state->ProgramSize * sizeof(GLuint);
 
    return sz;
 }
 
-
 /* Push the state into the sarea and/or texture memory.
  */
-static void i915_emit_state( intelContextPtr intel )
+static void
+i915_emit_state(struct intel_context *intel)
 {
-   i915ContextPtr i915 = I915_CONTEXT(intel);
+   struct i915_context *i915 = i915_context(&intel->ctx);
    struct i915_hw_state *state = i915->current;
-   int i;
-   GLuint dirty = get_dirty(state);
-   GLuint counter = intel->batch.counter;
+   int i, count, aper_count;
+   GLuint dirty;
+   dri_bo *aper_array[3 + I915_TEX_UNITS];
+   GET_CURRENT_CONTEXT(ctx);
    BATCH_LOCALS;
 
-   if (intel->batch.space < get_state_size(state)) {
-      intelFlushBatch(intel, GL_TRUE);
-      dirty = get_dirty(state);
-      counter = intel->batch.counter;
+   /* We don't hold the lock at this point, so want to make sure that
+    * there won't be a buffer wrap between the state emits and the primitive
+    * emit header.
+    *
+    * It might be better to talk about explicit places where
+    * scheduling is allowed, rather than assume that it is whenever a
+    * batchbuffer fills up.
+    *
+    * Set the space as LOOP_CLIPRECTS now, since that's what our primitives
+    * will be emitted under.
+    */
+   intel_batchbuffer_require_space(intel->batch,
+				   get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
+				   LOOP_CLIPRECTS);
+   count = 0;
+ again:
+   aper_count = 0;
+   dirty = get_dirty(state);
+
+   aper_array[aper_count++] = intel->batch->buf;
+   if (dirty & I915_UPLOAD_BUFFERS) {
+      aper_array[aper_count++] = state->draw_region->buffer;
+      if (state->depth_region)
+	 aper_array[aper_count++] = state->depth_region->buffer;
+   }
+
+   if (dirty & I915_UPLOAD_TEX_ALL) {
+      for (i = 0; i < I915_TEX_UNITS; i++) {
+	 if (dirty & I915_UPLOAD_TEX(i)) {
+	    if (state->tex_buffer[i]) {
+	       aper_array[aper_count++] = state->tex_buffer[i];
+	    }
+	 }
+      }
+   }
+
+   if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
+       if (count == 0) {
+	   count++;
+	   intel_batchbuffer_flush(intel->batch);
+	   goto again;
+       } else {
+	   _mesa_error(ctx, GL_OUT_OF_MEMORY, "i915 emit state");
+	   assert(0);
+       }
    }
 
-   if (VERBOSE) 
+   /* work out list of buffers to emit */
+   
+   /* Do this here as we may have flushed the batchbuffer above,
+    * causing more state to be dirty!
+    */
+   dirty = get_dirty(state);
+   state->emitted |= dirty;
+   assert(get_dirty(state) == 0);
+
+   if (INTEL_DEBUG & DEBUG_STATE)
       fprintf(stderr, "%s dirty: %x\n", __FUNCTION__, dirty);
 
    if (dirty & I915_UPLOAD_INVARIENT) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_INVARIENT:\n"); 
-      i915_emit_invarient_state( intel );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_INVARIENT:\n");
+      i915_emit_invarient_state(intel);
    }
 
    if (dirty & I915_UPLOAD_CTX) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CTX:\n"); 
-      emit( i915, state->Ctx, sizeof(state->Ctx) );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_CTX:\n");
+
+      emit(intel, state->Ctx, sizeof(state->Ctx));
    }
 
    if (dirty & I915_UPLOAD_BUFFERS) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_BUFFERS:\n"); 
-      emit( i915, state->Buffer, sizeof(state->Buffer) );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_BUFFERS:\n");
+      BEGIN_BATCH(I915_DEST_SETUP_SIZE + 2, IGNORE_CLIPRECTS);
+      OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR0]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
+      OUT_RELOC(state->draw_region->buffer,
+		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                state->draw_region->draw_offset);
+
+      if (state->depth_region) {
+         OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR0]);
+         OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR1]);
+         OUT_RELOC(state->depth_region->buffer,
+		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                   state->depth_region->draw_offset);
+      }
+
+      OUT_BATCH(state->Buffer[I915_DESTREG_DV0]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_DV1]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_SENABLE]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_SR0]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_SR1]);
+      OUT_BATCH(state->Buffer[I915_DESTREG_SR2]);
+
+      if (intel->constant_cliprect) {
+	 assert(state->Buffer[I915_DESTREG_DRAWRECT0] != MI_NOOP);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT0]);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT1]);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT2]);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT3]);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT4]);
+	 OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT5]);
+      }
+
+      ADVANCE_BATCH();
    }
 
    if (dirty & I915_UPLOAD_STIPPLE) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_STIPPLE:\n"); 
-      emit( i915, state->Stipple, sizeof(state->Stipple) );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_STIPPLE:\n");
+      emit(intel, state->Stipple, sizeof(state->Stipple));
    }
 
    if (dirty & I915_UPLOAD_FOG) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_FOG:\n"); 
-      emit( i915, state->Fog, sizeof(state->Fog) );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_FOG:\n");
+      emit(intel, state->Fog, sizeof(state->Fog));
    }
 
    /* Combine all the dirty texture state into a single command to
@@ -323,141 +431,245 @@ static void i915_emit_state( intelContextPtr intel )
    if (dirty & I915_UPLOAD_TEX_ALL) {
       int nr = 0;
 
-      for (i = 0; i < I915_TEX_UNITS; i++) 
-	 if (dirty & I915_UPLOAD_TEX(i)) 
-	    nr++;
+      for (i = 0; i < I915_TEX_UNITS; i++)
+         if (dirty & I915_UPLOAD_TEX(i))
+            nr++;
 
-      BEGIN_BATCH(2+nr*3);
-      OUT_BATCH(_3DSTATE_MAP_STATE | (3*nr));
+      BEGIN_BATCH(2 + nr * 3, IGNORE_CLIPRECTS);
+      OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
       OUT_BATCH((dirty & I915_UPLOAD_TEX_ALL) >> I915_UPLOAD_TEX_0_SHIFT);
-      for (i = 0 ; i < I915_TEX_UNITS ; i++)
-	 if (dirty & I915_UPLOAD_TEX(i)) {
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_MS2]);
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_MS3]);
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_MS4]);
-	 }
+      for (i = 0; i < I915_TEX_UNITS; i++)
+         if (dirty & I915_UPLOAD_TEX(i)) {
+
+            if (state->tex_buffer[i]) {
+               OUT_RELOC(state->tex_buffer[i],
+			 I915_GEM_DOMAIN_SAMPLER, 0,
+                         state->tex_offset[i]);
+            }
+            else if (state == &i915->meta) {
+               assert(i == 0);
+               OUT_BATCH(0);
+            }
+            else {
+               OUT_BATCH(state->tex_offset[i]);
+            }
+
+            OUT_BATCH(state->Tex[i][I915_TEXREG_MS3]);
+            OUT_BATCH(state->Tex[i][I915_TEXREG_MS4]);
+         }
       ADVANCE_BATCH();
 
-      BEGIN_BATCH(2+nr*3);
-      OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3*nr));
+      BEGIN_BATCH(2 + nr * 3, IGNORE_CLIPRECTS);
+      OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * nr));
       OUT_BATCH((dirty & I915_UPLOAD_TEX_ALL) >> I915_UPLOAD_TEX_0_SHIFT);
-      for (i = 0 ; i < I915_TEX_UNITS ; i++)
-	 if (dirty & I915_UPLOAD_TEX(i)) {
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_SS2]);
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_SS3]);
-	    OUT_BATCH(state->Tex[i][I915_TEXREG_SS4]);
-	 }
+      for (i = 0; i < I915_TEX_UNITS; i++)
+         if (dirty & I915_UPLOAD_TEX(i)) {
+            OUT_BATCH(state->Tex[i][I915_TEXREG_SS2]);
+            OUT_BATCH(state->Tex[i][I915_TEXREG_SS3]);
+            OUT_BATCH(state->Tex[i][I915_TEXREG_SS4]);
+         }
       ADVANCE_BATCH();
    }
 
    if (dirty & I915_UPLOAD_CONSTANTS) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CONSTANTS:\n"); 
-      emit( i915, state->Constant, state->ConstantSize * sizeof(GLuint) );
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_CONSTANTS:\n");
+      emit(intel, state->Constant, state->ConstantSize * sizeof(GLuint));
    }
 
    if (dirty & I915_UPLOAD_PROGRAM) {
-      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_PROGRAM:\n"); 
+      if (state->ProgramSize) {
+         if (INTEL_DEBUG & DEBUG_STATE)
+            fprintf(stderr, "I915_UPLOAD_PROGRAM:\n");
+
+         assert((state->Program[0] & 0x1ff) + 2 == state->ProgramSize);
 
-      assert((state->Program[0] & 0x1ff)+2 == state->ProgramSize);
-      
-      emit( i915, state->Program, state->ProgramSize * sizeof(GLuint) );
-      if (VERBOSE)
-	 i915_disassemble_program( state->Program, state->ProgramSize );
+         emit(intel, state->Program, state->ProgramSize * sizeof(GLuint));
+         if (INTEL_DEBUG & DEBUG_STATE)
+            i915_disassemble_program(state->Program, state->ProgramSize);
+      }
    }
 
-   state->emitted |= dirty;
-   intel->batch.last_emit_state = counter;
-   assert(counter == intel->batch.counter);
+   intel->batch->dirty_state &= ~dirty;
+   assert(get_dirty(state) == 0);
+   assert((intel->batch->dirty_state & (1<<1)) == 0);
 }
 
-static void i915_destroy_context( intelContextPtr intel )
+static void
+i915_destroy_context(struct intel_context *intel)
 {
+   GLuint i;
+   struct i915_context *i915 = i915_context(&intel->ctx);
+
+   intel_region_release(&i915->state.draw_region);
+   intel_region_release(&i915->state.depth_region);
+   intel_region_release(&i915->meta.draw_region);
+   intel_region_release(&i915->meta.depth_region);
+   intel_region_release(&i915->initial.draw_region);
+   intel_region_release(&i915->initial.depth_region);
+
+   for (i = 0; i < I915_TEX_UNITS; i++) {
+      if (i915->state.tex_buffer[i] != NULL) {
+	 dri_bo_unreference(i915->state.tex_buffer[i]);
+	 i915->state.tex_buffer[i] = NULL;
+      }
+   }
+
    _tnl_free_vertices(&intel->ctx);
 }
 
 
 /**
- * Set the color buffer drawing region.
+ * Set the drawing regions for the color and depth/stencil buffers.
+ * This involves setting the pitch, cpp and buffer ID/location.
+ * Also set pixel format for color and Z rendering
+ * Used for setting both regular and meta state.
  */
-static void
-i915_set_color_region( intelContextPtr intel, const intelRegion *region)
+void
+i915_state_draw_region(struct intel_context *intel,
+                       struct i915_hw_state *state,
+                       struct intel_region *color_region,
+                       struct intel_region *depth_region)
 {
-   i915ContextPtr i915 = I915_CONTEXT(intel);
-   I915_STATECHANGE( i915, I915_UPLOAD_BUFFERS );
-   i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i915->state.Buffer[I915_DESTREG_CBUFADDR2] = region->offset;
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   GLcontext *ctx = &intel->ctx;
+   GLuint value;
+
+   ASSERT(state == &i915->state || state == &i915->meta);
+
+   if (state->draw_region != color_region) {
+      intel_region_release(&state->draw_region);
+      intel_region_reference(&state->draw_region, color_region);
+   }
+   if (state->depth_region != depth_region) {
+      intel_region_release(&state->depth_region);
+      intel_region_reference(&state->depth_region, depth_region);
+   }
+
+   /*
+    * Set stride/cpp values
+    */
+   if (color_region) {
+      state->Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
+      state->Buffer[I915_DESTREG_CBUFADDR1] =
+         (BUF_3D_ID_COLOR_BACK |
+          BUF_3D_PITCH(color_region->pitch * color_region->cpp) |
+          BUF_3D_USE_FENCE);
+   }
+
+   if (depth_region) {
+      state->Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
+      state->Buffer[I915_DESTREG_DBUFADDR1] =
+         (BUF_3D_ID_DEPTH |
+          BUF_3D_PITCH(depth_region->pitch * depth_region->cpp) |
+          BUF_3D_USE_FENCE);
+   }
+
+   /*
+    * Compute/set I915_DESTREG_DV1 value
+    */
+   value = (DSTORG_HORT_BIAS(0x8) |     /* .5 */
+            DSTORG_VERT_BIAS(0x8) |     /* .5 */
+            LOD_PRECLAMP_OGL | TEX_DEFAULT_COLOR_OGL);
+   if (color_region && color_region->cpp == 4) {
+      value |= DV_PF_8888;
+   }
+   else {
+      value |= (DITHER_FULL_ALWAYS | DV_PF_565);
+   }
+   if (depth_region && depth_region->cpp == 4) {
+      value |= DEPTH_FRMT_24_FIXED_8_OTHER;
+   }
+   else {
+      value |= DEPTH_FRMT_16_FIXED;
+   }
+   state->Buffer[I915_DESTREG_DV1] = value;
+
+   if (intel->constant_cliprect) {
+      state->Buffer[I915_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
+      state->Buffer[I915_DESTREG_DRAWRECT1] = 0;
+      state->Buffer[I915_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
+      state->Buffer[I915_DESTREG_DRAWRECT3] =
+	 (ctx->DrawBuffer->Width & 0xffff) |
+	 (ctx->DrawBuffer->Height << 16);
+      state->Buffer[I915_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
+      state->Buffer[I915_DESTREG_DRAWRECT5] = 0;
+   } else {
+      state->Buffer[I915_DESTREG_DRAWRECT0] = MI_NOOP;
+      state->Buffer[I915_DESTREG_DRAWRECT1] = MI_NOOP;
+      state->Buffer[I915_DESTREG_DRAWRECT2] = MI_NOOP;
+      state->Buffer[I915_DESTREG_DRAWRECT3] = MI_NOOP;
+      state->Buffer[I915_DESTREG_DRAWRECT4] = MI_NOOP;
+      state->Buffer[I915_DESTREG_DRAWRECT5] = MI_NOOP;
+   }
+
+   I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 }
 
 
-/**
- * specify the z-buffer/stencil region
- */
 static void
-i915_set_z_region( intelContextPtr intel, const intelRegion *region)
+i915_set_draw_region(struct intel_context *intel,
+                     struct intel_region *color_regions[],
+                     struct intel_region *depth_region,
+		     GLuint num_regions)
 {
-   i915ContextPtr i915 = I915_CONTEXT(intel);
-   I915_STATECHANGE( i915, I915_UPLOAD_BUFFERS );
-   i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
-      (BUF_3D_ID_DEPTH | BUF_3D_PITCH(region->pitch) | BUF_3D_USE_FENCE);
-   i915->state.Buffer[I915_DESTREG_DBUFADDR2] = region->offset;
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   i915_state_draw_region(intel, &i915->state, color_regions[0], depth_region);
 }
 
 
-/**
- * Set both the color and Z/stencil drawing regions.
- * Similar to two previous functions, but don't use I915_STATECHANGE()
- */
+
 static void
-i915_update_color_z_regions(intelContextPtr intel,
-                            const intelRegion *colorRegion,
-                            const intelRegion *depthRegion)
+i915_new_batch(struct intel_context *intel)
 {
-   i915ContextPtr i915 = I915_CONTEXT(intel);
+   struct i915_context *i915 = i915_context(&intel->ctx);
 
-   i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
-      (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(colorRegion->pitch) | BUF_3D_USE_FENCE);
-   i915->state.Buffer[I915_DESTREG_CBUFADDR2] = colorRegion->offset;
+   /* Mark all state as needing to be emitted when starting a new batchbuffer.
+    * Using hardware contexts would be an alternative, but they have some
+    * difficulties associated with them (physical address requirements).
+    */
+   i915->state.emitted = 0;
 
-   i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
-      (BUF_3D_ID_DEPTH |
-       BUF_3D_PITCH(depthRegion->pitch) |  /* pitch in bytes */
-       BUF_3D_USE_FENCE);
-   i915->state.Buffer[I915_DESTREG_DBUFADDR2] = depthRegion->offset;
+   /* Check that we didn't just wrap our batchbuffer at a bad time. */
+   assert(!intel->no_batch_wrap);
 }
 
-
-static void i915_lost_hardware( intelContextPtr intel )
+static GLuint
+i915_flush_cmd(void)
 {
-   I915_CONTEXT(intel)->state.emitted = 0;
+   return MI_FLUSH | FLUSH_MAP_CACHE;
 }
 
-static void i915_emit_flush( intelContextPtr intel )
+static void 
+i915_assert_not_dirty( struct intel_context *intel )
 {
-   BATCH_LOCALS;
+   struct i915_context *i915 = i915_context(&intel->ctx);
+   struct i915_hw_state *state = i915->current;
+   GLuint dirty = get_dirty(state);
+   assert(!dirty);
+}
 
-   BEGIN_BATCH(2);
-   OUT_BATCH( MI_FLUSH | FLUSH_MAP_CACHE | FLUSH_RENDER_CACHE ); 
-   OUT_BATCH( 0 );
-   ADVANCE_BATCH();
+static void
+i915_note_unlock( struct intel_context *intel )
+{
+    /* nothing */
 }
 
 
-void i915InitVtbl( i915ContextPtr i915 )
+void
+i915InitVtbl(struct i915_context *i915)
 {
-   i915->intel.vtbl.alloc_tex_obj = i915AllocTexObj;
    i915->intel.vtbl.check_vertex_size = i915_check_vertex_size;
-   i915->intel.vtbl.clear_with_tris = i915ClearWithTris;
-   i915->intel.vtbl.rotate_window = i915RotateWindow;
    i915->intel.vtbl.destroy = i915_destroy_context;
    i915->intel.vtbl.emit_state = i915_emit_state;
-   i915->intel.vtbl.lost_hardware = i915_lost_hardware;
+   i915->intel.vtbl.new_batch = i915_new_batch;
    i915->intel.vtbl.reduced_primitive_state = i915_reduced_primitive_state;
    i915->intel.vtbl.render_start = i915_render_start;
-   i915->intel.vtbl.set_color_region = i915_set_color_region;
-   i915->intel.vtbl.set_z_region = i915_set_z_region;
-   i915->intel.vtbl.update_color_z_regions = i915_update_color_z_regions;
+   i915->intel.vtbl.render_prevalidate = i915_render_prevalidate;
+   i915->intel.vtbl.set_draw_region = i915_set_draw_region;
    i915->intel.vtbl.update_texture_state = i915UpdateTextureState;
-   i915->intel.vtbl.emit_flush = i915_emit_flush;
+   i915->intel.vtbl.flush_cmd = i915_flush_cmd;
+   i915->intel.vtbl.assert_not_dirty = i915_assert_not_dirty;
+   i915->intel.vtbl.note_unlock = i915_note_unlock; 
+   i915->intel.vtbl.finish_batch = intel_finish_vb;
 }
-
diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.c b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
index 803b41b2567..d38cdf31cc6 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
@@ -1,829 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include <stdio.h>
-#include <errno.h>
-
-#include "mtypes.h"
-#include "context.h"
-#include "enums.h"
-#include "vblank.h"
-
-#include "intel_reg.h"
-#include "intel_batchbuffer.h"
-#include "intel_context.h"
-
-
-
-
-/* ================================================================
- * Performance monitoring functions
- */
-
-static void intel_fill_box( intelContextPtr intel,
-			    GLshort x, GLshort y,
-			    GLshort w, GLshort h,
-			    GLubyte r, GLubyte g, GLubyte b )
-{
-   x += intel->drawX;
-   y += intel->drawY;
-
-   if (x >= 0 && y >= 0 &&
-       x+w < intel->intelScreen->width &&
-       y+h < intel->intelScreen->height)
-      intelEmitFillBlitLocked( intel, 
-			       intel->intelScreen->cpp,
-			       intel->intelScreen->back.pitch,
-			       intel->intelScreen->back.offset,
-			       x, y, w, h,
-			       INTEL_PACKCOLOR(intel->intelScreen->fbFormat,
-					       r,g,b,0xff));
-}
-
-static void intel_draw_performance_boxes( intelContextPtr intel )
-{
-   /* Purple box for page flipping
-    */
-   if ( intel->perf_boxes & I830_BOX_FLIP ) 
-      intel_fill_box( intel, 4, 4, 8, 8, 255, 0, 255 );
-
-   /* Red box if we have to wait for idle at any point
-    */
-   if ( intel->perf_boxes & I830_BOX_WAIT ) 
-      intel_fill_box( intel, 16, 4, 8, 8, 255, 0, 0 );
-
-   /* Blue box: lost context?
-    */
-   if ( intel->perf_boxes & I830_BOX_LOST_CONTEXT ) 
-      intel_fill_box( intel, 28, 4, 8, 8, 0, 0, 255 );
-
-   /* Yellow box for texture swaps
-    */
-   if ( intel->perf_boxes & I830_BOX_TEXTURE_LOAD ) 
-      intel_fill_box( intel, 40, 4, 8, 8, 255, 255, 0 );
-
-   /* Green box if hardware never idles (as far as we can tell)
-    */
-   if ( !(intel->perf_boxes & I830_BOX_RING_EMPTY) ) 
-      intel_fill_box( intel, 64, 4, 8, 8, 0, 255, 0 );
-
-
-   /* Draw bars indicating number of buffers allocated 
-    * (not a great measure, easily confused)
-    */
-#if 0
-   if (intel->dma_used) {
-      int bar = intel->dma_used / 10240;
-      if (bar > 100) bar = 100;
-      if (bar < 1) bar = 1;
-      intel_fill_box( intel, 4, 16, bar, 4, 196, 128, 128 );
-      intel->dma_used = 0;
-   }
-#endif
-
-   intel->perf_boxes = 0;
-}
-
-
-
-
-
-
-static int bad_prim_vertex_nr( int primitive, int nr )
-{
-   switch (primitive & PRIM3D_MASK) {
-   case PRIM3D_POINTLIST:
-      return nr < 1;
-   case PRIM3D_LINELIST:
-      return (nr & 1) || nr == 0;
-   case PRIM3D_LINESTRIP:
-      return nr < 2;
-   case PRIM3D_TRILIST:
-   case PRIM3D_RECTLIST:
-      return nr % 3 || nr == 0;
-   case PRIM3D_POLY:
-   case PRIM3D_TRIFAN:
-   case PRIM3D_TRISTRIP:
-   case PRIM3D_TRISTRIP_RVRSE:
-      return nr < 3;
-   default:
-      return 1;
-   }	
-}
-
-static void intel_flush_inline_primitive( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   GLuint used = intel->batch.ptr - intel->prim.start_ptr;
-   GLuint vertcount;
-
-   assert(intel->prim.primitive != ~0);
-
-   if (1) {
-      /* Check vertex size against the vertex we're specifying to
-       * hardware.  If it's wrong, ditch the primitive.
-       */ 
-      if (!intel->vtbl.check_vertex_size( intel, intel->vertex_size )) 
-	 goto do_discard;
-
-      vertcount = (used - 4)/ (intel->vertex_size * 4);
-
-      if (!vertcount)
-	 goto do_discard;
-      
-      if (vertcount * intel->vertex_size * 4 != used - 4) {
-	 fprintf(stderr, "vertex size confusion %d %d\n", used, 
-		 intel->vertex_size * vertcount * 4);
-	 goto do_discard;
-      }
-
-      if (bad_prim_vertex_nr( intel->prim.primitive, vertcount )) {
-	 fprintf(stderr, "bad_prim_vertex_nr %x %d\n", intel->prim.primitive,
-		 vertcount);
-	 goto do_discard;
-      }
-   }
-
-   if (used < 8)
-      goto do_discard;
-
-   *(int *)intel->prim.start_ptr = (_3DPRIMITIVE | 
-				    intel->prim.primitive |
-				    (used/4-2));
-
-   goto finished;
-   
- do_discard:
-   intel->batch.ptr -= used;
-   intel->batch.space += used;
-   assert(intel->batch.space >= 0);
-
- finished:
-   intel->prim.primitive = ~0;
-   intel->prim.start_ptr = 0;
-   intel->prim.flush = 0;
-}
-
-
-/* Emit a primitive referencing vertices in a vertex buffer.
- */
-void intelStartInlinePrimitive( intelContextPtr intel, GLuint prim )
-{
-   BATCH_LOCALS;
-
-   if (0)
-      fprintf(stderr, "%s %x\n", __FUNCTION__, prim);
-
-
-   /* Finish any in-progress primitive:
-    */
-   INTEL_FIREVERTICES( intel );
-   
-   /* Emit outstanding state:
-    */
-   intel->vtbl.emit_state( intel );
-   
-   /* Make sure there is some space in this buffer:
-    */
-   if (intel->vertex_size * 10 * sizeof(GLuint) >= intel->batch.space) {
-      intelFlushBatch(intel, GL_TRUE); 
-      intel->vtbl.emit_state( intel );
-   }
-
-#if 1
-   if (((unsigned long)intel->batch.ptr) & 0x4) {
-      BEGIN_BATCH(1);
-      OUT_BATCH(0);
-      ADVANCE_BATCH();
-   }
-#endif
-
-   /* Emit a slot which will be filled with the inline primitive
-    * command later.
-    */
-   BEGIN_BATCH(2);
-   OUT_BATCH( 0 );
-
-   intel->prim.start_ptr = batch_ptr;
-   intel->prim.primitive = prim;
-   intel->prim.flush = intel_flush_inline_primitive;
-   intel->batch.contains_geometry = 1;
-
-   OUT_BATCH( 0 );
-   ADVANCE_BATCH();
-}
-
-
-void intelRestartInlinePrimitive( intelContextPtr intel )
-{
-   GLuint prim = intel->prim.primitive;
-
-   intel_flush_inline_primitive( &intel->ctx );
-   if (1) intelFlushBatch(intel, GL_TRUE); /* GL_TRUE - is critical */
-   intelStartInlinePrimitive( intel, prim );
-}
-
-
-
-void intelWrapInlinePrimitive( intelContextPtr intel )
-{
-   GLuint prim = intel->prim.primitive;
-
-   if (0)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-   intel_flush_inline_primitive( &intel->ctx );
-   intelFlushBatch(intel, GL_TRUE);
-   intelStartInlinePrimitive( intel, prim );
-}
-
-
-/* Emit a primitive with space for inline vertices.
- */
-GLuint *intelEmitInlinePrimitiveLocked(intelContextPtr intel, 
-				       int primitive,
-				       int dwords,
-				       int vertex_size )
-{
-   GLuint *tmp = 0;
-   BATCH_LOCALS;
-
-   if (0)
-      fprintf(stderr, "%s 0x%x %d\n", __FUNCTION__, primitive, dwords);
-
-   /* Emit outstanding state:
-    */
-   intel->vtbl.emit_state( intel );
-
-   if ((1+dwords)*4 >= intel->batch.space) {
-      intelFlushBatch(intel, GL_TRUE); 
-      intel->vtbl.emit_state( intel );
-   }
-
-
-   if (1) {
-      int used = dwords * 4;
-      int vertcount;
-
-      /* Check vertex size against the vertex we're specifying to
-       * hardware.  If it's wrong, ditch the primitive.
-       */ 
-      if (!intel->vtbl.check_vertex_size( intel, vertex_size )) 
-	 goto do_discard;
-
-      vertcount = dwords / vertex_size;
-      
-      if (dwords % vertex_size) {
-	 fprintf(stderr, "did not request a whole number of vertices\n");
-	 goto do_discard;
-      }
-
-      if (bad_prim_vertex_nr( primitive, vertcount )) {
-	 fprintf(stderr, "bad_prim_vertex_nr %x %d\n", primitive, vertcount);
-	 goto do_discard;
-      }
-
-      if (used < 8)
-	 goto do_discard;
-   }
-
-   /* Emit 3D_PRIMITIVE commands:
-    */
-   BEGIN_BATCH(1 + dwords);
-   OUT_BATCH( _3DPRIMITIVE | 
-	      primitive |
-	      (dwords-1) );
-
-   tmp = (GLuint *)batch_ptr;
-   batch_ptr += dwords * 4;
-
-   ADVANCE_BATCH();
-
-   intel->batch.contains_geometry = 1;
-
- do_discard:
-   return tmp;
-}
-
-
-static void intelWaitForFrameCompletion( intelContextPtr intel )
-{
-  drm_i915_sarea_t *sarea = (drm_i915_sarea_t *)intel->sarea;
-
-   if (intel->do_irqs) {
-      if (intelGetLastFrame(intel) < sarea->last_dispatch) {
-	 if (!intel->irqsEmitted) {
-	    while (intelGetLastFrame (intel) < sarea->last_dispatch)
-	       ;
-	 }
-	 else {
-	    intelWaitIrq( intel, intel->alloc.irq_emitted );	
-	 }
-	 intel->irqsEmitted = 10;
-      }
-
-      if (intel->irqsEmitted) {
-	 LOCK_HARDWARE( intel ); 
-	 intelEmitIrqLocked( intel );
-	 intel->irqsEmitted--;
-	 UNLOCK_HARDWARE( intel ); 
-      }
-   } 
-   else {
-      while (intelGetLastFrame (intel) < sarea->last_dispatch) {
-	 if (intel->do_usleeps) 
-	    DO_USLEEP( 1 );
-      }
-   }
-}
-
-/*
- * Copy the back buffer to the front buffer. 
- */
-void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
-		      const drm_clip_rect_t	 *rect)
-{
-   intelContextPtr intel;
-   const intelScreenPrivate *intelScreen;
-   GLboolean   missed_target;
-   int64_t ust;
-
-   if (0)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   assert(dPriv);
-   assert(dPriv->driContextPriv);
-   assert(dPriv->driContextPriv->driverPrivate);
-
-   intel = (intelContextPtr) dPriv->driContextPriv->driverPrivate;
-
-   intelFlush( &intel->ctx );
-   
-   intelScreen = intel->intelScreen;
-
-   if (!rect && !intel->swap_scheduled && intelScreen->drmMinor >= 6 &&
-       !(intel->vblank_flags & VBLANK_FLAG_NO_IRQ) &&
-       intelScreen->current_rotation == 0) {
-      unsigned int interval = driGetVBlankInterval(dPriv, intel->vblank_flags);
-      unsigned int target;
-      drm_i915_vblank_swap_t swap;
-
-      swap.drawable = dPriv->hHWDrawable;
-      swap.seqtype = DRM_VBLANK_ABSOLUTE;
-      target = swap.sequence = intel->vbl_seq + interval;
-
-      if (intel->vblank_flags & VBLANK_FLAG_SYNC) {
-	 swap.seqtype |= DRM_VBLANK_NEXTONMISS;
-      } else if (interval == 0) {
-	 goto noschedule;
-      }
-
-      if ( intel->vblank_flags & VBLANK_FLAG_SECONDARY ) {
-	 swap.seqtype |= DRM_VBLANK_SECONDARY;
-      }
-
-      if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
-                              sizeof(swap))) {
-        intel->swap_scheduled = 1;
-        intel->vbl_seq = swap.sequence;
-        swap.sequence -= target;
-        missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23);
-      }
-   } else {
-      intel->swap_scheduled = 0;
-   }
-noschedule:
-
-   if (!intel->swap_scheduled) {
-      intelWaitForFrameCompletion( intel );
-      LOCK_HARDWARE( intel );
-
-      if (!rect)
-      {
-	 UNLOCK_HARDWARE( intel );
-	 driWaitForVBlank( dPriv, &intel->vbl_seq, intel->vblank_flags, & missed_target );
-	 LOCK_HARDWARE( intel );
-      }
-      {
-	 const intelScreenPrivate *intelScreen = intel->intelScreen;
-	 const __DRIdrawablePrivate *dPriv = intel->driDrawable;
-	 const int nbox = dPriv->numClipRects;
-	 const drm_clip_rect_t *pbox = dPriv->pClipRects;
-	 drm_clip_rect_t box;
-	 const int cpp = intelScreen->cpp;
-	 const int pitch = intelScreen->front.pitch; /* in bytes */
-	 int i;
-	 GLuint CMD, BR13;
-	 BATCH_LOCALS;
-
-	 switch(cpp) {
-	 case 2: 
-	    BR13 = (pitch) | (0xCC << 16) | (1<<24);
-	    CMD = XY_SRC_COPY_BLT_CMD;
-	    break;
-	 case 4:
-	    BR13 = (pitch) | (0xCC << 16) | (1<<24) | (1<<25);
-	    CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-		   XY_SRC_COPY_BLT_WRITE_RGB);
-	    break;
-	 default:
-	    BR13 = (pitch) | (0xCC << 16) | (1<<24);
-	    CMD = XY_SRC_COPY_BLT_CMD;
-	    break;
-	 }
-   
-	 if (0) 
-	    intel_draw_performance_boxes( intel );
-
-	 for (i = 0 ; i < nbox; i++, pbox++) 
-	 {
-	    if (pbox->x1 > pbox->x2 ||
-		pbox->y1 > pbox->y2 ||
-		pbox->x2 > intelScreen->width ||
-		pbox->y2 > intelScreen->height) {
-	       _mesa_warning(&intel->ctx, "Bad cliprect in intelCopyBuffer()");
-	       continue;
-	    }
-
-	    box = *pbox;
-
-	    if (rect)
-	    {
-	       if (rect->x1 > box.x1)
-		  box.x1 = rect->x1;
-	       if (rect->y1 > box.y1)
-		  box.y1 = rect->y1;
-	       if (rect->x2 < box.x2)
-		  box.x2 = rect->x2;
-	       if (rect->y2 < box.y2)
-		  box.y2 = rect->y2;
-
-	       if (box.x1 > box.x2 || box.y1 > box.y2)
-		  continue;
-	    }
-
-	    BEGIN_BATCH( 8);
-	    OUT_BATCH( CMD );
-	    OUT_BATCH( BR13 );
-	    OUT_BATCH( (box.y1 << 16) | box.x1 );
-	    OUT_BATCH( (box.y2 << 16) | box.x2 );
-
-	    if (intel->sarea->pf_current_page == 0) 
-	       OUT_BATCH( intelScreen->front.offset );
-	    else
-	       OUT_BATCH( intelScreen->back.offset );			
-
-	    OUT_BATCH( (box.y1 << 16) | box.x1 );
-	    OUT_BATCH( BR13 & 0xffff );
-
-	    if (intel->sarea->pf_current_page == 0) 
-	       OUT_BATCH( intelScreen->back.offset );			
-	    else
-	       OUT_BATCH( intelScreen->front.offset );
-
-	    ADVANCE_BATCH();
-	 }
-      }
-      intelFlushBatchLocked( intel, GL_TRUE, GL_TRUE, GL_TRUE );
-      UNLOCK_HARDWARE( intel );
-   }
-
-   if (!rect)
-   {
-       intel->swap_count++;
-       (*dri_interface->getUST)(&ust);
-       if (missed_target) {
-	   intel->swap_missed_count++;
-	   intel->swap_missed_ust = ust -  intel->swap_ust;
-       }
-   
-       intel->swap_ust = ust;
-   }
-}
-
-
-
-
-void intelEmitFillBlitLocked( intelContextPtr intel,
-			      GLuint cpp,
-			      GLshort dst_pitch,  /* in bytes */
-			      GLuint dst_offset,
-			      GLshort x, GLshort y, 
-			      GLshort w, GLshort h,
-			      GLuint color )
-{
-   GLuint BR13, CMD;
-   BATCH_LOCALS;
-
-   switch(cpp) {
-   case 1: 
-   case 2: 
-   case 3: 
-      BR13 = dst_pitch | (0xF0 << 16) | (1<<24);
-      CMD = XY_COLOR_BLT_CMD;
-      break;
-   case 4:
-      BR13 = dst_pitch | (0xF0 << 16) | (1<<24) | (1<<25);
-      CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
-	     XY_COLOR_BLT_WRITE_RGB);
-      break;
-   default:
-      return;
-   }
-
-   BEGIN_BATCH( 6);
-   OUT_BATCH( CMD );
-   OUT_BATCH( BR13 );
-   OUT_BATCH( (y << 16) | x );
-   OUT_BATCH( ((y+h) << 16) | (x+w) );
-   OUT_BATCH( dst_offset );
-   OUT_BATCH( color );
-   ADVANCE_BATCH();
-}
-
-
-/* Copy BitBlt
- */
-void intelEmitCopyBlitLocked( intelContextPtr intel,
-			      GLuint cpp,
-			      GLshort src_pitch,
-			      GLuint  src_offset,
-			      GLshort dst_pitch,
-			      GLuint  dst_offset,
-			      GLshort src_x, GLshort src_y,
-			      GLshort dst_x, GLshort dst_y,
-			      GLshort w, GLshort h )
-{
-   GLuint CMD, BR13;
-   int dst_y2 = dst_y + h;
-   int dst_x2 = dst_x + w;
-   BATCH_LOCALS;
-
-   src_pitch *= cpp;
-   dst_pitch *= cpp;
-
-   switch(cpp) {
-   case 1: 
-   case 2: 
-   case 3: 
-      BR13 = dst_pitch | (0xCC << 16) | (1<<24);
-      CMD = XY_SRC_COPY_BLT_CMD;
-      break;
-   case 4:
-      BR13 = dst_pitch | (0xCC << 16) | (1<<24) | (1<<25);
-      CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-	     XY_SRC_COPY_BLT_WRITE_RGB);
-      break;
-   default:
-      return;
-   }
-
-   if (dst_y2 < dst_y ||
-       dst_x2 < dst_x) {
-      return;
-   }
-
-   BEGIN_BATCH( 12);
-   OUT_BATCH( CMD );
-   OUT_BATCH( BR13 );
-   OUT_BATCH( (dst_y << 16) | dst_x );
-   OUT_BATCH( (dst_y2 << 16) | dst_x2 );
-   OUT_BATCH( dst_offset );	
-   OUT_BATCH( (src_y << 16) | src_x );
-   OUT_BATCH( src_pitch );
-   OUT_BATCH( src_offset ); 
-   ADVANCE_BATCH();
-}
-
-
-
-void intelClearWithBlit(GLcontext *ctx, GLbitfield buffers, GLboolean allFoo,
-                        GLint cx1Foo, GLint cy1Foo, GLint cwFoo, GLint chFoo)
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   intelScreenPrivate *intelScreen = intel->intelScreen;
-   GLuint clear_depth, clear_color;
-   GLint cx, cy, cw, ch;
-   GLboolean all;
-   GLint pitch;
-   GLint cpp = intelScreen->cpp;
-   GLint i;
-   GLuint BR13, CMD, D_CMD;
-   BATCH_LOCALS;
-
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-
-   /* get clear bounds after locking */
-   cx = intel->ctx.DrawBuffer->_Xmin;
-   cy = intel->ctx.DrawBuffer->_Ymin;
-   cw = intel->ctx.DrawBuffer->_Xmax - cx;
-   ch = intel->ctx.DrawBuffer->_Ymax - cy;
-   all = (cw == intel->ctx.DrawBuffer->Width &&
-          ch == intel->ctx.DrawBuffer->Height);
-
-   pitch = intelScreen->front.pitch;
-
-   clear_color = intel->ClearColor;
-   clear_depth = 0;
-
-   if (buffers & BUFFER_BIT_DEPTH) {
-      clear_depth = (GLuint)(ctx->Depth.Clear * intel->ClearDepth);
-   }
-
-   if (buffers & BUFFER_BIT_STENCIL) {
-      clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
-   }
-
-   switch(cpp) {
-   case 2: 
-      BR13 = (0xF0 << 16) | (pitch) | (1<<24);
-      D_CMD = CMD = XY_COLOR_BLT_CMD;
-      break;
-   case 4:
-      BR13 = (0xF0 << 16) | (pitch) | (1<<24) | (1<<25);
-      CMD = (XY_COLOR_BLT_CMD |
-	     XY_COLOR_BLT_WRITE_ALPHA | 
-	     XY_COLOR_BLT_WRITE_RGB);
-      D_CMD = XY_COLOR_BLT_CMD;
-      if (buffers & BUFFER_BIT_DEPTH) D_CMD |= XY_COLOR_BLT_WRITE_RGB;
-      if (buffers & BUFFER_BIT_STENCIL) D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
-      break;
-   default:
-      BR13 = (0xF0 << 16) | (pitch) | (1<<24);
-      D_CMD = CMD = XY_COLOR_BLT_CMD;
-      break;
-   }
-
-   {
-      /* flip top to bottom */
-      cy = intel->driDrawable->h - cy - ch;
-      cx = cx + intel->drawX;
-      cy += intel->drawY;
-
-      /* adjust for page flipping */
-      if ( intel->sarea->pf_current_page == 1 ) {
-	 GLuint tmp = buffers;
-
-	 buffers &= ~(BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT);
-	 if ( tmp & BUFFER_BIT_FRONT_LEFT ) buffers |= BUFFER_BIT_BACK_LEFT;
-	 if ( tmp & BUFFER_BIT_BACK_LEFT )  buffers |= BUFFER_BIT_FRONT_LEFT;
-      }
-
-      for (i = 0 ; i < intel->numClipRects ; i++) 
-      { 	 
-	 drm_clip_rect_t *box = &intel->pClipRects[i];	 
-	 drm_clip_rect_t b;
-
-	 if (!all) {
-	    GLint x = box->x1;
-	    GLint y = box->y1;
-	    GLint w = box->x2 - x;
-	    GLint h = box->y2 - y;
-
-	    if (x < cx) w -= cx - x, x = cx; 
-	    if (y < cy) h -= cy - y, y = cy;
-	    if (x + w > cx + cw) w = cx + cw - x;
-	    if (y + h > cy + ch) h = cy + ch - y;
-	    if (w <= 0) continue;
-	    if (h <= 0) continue;
-
-	    b.x1 = x;
-	    b.y1 = y;
-	    b.x2 = x + w;
-	    b.y2 = y + h;      
-	 } else {
-	    b = *box;
-	 }
-
-
-	 if (b.x1 > b.x2 ||
-	     b.y1 > b.y2 ||
-	     b.x2 > intelScreen->width ||
-	     b.y2 > intelScreen->height)
-	    continue;
-
-	 if ( buffers & BUFFER_BIT_FRONT_LEFT ) {	    
-	    BEGIN_BATCH( 6);	    
-	    OUT_BATCH( CMD );
-	    OUT_BATCH( BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( intelScreen->front.offset );
-	    OUT_BATCH( clear_color );
-	    ADVANCE_BATCH();
-	 }
-
-	 if ( buffers & BUFFER_BIT_BACK_LEFT ) {
-	    BEGIN_BATCH( 6); 
-	    OUT_BATCH( CMD );
-	    OUT_BATCH( BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( intelScreen->back.offset );
-	    OUT_BATCH( clear_color );
-	    ADVANCE_BATCH();
-	 }
-
-	 if ( buffers & (BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH) ) {
-	    BEGIN_BATCH( 6);
-	    OUT_BATCH( D_CMD );
-	    OUT_BATCH( BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( intelScreen->depth.offset );
-	    OUT_BATCH( clear_depth );
-	    ADVANCE_BATCH();
-	 }      
-      }
-   }
-   intelFlushBatchLocked( intel, GL_TRUE, GL_FALSE, GL_TRUE );
-   UNLOCK_HARDWARE( intel );
-}
-
-
-
-
-void intelDestroyBatchBuffer( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-
-   if (intel->alloc.offset) {
-      intelFreeAGP( intel, intel->alloc.ptr );
-      intel->alloc.ptr = NULL;
-      intel->alloc.offset = 0;
-   }
-   else if (intel->alloc.ptr) {
-      free(intel->alloc.ptr);
-      intel->alloc.ptr = NULL;
-   }
-
-   memset(&intel->batch, 0, sizeof(intel->batch));
-}
-
-
-void intelInitBatchBuffer( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-
-   /* This path isn't really safe with rotate:
-    */
-   if (getenv("INTEL_BATCH") && intel->intelScreen->allow_batchbuffer) {      
-      switch (intel->intelScreen->deviceID) {
-      case PCI_CHIP_I865_G:
-	 /* HW bug?  Seems to crash if batchbuffer crosses 4k boundary.
-	  */
-	 intel->alloc.size = 8 * 1024; 
-	 break;
-      default:
-	 /* This is the smallest amount of memory the kernel deals with.
-	  * We'd ideally like to make this smaller.
-	  */
-	 intel->alloc.size = 1 << intel->intelScreen->logTextureGranularity;
-	 break;
-      }
-
-      intel->alloc.ptr = intelAllocateAGP( intel, intel->alloc.size );
-      if (intel->alloc.ptr)
-	 intel->alloc.offset = 
-	    intelAgpOffsetFromVirtual( intel, intel->alloc.ptr );
-      else
-         intel->alloc.offset = 0; /* OK? */
-   }
-
-   /* The default is now to use a local buffer and pass that to the
-    * kernel.  This is also a fallback if allocation fails on the
-    * above path:
-    */
-   if (!intel->alloc.ptr) {
-      intel->alloc.size = 8 * 1024;
-      intel->alloc.ptr = malloc( intel->alloc.size );
-      intel->alloc.offset = 0;
-   }
-
-   assert(intel->alloc.ptr);
-}
+../intel/intel_batchbuffer.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.h b/src/mesa/drivers/dri/i915/intel_batchbuffer.h
deleted file mode 100644
index 577d07137ff..00000000000
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_BATCHBUFFER_H
-#define INTEL_BATCHBUFFER_H
-
-#include "intel_context.h"
-#include "intel_ioctl.h"
-
-
-#define BATCH_LOCALS	GLubyte *batch_ptr;
-
-/* #define VERBOSE 0 */
-#ifndef VERBOSE
-extern int VERBOSE;
-#endif
-
-
-#define BEGIN_BATCH(n)							\
-do {									\
-   if (VERBOSE) fprintf(stderr, 					\
-			"BEGIN_BATCH(%ld) in %s, %d dwords free\n",	\
-			((unsigned long)n), __FUNCTION__,		\
-			intel->batch.space/4);				\
-   if (intel->batch.space < (n)*4)					\
-      intelFlushBatch(intel, GL_TRUE);					\
-   if (intel->batch.space == intel->batch.size)	intel->batch.func = __FUNCTION__;			\
-   batch_ptr = intel->batch.ptr;					\
-} while (0)
-
-#define OUT_BATCH(n)					\
-do {							\
-   *(GLuint *)batch_ptr = (n);				\
-   if (VERBOSE) fprintf(stderr, " -- %08x at %s/%d\n", (n), __FILE__, __LINE__);	\
-   batch_ptr += 4;					\
-} while (0)
-
-#define ADVANCE_BATCH()						\
-do {								\
-   if (VERBOSE) fprintf(stderr, "ADVANCE_BATCH()\n");		\
-   intel->batch.space -= (batch_ptr - intel->batch.ptr);	\
-   intel->batch.ptr = batch_ptr;				\
-   assert(intel->batch.space >= 0);				\
-} while(0)
-
-extern void intelInitBatchBuffer( GLcontext *ctx );
-extern void intelDestroyBatchBuffer( GLcontext *ctx );
-
-extern void intelStartInlinePrimitive( intelContextPtr intel, GLuint prim );
-extern void intelWrapInlinePrimitive( intelContextPtr intel );
-extern void intelRestartInlinePrimitive( intelContextPtr intel );
-extern GLuint *intelEmitInlinePrimitiveLocked(intelContextPtr intel, 
-					      int primitive, int dwords,
-					      int vertex_size);
-extern void intelCopyBuffer( const __DRIdrawablePrivate *dpriv,
-			     const drm_clip_rect_t	*rect);
-extern void intelClearWithBlit(GLcontext *ctx, GLbitfield mask, GLboolean all,
-			     GLint cx1, GLint cy1, GLint cw, GLint ch);
-
-extern void intelEmitCopyBlitLocked( intelContextPtr intel,
-				     GLuint cpp,
-				     GLshort src_pitch,
-				     GLuint  src_offset,
-				     GLshort dst_pitch,
-				     GLuint  dst_offset,
-				     GLshort srcx, GLshort srcy,
-				     GLshort dstx, GLshort dsty,
-				     GLshort w, GLshort h );
-
-extern void intelEmitFillBlitLocked( intelContextPtr intel,
-				     GLuint cpp,
-				     GLshort dst_pitch,
-				     GLuint dst_offset,
-				     GLshort x, GLshort y, 
-				     GLshort w, GLshort h,
-				     GLuint color );
-
-
-
-
-static __inline GLuint *intelExtendInlinePrimitive( intelContextPtr intel, 
-						GLuint dwords )
-{
-   GLuint sz = dwords * sizeof(GLuint);
-   GLuint *ptr;
-
-   if (intel->batch.space < sz) {
-      intelWrapInlinePrimitive( intel );
-/*       assert(intel->batch.space >= sz); */
-   }
-
-/*    assert(intel->prim.primitive != ~0); */
-   ptr = (GLuint *)intel->batch.ptr;
-   intel->batch.ptr += sz;
-   intel->batch.space -= sz;
-
-   return ptr;
-}
-
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c
new file mode 120000
index 00000000000..dd6c8d17c28
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_blit.c
@@ -0,0 +1 @@
+../intel/intel_blit.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_buffer_objects.c b/src/mesa/drivers/dri/i915/intel_buffer_objects.c
new file mode 120000
index 00000000000..e06dd3c8d3c
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_buffer_objects.c
@@ -0,0 +1 @@
+../intel/intel_buffer_objects.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_buffers.c b/src/mesa/drivers/dri/i915/intel_buffers.c
new file mode 120000
index 00000000000..c86daa49f47
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_buffers.c
@@ -0,0 +1 @@
+../intel/intel_buffers.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
index 11c23f24a1b..27a1cbb255e 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_context.c
+++ b/src/mesa/drivers/dri/i915/intel_context.c
@@ -1,776 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include "glheader.h"
-#include "context.h"
-#include "matrix.h"
-#include "simple_list.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "imports.h"
-#include "points.h"
-
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/tnl.h"
-#include "vbo/vbo.h"
-
-#include "tnl/t_pipeline.h"
-#include "tnl/t_vertex.h"
-
-#include "drivers/common/driverfuncs.h"
-
-#include "intel_screen.h"
-
-#include "i830_dri.h"
-#include "i830_common.h"
-
-#include "intel_tex.h"
-#include "intel_span.h"
-#include "intel_tris.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-
-#include "vblank.h"
-#include "utils.h"
-#include "xmlpool.h" /* for symbolic values of enum-type options */
-#ifndef INTEL_DEBUG
-int INTEL_DEBUG = (0);
-#endif
-
-#define need_GL_ARB_multisample
-#define need_GL_ARB_point_parameters
-#define need_GL_ARB_texture_compression
-#define need_GL_ARB_vertex_buffer_object
-#define need_GL_ARB_vertex_program
-#define need_GL_ARB_window_pos
-#define need_GL_EXT_blend_color
-#define need_GL_EXT_blend_equation_separate
-#define need_GL_EXT_blend_func_separate
-#define need_GL_EXT_blend_minmax
-#define need_GL_EXT_cull_vertex
-#define need_GL_EXT_fog_coord
-#define need_GL_EXT_multi_draw_arrays
-#define need_GL_EXT_secondary_color
-#define need_GL_NV_vertex_program
-#include "extension_helper.h"
-
-#ifndef VERBOSE
-int VERBOSE = 0;
-#endif
-
-#if DEBUG_LOCKING
-char *prevLockFile;
-int prevLockLine;
-#endif
-
-/***************************************
- * Mesa's Driver Functions
- ***************************************/
-
-#define DRIVER_DATE "20061017"
-
-const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
-{
-   const char * chipset;
-   static char buffer[128];
-
-   switch (name) {
-   case GL_VENDOR:
-      return (GLubyte *)"Tungsten Graphics, Inc";
-      break;
-      
-   case GL_RENDERER:
-      switch (INTEL_CONTEXT(ctx)->intelScreen->deviceID) {
-      case PCI_CHIP_845_G:
-	 chipset = "Intel(R) 845G"; break;
-      case PCI_CHIP_I830_M:
-	 chipset = "Intel(R) 830M"; break;
-      case PCI_CHIP_I855_GM:
-	 chipset = "Intel(R) 852GM/855GM"; break;
-      case PCI_CHIP_I865_G:
-	 chipset = "Intel(R) 865G"; break;
-      case PCI_CHIP_I915_G:
-	 chipset = "Intel(R) 915G"; break;
-      case PCI_CHIP_I915_GM:
-	 chipset = "Intel(R) 915GM"; break;
-      case PCI_CHIP_I945_G:
-	 chipset = "Intel(R) 945G"; break;
-      case PCI_CHIP_I945_GM:
-	 chipset = "Intel(R) 945GM"; break;
-      case PCI_CHIP_I945_GME:
-	 chipset = "Intel(R) 945GME"; break;
-      case PCI_CHIP_G33_G:
-	 chipset = "Intel(R) G33"; break;
-      case PCI_CHIP_Q35_G:
-	 chipset = "Intel(R) Q35"; break;
-      case PCI_CHIP_Q33_G:
-	 chipset = "Intel(R) Q33"; break;
-      default:
-	 chipset = "Unknown Intel Chipset"; break;
-      }
-
-      (void) driGetRendererString( buffer, chipset, DRIVER_DATE, 0 );
-      return (GLubyte *) buffer;
-
-   default:
-      return NULL;
-   }
-}
-
-
-/**
- * Extension strings exported by the intel driver.
- *
- * \note
- * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
- * old i830-specific driver.
- */
-const struct dri_extension card_extensions[] =
-{
-    { "GL_ARB_multisample",                GL_ARB_multisample_functions },
-    { "GL_ARB_multitexture",               NULL },
-    { "GL_ARB_point_parameters",           GL_ARB_point_parameters_functions },
-    { "GL_ARB_texture_border_clamp",       NULL },
-    { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
-    { "GL_ARB_texture_cube_map",           NULL },
-    { "GL_ARB_texture_env_add",            NULL },
-    { "GL_ARB_texture_env_combine",        NULL },
-    { "GL_ARB_texture_env_dot3",           NULL },
-    { "GL_ARB_texture_mirrored_repeat",    NULL },
-    { "GL_ARB_texture_rectangle",          NULL },
-    { "GL_ARB_vertex_buffer_object",       GL_ARB_vertex_buffer_object_functions },
-    { "GL_ARB_vertex_program",             GL_ARB_vertex_program_functions },
-    { "GL_ARB_window_pos",                 GL_ARB_window_pos_functions },
-    { "GL_EXT_blend_color",                GL_EXT_blend_color_functions },
-    { "GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions },
-    { "GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions },
-    { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
-    { "GL_EXT_blend_subtract",             NULL },
-    { "GL_EXT_cull_vertex",                GL_EXT_cull_vertex_functions },
-    { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
-    { "GL_EXT_multi_draw_arrays",          GL_EXT_multi_draw_arrays_functions },
-    { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
-    { "GL_EXT_stencil_wrap",               NULL },
-    { "GL_EXT_texture_edge_clamp",         NULL },
-    { "GL_EXT_texture_env_combine",        NULL },
-    { "GL_EXT_texture_env_dot3",           NULL },
-    { "GL_EXT_texture_filter_anisotropic", NULL },
-    { "GL_EXT_texture_lod_bias",           NULL },
-    { "GL_3DFX_texture_compression_FXT1",  NULL },
-    { "GL_APPLE_client_storage",           NULL },
-    { "GL_MESA_pack_invert",               NULL },
-    { "GL_MESA_ycbcr_texture",             NULL },
-    { "GL_NV_blend_square",                NULL },
-    { "GL_NV_vertex_program",              GL_NV_vertex_program_functions },
-    { "GL_NV_vertex_program1_1",           NULL },
-    { "GL_SGIS_generate_mipmap",           NULL },
-    { NULL,                                NULL }
-};
-
-extern const struct tnl_pipeline_stage _intel_render_stage;
-
-static const struct tnl_pipeline_stage *intel_pipeline[] = {
-   &_tnl_vertex_transform_stage,
-   &_tnl_vertex_cull_stage,
-   &_tnl_normal_transform_stage,
-   &_tnl_lighting_stage,
-   &_tnl_fog_coordinate_stage,
-   &_tnl_texgen_stage,
-   &_tnl_texture_transform_stage,
-   &_tnl_point_attenuation_stage,
-   &_tnl_vertex_program_stage,
-#if 1
-   &_intel_render_stage,     /* ADD: unclipped rastersetup-to-dma */
-#endif
-   &_tnl_render_stage,
-   0,
-};
-
-
-static const struct dri_debug_control debug_control[] =
-{
-    { "fall",  DEBUG_FALLBACKS },
-    { "tex",   DEBUG_TEXTURE },
-    { "ioctl", DEBUG_IOCTL },
-    { "prim",  DEBUG_PRIMS },
-    { "vert",  DEBUG_VERTS },
-    { "state", DEBUG_STATE },
-    { "verb",  DEBUG_VERBOSE },
-    { "dri",   DEBUG_DRI },
-    { "dma",   DEBUG_DMA },
-    { "san",   DEBUG_SANITY },
-    { "sync",  DEBUG_SYNC },
-    { "sleep", DEBUG_SLEEP },
-    { "pix",   DEBUG_PIXEL },
-    { NULL,    0 }
-};
-
-
-static void intelInvalidateState( GLcontext *ctx, GLuint new_state )
-{
-   _swrast_InvalidateState( ctx, new_state );
-   _swsetup_InvalidateState( ctx, new_state );
-   _vbo_InvalidateState( ctx, new_state );
-   _tnl_InvalidateState( ctx, new_state );
-   _tnl_invalidate_vertex_state( ctx, new_state );
-   INTEL_CONTEXT(ctx)->NewGLState |= new_state;
-}
-
-
-void intelInitDriverFunctions( struct dd_function_table *functions )
-{
-   _mesa_init_driver_functions( functions );
-
-   functions->Clear = intelClear;
-   functions->Flush = intelglFlush;
-   functions->Finish = intelFinish;
-   functions->GetString = intelGetString;
-   functions->UpdateState = intelInvalidateState;
-
-   intelInitTextureFuncs( functions );
-   intelInitPixelFuncs( functions );
-   intelInitStateFuncs( functions );
-}
-
-static void intel_emit_invarient_state( GLcontext *ctx )
-{
-}
-
-
-
-GLboolean intelInitContext( intelContextPtr intel,
-			    const __GLcontextModes *mesaVis,
-			    __DRIcontextPrivate *driContextPriv,
-			    void *sharedContextPrivate,
-			    struct dd_function_table *functions )
-{
-   GLcontext *ctx = &intel->ctx;
-   GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
-   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-   drmI830Sarea *saPriv = (drmI830Sarea *)
-      (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
-   int fthrottle_mode;
-
-   if (!_mesa_initialize_context(&intel->ctx,
-				 mesaVis, shareCtx, 
-				 functions,
-				 (void*) intel))
-      return GL_FALSE;
-
-   driContextPriv->driverPrivate = intel;
-   intel->intelScreen = intelScreen;
-   intel->driScreen = sPriv;
-   intel->sarea = saPriv;
-
-
-   (void) memset( intel->texture_heaps, 0, sizeof( intel->texture_heaps ) );
-   make_empty_list( & intel->swapped );
-
-   driParseConfigFiles (&intel->optionCache, &intelScreen->optionCache,
-			intel->driScreen->myNum, "i915");
-
-   ctx->Const.MaxTextureMaxAnisotropy = 2.0;
-
-   ctx->Const.MinLineWidth = 1.0;
-   ctx->Const.MinLineWidthAA = 1.0;
-   ctx->Const.MaxLineWidth = 3.0;
-   ctx->Const.MaxLineWidthAA = 3.0;
-   ctx->Const.LineWidthGranularity = 1.0;
-
-   ctx->Const.MinPointSize = 1.0;
-   ctx->Const.MinPointSizeAA = 1.0;
-   ctx->Const.MaxPointSize = 255.0;
-   ctx->Const.MaxPointSizeAA = 3.0;
-   ctx->Const.PointSizeGranularity = 1.0;
-
-   /* reinitialize the context point state.
-    * It depend on constants in __GLcontextRec::Const
-    */
-   _mesa_init_point(ctx);
-
-   /* Initialize the software rasterizer and helper modules. */
-   _swrast_CreateContext( ctx );
-   _vbo_CreateContext( ctx );
-   _tnl_CreateContext( ctx );
-   _swsetup_CreateContext( ctx );
-
-   /* Install the customized pipeline: */
-   _tnl_destroy_pipeline( ctx );
-   _tnl_install_pipeline( ctx, intel_pipeline );
-
-   /* Configure swrast to match hardware characteristics: */
-   _swrast_allow_pixel_fog( ctx, GL_FALSE );
-   _swrast_allow_vertex_fog( ctx, GL_TRUE );
-
-   /* Dri stuff */
-   intel->hHWContext = driContextPriv->hHWContext;
-   intel->driFd = sPriv->fd;
-   intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
-
-   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
-   intel->hw_stipple = 1;
-
-   switch(mesaVis->depthBits) {
-   case 0:			/* what to do in this case? */
-   case 16:
-      intel->depth_scale = 1.0/0xffff;
-      intel->polygon_offset_scale = 1.0/0xffff;
-      intel->depth_clear_mask = ~0;
-      intel->ClearDepth = 0xffff;
-      break;
-   case 24:
-      intel->depth_scale = 1.0/0xffffff;
-      intel->polygon_offset_scale = 2.0/0xffffff; /* req'd to pass glean */
-      intel->depth_clear_mask = 0x00ffffff;
-      intel->stencil_clear_mask = 0xff000000;
-      intel->ClearDepth = 0x00ffffff;
-      break;
-   default:
-      assert(0); 
-      break;
-   }
-
-   /* Initialize swrast, tnl driver tables: */
-   intelInitSpanFuncs( ctx );
-   intelInitTriFuncs( ctx );
-
-
-   intel->RenderIndex = ~0;
-
-   fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
-   intel->iw.irq_seq = -1;
-   intel->irqsEmitted = 0;
-
-   intel->do_irqs = (intel->intelScreen->irq_active &&
-		     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
-
-   intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
-
-   intel->vblank_flags = (intel->intelScreen->irq_active != 0)
-       ? driGetDefaultVBlankFlags(&intel->optionCache) : VBLANK_FLAG_NO_IRQ;
-
-   (*dri_interface->getUST)(&intel->swap_ust);
-   _math_matrix_ctr (&intel->ViewportMatrix);
-
-   driInitExtensions( ctx, card_extensions, GL_TRUE );
-
-   if (intel->ctx.Mesa_DXTn) {
-     _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
-     _mesa_enable_extension( ctx, "GL_S3_s3tc" );
-   }
-   else if (driQueryOptionb (&intel->optionCache, "force_s3tc_enable")) {
-     _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
-   }
-
-/*    driInitTextureObjects( ctx, & intel->swapped, */
-/* 			  DRI_TEXMGR_DO_TEXTURE_1D | */
-/* 			  DRI_TEXMGR_DO_TEXTURE_2D |  */
-/* 			  DRI_TEXMGR_DO_TEXTURE_RECT ); */
-
-
-   intelInitBatchBuffer(&intel->ctx);
-   intel->prim.flush = intel_emit_invarient_state;
-   intel->prim.primitive = ~0;
-
-
-#if DO_DEBUG
-   INTEL_DEBUG  = driParseDebugString( getenv( "INTEL_DEBUG" ),
-				       debug_control );
-   INTEL_DEBUG |= driParseDebugString( getenv( "INTEL_DEBUG" ),
-				       debug_control );
-#endif
-
-#ifndef VERBOSE
-   if (getenv("INTEL_VERBOSE"))
-      VERBOSE=1;
-#endif
-
-   if (getenv("INTEL_NO_RAST") || 
-       getenv("INTEL_NO_RAST")) {
-      fprintf(stderr, "disabling 3D rasterization\n");
-      FALLBACK(intel, INTEL_FALLBACK_USER, 1); 
-   }
-
-   return GL_TRUE;
-}
-
-void intelDestroyContext(__DRIcontextPrivate *driContextPriv)
-{
-   intelContextPtr intel = (intelContextPtr) driContextPriv->driverPrivate;
-
-   assert(intel); /* should never be null */
-   if (intel) {
-      GLboolean   release_texture_heaps;
-
-      INTEL_FIREVERTICES( intel );
-
-      intel->vtbl.destroy( intel );
-
-      release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
-      _swsetup_DestroyContext (&intel->ctx);
-      _tnl_DestroyContext (&intel->ctx);
-      _vbo_DestroyContext (&intel->ctx);
-
-      _swrast_DestroyContext (&intel->ctx);
-      intel->Fallback = 0;	/* don't call _swrast_Flush later */
-
-      intelDestroyBatchBuffer(&intel->ctx);
-      
-
-      if ( release_texture_heaps ) {
-         /* This share group is about to go away, free our private
-          * texture object data.
-          */
-         int i;
-
-         for ( i = 0 ; i < intel->nr_heaps ; i++ ) {
-	    driDestroyTextureHeap( intel->texture_heaps[ i ] );
-	    intel->texture_heaps[ i ] = NULL;
-         }
-
-	 assert( is_empty_list( & intel->swapped ) );
-      }
-
-      /* free the Mesa context */
-      _mesa_destroy_context(&intel->ctx);
-   }
-}
-
-void intelSetFrontClipRects( intelContextPtr intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
-   if (!dPriv) return;
-
-   intel->numClipRects = dPriv->numClipRects;
-   intel->pClipRects = dPriv->pClipRects;
-   intel->drawX = dPriv->x;
-   intel->drawY = dPriv->y;
-}
-
-
-void intelSetBackClipRects( intelContextPtr intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
-   if (!dPriv) return;
-
-   if (intel->sarea->pf_enabled == 0 && dPriv->numBackClipRects == 0) {
-      intel->numClipRects = dPriv->numClipRects;
-      intel->pClipRects = dPriv->pClipRects;
-      intel->drawX = dPriv->x;
-      intel->drawY = dPriv->y;
-   } else {
-      intel->numClipRects = dPriv->numBackClipRects;
-      intel->pClipRects = dPriv->pBackClipRects;
-      intel->drawX = dPriv->backX;
-      intel->drawY = dPriv->backY;
-      
-      if (dPriv->numBackClipRects == 1 &&
-	  dPriv->x == dPriv->backX &&
-	  dPriv->y == dPriv->backY) {
-      
-	 /* Repeat the calculation of the back cliprect dimensions here
-	  * as early versions of dri.a in the Xserver are incorrect.  Try
-	  * very hard not to restrict future versions of dri.a which
-	  * might eg. allocate truly private back buffers.
-	  */
-	 int x1, y1;
-	 int x2, y2;
-	 
-	 x1 = dPriv->x;
-	 y1 = dPriv->y;      
-	 x2 = dPriv->x + dPriv->w;
-	 y2 = dPriv->y + dPriv->h;
-	 
-	 if (x1 < 0) x1 = 0;
-	 if (y1 < 0) y1 = 0;
-	 if (x2 > intel->intelScreen->width) x2 = intel->intelScreen->width;
-	 if (y2 > intel->intelScreen->height) y2 = intel->intelScreen->height;
-
-	 if (x1 == dPriv->pBackClipRects[0].x1 &&
-	     y1 == dPriv->pBackClipRects[0].y1) {
-
-	    dPriv->pBackClipRects[0].x2 = x2;
-	    dPriv->pBackClipRects[0].y2 = y2;
-	 }
-      }
-   }
-}
-
-
-void intelWindowMoved( intelContextPtr intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   GLframebuffer *drawFb = (GLframebuffer *) dPriv->driverPrivate;
-
-   if (!intel->ctx.DrawBuffer) {
-      intelSetFrontClipRects( intel );
-   }
-   else {
-      driUpdateFramebufferSize(&intel->ctx, dPriv);
-      switch (drawFb->_ColorDrawBufferMask[0]) {
-      case BUFFER_BIT_FRONT_LEFT:
-	 intelSetFrontClipRects( intel );
-	 break;
-      case BUFFER_BIT_BACK_LEFT:
-	 intelSetBackClipRects( intel );
-	 break;
-      default:
-	 /* glDrawBuffer(GL_NONE or GL_FRONT_AND_BACK): software fallback */
-	 intelSetFrontClipRects( intel );
-      }
-   }
-
-   if (drawFb->Width != dPriv->w || drawFb->Height != dPriv->h) {
-      /* update Mesa's notion of framebuffer/window size */
-      _mesa_resize_framebuffer(&intel->ctx, drawFb, dPriv->w, dPriv->h);
-      drawFb->Initialized = GL_TRUE; /* XXX remove someday */
-   }
-
-   /* Set state we know depends on drawable parameters:
-    */
-   {
-      GLcontext *ctx = &intel->ctx;
-
-      if (intel->intelScreen->driScrnPriv->ddxMinor >= 7) {
-	 drmI830Sarea *sarea = intel->sarea;
-	 drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
-				      .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
-	 drm_clip_rect_t pipeA_rect = { .x1 = sarea->pipeA_x,
-					.x2 = sarea->pipeA_x + sarea->pipeA_w,
-					.y1 = sarea->pipeA_y,
-					.y2 = sarea->pipeA_y + sarea->pipeA_h };
-	 drm_clip_rect_t pipeB_rect = { .x1 = sarea->pipeB_x,
-					.x2 = sarea->pipeB_x + sarea->pipeB_w,
-					.y1 = sarea->pipeB_y,
-					.y2 = sarea->pipeB_y + sarea->pipeB_h };
-	 GLint areaA = driIntersectArea( drw_rect, pipeA_rect );
-	 GLint areaB = driIntersectArea( drw_rect, pipeB_rect );
-	 GLuint flags = intel->vblank_flags;
-
-	 if (areaB > areaA || (areaA == areaB && areaB > 0)) {
-	    flags = intel->vblank_flags | VBLANK_FLAG_SECONDARY;
-	 } else {
-	    flags = intel->vblank_flags & ~VBLANK_FLAG_SECONDARY;
-	 }
-
-	 if (flags != intel->vblank_flags) {
-	    intel->vblank_flags = flags;
-	    driGetCurrentVBlank(dPriv, intel->vblank_flags, &intel->vbl_seq);
-	 }
-      } else {
-	 intel->vblank_flags &= ~VBLANK_FLAG_SECONDARY;
-      }
-
-      ctx->Driver.Scissor( ctx, ctx->Scissor.X, ctx->Scissor.Y,
-			   ctx->Scissor.Width, ctx->Scissor.Height );
-      
-      ctx->Driver.DepthRange( ctx, 
-			      ctx->Viewport.Near,
-			      ctx->Viewport.Far );
-   }
-}
-
-GLboolean intelUnbindContext(__DRIcontextPrivate *driContextPriv)
-{
-   return GL_TRUE;
-}
-
-GLboolean intelMakeCurrent(__DRIcontextPrivate *driContextPriv,
-			  __DRIdrawablePrivate *driDrawPriv,
-			  __DRIdrawablePrivate *driReadPriv)
-{
-
-   if (driContextPriv) {
-      intelContextPtr intel = (intelContextPtr) driContextPriv->driverPrivate;
-
-      if ( intel->driDrawable != driDrawPriv ) {
-	 /* Shouldn't the readbuffer be stored also? */
-	 driDrawableInitVBlank( driDrawPriv, intel->vblank_flags,
-				&intel->vbl_seq );
-
-	 intel->driDrawable = driDrawPriv;
-	 intelWindowMoved( intel );
-      }
-
-      _mesa_make_current(&intel->ctx,
-			 (GLframebuffer *) driDrawPriv->driverPrivate,
-			 (GLframebuffer *) driReadPriv->driverPrivate);
-
-      intel->ctx.Driver.DrawBuffer( &intel->ctx, intel->ctx.Color.DrawBuffer[0] );
-   } else {
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   return GL_TRUE;
-}
-
-/**
- * Use the information in the sarea to update the screen parameters
- * related to screen rotation.
- */
-static void
-intelUpdateScreenRotation(intelContextPtr intel,
-                          __DRIscreenPrivate *sPriv,
-                          drmI830Sarea *sarea)
-{
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-   intelRegion *colorBuf;
-
-   intelUnmapScreenRegions(intelScreen);
-
-   intelUpdateScreenFromSAREA(intelScreen, sarea);
-
-   /* update the current hw offsets for the color and depth buffers */
-   if (intel->ctx.DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT)
-      colorBuf = &intelScreen->back;
-   else
-      colorBuf = &intelScreen->front;
-   intel->vtbl.update_color_z_regions(intel, colorBuf, &intelScreen->depth);
-
-   if (!intelMapScreenRegions(sPriv)) {
-      fprintf(stderr, "ERROR Remapping screen regions!!!\n");
-   }
-}
-
-void intelGetLock( intelContextPtr intel, GLuint flags )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   __DRIscreenPrivate *sPriv = intel->driScreen;
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-   drmI830Sarea * sarea = intel->sarea;
-   unsigned   i;
-
-   drmGetLock(intel->driFd, intel->hHWContext, flags);
-
-   /* If the window moved, may need to set a new cliprect now.
-    *
-    * NOTE: This releases and regains the hw lock, so all state
-    * checking must be done *after* this call:
-    */
-   if (dPriv)
-      DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
-
-   if (dPriv && intel->lastStamp != dPriv->lastStamp) {
-      intelWindowMoved( intel );
-      intel->lastStamp = dPriv->lastStamp;
-   }
-
-   /* If we lost context, need to dump all registers to hardware.
-    * Note that we don't care about 2d contexts, even if they perform
-    * accelerated commands, so the DRI locking in the X server is even
-    * more broken than usual.
-    */
-
-   if (sarea->width != intelScreen->width ||
-       sarea->height != intelScreen->height ||
-       sarea->rotation != intelScreen->current_rotation) {
-      intelUpdateScreenRotation(intel, sPriv, sarea);
-
-      /* This will drop the outstanding batchbuffer on the floor */
-      intel->batch.ptr -= (intel->batch.size - intel->batch.space);
-      intel->batch.space = intel->batch.size;
-      /* lose all primitives */
-      intel->prim.primitive = ~0;
-      intel->prim.start_ptr = 0;
-      intel->prim.flush = 0;
-      intel->vtbl.lost_hardware( intel ); 
-
-      intel->lastStamp = 0; /* force window update */
-
-      /* Release batch buffer
-       */
-      intelDestroyBatchBuffer(&intel->ctx);
-      intelInitBatchBuffer(&intel->ctx);
-      intel->prim.flush = intel_emit_invarient_state;
-
-      /* Still need to reset the global LRU?
-       */
-      intel_driReinitTextureHeap( intel->texture_heaps[0], intel->intelScreen->tex.size );
-   }
-
-   /* Shared texture managment - if another client has played with
-    * texture space, figure out which if any of our textures have been
-    * ejected, and update our global LRU.
-    */
-   for ( i = 0 ; i < intel->nr_heaps ; i++ ) {
-      DRI_AGE_TEXTURES( intel->texture_heaps[ i ] );
-   }
-}
-
-
-void intelSwapBuffers( __DRIdrawablePrivate *dPriv )
-{
-   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
-      intelContextPtr intel;
-      GLcontext *ctx;
-      intel = (intelContextPtr) dPriv->driContextPriv->driverPrivate;
-      ctx = &intel->ctx;
-      if (ctx->Visual.doubleBufferMode) {
-         intelScreenPrivate *screen = intel->intelScreen;
-	 _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
-	 if ( 0 /*intel->doPageFlip*/ ) { /* doPageFlip is never set !!! */
-	    intelPageFlip( dPriv );
-	 } else {
-	     intelCopyBuffer( dPriv, NULL );
-	 }
-         if (screen->current_rotation != 0) {
-            intelRotateWindow(intel, dPriv, BUFFER_BIT_FRONT_LEFT);
-         }
-      }
-   } else {
-      /* XXX this shouldn't be an error but we can't handle it for now */
-      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
-   }
-}
-
-void intelCopySubBuffer( __DRIdrawablePrivate *dPriv,
-			 int x, int y, int w, int h )
-{
-   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
-      intelContextPtr intel;
-      GLcontext *ctx;
-      intel = (intelContextPtr) dPriv->driContextPriv->driverPrivate;
-      ctx = &intel->ctx;
-      if (ctx->Visual.doubleBufferMode) {
-	 drm_clip_rect_t rect;
-	 rect.x1 = x + dPriv->x;
-	 rect.y1 = (dPriv->h - y - h) + dPriv->y;
-	 rect.x2 = rect.x1 + w;
-	 rect.y2 = rect.y1 + h;
-	 _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
-	 intelCopyBuffer( dPriv, &rect );
-      }
-   } else {
-      /* XXX this shouldn't be an error but we can't handle it for now */
-      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
-   }
-}
+../intel/intel_context.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
deleted file mode 100644
index 3b50107d73f..00000000000
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ /dev/null
@@ -1,563 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTELCONTEXT_INC
-#define INTELCONTEXT_INC
-
-
-
-#include "mtypes.h"
-#include "drm.h"
-#include "mm.h"
-#include "texmem.h"
-#include "vblank.h"
-
-#include "intel_screen.h"
-#include "i915_drm.h"
-#include "i830_common.h"
-#include "tnl/t_vertex.h"
-
-#define TAG(x) intel##x
-#include "tnl_dd/t_dd_vertex.h"
-#undef TAG
-
-#define DV_PF_555  (1<<8)
-#define DV_PF_565  (2<<8)
-#define DV_PF_8888 (3<<8)
-
-#define INTEL_CONTEXT(ctx)	((intelContextPtr)(ctx))
-
-typedef struct intel_context intelContext;
-typedef struct intel_context *intelContextPtr;
-typedef struct intel_texture_object *intelTextureObjectPtr;
-
-typedef void (*intel_tri_func)(intelContextPtr, intelVertex *, intelVertex *,
-							  intelVertex *);
-typedef void (*intel_line_func)(intelContextPtr, intelVertex *, intelVertex *);
-typedef void (*intel_point_func)(intelContextPtr, intelVertex *);
-
-#define INTEL_FALLBACK_DRAW_BUFFER	 0x1
-#define INTEL_FALLBACK_READ_BUFFER	 0x2
-#define INTEL_FALLBACK_USER		 0x4
-#define INTEL_FALLBACK_NO_BATCHBUFFER	 0x8
-#define INTEL_FALLBACK_NO_TEXMEM	 0x10
-#define INTEL_FALLBACK_RENDERMODE	 0x20
-
-extern void intelFallback( intelContextPtr intel, GLuint bit, GLboolean mode );
-#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
-
-
-#define INTEL_TEX_MAXLEVELS 10
-
-
-struct intel_texture_object
-{
-   driTextureObject    base;	/* the parent class */
-
-   GLuint texelBytes;
-   GLuint age;
-   GLuint Pitch;
-   GLuint Height;
-   GLuint TextureOffset;
-   GLubyte *BufAddr;   
-
-   GLuint min_level;
-   GLuint max_level;
-   GLuint depth_pitch;
-
-   struct {
-      const struct gl_texture_image *image;
-      GLuint offset;       /* into BufAddr */
-      GLuint height;
-      GLuint internalFormat;
-   } image[6][INTEL_TEX_MAXLEVELS];
-
-   GLuint dirty;
-   GLuint firstLevel,lastLevel;
-};
-
-
-struct intel_context
-{
-   GLcontext ctx;		/* the parent class */
-
-   struct {
-      void (*destroy)( intelContextPtr intel ); 
-      void (*emit_state)( intelContextPtr intel );
-      void (*lost_hardware)( intelContextPtr intel );
-      void (*update_texture_state)( intelContextPtr intel );
-
-      void (*render_start)( intelContextPtr intel );
-      void (*set_color_region)( intelContextPtr intel, const intelRegion *reg );
-      void (*set_z_region)( intelContextPtr intel, const intelRegion *reg );
-      void (*update_color_z_regions)(intelContextPtr intel,
-                                     const intelRegion *colorRegion,
-                                     const intelRegion *depthRegion);
-      void (*emit_flush)( intelContextPtr intel );
-      void (*reduced_primitive_state)( intelContextPtr intel, GLenum rprim );
-
-      GLboolean (*check_vertex_size)( intelContextPtr intel, GLuint expected );
-
-      void (*clear_with_tris)( intelContextPtr intel, GLbitfield mask,
-			       GLboolean all, 
-			       GLint cx, GLint cy, GLint cw, GLint ch);
-
-      void (*rotate_window)( intelContextPtr intel,
-                             __DRIdrawablePrivate *dPriv, GLuint srcBuf);
-
-      intelTextureObjectPtr (*alloc_tex_obj)( struct gl_texture_object *tObj );
-
-   } vtbl;
-
-   GLint refcount;   
-   GLuint Fallback;
-   GLuint NewGLState;
-   
-   struct {
-      GLuint start_offset;
-      GLint size;
-      GLint space;
-      GLubyte *ptr;
-      GLuint counter;
-      GLuint last_emit_state;
-      GLboolean contains_geometry;
-      const char *func;
-      GLuint last_swap;
-   } batch;
-      
-   struct {
-      void *ptr;
-      GLint size;
-      GLuint offset;
-      GLuint active_buf;
-      GLuint irq_emitted;
-   } alloc;
-
-   struct {
-      GLuint primitive;
-      GLubyte *start_ptr;      
-      void (*flush)( GLcontext * );
-   } prim;
-
-   GLboolean locked;
-
-   GLubyte clear_red;
-   GLubyte clear_green;
-   GLubyte clear_blue;
-   GLubyte clear_alpha;
-   GLuint ClearColor;
-   GLuint ClearDepth;
-
-   GLuint coloroffset;
-   GLuint specoffset;
-
-   /* Support for duplicating XYZW as WPOS parameter (crutch for I915).
-    */
-   GLuint wpos_offset;
-   GLuint wpos_size;
-
-   struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
-   GLuint vertex_attr_count;
-
-   GLfloat depth_scale;
-   GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
-   GLuint depth_clear_mask;
-   GLuint stencil_clear_mask;
-
-   GLboolean hw_stencil;
-   GLboolean hw_stipple;
-   
-   /* Texture object bookkeeping
-    */
-   GLuint                nr_heaps;
-   driTexHeap          * texture_heaps[1];
-   driTextureObject      swapped;
-   GLuint                lastStamp;
-
-   struct intel_texture_object *CurrentTexObj[MAX_TEXTURE_UNITS];
-
-   /* State for intelvb.c and inteltris.c.
-    */
-   GLuint RenderIndex;
-   GLmatrix ViewportMatrix;
-   GLenum render_primitive;
-   GLenum reduced_primitive;
-   GLuint vertex_size;
-   unsigned char *verts;	   /* points to tnl->clipspace.vertex_buf */
-
-
-   /* Fallback rasterization functions 
-    */
-   intel_point_func draw_point;
-   intel_line_func draw_line;
-   intel_tri_func draw_tri;
-
-   /* Drawing buffer state
-    */
-   intelRegion *drawRegion;  /* current drawing buffer */
-   intelRegion *readRegion;  /* current reading buffer */
-
-   int drawX;			/* origin of drawable in draw buffer */
-   int drawY;
-   GLuint numClipRects;		/* cliprects for that buffer */
-   drm_clip_rect_t *pClipRects;
-
-   int dirtyAge;
-   int perf_boxes;
-
-   GLuint do_usleeps;
-   int do_irqs;
-   GLuint irqsEmitted;
-   drm_i915_irq_wait_t iw;
-
-   GLboolean scissor;
-   drm_clip_rect_t draw_rect;
-   drm_clip_rect_t scissor_rect;
-
-   drm_context_t hHWContext;
-   drmLock *driHwLock;
-   int driFd;
-
-   __DRIdrawablePrivate *driDrawable;
-   __DRIscreenPrivate *driScreen;
-   intelScreenPrivate *intelScreen; 
-   drmI830Sarea *sarea; 
-
-   /**
-    * Configuration cache
-    */
-   driOptionCache optionCache;
-
-   /* VBI
-    */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
-
-   int64_t swap_ust;
-   int64_t swap_missed_ust;
-
-   GLuint swap_count;
-   GLuint swap_missed_count;
-
-   GLuint swap_scheduled;
-};
-
-
-#define DEBUG_LOCKING	1
-
-#if DEBUG_LOCKING
-extern char *prevLockFile;
-extern int prevLockLine;
-
-#define DEBUG_LOCK()							\
-   do {									\
-      prevLockFile = (__FILE__);					\
-      prevLockLine = (__LINE__);					\
-   } while (0)
-
-#define DEBUG_RESET()							\
-   do {									\
-      prevLockFile = 0;							\
-      prevLockLine = 0;							\
-   } while (0)
-
-/* Slightly less broken way of detecting recursive locking in a
- * threaded environment.  The right way to do this would be to make
- * prevLockFile, prevLockLine thread-local.
- *
- * This technique instead checks to see if the same context is
- * requesting the lock twice -- this will not catch application
- * breakages where the same context is active in two different threads
- * at once, but it will catch driver breakages (recursive locking) in
- * threaded apps.
- */
-#define DEBUG_CHECK_LOCK()						\
-   do {									\
-      if ( *((volatile int *)intel->driHwLock) == 			\
-	   (DRM_LOCK_HELD | intel->hHWContext) ) {			\
-	 fprintf( stderr,						\
-		  "LOCK SET!\n\tPrevious %s:%d\n\tCurrent: %s:%d\n",	\
-		  prevLockFile, prevLockLine, __FILE__, __LINE__ );	\
-	 abort();							\
-      }									\
-   } while (0)
-
-#else
-
-#define DEBUG_LOCK()
-#define DEBUG_RESET()
-#define DEBUG_CHECK_LOCK()
-
-#endif
-
-
-
-
-/* Lock the hardware and validate our state.  
- */
-#define LOCK_HARDWARE( intel )				\
-do {							\
-    char __ret=0;					\
-    DEBUG_CHECK_LOCK();					\
-    assert(!(intel)->locked);				\
-    if ((intel)->swap_scheduled) {			\
-        drmVBlank vbl;					\
-        vbl.request.type = DRM_VBLANK_ABSOLUTE;		\
-        if ((intel)->vblank_flags &			\
-            VBLANK_FLAG_SECONDARY) {			\
-            vbl.request.type |= DRM_VBLANK_SECONDARY;	\
-        }						\
-        vbl.request.sequence = (intel)->vbl_seq;	\
-        drmWaitVBlank((intel)->driFd, &vbl);		\
-        (intel)->swap_scheduled = 0;			\
-    }							\
-    DRM_CAS((intel)->driHwLock, (intel)->hHWContext,	\
-        (DRM_LOCK_HELD|(intel)->hHWContext), __ret);	\
-    if (__ret)						\
-        intelGetLock( (intel), 0 );			\
-      DEBUG_LOCK();					\
-    (intel)->locked = 1;				\
-}while (0)
- 
-  
-  /* Unlock the hardware using the global current context 
-   */
-#define UNLOCK_HARDWARE(intel)						\
-do {									\
-   intel->locked = 0;							\
-   if (0) { 								\
-      intel->perf_boxes |= intel->sarea->perf_boxes;  			\
-      intel->sarea->perf_boxes = 0;					\
-   }									\
-   DRM_UNLOCK((intel)->driFd, (intel)->driHwLock, (intel)->hHWContext);	\
-   DEBUG_RESET();							\
-} while (0)
-
-
-#define SUBPIXEL_X 0.125
-#define SUBPIXEL_Y 0.125
-
-#define INTEL_FIREVERTICES(intel)		\
-do {						\
-   if ((intel)->prim.flush)			\
-      (intel)->prim.flush(&(intel)->ctx);		\
-} while (0)
-
-/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
-  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
-  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
-    ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
-  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
-  ((a<<24) | (r<<16) | (g<<8) | b)
-
-
-#define INTEL_PACKCOLOR(format, r,  g,  b, a)		\
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) :	\
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) :	\
-  (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) :	\
-   0)))
-
-
-
-/* ================================================================
- * From linux kernel i386 header files, copes with odd sizes better
- * than COPY_DWORDS would:
- */
-#if defined(i386) || defined(__i386__)
-static __inline__ void * __memcpy(void * to, const void * from, size_t n)
-{
-   int d0, d1, d2;
-   __asm__ __volatile__(
-      "rep ; movsl\n\t"
-      "testb $2,%b4\n\t"
-      "je 1f\n\t"
-      "movsw\n"
-      "1:\ttestb $1,%b4\n\t"
-      "je 2f\n\t"
-      "movsb\n"
-      "2:"
-      : "=&c" (d0), "=&D" (d1), "=&S" (d2)
-      :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
-      : "memory");
-   return (to);
-}
-#else
-#define __memcpy(a,b,c) memcpy(a,b,c)
-#endif
-
-
-
-/* ================================================================
- * Debugging:
- */
-#define DO_DEBUG		1
-#if DO_DEBUG
-extern int INTEL_DEBUG;
-#else
-#define INTEL_DEBUG		0
-#endif
-
-#define DEBUG_TEXTURE	0x1
-#define DEBUG_STATE	0x2
-#define DEBUG_IOCTL	0x4
-#define DEBUG_PRIMS	0x8
-#define DEBUG_VERTS	0x10
-#define DEBUG_FALLBACKS	0x20
-#define DEBUG_VERBOSE	0x40
-#define DEBUG_DRI       0x80
-#define DEBUG_DMA       0x100
-#define DEBUG_SANITY    0x200
-#define DEBUG_SYNC      0x400
-#define DEBUG_SLEEP     0x800
-#define DEBUG_PIXEL     0x1000
-
-
-#define PCI_CHIP_845_G			0x2562
-#define PCI_CHIP_I830_M			0x3577
-#define PCI_CHIP_I855_GM		0x3582
-#define PCI_CHIP_I865_G			0x2572
-#define PCI_CHIP_I915_G			0x2582
-#define PCI_CHIP_I915_GM		0x2592
-#define PCI_CHIP_I945_G			0x2772
-#define PCI_CHIP_I945_GM		0x27A2
-#define PCI_CHIP_I945_GME		0x27AE
-#define PCI_CHIP_G33_G			0x29C2
-#define PCI_CHIP_Q35_G			0x29B2
-#define PCI_CHIP_Q33_G			0x29D2
-
-
-/* ================================================================
- * intel_context.c:
- */
-
-extern void intelInitDriverFunctions( struct dd_function_table *functions );
-
-extern GLboolean intelInitContext( intelContextPtr intel, 
-				   const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate,
-				   struct dd_function_table *functions );
-
-extern void intelGetLock(intelContextPtr intel, GLuint flags);
-extern void intelSetBackClipRects(intelContextPtr intel);
-extern void intelSetFrontClipRects(intelContextPtr intel);
-extern void intelWindowMoved( intelContextPtr intel );
-
-extern const GLubyte *intelGetString( GLcontext *ctx, GLenum name );
-
-
-/* ================================================================
- * intel_state.c:
- */
-extern void intelInitStateFuncs( struct dd_function_table *functions );
-
-#define COMPAREFUNC_ALWAYS		0
-#define COMPAREFUNC_NEVER		0x1
-#define COMPAREFUNC_LESS		0x2
-#define COMPAREFUNC_EQUAL		0x3
-#define COMPAREFUNC_LEQUAL		0x4
-#define COMPAREFUNC_GREATER		0x5
-#define COMPAREFUNC_NOTEQUAL		0x6
-#define COMPAREFUNC_GEQUAL		0x7
-
-#define STENCILOP_KEEP			0
-#define STENCILOP_ZERO			0x1
-#define STENCILOP_REPLACE		0x2
-#define STENCILOP_INCRSAT		0x3
-#define STENCILOP_DECRSAT		0x4
-#define STENCILOP_INCR			0x5
-#define STENCILOP_DECR			0x6
-#define STENCILOP_INVERT		0x7
-
-#define LOGICOP_CLEAR			0
-#define LOGICOP_NOR			0x1
-#define LOGICOP_AND_INV 		0x2
-#define LOGICOP_COPY_INV		0x3
-#define LOGICOP_AND_RVRSE		0x4
-#define LOGICOP_INV			0x5
-#define LOGICOP_XOR			0x6
-#define LOGICOP_NAND			0x7
-#define LOGICOP_AND			0x8
-#define LOGICOP_EQUIV			0x9
-#define LOGICOP_NOOP			0xa
-#define LOGICOP_OR_INV			0xb
-#define LOGICOP_COPY			0xc
-#define LOGICOP_OR_RVRSE		0xd
-#define LOGICOP_OR			0xe
-#define LOGICOP_SET			0xf
-
-#define BLENDFACT_ZERO			0x01
-#define BLENDFACT_ONE			0x02
-#define BLENDFACT_SRC_COLR		0x03
-#define BLENDFACT_INV_SRC_COLR 		0x04
-#define BLENDFACT_SRC_ALPHA		0x05
-#define BLENDFACT_INV_SRC_ALPHA 	0x06
-#define BLENDFACT_DST_ALPHA		0x07
-#define BLENDFACT_INV_DST_ALPHA 	0x08
-#define BLENDFACT_DST_COLR		0x09
-#define BLENDFACT_INV_DST_COLR		0x0a
-#define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
-#define BLENDFACT_CONST_COLOR		0x0c
-#define BLENDFACT_INV_CONST_COLOR	0x0d
-#define BLENDFACT_CONST_ALPHA		0x0e
-#define BLENDFACT_INV_CONST_ALPHA	0x0f
-#define BLENDFACT_MASK          	0x0f
-
-
-extern int intel_translate_compare_func( GLenum func );
-extern int intel_translate_stencil_op( GLenum op );
-extern int intel_translate_blend_factor( GLenum factor );
-extern int intel_translate_logic_op( GLenum opcode );
-
-
-/* ================================================================
- * intel_ioctl.c:
- */
-extern void intel_dump_batchbuffer( long offset,
-				    int *ptr,
-				    int count );
-
-
-/* ================================================================
- * intel_pixel.c:
- */	
-extern void intelInitPixelFuncs( struct dd_function_table *functions );
-
-
-
-#endif
-
diff --git a/src/mesa/drivers/dri/i915/intel_decode.c b/src/mesa/drivers/dri/i915/intel_decode.c
new file mode 120000
index 00000000000..f671b6cbb13
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_decode.c
@@ -0,0 +1 @@
+../intel/intel_decode.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_depthstencil.c b/src/mesa/drivers/dri/i915/intel_depthstencil.c
new file mode 120000
index 00000000000..4ac4ae690a3
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_depthstencil.c
@@ -0,0 +1 @@
+../intel/intel_depthstencil.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c
new file mode 120000
index 00000000000..a19f86dcc57
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_fbo.c
@@ -0,0 +1 @@
+../intel/intel_fbo.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.c b/src/mesa/drivers/dri/i915/intel_ioctl.c
deleted file mode 100644
index aa7c6d106ce..00000000000
--- a/src/mesa/drivers/dri/i915/intel_ioctl.c
+++ /dev/null
@@ -1,659 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include <stdio.h>
-#include <unistd.h>
-#include <errno.h>
-#include <sched.h>
-
-#include "mtypes.h"
-#include "context.h"
-#include "swrast/swrast.h"
-
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-#include "drm.h"
-
-uint32_t intelGetLastFrame (intelContextPtr intel) 
-{
-   int ret;
-   uint32_t frame;
-   drm_i915_getparam_t gp;
-   
-   gp.param = I915_PARAM_LAST_DISPATCH;
-   gp.value = (int *)&frame;
-   ret = drmCommandWriteRead( intel->driFd, DRM_I915_GETPARAM,
-			      &gp, sizeof(gp) );
-   return frame;
-}
-
-int intelEmitIrqLocked( intelContextPtr intel )
-{
-   drmI830IrqEmit ie;
-   int ret, seq;
-      
-   assert(((*(int *)intel->driHwLock) & ~DRM_LOCK_CONT) == 
-	  (DRM_LOCK_HELD|intel->hHWContext));
-
-   ie.irq_seq = &seq;
-	 
-   ret = drmCommandWriteRead( intel->driFd, DRM_I830_IRQ_EMIT, 
-			      &ie, sizeof(ie) );
-   if ( ret ) {
-      fprintf( stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret );
-      exit(1);
-   }
-   
-   if (0)
-      fprintf(stderr, "%s -->  %d\n", __FUNCTION__, seq );
-
-   return seq;
-}
-
-void intelWaitIrq( intelContextPtr intel, int seq )
-{
-   int ret;
-      
-   if (0)
-      fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
-
-   intel->iw.irq_seq = seq;
-	 
-   do {
-     ret = drmCommandWrite( intel->driFd, DRM_I830_IRQ_WAIT, &intel->iw, sizeof(intel->iw) );
-   } while (ret == -EAGAIN || ret == -EINTR);
-
-   if ( ret ) {
-      fprintf( stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret );
-      if (0)
-	 intel_dump_batchbuffer( intel->alloc.offset,
-				 intel->alloc.ptr,
-				 intel->alloc.size );
-      exit(1);
-   }
-}
-
-
-
-static void age_intel( intelContextPtr intel, int age )
-{
-   GLuint i;
-
-   for (i = 0 ; i < MAX_TEXTURE_UNITS ; i++)
-      if (intel->CurrentTexObj[i]) 
-	 intel->CurrentTexObj[i]->age = age;
-}
-
-void intel_dump_batchbuffer( long offset,
-			     int *ptr,
-			     int count )
-{
-   int i;
-   fprintf(stderr, "\n\n\nSTART BATCH (%d dwords):\n", count);
-   for (i = 0; i < count/4; i += 4) 
-      fprintf(stderr, "\t0x%x: 0x%08x 0x%08x 0x%08x 0x%08x\n", 
-	      (unsigned int)offset + i*4, ptr[i], ptr[i+1], ptr[i+2], ptr[i+3]);
-   fprintf(stderr, "END BATCH\n\n\n");
-}
-
-void intelRefillBatchLocked( intelContextPtr intel, GLboolean allow_unlock )
-{
-   GLuint last_irq = intel->alloc.irq_emitted;
-   GLuint half = intel->alloc.size / 2;
-   GLuint buf = (intel->alloc.active_buf ^= 1);
-
-   intel->alloc.irq_emitted = intelEmitIrqLocked( intel );
-
-   if (last_irq) {
-      if (allow_unlock) UNLOCK_HARDWARE( intel ); 
-      intelWaitIrq( intel, last_irq );
-      if (allow_unlock) LOCK_HARDWARE( intel ); 
-   }
-
-   if (0)
-      fprintf(stderr, "%s: now using half %d\n", __FUNCTION__, buf);
-
-   intel->batch.start_offset = intel->alloc.offset + buf * half;
-   intel->batch.ptr = (unsigned char *)intel->alloc.ptr + buf * half;
-   intel->batch.size = half - 8;
-   intel->batch.space = half - 8;
-   assert(intel->batch.space >= 0);
-}
-
-#define MI_BATCH_BUFFER_END 	(0xA<<23)
-
-
-void intelFlushBatchLocked( intelContextPtr intel, 
-			    GLboolean ignore_cliprects,
-			    GLboolean refill,
-			    GLboolean allow_unlock)
-{
-   drmI830BatchBuffer batch;
-
-   assert(intel->locked);
-
-   if (0)
-      fprintf(stderr, "%s used %d of %d offset %x..%x refill %d (started in %s)\n",
-	      __FUNCTION__, 
-	      (intel->batch.size - intel->batch.space), 
-	      intel->batch.size,
-	      intel->batch.start_offset,
-	      intel->batch.start_offset + 
-	      (intel->batch.size - intel->batch.space), 
-	      refill,
-	      intel->batch.func);
-
-   /* Throw away non-effective packets.  Won't work once we have
-    * hardware contexts which would preserve statechanges beyond a
-    * single buffer.
-    */
-   if (intel->numClipRects == 0 && !ignore_cliprects) {
-      
-      /* Without this yeild, an application with no cliprects can hog
-       * the hardware.  Without unlocking, the effect is much worse -
-       * effectively a lock-out of other contexts.
-       */
-      if (allow_unlock) {
-	 UNLOCK_HARDWARE( intel );
-	 sched_yield();
-	 LOCK_HARDWARE( intel );
-      }
-
-      /* Note that any state thought to have been emitted actually
-       * hasn't:
-       */
-      intel->batch.ptr -= (intel->batch.size - intel->batch.space);
-      intel->batch.space = intel->batch.size;
-      intel->vtbl.lost_hardware( intel ); 
-   }
-
-   if (intel->batch.space != intel->batch.size) {
-
-      if (intel->sarea->ctxOwner != intel->hHWContext) {
-	 intel->perf_boxes |= I830_BOX_LOST_CONTEXT;
-	 intel->sarea->ctxOwner = intel->hHWContext;
-      }
-
-      batch.start = intel->batch.start_offset;
-      batch.used = intel->batch.size - intel->batch.space;
-      batch.cliprects = intel->pClipRects;
-      batch.num_cliprects = ignore_cliprects ? 0 : intel->numClipRects;
-      batch.DR1 = 0;
-      batch.DR4 = ((((GLuint)intel->drawX) & 0xffff) | 
-		   (((GLuint)intel->drawY) << 16));
-      
-      if (intel->alloc.offset) {
-	 if ((batch.used & 0x4) == 0) {
-	    ((int *)intel->batch.ptr)[0] = 0;
-	    ((int *)intel->batch.ptr)[1] = MI_BATCH_BUFFER_END;
-	    batch.used += 0x8;
-	    intel->batch.ptr += 0x8;
-	 }
-	 else {
-	    ((int *)intel->batch.ptr)[0] = MI_BATCH_BUFFER_END;
-	    batch.used += 0x4;
-	    intel->batch.ptr += 0x4;
-	 }      
-      }
-
-      if (0)
- 	 intel_dump_batchbuffer( batch.start,
-				 (int *)(intel->batch.ptr - batch.used),
-				 batch.used );
-
-      intel->batch.start_offset += batch.used;
-      intel->batch.size -= batch.used;
-
-      if (intel->batch.size < 8) {
-	 refill = GL_TRUE;
-	 intel->batch.space = intel->batch.size = 0;
-      }
-      else {
-	 intel->batch.size -= 8;
-	 intel->batch.space = intel->batch.size;
-      }
-
-
-      assert(intel->batch.space >= 0);
-      assert(batch.start >= intel->alloc.offset);
-      assert(batch.start < intel->alloc.offset + intel->alloc.size);
-      assert(batch.start + batch.used > intel->alloc.offset);
-      assert(batch.start + batch.used <= 
-	     intel->alloc.offset + intel->alloc.size);
-
-
-      if (intel->alloc.offset) {
-	 if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch, 
-			      sizeof(batch))) {
-	    fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n",  -errno);
-	    UNLOCK_HARDWARE(intel);
-	    exit(1);
-	 }
-      } else {
-	 drmI830CmdBuffer cmd;
-	 cmd.buf = (char *)intel->alloc.ptr + batch.start;
-	 cmd.sz = batch.used;
-	 cmd.DR1 = batch.DR1;
-	 cmd.DR4 = batch.DR4;
-	 cmd.num_cliprects = batch.num_cliprects;
-	 cmd.cliprects = batch.cliprects;
-	 
-	 if (drmCommandWrite (intel->driFd, DRM_I830_CMDBUFFER, &cmd, 
-			      sizeof(cmd))) {
-	    fprintf(stderr, "DRM_I830_CMDBUFFER: %d\n",  -errno);
-	    UNLOCK_HARDWARE(intel);
-	    exit(1);
-	 }
-      }	 
-
-      
-      age_intel(intel, intel->sarea->last_enqueue);
-
-      /* FIXME: use hardware contexts to avoid 'losing' hardware after
-       * each buffer flush.
-       */
-      if (intel->batch.contains_geometry) 
-	 assert(intel->batch.last_emit_state == intel->batch.counter);
-
-      intel->batch.counter++;
-      intel->batch.contains_geometry = 0;
-      intel->batch.func = 0;
-      intel->vtbl.lost_hardware( intel );
-   }
-
-   if (refill)
-      intelRefillBatchLocked( intel, allow_unlock );
-}
-
-void intelFlushBatch( intelContextPtr intel, GLboolean refill )
-{
-   if (intel->locked) {
-      intelFlushBatchLocked( intel, GL_FALSE, refill, GL_FALSE );
-   } 
-   else {
-      LOCK_HARDWARE(intel);
-      intelFlushBatchLocked( intel, GL_FALSE, refill, GL_TRUE );
-      UNLOCK_HARDWARE(intel);
-   }
-}
-
-
-void intelWaitForIdle( intelContextPtr intel )
-{   
-   if (0)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   intel->vtbl.emit_flush( intel );
-   intelFlushBatch( intel, GL_TRUE );
-
-   /* Use an irq to wait for dma idle -- Need to track lost contexts
-    * to shortcircuit consecutive calls to this function:
-    */
-   intelWaitIrq( intel, intel->alloc.irq_emitted );
-   intel->alloc.irq_emitted = 0;
-}
-
-
-/**
- * Check if we need to rotate/warp the front color buffer to the
- * rotated screen.  We generally need to do this when we get a glFlush
- * or glFinish after drawing to the front color buffer.
- */
-static void
-intelCheckFrontRotate(GLcontext *ctx)
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   if (intel->ctx.DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT) {
-      intelScreenPrivate *screen = intel->intelScreen;
-      if (screen->current_rotation != 0) {
-         __DRIdrawablePrivate *dPriv = intel->driDrawable;
-         intelRotateWindow(intel, dPriv, BUFFER_BIT_FRONT_LEFT);
-      }
-   }
-}
-
-
-/**
- * NOT directly called via glFlush.
- */
-void intelFlush( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-
-   if (intel->Fallback)
-      _swrast_flush( ctx );
-
-   INTEL_FIREVERTICES( intel );
-
-   if (intel->batch.size != intel->batch.space)
-      intelFlushBatch( intel, GL_FALSE );
-}
-
-
-/**
- * Called via glFlush.
- */
-void intelglFlush( GLcontext *ctx )
-{
-   intelFlush(ctx);
-   intelCheckFrontRotate(ctx);
-}
-
-
-void intelFinish( GLcontext *ctx  ) 
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   intelFlush( ctx );
-   intelWaitForIdle( intel );
-   intelCheckFrontRotate(ctx);
-}
-
-
-void intelClear(GLcontext *ctx, GLbitfield mask)
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask);
-   GLbitfield tri_mask = 0;
-   GLbitfield blit_mask = 0;
-   GLbitfield swrast_mask = 0;
-
-   if (0)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   /* Take care of cliprects, which are handled differently for
-    * clears, etc.
-    */
-   intelFlush( &intel->ctx );
-
-   if (mask & BUFFER_BIT_FRONT_LEFT) {
-      if (colorMask == ~0) {
-	 blit_mask |= BUFFER_BIT_FRONT_LEFT;
-      } 
-      else {
-	 tri_mask |= BUFFER_BIT_FRONT_LEFT;
-      }
-   }
-
-   if (mask & BUFFER_BIT_BACK_LEFT) {
-      if (colorMask == ~0) {
-	 blit_mask |= BUFFER_BIT_BACK_LEFT;
-      } 
-      else {
-	 tri_mask |= BUFFER_BIT_BACK_LEFT;
-      }
-   }
-
-   if (mask & BUFFER_BIT_DEPTH) {
-      blit_mask |= BUFFER_BIT_DEPTH;
-   }
-
-   if (mask & BUFFER_BIT_STENCIL) {
-      if (!intel->hw_stencil) {
-	 swrast_mask |= BUFFER_BIT_STENCIL;
-      }
-      else if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
-	 tri_mask |= BUFFER_BIT_STENCIL;
-      } 
-      else {
-	 blit_mask |= BUFFER_BIT_STENCIL;
-      }
-   }
-
-   swrast_mask |= (mask & BUFFER_BIT_ACCUM);
-
-   if (blit_mask) 
-      intelClearWithBlit( ctx, blit_mask, 0, 0, 0, 0, 0);
-
-   if (tri_mask) 
-      intel->vtbl.clear_with_tris( intel, tri_mask, 0, 0, 0, 0, 0);
-
-   if (swrast_mask)
-      _swrast_Clear( ctx, swrast_mask );
-}
-
-
-void
-intelRotateWindow(intelContextPtr intel, __DRIdrawablePrivate *dPriv,
-                  GLuint srcBuffer)
-{
-   if (intel->vtbl.rotate_window) {
-      intel->vtbl.rotate_window(intel, dPriv, srcBuffer);
-   }
-}
-
-
-void *intelAllocateAGP( intelContextPtr intel, GLsizei size )
-{
-   int region_offset;
-   drmI830MemAlloc alloc;
-   int ret;
-
-   if (0)
-      fprintf(stderr, "%s: %d bytes\n", __FUNCTION__, size);
-
-   alloc.region = I830_MEM_REGION_AGP;
-   alloc.alignment = 0;
-   alloc.size = size;
-   alloc.region_offset = &region_offset;
-
-   LOCK_HARDWARE(intel);
-
-   /* Make sure the global heap is initialized
-    */
-   if (intel->texture_heaps[0])
-      driAgeTextures( intel->texture_heaps[0] );
-
-
-   ret = drmCommandWriteRead( intel->driFd,
-			      DRM_I830_ALLOC,
-			      &alloc, sizeof(alloc));
-   
-   if (ret) {
-      fprintf(stderr, "%s: DRM_I830_ALLOC ret %d\n", __FUNCTION__, ret);
-      UNLOCK_HARDWARE(intel);
-      return NULL;
-   }
-   
-   if (0)
-      fprintf(stderr, "%s: allocated %d bytes\n", __FUNCTION__, size);
-
-   /* Need to propogate this information (agp memory in use) to our
-    * local texture lru.  The kernel has already updated the global
-    * lru.  An alternative would have been to allocate memory the
-    * usual way and then notify the kernel to pin the allocation.
-    */
-   if (intel->texture_heaps[0])
-      driAgeTextures( intel->texture_heaps[0] );
-
-   UNLOCK_HARDWARE(intel);   
-
-   return (void *)((char *)intel->intelScreen->tex.map + region_offset);
-}
-
-void intelFreeAGP( intelContextPtr intel, void *pointer )
-{
-   int region_offset;
-   drmI830MemFree memfree;
-   int ret;
-
-   region_offset = (char *)pointer - (char *)intel->intelScreen->tex.map;
-
-   if (region_offset < 0 || 
-       region_offset > intel->intelScreen->tex.size) {
-      fprintf(stderr, "offset %d outside range 0..%d\n", region_offset,
-	      intel->intelScreen->tex.size);
-      return;
-   }
-
-   memfree.region = I830_MEM_REGION_AGP;
-   memfree.region_offset = region_offset;
-   
-   ret = drmCommandWrite( intel->driFd,
-			  DRM_I830_FREE,
-			  &memfree, sizeof(memfree));
-   
-   if (ret) 
-      fprintf(stderr, "%s: DRM_I830_FREE ret %d\n", __FUNCTION__, ret);
-}
-
-/* This version of AllocateMemoryMESA allocates only agp memory, and
- * only does so after the point at which the driver has been
- * initialized.
- *
- * Theoretically a valid context isn't required.  However, in this
- * implementation, it is, as I'm using the hardware lock to protect
- * the kernel data structures, and the current context to get the
- * device fd.
- */
-void *intelAllocateMemoryMESA(__DRInativeDisplay *dpy, int scrn,
-			      GLsizei size, GLfloat readfreq,
-			      GLfloat writefreq, GLfloat priority)
-{
-   GET_CURRENT_CONTEXT(ctx);
-
-   if (INTEL_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq, 
-	      writefreq, priority);
-
-   if (getenv("INTEL_NO_ALLOC"))
-      return NULL;
-   
-   if (!ctx || INTEL_CONTEXT(ctx) == 0) 
-      return NULL;
-   
-   return intelAllocateAGP( INTEL_CONTEXT(ctx), size );
-}
-
-
-/* Called via glXFreeMemoryMESA() */
-void intelFreeMemoryMESA(__DRInativeDisplay *dpy, int scrn, GLvoid *pointer)
-{
-   GET_CURRENT_CONTEXT(ctx);
-   if (INTEL_DEBUG & DEBUG_IOCTL) 
-      fprintf(stderr, "%s %p\n", __FUNCTION__, pointer);
-
-   if (!ctx || INTEL_CONTEXT(ctx) == 0) {
-      fprintf(stderr, "%s: no context\n", __FUNCTION__);
-      return;
-   }
-
-   intelFreeAGP( INTEL_CONTEXT(ctx), pointer );
-}
-
-/* Called via glXGetMemoryOffsetMESA() 
- *
- * Returns offset of pointer from the start of agp aperture.
- */
-GLuint intelGetMemoryOffsetMESA(__DRInativeDisplay *dpy, int scrn, 
-				const GLvoid *pointer)
-{
-   GET_CURRENT_CONTEXT(ctx);
-   intelContextPtr intel;
-
-   if (!ctx || !(intel = INTEL_CONTEXT(ctx)) ) {
-      fprintf(stderr, "%s: no context\n", __FUNCTION__);
-      return ~0;
-   }
-
-   if (!intelIsAgpMemory( intel, pointer, 0 ))
-      return ~0;
-
-   return intelAgpOffsetFromVirtual( intel, pointer );
-}
-
-
-GLboolean intelIsAgpMemory( intelContextPtr intel, const GLvoid *pointer,
-			   GLint size )
-{
-   int offset = (char *)pointer - (char *)intel->intelScreen->tex.map;
-   int valid = (size >= 0 &&
-		offset >= 0 &&
-		offset + size < intel->intelScreen->tex.size);
-
-   if (INTEL_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "intelIsAgpMemory( %p ) : %d\n", pointer, valid );
-   
-   return valid;
-}
-
-
-GLuint intelAgpOffsetFromVirtual( intelContextPtr intel, const GLvoid *pointer )
-{
-   int offset = (char *)pointer - (char *)intel->intelScreen->tex.map;
-
-   if (offset < 0 || offset > intel->intelScreen->tex.size)
-      return ~0;
-   else
-      return intel->intelScreen->tex.offset + offset;
-}
-
-
-
-
-
-/* Flip the front & back buffes
- */
-void intelPageFlip( const __DRIdrawablePrivate *dPriv )
-{
-#if 0
-   intelContextPtr intel;
-   int tmp, ret;
-
-   if (INTEL_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   assert(dPriv);
-   assert(dPriv->driContextPriv);
-   assert(dPriv->driContextPriv->driverPrivate);
-
-   intel = (intelContextPtr) dPriv->driContextPriv->driverPrivate;
-
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-
-   if (dPriv->pClipRects) {
-      *(drm_clip_rect_t *)intel->sarea->boxes = dPriv->pClipRects[0];
-      intel->sarea->nbox = 1;
-   }
-
-   ret = drmCommandNone(intel->driFd, DRM_I830_FLIP); 
-   if (ret) {
-      fprintf(stderr, "%s: %d\n", __FUNCTION__, ret);
-      UNLOCK_HARDWARE( intel );
-      exit(1);
-   }
-
-   tmp = intel->sarea->last_enqueue;
-   intelRefillBatchLocked( intel );
-   UNLOCK_HARDWARE( intel );
-
-
-   intelSetDrawBuffer( &intel->ctx, intel->ctx.Color.DriverDrawBuffer );
-#endif
-}
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.h b/src/mesa/drivers/dri/i915/intel_ioctl.h
deleted file mode 100644
index 8d79e9d73b4..00000000000
--- a/src/mesa/drivers/dri/i915/intel_ioctl.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_IOCTL_H
-#define INTEL_IOCTL_H
-
-#include "intel_context.h"
-
-extern void intelWaitAgeLocked( intelContextPtr intel, int age, GLboolean unlock );
-
-extern void intelClear(GLcontext *ctx, GLbitfield mask);
-
-extern void intelPageFlip( const __DRIdrawablePrivate *dpriv );
-
-extern void intelRotateWindow(intelContextPtr intel,
-                              __DRIdrawablePrivate *dPriv, GLuint srcBuffer);
-
-extern void intelWaitForIdle( intelContextPtr intel );
-extern void intelFlushBatch( intelContextPtr intel, GLboolean refill );
-extern void intelFlushBatchLocked( intelContextPtr intel,
-				   GLboolean ignore_cliprects,
-				   GLboolean refill,
-				   GLboolean allow_unlock);
-extern void intelRefillBatchLocked( intelContextPtr intel, GLboolean allow_unlock );
-extern void intelFinish( GLcontext *ctx );
-extern void intelFlush( GLcontext *ctx );
-extern void intelglFlush( GLcontext *ctx );
-
-extern void *intelAllocateAGP( intelContextPtr intel, GLsizei size );
-extern void intelFreeAGP( intelContextPtr intel, void *pointer );
-
-extern void *intelAllocateMemoryMESA( __DRInativeDisplay *dpy, int scrn, 
-				      GLsizei size, GLfloat readfreq,
-				      GLfloat writefreq, GLfloat priority );
-
-extern void intelFreeMemoryMESA( __DRInativeDisplay *dpy, int scrn, 
-				 GLvoid *pointer );
-
-extern GLuint intelGetMemoryOffsetMESA( __DRInativeDisplay *dpy, int scrn, const GLvoid *pointer );
-extern GLboolean intelIsAgpMemory( intelContextPtr intel, const GLvoid *pointer,
-				  GLint size );
-
-extern GLuint intelAgpOffsetFromVirtual( intelContextPtr intel, const GLvoid *p );
-
-extern void intelWaitIrq( intelContextPtr intel, int seq );
-extern uint32_t intelGetLastFrame (intelContextPtr intel);
-extern int intelEmitIrqLocked( intelContextPtr intel );
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
new file mode 120000
index 00000000000..242fed0b6ae
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -0,0 +1 @@
+../intel/intel_mipmap_tree.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_pixel.c b/src/mesa/drivers/dri/i915/intel_pixel.c
index c3030d42b04..d733c5e8745 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_pixel.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel.c
@@ -1,524 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "enums.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "swrast/swrast.h"
-
-#include "intel_screen.h"
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-
-
-
-static GLboolean
-check_color( const GLcontext *ctx, GLenum type, GLenum format,
-	     const struct gl_pixelstore_attrib *packing,
-	     const void *pixels, GLint sz, GLint pitch )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   GLuint cpp = intel->intelScreen->cpp;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (	(pitch & 63) ||
-	ctx->_ImageTransferState ||
-	packing->SwapBytes ||
-	packing->LsbFirst) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-	 fprintf(stderr, "%s: failed 1\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   if ( type == GL_UNSIGNED_INT_8_8_8_8_REV && 
-	cpp == 4 && 
-	format == GL_BGRA ) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-	 fprintf(stderr, "%s: passed 2\n", __FUNCTION__);
-      return GL_TRUE;
-   }
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s: failed\n", __FUNCTION__);
-
-   return GL_FALSE;
-}
-
-static GLboolean
-check_color_per_fragment_ops( const GLcontext *ctx )
-{
-   int result;
-   result = (!(     ctx->Color.AlphaEnabled || 
-		    ctx->Depth.Test ||
-		    ctx->Fog.Enabled ||
-		    ctx->Scissor.Enabled ||
-		    ctx->Stencil.Enabled ||
-		    !ctx->Color.ColorMask[0] ||
-		    !ctx->Color.ColorMask[1] ||
-		    !ctx->Color.ColorMask[2] ||
-		    !ctx->Color.ColorMask[3] ||
-		    ctx->Color.ColorLogicOpEnabled ||
-		    ctx->Texture._EnabledUnits
-           ) &&
-	   ctx->Current.RasterPosValid);
-   
-   return result;
-}
-
-
-/**
- * Clip the given rectangle against the buffer's bounds (including scissor).
- * \param size returns the 
- * \return GL_TRUE if any pixels remain, GL_FALSE if totally clipped.
- *
- * XXX Replace this with _mesa_clip_drawpixels() and _mesa_clip_readpixels()
- * from Mesa 6.4.  We shouldn't apply scissor for ReadPixels.
- */
-static GLboolean
-clip_pixelrect( const GLcontext *ctx,
-		const GLframebuffer *buffer,
-		GLint *x, GLint *y,
-		GLsizei *width, GLsizei *height)
-{
-   /* left clipping */
-   if (*x < buffer->_Xmin) {
-      *width -= (buffer->_Xmin - *x);
-      *x = buffer->_Xmin;
-   }
-
-   /* right clipping */
-   if (*x + *width > buffer->_Xmax)
-      *width -= (*x + *width - buffer->_Xmax - 1);
-
-   if (*width <= 0)
-      return GL_FALSE;
-
-   /* bottom clipping */
-   if (*y < buffer->_Ymin) {
-      *height -= (buffer->_Ymin - *y);
-      *y = buffer->_Ymin;
-   }
-
-   /* top clipping */
-   if (*y + *height > buffer->_Ymax)
-      *height -= (*y + *height - buffer->_Ymax - 1);
-
-   if (*height <= 0)
-      return GL_FALSE;
-
-   return GL_TRUE;
-}
-
-
-/**
- * Compute intersection of a clipping rectangle and pixel rectangle,
- * returning results in x/y/w/hOut vars.
- * \return GL_TRUE if there's intersection, GL_FALSE if disjoint.
- */
-static INLINE GLboolean
-intersect_region(const drm_clip_rect_t *box,
-		 GLint x, GLint y, GLsizei width, GLsizei height,
-		 GLint *xOut, GLint *yOut, GLint *wOut, GLint *hOut)
-{
-   GLint bx = box->x1;
-   GLint by = box->y1;
-   GLint bw = box->x2 - bx;
-   GLint bh = box->y2 - by;
-
-   if (bx < x) bw -= x - bx, bx = x;
-   if (by < y) bh -= y - by, by = y;
-   if (bx + bw > x + width) bw = x + width - bx;
-   if (by + bh > y + height) bh = y + height - by;
-
-   *xOut = bx;
-   *yOut = by;
-   *wOut = bw;
-   *hOut = bh;
-
-   if (bw <= 0) return GL_FALSE;
-   if (bh <= 0) return GL_FALSE;
-
-   return GL_TRUE;
-}
-
-
-
-static GLboolean
-intelTryReadPixels( GLcontext *ctx,
-		  GLint x, GLint y, GLsizei width, GLsizei height,
-		  GLenum format, GLenum type,
-		  const struct gl_pixelstore_attrib *pack,
-		  GLvoid *pixels )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   GLint size = 0; /* not really used */
-   GLint pitch = pack->RowLength ? pack->RowLength : width;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   /* Only accelerate reading to agp buffers.
-    */
-   if ( !intelIsAgpMemory(intel, pixels, 
-			pitch * height * intel->intelScreen->cpp ) ) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-	 fprintf(stderr, "%s: dest not agp\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   /* Need GL_PACK_INVERT_MESA to cope with upsidedown results from
-    * blitter:
-    */
-   if (!pack->Invert) {
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-	 fprintf(stderr, "%s: MESA_PACK_INVERT not set\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   if (!check_color(ctx, type, format, pack, pixels, size, pitch))
-      return GL_FALSE;
-
-   switch ( intel->intelScreen->cpp ) {
-   case 4:
-      break;
-   default:
-      return GL_FALSE;
-   }
-
-
-   /* Although the blits go on the command buffer, need to do this and
-    * fire with lock held to guarentee cliprects and drawing offset are
-    * correct.
-    *
-    * This is an unusual situation however, as the code which flushes
-    * a full command buffer expects to be called unlocked.  As a
-    * workaround, immediately flush the buffer on aquiring the lock.
-    */
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-   {
-      __DRIdrawablePrivate *dPriv = intel->driDrawable;
-      int nbox = dPriv->numClipRects;
-      int src_offset = intel->readRegion->offset;
-      int src_pitch = intel->intelScreen->front.pitch;
-      int dst_offset = intelAgpOffsetFromVirtual( intel, pixels);
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      int i;
-
-      assert(dst_offset != ~0);  /* should have been caught above */
-
-      if (!clip_pixelrect(ctx, ctx->ReadBuffer, &x, &y, &width, &height)) {
-	 UNLOCK_HARDWARE( intel );
-	 if (INTEL_DEBUG & DEBUG_PIXEL)
-	    fprintf(stderr, "%s totally clipped -- nothing to do\n",
-		    __FUNCTION__);
-	 return GL_TRUE;
-      }
-
-      /* convert to screen coords (y=0=top) */
-      y = dPriv->h - y - height;
-      x += dPriv->x;
-      y += dPriv->y;
-
-      if (INTEL_DEBUG & DEBUG_PIXEL)
-	 fprintf(stderr, "readpixel blit src_pitch %d dst_pitch %d\n",
-		 src_pitch, pitch);
-
-      /* We don't really have to do window clipping for readpixels.
-       * The OpenGL spec says that pixels read from outside the
-       * visible window region (pixel ownership) have undefined value.
-       */
-      for (i = 0 ; i < nbox ; i++)
-      {
-         GLint bx, by, bw, bh;
-         if (intersect_region(box+i, x, y, width, height,
-                              &bx, &by, &bw, &bh)) {
-            intelEmitCopyBlitLocked( intel,
-                                     intel->intelScreen->cpp,
-                                     src_pitch, src_offset,
-                                     pitch, dst_offset,
-                                     bx, by,
-                                     bx - x, by - y,
-                                     bw, bh );
-         }
-      }
-   }
-   UNLOCK_HARDWARE( intel );
-   intelFinish( &intel->ctx );
-
-   return GL_TRUE;
-}
-
-static void
-intelReadPixels( GLcontext *ctx,
-		 GLint x, GLint y, GLsizei width, GLsizei height,
-		 GLenum format, GLenum type,
-		 const struct gl_pixelstore_attrib *pack,
-		 GLvoid *pixels )
-{
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (!intelTryReadPixels( ctx, x, y, width, height, format, type, pack, 
-                            pixels))
-      _swrast_ReadPixels( ctx, x, y, width, height, format, type, pack, 
-			  pixels);
-}
-
-
-
-
-static void do_draw_pix( GLcontext *ctx,
-			 GLint x, GLint y, GLsizei width, GLsizei height,
-			 GLint pitch,
-			 const void *pixels,
-			 GLuint dest )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   drm_clip_rect_t *box = dPriv->pClipRects;
-   int nbox = dPriv->numClipRects;
-   int i;
-   int src_offset = intelAgpOffsetFromVirtual( intel, pixels);
-   int src_pitch = pitch;
-
-   assert(src_offset != ~0);  /* should be caught earlier */
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-   if (ctx->DrawBuffer)
-   {
-      y -= height;			/* cope with pixel zoom */
-   
-      if (!clip_pixelrect(ctx, ctx->DrawBuffer,
-			  &x, &y, &width, &height)) {
-	 UNLOCK_HARDWARE( intel );
-	 return;
-      }
-
-      y = dPriv->h - y - height; 	/* convert from gl to hardware coords */
-      x += dPriv->x;
-      y += dPriv->y;
-
-      for (i = 0 ; i < nbox ; i++ )
-      {
-	 GLint bx, by, bw, bh;
-	 if (intersect_region(box + i, x, y, width, height,
-			      &bx, &by, &bw, &bh)) {
-            intelEmitCopyBlitLocked( intel,
-                                     intel->intelScreen->cpp,
-                                     src_pitch, src_offset,
-                                     intel->intelScreen->front.pitch,
-                                     intel->drawRegion->offset,
-                                     bx - x, by - y,
-                                     bx, by,
-                                     bw, bh );
-         }
-      }
-   }
-   UNLOCK_HARDWARE( intel );
-   intelFinish( &intel->ctx );
-}
-
-
-
-static GLboolean
-intelTryDrawPixels( GLcontext *ctx,
-		  GLint x, GLint y, GLsizei width, GLsizei height,
-		  GLenum format, GLenum type,
-		  const struct gl_pixelstore_attrib *unpack,
-		  const GLvoid *pixels )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   GLint pitch = unpack->RowLength ? unpack->RowLength : width;
-   GLuint dest;
-   GLuint cpp = intel->intelScreen->cpp;
-   GLint size = width * pitch * cpp;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   switch (format) {
-   case GL_RGB:
-   case GL_RGBA:
-   case GL_BGRA:
-      dest = intel->drawRegion->offset;
-
-      /* Planemask doesn't have full support in blits.
-       */
-      if (!ctx->Color.ColorMask[RCOMP] ||
-	  !ctx->Color.ColorMask[GCOMP] ||
-	  !ctx->Color.ColorMask[BCOMP] ||
-	  !ctx->Color.ColorMask[ACOMP]) {
-	 if (INTEL_DEBUG & DEBUG_PIXEL)
-	    fprintf(stderr, "%s: planemask\n", __FUNCTION__);
-	 return GL_FALSE;	
-      }
-
-      /* Can't do conversions on agp reads/draws. 
-       */
-      if ( !intelIsAgpMemory( intel, pixels, size ) ) {
-	 if (INTEL_DEBUG & DEBUG_PIXEL)
-	    fprintf(stderr, "%s: not agp memory\n", __FUNCTION__);
-	 return GL_FALSE;
-      }
-
-      if (!check_color(ctx, type, format, unpack, pixels, size, pitch)) {
-	 return GL_FALSE;
-      }
-      if (!check_color_per_fragment_ops(ctx)) {
-	 return GL_FALSE;
-      }
-
-      if (ctx->Pixel.ZoomX != 1.0F ||
-	  ctx->Pixel.ZoomY != -1.0F)
-	 return GL_FALSE;
-      break;
-
-   default:
-      return GL_FALSE;
-   }
-
-   if ( intelIsAgpMemory(intel, pixels, size) )
-   {
-      do_draw_pix( ctx, x, y, width, height, pitch, pixels, dest );
-      return GL_TRUE;
-   }
-   else if (0)
-   {
-      /* Pixels is in regular memory -- get dma buffers and perform
-       * upload through them.  No point doing this for regular uploads
-       * but once we remove some of the restrictions above (colormask,
-       * pixelformat conversion, zoom?, etc), this could be a win.
-       */
-   }
-   else
-      return GL_FALSE;
-
-   return GL_FALSE;
-}
-
-static void
-intelDrawPixels( GLcontext *ctx,
-		 GLint x, GLint y, GLsizei width, GLsizei height,
-		 GLenum format, GLenum type,
-		 const struct gl_pixelstore_attrib *unpack,
-		 const GLvoid *pixels )
-{
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (intelTryDrawPixels( ctx, x, y, width, height, format, type,
-                           unpack, pixels ))
-      return;
-
-   if (ctx->FragmentProgram._Current == ctx->FragmentProgram._TexEnvProgram) {
-      /*
-       * We don't want the i915 texenv program to be applied to DrawPixels.
-       * This is really just a performance optimization (mesa will other-
-       * wise happily run the fragment program on each pixel in the image).
-       */
-      struct gl_fragment_program *fpSave = ctx->FragmentProgram._Current;
-   /* can't just set current frag prog to 0 here as on buffer resize
-      we'll get new state checks which will segfault. Remains a hack. */
-      ctx->FragmentProgram._Current = NULL;
-      ctx->FragmentProgram._UseTexEnvProgram = GL_FALSE;
-      ctx->FragmentProgram._Active = GL_FALSE;
-      _swrast_DrawPixels( ctx, x, y, width, height, format, type,
-                          unpack, pixels );
-      ctx->FragmentProgram._Current = fpSave;
-      ctx->FragmentProgram._UseTexEnvProgram = GL_TRUE;
-      ctx->FragmentProgram._Active = GL_TRUE;
-   }
-   else {
-      _swrast_DrawPixels( ctx, x, y, width, height, format, type,
-                          unpack, pixels );
-   }
-}
-
-
-
-
-/**
- * Implement glCopyPixels for the front color buffer (or back buffer Pixmap)
- * for the color buffer.  Don't support zooming, pixel transfer, etc.
- * We do support copying from one window to another, ala glXMakeCurrentRead.
- */
-static void
-intelCopyPixels( GLcontext *ctx,
-		 GLint srcx, GLint srcy, GLsizei width, GLsizei height,
-		 GLint destx, GLint desty, GLenum type )
-{
-#if 0
-   const XMesaContext xmesa = XMESA_CONTEXT(ctx);
-   const SWcontext *swrast = SWRAST_CONTEXT( ctx );
-   XMesaDisplay *dpy = xmesa->xm_visual->display;
-   const XMesaDrawable drawBuffer = xmesa->xm_draw_buffer->buffer;
-   const XMesaDrawable readBuffer = xmesa->xm_read_buffer->buffer;
-   const XMesaGC gc = xmesa->xm_draw_buffer->gc;
-
-   ASSERT(dpy);
-   ASSERT(gc);
-
-   if (drawBuffer &&  /* buffer != 0 means it's a Window or Pixmap */
-       readBuffer &&
-       type == GL_COLOR &&
-       (swrast->_RasterMask & ~CLIP_BIT) == 0 && /* no blend, z-test, etc */
-       ctx->_ImageTransferState == 0 &&  /* no color tables, scale/bias, etc */
-       ctx->Pixel.ZoomX == 1.0 &&        /* no zooming */
-       ctx->Pixel.ZoomY == 1.0) {
-      /* Note: we don't do any special clipping work here.  We could,
-       * but X will do it for us.
-       */
-      srcy = FLIP(xmesa->xm_read_buffer, srcy) - height + 1;
-      desty = FLIP(xmesa->xm_draw_buffer, desty) - height + 1;
-      XCopyArea(dpy, readBuffer, drawBuffer, gc,
-                srcx, srcy, width, height, destx, desty);
-   }
-#else
-   _swrast_CopyPixels(ctx, srcx, srcy, width, height, destx, desty, type );
-#endif
-}
-
-
-
-
-void intelInitPixelFuncs( struct dd_function_table *functions )
-{
-   functions->CopyPixels = intelCopyPixels;
-   if (!getenv("INTEL_NO_BLITS")) {
-      functions->ReadPixels = intelReadPixels;  
-      functions->DrawPixels = intelDrawPixels; 
-   }
-}
+../intel/intel_pixel.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c
new file mode 120000
index 00000000000..9085c7b0397
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c
@@ -0,0 +1 @@
+../intel/intel_pixel_bitmap.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_copy.c b/src/mesa/drivers/dri/i915/intel_pixel_copy.c
new file mode 120000
index 00000000000..ee433605904
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_pixel_copy.c
@@ -0,0 +1 @@
+../intel/intel_pixel_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_draw.c b/src/mesa/drivers/dri/i915/intel_pixel_draw.c
new file mode 120000
index 00000000000..8431a24edfc
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_pixel_draw.c
@@ -0,0 +1 @@
+../intel/intel_pixel_draw.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_read.c b/src/mesa/drivers/dri/i915/intel_pixel_read.c
new file mode 100644
index 00000000000..56087aacd4e
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_pixel_read.c
@@ -0,0 +1,306 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/image.h"
+#include "main/bufferobj.h"
+#include "swrast/swrast.h"
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_blit.h"
+#include "intel_buffers.h"
+#include "intel_regions.h"
+#include "intel_pixel.h"
+#include "intel_buffer_objects.h"
+
+/* For many applications, the new ability to pull the source buffers
+ * back out of the GTT and then do the packing/conversion operations
+ * in software will be as much of an improvement as trying to get the
+ * blitter and/or texture engine to do the work. 
+ *
+ * This step is gated on private backbuffers.
+ * 
+ * Obviously the frontbuffer can't be pulled back, so that is either
+ * an argument for blit/texture readpixels, or for blitting to a
+ * temporary and then pulling that back.
+ *
+ * When the destination is a pbo, however, it's not clear if it is
+ * ever going to be pulled to main memory (though the access param
+ * will be a good hint).  So it sounds like we do want to be able to
+ * choose between blit/texture implementation on the gpu and pullback
+ * and cpu-based copying.
+ *
+ * Unless you can magically turn client memory into a PBO for the
+ * duration of this call, there will be a cpu-based copying step in
+ * any case.
+ */
+
+
+static GLboolean
+do_texture_readpixels(GLcontext * ctx,
+                      GLint x, GLint y, GLsizei width, GLsizei height,
+                      GLenum format, GLenum type,
+                      const struct gl_pixelstore_attrib *pack,
+                      struct intel_region *dest_region)
+{
+#if 0
+   struct intel_context *intel = intel_context(ctx);
+   intelScreenPrivate *screen = intel->intelScreen;
+   GLint pitch = pack->RowLength ? pack->RowLength : width;
+   __DRIdrawablePrivate *dPriv = intel->driDrawable;
+   int textureFormat;
+   GLenum glTextureFormat;
+   int destFormat, depthFormat, destPitch;
+   drm_clip_rect_t tmp;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      fprintf(stderr, "%s\n", __FUNCTION__);
+
+
+   if (ctx->_ImageTransferState ||
+       pack->SwapBytes || pack->LsbFirst || !pack->Invert) {
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         fprintf(stderr, "%s: check_color failed\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   intel->vtbl.meta_texrect_source(intel, intel_readbuf_region(intel));
+
+   if (!intel->vtbl.meta_render_dest(intel, dest_region, type, format)) {
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         fprintf(stderr, "%s: couldn't set dest %s/%s\n",
+                 __FUNCTION__,
+                 _mesa_lookup_enum_by_nr(type),
+                 _mesa_lookup_enum_by_nr(format));
+      return GL_FALSE;
+   }
+
+   LOCK_HARDWARE(intel);
+
+   if (intel->driDrawable->numClipRects) {
+      intel->vtbl.install_meta_state(intel);
+      intel->vtbl.meta_no_depth_write(intel);
+      intel->vtbl.meta_no_stencil_write(intel);
+
+      if (!driClipRectToFramebuffer(ctx->ReadBuffer, &x, &y, &width, &height)) {
+         UNLOCK_HARDWARE(intel);
+         SET_STATE(i830, state);
+         if (INTEL_DEBUG & DEBUG_PIXEL)
+            fprintf(stderr, "%s: cliprect failed\n", __FUNCTION__);
+         return GL_TRUE;
+      }
+
+      y = dPriv->h - y - height;
+      x += dPriv->x;
+      y += dPriv->y;
+
+
+      /* Set the frontbuffer up as a large rectangular texture.
+       */
+      intel->vtbl.meta_tex_rect_source(intel, src_region, textureFormat);
+
+
+      intel->vtbl.meta_texture_blend_replace(i830, glTextureFormat);
+
+
+      /* Set the 3d engine to draw into the destination region:
+       */
+
+      intel->vtbl.meta_draw_region(intel, dest_region);
+      intel->vtbl.meta_draw_format(intel, destFormat, depthFormat);     /* ?? */
+
+
+      /* Draw a single quad, no cliprects:
+       */
+      intel->vtbl.meta_disable_cliprects(intel);
+
+      intel->vtbl.draw_quad(intel,
+                            0, width, 0, height,
+                            0x00ff00ff, x, x + width, y, y + height);
+
+      intel->vtbl.leave_meta_state(intel);
+   }
+   UNLOCK_HARDWARE(intel);
+
+   intel_region_wait_fence(ctx, dest_region);   /* required by GL */
+   return GL_TRUE;
+#endif
+
+   return GL_FALSE;
+}
+
+
+
+
+static GLboolean
+do_blit_readpixels(GLcontext * ctx,
+                   GLint x, GLint y, GLsizei width, GLsizei height,
+                   GLenum format, GLenum type,
+                   const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_region *src = intel_readbuf_region(intel);
+   struct intel_buffer_object *dst = intel_buffer_object(pack->BufferObj);
+   GLuint dst_offset;
+   GLuint rowLength;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s\n", __FUNCTION__);
+
+   if (!src)
+      return GL_FALSE;
+
+   if (dst) {
+      /* XXX This validation should be done by core mesa:
+       */
+      if (!_mesa_validate_pbo_access(2, pack, width, height, 1,
+                                     format, type, pixels)) {
+         _mesa_error(ctx, GL_INVALID_OPERATION, "glDrawPixels");
+         return GL_TRUE;
+      }
+   }
+   else {
+      /* PBO only for now:
+       */
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         _mesa_printf("%s - not PBO\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+
+   if (ctx->_ImageTransferState ||
+       !intel_check_blit_format(src, format, type)) {
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         _mesa_printf("%s - bad format for blit\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   if (pack->Alignment != 1 || pack->SwapBytes || pack->LsbFirst) {
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         _mesa_printf("%s: bad packing params\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   if (pack->RowLength > 0)
+      rowLength = pack->RowLength;
+   else
+      rowLength = width;
+
+   if (pack->Invert) {
+      if (INTEL_DEBUG & DEBUG_PIXEL)
+         _mesa_printf("%s: MESA_PACK_INVERT not done yet\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+   else {
+      rowLength = -rowLength;
+   }
+
+   /* XXX 64-bit cast? */
+   dst_offset = (GLuint) _mesa_image_address(2, pack, pixels, width, height,
+                                             format, type, 0, 0, 0);
+
+
+   /* Although the blits go on the command buffer, need to do this and
+    * fire with lock held to guarentee cliprects are correct.
+    */
+   intelFlush(&intel->ctx);
+   LOCK_HARDWARE(intel);
+
+   if (intel->driDrawable->numClipRects) {
+      GLboolean all = (width * height * src->cpp == dst->Base.Size &&
+                       x == 0 && dst_offset == 0);
+
+      dri_bo *dst_buffer = intel_bufferobj_buffer(intel, dst,
+						  all ? INTEL_WRITE_FULL :
+						  INTEL_WRITE_PART);
+      __DRIdrawablePrivate *dPriv = intel->driDrawable;
+      int nbox = dPriv->numClipRects;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t rect;
+      drm_clip_rect_t src_rect;
+      int i;
+
+      src_rect.x1 = dPriv->x + x;
+      src_rect.y1 = dPriv->y + dPriv->h - (y + height);
+      src_rect.x2 = src_rect.x1 + width;
+      src_rect.y2 = src_rect.y1 + height;
+
+
+
+      for (i = 0; i < nbox; i++) {
+         if (!intel_intersect_cliprects(&rect, &src_rect, &box[i]))
+            continue;
+
+         intelEmitCopyBlit(intel,
+                           src->cpp,
+                           src->pitch, src->buffer, 0, src->tiling,
+                           rowLength, dst_buffer, dst_offset, GL_FALSE,
+                           rect.x1,
+                           rect.y1,
+                           rect.x1 - src_rect.x1,
+                           rect.y2 - src_rect.y2,
+                           rect.x2 - rect.x1, rect.y2 - rect.y1,
+			   GL_COPY);
+      }
+   }
+   UNLOCK_HARDWARE(intel);
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s - DONE\n", __FUNCTION__);
+
+   return GL_TRUE;
+}
+
+void
+intelReadPixels(GLcontext * ctx,
+                GLint x, GLint y, GLsizei width, GLsizei height,
+                GLenum format, GLenum type,
+                const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
+{
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      fprintf(stderr, "%s\n", __FUNCTION__);
+
+   intelFlush(ctx);
+
+   if (do_blit_readpixels
+       (ctx, x, y, width, height, format, type, pack, pixels))
+      return;
+
+   if (do_texture_readpixels
+       (ctx, x, y, width, height, format, type, pack, pixels))
+      return;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s: fallback to swrast\n", __FUNCTION__);
+
+   _swrast_ReadPixels(ctx, x, y, width, height, format, type, pack, pixels);
+}
diff --git a/src/mesa/drivers/dri/i915/intel_reg.h b/src/mesa/drivers/dri/i915/intel_reg.h
deleted file mode 100644
index 1ec153266c7..00000000000
--- a/src/mesa/drivers/dri/i915/intel_reg.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#ifndef _INTEL_REG_H_
-#define _INTEL_REG_H_
-
-
-
-#define CMD_3D (0x3<<29)
-
-
-#define _3DPRIMITIVE         ((0x3<<29)|(0x1f<<24))
-#define PRIM_INDIRECT            (1<<23)
-#define PRIM_INLINE              (0<<23)
-#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
-#define PRIM_INDIRECT_ELTS       (1<<17)
-
-#define PRIM3D_TRILIST		(0x0<<18)
-#define PRIM3D_TRISTRIP 	(0x1<<18)
-#define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
-#define PRIM3D_TRIFAN		(0x3<<18)
-#define PRIM3D_POLY		(0x4<<18)
-#define PRIM3D_LINELIST 	(0x5<<18)
-#define PRIM3D_LINESTRIP	(0x6<<18)
-#define PRIM3D_RECTLIST 	(0x7<<18)
-#define PRIM3D_POINTLIST	(0x8<<18)
-#define PRIM3D_DIB		(0x9<<18)
-#define PRIM3D_MASK		(0x1f<<18)
-
-#define I915PACKCOLOR4444(r,g,b,a) \
-  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define I915PACKCOLOR1555(r,g,b,a) \
-  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
-    ((a) ? 0x8000 : 0))
-
-#define I915PACKCOLOR565(r,g,b) \
-  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define I915PACKCOLOR8888(r,g,b,a) \
-  ((a<<24) | (r<<16) | (g<<8) | b)
-
-
-
-
-#define BR00_BITBLT_CLIENT   0x40000000
-#define BR00_OP_COLOR_BLT    0x10000000
-#define BR00_OP_SRC_COPY_BLT 0x10C00000
-#define BR13_SOLID_PATTERN   0x80000000
-
-#define XY_COLOR_BLT_CMD		((2<<29)|(0x50<<22)|0x4)
-#define XY_COLOR_BLT_WRITE_ALPHA	(1<<21)
-#define XY_COLOR_BLT_WRITE_RGB		(1<<20)
-
-#define XY_SRC_COPY_BLT_CMD             ((2<<29)|(0x53<<22)|6)
-#define XY_SRC_COPY_BLT_WRITE_ALPHA     (1<<21)
-#define XY_SRC_COPY_BLT_WRITE_RGB       (1<<20)
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c
new file mode 120000
index 00000000000..89b2f15c10f
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_regions.c
@@ -0,0 +1 @@
+../intel/intel_regions.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c
index d9438ba0fd8..410052b3c2b 100644
--- a/src/mesa/drivers/dri/i915/intel_render.c
+++ b/src/mesa/drivers/dri/i915/intel_render.c
@@ -30,15 +30,16 @@
  * dma buffers.  Use strip/fan hardware acceleration where possible.
  *
  */
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
 
 #include "tnl/t_context.h"
 #include "tnl/t_vertex.h"
+#include "tnl/t_pipeline.h"
 
 #include "intel_screen.h"
 #include "intel_context.h"
@@ -51,14 +52,14 @@
  * dma buffers.  Use strip/fan hardware primitives where possible.
  * Try to simulate missing primitives with indexed vertices.
  */
-#define HAVE_POINTS      0  /* Has it, but can't use because subpixel has to
-			     * be adjusted for points on the INTEL/I845G
-			     */
+#define HAVE_POINTS      0      /* Has it, but can't use because subpixel has to
+                                 * be adjusted for points on the INTEL/I845G
+                                 */
 #define HAVE_LINES       1
 #define HAVE_LINE_STRIPS 1
 #define HAVE_TRIANGLES   1
 #define HAVE_TRI_STRIPS  1
-#define HAVE_TRI_STRIP_1 0  /* has it, template can't use it yet */
+#define HAVE_TRI_STRIP_1 0      /* has it, template can't use it yet */
 #define HAVE_TRI_FANS    1
 #define HAVE_POLYGONS    1
 #define HAVE_QUADS       0
@@ -66,7 +67,7 @@
 
 #define HAVE_ELTS        0
 
-static GLuint hw_prim[GL_POLYGON+1] = {
+static uint32_t hw_prim[GL_POLYGON + 1] = {
    0,
    PRIM3D_LINELIST,
    PRIM3D_LINESTRIP,
@@ -79,7 +80,7 @@ static GLuint hw_prim[GL_POLYGON+1] = {
    PRIM3D_POLY
 };
 
-static const GLenum reduced_prim[GL_POLYGON+1] = {  
+static const GLenum reduced_prim[GL_POLYGON + 1] = {
    GL_POINTS,
    GL_LINES,
    GL_LINES,
@@ -92,58 +93,79 @@ static const GLenum reduced_prim[GL_POLYGON+1] = {
    GL_TRIANGLES
 };
 
-static const int scale_prim[GL_POLYGON+1] = {  
-   0,				/* fallback case */
+static const int scale_prim[GL_POLYGON + 1] = {
+   0,                           /* fallback case */
    1,
    2,
    2,
    1,
    3,
    3,
-   0,				/* fallback case */
-   0,				/* fallback case */
+   0,                           /* fallback case */
+   0,                           /* fallback case */
    3
 };
 
 
-static void intelDmaPrimitive( intelContextPtr intel, GLenum prim )
+static void
+intelDmaPrimitive(struct intel_context *intel, GLenum prim)
 {
-   if (0) fprintf(stderr, "%s %s\n", __FUNCTION__, _mesa_lookup_enum_by_nr(prim));
+   if (0)
+      fprintf(stderr, "%s %s\n", __FUNCTION__, _mesa_lookup_enum_by_nr(prim));
    INTEL_FIREVERTICES(intel);
-   intel->vtbl.reduced_primitive_state( intel, reduced_prim[prim] );
-   intelStartInlinePrimitive( intel, hw_prim[prim] );
+   intel->vtbl.reduced_primitive_state(intel, reduced_prim[prim]);
+   intel_set_prim(intel, hw_prim[prim]);
+}
+
+static inline GLuint intel_get_vb_max(struct intel_context *intel)
+{
+   GLuint ret;
+
+   if (intel->intelScreen->no_vbo)
+      ret = intel->batch->size - 1500;
+   else
+      ret = INTEL_VB_SIZE;
+   ret /= (intel->vertex_size * 4);
+   return ret;
 }
 
+static inline GLuint intel_get_current_max(struct intel_context *intel)
+{
 
-#define LOCAL_VARS intelContextPtr intel = INTEL_CONTEXT(ctx)
+   if (intel->intelScreen->no_vbo)
+      return intel_get_vb_max(intel);
+   else
+      return (INTEL_VB_SIZE - intel->prim.current_offset) / (intel->vertex_size * 4);
+}
+
+#define LOCAL_VARS struct intel_context *intel = intel_context(ctx)
 #define INIT( prim ) 				\
 do {						\
    intelDmaPrimitive( intel, prim );		\
 } while (0)
-#define FLUSH()  INTEL_FIREVERTICES( intel )
 
-#define GET_SUBSEQUENT_VB_MAX_VERTS() \
-  (((intel->alloc.size / 2) - 1500) / (intel->vertex_size*4))
-#define GET_CURRENT_VB_MAX_VERTS() GET_SUBSEQUENT_VB_MAX_VERTS()
+#define FLUSH() INTEL_FIREVERTICES(intel)
+
+#define GET_SUBSEQUENT_VB_MAX_VERTS() intel_get_vb_max(intel)
+#define GET_CURRENT_VB_MAX_VERTS() intel_get_current_max(intel)
+
+#define ALLOC_VERTS(nr) intel_get_prim_space(intel, nr)
 
-#define ALLOC_VERTS( nr ) \
-   intelExtendInlinePrimitive( intel, (nr) * intel->vertex_size )
-  
 #define EMIT_VERTS( ctx, j, nr, buf ) \
-  _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf )  
+  _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf )
 
 #define TAG(x) intel_##x
 #include "tnl_dd/t_dd_dmatmp.h"
-  
-  
+
+
 /**********************************************************************/
 /*                          Render pipeline stage                     */
 /**********************************************************************/
 
 /* Heuristic to choose between the two render paths:  
  */
-static GLboolean choose_render( intelContextPtr intel,
-				struct vertex_buffer *VB )
+static GLboolean
+choose_render(struct intel_context *intel, struct vertex_buffer *VB)
 {
    int vertsz = intel->vertex_size;
    int cost_render = 0;
@@ -153,20 +175,20 @@ static GLboolean choose_render( intelContextPtr intel,
    int nr_rverts = 0;
    int rprim = intel->reduced_primitive;
    int i = 0;
-   
-   for (i = 0 ; i < VB->PrimitiveCount ; i++) {
+
+   for (i = 0; i < VB->PrimitiveCount; i++) {
       GLuint prim = VB->Primitive[i].mode;
       GLuint length = VB->Primitive[i].count;
 
       if (!length)
-	 continue;
+         continue;
 
       nr_prims++;
       nr_rverts += length * scale_prim[prim & PRIM_MODE_MASK];
 
       if (reduced_prim[prim & PRIM_MODE_MASK] != rprim) {
-	 nr_rprims++;
-	 rprim = reduced_prim[prim & PRIM_MODE_MASK];
+         nr_rprims++;
+         rprim = reduced_prim[prim & PRIM_MODE_MASK];
       }
    }
 
@@ -177,64 +199,82 @@ static GLboolean choose_render( intelContextPtr intel,
 
    /* One point for every 1024 dwords (4k) of dma:
     */
-   cost_render += (vertsz * i) / 1024; 
-   cost_fallback += (vertsz * nr_rverts) / 1024; 
+   cost_render += (vertsz * i) / 1024;
+   cost_fallback += (vertsz * nr_rverts) / 1024;
 
    if (0)
       fprintf(stderr, "cost render: %d fallback: %d\n",
-	      cost_render, cost_fallback);
+              cost_render, cost_fallback);
 
-   if (cost_render > cost_fallback) 
+   if (cost_render > cost_fallback)
       return GL_FALSE;
 
    return GL_TRUE;
 }
 
 
-static GLboolean intel_run_render( GLcontext *ctx, 
-				 struct tnl_pipeline_stage *stage )
+static GLboolean
+intel_run_render(GLcontext * ctx, struct tnl_pipeline_stage *stage)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    struct vertex_buffer *VB = &tnl->vb;
    GLuint i;
 
+   intel->vtbl.render_prevalidate( intel );
+
    /* Don't handle clipping or indexed vertices.
     */
-   if (intel->RenderIndex != 0 || 
-       !intel_validate_render( ctx, VB ) || 
-       !choose_render( intel, VB )) {
+   if (intel->RenderIndex != 0 ||
+       !intel_validate_render(ctx, VB) || !choose_render(intel, VB)) {
       return GL_TRUE;
    }
 
    tnl->clipspace.new_inputs |= VERT_BIT_POS;
 
-   tnl->Driver.Render.Start( ctx );
-   
-   for (i = 0 ; i < VB->PrimitiveCount ; i++)
-   {
-      GLuint prim = VB->Primitive[i].mode;
+   tnl->Driver.Render.Start(ctx);
+
+   for (i = 0; i < VB->PrimitiveCount; i++) {
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
       if (!length)
-	 continue;
+         continue;
 
-      intel_render_tab_verts[prim & PRIM_MODE_MASK]( ctx, start, start + length,
-						     prim );
+      intel_render_tab_verts[prim & PRIM_MODE_MASK] (ctx, start,
+                                                     start + length, prim);
    }
-      
-   tnl->Driver.Render.Finish( ctx );
 
-   return GL_FALSE;     /* finished the pipe */
+   tnl->Driver.Render.Finish(ctx);
+
+   INTEL_FIREVERTICES(intel);
+
+   return GL_FALSE;             /* finished the pipe */
 }
 
-const struct tnl_pipeline_stage _intel_render_stage =
-{
+static const struct tnl_pipeline_stage _intel_render_stage = {
    "intel render",
    NULL,
    NULL,
    NULL,
    NULL,
-   intel_run_render	/* run */
+   intel_run_render             /* run */
+};
+
+const struct tnl_pipeline_stage *intel_pipeline[] = {
+   &_tnl_vertex_transform_stage,
+   &_tnl_vertex_cull_stage,
+   &_tnl_normal_transform_stage,
+   &_tnl_lighting_stage,
+   &_tnl_fog_coordinate_stage,
+   &_tnl_texgen_stage,
+   &_tnl_texture_transform_stage,
+   &_tnl_point_attenuation_stage,
+   &_tnl_vertex_program_stage,
+#if 1
+   &_intel_render_stage,        /* ADD: unclipped rastersetup-to-dma */
+#endif
+   &_tnl_render_stage,
+   0,
 };
diff --git a/src/mesa/drivers/dri/i915/intel_rotate.c b/src/mesa/drivers/dri/i915/intel_rotate.c
deleted file mode 100644
index a77640ee54d..00000000000
--- a/src/mesa/drivers/dri/i915/intel_rotate.c
+++ /dev/null
@@ -1,221 +0,0 @@
-
-/**
- * Routines for simple 2D->2D transformations for rotated, flipped screens.
- *
- * XXX This code is not intel-specific.  Move it into a common/utility
- * someday.
- */
-
-#include "intel_rotate.h"
-
-#define MIN2(A, B)   ( ((A) < (B)) ? (A) : (B) )
-
-#define ABS(A)  ( ((A) < 0) ? -(A) : (A) )
-
-
-void
-matrix23Set(struct matrix23 *m,
-            int m00, int m01, int m02,
-            int m10, int m11, int m12)
-{
-   m->m00 = m00;   m->m01 = m01;   m->m02 = m02;
-   m->m10 = m10;   m->m11 = m11;   m->m12 = m12;
-}
-
-
-/*
- * Transform (x,y) coordinate by the given matrix.
- */
-void
-matrix23TransformCoordf(const struct matrix23 *m, float *x, float *y)
-{
-   const float x0 = *x;
-   const float y0 = *y;
-
-   *x = m->m00 * x0 + m->m01 * y0 + m->m02;
-   *y = m->m10 * x0 + m->m11 * y0 + m->m12;
-}
-
-
-void
-matrix23TransformCoordi(const struct matrix23 *m, int *x, int *y)
-{
-   const int x0 = *x;
-   const int y0 = *y;
-
-   *x = m->m00 * x0 + m->m01 * y0 + m->m02;
-   *y = m->m10 * x0 + m->m11 * y0 + m->m12;
-}
-
-
-/*
- * Transform a width and height by the given matrix.
- * XXX this could be optimized quite a bit.
- */
-void
-matrix23TransformDistance(const struct matrix23 *m, int *xDist, int *yDist)
-{
-   int x0 = 0, y0 = 0;
-   int x1 = *xDist, y1 = 0;
-   int x2 = 0, y2 = *yDist;
-   matrix23TransformCoordi(m, &x0, &y0);
-   matrix23TransformCoordi(m, &x1, &y1);
-   matrix23TransformCoordi(m, &x2, &y2);
-
-   *xDist = (x1 - x0) + (x2 - x0);
-   *yDist = (y1 - y0) + (y2 - y0);
-
-   if (*xDist < 0)
-       *xDist = -*xDist;
-   if (*yDist < 0)
-       *yDist = -*yDist;
-}
-
-
-/**
- * Transform the rect defined by (x, y, w, h) by m.
- */
-void
-matrix23TransformRect(const struct matrix23 *m, int *x, int *y, int *w, int *h)
-{
-   int x0 = *x, y0 = *y;
-   int x1 = *x + *w, y1 = *y;
-   int x2 = *x + *w, y2 = *y + *h;
-   int x3 = *x, y3 = *y + *h;
-   matrix23TransformCoordi(m, &x0, &y0);
-   matrix23TransformCoordi(m, &x1, &y1);
-   matrix23TransformCoordi(m, &x2, &y2);
-   matrix23TransformCoordi(m, &x3, &y3);
-   *w = ABS(x1 - x0) + ABS(x2 - x1);
-   /**w = ABS(*w);*/
-   *h = ABS(y1 - y0) + ABS(y2 - y1);
-   /**h = ABS(*h);*/
-   *x = MIN2(x0, x1);
-   *x = MIN2(*x, x2);
-   *y = MIN2(y0, y1);
-   *y = MIN2(*y, y2);
-}
-
-
-/*
- * Make rotation matrix for width X height screen.
- */
-void
-matrix23Rotate(struct matrix23 *m, int width, int height, int angle)
-{
-   switch (angle) {
-   case 0:
-      matrix23Set(m, 1, 0, 0, 0, 1, 0);
-      break;
-   case 90:
-      matrix23Set(m, 0, 1, 0,  -1, 0, width);
-      break;
-   case 180:
-      matrix23Set(m, -1, 0, width,  0, -1, height);
-      break;
-   case 270:
-      matrix23Set(m, 0, -1, height,  1, 0, 0);
-      break;
-   default:
-      /*abort()*/;
-   }
-}
-
-
-/*
- * Make flip/reflection matrix for width X height screen.
- */
-void
-matrix23Flip(struct matrix23 *m, int width, int height, int xflip, int yflip)
-{
-   if (xflip) {
-      m->m00 = -1;  m->m01 = 0;   m->m02 = width - 1;
-   }
-   else {
-      m->m00 = 1;   m->m01 = 0;   m->m02 = 0;
-   }
-   if (yflip) {
-      m->m10 = 0;   m->m11 = -1;  m->m12 = height - 1;
-   }
-   else {
-      m->m10 = 0;   m->m11 = 1;   m->m12 = 0;
-   }
-}
-
-
-/*
- * result = a * b
- */
-void
-matrix23Multiply(struct matrix23 *result,
-                 const struct matrix23 *a, const struct matrix23 *b)
-{
-   result->m00 = a->m00 * b->m00 + a->m01 * b->m10;
-   result->m01 = a->m00 * b->m01 + a->m01 * b->m11;
-   result->m02 = a->m00 * b->m02 + a->m01 * b->m12 + a->m02;
-
-   result->m10 = a->m10 * b->m00 + a->m11 * b->m10;
-   result->m11 = a->m10 * b->m01 + a->m11 * b->m11;
-   result->m12 = a->m10 * b->m02 + a->m11 * b->m12 + a->m12;
-}
-
-
-#if 000
-
-#include <stdio.h>
-
-int
-main(int argc, char *argv[])
-{
-   int width = 500, height = 400;
-   int rot;
-   int fx = 0, fy = 0;  /* flip x and/or y ? */
-   int coords[4][2];
-
-   /* four corner coords to test with */
-   coords[0][0] = 0;  coords[0][1] = 0;
-   coords[1][0] = width-1;  coords[1][1] = 0;
-   coords[2][0] = width-1;  coords[2][1] = height-1;
-   coords[3][0] = 0;  coords[3][1] = height-1;
-
-
-   for (rot = 0; rot < 360; rot += 90) {
-      struct matrix23 rotate, flip, m;
-      int i;
-
-      printf("Rot %d, xFlip %d, yFlip %d:\n", rot, fx, fy);
-
-      /* make transformation matrix 'm' */
-      matrix23Rotate(&rotate, width, height, rot);
-      matrix23Flip(&flip, width, height, fx, fy);
-      matrix23Multiply(&m, &rotate, &flip);
-
-      /* xform four coords */
-      for (i = 0; i < 4; i++) {
-         int x = coords[i][0];
-         int y = coords[i][1];
-         matrix23TransformCoordi(&m, &x, &y);
-         printf("  %d, %d  -> %d %d\n", coords[i][0], coords[i][1], x, y);
-      }
-
-      /* xform width, height */
-      {
-         int x = width;
-         int y = height;
-         matrix23TransformDistance(&m, &x, &y);
-         printf("  %d x %d -> %d x %d\n", width, height, x, y);
-      }
-
-      /* xform rect */
-      {
-         int x = 50, y = 10, w = 200, h = 100;
-         matrix23TransformRect(&m, &x, &y, &w, &h);
-         printf("  %d,%d %d x %d -> %d, %d %d x %d\n", 50, 10, 200, 100,
-                x, y, w, h);
-      }
-
-   }
-
-   return 0;
-}
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_rotate.h b/src/mesa/drivers/dri/i915/intel_rotate.h
deleted file mode 100644
index 0da45d20ce5..00000000000
--- a/src/mesa/drivers/dri/i915/intel_rotate.h
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef INTEL_ROTATE_H
-#define INTEL_ROTATE_H 1
-
-struct matrix23
-{
-   int m00, m01, m02;
-   int m10, m11, m12;
-};
-
-
-
-extern void
-matrix23Set(struct matrix23 *m,
-            int m00, int m01, int m02,
-            int m10, int m11, int m12);
-
-extern void
-matrix23TransformCoordi(const struct matrix23 *m, int *x, int *y);
-
-extern void
-matrix23TransformCoordf(const struct matrix23 *m, float *x, float *y);
-
-extern void
-matrix23TransformDistance(const struct matrix23 *m, int *xDist, int *yDist);
-
-extern void
-matrix23TransformRect(const struct matrix23 *m,
-                      int *x, int *y, int *w, int *h);
-
-extern void
-matrix23Rotate(struct matrix23 *m, int width, int height, int angle);
-
-extern void
-matrix23Flip(struct matrix23 *m, int width, int height, int xflip, int yflip);
-
-extern void
-matrix23Multiply(struct matrix23 *result,
-                 const struct matrix23 *a, const struct matrix23 *b);
-
-
-#endif /* INTEL_ROTATE_H */
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 7e7935510a0..f2db48272b9 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -1,690 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "matrix.h"
-#include "renderbuffer.h"
-#include "simple_list.h"
-#include "utils.h"
-#include "vblank.h"
-#include "xmlpool.h"
-
-
-#include "intel_screen.h"
-
-#include "intel_tex.h"
-#include "intel_span.h"
-#include "intel_tris.h"
-#include "intel_ioctl.h"
-
-#include "i830_dri.h"
-
-PUBLIC const char __driConfigOptions[] =
-DRI_CONF_BEGIN
-    DRI_CONF_SECTION_PERFORMANCE
-       DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) 
-       DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
-    DRI_CONF_SECTION_END
-    DRI_CONF_SECTION_QUALITY
-       DRI_CONF_FORCE_S3TC_ENABLE(false)
-       DRI_CONF_ALLOW_LARGE_TEXTURES(1)
-      DRI_CONF_SECTION_END
-DRI_CONF_END;
-const GLuint __driNConfigOptions = 4;
-
-#ifdef USE_NEW_INTERFACE
-static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
-#endif /*USE_NEW_INTERFACE*/
-
-extern const struct dri_extension card_extensions[];
-
-/**
- * Map all the memory regions described by the screen.
- * \return GL_TRUE if success, GL_FALSE if error.
- */
-GLboolean
-intelMapScreenRegions(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-
-   if (intelScreen->front.handle) {
-      if (drmMap(sPriv->fd,
-                 intelScreen->front.handle,
-                 intelScreen->front.size,
-                 (drmAddress *)&intelScreen->front.map) != 0) {
-         _mesa_problem(NULL, "drmMap(frontbuffer) failed!");
-         return GL_FALSE;
-      }
-   }
-   else {
-      _mesa_warning(NULL, "no front buffer handle in intelMapScreenRegions!");
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->back.handle,
-              intelScreen->back.size,
-              (drmAddress *)&intelScreen->back.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->depth.handle,
-              intelScreen->depth.size,
-              (drmAddress *)&intelScreen->depth.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->tex.handle,
-              intelScreen->tex.size,
-              (drmAddress *)&intelScreen->tex.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (0)
-      printf("Mappings:  front: %p  back: %p  depth: %p  tex: %p\n",
-          intelScreen->front.map,
-          intelScreen->back.map,
-          intelScreen->depth.map,
-          intelScreen->tex.map);
-   return GL_TRUE;
-}
-
-
-void
-intelUnmapScreenRegions(intelScreenPrivate *intelScreen)
-{
-#define REALLY_UNMAP 1
-   if (intelScreen->front.map) {
-#if REALLY_UNMAP
-      if (drmUnmap(intelScreen->front.map, intelScreen->front.size) != 0)
-         printf("drmUnmap front failed!\n");
-#endif
-      intelScreen->front.map = NULL;
-   }
-   if (intelScreen->back.map) {
-#if REALLY_UNMAP
-      if (drmUnmap(intelScreen->back.map, intelScreen->back.size) != 0)
-         printf("drmUnmap back failed!\n");
-#endif
-      intelScreen->back.map = NULL;
-   }
-   if (intelScreen->depth.map) {
-#if REALLY_UNMAP
-      drmUnmap(intelScreen->depth.map, intelScreen->depth.size);
-      intelScreen->depth.map = NULL;
-#endif
-   }
-   if (intelScreen->tex.map) {
-#if REALLY_UNMAP
-      drmUnmap(intelScreen->tex.map, intelScreen->tex.size);
-      intelScreen->tex.map = NULL;
-#endif
-   }
-}
-
-
-static void
-intelPrintDRIInfo(intelScreenPrivate *intelScreen,
-                  __DRIscreenPrivate *sPriv,
-                  I830DRIPtr gDRIPriv)
-{
-   fprintf(stderr, "*** Front size:   0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->front.size, intelScreen->front.offset,
-           intelScreen->front.pitch);
-   fprintf(stderr, "*** Back size:    0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->back.size, intelScreen->back.offset,
-           intelScreen->back.pitch);
-   fprintf(stderr, "*** Depth size:   0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->depth.size, intelScreen->depth.offset,
-           intelScreen->depth.pitch);
-   fprintf(stderr, "*** Rotated size: 0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->rotated.size, intelScreen->rotated.offset,
-           intelScreen->rotated.pitch);
-   fprintf(stderr, "*** Texture size: 0x%x  offset: 0x%x\n",
-           intelScreen->tex.size, intelScreen->tex.offset);
-   fprintf(stderr, "*** Memory : 0x%x\n", gDRIPriv->mem);
-}
-
-
-static void
-intelPrintSAREA(const drmI830Sarea *sarea)
-{
-   fprintf(stderr, "SAREA: sarea width %d  height %d\n", sarea->width, sarea->height);
-   fprintf(stderr, "SAREA: pitch: %d\n", sarea->pitch);
-   fprintf(stderr,
-           "SAREA: front offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->front_offset, sarea->front_size,
-           (unsigned) sarea->front_handle);
-   fprintf(stderr,
-           "SAREA: back  offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->back_offset, sarea->back_size,
-           (unsigned) sarea->back_handle);
-   fprintf(stderr, "SAREA: depth offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->depth_offset, sarea->depth_size,
-           (unsigned) sarea->depth_handle);
-   fprintf(stderr, "SAREA: tex   offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->tex_offset, sarea->tex_size,
-           (unsigned) sarea->tex_handle);
-   fprintf(stderr, "SAREA: rotation: %d\n", sarea->rotation);
-   fprintf(stderr,
-           "SAREA: rotated offset: 0x%08x  size: 0x%x\n",
-           sarea->rotated_offset, sarea->rotated_size);
-   fprintf(stderr, "SAREA: rotated pitch: %d\n", sarea->rotated_pitch);
-}
-
-
-/**
- * A number of the screen parameters are obtained/computed from
- * information in the SAREA.  This function updates those parameters.
- */
-void
-intelUpdateScreenFromSAREA(intelScreenPrivate *intelScreen,
-                           drmI830Sarea *sarea)
-{
-   intelScreen->width = sarea->width;
-   intelScreen->height = sarea->height;
-
-   intelScreen->front.offset = sarea->front_offset;
-   intelScreen->front.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->front.handle = sarea->front_handle;
-   intelScreen->front.size = sarea->front_size;
-
-   intelScreen->back.offset = sarea->back_offset;
-   intelScreen->back.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->back.handle = sarea->back_handle;
-   intelScreen->back.size = sarea->back_size;
-			 
-   intelScreen->depth.offset = sarea->depth_offset;
-   intelScreen->depth.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->depth.handle = sarea->depth_handle;
-   intelScreen->depth.size = sarea->depth_size;
-
-   intelScreen->tex.offset = sarea->tex_offset;
-   intelScreen->logTextureGranularity = sarea->log_tex_granularity;
-   intelScreen->tex.handle = sarea->tex_handle;
-   intelScreen->tex.size = sarea->tex_size;
-
-   intelScreen->rotated.offset = sarea->rotated_offset;
-   intelScreen->rotated.pitch = sarea->rotated_pitch * intelScreen->cpp;
-   intelScreen->rotated.size = sarea->rotated_size;
-   intelScreen->current_rotation = sarea->rotation;
-   matrix23Rotate(&intelScreen->rotMatrix,
-                  sarea->width, sarea->height, sarea->rotation);
-   intelScreen->rotatedWidth = sarea->virtualX;
-   intelScreen->rotatedHeight = sarea->virtualY;
-
-   if (0)
-      intelPrintSAREA(sarea);
-}
-
-
-static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen;
-   I830DRIPtr         gDRIPriv = (I830DRIPtr)sPriv->pDevPriv;
-   drmI830Sarea *sarea;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
-
-   if (sPriv->devPrivSize != sizeof(I830DRIRec)) {
-      fprintf(stderr,"\nERROR!  sizeof(I830DRIRec) does not match passed size from device driver\n");
-      return GL_FALSE;
-   }
-
-   /* Allocate the private area */
-   intelScreen = (intelScreenPrivate *)CALLOC(sizeof(intelScreenPrivate));
-   if (!intelScreen) {
-      fprintf(stderr,"\nERROR!  Allocating private area failed\n");
-      return GL_FALSE;
-   }
-   /* parse information in __driConfigOptions */
-   driParseOptionInfo (&intelScreen->optionCache,
-		       __driConfigOptions, __driNConfigOptions);
-
-   intelScreen->driScrnPriv = sPriv;
-   sPriv->private = (void *)intelScreen;
-   intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
-   sarea = (drmI830Sarea *)
-         (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
-
-   intelScreen->deviceID = gDRIPriv->deviceID;
-   intelScreen->mem = gDRIPriv->mem;
-   intelScreen->cpp = gDRIPriv->cpp;
-
-   switch (gDRIPriv->bitsPerPixel) {
-   case 15: intelScreen->fbFormat = DV_PF_555; break;
-   case 16: intelScreen->fbFormat = DV_PF_565; break;
-   case 32: intelScreen->fbFormat = DV_PF_8888; break;
-   }
-			 
-   intelUpdateScreenFromSAREA(intelScreen, sarea);
-
-   if (0)
-      intelPrintDRIInfo(intelScreen, sPriv, gDRIPriv);
-
-   if (!intelMapScreenRegions(sPriv)) {
-      fprintf(stderr,"\nERROR!  mapping regions\n");
-      _mesa_free(intelScreen);
-      sPriv->private = NULL;
-      return GL_FALSE;
-   }
-
-   intelScreen->drmMinor = sPriv->drmMinor;
-
-   /* Determine if IRQs are active? */
-   {
-      int ret;
-      drmI830GetParam gp;
-
-      gp.param = I830_PARAM_IRQ_ACTIVE;
-      gp.value = &intelScreen->irq_active;
-
-      ret = drmCommandWriteRead( sPriv->fd, DRM_I830_GETPARAM,
-				 &gp, sizeof(gp));
-      if (ret) {
-	 fprintf(stderr, "drmI830GetParam: %d\n", ret);
-	 return GL_FALSE;
-      }
-   }
-
-   /* Determine if batchbuffers are allowed */
-   {
-      int ret;
-      drmI830GetParam gp;
-
-      gp.param = I830_PARAM_ALLOW_BATCHBUFFER;
-      gp.value = &intelScreen->allow_batchbuffer;
-
-      ret = drmCommandWriteRead( sPriv->fd, DRM_I830_GETPARAM,
-				 &gp, sizeof(gp));
-      if (ret) {
-	 fprintf(stderr, "drmI830GetParam: (%d) %d\n", gp.param, ret);
-	 return GL_FALSE;
-      }
-   }
-
-   if (glx_enable_extension != NULL) {
-      (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
-      (*glx_enable_extension)( psc, "GLX_SGI_make_current_read" );
-      (*glx_enable_extension)( psc, "GLX_MESA_allocate_memory" );
-      (*glx_enable_extension)( psc, "GLX_MESA_copy_sub_buffer" );
-   }
-   
-   sPriv->psc->allocateMemory = (void *) intelAllocateMemoryMESA;
-   sPriv->psc->freeMemory     = (void *) intelFreeMemoryMESA;
-   sPriv->psc->memoryOffset   = (void *) intelGetMemoryOffsetMESA;
-
-   return GL_TRUE;
-}
-		
-		
-static void intelDestroyScreen(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-
-   intelUnmapScreenRegions(intelScreen);
-
-   driDestroyOptionInfo (&intelScreen->optionCache);
-
-   FREE(intelScreen);
-   sPriv->private = NULL;
-}
-
-
-static GLboolean intelCreateBuffer( __DRIscreenPrivate *driScrnPriv,
-				    __DRIdrawablePrivate *driDrawPriv,
-				    const __GLcontextModes *mesaVis,
-				    GLboolean isPixmap )
-{
-   intelScreenPrivate *screen = (intelScreenPrivate *) driScrnPriv->private;
-
-   if (isPixmap) {
-      return GL_FALSE; /* not implemented */
-   } else {
-      GLboolean swStencil = (mesaVis->stencilBits > 0 && 
-			     mesaVis->depthBits != 24);
-
-      struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
-
-      {
-         driRenderbuffer *frontRb
-            = driNewRenderbuffer(GL_RGBA,
-                                 screen->front.map,
-                                 screen->cpp,
-                                 screen->front.offset, screen->front.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(frontRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
-      }
-
-      if (mesaVis->doubleBufferMode) {
-         driRenderbuffer *backRb
-            = driNewRenderbuffer(GL_RGBA,
-                                 screen->back.map,
-                                 screen->cpp,
-                                 screen->back.offset, screen->back.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(backRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
-      }
-
-      if (mesaVis->depthBits == 16) {
-         driRenderbuffer *depthRb
-            = driNewRenderbuffer(GL_DEPTH_COMPONENT16,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(depthRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
-      }
-      else if (mesaVis->depthBits == 24) {
-         driRenderbuffer *depthRb
-            = driNewRenderbuffer(GL_DEPTH_COMPONENT24,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(depthRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
-      }
-
-      if (mesaVis->stencilBits > 0 && !swStencil) {
-         driRenderbuffer *stencilRb
-            = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(stencilRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base);
-      }
-
-      _mesa_add_soft_renderbuffers(fb,
-                                   GL_FALSE, /* color */
-                                   GL_FALSE, /* depth */
-                                   swStencil,
-                                   mesaVis->accumRedBits > 0,
-                                   GL_FALSE, /* alpha */
-                                   GL_FALSE /* aux */);
-      driDrawPriv->driverPrivate = (void *) fb;
-
-      return (driDrawPriv->driverPrivate != NULL);
-   }
-}
-
-static void intelDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
-{
-   _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
-}
-
-
-/**
- * Get information about previous buffer swaps.
- */
-static int
-intelGetSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
-{
-   intelContextPtr intel;
-
-   if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
-	|| (dPriv->driContextPriv->driverPrivate == NULL)
-	|| (sInfo == NULL) ) {
-      return -1;
-   }
-
-   intel = dPriv->driContextPriv->driverPrivate;
-   sInfo->swap_count = intel->swap_count;
-   sInfo->swap_ust = intel->swap_ust;
-   sInfo->swap_missed_count = intel->swap_missed_count;
-
-   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
-       ? driCalculateSwapUsage( dPriv, 0, intel->swap_missed_ust )
-       : 0.0;
-
-   return 0;
-}
-
-
-/* There are probably better ways to do this, such as an
- * init-designated function to register chipids and createcontext
- * functions.
- */
-extern GLboolean i830CreateContext( const __GLcontextModes *mesaVis,
-				    __DRIcontextPrivate *driContextPriv,
-				    void *sharedContextPrivate);
-
-extern GLboolean i915CreateContext( const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate);
-
-
-
-
-static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate)
-{
-   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-
-   switch (intelScreen->deviceID) {
-   case PCI_CHIP_845_G:
-   case PCI_CHIP_I830_M:
-   case PCI_CHIP_I855_GM:
-   case PCI_CHIP_I865_G:
-      return i830CreateContext( mesaVis, driContextPriv, 
-				sharedContextPrivate );
-
-   case PCI_CHIP_I915_G:
-   case PCI_CHIP_I915_GM:
-   case PCI_CHIP_I945_G:
-   case PCI_CHIP_I945_GM:
-   case PCI_CHIP_I945_GME:
-   case PCI_CHIP_G33_G:
-   case PCI_CHIP_Q35_G:
-   case PCI_CHIP_Q33_G:
-      return i915CreateContext( mesaVis, driContextPriv, 
-			       sharedContextPrivate );
- 
-   default:
-      fprintf(stderr, "Unrecognized deviceID %x\n", intelScreen->deviceID);
-      return GL_FALSE;
-   }
-}
-
-
-static const struct __DriverAPIRec intelAPI = {
-   .InitDriver      = intelInitDriver,
-   .DestroyScreen   = intelDestroyScreen,
-   .CreateContext   = intelCreateContext,
-   .DestroyContext  = intelDestroyContext,
-   .CreateBuffer    = intelCreateBuffer,
-   .DestroyBuffer   = intelDestroyBuffer,
-   .SwapBuffers     = intelSwapBuffers,
-   .MakeCurrent     = intelMakeCurrent,
-   .UnbindContext   = intelUnbindContext,
-   .GetSwapInfo     = intelGetSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = intelCopySubBuffer
-};
-
-
-static __GLcontextModes *
-intelFillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
-{
-   __GLcontextModes * modes;
-   __GLcontextModes * m;
-   unsigned num_modes;
-   unsigned depth_buffer_factor;
-   unsigned back_buffer_factor;
-   GLenum fb_format;
-   GLenum fb_type;
-
-   /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
-    * support pageflipping at all.
-    */
-   static const GLenum back_buffer_modes[] = {
-      GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
-   };
-
-   uint8_t depth_bits_array[3];
-   uint8_t stencil_bits_array[3];
-
-
-   depth_bits_array[0] = 0;
-   depth_bits_array[1] = depth_bits;
-   depth_bits_array[2] = depth_bits;
-
-   /* Just like with the accumulation buffer, always provide some modes
-    * with a stencil buffer.  It will be a sw fallback, but some apps won't
-    * care about that.
-    */
-   stencil_bits_array[0] = 0;
-   stencil_bits_array[1] = 0;
-   stencil_bits_array[2] = (stencil_bits == 0) ? 8 : stencil_bits;
-
-   depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
-   back_buffer_factor  = (have_back_buffer) ? 3 : 1;
-
-   num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
-    if ( pixel_bits == 16 ) {
-        fb_format = GL_RGB;
-        fb_type = GL_UNSIGNED_SHORT_5_6_5;
-    }
-    else {
-        fb_format = GL_BGRA;
-        fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
-    }
-
-   modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-   m = modes;
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-   }
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_DIRECT_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-   }
-
-   /* Mark the visual as slow if there are "fake" stencil bits.
-    */
-   for ( m = modes ; m != NULL ; m = m->next ) {
-      if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
-	 m->visualRating = GLX_SLOW_CONFIG;
-      }
-   }
-
-   return modes;
-}
-
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
-{
-   __DRIscreenPrivate *psp;
-   static const __DRIversion ddx_expected = { 1, 5, 0 };
-   static const __DRIversion dri_expected = { 4, 0, 0 };
-   static const __DRIversion drm_expected = { 1, 4, 0 };
-
-   dri_interface = interface;
-
-   if ( ! driCheckDriDdxDrmVersions2( "i915",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
-      return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &intelAPI);
-   if ( psp != NULL ) {
-      I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
-      *driver_modes = intelFillInModes( dri_priv->cpp * 8,
-					(dri_priv->cpp == 2) ? 16 : 24,
-					(dri_priv->cpp == 2) ? 0  : 8,
-					1 );
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
-
-   return (void *) psp;
-}
+../intel/intel_screen.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_screen.h b/src/mesa/drivers/dri/i915/intel_screen.h
deleted file mode 100644
index 24cfd9bf8b2..00000000000
--- a/src/mesa/drivers/dri/i915/intel_screen.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef _INTEL_INIT_H_
-#define _INTEL_INIT_H_
-
-#include <sys/time.h>
-#include "xmlconfig.h"
-#include "dri_util.h"
-#include "intel_rotate.h"
-#include "i830_common.h"
-
-
-/* This roughly corresponds to a gl_renderbuffer (Mesa 6.4) */
-typedef struct {
-   drm_handle_t handle;
-   drmSize size;        /* region size in bytes */
-   char *map;           /* memory map */
-   int offset;          /* from start of video mem, in bytes */
-   int pitch;           /* row stride, in bytes */
-} intelRegion;
-
-typedef struct 
-{
-   intelRegion front;
-   intelRegion back;
-   intelRegion rotated;
-   intelRegion depth;
-   intelRegion tex;
-   
-   int deviceID;
-   int width;
-   int height;
-   int mem;         /* unused */
-   
-   int cpp;         /* for front and back buffers */
-   int fbFormat;
-
-   int logTextureGranularity;
-   
-   __DRIscreenPrivate *driScrnPriv;
-   unsigned int sarea_priv_offset;
-
-   int drmMinor;
-
-   int irq_active;
-   int allow_batchbuffer;
-
-   struct matrix23 rotMatrix;
-
-   int current_rotation;  /* 0, 90, 180 or 270 */
-   int rotatedWidth, rotatedHeight;
-
-   /**
-   * Configuration cache with default values for all contexts
-   */
-   driOptionCache optionCache;
-} intelScreenPrivate;
-
-
-extern GLboolean
-intelMapScreenRegions(__DRIscreenPrivate *sPriv);
-
-extern void
-intelUnmapScreenRegions(intelScreenPrivate *intelScreen);
-
-extern void
-intelUpdateScreenFromSAREA(intelScreenPrivate *intelScreen,
-                           drmI830Sarea *sarea);
-
-extern void
-intelDestroyContext(__DRIcontextPrivate *driContextPriv);
-
-extern GLboolean
-intelUnbindContext(__DRIcontextPrivate *driContextPriv);
-
-extern GLboolean
-intelMakeCurrent(__DRIcontextPrivate *driContextPriv,
-                 __DRIdrawablePrivate *driDrawPriv,
-                 __DRIdrawablePrivate *driReadPriv);
-
-extern void
-intelSwapBuffers(__DRIdrawablePrivate *dPriv);
-
-extern void
-intelCopySubBuffer( __DRIdrawablePrivate *dPriv, int x, int y, int w, int h );
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_span.c b/src/mesa/drivers/dri/i915/intel_span.c
index c3ffc4b2ac0..05e5e8e5833 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_span.c
+++ b/src/mesa/drivers/dri/i915/intel_span.c
@@ -1,258 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
-
-#include "intel_screen.h"
-
-#include "intel_span.h"
-#include "intel_ioctl.h"
-#include "swrast/swrast.h"
-
-
-#define DBG 0
-
-#define LOCAL_VARS						\
-   intelContextPtr intel = INTEL_CONTEXT(ctx);			\
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *) drb->Base.Data +			\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch;			\
-   GLushort p;							\
-   (void) buf; (void) p
-
-#define LOCAL_DEPTH_VARS					\
-   intelContextPtr intel = INTEL_CONTEXT(ctx);			\
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *) drb->Base.Data +			\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch
-
-#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS 
-
-#define INIT_MONO_PIXEL(p,color)\
-	 p = INTEL_PACKCOLOR565(color[0],color[1],color[2])
-
-#define Y_FLIP(_y) (height - _y - 1)
-
-#define HW_LOCK()
-
-#define HW_UNLOCK()
-
-/* 16 bit, 565 rgb color spanline and pixel functions
- */
-#define WRITE_RGBA( _x, _y, r, g, b, a )				\
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = ( (((int)r & 0xf8) << 8) |	\
-		                             (((int)g & 0xfc) << 3) |	\
-		                             (((int)b & 0xf8) >> 3))
-#define WRITE_PIXEL( _x, _y, p )  \
-   *(GLushort *)(buf + _x*2 + _y*pitch) = p
-
-#define READ_RGBA( rgba, _x, _y )				\
-do {								\
-   GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch);		\
-   rgba[0] = (((p >> 11) & 0x1f) * 255) / 31;			\
-   rgba[1] = (((p >>  5) & 0x3f) * 255) / 63;			\
-   rgba[2] = (((p >>  0) & 0x1f) * 255) / 31;			\
-   rgba[3] = 255;						\
-} while(0)
-
-#define TAG(x) intel##x##_565
-#include "spantmp.h"
-
-/* 15 bit, 555 rgb color spanline and pixel functions
- */
-#define WRITE_RGBA( _x, _y, r, g, b, a )			\
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = (((r & 0xf8) << 7) |	\
-		                            ((g & 0xf8) << 3) |	\
-                         		    ((b & 0xf8) >> 3))
-
-#define WRITE_PIXEL( _x, _y, p )  \
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = p
-
-#define READ_RGBA( rgba, _x, _y )				\
-do {								\
-   GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch);		\
-   rgba[0] = (p >> 7) & 0xf8;					\
-   rgba[1] = (p >> 3) & 0xf8;					\
-   rgba[2] = (p << 3) & 0xf8;					\
-   rgba[3] = 255;						\
-} while(0)
-
-#define TAG(x) intel##x##_555
-#include "spantmp.h"
-
-/* 16 bit depthbuffer functions.
- */
-#define WRITE_DEPTH( _x, _y, d ) \
-   *(GLushort *)(buf + (_x)*2 + (_y)*pitch)  = d;
-
-#define READ_DEPTH( d, _x, _y )	\
-   d = *(GLushort *)(buf + (_x)*2 + (_y)*pitch);	 
-
-
-#define TAG(x) intel##x##_z16
-#include "depthtmp.h"
-
-
-#undef LOCAL_VARS
-#define LOCAL_VARS						\
-   intelContextPtr intel = INTEL_CONTEXT(ctx);			\
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *)drb->Base.Data +				\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch;			\
-   GLuint p;							\
-   (void) buf; (void) p
-
-#undef INIT_MONO_PIXEL
-#define INIT_MONO_PIXEL(p,color)\
-	 p = INTEL_PACKCOLOR8888(color[0],color[1],color[2],color[3])
-
-/* 32 bit, 8888 argb color spanline and pixel functions
- */
-#define WRITE_RGBA(_x, _y, r, g, b, a)			\
-    *(GLuint *)(buf + _x*4 + _y*pitch) = ((r << 16) |	\
-					  (g << 8)  |	\
-					  (b << 0)  |	\
-					  (a << 24) )
-
-#define WRITE_PIXEL(_x, _y, p)			\
-    *(GLuint *)(buf + _x*4 + _y*pitch) = p
-
-
-#define READ_RGBA(rgba, _x, _y)					\
-    do {							\
-	GLuint p = *(GLuint *)(buf + _x*4 + _y*pitch);		\
-	rgba[0] = (p >> 16) & 0xff;				\
-	rgba[1] = (p >> 8)  & 0xff;				\
-	rgba[2] = (p >> 0)  & 0xff;				\
-	rgba[3] = (p >> 24) & 0xff;				\
-    } while (0)
-
-#define TAG(x) intel##x##_8888
-#include "spantmp.h"
-
-
-/* 24/8 bit interleaved depth/stencil functions
- */
-#define WRITE_DEPTH( _x, _y, d ) {			\
-   GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
-   tmp &= 0xff000000;					\
-   tmp |= (d) & 0xffffff;				\
-   *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = tmp;		\
-}
-
-#define READ_DEPTH( d, _x, _y )		\
-   d = *(GLuint *)(buf + (_x)*4 + (_y)*pitch) & 0xffffff;
-
-
-#define TAG(x) intel##x##_z24_s8
-#include "depthtmp.h"
-
-#define WRITE_STENCIL( _x, _y, d ) {			\
-   GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
-   tmp &= 0xffffff;					\
-   tmp |= ((d)<<24);					\
-   *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = tmp;		\
-}
-
-#define READ_STENCIL( d, _x, _y )			\
-   d = *(GLuint *)(buf + (_x)*4 + (_y)*pitch) >> 24;
-
-#define TAG(x) intel##x##_z24_s8
-#include "stenciltmp.h"
-
-
-/* Move locking out to get reasonable span performance.
- */
-void intelSpanRenderStart( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-
-   intelFlush(&intel->ctx);
-   LOCK_HARDWARE(intel);
-   intelWaitForIdle(intel);
-}
-
-void intelSpanRenderFinish( GLcontext *ctx )
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   _swrast_flush( ctx );
-   UNLOCK_HARDWARE( intel );
-}
-
-void intelInitSpanFuncs( GLcontext *ctx )
-{
-   struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
-   swdd->SpanRenderStart = intelSpanRenderStart;
-   swdd->SpanRenderFinish = intelSpanRenderFinish; 
-}
-
-
-/**
- * Plug in the Get/Put routines for the given driRenderbuffer.
- */
-void
-intelSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis)
-{
-   if (drb->Base.InternalFormat == GL_RGBA) {
-      if (vis->redBits == 5 && vis->greenBits == 5 && vis->blueBits == 5) {
-         intelInitPointers_555(&drb->Base);
-      }
-      else if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) {
-         intelInitPointers_565(&drb->Base);
-      }
-      else {
-         assert(vis->redBits == 8);
-         assert(vis->greenBits == 8);
-         assert(vis->blueBits == 8);
-         intelInitPointers_8888(&drb->Base);
-      }
-   }
-   else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
-      intelInitDepthPointers_z16(&drb->Base);
-   }
-   else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
-      intelInitDepthPointers_z24_s8(&drb->Base);
-   }
-   else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
-      intelInitStencilPointers_z24_s8(&drb->Base);
-   }
-}
+../intel/intel_span.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_state.c b/src/mesa/drivers/dri/i915/intel_state.c
index e5988a5ed6c..4aa43e5f3ab 100644
--- a/src/mesa/drivers/dri/i915/intel_state.c
+++ b/src/mesa/drivers/dri/i915/intel_state.c
@@ -26,256 +26,272 @@
  **************************************************************************/
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/dd.h"
 
 #include "intel_screen.h"
 #include "intel_context.h"
+#include "intel_fbo.h"
+#include "intel_regions.h"
 #include "swrast/swrast.h"
 
-int intel_translate_compare_func( GLenum func )
+int 
+intel_translate_shadow_compare_func( GLenum func )
 {
    switch(func) {
    case GL_NEVER: 
-      return COMPAREFUNC_NEVER; 
+       return COMPAREFUNC_ALWAYS; 
    case GL_LESS: 
-      return COMPAREFUNC_LESS; 
+       return COMPAREFUNC_LEQUAL; 
    case GL_LEQUAL: 
-      return COMPAREFUNC_LEQUAL; 
+       return COMPAREFUNC_LESS;
    case GL_GREATER: 
-      return COMPAREFUNC_GREATER; 
+       return COMPAREFUNC_GEQUAL; 
    case GL_GEQUAL: 
-      return COMPAREFUNC_GEQUAL; 
+      return COMPAREFUNC_GREATER; 
    case GL_NOTEQUAL: 
-      return COMPAREFUNC_NOTEQUAL; 
-   case GL_EQUAL: 
       return COMPAREFUNC_EQUAL; 
+   case GL_EQUAL: 
+      return COMPAREFUNC_NOTEQUAL; 
    case GL_ALWAYS: 
-      return COMPAREFUNC_ALWAYS; 
+       return COMPAREFUNC_NEVER; 
+   }
+
+   fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, func);
+   return COMPAREFUNC_NEVER; 
+}
+
+int
+intel_translate_compare_func(GLenum func)
+{
+   switch (func) {
+   case GL_NEVER:
+      return COMPAREFUNC_NEVER;
+   case GL_LESS:
+      return COMPAREFUNC_LESS;
+   case GL_LEQUAL:
+      return COMPAREFUNC_LEQUAL;
+   case GL_GREATER:
+      return COMPAREFUNC_GREATER;
+   case GL_GEQUAL:
+      return COMPAREFUNC_GEQUAL;
+   case GL_NOTEQUAL:
+      return COMPAREFUNC_NOTEQUAL;
+   case GL_EQUAL:
+      return COMPAREFUNC_EQUAL;
+   case GL_ALWAYS:
+      return COMPAREFUNC_ALWAYS;
    }
 
    fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, func);
-   return COMPAREFUNC_ALWAYS; 
+   return COMPAREFUNC_ALWAYS;
 }
 
-int intel_translate_stencil_op( GLenum op )
+int
+intel_translate_stencil_op(GLenum op)
 {
-   switch(op) {
-   case GL_KEEP: 
-      return STENCILOP_KEEP; 
-   case GL_ZERO: 
-      return STENCILOP_ZERO; 
-   case GL_REPLACE: 
-      return STENCILOP_REPLACE; 
-   case GL_INCR: 
+   switch (op) {
+   case GL_KEEP:
+      return STENCILOP_KEEP;
+   case GL_ZERO:
+      return STENCILOP_ZERO;
+   case GL_REPLACE:
+      return STENCILOP_REPLACE;
+   case GL_INCR:
       return STENCILOP_INCRSAT;
-   case GL_DECR: 
+   case GL_DECR:
       return STENCILOP_DECRSAT;
    case GL_INCR_WRAP:
-      return STENCILOP_INCR; 
+      return STENCILOP_INCR;
    case GL_DECR_WRAP:
-      return STENCILOP_DECR; 
-   case GL_INVERT: 
-      return STENCILOP_INVERT; 
-   default: 
+      return STENCILOP_DECR;
+   case GL_INVERT:
+      return STENCILOP_INVERT;
+   default:
       return STENCILOP_ZERO;
    }
 }
 
-int intel_translate_blend_factor( GLenum factor )
+int
+intel_translate_blend_factor(GLenum factor)
 {
-   switch(factor) {
-   case GL_ZERO: 
-      return BLENDFACT_ZERO; 
-   case GL_SRC_ALPHA: 
-      return BLENDFACT_SRC_ALPHA; 
-   case GL_ONE: 
-      return BLENDFACT_ONE; 
-   case GL_SRC_COLOR: 
-      return BLENDFACT_SRC_COLR; 
-   case GL_ONE_MINUS_SRC_COLOR: 
-      return BLENDFACT_INV_SRC_COLR; 
-   case GL_DST_COLOR: 
-      return BLENDFACT_DST_COLR; 
-   case GL_ONE_MINUS_DST_COLOR: 
-      return BLENDFACT_INV_DST_COLR; 
+   switch (factor) {
+   case GL_ZERO:
+      return BLENDFACT_ZERO;
+   case GL_SRC_ALPHA:
+      return BLENDFACT_SRC_ALPHA;
+   case GL_ONE:
+      return BLENDFACT_ONE;
+   case GL_SRC_COLOR:
+      return BLENDFACT_SRC_COLR;
+   case GL_ONE_MINUS_SRC_COLOR:
+      return BLENDFACT_INV_SRC_COLR;
+   case GL_DST_COLOR:
+      return BLENDFACT_DST_COLR;
+   case GL_ONE_MINUS_DST_COLOR:
+      return BLENDFACT_INV_DST_COLR;
    case GL_ONE_MINUS_SRC_ALPHA:
-      return BLENDFACT_INV_SRC_ALPHA; 
-   case GL_DST_ALPHA: 
-      return BLENDFACT_DST_ALPHA; 
+      return BLENDFACT_INV_SRC_ALPHA;
+   case GL_DST_ALPHA:
+      return BLENDFACT_DST_ALPHA;
    case GL_ONE_MINUS_DST_ALPHA:
-      return BLENDFACT_INV_DST_ALPHA; 
-   case GL_SRC_ALPHA_SATURATE: 
+      return BLENDFACT_INV_DST_ALPHA;
+   case GL_SRC_ALPHA_SATURATE:
       return BLENDFACT_SRC_ALPHA_SATURATE;
    case GL_CONSTANT_COLOR:
-      return BLENDFACT_CONST_COLOR; 
+      return BLENDFACT_CONST_COLOR;
    case GL_ONE_MINUS_CONSTANT_COLOR:
       return BLENDFACT_INV_CONST_COLOR;
    case GL_CONSTANT_ALPHA:
-      return BLENDFACT_CONST_ALPHA; 
+      return BLENDFACT_CONST_ALPHA;
    case GL_ONE_MINUS_CONSTANT_ALPHA:
       return BLENDFACT_INV_CONST_ALPHA;
    }
-   
+
    fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, factor);
    return BLENDFACT_ZERO;
 }
 
-int intel_translate_logic_op( GLenum opcode )
+int
+intel_translate_logic_op(GLenum opcode)
 {
-   switch(opcode) {
-   case GL_CLEAR: 
-      return LOGICOP_CLEAR; 
-   case GL_AND: 
-      return LOGICOP_AND; 
-   case GL_AND_REVERSE: 
-      return LOGICOP_AND_RVRSE; 
-   case GL_COPY: 
-      return LOGICOP_COPY; 
-   case GL_COPY_INVERTED: 
-      return LOGICOP_COPY_INV; 
-   case GL_AND_INVERTED: 
-      return LOGICOP_AND_INV; 
-   case GL_NOOP: 
-      return LOGICOP_NOOP; 
-   case GL_XOR: 
-      return LOGICOP_XOR; 
-   case GL_OR: 
-      return LOGICOP_OR; 
-   case GL_OR_INVERTED: 
-      return LOGICOP_OR_INV; 
-   case GL_NOR: 
-      return LOGICOP_NOR; 
-   case GL_EQUIV: 
-      return LOGICOP_EQUIV; 
-   case GL_INVERT: 
-      return LOGICOP_INV; 
-   case GL_OR_REVERSE: 
-      return LOGICOP_OR_RVRSE; 
-   case GL_NAND: 
-      return LOGICOP_NAND; 
-   case GL_SET: 
-      return LOGICOP_SET; 
-   default:
+   switch (opcode) {
+   case GL_CLEAR:
+      return LOGICOP_CLEAR;
+   case GL_AND:
+      return LOGICOP_AND;
+   case GL_AND_REVERSE:
+      return LOGICOP_AND_RVRSE;
+   case GL_COPY:
+      return LOGICOP_COPY;
+   case GL_COPY_INVERTED:
+      return LOGICOP_COPY_INV;
+   case GL_AND_INVERTED:
+      return LOGICOP_AND_INV;
+   case GL_NOOP:
+      return LOGICOP_NOOP;
+   case GL_XOR:
+      return LOGICOP_XOR;
+   case GL_OR:
+      return LOGICOP_OR;
+   case GL_OR_INVERTED:
+      return LOGICOP_OR_INV;
+   case GL_NOR:
+      return LOGICOP_NOR;
+   case GL_EQUIV:
+      return LOGICOP_EQUIV;
+   case GL_INVERT:
+      return LOGICOP_INV;
+   case GL_OR_REVERSE:
+      return LOGICOP_OR_RVRSE;
+   case GL_NAND:
+      return LOGICOP_NAND;
+   case GL_SET:
       return LOGICOP_SET;
-   }
-}
-
-static void intelDrawBuffer(GLcontext *ctx, GLenum mode )
-{
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   int front = 0;
- 
-   if (!ctx->DrawBuffer)
-      return;
-
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
-      front = 1;
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE );
-      break;
-   case BUFFER_BIT_BACK_LEFT:
-      front = 0;
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE );
-      break;
    default:
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE );
-      return;
-   }
-
-   if ( intel->sarea->pf_current_page == 1 ) 
-      front ^= 1;
-   
-   intelSetFrontClipRects( intel );
-
-   if (front) {
-      intel->drawRegion = &intel->intelScreen->front;
-      intel->readRegion = &intel->intelScreen->front;
-   } else {
-      intel->drawRegion = &intel->intelScreen->back;
-      intel->readRegion = &intel->intelScreen->back;
+      return LOGICOP_SET;
    }
-
-   intel->vtbl.set_color_region( intel, intel->drawRegion );
-}
-
-static void intelReadBuffer( GLcontext *ctx, GLenum mode )
-{
-   /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */
 }
 
 
-static void intelClearColor(GLcontext *ctx, const GLfloat color[4])
+static void
+intelClearColor(GLcontext * ctx, const GLfloat color[4])
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   intelScreenPrivate *screen = intel->intelScreen;
+   struct intel_context *intel = intel_context(ctx);
+   GLubyte clear[4];
 
-   CLAMPED_FLOAT_TO_UBYTE(intel->clear_red, color[0]);
-   CLAMPED_FLOAT_TO_UBYTE(intel->clear_green, color[1]);
-   CLAMPED_FLOAT_TO_UBYTE(intel->clear_blue, color[2]);
-   CLAMPED_FLOAT_TO_UBYTE(intel->clear_alpha, color[3]);
+   CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
+   CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
+   CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
+   CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
 
-   intel->ClearColor = INTEL_PACKCOLOR(screen->fbFormat,
-				       intel->clear_red, 
-				       intel->clear_green, 
-				       intel->clear_blue, 
-				       intel->clear_alpha);
+   /* compute both 32 and 16-bit clear values */
+   intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1],
+                                               clear[2], clear[3]);
+   intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]);
 }
 
 
-static void intelCalcViewport( GLcontext *ctx )
+/**
+ * Update the viewport transformation matrix.  Depends on:
+ *  - viewport pos/size
+ *  - depthrange
+ *  - window pos/size or FBO size
+ */
+static void
+intelCalcViewport(GLcontext * ctx)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
    const GLfloat *v = ctx->Viewport._WindowMap.m;
+   const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
    GLfloat *m = intel->ViewportMatrix.m;
-   GLint h = 0;
+   GLfloat yScale, yBias;
 
-   if (intel->driDrawable) 
-      h = intel->driDrawable->h + SUBPIXEL_Y;
+   if (ctx->DrawBuffer->Name) {
+      /* User created FBO */
+      struct intel_renderbuffer *irb
+         = intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[0]);
+      if (irb && !irb->RenderToTexture) {
+         /* y=0=top */
+         yScale = -1.0;
+         yBias = irb->Base.Height;
+      }
+      else {
+         /* y=0=bottom */
+         yScale = 1.0;
+         yBias = 0.0;
+      }
+   }
+   else {
+      /* window buffer, y=0=top */
+      yScale = -1.0;
+      yBias = (intel->driDrawable) ? intel->driDrawable->h : 0.0F;
+   }
 
-   /* See also intel_translate_vertex.  SUBPIXEL adjustments can be done
-    * via state vars, too.
-    */
-   m[MAT_SX] =   v[MAT_SX];
-   m[MAT_TX] =   v[MAT_TX] + SUBPIXEL_X;
-   m[MAT_SY] = - v[MAT_SY];
-   m[MAT_TY] = - v[MAT_TY] + h;
-   m[MAT_SZ] =   v[MAT_SZ] * intel->depth_scale;
-   m[MAT_TZ] =   v[MAT_TZ] * intel->depth_scale;
+   m[MAT_SX] = v[MAT_SX];
+   m[MAT_TX] = v[MAT_TX];
+
+   m[MAT_SY] = v[MAT_SY] * yScale;
+   m[MAT_TY] = v[MAT_TY] * yScale + yBias;
+
+   m[MAT_SZ] = v[MAT_SZ] * depthScale;
+   m[MAT_TZ] = v[MAT_TZ] * depthScale;
 }
 
-static void intelViewport( GLcontext *ctx,
-			  GLint x, GLint y,
-			  GLsizei width, GLsizei height )
+static void
+intelViewport(GLcontext * ctx,
+              GLint x, GLint y, GLsizei width, GLsizei height)
 {
-   intelCalcViewport( ctx );
+   intelCalcViewport(ctx);
+
+   intel_viewport(ctx, x, y, width, height);
 }
 
-static void intelDepthRange( GLcontext *ctx,
-			    GLclampd nearval, GLclampd farval )
+static void
+intelDepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
 {
-   intelCalcViewport( ctx );
+   intelCalcViewport(ctx);
 }
 
 /* Fallback to swrast for select and feedback.
  */
-static void intelRenderMode( GLcontext *ctx, GLenum mode )
+static void
+intelRenderMode(GLcontext * ctx, GLenum mode)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-   FALLBACK( intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER) );
+   struct intel_context *intel = intel_context(ctx);
+   FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
 }
 
 
-void intelInitStateFuncs( struct dd_function_table *functions )
+void
+intelInitStateFuncs(struct dd_function_table *functions)
 {
-   functions->DrawBuffer = intelDrawBuffer;
-   functions->ReadBuffer = intelReadBuffer;
    functions->RenderMode = intelRenderMode;
    functions->Viewport = intelViewport;
    functions->DepthRange = intelDepthRange;
    functions->ClearColor = intelClearColor;
 }
-
diff --git a/src/mesa/drivers/dri/i915/intel_structs.h b/src/mesa/drivers/dri/i915/intel_structs.h
new file mode 100644
index 00000000000..522e3bd92c2
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_structs.h
@@ -0,0 +1,132 @@
+#ifndef INTEL_STRUCTS_H
+#define INTEL_STRUCTS_H
+
+struct br0 {
+   GLuint length:8;
+   GLuint pad0:3;
+   GLuint dst_tiled:1;
+   GLuint pad1:8;
+   GLuint write_rgb:1;
+   GLuint write_alpha:1;
+   GLuint opcode:7;
+   GLuint client:3;
+};
+
+   
+struct br13 {
+   GLint dest_pitch:16;
+   GLuint rop:8;
+   GLuint color_depth:2;
+   GLuint pad1:3;
+   GLuint mono_source_transparency:1;
+   GLuint clipping_enable:1;
+   GLuint pad0:1;
+};
+
+
+
+/* This is an attempt to move some of the 2D interaction in this
+ * driver to using structs for packets rather than a bunch of #defines
+ * and dwords.
+ */
+struct xy_color_blit {
+   struct br0 br0;
+   struct br13 br13;
+
+   struct {
+      GLuint dest_x1:16;
+      GLuint dest_y1:16;
+   } dw2;
+
+   struct {
+      GLuint dest_x2:16;
+      GLuint dest_y2:16;
+   } dw3;
+   
+   GLuint dest_base_addr;
+   GLuint color;
+};
+
+struct xy_src_copy_blit {
+   struct br0 br0;
+   struct br13 br13;
+
+   struct {
+      GLuint dest_x1:16;
+      GLuint dest_y1:16;
+   } dw2;
+
+   struct {
+      GLuint dest_x2:16;
+      GLuint dest_y2:16;
+   } dw3;
+   
+   GLuint dest_base_addr;
+
+   struct {
+      GLuint src_x1:16;
+      GLuint src_y1:16;
+   } dw5;
+
+   struct {
+      GLint src_pitch:16;
+      GLuint pad:16;
+   } dw6;
+   
+   GLuint src_base_addr;
+};
+
+struct xy_setup_blit {
+   struct br0 br0;
+   struct br13 br13;
+
+   struct {
+      GLuint clip_x1:16;
+      GLuint clip_y1:16;
+   } dw2;
+
+   struct {
+      GLuint clip_x2:16;
+      GLuint clip_y2:16;
+   } dw3;
+      
+   GLuint dest_base_addr;
+   GLuint background_color;
+   GLuint foreground_color;
+   GLuint pattern_base_addr;
+};
+
+
+struct xy_text_immediate_blit {
+   struct {
+      GLuint length:8;
+      GLuint pad2:3;
+      GLuint dst_tiled:1;
+      GLuint pad1:4;
+      GLuint byte_packed:1;
+      GLuint pad0:5;
+      GLuint opcode:7;
+      GLuint client:3;
+   } dw0;
+
+   struct {
+      GLuint dest_x1:16;
+      GLuint dest_y1:16;
+   } dw1;
+
+   struct {
+      GLuint dest_x2:16;
+      GLuint dest_y2:16;
+   } dw2;   
+
+   /* Src bitmap data follows as inline dwords.
+    */
+};
+
+
+#define CLIENT_2D 0x2
+#define OPCODE_XY_SETUP_BLT 0x1
+#define OPCODE_XY_COLOR_BLT 0x50
+#define OPCODE_XY_TEXT_IMMEDIATE_BLT 0x31
+
+#endif
diff --git a/src/mesa/drivers/dri/i915/intel_tex.c b/src/mesa/drivers/dri/i915/intel_tex.c
index 5bd280652af..d77ce749a3e 100644..120000
--- a/src/mesa/drivers/dri/i915/intel_tex.c
+++ b/src/mesa/drivers/dri/i915/intel_tex.c
@@ -1,877 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "image.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texmem.h"
-#include "texobj.h"
-#include "swrast/swrast.h"
-
-#include "mm.h"
-
-#include "intel_screen.h"
-#include "intel_batchbuffer.h"
-#include "intel_context.h"
-#include "intel_tex.h"
-#include "intel_ioctl.h"
-
-
-
-static GLboolean
-intelValidateClientStorage( intelContextPtr intel, GLenum target,
-			    GLint internalFormat,
-			    GLint srcWidth, GLint srcHeight, 
-			    GLenum format, GLenum type,  const void *pixels,
-			    const struct gl_pixelstore_attrib *packing,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage)
-
-{
-   GLcontext *ctx = &intel->ctx;
-   int texelBytes;
-
-   if (0)
-      fprintf(stderr, "intformat %s format %s type %s\n",
-	      _mesa_lookup_enum_by_nr( internalFormat ),
-	      _mesa_lookup_enum_by_nr( format ),
-	      _mesa_lookup_enum_by_nr( type ));
-
-   if (!ctx->Unpack.ClientStorage)
-      return 0;
-
-   if (ctx->_ImageTransferState ||
-       texImage->IsCompressed ||
-       texObj->GenerateMipmap)
-      return 0;
-
-
-   /* This list is incomplete
-    */
-   switch ( internalFormat ) {
-   case GL_RGBA:
-      if ( format == GL_BGRA && type == GL_UNSIGNED_INT_8_8_8_8_REV ) {
-	 texImage->TexFormat = &_mesa_texformat_argb8888;
-	 texelBytes = 4;
-      }
-      else
-	 return 0;
-      break;
-
-   case GL_RGB:
-      if ( format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5 ) {
-	 texImage->TexFormat = &_mesa_texformat_rgb565;
-	 texelBytes = 2;
-      }
-      else
-	 return 0;
-      break;
-
-   case GL_YCBCR_MESA:
-      if ( format == GL_YCBCR_MESA && 
-	   type == GL_UNSIGNED_SHORT_8_8_REV_APPLE ) {
-	 texImage->TexFormat = &_mesa_texformat_ycbcr_rev;
-	 texelBytes = 2;
-      }
-      else if ( format == GL_YCBCR_MESA && 
-		(type == GL_UNSIGNED_SHORT_8_8_APPLE || 
-		 type == GL_UNSIGNED_BYTE)) {
-	 texImage->TexFormat = &_mesa_texformat_ycbcr;
-	 texelBytes = 2;
-      }
-      else
-	 return 0;
-      break;
-      
-	 
-   default:
-      return 0;
-   }
-
-   /* Could deal with these packing issues, but currently don't:
-    */
-   if (packing->SkipPixels || 
-       packing->SkipRows || 
-       packing->SwapBytes ||
-       packing->LsbFirst) {
-      return 0;
-   }
-
-   {      
-      GLint srcRowStride = _mesa_image_row_stride(packing, srcWidth,
-						  format, type);
-
-      
-      if (0)
-	 fprintf(stderr, "%s: srcRowStride %d/%x\n", 
-		 __FUNCTION__, srcRowStride, srcRowStride);
-
-      /* Could check this later in upload, pitch restrictions could be
-       * relaxed, but would need to store the image pitch somewhere,
-       * as packing details might change before image is uploaded:
-       */
-      if (!intelIsAgpMemory( intel, pixels, srcHeight * srcRowStride ) ||
-	  (srcRowStride & 63))
-	 return 0;
-
-
-      /* Have validated that _mesa_transfer_teximage would be a straight
-       * memcpy at this point.  NOTE: future calls to TexSubImage will
-       * overwrite the client data.  This is explicitly mentioned in the
-       * extension spec.
-       */
-      texImage->Data = (void *)pixels;
-      texImage->IsClientData = GL_TRUE;
-      texImage->RowStride = srcRowStride / texelBytes;
-      return 1;
-   }
-}
-
- 
-
-static void intelTexImage1D( GLcontext *ctx, GLenum target, GLint level,
-			    GLint internalFormat,
-			    GLint width, GLint border,
-			    GLenum format, GLenum type, const GLvoid *pixels,
-			    const struct gl_pixelstore_attrib *packing,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-
-   assert(t);
-   intelFlush( ctx );
-   driSwapOutTextureObject( t );
-
-   texImage->IsClientData = GL_FALSE;
-
-   _mesa_store_teximage1d( ctx, target, level, internalFormat,
-			   width, border, format, type,
-			   pixels, packing, texObj, texImage );
-
-   t->dirty_images[0] |= (1 << level);
-}
-
-static void intelTexSubImage1D( GLcontext *ctx, 
-			       GLenum target,
-			       GLint level,	
-			       GLint xoffset,
-				GLsizei width,
-			       GLenum format, GLenum type,
-			       const GLvoid *pixels,
-			       const struct gl_pixelstore_attrib *packing,
-			       struct gl_texture_object *texObj,
-			       struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-
-   assert(t);
-   intelFlush( ctx );
-   driSwapOutTextureObject( t );
-
-   _mesa_store_texsubimage1d(ctx, target, level, xoffset, width, 
-			     format, type, pixels, packing, texObj,
-			     texImage);
-}
-
-
-/* Handles 2D, CUBE, RECT:
- */
-static void intelTexImage2D( GLcontext *ctx, GLenum target, GLint level,
-			    GLint internalFormat,
-			    GLint width, GLint height, GLint border,
-			    GLenum format, GLenum type, const GLvoid *pixels,
-			    const struct gl_pixelstore_attrib *packing,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-   GLuint face;
-
-   /* which cube face or ordinary 2D image */
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
-      face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
-      ASSERT(face < 6);
-      break;
-   default:
-      face = 0;
-   }
-
-   assert(t);
-   intelFlush( ctx );
-   driSwapOutTextureObject( t );
-   texImage->IsClientData = GL_FALSE;
-
-   if (intelValidateClientStorage( INTEL_CONTEXT(ctx), target, 
-				   internalFormat, 
-				   width, height, 
-				   format, type, pixels, 
-				   packing, texObj, texImage)) {
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, "%s: Using client storage\n", __FUNCTION__); 
-   }
-   else {
-      _mesa_store_teximage2d( ctx, target, level, internalFormat,
-			      width, height, border, format, type,
-			      pixels, packing, texObj, texImage );
-
-      t->dirty_images[face] |= (1 << level);
-   }
-}
-
-static void intelTexSubImage2D( GLcontext *ctx, 
-			       GLenum target,
-			       GLint level,	
-			       GLint xoffset, GLint yoffset,
-			       GLsizei width, GLsizei height,
-			       GLenum format, GLenum type,
-			       const GLvoid *pixels,
-			       const struct gl_pixelstore_attrib *packing,
-			       struct gl_texture_object *texObj,
-			       struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-   GLuint face;
-
-   /* which cube face or ordinary 2D image */
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
-      face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
-      ASSERT(face < 6);
-      break;
-   default:
-      face = 0;
-   }
-
-   if (texImage->IsClientData &&
-       (char *)pixels == (char *)texImage->Data + 
-       ((xoffset + yoffset * texImage->RowStride) * 
-	texImage->TexFormat->TexelBytes)) {
-
-      /* Notification only - no upload required */
-   }
-   else {
-      assert( t ); /* this _should_ be true */
-      intelFlush( ctx );
-      driSwapOutTextureObject( t );
-
-      _mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width, 
-				height, format, type, pixels, packing, texObj,
-				texImage);
-
-      t->dirty_images[face] |= (1 << level);
-   }
-}
-
-static void intelCompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level,
-                              GLint internalFormat,
-                              GLint width, GLint height, GLint border,
-                              GLsizei imageSize, const GLvoid *data,
-                              struct gl_texture_object *texObj,
-                              struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-   GLuint face;
-
-   /* which cube face or ordinary 2D image */
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
-      face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
-      ASSERT(face < 6);
-      break;
-   default:
-      face = 0;
-   }
-
-   assert(t);
-   intelFlush( ctx );
-   
-   driSwapOutTextureObject( t );
-   texImage->IsClientData = GL_FALSE;
-
-   if (INTEL_DEBUG & DEBUG_TEXTURE)
-     fprintf(stderr, "%s: Using normal storage\n", __FUNCTION__); 
-   
-   _mesa_store_compressed_teximage2d(ctx, target, level, internalFormat, width,
-				     height, border, imageSize, data, texObj, texImage);
-   
-   t->dirty_images[face] |= (1 << level);
-}
-
-
-static void intelCompressedTexSubImage2D( GLcontext *ctx, GLenum target, GLint level,
-                                 GLint xoffset, GLint yoffset,
-                                 GLsizei width, GLsizei height,
-                                 GLenum format,
-                                 GLsizei imageSize, const GLvoid *data,
-                                 struct gl_texture_object *texObj,
-                                 struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-   GLuint face;
-
-
-   /* which cube face or ordinary 2D image */
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
-      face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
-      ASSERT(face < 6);
-      break;
-   default:
-      face = 0;
-   }
-
-   assert( t ); /* this _should_ be true */
-   intelFlush( ctx );
-   driSwapOutTextureObject( t );
-   
-   _mesa_store_compressed_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
-					height, format, imageSize, data, texObj, texImage);
-   
-   t->dirty_images[face] |= (1 << level);
-}
-
-
-static void intelTexImage3D( GLcontext *ctx, GLenum target, GLint level,
-                            GLint internalFormat,
-                            GLint width, GLint height, GLint depth,
-                            GLint border,
-                            GLenum format, GLenum type, const GLvoid *pixels,
-                            const struct gl_pixelstore_attrib *packing,
-                            struct gl_texture_object *texObj,
-                            struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-
-   assert(t);
-   driSwapOutTextureObject( t );
-   texImage->IsClientData = GL_FALSE;
-
-   _mesa_store_teximage3d(ctx, target, level, internalFormat,
-			  width, height, depth, border,
-			  format, type, pixels,
-			  &ctx->Unpack, texObj, texImage);
-   
-   t->dirty_images[0] |= (1 << level);
-}
-
-
-static void
-intelTexSubImage3D( GLcontext *ctx, GLenum target, GLint level,
-                   GLint xoffset, GLint yoffset, GLint zoffset,
-                   GLsizei width, GLsizei height, GLsizei depth,
-                   GLenum format, GLenum type,
-                   const GLvoid *pixels,
-                   const struct gl_pixelstore_attrib *packing,
-                   struct gl_texture_object *texObj,
-                   struct gl_texture_image *texImage )
-{
-   driTextureObject * t = (driTextureObject *) texObj->DriverData;
-
-   assert( t ); /* this _should_ be true */
-   driSwapOutTextureObject( t );
-
-   _mesa_store_texsubimage3d(ctx, target, level, xoffset, yoffset, zoffset,
-                             width, height, depth,
-                             format, type, pixels, packing, texObj, texImage);
-
-   t->dirty_images[0] |= (1 << level);
-}
-
-
-
-
-static void intelDeleteTexture( GLcontext *ctx, struct gl_texture_object *tObj )
-{
-   driTextureObject * t = (driTextureObject *) tObj->DriverData;
-
-   if ( t != NULL ) {
-      intelFlush( ctx );
-      driDestroyTextureObject( t );
-   }
-   
-   /* Free mipmap images and the texture object itself */
-   _mesa_delete_texture_object(ctx, tObj);
-}
-
-
-static const struct gl_texture_format *
-intelChooseTextureFormat( GLcontext *ctx, GLint internalFormat,
-			 GLenum format, GLenum type )
-{
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
-   const GLboolean do32bpt = ( intel->intelScreen->cpp == 4 &&
-			       intel->intelScreen->tex.size > 4*1024*1024);
-
-   switch ( internalFormat ) {
-   case 4:
-   case GL_RGBA:
-   case GL_COMPRESSED_RGBA:
-      if ( format == GL_BGRA ) {
-	 if ( type == GL_UNSIGNED_INT_8_8_8_8_REV ) {
-	    return &_mesa_texformat_argb8888;
-	 }
-         else if ( type == GL_UNSIGNED_SHORT_4_4_4_4_REV ) {
-            return &_mesa_texformat_argb4444;
-	 }
-         else if ( type == GL_UNSIGNED_SHORT_1_5_5_5_REV ) {
-	    return &_mesa_texformat_argb1555;
-	 }
-      }
-      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444;
-
-   case 3:
-   case GL_RGB:
-   case GL_COMPRESSED_RGB:
-      if ( format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5 ) {
-	 return &_mesa_texformat_rgb565;
-      }
-      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_rgb565;
-
-   case GL_RGBA8:
-   case GL_RGB10_A2:
-   case GL_RGBA12:
-   case GL_RGBA16:
-      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444;
-
-   case GL_RGBA4:
-   case GL_RGBA2:
-      return &_mesa_texformat_argb4444;
-
-   case GL_RGB5_A1:
-      return &_mesa_texformat_argb1555;
-
-   case GL_RGB8:
-   case GL_RGB10:
-   case GL_RGB12:
-   case GL_RGB16:
-      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_rgb565;
-
-   case GL_RGB5:
-   case GL_RGB4:
-   case GL_R3_G3_B2:
-      return &_mesa_texformat_rgb565;
-
-   case GL_ALPHA:
-   case GL_ALPHA4:
-   case GL_ALPHA8:
-   case GL_ALPHA12:
-   case GL_ALPHA16:
-   case GL_COMPRESSED_ALPHA:
-      return &_mesa_texformat_a8;
-
-   case 1:
-   case GL_LUMINANCE:
-   case GL_LUMINANCE4:
-   case GL_LUMINANCE8:
-   case GL_LUMINANCE12:
-   case GL_LUMINANCE16:
-   case GL_COMPRESSED_LUMINANCE:
-      return &_mesa_texformat_l8;
-
-   case 2:
-   case GL_LUMINANCE_ALPHA:
-   case GL_LUMINANCE4_ALPHA4:
-   case GL_LUMINANCE6_ALPHA2:
-   case GL_LUMINANCE8_ALPHA8:
-   case GL_LUMINANCE12_ALPHA4:
-   case GL_LUMINANCE12_ALPHA12:
-   case GL_LUMINANCE16_ALPHA16:
-   case GL_COMPRESSED_LUMINANCE_ALPHA:
-      return &_mesa_texformat_al88;
-
-   case GL_INTENSITY:
-   case GL_INTENSITY4:
-   case GL_INTENSITY8:
-   case GL_INTENSITY12:
-   case GL_INTENSITY16:
-   case GL_COMPRESSED_INTENSITY:
-      return &_mesa_texformat_i8;
-
-   case GL_YCBCR_MESA:
-      if (type == GL_UNSIGNED_SHORT_8_8_MESA ||
-	  type == GL_UNSIGNED_BYTE)
-         return &_mesa_texformat_ycbcr;
-      else
-         return &_mesa_texformat_ycbcr_rev;
-
-   case GL_COMPRESSED_RGB_FXT1_3DFX:
-     return &_mesa_texformat_rgb_fxt1;
-   case GL_COMPRESSED_RGBA_FXT1_3DFX:
-     return &_mesa_texformat_rgba_fxt1;
-
-   case GL_RGB_S3TC:
-   case GL_RGB4_S3TC:
-   case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
-     return &_mesa_texformat_rgb_dxt1;
-
-   case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
-     return &_mesa_texformat_rgba_dxt1;
-
-   case GL_RGBA_S3TC:
-   case GL_RGBA4_S3TC:
-   case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
-     return &_mesa_texformat_rgba_dxt3;
-
-   case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
-      return &_mesa_texformat_rgba_dxt5;
-
-   case GL_DEPTH_COMPONENT:
-   case GL_DEPTH_COMPONENT16:
-   case GL_DEPTH_COMPONENT24:
-   case GL_DEPTH_COMPONENT32:
-      return &_mesa_texformat_z16;
-
-   default:
-      fprintf(stderr, "unexpected texture format %s in %s\n", 
-	      _mesa_lookup_enum_by_nr(internalFormat),
-	      __FUNCTION__);
-      return NULL;
-   }
-
-   return NULL; /* never get here */
-}
-
-
-
-void intelDestroyTexObj(intelContextPtr intel, intelTextureObjectPtr t)
-{
-   unsigned   i;
-
-   if ( intel == NULL ) 
-      return;
-
-   if ( t->age > intel->dirtyAge )
-      intel->dirtyAge = t->age;
-
-   for ( i = 0 ; i < MAX_TEXTURE_UNITS ; i++ ) {
-      if ( t == intel->CurrentTexObj[ i ] ) 
-	 intel->CurrentTexObj[ i ] = NULL;
-   }
-}
-
-
-
-/* Upload an image from mesa's internal copy.  Image may be 1D, 2D or
- * 3D.  Cubemaps are expanded elsewhere.
- */
-static void intelUploadTexImage( intelContextPtr intel,
-				 intelTextureObjectPtr t,
-				 const struct gl_texture_image *image,
-				 const GLuint offset )
-{
-
-   if (!image || !image->Data) 
-      return;
-
-   if (image->Depth == 1 && image->IsClientData) {
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, "Blit uploading\n");
-
-      /* Do it with a blit.
-       */
-      intelEmitCopyBlitLocked( intel,
-			       image->TexFormat->TexelBytes,
-			       image->RowStride, /* ? */
-			       intelGetMemoryOffsetMESA( NULL, 0, image->Data ),
-			       t->Pitch / image->TexFormat->TexelBytes,
-			       intelGetMemoryOffsetMESA( NULL, 0, t->BufAddr + offset ),
-			       0, 0,
-			       0, 0,
-			       image->Width,
-			       image->Height);
-   }
-   else if (image->IsCompressed) {
-      GLuint row_len = 0;
-      GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
-      GLubyte *src = (GLubyte *)image->Data;
-      GLuint j;
-
-      /* must always copy whole blocks (8/16 bytes) */
-      switch (image->InternalFormat) {
-	case GL_COMPRESSED_RGB_FXT1_3DFX:
-	case GL_COMPRESSED_RGBA_FXT1_3DFX:
-	case GL_RGB_S3TC:
-	case GL_RGB4_S3TC:
-	case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
-	case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
-	  row_len = (image->Width * 2 + 7) & ~7;
-	  break;
-	case GL_RGBA_S3TC:
-	case GL_RGBA4_S3TC:
-	case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
-	case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
-	  row_len = (image->Width * 4 + 15) & ~15;
-	  break;
-	default:
-	  fprintf(stderr,"Internal Compressed format not supported %d\n", image->InternalFormat);
-	  break;
-      }
-
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, 
-		 "Upload image %dx%dx%d offset %xm row_len %x "
-		 "pitch %x depth_pitch %x\n",
-		 image->Width, image->Height, image->Depth, offset,
-		 row_len, t->Pitch, t->depth_pitch);
-
-      if (row_len) {
-	 for (j = 0 ; j < (image->Height + 3)/4 ; j++, dst += (t->Pitch)) {
-	   __memcpy(dst, src, row_len );
-	   src += row_len;
-	 }
-      }
-   }
-   /* Time for another vtbl entry:
-    */
-   else if (intel->intelScreen->deviceID == PCI_CHIP_I945_G ||
-            intel->intelScreen->deviceID == PCI_CHIP_I945_GM ||
-            intel->intelScreen->deviceID == PCI_CHIP_I945_GME ||
-            intel->intelScreen->deviceID == PCI_CHIP_G33_G ||
-            intel->intelScreen->deviceID == PCI_CHIP_Q33_G ||
-            intel->intelScreen->deviceID == PCI_CHIP_Q35_G) {
-      GLuint row_len = image->Width * image->TexFormat->TexelBytes;
-      GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
-      GLubyte *src = (GLubyte *)image->Data;
-      GLuint d, j;
-
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, 
-		 "Upload image %dx%dx%d offset %xm row_len %x "
-		 "pitch %x depth_pitch %x\n",
-		 image->Width, image->Height, image->Depth, offset,
-		 row_len, t->Pitch, t->depth_pitch);
-
-      if (row_len == t->Pitch) {
-	 memcpy( dst, src, row_len * image->Height * image->Depth );
-      }
-      else { 
-	 GLuint x = 0, y = 0;
-
-	 for (d = 0 ; d < image->Depth ; d++) {
-	    GLubyte *dst0 = dst + x + y * t->Pitch;
-
-	    for (j = 0 ; j < image->Height ; j++) {
-	       __memcpy(dst0, src, row_len );
-	       src += row_len;
-	       dst0 += t->Pitch;
-	    }
-
-	    x += MIN2(4, row_len); /* Guess: 4 byte minimum alignment */
-	    if (x > t->Pitch) {
-	       x = 0;
-	       y += image->Height;
-	    }
-	 }
-      }
-
-   }
-   else {
-      GLuint row_len = image->Width * image->TexFormat->TexelBytes;
-      GLubyte *dst = (GLubyte *)(t->BufAddr + offset);
-      GLubyte *src = (GLubyte *)image->Data;
-      GLuint d, j;
-
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, 
-		 "Upload image %dx%dx%d offset %xm row_len %x "
-		 "pitch %x depth_pitch %x\n",
-		 image->Width, image->Height, image->Depth, offset,
-		 row_len, t->Pitch, t->depth_pitch);
-
-      if (row_len == t->Pitch) {
-	 for (d = 0; d < image->Depth; d++) {
-	    memcpy( dst, src, t->Pitch * image->Height );
-	    dst += t->depth_pitch;
-	    src += row_len * image->Height;
-	 }
-      }
-      else { 
-	 for (d = 0 ; d < image->Depth ; d++) {
-	    for (j = 0 ; j < image->Height ; j++) {
-	       __memcpy(dst, src, row_len );
-	       src += row_len;
-	       dst += t->Pitch;
-	    }
-
-	    dst += t->depth_pitch - (t->Pitch * image->Height);
-	 }
-      }
-   }
-}
-
-
-
-int intelUploadTexImages( intelContextPtr intel, 
-			  intelTextureObjectPtr t,
-			  GLuint face)
-{
-   const int numLevels = t->base.lastLevel - t->base.firstLevel + 1;
-   const struct gl_texture_image *firstImage = t->image[face][t->base.firstLevel].image;
-   int pitch = firstImage->RowStride * firstImage->TexFormat->TexelBytes;
-
-   /* Can we texture out of the existing client data? */
-   if ( numLevels == 1 &&
-	firstImage->IsClientData &&
-	(pitch & 3) == 0) {
-
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 fprintf(stderr, "AGP texturing from client memory\n");
-
-      t->TextureOffset = intelAgpOffsetFromVirtual( intel, firstImage->Data );
-      t->BufAddr = 0;
-      t->dirty = ~0;
-      return GL_TRUE;
-   }
-   else {
-      if (INTEL_DEBUG & DEBUG_TEXTURE) 
-	 fprintf(stderr, "Uploading client data to agp\n");
-
-      INTEL_FIREVERTICES( intel );
-      LOCK_HARDWARE( intel );
-
-      if ( t->base.memBlock == NULL ) {
-	 int heap;
-
-	 heap = driAllocateTexture( intel->texture_heaps, intel->nr_heaps,
-				    (driTextureObject *) t );
-	 if ( heap == -1 ) {
-	    UNLOCK_HARDWARE( intel );
-	    return GL_FALSE;
-	 }
-
-	 /* Set the base offset of the texture image */
-	 t->BufAddr = (GLubyte *) (intel->intelScreen->tex.map + 
-				   t->base.memBlock->ofs);
-	 t->TextureOffset = intel->intelScreen->tex.offset + t->base.memBlock->ofs;
-	 t->dirty = ~0;
-      }
-
-
-      /* Let the world know we've used this memory recently.
-       */
-      driUpdateTextureLRU( (driTextureObject *) t );
-
-
-      /* Upload any images that are new */
-      if (t->base.dirty_images[face]) {
-	 int i;
-
- 	 intelWaitForIdle( intel );
-	    
-	 for (i = 0 ; i < numLevels ; i++) { 
-	    int level = i + t->base.firstLevel;
-
-	    if (t->base.dirty_images[face] & (1<<level)) {
-
-	       const struct gl_texture_image *image = t->image[face][i].image;
-	       GLuint offset = t->image[face][i].offset;
-
-     	       if (INTEL_DEBUG & DEBUG_TEXTURE)
-	          fprintf(stderr, "upload level %d, offset %x\n", 
-			  level, offset);
-
-	       intelUploadTexImage( intel, t, image, offset );
-	    }
-	 }
-	 t->base.dirty_images[face] = 0;
-	 intel->perf_boxes |= I830_BOX_TEXTURE_LOAD;
-      }
-      
-      UNLOCK_HARDWARE( intel );
-      return GL_TRUE;
-   }
-}
-
-/**
- * Allocate a new texture object.
- * Called via ctx->Driver.NewTextureObject.
- * Note: this function will be called during context creation to
- * allocate the default texture objects.
- * Note: we could use containment here to 'derive' the driver-specific
- * texture object from the core mesa gl_texture_object.  Not done at this time.
- */
-static struct gl_texture_object *
-intelNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
-{
-   struct gl_texture_object *obj = _mesa_new_texture_object(ctx, name, target);
-   INTEL_CONTEXT(ctx)->vtbl.alloc_tex_obj( obj );
-   return obj;
-}
-
-
-void intelInitTextureFuncs( struct dd_function_table *functions )
-{
-   functions->NewTextureObject          = intelNewTextureObject;
-   functions->ChooseTextureFormat       = intelChooseTextureFormat;
-   functions->TexImage1D                = intelTexImage1D;
-   functions->TexImage2D                = intelTexImage2D;
-   functions->TexImage3D                = intelTexImage3D;
-   functions->TexSubImage1D             = intelTexSubImage1D;
-   functions->TexSubImage2D             = intelTexSubImage2D;
-   functions->TexSubImage3D             = intelTexSubImage3D;
-   functions->CopyTexImage1D            = _swrast_copy_teximage1d;
-   functions->CopyTexImage2D            = _swrast_copy_teximage2d;
-   functions->CopyTexSubImage1D         = _swrast_copy_texsubimage1d;
-   functions->CopyTexSubImage2D         = _swrast_copy_texsubimage2d;
-   functions->CopyTexSubImage3D         = _swrast_copy_texsubimage3d;
-   functions->DeleteTexture             = intelDeleteTexture;
-   functions->UpdateTexturePalette      = NULL;
-   functions->IsTextureResident         = driIsTextureResident;
-   functions->TestProxyTexImage         = _mesa_test_proxy_teximage;
-   functions->DeleteTexture             = intelDeleteTexture;
-   functions->CompressedTexImage2D      = intelCompressedTexImage2D;
-   functions->CompressedTexSubImage2D   = intelCompressedTexSubImage2D;
-}
+../intel/intel_tex.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_copy.c b/src/mesa/drivers/dri/i915/intel_tex_copy.c
new file mode 120000
index 00000000000..87196c5d1ed
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_copy.c
@@ -0,0 +1 @@
+../intel/intel_tex_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_format.c b/src/mesa/drivers/dri/i915/intel_tex_format.c
new file mode 120000
index 00000000000..3415f754705
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_format.c
@@ -0,0 +1 @@
+../intel/intel_tex_format.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c
new file mode 120000
index 00000000000..567abe4974e
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_image.c
@@ -0,0 +1 @@
+../intel/intel_tex_image.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_layout.c b/src/mesa/drivers/dri/i915/intel_tex_layout.c
new file mode 120000
index 00000000000..fe61b441945
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_layout.c
@@ -0,0 +1 @@
+../intel/intel_tex_layout.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_subimage.c b/src/mesa/drivers/dri/i915/intel_tex_subimage.c
new file mode 120000
index 00000000000..b3a8a3d7ca7
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_subimage.c
@@ -0,0 +1 @@
+../intel/intel_tex_subimage.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_tex_validate.c b/src/mesa/drivers/dri/i915/intel_tex_validate.c
new file mode 120000
index 00000000000..41a75674c27
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_tex_validate.c
@@ -0,0 +1 @@
+../intel/intel_tex_validate.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i915/intel_texmem.c b/src/mesa/drivers/dri/i915/intel_texmem.c
deleted file mode 100644
index 09beec95b8c..00000000000
--- a/src/mesa/drivers/dri/i915/intel_texmem.c
+++ /dev/null
@@ -1,72 +0,0 @@
-#include "texmem.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "macros.h"
-
-#include "intel_tex.h"
-
-static GLuint
-driLog2( GLuint n )
-{
-   GLuint log2;
-
-   for ( log2 = 1 ; n > 1 ; log2++ ) {
-      n >>= 1;
-   }
-
-   return log2;
-}
-
-static void calculate_heap_size( driTexHeap * heap, unsigned size, 
-				 unsigned nr_regions, unsigned alignmentShift )
-{
-   unsigned     l;
-
-   l = driLog2( (size - 1) / nr_regions );
-   if ( l < alignmentShift )
-   {
-      l = alignmentShift;
-   }
-
-   heap->logGranularity = l;
-   heap->size = size & ~((1L << l) - 1);
-}
-
-
-GLboolean 
-intel_driReinitTextureHeap( driTexHeap *heap,
-			    unsigned size )
-{
-   driTextureObject *t, *tmp;
-
-   /* Kick out everything:
-    */
-   foreach_s ( t, tmp, & heap->texture_objects ) {
-      if ( t->tObj != NULL ) {
-	 driSwapOutTextureObject( t );
-      }
-      else {
-	 driDestroyTextureObject( t );
-      }
-   }
-   
-   /* Destroy the memory manager:
-    */
-   mmDestroy( heap->memory_heap );
-      
-   /* Recreate the memory manager:
-    */
-   calculate_heap_size(heap, size, heap->nrRegions, heap->alignmentShift);
-   heap->memory_heap = mmInit( 0, heap->size );
-   if ( heap->memory_heap == NULL ) {
-      fprintf(stderr, "driReinitTextureHeap: couldn't recreate memory heap\n");
-      FREE( heap );
-      return GL_FALSE;
-   }
-
-   make_empty_list( & heap->texture_objects );
-
-   return GL_TRUE;
-}
-
-
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index b2787ee60ac..c4708dc7abc 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -25,11 +25,19 @@
  * 
  **************************************************************************/
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
-#include "dd.h"
+/** @file intel_tris.c
+ *
+ * This file contains functions for managing the vertex buffer and emitting
+ * primitives into it.
+ */
+
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/texobj.h"
+#include "main/state.h"
+#include "main/dd.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -38,19 +46,288 @@
 #include "tnl/t_vertex.h"
 
 #include "intel_screen.h"
+#include "intel_context.h"
 #include "intel_tris.h"
 #include "intel_batchbuffer.h"
+#include "intel_buffers.h"
 #include "intel_reg.h"
 #include "intel_span.h"
+#include "intel_tex.h"
+#include "intel_chipset.h"
+#include "i830_context.h"
+#include "i830_reg.h"
+
+static void intelRenderPrimitive(GLcontext * ctx, GLenum prim);
+static void intelRasterPrimitive(GLcontext * ctx, GLenum rprim,
+                                 GLuint hwprim);
+
+static void
+intel_flush_inline_primitive(struct intel_context *intel)
+{
+   GLuint used = intel->batch->ptr - intel->prim.start_ptr;
+
+   assert(intel->prim.primitive != ~0);
+
+/*    _mesa_printf("/\n"); */
+
+   if (used < 8)
+      goto do_discard;
+
+   *(int *) intel->prim.start_ptr = (_3DPRIMITIVE |
+                                     intel->prim.primitive | (used / 4 - 2));
+
+   goto finished;
+
+ do_discard:
+   intel->batch->ptr -= used;
+
+ finished:
+   intel->prim.primitive = ~0;
+   intel->prim.start_ptr = 0;
+   intel->prim.flush = 0;
+}
+
+static void intel_start_inline(struct intel_context *intel, uint32_t prim)
+{
+   BATCH_LOCALS;
+   uint32_t batch_flags = LOOP_CLIPRECTS;
+
+   intel_wait_flips(intel);
+   intel->vtbl.emit_state(intel);
+
+   intel->no_batch_wrap = GL_TRUE;
+
+   /*_mesa_printf("%s *", __progname);*/
+
+   /* Emit a slot which will be filled with the inline primitive
+    * command later.
+    */
+   BEGIN_BATCH(2, batch_flags);
+   OUT_BATCH(0);
+
+   assert((intel->batch->dirty_state & (1<<1)) == 0);
+
+   intel->prim.start_ptr = intel->batch->ptr;
+   intel->prim.primitive = prim;
+   intel->prim.flush = intel_flush_inline_primitive;
+
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+
+   intel->no_batch_wrap = GL_FALSE;
+/*    _mesa_printf(">"); */
+}
+
+static void intel_wrap_inline(struct intel_context *intel)
+{
+   GLuint prim = intel->prim.primitive;
+
+   intel_flush_inline_primitive(intel);
+   intel_batchbuffer_flush(intel->batch);
+   intel_start_inline(intel, prim);  /* ??? */
+}
+
+static GLuint *intel_extend_inline(struct intel_context *intel, GLuint dwords)
+{
+   GLuint sz = dwords * sizeof(GLuint);
+   GLuint *ptr;
+
+   assert(intel->prim.flush == intel_flush_inline_primitive);
+
+   if (intel_batchbuffer_space(intel->batch) < sz)
+      intel_wrap_inline(intel);
+
+/*    _mesa_printf("."); */
+
+   intel->vtbl.assert_not_dirty(intel);
+
+   ptr = (GLuint *) intel->batch->ptr;
+   intel->batch->ptr += sz;
+
+   return ptr;
+}
+
+/** Sets the primitive type for a primitive sequence, flushing as needed. */
+void intel_set_prim(struct intel_context *intel, uint32_t prim)
+{
+   /* if we have no VBOs */
 
-/* XXX we shouldn't include these headers in this file, but we need them
- * for fallbackStrings, below.
+   if (intel->intelScreen->no_vbo) {
+      intel_start_inline(intel, prim);
+      return;
+   }
+   if (prim != intel->prim.primitive) {
+      INTEL_FIREVERTICES(intel);
+      intel->prim.primitive = prim;
+   }
+}
+
+/** Returns mapped VB space for the given number of vertices */
+uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
+{
+   uint32_t *addr;
+
+   if (intel->intelScreen->no_vbo) {
+      return intel_extend_inline(intel, count * intel->vertex_size);
+   }
+
+   /* Check for space in the existing VB */
+   if (intel->prim.vb_bo == NULL ||
+       (intel->prim.current_offset +
+	count * intel->vertex_size * 4) > INTEL_VB_SIZE ||
+       (intel->prim.count + count) >= (1 << 16)) {
+      /* Flush existing prim if any */
+      INTEL_FIREVERTICES(intel);
+
+      intel_finish_vb(intel);
+
+      /* Start a new VB */
+      if (intel->prim.vb == NULL)
+	 intel->prim.vb = malloc(INTEL_VB_SIZE);
+      intel->prim.vb_bo = dri_bo_alloc(intel->bufmgr, "vb",
+				       INTEL_VB_SIZE, 4);
+      intel->prim.start_offset = 0;
+      intel->prim.current_offset = 0;
+   }
+
+   intel->prim.flush = intel_flush_prim;
+
+   addr = (uint32_t *)(intel->prim.vb + intel->prim.current_offset);
+   intel->prim.current_offset += intel->vertex_size * 4 * count;
+   intel->prim.count += count;
+
+   return addr;
+}
+
+/** Dispatches the accumulated primitive to the batchbuffer. */
+void intel_flush_prim(struct intel_context *intel)
+{
+   BATCH_LOCALS;
+   dri_bo *aper_array[2];
+   dri_bo *vb_bo;
+   unsigned int offset, count;
+
+   /* Must be called after an intel_start_prim. */
+   assert(intel->prim.primitive != ~0);
+
+   if (intel->prim.count == 0)
+      return;
+
+   /* Clear the current prims out of the context state so that a batch flush
+    * flush triggered by wait_flips or emit_state doesn't loop back to
+    * flush_prim again.
+    */
+   vb_bo = intel->prim.vb_bo;
+   dri_bo_reference(vb_bo);
+   count = intel->prim.count;
+   intel->prim.count = 0;
+   offset = intel->prim.start_offset;
+   intel->prim.start_offset = intel->prim.current_offset;
+   if (!IS_9XX(intel->intelScreen->deviceID))
+      intel->prim.start_offset = ALIGN(intel->prim.start_offset, 128);
+   intel->prim.flush = NULL;
+
+   intel_wait_flips(intel);
+
+   intel->vtbl.emit_state(intel);
+
+   aper_array[0] = intel->batch->buf;
+   aper_array[1] = vb_bo;
+   if (dri_bufmgr_check_aperture_space(aper_array, 2)) {
+      intel_batchbuffer_flush(intel->batch);
+      intel->vtbl.emit_state(intel);
+   }
+
+   /* Ensure that we don't start a new batch for the following emit, which
+    * depends on the state just emitted. emit_state should be making sure we
+    * have the space for this.
+    */
+   intel->no_batch_wrap = GL_TRUE;
+
+   /* Check that we actually emitted the state into this batch, using the
+    * UPLOAD_CTX bit as the signal.
+    */
+   assert((intel->batch->dirty_state & (1<<1)) == 0);
+
+#if 0
+   printf("emitting %d..%d=%d vertices size %d\n", offset,
+	  intel->prim.current_offset, count,
+	  intel->vertex_size * 4);
+#endif
+
+   if (IS_9XX(intel->intelScreen->deviceID)) {
+      BEGIN_BATCH(5, LOOP_CLIPRECTS);
+      OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
+		I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
+      assert((offset & !S0_VB_OFFSET_MASK) == 0);
+      OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
+      OUT_BATCH((intel->vertex_size << S1_VERTEX_WIDTH_SHIFT) |
+		(intel->vertex_size << S1_VERTEX_PITCH_SHIFT));
+
+      OUT_BATCH(_3DPRIMITIVE |
+		PRIM_INDIRECT |
+		PRIM_INDIRECT_SEQUENTIAL |
+		intel->prim.primitive |
+		count);
+      OUT_BATCH(0); /* Beginning vertex index */
+      ADVANCE_BATCH();
+   } else {
+      struct i830_context *i830 = i830_context(&intel->ctx);
+
+      BEGIN_BATCH(5, LOOP_CLIPRECTS);
+      OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
+		I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
+      /* S0 */
+      assert((offset & !S0_VB_OFFSET_MASK_830) == 0);
+      OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
+		offset | (intel->vertex_size << S0_VB_PITCH_SHIFT_830) |
+		S0_VB_ENABLE_830);
+      /* S2
+       * This is somewhat unfortunate -- VB width is tied up with
+       * vertex format data that we've already uploaded through
+       * _3DSTATE_VFT[01]_CMD.  We may want to replace emits of VFT state with
+       * STATE_IMMEDIATE_1 like this to avoid duplication.
+       */
+      OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >>
+		VFT0_TEX_COUNT_SHIFT << S2_TEX_COUNT_SHIFT_830 |
+		(i830->state.Ctx[I830_CTXREG_VF2] << 16) |
+		intel->vertex_size << S2_VERTEX_0_WIDTH_SHIFT_830);
+
+      OUT_BATCH(_3DPRIMITIVE |
+		PRIM_INDIRECT |
+		PRIM_INDIRECT_SEQUENTIAL |
+		intel->prim.primitive |
+		count);
+      OUT_BATCH(0); /* Beginning vertex index */
+      ADVANCE_BATCH();
+   }
+
+   intel->no_batch_wrap = GL_FALSE;
+
+   dri_bo_unreference(vb_bo);
+}
+
+/**
+ * Uploads the locally-accumulated VB into the buffer object.
+ *
+ * This avoids us thrashing the cachelines in and out as the buffer gets
+ * filled, dispatched, then reused as the hardware completes rendering from it,
+ * and also lets us clflush less if we dispatch with a partially-filled VB.
+ *
+ * This is called normally from get_space when we're finishing a BO, but also
+ * at batch flush time so that we don't try accessing the contents of a
+ * just-dispatched buffer.
  */
-#include "i830_context.h"
-#include "i915_context.h"
+void intel_finish_vb(struct intel_context *intel)
+{
+   if (intel->prim.vb_bo == NULL)
+      return;
 
-static void intelRenderPrimitive( GLcontext *ctx, GLenum prim );
-static void intelRasterPrimitive( GLcontext *ctx, GLenum rprim, GLuint hwprim );
+   dri_bo_subdata(intel->prim.vb_bo, 0, intel->prim.start_offset,
+		  intel->prim.vb);
+   dri_bo_unreference(intel->prim.vb_bo);
+   intel->prim.vb_bo = NULL;
+}
 
 /***********************************************************************
  *                    Emit primitives as inline vertices               *
@@ -69,75 +346,81 @@ do {								\
 #else
 #define COPY_DWORDS( j, vb, vertsize, v )	\
 do {						\
-   if (0) fprintf(stderr, "\n");	\
    for ( j = 0 ; j < vertsize ; j++ ) {		\
-      if (0) fprintf(stderr, "   -- v(%d): %x/%f\n",j,	\
-	      ((GLuint *)v)[j],			\
-	      ((GLfloat *)v)[j]);		\
       vb[j] = ((GLuint *)v)[j];			\
    }						\
    vb += vertsize;				\
 } while (0)
 #endif
 
-static void __inline__ intel_draw_quad( intelContextPtr intel,
-					intelVertexPtr v0,
-					intelVertexPtr v1,
-					intelVertexPtr v2,
-					intelVertexPtr v3 )
+static void
+intel_draw_quad(struct intel_context *intel,
+                intelVertexPtr v0,
+                intelVertexPtr v1, intelVertexPtr v2, intelVertexPtr v3)
 {
    GLuint vertsize = intel->vertex_size;
-   GLuint *vb = intelExtendInlinePrimitive( intel, 6 * vertsize );
+   GLuint *vb = intel_get_prim_space(intel, 6);
    int j;
 
-   COPY_DWORDS( j, vb, vertsize, v0 );
-   COPY_DWORDS( j, vb, vertsize, v1 );
-   COPY_DWORDS( j, vb, vertsize, v3 );
-   COPY_DWORDS( j, vb, vertsize, v1 );
-   COPY_DWORDS( j, vb, vertsize, v2 );
-   COPY_DWORDS( j, vb, vertsize, v3 );
+   COPY_DWORDS(j, vb, vertsize, v0);
+   COPY_DWORDS(j, vb, vertsize, v1);
+
+   /* If smooth shading, draw like a trifan which gives better
+    * rasterization.  Otherwise draw as two triangles with provoking
+    * vertex in third position as required for flat shading.
+    */
+   if (intel->ctx.Light.ShadeModel == GL_FLAT) {
+      COPY_DWORDS(j, vb, vertsize, v3);
+      COPY_DWORDS(j, vb, vertsize, v1);
+   }
+   else {
+      COPY_DWORDS(j, vb, vertsize, v2);
+      COPY_DWORDS(j, vb, vertsize, v0);
+   }
+
+   COPY_DWORDS(j, vb, vertsize, v2);
+   COPY_DWORDS(j, vb, vertsize, v3);
 }
 
-static void __inline__ intel_draw_triangle( intelContextPtr intel,
-					    intelVertexPtr v0,
-					    intelVertexPtr v1,
-					    intelVertexPtr v2 )
+static void
+intel_draw_triangle(struct intel_context *intel,
+                    intelVertexPtr v0, intelVertexPtr v1, intelVertexPtr v2)
 {
    GLuint vertsize = intel->vertex_size;
-   GLuint *vb = intelExtendInlinePrimitive( intel, 3 * vertsize );
+   GLuint *vb = intel_get_prim_space(intel, 3);
    int j;
-   
-   COPY_DWORDS( j, vb, vertsize, v0 );
-   COPY_DWORDS( j, vb, vertsize, v1 );
-   COPY_DWORDS( j, vb, vertsize, v2 );
+
+   COPY_DWORDS(j, vb, vertsize, v0);
+   COPY_DWORDS(j, vb, vertsize, v1);
+   COPY_DWORDS(j, vb, vertsize, v2);
 }
 
 
-static __inline__ void intel_draw_line( intelContextPtr intel,
-					intelVertexPtr v0,
-					intelVertexPtr v1 )
+static void
+intel_draw_line(struct intel_context *intel,
+                intelVertexPtr v0, intelVertexPtr v1)
 {
    GLuint vertsize = intel->vertex_size;
-   GLuint *vb = intelExtendInlinePrimitive( intel, 2 * vertsize );
+   GLuint *vb = intel_get_prim_space(intel, 2);
    int j;
 
-   COPY_DWORDS( j, vb, vertsize, v0 );
-   COPY_DWORDS( j, vb, vertsize, v1 );
+   COPY_DWORDS(j, vb, vertsize, v0);
+   COPY_DWORDS(j, vb, vertsize, v1);
 }
 
 
-static __inline__ void intel_draw_point( intelContextPtr intel,
-					 intelVertexPtr v0 )
+static void
+intel_draw_point(struct intel_context *intel, intelVertexPtr v0)
 {
    GLuint vertsize = intel->vertex_size;
-   GLuint *vb = intelExtendInlinePrimitive( intel, vertsize );
+   GLuint *vb = intel_get_prim_space(intel, 1);
    int j;
 
    /* Adjust for sub pixel position -- still required for conform. */
-   *(float *)&vb[0] = v0->v.x - 0.125;
-   *(float *)&vb[1] = v0->v.y - 0.125;
-   for (j = 2 ; j < vertsize ; j++)
-     vb[j] = v0->ui[j];
+   *(float *) &vb[0] = v0->v.x;
+   *(float *) &vb[1] = v0->v.y;
+   for (j = 2; j < vertsize; j++)
+      vb[j] = v0->ui[j];
 }
 
 
@@ -146,13 +429,17 @@ static __inline__ void intel_draw_point( intelContextPtr intel,
  *                Fixup for ARB_point_parameters                       *
  ***********************************************************************/
 
-static void intel_atten_point( intelContextPtr intel, intelVertexPtr v0 )
+/* Currently not working - VERT_ATTRIB_POINTSIZE isn't correctly
+ * represented in the fragment program InputsRead field.
+ */
+static void
+intel_atten_point(struct intel_context *intel, intelVertexPtr v0)
 {
    GLcontext *ctx = &intel->ctx;
    GLfloat psz[4], col[4], restore_psz, restore_alpha;
 
-   _tnl_get_attr( ctx, v0, _TNL_ATTRIB_POINTSIZE, psz );
-   _tnl_get_attr( ctx, v0, _TNL_ATTRIB_COLOR0, col );
+   _tnl_get_attr(ctx, v0, _TNL_ATTRIB_POINTSIZE, psz);
+   _tnl_get_attr(ctx, v0, _TNL_ATTRIB_COLOR0, col);
 
    restore_psz = psz[0];
    restore_alpha = col[3];
@@ -170,19 +457,19 @@ static void intel_atten_point( intelContextPtr intel, intelVertexPtr v0 )
       psz[0] = 1.0;
 
    if (restore_psz != psz[0] || restore_alpha != col[3]) {
-      _tnl_set_attr( ctx, v0, _TNL_ATTRIB_POINTSIZE, psz);
-      _tnl_set_attr( ctx, v0, _TNL_ATTRIB_COLOR0, col);
-   
-      intel_draw_point( intel, v0 );
+      _tnl_set_attr(ctx, v0, _TNL_ATTRIB_POINTSIZE, psz);
+      _tnl_set_attr(ctx, v0, _TNL_ATTRIB_COLOR0, col);
+
+      intel_draw_point(intel, v0);
 
       psz[0] = restore_psz;
       col[3] = restore_alpha;
 
-      _tnl_set_attr( ctx, v0, _TNL_ATTRIB_POINTSIZE, psz);
-      _tnl_set_attr( ctx, v0, _TNL_ATTRIB_COLOR0, col);
+      _tnl_set_attr(ctx, v0, _TNL_ATTRIB_POINTSIZE, psz);
+      _tnl_set_attr(ctx, v0, _TNL_ATTRIB_COLOR0, col);
    }
    else
-      intel_draw_point( intel, v0 );
+      intel_draw_point(intel, v0);
 }
 
 
@@ -195,45 +482,59 @@ static void intel_atten_point( intelContextPtr intel, intelVertexPtr v0 )
 
 
 
-static void intel_wpos_triangle( intelContextPtr intel,
-				 intelVertexPtr v0,
-				 intelVertexPtr v1,
-				 intelVertexPtr v2 )
+static void
+intel_wpos_triangle(struct intel_context *intel,
+                    intelVertexPtr v0, intelVertexPtr v1, intelVertexPtr v2)
 {
    GLuint offset = intel->wpos_offset;
    GLuint size = intel->wpos_size;
-   
-   __memcpy( ((char *)v0) + offset, v0, size );
-   __memcpy( ((char *)v1) + offset, v1, size );
-   __memcpy( ((char *)v2) + offset, v2, size );
+   GLfloat *v0_wpos = (GLfloat *)((char *)v0 + offset);
+   GLfloat *v1_wpos = (GLfloat *)((char *)v1 + offset);
+   GLfloat *v2_wpos = (GLfloat *)((char *)v2 + offset);
 
-   intel_draw_triangle( intel, v0, v1, v2 );
+   __memcpy(v0_wpos, v0, size);
+   __memcpy(v1_wpos, v1, size);
+   __memcpy(v2_wpos, v2, size);
+
+   v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
+   v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
+   v2_wpos[1] = -v2_wpos[1] + intel->driDrawable->h;
+
+
+   intel_draw_triangle(intel, v0, v1, v2);
 }
 
 
-static void intel_wpos_line( intelContextPtr intel,
-			     intelVertexPtr v0,
-			     intelVertexPtr v1 )
+static void
+intel_wpos_line(struct intel_context *intel,
+                intelVertexPtr v0, intelVertexPtr v1)
 {
    GLuint offset = intel->wpos_offset;
    GLuint size = intel->wpos_size;
+   GLfloat *v0_wpos = (GLfloat *)((char *)v0 + offset);
+   GLfloat *v1_wpos = (GLfloat *)((char *)v1 + offset);
+
+   __memcpy(v0_wpos, v0, size);
+   __memcpy(v1_wpos, v1, size);
 
-   __memcpy( ((char *)v0) + offset, v0, size );
-   __memcpy( ((char *)v1) + offset, v1, size );
+   v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
+   v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
 
-   intel_draw_line( intel, v0, v1 );
+   intel_draw_line(intel, v0, v1);
 }
 
 
-static void intel_wpos_point( intelContextPtr intel,
-			      intelVertexPtr v0 )
+static void
+intel_wpos_point(struct intel_context *intel, intelVertexPtr v0)
 {
    GLuint offset = intel->wpos_offset;
    GLuint size = intel->wpos_size;
+   GLfloat *v0_wpos = (GLfloat *)((char *)v0 + offset);
 
-   __memcpy( ((char *)v0) + offset, v0, size );
+   __memcpy(v0_wpos, v0, size);
+   v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
 
-   intel_draw_point( intel, v0 );
+   intel_draw_point(intel, v0);
 }
 
 
@@ -290,11 +591,12 @@ do { 						\
 #define INTEL_MAX_TRIFUNC	0x10
 
 
-static struct {
-   tnl_points_func	        points;
-   tnl_line_func		line;
-   tnl_triangle_func	triangle;
-   tnl_quad_func		quad;
+static struct
+{
+   tnl_points_func points;
+   tnl_line_func line;
+   tnl_triangle_func triangle;
+   tnl_quad_func quad;
 } rast_tab[INTEL_MAX_TRIFUNC];
 
 
@@ -355,10 +657,10 @@ do {							\
 #define VERT_RESTORE_SPEC( idx ) if (specoffset) v[idx]->ui[specoffset] = spec[idx]
 
 #define LOCAL_VARS(n)							\
-   intelContextPtr intel = INTEL_CONTEXT(ctx);				\
-   GLuint color[n], spec[n];						\
-   GLuint coloroffset = intel->coloroffset;		\
-   GLboolean specoffset = intel->specoffset;			\
+   struct intel_context *intel = intel_context(ctx);			\
+   GLuint color[n] = { 0, }, spec[n] = { 0, };				\
+   GLuint coloroffset = intel->coloroffset;				\
+   GLboolean specoffset = intel->specoffset;				\
    (void) color; (void) spec; (void) coloroffset; (void) specoffset;
 
 
@@ -366,7 +668,7 @@ do {							\
  *                Helpers for rendering unfilled primitives            *
  ***********************************************************************/
 
-static const GLuint hw_prim[GL_POLYGON+1] = {
+static const GLuint hw_prim[GL_POLYGON + 1] = {
    PRIM3D_POINTLIST,
    PRIM3D_LINELIST,
    PRIM3D_LINELIST,
@@ -456,7 +758,8 @@ static const GLuint hw_prim[GL_POLYGON+1] = {
 #include "tnl_dd/t_dd_tritmp.h"
 
 
-static void init_rast_tab( void )
+static void
+init_rast_tab(void)
 {
    init();
    init_offset();
@@ -487,10 +790,8 @@ static void init_rast_tab( void )
  * primitives.
  */
 static void
-intel_fallback_tri( intelContextPtr intel,
-		   intelVertex *v0,
-		   intelVertex *v1,
-		   intelVertex *v2 )
+intel_fallback_tri(struct intel_context *intel,
+                   intelVertex * v0, intelVertex * v1, intelVertex * v2)
 {
    GLcontext *ctx = &intel->ctx;
    SWvertex v[3];
@@ -498,19 +799,20 @@ intel_fallback_tri( intelContextPtr intel,
    if (0)
       fprintf(stderr, "\n%s\n", __FUNCTION__);
 
-   _swsetup_Translate( ctx, v0, &v[0] );
-   _swsetup_Translate( ctx, v1, &v[1] );
-   _swsetup_Translate( ctx, v2, &v[2] );
-   intelSpanRenderStart( ctx );
-   _swrast_Triangle( ctx, &v[0], &v[1], &v[2] );
-   intelSpanRenderFinish( ctx );
+   INTEL_FIREVERTICES(intel);
+
+   _swsetup_Translate(ctx, v0, &v[0]);
+   _swsetup_Translate(ctx, v1, &v[1]);
+   _swsetup_Translate(ctx, v2, &v[2]);
+   intelSpanRenderStart(ctx);
+   _swrast_Triangle(ctx, &v[0], &v[1], &v[2]);
+   intelSpanRenderFinish(ctx);
 }
 
 
 static void
-intel_fallback_line( intelContextPtr intel,
-		    intelVertex *v0,
-		    intelVertex *v1 )
+intel_fallback_line(struct intel_context *intel,
+                    intelVertex * v0, intelVertex * v1)
 {
    GLcontext *ctx = &intel->ctx;
    SWvertex v[2];
@@ -518,17 +820,18 @@ intel_fallback_line( intelContextPtr intel,
    if (0)
       fprintf(stderr, "\n%s\n", __FUNCTION__);
 
-   _swsetup_Translate( ctx, v0, &v[0] );
-   _swsetup_Translate( ctx, v1, &v[1] );
-   intelSpanRenderStart( ctx );
-   _swrast_Line( ctx, &v[0], &v[1] );
-   intelSpanRenderFinish( ctx );
-}
+   INTEL_FIREVERTICES(intel);
 
+   _swsetup_Translate(ctx, v0, &v[0]);
+   _swsetup_Translate(ctx, v1, &v[1]);
+   intelSpanRenderStart(ctx);
+   _swrast_Line(ctx, &v[0], &v[1]);
+   intelSpanRenderFinish(ctx);
+}
 
 static void
-intel_fallback_point( intelContextPtr intel,
-		     intelVertex *v0 )
+intel_fallback_point(struct intel_context *intel,
+		     intelVertex * v0)
 {
    GLcontext *ctx = &intel->ctx;
    SWvertex v[1];
@@ -536,12 +839,13 @@ intel_fallback_point( intelContextPtr intel,
    if (0)
       fprintf(stderr, "\n%s\n", __FUNCTION__);
 
-   _swsetup_Translate( ctx, v0, &v[0] );
-   intelSpanRenderStart( ctx );
-   _swrast_Point( ctx, &v[0] );
-   intelSpanRenderFinish( ctx );
-}
+   INTEL_FIREVERTICES(intel);
 
+   _swsetup_Translate(ctx, v0, &v[0]);
+   intelSpanRenderStart(ctx);
+   _swrast_Point(ctx, &v[0]);
+   intelSpanRenderFinish(ctx);
+}
 
 
 /**********************************************************************/
@@ -558,7 +862,7 @@ intel_fallback_point( intelContextPtr intel,
 #define INIT(x) intelRenderPrimitive( ctx, x )
 #undef LOCAL_VARS
 #define LOCAL_VARS						\
-    intelContextPtr intel = INTEL_CONTEXT(ctx);			\
+    struct intel_context *intel = intel_context(ctx);			\
     GLubyte *vertptr = (GLubyte *)intel->verts;			\
     const GLuint vertsize = intel->vertex_size;       	\
     const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;	\
@@ -581,10 +885,10 @@ intel_fallback_point( intelContextPtr intel,
 
 
 
-static void intelRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
-				   GLuint n )
+static void
+intelRenderClippedPoly(GLcontext * ctx, const GLuint * elts, GLuint n)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
    GLuint prim = intel->render_primitive;
@@ -593,39 +897,40 @@ static void intelRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
     */
    {
       GLuint *tmp = VB->Elts;
-      VB->Elts = (GLuint *)elts;
-      tnl->Driver.Render.PrimTabElts[GL_POLYGON]( ctx, 0, n, 
-						  PRIM_BEGIN|PRIM_END );
+      VB->Elts = (GLuint *) elts;
+      tnl->Driver.Render.PrimTabElts[GL_POLYGON] (ctx, 0, n,
+                                                  PRIM_BEGIN | PRIM_END);
       VB->Elts = tmp;
    }
 
    /* Restore the render primitive
     */
    if (prim != GL_POLYGON)
-      tnl->Driver.Render.PrimitiveNotify( ctx, prim );
+      tnl->Driver.Render.PrimitiveNotify(ctx, prim);
 }
 
-static void intelRenderClippedLine( GLcontext *ctx, GLuint ii, GLuint jj )
+static void
+intelRenderClippedLine(GLcontext * ctx, GLuint ii, GLuint jj)
 {
    TNLcontext *tnl = TNL_CONTEXT(ctx);
 
-   tnl->Driver.Render.Line( ctx, ii, jj );
+   tnl->Driver.Render.Line(ctx, ii, jj);
 }
 
-static void intelFastRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
-				       GLuint n )
+static void
+intelFastRenderClippedPoly(GLcontext * ctx, const GLuint * elts, GLuint n)
 {
-   intelContextPtr intel = INTEL_CONTEXT( ctx );
+   struct intel_context *intel = intel_context(ctx);
    const GLuint vertsize = intel->vertex_size;
-   GLuint *vb = intelExtendInlinePrimitive( intel, (n-2) * 3 * vertsize );
-   GLubyte *vertptr = (GLubyte *)intel->verts;
-   const GLuint *start = (const GLuint *)V(elts[0]);
-   int i,j;
-
-   for (i = 2 ; i < n ; i++) {
-      COPY_DWORDS( j, vb, vertsize, V(elts[i-1]) );
-      COPY_DWORDS( j, vb, vertsize, V(elts[i]) );
-      COPY_DWORDS( j, vb, vertsize, start );
+   GLuint *vb = intel_get_prim_space(intel, (n - 2) * 3);
+   GLubyte *vertptr = (GLubyte *) intel->verts;
+   const GLuint *start = (const GLuint *) V(elts[0]);
+   int i, j;
+
+   for (i = 2; i < n; i++) {
+      COPY_DWORDS(j, vb, vertsize, V(elts[i - 1]));
+      COPY_DWORDS(j, vb, vertsize, V(elts[i]));
+      COPY_DWORDS(j, vb, vertsize, start);
    }
 }
 
@@ -636,68 +941,75 @@ static void intelFastRenderClippedPoly( GLcontext *ctx, const GLuint *elts,
 
 
 
-#define POINT_FALLBACK (0)
-#define LINE_FALLBACK (DD_LINE_STIPPLE)
-#define TRI_FALLBACK (0)
-#define ANY_FALLBACK_FLAGS (POINT_FALLBACK|LINE_FALLBACK|TRI_FALLBACK|\
-                            DD_TRI_STIPPLE|DD_POINT_ATTEN)
-#define ANY_RASTER_FLAGS (DD_TRI_LIGHT_TWOSIDE|DD_TRI_OFFSET|DD_TRI_UNFILLED)
+#define ANY_FALLBACK_FLAGS (DD_LINE_STIPPLE | DD_TRI_STIPPLE | DD_POINT_ATTEN | DD_POINT_SMOOTH | DD_TRI_SMOOTH)
+#define ANY_RASTER_FLAGS (DD_TRI_LIGHT_TWOSIDE | DD_TRI_OFFSET | DD_TRI_UNFILLED)
 
-void intelChooseRenderState(GLcontext *ctx)
+void
+intelChooseRenderState(GLcontext * ctx)
 {
    TNLcontext *tnl = TNL_CONTEXT(ctx);
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
    GLuint flags = ctx->_TriangleCaps;
    const struct gl_fragment_program *fprog = ctx->FragmentProgram._Current;
    GLboolean have_wpos = (fprog && (fprog->Base.InputsRead & FRAG_BIT_WPOS));
    GLuint index = 0;
 
    if (INTEL_DEBUG & DEBUG_STATE)
-     fprintf(stderr,"\n%s\n",__FUNCTION__);
+      fprintf(stderr, "\n%s\n", __FUNCTION__);
 
-   if ((flags & (ANY_FALLBACK_FLAGS|ANY_RASTER_FLAGS)) || have_wpos) {
+   if ((flags & (ANY_FALLBACK_FLAGS | ANY_RASTER_FLAGS)) || have_wpos) {
 
       if (flags & ANY_RASTER_FLAGS) {
-	 if (flags & DD_TRI_LIGHT_TWOSIDE)    index |= INTEL_TWOSIDE_BIT;
-	 if (flags & DD_TRI_OFFSET)	      index |= INTEL_OFFSET_BIT;
-	 if (flags & DD_TRI_UNFILLED)	      index |= INTEL_UNFILLED_BIT;
+         if (flags & DD_TRI_LIGHT_TWOSIDE)
+            index |= INTEL_TWOSIDE_BIT;
+         if (flags & DD_TRI_OFFSET)
+            index |= INTEL_OFFSET_BIT;
+         if (flags & DD_TRI_UNFILLED)
+            index |= INTEL_UNFILLED_BIT;
       }
 
       if (have_wpos) {
-	 intel->draw_point = intel_wpos_point;
-	 intel->draw_line = intel_wpos_line;
-	 intel->draw_tri = intel_wpos_triangle;
+         intel->draw_point = intel_wpos_point;
+         intel->draw_line = intel_wpos_line;
+         intel->draw_tri = intel_wpos_triangle;
 
-	 /* Make sure these get called:
-	  */
-	 index |= INTEL_FALLBACK_BIT;
+         /* Make sure these get called:
+          */
+         index |= INTEL_FALLBACK_BIT;
       }
       else {
-	 intel->draw_point = intel_draw_point;
-	 intel->draw_line = intel_draw_line;
-	 intel->draw_tri = intel_draw_triangle;
+         intel->draw_point = intel_draw_point;
+         intel->draw_line = intel_draw_line;
+         intel->draw_tri = intel_draw_triangle;
       }
 
       /* Hook in fallbacks for specific primitives.
        */
-      if (flags & ANY_FALLBACK_FLAGS)
-      {
-	 if (flags & POINT_FALLBACK)
-	    intel->draw_point = intel_fallback_point;
-
-	 if (flags & LINE_FALLBACK)
-	    intel->draw_line = intel_fallback_line;
-
-	 if (flags & TRI_FALLBACK)
-	    intel->draw_tri = intel_fallback_tri;
-
-	 if ((flags & DD_TRI_STIPPLE) && !intel->hw_stipple) 
-	    intel->draw_tri = intel_fallback_tri;
-
-	 if (flags & DD_POINT_ATTEN)
-	    intel->draw_point = intel_atten_point;
-
-	 index |= INTEL_FALLBACK_BIT;
+      if (flags & ANY_FALLBACK_FLAGS) {
+         if (flags & DD_LINE_STIPPLE)
+            intel->draw_line = intel_fallback_line;
+
+         if ((flags & DD_TRI_STIPPLE) && !intel->hw_stipple)
+            intel->draw_tri = intel_fallback_tri;
+
+         if (flags & DD_TRI_SMOOTH) {
+	    if (intel->strict_conformance)
+	       intel->draw_tri = intel_fallback_tri;
+	 }
+
+         if (flags & DD_POINT_ATTEN) {
+	    if (0)
+	       intel->draw_point = intel_atten_point;
+	    else
+	       intel->draw_point = intel_fallback_point;
+	 }
+
+	 if (flags & DD_POINT_SMOOTH) {
+	    if (intel->strict_conformance)
+	       intel->draw_point = intel_fallback_point;
+	 }
+
+         index |= INTEL_FALLBACK_BIT;
       }
    }
 
@@ -710,20 +1022,21 @@ void intelChooseRenderState(GLcontext *ctx)
       tnl->Driver.Render.Quad = rast_tab[index].quad;
 
       if (index == 0) {
-	 tnl->Driver.Render.PrimTabVerts = intel_render_tab_verts;
-	 tnl->Driver.Render.PrimTabElts = intel_render_tab_elts;
-	 tnl->Driver.Render.ClippedLine = line; /* from tritmp.h */
-	 tnl->Driver.Render.ClippedPolygon = intelFastRenderClippedPoly;
-      } else {
-	 tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
-	 tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
-	 tnl->Driver.Render.ClippedLine = intelRenderClippedLine;
-	 tnl->Driver.Render.ClippedPolygon = intelRenderClippedPoly;
+         tnl->Driver.Render.PrimTabVerts = intel_render_tab_verts;
+         tnl->Driver.Render.PrimTabElts = intel_render_tab_elts;
+         tnl->Driver.Render.ClippedLine = line; /* from tritmp.h */
+         tnl->Driver.Render.ClippedPolygon = intelFastRenderClippedPoly;
+      }
+      else {
+         tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
+         tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
+         tnl->Driver.Render.ClippedLine = intelRenderClippedLine;
+         tnl->Driver.Render.ClippedPolygon = intelRenderClippedPoly;
       }
    }
 }
 
-static const GLenum reduced_prim[GL_POLYGON+1] = {
+static const GLenum reduced_prim[GL_POLYGON + 1] = {
    GL_POINTS,
    GL_LINES,
    GL_LINES,
@@ -744,35 +1057,52 @@ static const GLenum reduced_prim[GL_POLYGON+1] = {
 
 
 
-static void intelRunPipeline( GLcontext *ctx )
+static void
+intelRunPipeline(GLcontext * ctx)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
+
+   _mesa_lock_context_textures(ctx);
+   
+   if (ctx->NewState)
+      _mesa_update_state_locked(ctx);
 
    if (intel->NewGLState) {
       if (intel->NewGLState & _NEW_TEXTURE) {
-	 intel->vtbl.update_texture_state( intel ); 
+         intel->vtbl.update_texture_state(intel);
       }
 
       if (!intel->Fallback) {
-	 if (intel->NewGLState & _INTEL_NEW_RENDERSTATE)
-	    intelChooseRenderState( ctx );
+         if (intel->NewGLState & _INTEL_NEW_RENDERSTATE)
+            intelChooseRenderState(ctx);
       }
 
       intel->NewGLState = 0;
    }
 
-   _tnl_run_pipeline( ctx );
+   _tnl_run_pipeline(ctx);
+
+   _mesa_unlock_context_textures(ctx);
 }
 
-static void intelRenderStart( GLcontext *ctx )
+static void
+intelRenderStart(GLcontext * ctx)
 {
-   INTEL_CONTEXT(ctx)->vtbl.render_start( INTEL_CONTEXT(ctx) );
+   struct intel_context *intel = intel_context(ctx);
+
+   intel->vtbl.render_start(intel_context(ctx));
+   intel->vtbl.emit_state(intel);
 }
 
-static void intelRenderFinish( GLcontext *ctx )
+static void
+intelRenderFinish(GLcontext * ctx)
 {
-   if (INTEL_CONTEXT(ctx)->RenderIndex & INTEL_FALLBACK_BIT)
-      _swrast_flush( ctx );
+   struct intel_context *intel = intel_context(ctx);
+
+   if (intel->RenderIndex & INTEL_FALLBACK_BIT)
+      _swrast_flush(ctx);
+
+   INTEL_FIREVERTICES(intel);
 }
 
 
@@ -781,28 +1111,33 @@ static void intelRenderFinish( GLcontext *ctx )
  /* System to flush dma and emit state changes based on the rasterized
   * primitive.
   */
-static void intelRasterPrimitive( GLcontext *ctx, GLenum rprim, GLuint hwprim )
+static void
+intelRasterPrimitive(GLcontext * ctx, GLenum rprim, GLuint hwprim)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
 
    if (0)
-      fprintf(stderr, "%s %s %x\n", __FUNCTION__, 
-	      _mesa_lookup_enum_by_nr(rprim), hwprim);
+      fprintf(stderr, "%s %s %x\n", __FUNCTION__,
+              _mesa_lookup_enum_by_nr(rprim), hwprim);
+
+   intel->vtbl.reduced_primitive_state(intel, rprim);
 
-   intel->vtbl.reduced_primitive_state( intel, rprim );
-    
    /* Start a new primitive.  Arrange to have it flushed later on.
     */
-   if (hwprim != intel->prim.primitive) 
-      intelStartInlinePrimitive( intel, hwprim );
+   if (hwprim != intel->prim.primitive) {
+      INTEL_FIREVERTICES(intel);
+
+      intel_set_prim(intel, hwprim);
+   }
 }
 
 
-/* 
- */
-static void intelRenderPrimitive( GLcontext *ctx, GLenum prim )
+ /* 
+  */
+static void
+intelRenderPrimitive(GLcontext * ctx, GLenum prim)
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
 
    if (0)
       fprintf(stderr, "%s %s\n", __FUNCTION__, _mesa_lookup_enum_by_nr(prim));
@@ -817,63 +1152,54 @@ static void intelRenderPrimitive( GLcontext *ctx, GLenum prim )
     * lower level functions in that case, potentially pingponging the
     * state:
     */
-   if (reduced_prim[prim] == GL_TRIANGLES && 
+   if (reduced_prim[prim] == GL_TRIANGLES &&
        (ctx->_TriangleCaps & DD_TRI_UNFILLED))
       return;
 
    /* Set some primitive-dependent state and Start? a new primitive.
     */
-   intelRasterPrimitive( ctx, reduced_prim[prim], hw_prim[prim] );
+   intelRasterPrimitive(ctx, reduced_prim[prim], hw_prim[prim]);
 }
 
 
-/**********************************************************************/
-/*           Transition to/from hardware rasterization.               */
-/**********************************************************************/
-
-static struct {
-   GLuint bit;
-   const char *str;
-} fallbackStrings[] = {
-   { INTEL_FALLBACK_DRAW_BUFFER, "Draw buffer" },
-   { INTEL_FALLBACK_READ_BUFFER, "Read buffer" },
-   { INTEL_FALLBACK_USER, "User" },
-   { INTEL_FALLBACK_NO_BATCHBUFFER, "No Batchbuffer" },
-   { INTEL_FALLBACK_NO_TEXMEM, "No Texmem" },
-   { INTEL_FALLBACK_RENDERMODE, "Rendermode" },
-
-   { I830_FALLBACK_TEXTURE, "i830 texture" },
-   { I830_FALLBACK_COLORMASK, "i830 colormask" },
-   { I830_FALLBACK_STENCIL, "i830 stencil" },
-   { I830_FALLBACK_STIPPLE, "i830 stipple" },
-   { I830_FALLBACK_LOGICOP, "i830 logicop" },
-
-   { I915_FALLBACK_TEXTURE, "i915 texture" },
-   { I915_FALLBACK_COLORMASK, "i915 colormask" },
-   { I915_FALLBACK_STENCIL, "i915 stencil" },
-   { I915_FALLBACK_STIPPLE, "i915 stipple" },
-   { I915_FALLBACK_PROGRAM, "i915 program" },
-   { I915_FALLBACK_LOGICOP, "i915 logicop" },
-   { I915_FALLBACK_POLYGON_SMOOTH, "i915 polygon smooth" },
-   { I915_FALLBACK_POINT_SMOOTH, "i915 point smooth" },
-
-   { 0, NULL }
+ /**********************************************************************/
+ /*           Transition to/from hardware rasterization.               */
+ /**********************************************************************/
+
+static char *fallbackStrings[] = {
+   [0] = "Draw buffer",
+   [1] = "Read buffer",
+   [2] = "Depth buffer",
+   [3] = "Stencil buffer",
+   [4] = "User disable",
+   [5] = "Render mode",
+
+   [12] = "Texture",
+   [13] = "Color mask",
+   [14] = "Stencil",
+   [15] = "Stipple",
+   [16] = "Program",
+   [17] = "Logic op",
+   [18] = "Smooth polygon",
+   [19] = "Smooth point",
 };
 
 
-static const char *
+static char *
 getFallbackString(GLuint bit)
 {
-   int i;
-   for (i = 0; fallbackStrings[i].bit; i++) {
-      if (fallbackStrings[i].bit == bit)
-         return fallbackStrings[i].str;
+   int i = 0;
+   while (bit > 1) {
+      i++;
+      bit >>= 1;
    }
-   return "unknown fallback bit";
+   return fallbackStrings[i];
 }
 
 
-void intelFallback( intelContextPtr intel, GLuint bit, GLboolean mode )
+
+void
+intelFallback(struct intel_context *intel, GLuint bit, GLboolean mode)
 {
    GLcontext *ctx = &intel->ctx;
    TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -883,20 +1209,19 @@ void intelFallback( intelContextPtr intel, GLuint bit, GLboolean mode )
       intel->Fallback |= bit;
       if (oldfallback == 0) {
          intelFlush(ctx);
-         if (INTEL_DEBUG & DEBUG_FALLBACKS) 
-            fprintf(stderr, "ENTER FALLBACK 0x%x: %s\n",
+         if (INTEL_DEBUG & DEBUG_FALLBACKS)
+            fprintf(stderr, "ENTER FALLBACK %x: %s\n",
                     bit, getFallbackString(bit));
-         _swsetup_Wakeup( ctx );
+         _swsetup_Wakeup(ctx);
          intel->RenderIndex = ~0;
       }
    }
    else {
       intel->Fallback &= ~bit;
       if (oldfallback == bit) {
-         _swrast_flush( ctx );
-         if (INTEL_DEBUG & DEBUG_FALLBACKS) 
-            fprintf(stderr, "LEAVE FALLBACK 0x%x: %s\n",
-                    bit, getFallbackString(bit));
+         _swrast_flush(ctx);
+         if (INTEL_DEBUG & DEBUG_FALLBACKS)
+            fprintf(stderr, "LEAVE FALLBACK %s\n", getFallbackString(bit));
          tnl->Driver.Render.Start = intelRenderStart;
          tnl->Driver.Render.PrimitiveNotify = intelRenderPrimitive;
          tnl->Driver.Render.Finish = intelRenderFinish;
@@ -904,18 +1229,99 @@ void intelFallback( intelContextPtr intel, GLuint bit, GLboolean mode )
          tnl->Driver.Render.CopyPV = _tnl_copy_pv;
          tnl->Driver.Render.Interp = _tnl_interp;
 
-         _tnl_invalidate_vertex_state( ctx, ~0 );
-         _tnl_invalidate_vertices( ctx, ~0 );
-         _tnl_install_attrs( ctx, 
-                             intel->vertex_attrs, 
-                             intel->vertex_attr_count,
-                             intel->ViewportMatrix.m, 0 ); 
+         _tnl_invalidate_vertex_state(ctx, ~0);
+         _tnl_invalidate_vertices(ctx, ~0);
+         _tnl_install_attrs(ctx,
+                            intel->vertex_attrs,
+                            intel->vertex_attr_count,
+                            intel->ViewportMatrix.m, 0);
 
          intel->NewGLState |= _INTEL_NEW_RENDERSTATE;
       }
    }
 }
 
+union fi
+{
+   GLfloat f;
+   GLint i;
+};
+
+
+/**********************************************************************/
+/*             Used only with the metaops callbacks.                  */
+/**********************************************************************/
+static void
+intel_meta_draw_poly(struct intel_context *intel,
+                     GLuint n,
+                     GLfloat xy[][2],
+                     GLfloat z, GLuint color, GLfloat tex[][2])
+{
+   union fi *vb;
+   GLint i;
+   GLboolean was_locked = intel->locked;
+   unsigned int saved_vertex_size = intel->vertex_size;
+
+   if (!was_locked)
+       LOCK_HARDWARE(intel);
+
+   intel->vertex_size = 6;
+
+   /* All 3d primitives should be emitted with LOOP_CLIPRECTS,
+    * otherwise the drawing origin (DR4) might not be set correctly.
+    */
+   intel_set_prim(intel, PRIM3D_TRIFAN);
+   vb = (union fi *) intel_get_prim_space(intel, n);
+
+   for (i = 0; i < n; i++) {
+      vb[0].f = xy[i][0];
+      vb[1].f = xy[i][1];
+      vb[2].f = z;
+      vb[3].i = color;
+      vb[4].f = tex[i][0];
+      vb[5].f = tex[i][1];
+      vb += 6;
+   }
+
+   INTEL_FIREVERTICES(intel);
+
+   intel->vertex_size = saved_vertex_size;
+
+   if (!was_locked)
+       UNLOCK_HARDWARE(intel);
+}
+
+static void
+intel_meta_draw_quad(struct intel_context *intel,
+                     GLfloat x0, GLfloat x1,
+                     GLfloat y0, GLfloat y1,
+                     GLfloat z,
+                     GLuint color,
+                     GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1)
+{
+   GLfloat xy[4][2];
+   GLfloat tex[4][2];
+
+   xy[0][0] = x0;
+   xy[0][1] = y0;
+   xy[1][0] = x1;
+   xy[1][1] = y0;
+   xy[2][0] = x1;
+   xy[2][1] = y1;
+   xy[3][0] = x0;
+   xy[3][1] = y1;
+
+   tex[0][0] = s0;
+   tex[0][1] = t0;
+   tex[1][0] = s1;
+   tex[1][1] = t0;
+   tex[2][0] = s1;
+   tex[2][1] = t1;
+   tex[3][0] = s0;
+   tex[3][1] = t1;
+
+   intel_meta_draw_poly(intel, 4, xy, z, color, tex);
+}
 
 
 
@@ -924,8 +1330,10 @@ void intelFallback( intelContextPtr intel, GLuint bit, GLboolean mode )
 /**********************************************************************/
 
 
-void intelInitTriFuncs( GLcontext *ctx )
+void
+intelInitTriFuncs(GLcontext * ctx)
 {
+   struct intel_context *intel = intel_context(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
    static int firsttime = 1;
 
@@ -942,4 +1350,6 @@ void intelInitTriFuncs( GLcontext *ctx )
    tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
    tnl->Driver.Render.CopyPV = _tnl_copy_pv;
    tnl->Driver.Render.Interp = _tnl_interp;
+
+   intel->vtbl.meta_draw_quad = intel_meta_draw_quad;
 }
diff --git a/src/mesa/drivers/dri/i915/intel_tris.h b/src/mesa/drivers/dri/i915/intel_tris.h
index d7e382fdb3e..55b60a47f91 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.h
+++ b/src/mesa/drivers/dri/i915/intel_tris.h
@@ -28,7 +28,11 @@
 #ifndef INTELTRIS_INC
 #define INTELTRIS_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
+
+#define INTEL_VB_SIZE		(32 * 1024)
+/** 3 dwords of state_immediate and 2 of 3dprim, in intel_flush_prim */
+#define INTEL_PRIM_EMIT_SIZE	(5 * 4)
 
 #define _INTEL_NEW_RENDERSTATE (_DD_NEW_LINE_STIPPLE |		\
 			       _DD_NEW_TRI_UNFILLED |		\
@@ -38,9 +42,13 @@
 			       _NEW_PROGRAM |		\
 			       _NEW_POLYGONSTIPPLE)
 
-extern void intelInitTriFuncs( GLcontext *ctx );
+extern void intelInitTriFuncs(GLcontext * ctx);
+
+extern void intelChooseRenderState(GLcontext * ctx);
 
-extern void intelPrintRenderState( const char *msg, GLuint state );
-extern void intelChooseRenderState( GLcontext *ctx );
+void intel_set_prim(struct intel_context *intel, uint32_t prim);
+GLuint *intel_get_prim_space(struct intel_context *intel, unsigned int count);
+void intel_flush_prim(struct intel_context *intel);
+void intel_finish_vb(struct intel_context *intel);
 
 #endif
diff --git a/src/mesa/drivers/dri/i915/server/i830_common.h b/src/mesa/drivers/dri/i915/server/i830_common.h
deleted file mode 100644
index 2b0fee82a88..00000000000
--- a/src/mesa/drivers/dri/i915/server/i830_common.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/**************************************************************************
-
-Copyright 2001 VA Linux Systems Inc., Fremont, California.
-Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef _I830_COMMON_H_
-#define _I830_COMMON_H_
-
-
-#define I830_NR_TEX_REGIONS 255	/* maximum due to use of chars for next/prev */
-#define I830_LOG_MIN_TEX_REGION_SIZE 14
-
-
-/* Driver specific DRM command indices
- * NOTE: these are not OS specific, but they are driver specific
- */
-#define DRM_I830_INIT                     0x00
-#define DRM_I830_FLUSH                    0x01
-#define DRM_I830_FLIP                     0x02
-#define DRM_I830_BATCHBUFFER              0x03
-#define DRM_I830_IRQ_EMIT                 0x04
-#define DRM_I830_IRQ_WAIT                 0x05
-#define DRM_I830_GETPARAM                 0x06
-#define DRM_I830_SETPARAM                 0x07
-#define DRM_I830_ALLOC                    0x08
-#define DRM_I830_FREE                     0x09
-#define DRM_I830_INIT_HEAP                0x0a
-#define DRM_I830_CMDBUFFER                0x0b
-#define DRM_I830_DESTROY_HEAP             0x0c
-
-typedef struct {
-   enum {
-      I830_INIT_DMA = 0x01,
-      I830_CLEANUP_DMA = 0x02,
-      I830_RESUME_DMA = 0x03
-   } func;
-   unsigned int mmio_offset;
-   int sarea_priv_offset;
-   unsigned int ring_start;
-   unsigned int ring_end;
-   unsigned int ring_size;
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch;
-   unsigned int pitch_bits;
-   unsigned int back_pitch;
-   unsigned int depth_pitch;
-   unsigned int cpp;
-   unsigned int chipset;
-} drmI830Init;
-
-typedef struct {
-	drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
-        int last_upload;	/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
-	int last_dispatch;	/* age of the most recently dispatched buffer */
-	int ctxOwner;		/* last context to upload state */
-	int texAge;
-        int pf_enabled;		/* is pageflipping allowed? */
-        int pf_active;               
-        int pf_current_page;	/* which buffer is being displayed? */
-        int perf_boxes;	        /* performance boxes to be displayed */   
-	int width, height;      /* screen size in pixels */
-
-	drm_handle_t front_handle;
-	int front_offset;
-	int front_size;
-
-	drm_handle_t back_handle;
-	int back_offset;
-	int back_size;
-
-	drm_handle_t depth_handle;
-	int depth_offset;
-	int depth_size;
-
-	drm_handle_t tex_handle;
-	int tex_offset;
-	int tex_size;
-	int log_tex_granularity;
-	int pitch;
-	int rotation;           /* 0, 90, 180 or 270 */
-	int rotated_offset;
-	int rotated_size;
-	int rotated_pitch;
-	int virtualX, virtualY;
-
-	unsigned int front_tiled;
-	unsigned int back_tiled;
-	unsigned int depth_tiled;
-	unsigned int rotated_tiled;
-	unsigned int rotated2_tiled;
-
-	int pipeA_x;
-	int pipeA_y;
-	int pipeA_w;
-	int pipeA_h;
-	int pipeB_x;
-	int pipeB_y;
-	int pipeB_w;
-	int pipeB_h;
-} drmI830Sarea;
-
-/* Flags for perf_boxes
- */
-#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
-#define I830_BOX_FLIP          0x2 /* populated by kernel */
-#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
-
-
-typedef struct {
-   	int start;		/* agp offset */
-	int used;		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830BatchBuffer;
-
-typedef struct {
-   	char *buf;		/* agp offset */
-	int sz; 		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830CmdBuffer;
- 
-typedef struct {
-	int *irq_seq;
-} drmI830IrqEmit;
-
-typedef struct {
-	int irq_seq;
-} drmI830IrqWait;
-
-typedef struct {
-	int param;
-	int *value;
-} drmI830GetParam;
-
-#define I830_PARAM_IRQ_ACTIVE     1
-#define I830_PARAM_ALLOW_BATCHBUFFER   2 
-
-typedef struct {
-	int param;
-	int value;
-} drmI830SetParam;
-
-#define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
-#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
-#define I830_SETPARAM_ALLOW_BATCHBUFFER         3
-
-
-/* A memory manager for regions of shared memory:
- */
-#define I830_MEM_REGION_AGP 1
-
-typedef struct {
-	int region;
-	int alignment;
-	int size;
-	int *region_offset;	/* offset from start of fb or agp */
-} drmI830MemAlloc;
-
-typedef struct {
-	int region;
-	int region_offset;
-} drmI830MemFree;
-
-typedef struct {
-	int region;
-	int size;
-	int start;	
-} drmI830MemInitHeap;
-
-typedef struct {
-	int region;
-} drmI830MemDestroyHeap;
-
-
-#endif /* _I830_DRM_H_ */
diff --git a/src/mesa/drivers/dri/i915/server/i830_dri.h b/src/mesa/drivers/dri/i915/server/i830_dri.h
deleted file mode 100644
index 313eb759b0d..00000000000
--- a/src/mesa/drivers/dri/i915/server/i830_dri.h
+++ /dev/null
@@ -1,72 +0,0 @@
-
-#ifndef _I830_DRI_H
-#define _I830_DRI_H
-
-#include "xf86drm.h"
-#include "i830_common.h"
-
-#define I830_MAX_DRAWABLES 256
-
-#define I830_MAJOR_VERSION 1
-#define I830_MINOR_VERSION 3
-#define I830_PATCHLEVEL 0
-
-#define I830_REG_SIZE 0x80000
-
-typedef struct _I830DRIRec {
-   drm_handle_t regs;
-   drmSize regsSize;
-
-   drmSize backbufferSize;
-   drm_handle_t backbuffer;
-
-   drmSize depthbufferSize;
-   drm_handle_t depthbuffer;
-
-   drmSize rotatedSize;
-   drm_handle_t rotatedbuffer;
-
-   drm_handle_t textures;
-   int textureSize;
-
-   drm_handle_t agp_buffers;
-   drmSize agp_buf_size;
-
-   int deviceID;
-   int width;
-   int height;
-   int mem;
-   int cpp;
-   int bitsPerPixel;
-
-   int fbOffset;
-   int fbStride;
-
-   int backOffset;
-   int backPitch;
-
-   int depthOffset;
-   int depthPitch;
-
-   int rotatedOffset;
-   int rotatedPitch;
-
-   int logTextureGranularity;
-   int textureOffset;
-
-   int irq;
-   int sarea_priv_offset;
-} I830DRIRec, *I830DRIPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830ConfigPrivRec, *I830ConfigPrivPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830DRIContextRec, *I830DRIContextPtr;
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/server/intel.h b/src/mesa/drivers/dri/i915/server/intel.h
deleted file mode 100644
index d7858a20c8d..00000000000
--- a/src/mesa/drivers/dri/i915/server/intel.h
+++ /dev/null
@@ -1,328 +0,0 @@
-#ifndef _INTEL_H_
-#define _INTEL_H_
-
-#include "xf86drm.h"		/* drm_handle_t, etc */
-
-/* Intel */
-#ifndef PCI_CHIP_I810
-#define PCI_CHIP_I810              0x7121
-#define PCI_CHIP_I810_DC100        0x7123
-#define PCI_CHIP_I810_E            0x7125
-#define PCI_CHIP_I815              0x1132
-#define PCI_CHIP_I810_BRIDGE       0x7120
-#define PCI_CHIP_I810_DC100_BRIDGE 0x7122
-#define PCI_CHIP_I810_E_BRIDGE     0x7124
-#define PCI_CHIP_I815_BRIDGE       0x1130
-#endif
-
-#define PCI_CHIP_845_G			0x2562
-#define PCI_CHIP_I830_M			0x3577
-
-#ifndef PCI_CHIP_I855_GM
-#define PCI_CHIP_I855_GM	   0x3582
-#define PCI_CHIP_I855_GM_BRIDGE	   0x3580
-#endif
-
-#ifndef PCI_CHIP_I865_G
-#define PCI_CHIP_I865_G		   0x2572
-#define PCI_CHIP_I865_G_BRIDGE	   0x2570
-#endif
-
-#ifndef PCI_CHIP_I915_G
-#define PCI_CHIP_I915_G		   0x2582
-#define PCI_CHIP_I915_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I915_GM
-#define PCI_CHIP_I915_GM	   0x2592
-#define PCI_CHIP_I915_GM_BRIDGE	   0x2590
-#endif
-
-#ifndef PCI_CHIP_E7221_G
-#define PCI_CHIP_E7221_G	   0x258A
-/* Same as I915_G_BRIDGE */
-#define PCI_CHIP_E7221_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I945_G
-#define PCI_CHIP_I945_G        0x2772
-#define PCI_CHIP_I945_G_BRIDGE 0x2770
-#endif
-
-#ifndef PCI_CHIP_I945_GM
-#define PCI_CHIP_I945_GM        0x27A2
-#define PCI_CHIP_I945_GM_BRIDGE 0x27A0
-#endif
-
-#define IS_I810(pI810) (pI810->Chipset == PCI_CHIP_I810 ||	\
-			pI810->Chipset == PCI_CHIP_I810_DC100 || \
-			pI810->Chipset == PCI_CHIP_I810_E)
-#define IS_I815(pI810) (pI810->Chipset == PCI_CHIP_I815)
-#define IS_I830(pI810) (pI810->Chipset == PCI_CHIP_I830_M)
-#define IS_845G(pI810) (pI810->Chipset == PCI_CHIP_845_G)
-#define IS_I85X(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM)
-#define IS_I852(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
-#define IS_I855(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
-#define IS_I865G(pI810) (pI810->Chipset == PCI_CHIP_I865_G)
-
-#define IS_I915G(pI810) (pI810->Chipset == PCI_CHIP_I915_G || pI810->Chipset == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (pI810->Chipset == PCI_CHIP_I915_GM)
-#define IS_I945G(pI810) (pI810->Chipset == PCI_CHIP_I945_G)
-#define IS_I945GM(pI810) (pI810->Chipset == PCI_CHIP_I945_GM)
-#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810))
-
-#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810))
-
-#define I830_GMCH_CTRL		0x52
-
-
-#define I830_GMCH_GMS_MASK			0x70
-#define I830_GMCH_GMS_DISABLED		0x00
-#define I830_GMCH_GMS_LOCAL			0x10
-#define I830_GMCH_GMS_STOLEN_512	0x20
-#define I830_GMCH_GMS_STOLEN_1024	0x30
-#define I830_GMCH_GMS_STOLEN_8192	0x40
-
-#define I855_GMCH_GMS_MASK			(0x7 << 4)
-#define I855_GMCH_GMS_DISABLED			0x00
-#define I855_GMCH_GMS_STOLEN_1M			(0x1 << 4)
-#define I855_GMCH_GMS_STOLEN_4M			(0x2 << 4)
-#define I855_GMCH_GMS_STOLEN_8M			(0x3 << 4)
-#define I855_GMCH_GMS_STOLEN_16M		(0x4 << 4)
-#define I855_GMCH_GMS_STOLEN_32M		(0x5 << 4)
-#define I915G_GMCH_GMS_STOLEN_48M		(0x6 << 4)
-#define I915G_GMCH_GMS_STOLEN_64M		(0x7 << 4)
-
-typedef unsigned char Bool;
-#define TRUE 1
-#define FALSE 0
-
-#define PIPE_NONE	0<<0
-#define PIPE_CRT	1<<0
-#define PIPE_TV		1<<1
-#define PIPE_DFP	1<<2
-#define PIPE_LFP	1<<3
-#define PIPE_CRT2	1<<4
-#define PIPE_TV2	1<<5
-#define PIPE_DFP2	1<<6
-#define PIPE_LFP2	1<<7
-
-typedef struct _I830MemPool *I830MemPoolPtr;
-typedef struct _I830MemRange *I830MemRangePtr;
-typedef struct _I830MemRange {
-   long Start;
-   long End;
-   long Size;
-   unsigned long Physical;
-   unsigned long Offset;		/* Offset of AGP-allocated portion */
-   unsigned long Alignment;
-   drm_handle_t Key;
-   unsigned long Pitch; // add pitch
-   I830MemPoolPtr Pool;
-} I830MemRange;
-
-typedef struct _I830MemPool {
-   I830MemRange Total;
-   I830MemRange Free;
-   I830MemRange Fixed;
-   I830MemRange Allocated;
-} I830MemPool;
-
-typedef struct {
-   int tail_mask;
-   I830MemRange mem;
-   unsigned char *virtual_start;
-   int head;
-   int tail;
-   int space;
-} I830RingBuffer;
-
-typedef struct _I830Rec {
-   unsigned char *MMIOBase;
-   unsigned char *FbBase;
-   int cpp;
-
-   unsigned int bios_version;
-
-   /* These are set in PreInit and never changed. */
-   long FbMapSize;
-   long TotalVideoRam;
-   I830MemRange StolenMemory;		/* pre-allocated memory */
-   long BIOSMemorySize;			/* min stolen pool size */
-   int BIOSMemSizeLoc;
-
-   /* These change according to what has been allocated. */
-   long FreeMemory;
-   I830MemRange MemoryAperture;
-   I830MemPool StolenPool;
-   long allocatedMemory;
-
-   /* Regions allocated either from the above pools, or from agpgart. */
-   /* for single and dual head configurations */
-   I830MemRange FrontBuffer;
-   I830MemRange FrontBuffer2;
-   I830MemRange Scratch;
-   I830MemRange Scratch2;
-
-   I830RingBuffer *LpRing;
-
-   I830MemRange BackBuffer;
-   I830MemRange DepthBuffer;
-   I830MemRange TexMem;
-   int TexGranularity;
-   I830MemRange ContextMem;
-   int drmMinor;
-   Bool have3DWindows;
-
-   Bool NeedRingBufferLow;
-   Bool allowPageFlip;
-   Bool disableTiling;
-
-   int Chipset;
-   unsigned long LinearAddr;
-   unsigned long MMIOAddr;
-
-   drmSize           registerSize;     /**< \brief MMIO register map size */
-   drm_handle_t         registerHandle;   /**< \brief MMIO register map handle */
-  //   IOADDRESS ioBase;
-   int               irq;              /**< \brief IRQ number */
-   int GttBound;
-
-   drm_handle_t ring_map;
-   unsigned int Fence[8];
-
-} I830Rec;
-
-/*
- * 12288 is set as the maximum, chosen because it is enough for
- * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare.
- */
-#define I830_MAXIMUM_VBIOS_MEM		12288
-#define I830_DEFAULT_VIDEOMEM_2D	(MB(32) / 1024)
-#define I830_DEFAULT_VIDEOMEM_3D	(MB(64) / 1024)
-
-/* Flags for memory allocation function */
-#define FROM_ANYWHERE			0x00000000
-#define FROM_POOL_ONLY			0x00000001
-#define FROM_NEW_ONLY			0x00000002
-#define FROM_MASK			0x0000000f
-
-#define ALLOCATE_AT_TOP			0x00000010
-#define ALLOCATE_AT_BOTTOM		0x00000020
-#define FORCE_GAPS			0x00000040
-
-#define NEED_PHYSICAL_ADDR		0x00000100
-#define ALIGN_BOTH_ENDS			0x00000200
-#define FORCE_LOW			0x00000400
-
-#define ALLOC_NO_TILING			0x00001000
-#define ALLOC_INITIAL			0x00002000
-
-#define ALLOCATE_DRY_RUN		0x80000000
-
-/* Chipset registers for VIDEO BIOS memory RW access */
-#define _855_DRAM_RW_CONTROL 0x58
-#define _845_DRAM_RW_CONTROL 0x90
-#define DRAM_WRITE    0x33330000
-
-#define KB(x) ((x) * 1024)
-#define MB(x) ((x) * KB(1024))
-
-#define GTT_PAGE_SIZE			KB(4)
-#define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
-#define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
-#define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
-#define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
-#define PRIMARY_RINGBUFFER_SIZE		KB(128)
-
-
-/* Ring buffer registers, p277, overview p19
- */
-#define LP_RING     0x2030
-#define HP_RING     0x2040
-
-#define RING_TAIL      0x00
-#define TAIL_ADDR           0x000FFFF8
-#define I830_TAIL_MASK	    0x001FFFF8
-
-#define RING_HEAD      0x04
-#define HEAD_WRAP_COUNT     0xFFE00000
-#define HEAD_WRAP_ONE       0x00200000
-#define HEAD_ADDR           0x001FFFFC
-#define I830_HEAD_MASK      0x001FFFFC
-
-#define RING_START     0x08
-#define START_ADDR          0x03FFFFF8
-#define I830_RING_START_MASK	0xFFFFF000
-
-#define RING_LEN       0x0C
-#define RING_NR_PAGES       0x001FF000 
-#define I830_RING_NR_PAGES	0x001FF000
-#define RING_REPORT_MASK    0x00000006
-#define RING_REPORT_64K     0x00000002
-#define RING_REPORT_128K    0x00000004
-#define RING_NO_REPORT      0x00000000
-#define RING_VALID_MASK     0x00000001
-#define RING_VALID          0x00000001
-#define RING_INVALID        0x00000000
-
-
-/* Fence/Tiling ranges [0..7]
- */
-#define FENCE            0x2000
-#define FENCE_NR         8
-
-#define I915G_FENCE_START_MASK	0x0ff00000
-
-#define I830_FENCE_START_MASK	0x07f80000
-
-#define FENCE_START_MASK    0x03F80000
-#define FENCE_X_MAJOR       0x00000000
-#define FENCE_Y_MAJOR       0x00001000
-#define FENCE_SIZE_MASK     0x00000700
-#define FENCE_SIZE_512K     0x00000000
-#define FENCE_SIZE_1M       0x00000100
-#define FENCE_SIZE_2M       0x00000200
-#define FENCE_SIZE_4M       0x00000300
-#define FENCE_SIZE_8M       0x00000400
-#define FENCE_SIZE_16M      0x00000500
-#define FENCE_SIZE_32M      0x00000600
-#define FENCE_SIZE_64M	    0x00000700
-#define I915G_FENCE_SIZE_1M       0x00000000
-#define I915G_FENCE_SIZE_2M       0x00000100
-#define I915G_FENCE_SIZE_4M       0x00000200
-#define I915G_FENCE_SIZE_8M       0x00000300
-#define I915G_FENCE_SIZE_16M      0x00000400
-#define I915G_FENCE_SIZE_32M      0x00000500
-#define I915G_FENCE_SIZE_64M	0x00000600
-#define I915G_FENCE_SIZE_128M	0x00000700
-#define FENCE_PITCH_1       0x00000000
-#define FENCE_PITCH_2       0x00000010
-#define FENCE_PITCH_4       0x00000020
-#define FENCE_PITCH_8       0x00000030
-#define FENCE_PITCH_16      0x00000040
-#define FENCE_PITCH_32      0x00000050
-#define FENCE_PITCH_64	    0x00000060
-#define FENCE_VALID         0x00000001
-
-#include <mmio.h>
-
-#  define MMIO_IN8(base, offset) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
-#  define MMIO_IN32(base, offset) \
-	read_MMIO_LE32(base, offset)
-#  define MMIO_OUT8(base, offset, val) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
-#  define MMIO_OUT32(base, offset, val) \
-	*(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = CPU_TO_LE32(val)
-
-
-				/* Memory mapped register access macros */
-#define INREG8(addr)        MMIO_IN8(MMIO, addr)
-#define INREG(addr)         MMIO_IN32(MMIO, addr)
-#define OUTREG8(addr, val)  MMIO_OUT8(MMIO, addr, val)
-#define OUTREG(addr, val)   MMIO_OUT32(MMIO, addr, val)
-
-#define DSPABASE		0x70184
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c
index b6946b75d20..effdd26448a 100644..120000
--- a/src/mesa/drivers/dri/i915/server/intel_dri.c
+++ b/src/mesa/drivers/dri/i915/server/intel_dri.c
@@ -1,1283 +1 @@
-/**
- * \file server/intel_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- * 
- * Copyright (C) 2006 Dave Airlie (airlied@linux.ie)
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sub license, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial portions
- of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
- ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-
-#include "intel.h"
-#include "i830_dri.h"
-
-#include "memops.h"
-#include "pciaccess.h"
-
-static size_t drm_page_size;
-static int nextTile = 0;
-#define xf86DrvMsg(...) do {} while(0)
-
-static const int pitches[] = {
-  128 * 8,
-  128 * 16,
-  128 * 32,
-  128 * 64,
-  0
-};
-
-static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea);
-
-static unsigned long
-GetBestTileAlignment(unsigned long size)
-{
-   unsigned long i;
-
-   for (i = KB(512); i < size; i <<= 1)
-      ;
-
-   if (i > MB(64))
-      i = MB(64);
-
-   return i;
-}
-
-static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-  for (i = 0; i < 8; i++) {
-    OUTREG(FENCE + i * 4, pI830->Fence[i]);
-    //    if (I810_DEBUG & DEBUG_VERBOSE_VGA)
-    fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]);
-  }
-}
-
-/* Tiled memory is good... really, really good...
- *
- * Need to make it less likely that we miss out on this - probably
- * need to move the frontbuffer away from the 'guarenteed' alignment
- * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.
- */
-static void
-SetFence(const DRIDriverContext *ctx, I830Rec *pI830,
-	 int nr, unsigned int start, unsigned int pitch,
-         unsigned int size)
-{
-   unsigned int val;
-   unsigned int fence_mask = 0;
-   unsigned int fence_pitch;
-
-   if (nr < 0 || nr > 7) {
-      fprintf(stderr,
-		 "SetFence: fence %d out of range\n",nr);
-      return;
-   }
-
-   pI830->Fence[nr] = 0;
-
-   if (IS_I9XX(pI830))
-   	fence_mask = ~I915G_FENCE_START_MASK;
-   else
-   	fence_mask = ~I830_FENCE_START_MASK;
-
-   if (start & fence_mask) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not %s aligned\n",
-		 nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k");
-      return;
-   }
-
-   if (start % size) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n",
-		 nr, start, size / 1024);
-      return;
-   }
-
-   if (pitch & 127) {
-      fprintf(stderr,
-		 "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n",
-		 nr, pitch);
-      return;
-   }
-
-   val = (start | FENCE_X_MAJOR | FENCE_VALID);
-
-   if (IS_I9XX(pI830)) {
-   	switch (size) {
-	   case MB(1):
-      		val |= I915G_FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= I915G_FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= I915G_FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= I915G_FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= I915G_FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= I915G_FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= I915G_FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-    } else {
-   	switch (size) {
-	   case KB(512):
-      		val |= FENCE_SIZE_512K;
-      		break;
-	   case MB(1):
-      		val |= FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-   }
-
-   if (IS_I9XX(pI830))
-	fence_pitch = pitch / 512;
-   else
-	fence_pitch = pitch / 128;
-
-   switch (fence_pitch) {
-   case 1:
-      val |= FENCE_PITCH_1;
-      break;
-   case 2:
-      val |= FENCE_PITCH_2;
-      break;
-   case 4:
-      val |= FENCE_PITCH_4;
-      break;
-   case 8:
-      val |= FENCE_PITCH_8;
-      break;
-   case 16:
-      val |= FENCE_PITCH_16;
-      break;
-   case 32:
-      val |= FENCE_PITCH_32;
-      break;
-   case 64:
-      val |= FENCE_PITCH_64;
-      break;
-   default:
-      fprintf(stderr,
-		 "SetFence: %d: illegal pitch (%d)\n", nr, pitch);
-      return;
-   }
-
-   pI830->Fence[nr] = val;
-}
-
-static Bool
-MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem)
-{
-   int pitch, ntiles, i;
-
-   pitch = pMem->Pitch * ctx->cpp;
-   /*
-    * Simply try to break the region up into at most four pieces of size
-    * equal to the alignment.
-    */
-   ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
-   if (ntiles >= 4) {
-      return FALSE;
-   }
-
-   for (i = 0; i < ntiles; i++, nextTile++) {
-     SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment,
-	       pitch, pMem->Alignment);
-   }
-   return TRUE;
-}
-
-static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-
-  /* Clear out */
-  for (i = 0; i < 8; i++)
-    pI830->Fence[i] = 0;
-  
-  nextTile = 0;
-
-  if (pI830->BackBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the back buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the back buffer.\n");
-      pI830->allowPageFlip = FALSE;
-    }
-  }
-  
-  if (pI830->DepthBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the depth buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the depth buffer.\n");
-    }
-  }
-
-  return;
-}
-
-static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  struct pci_device host_bridge;
-  uint32_t gmch_ctrl;
-  int memsize = 0;
-  int range;
-
-  memset(&host_bridge, 0, sizeof(host_bridge));
-
-  pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL);
-  
-  /* We need to reduce the stolen size, by the GTT and the popup.
-   * The GTT varying according the the FbMapSize and the popup is 4KB */
-  range = (ctx->shared.fbSize / (1024*1024)) + 4;
-
-   if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I855_GMCH_GMS_STOLEN_1M:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_4M:
-	 memsize = MB(4) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_8M:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_16M:
-	 memsize = MB(16) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_32M:
-	 memsize = MB(32) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_48M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(48) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_64M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(64) - KB(range);
-	 break;
-      }
-   } else {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I830_GMCH_GMS_STOLEN_512:
-	 memsize = KB(512) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_1024:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_8192:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I830_GMCH_GMS_LOCAL:
-	 memsize = 0;
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Local memory found, but won't be used.\n");
-	 break;
-      }
-   }
-   if (memsize > 0) {
-     fprintf(stderr,
-		 "detected %d kB stolen memory.\n", memsize / 1024);
-   } else {
-     fprintf(stderr,
-		 "no video memory detected.\n");
-   }
-   return memsize;
-}
-
-static int AgpInit(const DRIDriverContext *ctx, I830Rec *info)
-{
-  unsigned long mode = 0x4;
-
-  if (drmAgpAcquire(ctx->drmFD) < 0) {
-    fprintf(stderr, "[gart] AGP not available\n");
-    return 0;
-  }
-  
-  if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-    fprintf(stderr, "[gart] AGP not enabled\n");
-    drmAgpRelease(ctx->drmFD);
-    return 0;
-  }
-  else
-    fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
-
-  return 1;
-}
-
-/*
- * Allocate memory from the given pool.  Grow the pool if needed and if
- * possible.
- */
-static unsigned long
-AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, 
-	      I830MemRange *result, I830MemPool *pool,
-	      long size, unsigned long alignment, int flags)
-{
-   long needed, start, end;
-
-   if (!result || !pool || !size)
-      return 0;
-
-   /* Calculate how much space is needed. */
-   if (alignment <= GTT_PAGE_SIZE)
-      needed = size;
-   else {
-	 start = ROUND_TO(pool->Free.Start, alignment);
-	 end = ROUND_TO(start + size, alignment);
-	 needed = end - pool->Free.Start;
-   }
-   if (needed > pool->Free.Size) {
-     return 0;
-   }
-
-   result->Start = ROUND_TO(pool->Free.Start, alignment);
-   pool->Free.Start += needed;
-   result->End = pool->Free.Start;
-
-   pool->Free.Size = pool->Free.End - pool->Free.Start;
-   result->Size = result->End - result->Start;
-   result->Pool = pool;
-   result->Alignment = alignment;
-   return needed;
-}
-
-static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange  *result)
-{
-   unsigned long start, end;
-   unsigned long newApStart, newApEnd;
-   int ret;
-   if (!result || !size)
-      return 0;
-   
-   if (!alignment)
-     alignment = 4;
-
-   start = ROUND_TO(pI830->MemoryAperture.Start, alignment);
-   end = ROUND_TO(start + size, alignment);
-   newApStart = end;
-   newApEnd = pI830->MemoryAperture.End;
-
-   ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key));
-   
-   if (ret)
-   {
-     fprintf(stderr,"drmAgpAlloc failed %d\n", ret);
-     return 0;
-   }
-   pI830->allocatedMemory += size;
-   pI830->MemoryAperture.Start = newApStart;
-   pI830->MemoryAperture.End = newApEnd;
-   pI830->MemoryAperture.Size = newApEnd - newApStart;
-   //   pI830->FreeMemory -= size;
-   result->Start = start;
-   result->End = start + size;
-   result->Size = size;
-   result->Offset = start;
-   result->Alignment = alignment;
-   result->Pool = NULL;
-  
-   return size;
-}
-
-unsigned long
-I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830,
-                I830MemRange *result, I830MemPool *pool, long size,
-                unsigned long alignment, int flags)
-{
-   unsigned long ret;
-
-   if (!result)
-      return 0;
-
-   /* Make sure these are initialised. */
-   result->Size = 0;
-   result->Key = -1;
-
-   if (!size) {
-      return 0;
-   }
-
-   if (pool->Free.Size < size) {
-      ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   else {
-      ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags);
-      if (ret == 0)
-         ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   return ret;
-}
-
-static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem)
-{
-  if (!mem)
-    return FALSE;
-  
-  if (mem->Key == -1)
-    return TRUE;
-
-  return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset);
-}
-
-/* simple memory allocation routines needed */
-/* put ring buffer in low memory */
-/* need to allocate front, back, depth buffers aligned correctly,
-   allocate ring buffer, 
-*/
-
-/* */
-static Bool
-I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long size, ret;
-  unsigned long lines, lineSize, align;
-
-  /* allocate ring buffer */
-  memset(pI830->LpRing, 0, sizeof(I830RingBuffer));
-  pI830->LpRing->mem.Key = -1;
-
-  size = PRIMARY_RINGBUFFER_SIZE;
-  
-  ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0);
-  
-  if (ret != size)
-  {
-    fprintf(stderr,"unable to allocate ring buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1;
-
-  
-  /* allocate front buffer */
-  memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
-  pI830->FrontBuffer.Key = -1;
-  pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth;
-
-  align = KB(512);  
-
-  lineSize = ctx->shared.virtualWidth * ctx->cpp;
-  lines = (ctx->shared.virtualHeight + 15) / 16 * 16;
-  size = lineSize * lines;
-  size = ROUND_TO_PAGE(size);
-
-  align = GetBestTileAlignment(size);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate front buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
-  pI830->BackBuffer.Key = -1;
-  pI830->BackBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate back buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
-  pI830->DepthBuffer.Key = -1;
-  pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate depth buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
-  pI830->ContextMem.Key = -1;
-  size = KB(32);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate context buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
-  pI830->TexMem.Key = -1;
-
-  size = 32768 * 1024;
-  ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate texture memory %ld\n", ret);
-    return FALSE;
-  }
-
-  return TRUE;
-}
-
-static Bool
-I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  if (!BindAgpRange(ctx, &pI830->LpRing->mem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->FrontBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->BackBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->DepthBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->ContextMem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->TexMem))
-    return FALSE;
-
-  return TRUE;
-}
-
-static Bool
-I830CleanupDma(const DRIDriverContext *ctx)
-{
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_CLEANUP_DMA;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-     fprintf(stderr, "I830 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-   I830RingBuffer *ring = pI830->LpRing;
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_INIT_DMA;
-
-   info.ring_start = ring->mem.Start + pI830->LinearAddr;
-   info.ring_end = ring->mem.End + pI830->LinearAddr;
-   info.ring_size = ring->mem.Size;
-
-   info.mmio_offset = (unsigned int)ctx->MMIOStart;
-
-   info.sarea_priv_offset = sizeof(drm_sarea_t);
-
-   info.front_offset = pI830->FrontBuffer.Start;
-   info.back_offset = pI830->BackBuffer.Start;
-   info.depth_offset = pI830->DepthBuffer.Start;
-   info.w = ctx->shared.virtualWidth;
-   info.h = ctx->shared.virtualHeight;
-   info.pitch = ctx->shared.virtualWidth;
-   info.back_pitch = pI830->BackBuffer.Pitch;
-   info.depth_pitch = pI830->DepthBuffer.Pitch;
-   info.cpp = ctx->cpp;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-      fprintf(stderr,
-		 "I830 Dma Initialization Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static int I830CheckDRMVersion( const DRIDriverContext *ctx,
-				  I830Rec *pI830 )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-
-   if (version) {
-     int req_minor, req_patch;
-
-     req_minor = 4;
-     req_patch = 0;	
-
-     if (version->version_major != 1 ||
-	 version->version_minor < req_minor ||
-	 (version->version_minor == req_minor && 
-	  version->version_patchlevel < req_patch)) {
-       /* Incompatible drm version */
-       fprintf(stderr,
-	       "[dri] I830DRIScreenInit failed because of a version "
-	       "mismatch.\n"
-	       "[dri] i915.o kernel module version is %d.%d.%d "
-	       "but version 1.%d.%d or newer is needed.\n"
-	       "[dri] Disabling DRI.\n",
-	       version->version_major,
-	       version->version_minor,
-	       version->version_patchlevel,
-	       req_minor,
-	       req_patch);
-       drmFreeVersion(version);
-       return 0;
-     }
-     
-     pI830->drmMinor = version->version_minor;
-     drmFreeVersion(version);
-   }
-   return 1;
-}
-
-static void
-I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned int itemp;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-   OUTREG(LP_RING + RING_LEN, 0);
-   OUTREG(LP_RING + RING_TAIL, 0);
-   OUTREG(LP_RING + RING_HEAD, 0);
-
-   if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) !=
-       pI830->LpRing->mem.Start) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer start (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK;
-   OUTREG(LP_RING + RING_START, itemp);
-
-   if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) !=
-       pI830->LpRing->mem.Size - 4096) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Size - 4096,
-		 I830_RING_NR_PAGES);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES;
-   itemp |= (RING_NO_REPORT | RING_VALID);
-   OUTREG(LP_RING + RING_LEN, itemp);
-
-   pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-   pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
-   pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
-   if (pI830->LpRing->space < 0)
-      pI830->LpRing->space += pI830->LpRing->mem.Size;
-
-   SetFenceRegs(ctx, pI830);
-   
-   /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky
-      hacky hacky */
-   OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr);
-
-}
-
-static Bool
-I830SetParam(const DRIDriverContext *ctx, int param, int value)
-{
-   drmI830SetParam sp;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
-      fprintf(stderr, "I830 SetParam Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   fprintf(stderr,
-              "[drm] Mapping front buffer\n");
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
-                 sarea->front_size,
-                 DRM_FRAME_BUFFER,  /*DRM_AGP,*/
-                 0,
-                 &sarea->front_handle) < 0) {
-     fprintf(stderr,
-	     "[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   ctx->shared.hFrameBuffer = sarea->front_handle;
-   ctx->shared.fbSize = sarea->front_size;
-   fprintf(stderr, "[drm] Front Buffer = 0x%08x\n",
-	   sarea->front_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->back_offset),
-                 sarea->back_size, DRM_AGP, 0,
-                 &sarea->back_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(back_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Back Buffer = 0x%08x\n",
-              sarea->back_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)sarea->depth_offset,
-                 sarea->depth_size, DRM_AGP, 0,
-                 &sarea->depth_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n",
-              sarea->depth_handle);
-
-   if (drmAddMap(ctx->drmFD,
-		 (drm_handle_t)sarea->tex_offset,
-		 sarea->tex_size, DRM_AGP, 0,
-		 &sarea->tex_handle) < 0) {
-      fprintf(stderr,
-		 "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] textures = 0x%08x\n",
-	      sarea->tex_handle);
-
-   return TRUE;
-}
-
-
-static void
-I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-#if 1
-   if (sarea->front_handle) {
-      drmRmMap(ctx->drmFD, sarea->front_handle);
-      sarea->front_handle = 0;
-   }
-#endif
-   if (sarea->back_handle) {
-      drmRmMap(ctx->drmFD, sarea->back_handle);
-      sarea->back_handle = 0;
-   }
-   if (sarea->depth_handle) {
-      drmRmMap(ctx->drmFD, sarea->depth_handle);
-      sarea->depth_handle = 0;
-   }
-   if (sarea->tex_handle) {
-      drmRmMap(ctx->drmFD, sarea->tex_handle);
-      sarea->tex_handle = 0;
-   }
-}
-
-static void
-I830InitTextureHeap(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   /* Start up the simple memory manager for agp space */
-   drmI830MemInitHeap drmHeap;
-   drmHeap.region = I830_MEM_REGION_AGP;
-   drmHeap.start  = 0;
-   drmHeap.size   = sarea->tex_size;
-      
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT_HEAP,
-			  &drmHeap, sizeof(drmHeap))) {
-      fprintf(stderr,
-		    "[drm] Failed to initialized agp heap manager\n");
-   } else {
-      fprintf(stderr,
-		    "[drm] Initialized kernel agp heap manager, %d\n",
-		    sarea->tex_size);
-
-      I830SetParam(ctx, I830_SETPARAM_TEX_LRU_LOG_GRANULARITY, 
-		      sarea->log_tex_granularity);
-   }
-}
-
-static Bool
-I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  if (drmAddMap(ctx->drmFD,
-		(drm_handle_t)pI830->LpRing->mem.Start,
-		pI830->LpRing->mem.Size, DRM_AGP, 0,
-		&pI830->ring_map) < 0) {
-    fprintf(stderr,
-	    "[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
-    return FALSE;
-  }
-  fprintf(stderr, "[drm] ring buffer = 0x%08x\n",
-	  pI830->ring_map);
-
-  if (I830InitDma(ctx, pI830) == FALSE) {
-    return FALSE;
-  }
-  
-   /* init to zero to be safe */
-
-  I830DRIMapScreenRegions(ctx, pI830, sarea);
-  I830InitTextureHeap(ctx, pI830, sarea);
-
-   if (ctx->pciDevice != PCI_CHIP_845_G &&
-       ctx->pciDevice != PCI_CHIP_I830_M) {
-      I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
-   }
-
-   /* Okay now initialize the dma engine */
-   {
-      pI830->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					    ctx->pciBus,
-					    ctx->pciDevice,
-					    ctx->pciFunc);
-
-      if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) {
-	 fprintf(stderr,
-		    "[drm] failure adding irq handler\n");
-	 pI830->irq = 0;
-	 return FALSE;
-      }
-      else
-	 fprintf(stderr,
-		    "[drm] dma control initialized, using IRQ %d\n",
-		    pI830->irq);
-   }
-
-   fprintf(stderr, "[dri] visual configs initialized\n");
-
-   return TRUE;
-}
-
-static Bool
-I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  /* need to drmMap front and back buffers and zero them */
-  drmAddress map_addr;
-  int ret;
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->front_handle,
-	       sarea->front_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map front buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->front_size);
-  drmUnmap(map_addr, sarea->front_size);
-
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->back_handle,
-	       sarea->back_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map back buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->back_size);
-  drmUnmap(map_addr, sarea->back_size);
-
-  return TRUE;
-}
-
-static Bool
-I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830)
-		  
-{
-   I830DRIPtr pI830DRI;
-   drmI830Sarea *pSAREAPriv;
-   int err;
-      
-   drm_page_size = getpagesize();   
-
-   pI830->registerSize = ctx->MMIOSize;
-   /* This is a hack for now.  We have to have more than a 4k page here
-    * because of the size of the state.  However, the state should be
-    * in a per-context mapping.  This will be added in the Mesa 3.5 port
-    * of the I830 driver.
-    */
-   ctx->shared.SAREASize = SAREA_MAX;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("i915", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-     fprintf(stderr, "[drm] drmAddMap failed\n");
-     return 0;
-   }
-
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-   
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   
-   }
-   
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pI830->registerHandle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08x\n", pI830->registerHandle);
-
-
-   if (!I830CheckDRMVersion(ctx, pI830)) {
-     return FALSE;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the SAREA private data structure */
-   pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				 sizeof(drm_sarea_t));
-   memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
-   pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830);
-   pI830->StolenMemory.Start = 0;
-   pI830->StolenMemory.End = pI830->StolenMemory.Size;
-
-   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
-   pI830->MemoryAperture.End = KB(40000);
-   pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start;
-
-   pI830->StolenPool.Fixed = pI830->StolenMemory;
-   pI830->StolenPool.Total = pI830->StolenMemory;
-   pI830->StolenPool.Free = pI830->StolenPool.Total;
-   pI830->FreeMemory = pI830->StolenPool.Total.Size;
-
-   if (!AgpInit(ctx, pI830))
-     return FALSE;
-
-   if (I830AllocateMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   if (I830BindMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   pSAREAPriv->front_offset = pI830->FrontBuffer.Start;
-   pSAREAPriv->front_size = pI830->FrontBuffer.Size;
-   pSAREAPriv->width = ctx->shared.virtualWidth;
-   pSAREAPriv->height = ctx->shared.virtualHeight;
-   pSAREAPriv->pitch = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualX = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualY = ctx->shared.virtualHeight;
-   pSAREAPriv->back_offset = pI830->BackBuffer.Start;
-   pSAREAPriv->back_size = pI830->BackBuffer.Size;
-   pSAREAPriv->depth_offset = pI830->DepthBuffer.Start;
-   pSAREAPriv->depth_size = pI830->DepthBuffer.Size;
-   pSAREAPriv->tex_offset = pI830->TexMem.Start;
-   pSAREAPriv->tex_size = pI830->TexMem.Size;
-   pSAREAPriv->log_tex_granularity = pI830->TexGranularity;
-
-   ctx->driverClientMsg = malloc(sizeof(I830DRIRec));
-   ctx->driverClientMsgSize = sizeof(I830DRIRec);
-   pI830DRI = (I830DRIPtr)ctx->driverClientMsg;
-   pI830DRI->deviceID = pI830->Chipset;
-   pI830DRI->regsSize = I830_REG_SIZE;
-   pI830DRI->width = ctx->shared.virtualWidth;
-   pI830DRI->height = ctx->shared.virtualHeight;
-   pI830DRI->mem = ctx->shared.fbSize;
-   pI830DRI->cpp = ctx->cpp;
-   pI830DRI->backOffset = pI830->BackBuffer.Start;
-   pI830DRI->backPitch = pI830->BackBuffer.Pitch; 
-
-   pI830DRI->depthOffset = pI830->DepthBuffer.Start;
-   pI830DRI->depthPitch = pI830->DepthBuffer.Pitch; 
-
-   pI830DRI->fbOffset = pI830->FrontBuffer.Start;
-   pI830DRI->fbStride = pI830->FrontBuffer.Pitch;
-
-   pI830DRI->bitsPerPixel = ctx->bpp;
-   pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-   
-   err = I830DRIDoMappings(ctx, pI830, pSAREAPriv);
-   if (err == FALSE)
-       return FALSE;
-
-   I830SetupMemoryTiling(ctx, pI830);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   I830ClearScreen(ctx, pI830, pSAREAPriv);
-
-   I830SetRingRegs(ctx, pI830);
-
-   return TRUE;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int i830ValidateMode( const DRIDriverContext *ctx )
-{
-  return 1;
-}
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i830PostValidateMode( const DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = ctx->driverPrivate;
-
-  I830SetRingRegs(ctx, pI830);
-  return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls I810ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int i830InitFBDev( DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = calloc(1, sizeof(I830Rec));
-  int i;
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-      ctx->shared.Width = ctx->shared.virtualWidth;
-   }
-
-
-   for (i = 0; pitches[i] != 0; i++) {
-     if (pitches[i] >= ctx->shared.virtualWidth) {
-       ctx->shared.virtualWidth = pitches[i];
-       break;
-     }
-   }
-
-   ctx->driverPrivate = (void *)pI830;
-   
-   pI830->LpRing = calloc(1, sizeof(I830RingBuffer));
-   pI830->Chipset = ctx->chipset;
-   pI830->LinearAddr = ctx->FBStart;
-
-   if (!I830ScreenInit( ctx, pI830 ))
-      return 0;
-
-   
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void i830HaltFBDev( DRIDriverContext *ctx )
-{
-  drmI830Sarea *pSAREAPriv;
-  I830Rec *pI830 = ctx->driverPrivate;
-
-   if (pI830->irq) {
-       drmCtlUninstHandler(ctx->drmFD);
-       pI830->irq = 0;   }
-
-   I830CleanupDma(ctx);
-
-  pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				sizeof(drm_sarea_t));
-
-  I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv);
-  drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-  drmClose(ctx->drmFD);
-  
-  if (ctx->driverPrivate) {
-    free(ctx->driverPrivate);
-    ctx->driverPrivate = 0;
-  }
-}
-
-
-extern void i810NotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   i830ValidateMode,
-   i830PostValidateMode,
-   i830InitFBDev,
-   i830HaltFBDev,
-   NULL,//I830EngineShutdown,
-   NULL, //I830EngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   i810NotifyFocus, 
-#endif
-};
+../../intel/server/intel_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 9e4ff112dc3..005460f3547 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -5,25 +5,30 @@ include $(TOP)/configs/current
 LIBNAME = i965_dri.so
 
 DRIVER_SOURCES = \
-	bufmgr_fake.c \
 	intel_batchbuffer.c \
 	intel_blit.c \
 	intel_buffer_objects.c \
 	intel_buffers.c \
 	intel_context.c \
-	intel_ioctl.c \
+	intel_decode.c \
+	intel_depthstencil.c \
+	intel_fbo.c \
 	intel_mipmap_tree.c \
 	intel_regions.c \
 	intel_screen.c \
 	intel_span.c \
-	intel_pixel_copy.c \
+	intel_pixel.c \
 	intel_pixel_bitmap.c \
+	intel_pixel_copy.c \
+	intel_pixel_draw.c \
 	intel_state.c \
 	intel_tex.c \
+	intel_tex_copy.c \
+	intel_tex_format.c \
+	intel_tex_image.c \
 	intel_tex_layout.c \
+	intel_tex_subimage.c \
 	intel_tex_validate.c \
-	brw_aub.c \
-	brw_aub_playback.c \
 	brw_cc.c \
 	brw_clip.c \
 	brw_clip_line.c \
@@ -44,16 +49,16 @@ DRIVER_SOURCES = \
 	brw_gs.c \
 	brw_gs_emit.c \
 	brw_gs_state.c \
-	brw_hal.c \
 	brw_metaops.c \
 	brw_misc_state.c \
 	brw_program.c \
+	brw_queryobj.c \
 	brw_sf.c \
 	brw_sf_emit.c \
 	brw_sf_state.c \
 	brw_state_batch.c \
 	brw_state_cache.c \
-	brw_state_pool.c \
+	brw_state_dump.c \
 	brw_state_upload.c \
 	brw_tex.c \
 	brw_tex_layout.c \
@@ -70,6 +75,7 @@ DRIVER_SOURCES = \
 	brw_wm_emit.c \
 	brw_wm_fp.c \
 	brw_wm_iz.c \
+	brw_wm_glsl.c \
 	brw_wm_pass0.c \
 	brw_wm_pass1.c \
 	brw_wm_pass2.c \
@@ -84,10 +90,12 @@ C_SOURCES = \
 
 ASM_SOURCES = 
 
-DRIVER_DEFINES = -I../intel
+DRIVER_DEFINES = -I../intel -I../intel/server
 
-include ../Makefile.template
+DRI_LIB_DEPS += -ldrm_intel
 
-intel_tex_layout.o: ../intel/intel_tex_layout.c
+include ../Makefile.template
 
 symlinks:
+intel_decode.o: ../intel/intel_decode.c
+intel_tex_layout.o: ../intel/intel_tex_layout.c
diff --git a/src/mesa/drivers/dri/i965/brw_aub.c b/src/mesa/drivers/dri/i965/brw_aub.c
deleted file mode 100644
index f851a5b7955..00000000000
--- a/src/mesa/drivers/dri/i965/brw_aub.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-#include "brw_context.h"
-#include "brw_aub.h"
-#include "intel_regions.h"
-#include <stdio.h>
-
-extern char *__progname;
-
-
-/* Registers to control page table
- */
-#define PGETBL_CTL       0x2020
-#define PGETBL_ENABLED   0x1
-
-#define NR_GTT_ENTRIES  65536	/* 256 mb */
-
-#define FAIL										\
-do {											\
-   fprintf(stderr, "failed to write aub data at %s/%d\n", __FUNCTION__, __LINE__);	\
-   exit(1);										\
-} while (0)
-
-
-/* Emit the headers at the top of each aubfile.  Initialize the GTT.
- */
-static void init_aubfile( FILE *aub_file )
-{   
-   struct aub_file_header fh;
-   struct aub_block_header bh;
-   unsigned int data;
-
-   static int nr;
-   
-   nr++;
-
-   /* Emit the aub header:
-    */
-   memset(&fh, 0, sizeof(fh));
-
-   fh.instruction_type = AUB_FILE_HEADER;
-   fh.minor = 0x0;
-   fh.major = 0x7;
-   memcpy(fh.application, __progname, sizeof(fh.application));
-   fh.day = (nr>>24) & 0xff;
-   fh.month = 0x0;
-   fh.year = 0x0;
-   fh.timezone = 0x0;
-   fh.second = nr & 0xff;
-   fh.minute = (nr>>8) & 0xff;
-   fh.hour = (nr>>16) & 0xff;
-   fh.comment_length = 0x0;   
-
-   if (fwrite(&fh, sizeof(fh), 1, aub_file) < 0) 
-      FAIL;
-         
-   /* Setup the GTT starting at main memory address zero (!):
-    */
-   memset(&bh, 0, sizeof(bh));
-   
-   bh.instruction_type = AUB_BLOCK_HEADER;
-   bh.operation = BH_MMI0_WRITE32;
-   bh.type = 0x0;
-   bh.address_space = ADDR_GTT;	/* ??? */
-   bh.general_state_type = 0x0;
-   bh.surface_state_type = 0x0;
-   bh.address = PGETBL_CTL;
-   bh.length = 0x4;
-
-   if (fwrite(&bh, sizeof(bh), 1, aub_file) < 0) 
-      FAIL;
-
-   data = 0x0 | PGETBL_ENABLED;
-
-   if (fwrite(&data, sizeof(data), 1, aub_file) < 0) 
-      FAIL;
-}
-
-
-static void init_aub_gtt( struct brw_context *brw,
-			  GLuint start_offset, 
-			  GLuint size )
-{
-   FILE *aub_file = brw->intel.aub_file;
-   struct aub_block_header bh;
-   unsigned int i;
-
-   assert(start_offset + size < NR_GTT_ENTRIES * 4096);
-
-
-   memset(&bh, 0, sizeof(bh));
-   
-   bh.instruction_type = AUB_BLOCK_HEADER;
-   bh.operation = BH_DATA_WRITE;
-   bh.type = 0x0;
-   bh.address_space = ADDR_MAIN;
-   bh.general_state_type = 0x0;
-   bh.surface_state_type = 0x0;
-   bh.address =  start_offset / 4096 * 4;
-   bh.length = size / 4096 * 4;
-
-   if (fwrite(&bh, sizeof(bh), 1, aub_file) < 0) 
-      FAIL;
-
-   for (i = 0; i < size / 4096; i++) {
-      GLuint data = brw->next_free_page | 1;
-
-      brw->next_free_page += 4096;
-
-      if (fwrite(&data, sizeof(data), 1, aub_file) < 0) 
-	 FAIL;
-   }
-
-}
-
-static void write_block_header( FILE *aub_file,
-				struct aub_block_header *bh,
-				const GLuint *data,
-				GLuint sz )
-{
-   sz = (sz + 3) & ~3;
-
-   if (fwrite(bh, sizeof(*bh), 1, aub_file) < 0) 
-      FAIL;
-
-   if (fwrite(data, sz, 1, aub_file) < 0) 
-      FAIL;
-
-   fflush(aub_file);
-}
-
-
-static void write_dump_bmp( FILE *aub_file,
-			    struct aub_dump_bmp *db )
-{
-   if (fwrite(db, sizeof(*db), 1, aub_file) < 0) 
-      FAIL;
-
-   fflush(aub_file);
-}
-
-
-
-static void brw_aub_gtt_data( struct intel_context *intel,
-			      GLuint offset,
-			      const void *data,
-			      GLuint sz,
-			      GLuint type,
-			      GLuint state_type )
-{
-   struct aub_block_header bh;
-
-   bh.instruction_type = AUB_BLOCK_HEADER;
-   bh.operation = BH_DATA_WRITE;
-   bh.type = type;
-   bh.address_space = ADDR_GTT;
-   bh.pad0 = 0;
-
-   if (type == DW_GENERAL_STATE) {
-      bh.general_state_type = state_type;
-      bh.surface_state_type = 0;
-   }
-   else {
-      bh.general_state_type = 0;
-      bh.surface_state_type = state_type;
-   }
-
-   bh.pad1 = 0;
-   bh.address = offset;
-   bh.length = sz;
-
-   write_block_header(intel->aub_file, &bh, data, sz);
-}
-
-
-
-static void brw_aub_gtt_cmds( struct intel_context *intel,
-			      GLuint offset,
-			      const void *data,
-			      GLuint sz )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-   struct aub_block_header bh;   
-   GLuint type = CW_PRIMARY_RING_A;
-   
-
-   bh.instruction_type = AUB_BLOCK_HEADER;
-   bh.operation = BH_COMMAND_WRITE;
-   bh.type = type;
-   bh.address_space = ADDR_GTT;
-   bh.pad0 = 0;
-   bh.general_state_type = 0;
-   bh.surface_state_type = 0;
-   bh.pad1 = 0;
-   bh.address = offset;
-   bh.length = sz;
-
-   write_block_header(brw->intel.aub_file, &bh, data, sz);
-}
-
-static void brw_aub_dump_bmp( struct intel_context *intel,
-			      GLuint buffer )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-   intelScreenPrivate *intelScreen = brw->intel.intelScreen;
-   struct aub_dump_bmp db;
-   GLuint format;
-
-   if (intelScreen->cpp == 4)
-      format = 0x7;
-   else
-      format = 0x3;
-
-
-   if (buffer == 0) {
-      db.instruction_type = AUB_DUMP_BMP;
-      db.xmin = 0;
-      db.ymin = 0;
-      db.format = format;
-      db.bpp = intelScreen->cpp * 8;
-      db.pitch = intelScreen->front.pitch / intelScreen->cpp;
-      db.xsize = intelScreen->width;
-      db.ysize = intelScreen->height;
-      db.addr = intelScreen->front.offset;
-      db.unknown = 0x0;		/* 4: xmajor tiled, 0: not tiled */
-
-      write_dump_bmp(brw->intel.aub_file, &db);
-   }
-   else {
-      db.instruction_type = AUB_DUMP_BMP;
-      db.xmin = 0;
-      db.ymin = 0;
-      db.format = format;
-      db.bpp = intel->back_region->cpp * 8;
-      db.pitch = intel->back_region->pitch;
-      db.xsize = intel->back_region->pitch;
-      db.ysize = intel->back_region->height;
-      db.addr = intelScreen->back.offset;
-      db.unknown = intel->back_region->tiled ? 0x4 : 0x0;
-
-      write_dump_bmp(brw->intel.aub_file, &db);
-   }
-}
-
-/* Attempt to prevent monster aubfiles by closing and reopening when
- * the state pools wrap.
- */
-static void brw_aub_wrap( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);   
-   if (intel->aub_file) {
-      brw_aub_destroy(brw);
-      brw_aub_init(brw);
-   }
-   brw->wrap = 1;		/* ??? */
-}
-
-
-int brw_aub_init( struct brw_context *brw )
-{
-   struct intel_context *intel = &brw->intel;
-   intelScreenPrivate *intelScreen = intel->intelScreen;
-   char filename[80];
-   int val;
-   static int i = 0;
-
-   i++;
-
-   if (_mesa_getenv("INTEL_REPLAY"))
-      return 0;
-
-   if (_mesa_getenv("INTEL_AUBFILE")) {
-      val = snprintf(filename, sizeof(filename), "%s%d.aub", _mesa_getenv("INTEL_AUBFILE"), i%4);
-      _mesa_printf("--> Aub file: %s\n", filename);
-      brw->intel.aub_file = fopen(filename, "w");
-   }
-   else if (_mesa_getenv("INTEL_AUB")) {
-      val = snprintf(filename, sizeof(filename), "%s.aub", __progname);
-      if (val < 0 || val > sizeof(filename)) 
-	 strcpy(filename, "default.aub");   
-   
-      _mesa_printf("--> Aub file: %s\n", filename);
-      brw->intel.aub_file = fopen(filename, "w");
-   }
-   else {
-      return 0;
-   }
-
-   if (!brw->intel.aub_file) {
-      _mesa_printf("couldn't open aubfile\n");
-      exit(1);
-   }
-
-   brw->intel.vtbl.aub_commands = brw_aub_gtt_cmds;
-   brw->intel.vtbl.aub_dump_bmp = brw_aub_dump_bmp;
-   brw->intel.vtbl.aub_gtt_data = brw_aub_gtt_data;
-   brw->intel.vtbl.aub_wrap = brw_aub_wrap;
-   
-   init_aubfile(brw->intel.aub_file);
-
-   /* The GTT is located starting address zero in main memory.  Pages
-    * to populate the gtt start after this point.
-    */
-   brw->next_free_page = (NR_GTT_ENTRIES * 4 + 4095) & ~4095;
-
-   /* More or less correspond with all the agp regions mapped by the
-    * driver:
-    */
-   init_aub_gtt(brw, 0, 4096*4); /* so new fulsim doesn't crash */
-   init_aub_gtt(brw, intelScreen->front.offset, intelScreen->back.size);
-   init_aub_gtt(brw, intelScreen->back.offset, intelScreen->back.size);
-   init_aub_gtt(brw, intelScreen->depth.offset, intelScreen->back.size);
-   init_aub_gtt(brw, intelScreen->tex.offset, intelScreen->tex.size);
-
-   return 0;
-}
-
-void brw_aub_destroy( struct brw_context *brw )
-{
-   if (brw->intel.aub_file) {
-      fclose(brw->intel.aub_file);
-      brw->intel.aub_file = NULL;
-   }
-}
diff --git a/src/mesa/drivers/dri/i965/brw_aub.h b/src/mesa/drivers/dri/i965/brw_aub.h
deleted file mode 100644
index 198e36dc3c0..00000000000
--- a/src/mesa/drivers/dri/i965/brw_aub.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-#ifndef BRW_AUB_H
-#define BRW_AUB_H
-
-struct aub_file_header {
-   unsigned int instruction_type;
-   unsigned int pad0:16;
-   unsigned int minor:8;
-   unsigned int major:8;
-   unsigned char application[8*4];
-   unsigned int day:8;
-   unsigned int month:8;
-   unsigned int year:16;
-   unsigned int timezone:8;
-   unsigned int second:8;
-   unsigned int minute:8;
-   unsigned int hour:8;
-   unsigned int comment_length:16;   
-   unsigned int pad1:16;
-};
-
-struct aub_block_header {
-   unsigned int instruction_type;
-   unsigned int operation:8;
-   unsigned int type:8;
-   unsigned int address_space:8;
-   unsigned int pad0:8;
-   unsigned int general_state_type:8;
-   unsigned int surface_state_type:8;
-   unsigned int pad1:16;
-   unsigned int address;
-   unsigned int length;
-};
-
-struct aub_dump_bmp {
-   unsigned int instruction_type;
-   unsigned int xmin:16;
-   unsigned int ymin:16;
-   unsigned int pitch:16;
-   unsigned int bpp:8;
-   unsigned int format:8;
-   unsigned int xsize:16;
-   unsigned int ysize:16;
-   unsigned int addr;
-   unsigned int unknown;
-};
-
-enum bh_operation {
-   BH_COMMENT,
-   BH_DATA_WRITE,
-   BH_COMMAND_WRITE,
-   BH_MMI0_WRITE32,
-   BH_END_SCENE,
-   BH_CONFIG_MEMORY_MAP,
-   BH_MAX_OPERATION
-};
-
-enum command_write_type {
-   CW_HWB_RING = 1,
-   CW_PRIMARY_RING_A,
-   CW_PRIMARY_RING_B,		/* XXX - disagreement with listaub! */
-   CW_PRIMARY_RING_C,
-   CW_MAX_TYPE
-};
-
-enum data_write_type {
-   DW_NOTYPE,
-   DW_BATCH_BUFFER,
-   DW_BIN_BUFFER,
-   DW_BIN_POINTER_LIST,
-   DW_SLOW_STATE_BUFFER,
-   DW_VERTEX_BUFFER,
-   DW_2D_MAP,
-   DW_CUBE_MAP,
-   DW_INDIRECT_STATE_BUFFER,
-   DW_VOLUME_MAP,
-   DW_1D_MAP,
-   DW_CONSTANT_BUFFER,
-   DW_CONSTANT_URB_ENTRY,
-   DW_INDEX_BUFFER,
-   DW_GENERAL_STATE,
-   DW_SURFACE_STATE,
-   DW_MEDIA_OBJECT_INDIRECT_DATA,
-   DW_MAX_TYPE
-};
-
-enum data_write_general_state_type {
-   DWGS_NOTYPE,
-   DWGS_VERTEX_SHADER_STATE,
-   DWGS_GEOMETRY_SHADER_STATE ,
-   DWGS_CLIPPER_STATE,
-   DWGS_STRIPS_FANS_STATE,
-   DWGS_WINDOWER_IZ_STATE,
-   DWGS_COLOR_CALC_STATE,
-   DWGS_CLIPPER_VIEWPORT_STATE,	/* was 0x7 */
-   DWGS_STRIPS_FANS_VIEWPORT_STATE,
-   DWGS_COLOR_CALC_VIEWPORT_STATE, /* was 0x9 */
-   DWGS_SAMPLER_STATE,
-   DWGS_KERNEL_INSTRUCTIONS,
-   DWGS_SCRATCH_SPACE,
-   DWGS_SAMPLER_DEFAULT_COLOR,
-   DWGS_INTERFACE_DESCRIPTOR,
-   DWGS_VLD_STATE,
-   DWGS_VFE_STATE,
-   DWGS_MAX_TYPE
-};
-
-enum data_write_surface_state_type {
-   DWSS_NOTYPE,
-   DWSS_BINDING_TABLE_STATE,
-   DWSS_SURFACE_STATE,
-   DWSS_MAX_TYPE
-};
-
-enum memory_map_type {
-   MM_DEFAULT,
-   MM_DYNAMIC,
-   MM_MAX_TYPE
-};
-
-enum address_space {
-   ADDR_GTT,
-   ADDR_LOCAL,
-   ADDR_MAIN,
-   ADDR_MAX
-};
-
-
-#define AUB_FILE_HEADER 0xe085000b
-#define AUB_BLOCK_HEADER 0xe0c10003
-#define AUB_DUMP_BMP 0xe09e0004
-
-struct brw_context;
-struct intel_context;
-
-int brw_aub_init( struct brw_context *brw );
-void brw_aub_destroy( struct brw_context *brw );
-
-int brw_playback_aubfile(struct brw_context *brw,
-			 const char *filename);
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/brw_aub_playback.c b/src/mesa/drivers/dri/i965/brw_aub_playback.c
deleted file mode 100644
index 2433d50c116..00000000000
--- a/src/mesa/drivers/dri/i965/brw_aub_playback.c
+++ /dev/null
@@ -1,443 +0,0 @@
-
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <fcntl.h>
-
-#include "brw_aub.h"
-#include "brw_defines.h"
-#include "brw_context.h"
-#include "intel_ioctl.h"
-#include "bufmgr.h"
-
-struct aub_state {
-   struct intel_context *intel;
-   const char *map;
-   unsigned int csr;
-   unsigned int sz;
-};
-
-
-static int gobble( struct aub_state *s, int size )
-{
-   if (s->csr + size > s->sz) {
-      _mesa_printf("EOF in %s\n", __FUNCTION__);
-      return 1;
-   }
-
-   s->csr += size;
-   return 0;
-}
-
-static void flush_and_fence( struct aub_state *s )
-{
-   struct intel_context *intel = s->intel;
-   GLuint buf[2];
-
-   buf[0] = intel->vtbl.flush_cmd();
-   buf[1] = 0;
-
-   intel_cmd_ioctl(intel, (char *)&buf, sizeof(buf));
-      
-   intelWaitIrq( intel, intelEmitIrqLocked( intel ));
-}
-
-static void flush_cmds( struct aub_state *s,
-			const void *data,
-			int len )
-{
-   DBG("%s %d\n", __FUNCTION__, len);
-
-   if (len & 0x4) {
-      unsigned int *tmp = malloc(len + 4);
-      DBG("padding to octword\n");
-      memcpy(tmp, data, len);
-      tmp[len/4] = MI_NOOP;
-      flush_cmds(s, tmp, len+4);
-      free(tmp);
-      return;
-   }
-
-   /* For ring data, just send off immediately via an ioctl.
-    * This differs slightly from how the stream was executed
-    * initially as this would have been a batchbuffer.
-    */
-   intel_cmd_ioctl(s->intel, (void *)data, len);
-
-   if (1)
-      flush_and_fence(s);
-}
-
-static const char *pstrings[] = {
-   "none",
-   "POINTLIST",
-   "LINELIST",
-   "LINESTRIP",
-   "TRILIST",
-   "TRISTRIP",
-   "TRIFAN",
-   "QUADLIST",
-   "QUADSTRIP",
-   "LINELIST_ADJ",
-   "LINESTRIP_ADJ",
-   "TRILIST_ADJ",
-   "TRISTRIP_ADJ",
-   "TRISTRIP_REVERSE",
-   "POLYGON",
-   "RECTLIST",
-   "LINELOOP",
-   "POINTLIST_BF",
-   "LINESTRIP_CONT",
-   "LINESTRIP_BF",
-   "LINESTRIP_CONT_BF",
-   "TRIFAN_NOSTIPPLE",
-};
-
-static void do_3d_prim( struct aub_state *s,
-			const void *data,
-			int len )
-{
-   struct brw_3d_primitive prim;
-   const struct brw_3d_primitive *orig = data;
-   int i;
-
-   assert(len == sizeof(prim));
-   memcpy(&prim, data, sizeof(prim));
-
-#define START 0
-#define BLOCK (12*28)
-
-   if (orig->verts_per_instance < BLOCK)
-      flush_cmds(s, &prim, sizeof(prim));
-   else {
-      for (i = START; i + BLOCK < orig->verts_per_instance; i += BLOCK/2) {
-	 prim.start_vert_location = i;
-	 prim.verts_per_instance = BLOCK;
-	 _mesa_printf("%sprim %d/%s verts %d..%d (of %d)\n", 
-		      prim.header.indexed ? "INDEXED " : "",
-		      prim.header.topology, pstrings[prim.header.topology%16],
-		      prim.start_vert_location, 
-		      prim.start_vert_location + prim.verts_per_instance,
-		      orig->verts_per_instance);
-	 flush_cmds(s, &prim, sizeof(prim));
-      }
-   }
-}
-
-
-
-static struct {
-   int cmd;
-   const char *name;
-   int has_length;
-} cmd_info[] = {
-   { 0, "NOOP", 0 },
-   { 0x5410, "XY_COLOR_BLT_RGB", 1 },
-   { 0x5430, "XY_COLOR_BLT_RGBA", 1 },
-   { 0x54d0, "XY_SRC_COPY_BLT_RGB", 1 },
-   { 0x54f0, "XY_SRC_COPY_BLT_RGBA", 1 },
-   { CMD_URB_FENCE, "URB_FENCE",  1 },
-   { CMD_CONST_BUFFER_STATE, "CONST_BUFFER_STATE",  1 },
-   { CMD_CONST_BUFFER, "CONST_BUFFER",  1 },
-   { CMD_STATE_BASE_ADDRESS, "STATE_BASE_ADDRESS",  1 },
-   { CMD_STATE_INSN_POINTER, "STATE_INSN_POINTER",  1 },
-   { CMD_PIPELINE_SELECT, "PIPELINE_SELECT", 0, },
-   { CMD_PIPELINED_STATE_POINTERS, "PIPELINED_STATE_POINTERS", 1 },
-   { CMD_BINDING_TABLE_PTRS, "BINDING_TABLE_PTRS", 1 },
-   { CMD_VERTEX_BUFFER, "VERTEX_BUFFER", 1 },
-   { CMD_VERTEX_ELEMENT, "VERTEX_ELEMENT", 1 },
-   { CMD_INDEX_BUFFER, "INDEX_BUFFER", 1 },
-   { CMD_VF_STATISTICS, "VF_STATISTICS", 0 },
-   { CMD_DRAW_RECT, "DRAW_RECT", 1 },
-   { CMD_BLEND_CONSTANT_COLOR, "BLEND_CONSTANT_COLOR", 1 },
-   { CMD_CHROMA_KEY, "CHROMA_KEY", 1 },
-   { CMD_DEPTH_BUFFER, "DEPTH_BUFFER", 1 },
-   { CMD_POLY_STIPPLE_OFFSET, "POLY_STIPPLE_OFFSET", 1 },
-   { CMD_POLY_STIPPLE_PATTERN, "POLY_STIPPLE_PATTERN", 1 },
-   { CMD_LINE_STIPPLE_PATTERN, "LINE_STIPPLE_PATTERN", 1 },
-   { CMD_GLOBAL_DEPTH_OFFSET_CLAMP, "GLOBAL_DEPTH_OFFSET_CLAMP", 1 },
-   { CMD_PIPE_CONTROL, "PIPE_CONTROL", 1 },
-   { CMD_MI_FLUSH, "MI_FLUSH", 0 },
-   { CMD_3D_PRIM, "3D_PRIM", 1 },
-};
-
-#define NR_CMDS (sizeof(cmd_info)/sizeof(cmd_info[0]))
-
-
-static int find_command( unsigned int cmd )
-{
-   int i;
-
-   for (i = 0; i < NR_CMDS; i++) 
-      if (cmd == cmd_info[i].cmd) 
-	 return i;
-
-   return -1;
-}
-
-
-
-static int parse_commands( struct aub_state *s,
-			   const unsigned int *data,
-			   int len )
-{
-   while (len) {
-      int cmd = data[0] >> 16;
-      int dwords;
-      int i;
-
-      i = find_command(cmd);
-
-      if (i < 0) {
-	 _mesa_printf("couldn't find info for cmd %x\n", cmd);
-	 return 1;
-      }
-
-      if (cmd_info[i].has_length)
-	 dwords = (data[0] & 0xff) + 2;
-      else
-	 dwords = 1;
-
-      _mesa_printf("%s (%d dwords) 0x%x\n", cmd_info[i].name, dwords, data[0]);
-
-      if (len < dwords * 4) {
-	 _mesa_printf("EOF in %s (%d bytes)\n", __FUNCTION__, len);
-	 return 1;
-      }
-
-
-      if (0 && cmd == CMD_3D_PRIM)
-	 do_3d_prim(s, data, dwords * 4);
-      else
-	 flush_cmds(s, data, dwords * 4);
-
-      data += dwords;
-      len -= dwords * 4;
-   }
-
-   return 0;
-}
-
-
-
-static void parse_data_write( struct aub_state *s,
-			     const struct aub_block_header *bh,
-			     void *dest,
-			     const unsigned int *data,
-			     int len )
-{
-   switch (bh->type) {
-   case DW_GENERAL_STATE:
-      switch (bh->general_state_type) {
-      case DWGS_VERTEX_SHADER_STATE: {
-	 struct brw_vs_unit_state vs;
-	 assert(len == sizeof(vs));
-
-	 _mesa_printf("DWGS_VERTEX_SHADER_STATE\n");
-	 memcpy(&vs, data, sizeof(vs));
-
-/* 	 vs.vs6.vert_cache_disable = 1;  */
-/*  	 vs.thread4.max_threads = 4;  */
-
-	 memcpy(dest, &vs, sizeof(vs));
-	 return;
-      }
-      case DWGS_CLIPPER_STATE: {
-	 struct brw_clip_unit_state clip;
-	 assert(len == sizeof(clip));
-
-	 _mesa_printf("DWGS_CLIPPER_STATE\n");
-	 memcpy(&clip, data, sizeof(clip));
-
-/* 	 clip.thread4.max_threads = 0; */
-/*   	 clip.clip5.clip_mode = BRW_CLIPMODE_REJECT_ALL;   */
-
-	 memcpy(dest, &clip, sizeof(clip));
-	 return;
-      }
-
-      case DWGS_NOTYPE:
-      case DWGS_GEOMETRY_SHADER_STATE:
-      case DWGS_STRIPS_FANS_STATE:
-	 break;
-
-      case DWGS_WINDOWER_IZ_STATE: {
-	    struct brw_wm_unit_state wm;
-	    assert(len == sizeof(wm));
-
-	    _mesa_printf("DWGS_WINDOWER_IZ_STATE\n");
-	    memcpy(&wm, data, sizeof(wm));
-
-/* 	    wm.wm5.max_threads = 10; */
-
-	    memcpy(dest, &wm, sizeof(wm));
-	    return;
-	 }
-
-      case DWGS_COLOR_CALC_STATE:
-      case DWGS_CLIPPER_VIEWPORT_STATE:
-      case DWGS_STRIPS_FANS_VIEWPORT_STATE:
-      case DWGS_COLOR_CALC_VIEWPORT_STATE:
-      case DWGS_SAMPLER_STATE:
-      case DWGS_KERNEL_INSTRUCTIONS:
-      case DWGS_SCRATCH_SPACE:
-      case DWGS_SAMPLER_DEFAULT_COLOR:
-      case DWGS_INTERFACE_DESCRIPTOR:
-      case DWGS_VLD_STATE:
-      case DWGS_VFE_STATE:
-      default:
-	 break;
-      }
-      break;
-   case DW_SURFACE_STATE:
-      break;
-   case DW_1D_MAP:
-   case DW_2D_MAP:
-   case DW_CUBE_MAP:
-   case DW_VOLUME_MAP:
-   case DW_CONSTANT_BUFFER:
-   case DW_CONSTANT_URB_ENTRY:
-   case DW_VERTEX_BUFFER:
-   case DW_INDEX_BUFFER:
-   default:
-      break;
-   }
-
-   memcpy(dest, data, len);
-}
-
-
-/* In order to work, the memory layout has to be the same as the X
- * server which created the aubfile.
- */
-static int parse_block_header( struct aub_state *s )
-{
-   struct aub_block_header *bh = (struct aub_block_header *)(s->map + s->csr);
-   void *data = (void *)(bh + 1);
-   unsigned int len = (bh->length + 3) & ~3;
-
-   _mesa_printf("block header at 0x%x\n", s->csr);
-
-   if (s->csr + len + sizeof(*bh) > s->sz) {
-      _mesa_printf("EOF in data in %s\n", __FUNCTION__);
-      return 1;
-   }
-
-   if (bh->address_space == ADDR_GTT) {
-
-      switch (bh->operation)
-      {
-      case BH_DATA_WRITE: {
-	 void *dest = bmFindVirtual( s->intel, bh->address, len );
-	 if (dest == NULL) {
-	    _mesa_printf("Couldn't find virtual address for offset %x\n", bh->address);
-	    return 1;
-	 }
-
-#if 1
-	 parse_data_write(s, bh, dest, data, len);
-#else
-	 memcpy(dest, data, len);
-#endif
-	 break;
-      }
-      case BH_COMMAND_WRITE:
-#if 0
-	 intel_cmd_ioctl(s->intel, (void *)data, len);
-#else
-	 if (parse_commands(s, data, len) != 0)
-	    _mesa_printf("parse_commands failed\n");
-#endif
-	 break;
-      default:
-	 break;
-      }
-   }
-
-   s->csr += sizeof(*bh) + len;
-   return 0;
-}
-
-
-#define AUB_FILE_HEADER 0xe085000b
-#define AUB_BLOCK_HEADER 0xe0c10003
-#define AUB_DUMP_BMP 0xe09e0004
-
-int brw_playback_aubfile(struct brw_context *brw,
-			 const char *filename)
-{
-   struct intel_context *intel = &brw->intel;
-   struct aub_state state;
-   struct stat sb;
-   int fd;
-   int retval = 0;
-
-   state.intel = intel;
-
-   fd = open(filename, O_RDONLY, 0);
-   if (fd < 0) {
-      _mesa_printf("couldn't open aubfile: %s\n", filename);
-      return 1;
-   }
-
-   if (fstat(fd, &sb) != 0) {
-      _mesa_printf("couldn't open %s\n", filename);
-      return 1;
-   }
-
-   state.csr = 0;
-   state.sz = sb.st_size;
-   state.map = mmap(NULL, sb.st_size, PROT_READ, MAP_PRIVATE, fd, 0);
-   
-   if (state.map == NULL) {
-      _mesa_printf("couldn't mmap %s\n", filename);
-      return 1;
-   }
-
-   LOCK_HARDWARE(intel); 
-   {
-      /* Make sure we don't confuse anything that might happen to be
-       * going on with the hardware:
-       */
-/*       bmEvictAll(intel); */
-/*       intel->vtbl.lost_hardware(intel); */
-      
-
-      /* Replay the aubfile item by item: 
-       */
-      while (retval == 0 && 
-	     state.csr != state.sz) {
-	 unsigned int insn = *(unsigned int *)(state.map + state.csr);
-
-	 switch (insn) {
-	 case AUB_FILE_HEADER:
-	    retval = gobble(&state, sizeof(struct aub_file_header));
-	    break;
-	 
-	 case AUB_BLOCK_HEADER:   
-	    retval = parse_block_header(&state);
-	    break;
-	 
-	 case AUB_DUMP_BMP:
-	    retval = gobble(&state, sizeof(struct aub_dump_bmp));
-	    break;
-	 
-	 default:
-	    _mesa_printf("unknown instruction %x\n", insn);
-	    retval = 1;
-	    break;
-	 }
-      }
-   }
-   UNLOCK_HARDWARE(intel);
-   return retval;
-}
-
-
-
-
-
-
-		  
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index 8a1d1527db3..fa8121e02d3 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -34,10 +34,10 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "brw_util.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
-static void upload_cc_vp( struct brw_context *brw )
+static void prepare_cc_vp( struct brw_context *brw )
 {
    struct brw_cc_viewport ccv;
 
@@ -46,7 +46,8 @@ static void upload_cc_vp( struct brw_context *brw )
    ccv.min_depth = 0.0;
    ccv.max_depth = 1.0;
 
-   brw->cc.vp_gs_offset = brw_cache_data( &brw->cache[BRW_CC_VP], &ccv );
+   dri_bo_unreference(brw->cc.vp_bo);
+   brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
 }
 
 const struct brw_tracked_state brw_cc_vp = {
@@ -55,57 +56,148 @@ const struct brw_tracked_state brw_cc_vp = {
       .brw = BRW_NEW_CONTEXT,
       .cache = 0
    },
-   .update = upload_cc_vp
+   .prepare = prepare_cc_vp
 };
 
+struct brw_cc_unit_key {
+   GLboolean stencil, stencil_two_side, color_blend, alpha_enabled;
 
-static void upload_cc_unit( struct brw_context *brw )
+   GLenum stencil_func[2], stencil_fail_op[2];
+   GLenum stencil_pass_depth_fail_op[2], stencil_pass_depth_pass_op[2];
+   GLubyte stencil_ref[2], stencil_write_mask[2], stencil_test_mask[2];
+   GLenum logic_op;
+
+   GLenum blend_eq_rgb, blend_eq_a;
+   GLenum blend_src_rgb, blend_src_a;
+   GLenum blend_dst_rgb, blend_dst_a;
+
+   GLenum alpha_func;
+   GLclampf alpha_ref;
+
+   GLboolean dither;
+
+   GLboolean depth_test, depth_write;
+   GLenum depth_func;
+};
+
+static void
+cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
+{
+   struct gl_stencil_attrib *stencil = brw->attribs.Stencil;
+
+   memset(key, 0, sizeof(*key));
+
+   key->stencil = stencil->Enabled;
+   key->stencil_two_side = stencil->_TestTwoSide;
+
+   if (key->stencil) {
+      key->stencil_func[0] = stencil->Function[0];
+      key->stencil_fail_op[0] = stencil->FailFunc[0];
+      key->stencil_pass_depth_fail_op[0] = stencil->ZFailFunc[0];
+      key->stencil_pass_depth_pass_op[0] = stencil->ZPassFunc[0];
+      key->stencil_ref[0] = stencil->Ref[0];
+      key->stencil_write_mask[0] = stencil->WriteMask[0];
+      key->stencil_test_mask[0] = stencil->ValueMask[0];
+   }
+   if (key->stencil_two_side) {
+      key->stencil_func[1] = stencil->Function[1];
+      key->stencil_fail_op[1] = stencil->FailFunc[1];
+      key->stencil_pass_depth_fail_op[1] = stencil->ZFailFunc[1];
+      key->stencil_pass_depth_pass_op[1] = stencil->ZPassFunc[1];
+      key->stencil_ref[1] = stencil->Ref[1];
+      key->stencil_write_mask[1] = stencil->WriteMask[1];
+      key->stencil_test_mask[1] = stencil->ValueMask[1];
+   }
+
+   if (brw->attribs.Color->_LogicOpEnabled)
+      key->logic_op = brw->attribs.Color->LogicOp;
+   else
+      key->logic_op = GL_COPY;
+
+   key->color_blend = brw->attribs.Color->BlendEnabled;
+   if (key->color_blend) {
+      key->blend_eq_rgb = brw->attribs.Color->BlendEquationRGB;
+      key->blend_eq_a = brw->attribs.Color->BlendEquationA;
+      key->blend_src_rgb = brw->attribs.Color->BlendSrcRGB;
+      key->blend_dst_rgb = brw->attribs.Color->BlendDstRGB;
+      key->blend_src_a = brw->attribs.Color->BlendSrcA;
+      key->blend_dst_a = brw->attribs.Color->BlendDstA;
+   }
+
+   key->alpha_enabled = brw->attribs.Color->AlphaEnabled;
+   if (key->alpha_enabled) {
+      key->alpha_func = brw->attribs.Color->AlphaFunc;
+      key->alpha_ref = brw->attribs.Color->AlphaRef;
+   }
+
+   key->dither = brw->attribs.Color->DitherFlag;
+
+   key->depth_test = brw->attribs.Depth->Test;
+   if (key->depth_test) {
+      key->depth_func = brw->attribs.Depth->Func;
+      key->depth_write = brw->attribs.Depth->Mask;
+   }
+}
+
+/**
+ * Creates the state cache entry for the given CC unit key.
+ */
+static dri_bo *
+cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
 {
    struct brw_cc_unit_state cc;
-   
+   dri_bo *bo;
+
    memset(&cc, 0, sizeof(cc));
 
    /* _NEW_STENCIL */
-   if (brw->attribs.Stencil->Enabled) {
-      cc.cc0.stencil_enable = brw->attribs.Stencil->Enabled;
-      cc.cc0.stencil_func = intel_translate_compare_func(brw->attribs.Stencil->Function[0]);
-      cc.cc0.stencil_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->FailFunc[0]);
-      cc.cc0.stencil_pass_depth_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->ZFailFunc[0]);
-      cc.cc0.stencil_pass_depth_pass_op = intel_translate_stencil_op(brw->attribs.Stencil->ZPassFunc[0]);
-      cc.cc1.stencil_ref = brw->attribs.Stencil->Ref[0];
-      cc.cc1.stencil_write_mask = brw->attribs.Stencil->WriteMask[0];
-      cc.cc1.stencil_test_mask = brw->attribs.Stencil->ValueMask[0];
-
-      if (brw->attribs.Stencil->TestTwoSide) {
-	 cc.cc0.bf_stencil_enable = brw->attribs.Stencil->TestTwoSide;
-	 cc.cc0.bf_stencil_func = intel_translate_compare_func(brw->attribs.Stencil->Function[1]);
-	 cc.cc0.bf_stencil_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->FailFunc[1]);
-	 cc.cc0.bf_stencil_pass_depth_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->ZFailFunc[1]);
-	 cc.cc0.bf_stencil_pass_depth_pass_op = intel_translate_stencil_op(brw->attribs.Stencil->ZPassFunc[1]);
-	 cc.cc1.bf_stencil_ref = brw->attribs.Stencil->Ref[1];
-	 cc.cc2.bf_stencil_write_mask = brw->attribs.Stencil->WriteMask[1];
-	 cc.cc2.bf_stencil_test_mask = brw->attribs.Stencil->ValueMask[1];
+   if (key->stencil) {
+      cc.cc0.stencil_enable = 1;
+      cc.cc0.stencil_func =
+	 intel_translate_compare_func(key->stencil_func[0]);
+      cc.cc0.stencil_fail_op =
+	 intel_translate_stencil_op(key->stencil_fail_op[0]);
+      cc.cc0.stencil_pass_depth_fail_op =
+	 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[0]);
+      cc.cc0.stencil_pass_depth_pass_op =
+	 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[0]);
+      cc.cc1.stencil_ref = key->stencil_ref[0];
+      cc.cc1.stencil_write_mask = key->stencil_write_mask[0];
+      cc.cc1.stencil_test_mask = key->stencil_test_mask[0];
+
+      if (key->stencil_two_side) {
+	 cc.cc0.bf_stencil_enable = 1;
+	 cc.cc0.bf_stencil_func =
+	    intel_translate_compare_func(key->stencil_func[1]);
+	 cc.cc0.bf_stencil_fail_op =
+	    intel_translate_stencil_op(key->stencil_fail_op[1]);
+	 cc.cc0.bf_stencil_pass_depth_fail_op =
+	    intel_translate_stencil_op(key->stencil_pass_depth_fail_op[1]);
+	 cc.cc0.bf_stencil_pass_depth_pass_op =
+	    intel_translate_stencil_op(key->stencil_pass_depth_pass_op[1]);
+	 cc.cc1.bf_stencil_ref = key->stencil_ref[1];
+	 cc.cc2.bf_stencil_write_mask = key->stencil_write_mask[1];
+	 cc.cc2.bf_stencil_test_mask = key->stencil_test_mask[1];
       }
 
       /* Not really sure about this:
        */
-      if (brw->attribs.Stencil->WriteMask[0] ||
-	  (brw->attribs.Stencil->TestTwoSide && brw->attribs.Stencil->WriteMask[1]))
+      if (key->stencil_write_mask[0] ||
+	  (key->stencil_two_side && key->stencil_write_mask[1]))
 	 cc.cc0.stencil_write_enable = 1;
    }
 
    /* _NEW_COLOR */
-   if (brw->attribs.Color->_LogicOpEnabled) {
+   if (key->logic_op != GL_COPY) {
       cc.cc2.logicop_enable = 1;
-      cc.cc5.logicop_func = intel_translate_logic_op( brw->attribs.Color->LogicOp );
-   }
-   else if (brw->attribs.Color->BlendEnabled) {
-      GLenum eqRGB = brw->attribs.Color->BlendEquationRGB;
-      GLenum eqA = brw->attribs.Color->BlendEquationA;
-      GLenum srcRGB = brw->attribs.Color->BlendSrcRGB;
-      GLenum dstRGB = brw->attribs.Color->BlendDstRGB;
-      GLenum srcA = brw->attribs.Color->BlendSrcA;
-      GLenum dstA = brw->attribs.Color->BlendDstA;
+      cc.cc5.logicop_func = intel_translate_logic_op(key->logic_op);
+   } else if (key->color_blend) {
+      GLenum eqRGB = key->blend_eq_rgb;
+      GLenum eqA = key->blend_eq_a;
+      GLenum srcRGB = key->blend_src_rgb;
+      GLenum dstRGB = key->blend_dst_rgb;
+      GLenum srcA = key->blend_src_a;
+      GLenum dstA = key->blend_dst_a;
 
       if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 	 srcRGB = dstRGB = GL_ONE;
@@ -115,49 +207,78 @@ static void upload_cc_unit( struct brw_context *brw )
 	 srcA = dstA = GL_ONE;
       }
 
-      cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB); 
-      cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB); 
-      cc.cc6.blend_function = brw_translate_blend_equation( eqRGB );
+      cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
+      cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
+      cc.cc6.blend_function = brw_translate_blend_equation(eqRGB);
 
-      cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA); 
-      cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA); 
-      cc.cc5.ia_blend_function = brw_translate_blend_equation( eqA );
+      cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
+      cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
+      cc.cc5.ia_blend_function = brw_translate_blend_equation(eqA);
 
       cc.cc3.blend_enable = 1;
-      cc.cc3.ia_blend_enable = (srcA != srcRGB || 
-				dstA != dstRGB || 
+      cc.cc3.ia_blend_enable = (srcA != srcRGB ||
+				dstA != dstRGB ||
 				eqA != eqRGB);
    }
 
-   if (brw->attribs.Color->AlphaEnabled) {
+   if (key->alpha_enabled) {
       cc.cc3.alpha_test = 1;
-      cc.cc3.alpha_test_func = intel_translate_compare_func(brw->attribs.Color->AlphaFunc);
-
-      UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], brw->attribs.Color->AlphaRef);
-
+      cc.cc3.alpha_test_func = intel_translate_compare_func(key->alpha_func);
       cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
+
+      UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], key->alpha_ref);
    }
 
-   if (brw->attribs.Color->DitherFlag) {
+   if (key->dither) {
       cc.cc5.dither_enable = 1;
-      cc.cc6.y_dither_offset = 0; 
-      cc.cc6.x_dither_offset = 0;     
+      cc.cc6.y_dither_offset = 0;
+      cc.cc6.x_dither_offset = 0;
    }
 
    /* _NEW_DEPTH */
-   if (brw->attribs.Depth->Test) {
-      cc.cc2.depth_test = brw->attribs.Depth->Test;
-      cc.cc2.depth_test_function = intel_translate_compare_func(brw->attribs.Depth->Func);
-      cc.cc2.depth_write_enable = brw->attribs.Depth->Mask;
+   if (key->depth_test) {
+      cc.cc2.depth_test = 1;
+      cc.cc2.depth_test_function = intel_translate_compare_func(key->depth_func);
+      cc.cc2.depth_write_enable = key->depth_write;
    }
- 
+
    /* CACHE_NEW_CC_VP */
-   cc.cc4.cc_viewport_state_offset =  brw->cc.vp_gs_offset >> 5;
- 
+   cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
+
    if (INTEL_DEBUG & DEBUG_STATS)
-      cc.cc5.statistics_enable = 1; 
+      cc.cc5.statistics_enable = 1;
+
+   bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
+			 key, sizeof(*key),
+			 &brw->cc.vp_bo, 1,
+			 &cc, sizeof(cc),
+			 NULL, NULL);
+
+   /* Emit CC viewport relocation */
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION,
+		     0,
+		     0,
+		     offsetof(struct brw_cc_unit_state, cc4),
+		     brw->cc.vp_bo);
+
+   return bo;
+}
+
+static void prepare_cc_unit( struct brw_context *brw )
+{
+   struct brw_cc_unit_key key;
+
+   cc_unit_populate_key(brw, &key);
+
+   dri_bo_unreference(brw->cc.state_bo);
+   brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
+				       &key, sizeof(key),
+				       &brw->cc.vp_bo, 1,
+				       NULL);
 
-   brw->cc.state_gs_offset = brw_cache_data( &brw->cache[BRW_CC_UNIT], &cc );
+   if (brw->cc.state_bo == NULL)
+      brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
 }
 
 const struct brw_tracked_state brw_cc_unit = {
@@ -166,7 +287,7 @@ const struct brw_tracked_state brw_cc_unit = {
       .brw = 0,
       .cache = CACHE_NEW_CC_VP
    },
-   .update = upload_cc_unit
+   .prepare = prepare_cc_unit,
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index 3bec153075a..38d8b704d7e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -29,9 +29,9 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "intel_batchbuffer.h"
 
@@ -60,7 +60,7 @@ static void compile_clip_prog( struct brw_context *brw,
    
    /* Begin the compilation:
     */
-   brw_init_compile(&c.func);
+   brw_init_compile(brw, &c.func);
 
    c.func.single_program_flow = 1;
 
@@ -119,31 +119,19 @@ static void compile_clip_prog( struct brw_context *brw,
 
    /* Upload
     */
-   brw->clip.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_CLIP_PROG],
-						&c.key,
-						sizeof(c.key),
-						program,
-						program_size,
-						&c.prog_data,
-						&brw->clip.prog_data );
+   dri_bo_unreference(brw->clip.prog_bo);
+   brw->clip.prog_bo = brw_upload_cache( &brw->cache,
+					 BRW_CLIP_PROG,
+					 &c.key, sizeof(c.key),
+					 NULL, 0,
+					 program, program_size,
+					 &c.prog_data,
+					 &brw->clip.prog_data );
 }
 
-
-static GLboolean search_cache( struct brw_context *brw, 
-			       struct brw_clip_prog_key *key )
-{
-   return brw_search_cache(&brw->cache[BRW_CLIP_PROG], 
-			   key, sizeof(*key),
-			   &brw->clip.prog_data,
-			   &brw->clip.prog_gs_offset);
-}
-
-
-
-
 /* Calculate interpolants for triangle and line rasterization.
  */
-static void upload_clip_prog( struct brw_context *brw )
+static void upload_clip_prog(struct brw_context *brw)
 {
    GLcontext *ctx = &brw->intel.ctx;
    struct brw_clip_prog_key key;
@@ -180,12 +168,10 @@ static void upload_clip_prog( struct brw_context *brw )
 	       offset_front = 0;
 	       break;
 	    case GL_LINE:
-	       key.do_unfilled = 1;
 	       fill_front = CLIP_LINE;
 	       offset_front = brw->attribs.Polygon->OffsetLine;
 	       break;
 	    case GL_POINT:
-	       key.do_unfilled = 1;
 	       fill_front = CLIP_POINT;
 	       offset_front = brw->attribs.Polygon->OffsetPoint;
 	       break;
@@ -200,22 +186,23 @@ static void upload_clip_prog( struct brw_context *brw )
 	       offset_back = 0;
 	       break;
 	    case GL_LINE:
-	       key.do_unfilled = 1;
 	       fill_back = CLIP_LINE;
 	       offset_back = brw->attribs.Polygon->OffsetLine;
 	       break;
 	    case GL_POINT:
-	       key.do_unfilled = 1;
 	       fill_back = CLIP_POINT;
 	       offset_back = brw->attribs.Polygon->OffsetPoint;
 	       break;
 	    }
 	 }
 
-	 /* Most cases the fixed function units will handle.  Cases where
-	  * one or more polygon faces are unfilled will require help:
-	  */
-	 if (key.do_unfilled) {
+	 if (brw->attribs.Polygon->BackMode != GL_FILL ||
+	     brw->attribs.Polygon->FrontMode != GL_FILL) {
+	    key.do_unfilled = 1;
+
+	    /* Most cases the fixed function units will handle.  Cases where
+	     * one or more polygon faces are unfilled will require help:
+	     */
 	    key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
 
 	    if (offset_back || offset_front) {
@@ -248,7 +235,12 @@ static void upload_clip_prog( struct brw_context *brw )
       }
    }
 
-   if (!search_cache(brw, &key))
+   dri_bo_unreference(brw->clip.prog_bo);
+   brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG,
+					&key, sizeof(key),
+					NULL, 0,
+					&brw->clip.prog_data);
+   if (brw->clip.prog_bo == NULL)
       compile_clip_prog( brw, &key );
 }
 
@@ -262,5 +254,5 @@ const struct brw_tracked_state brw_clip_prog = {
       .brw   = (BRW_NEW_REDUCED_PRIMITIVE),
       .cache = CACHE_NEW_VS_PROG
    },
-   .update = upload_clip_prog
+   .prepare = upload_clip_prog
 };
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h
index 49b2770a514..e06747864b5 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.h
+++ b/src/mesa/drivers/dri/i965/brw_clip.h
@@ -42,7 +42,7 @@
  * up polygon offset and flatshading at this point:
  */
 struct brw_clip_prog_key {
-   GLuint attrs:16;		
+   GLuint attrs:32;		
    GLuint primitive:4;
    GLuint nr_userclip:3;
    GLuint do_flat_shading:1;
@@ -51,7 +51,7 @@ struct brw_clip_prog_key {
    GLuint fill_ccw:2;		/* includes cull information */
    GLuint offset_cw:1;
    GLuint offset_ccw:1;
-   GLuint pad0:1;
+   GLuint pad0:17;
 
    GLuint copy_bfc_cw:1;
    GLuint copy_bfc_ccw:1;
@@ -167,4 +167,9 @@ void brw_clip_copy_colors( struct brw_clip_compile *c,
 
 void brw_clip_init_clipmask( struct brw_clip_compile *c );
 
+struct brw_reg get_tmp( struct brw_clip_compile *c );
+
+void brw_clip_project_position(struct brw_clip_compile *c,
+             struct brw_reg pos );
+
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 83182270eac..c45d48dff8e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -29,11 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
@@ -130,6 +130,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
    struct brw_instruction *plane_loop;
    struct brw_instruction *plane_active;
    struct brw_instruction *is_negative;
+   struct brw_instruction *is_neg2;
    struct brw_instruction *not_culled;
    struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
 
@@ -146,6 +147,16 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
    brw_clip_init_planes(c);
    brw_clip_init_clipmask(c);
 
+   /* -ve rhw workaround */
+   if (!BRW_IS_G4X(p->brw)) {
+      brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
+      brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
+              brw_imm_ud(1<<20));
+      brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
+   }
+
+   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
    plane_loop = brw_DO(p, BRW_EXECUTE_1);
    {
       /* if (planemask & 1)
@@ -183,13 +194,20 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
 	    /* Coming back in.  We know that both cannot be negative
 	     * because the line would have been culled in that case.
 	     */
-	    brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
-	    brw_math_invert(p, c->reg.t, c->reg.t);
-	    brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
 
-	    brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
-	    brw_MOV(p, c->reg.t0, c->reg.t);
-	    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+	    /* If both are positive, do nothing */
+             brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
+             is_neg2 = brw_IF(p, BRW_EXECUTE_1);
+             {
+		brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
+		brw_math_invert(p, c->reg.t, c->reg.t);
+		brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
+
+		brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
+		brw_MOV(p, c->reg.t0, c->reg.t);
+		brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+	     }
+	     brw_ENDIF(p, is_neg2);
 	 }
 	 brw_ENDIF(p, is_negative);	 
       }
diff --git a/src/mesa/drivers/dri/i965/brw_clip_point.c b/src/mesa/drivers/dri/i965/brw_clip_point.c
index 2346980a562..d17b199b898 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_point.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_point.c
@@ -29,11 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 1e6d6fa1762..9b0d7eab7bf 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -32,55 +32,132 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "macros.h"
+#include "main/macros.h"
 
+struct brw_clip_unit_key {
+   unsigned int total_grf;
+   unsigned int urb_entry_read_length;
+   unsigned int curb_entry_read_length;
+   unsigned int clip_mode;
 
+   unsigned int curbe_offset;
 
-static void upload_clip_unit( struct brw_context *brw )
-{
-   struct brw_clip_unit_state clip;
+   unsigned int nr_urb_entries, urb_size;
+};
 
-   memset(&clip, 0, sizeof(clip));
+static void
+clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key)
+{
+   memset(key, 0, sizeof(*key));
 
    /* CACHE_NEW_CLIP_PROG */
-   clip.thread0.grf_reg_count = ((brw->clip.prog_data->total_grf-1) & ~15) / 16;
-   clip.thread0.kernel_start_pointer = brw->clip.prog_gs_offset >> 6;
-   clip.thread3.urb_entry_read_length = brw->clip.prog_data->urb_read_length;
-   clip.thread3.const_urb_entry_read_length = brw->clip.prog_data->curb_read_length;
-   clip.clip5.clip_mode = brw->clip.prog_data->clip_mode;
+   key->total_grf = brw->clip.prog_data->total_grf;
+   key->urb_entry_read_length = brw->clip.prog_data->urb_read_length;
+   key->curb_entry_read_length = brw->clip.prog_data->curb_read_length;
+   key->clip_mode = brw->clip.prog_data->clip_mode;
 
    /* BRW_NEW_CURBE_OFFSETS */
-   clip.thread3.const_urb_entry_read_offset = brw->curbe.clip_start * 2;
+   key->curbe_offset = brw->curbe.clip_start;
 
    /* BRW_NEW_URB_FENCE */
-   clip.thread4.nr_urb_entries = brw->urb.nr_clip_entries; 
-   clip.thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
-   clip.thread4.max_threads = 0; /* Hmm, maybe the max is 1 or 2 threads */
+   key->nr_urb_entries = brw->urb.nr_clip_entries;
+   key->urb_size = brw->urb.vsize;
+}
 
-   if (INTEL_DEBUG & DEBUG_STATS)
-      clip.thread4.stats_enable = 1; 
+static dri_bo *
+clip_unit_create_from_key(struct brw_context *brw,
+			  struct brw_clip_unit_key *key)
+{
+   struct brw_clip_unit_state clip;
+   dri_bo *bo;
+
+   memset(&clip, 0, sizeof(clip));
+
+   clip.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
+   /* reloc */
+   clip.thread0.kernel_start_pointer = brw->clip.prog_bo->offset >> 6;
 
-   /* CONSTANT */
    clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
    clip.thread1.single_program_flow = 1;
+
+   clip.thread3.urb_entry_read_length = key->urb_entry_read_length;
+   clip.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
+   clip.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
    clip.thread3.dispatch_grf_start_reg = 1;
    clip.thread3.urb_entry_read_offset = 0;
+
+   clip.thread4.nr_urb_entries = key->nr_urb_entries;
+   clip.thread4.urb_entry_allocation_size = key->urb_size - 1;
+   /* If we have enough clip URB entries to run two threads, do so.
+    */
+   if (key->nr_urb_entries >= 10) {
+      /* Half of the URB entries go to each thread, and it has to be an
+       * even number.
+       */
+      assert(key->nr_urb_entries % 2 == 0);
+      clip.thread4.max_threads = 2 - 1;
+   } else {
+      assert(key->nr_urb_entries >= 5);
+      clip.thread4.max_threads = 1 - 1;
+   }
+
+   if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
+      clip.thread4.max_threads = 0;
+
+   if (INTEL_DEBUG & DEBUG_STATS)
+      clip.thread4.stats_enable = 1;
+
    clip.clip5.userclip_enable_flags = 0x7f;
    clip.clip5.userclip_must_clip = 1;
    clip.clip5.guard_band_enable = 0;
    clip.clip5.viewport_z_clip_enable = 1;
    clip.clip5.viewport_xy_clip_enable = 1;
    clip.clip5.vertex_position_space = BRW_CLIP_NDCSPACE;
-   clip.clip5.api_mode = BRW_CLIP_API_OGL;   
+   clip.clip5.api_mode = BRW_CLIP_API_OGL;
+   clip.clip5.clip_mode = key->clip_mode;
+
+   if (BRW_IS_G4X(brw))
+      clip.clip5.negative_w_clip_test = 1;
+
    clip.clip6.clipper_viewport_state_ptr = 0;
    clip.viewport_xmin = -1;
    clip.viewport_xmax = 1;
    clip.viewport_ymin = -1;
    clip.viewport_ymax = 1;
 
-   brw->clip.state_gs_offset = brw_cache_data( &brw->cache[BRW_CLIP_UNIT], &clip );
+   bo = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT,
+			 key, sizeof(*key),
+			 &brw->clip.prog_bo, 1,
+			 &clip, sizeof(clip),
+			 NULL, NULL);
+
+   /* Emit clip program relocation */
+   assert(brw->clip.prog_bo);
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION,
+		     0,
+		     clip.thread0.grf_reg_count << 1,
+		     offsetof(struct brw_clip_unit_state, thread0),
+		     brw->clip.prog_bo);
+
+   return bo;
 }
 
+static void upload_clip_unit( struct brw_context *brw )
+{
+   struct brw_clip_unit_key key;
+
+   clip_unit_populate_key(brw, &key);
+
+   dri_bo_unreference(brw->clip.state_bo);
+   brw->clip.state_bo = brw_search_cache(&brw->cache, BRW_CLIP_UNIT,
+					 &key, sizeof(key),
+					 &brw->clip.prog_bo, 1,
+					 NULL);
+   if (brw->clip.state_bo == NULL) {
+      brw->clip.state_bo = clip_unit_create_from_key(brw, &key);
+   }
+}
 
 const struct brw_tracked_state brw_clip_unit = {
    .dirty = {
@@ -89,5 +166,5 @@ const struct brw_tracked_state brw_clip_unit = {
 		BRW_NEW_URB_FENCE),
       .cache = CACHE_NEW_CLIP_PROG
    },
-   .update = upload_clip_unit
+   .prepare = upload_clip_unit,
 };
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index f62b02cedfd..1dbba37fe7e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -29,11 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
@@ -42,6 +42,10 @@
 #include "brw_util.h"
 #include "brw_clip.h"
 
+static void release_tmps( struct brw_clip_compile *c )
+{
+   c->last_tmp = c->first_tmp;
+}
 
 
 void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, 
@@ -78,7 +82,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
    }
 
    c->reg.t          = brw_vec1_grf(i, 0);
-   c->reg.loopcount  = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_UD);
+   c->reg.loopcount  = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_D);
    c->reg.nr_verts   = retype(brw_vec1_grf(i, 2), BRW_REGISTER_TYPE_UD);
    c->reg.planemask  = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
    c->reg.plane_equation = brw_vec4_grf(i, 4);
@@ -435,15 +439,103 @@ static void maybe_do_clip_tri( struct brw_clip_compile *c )
    brw_ENDIF(p, do_clip);
 }
 
-
+static void brw_clip_test( struct brw_clip_compile *c )
+{
+    struct brw_reg t = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
+    struct brw_reg t1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
+    struct brw_reg t2 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
+    struct brw_reg t3 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
+
+    struct brw_reg v0 = get_tmp(c);
+    struct brw_reg v1 = get_tmp(c);
+    struct brw_reg v2 = get_tmp(c);
+
+    struct brw_indirect vt0 = brw_indirect(0, 0);
+    struct brw_indirect vt1 = brw_indirect(1, 0);
+    struct brw_indirect vt2 = brw_indirect(2, 0);
+
+    struct brw_compile *p = &c->func;
+
+    brw_MOV(p, get_addr_reg(vt0), brw_address(c->reg.vertex[0]));
+    brw_MOV(p, get_addr_reg(vt1), brw_address(c->reg.vertex[1]));
+    brw_MOV(p, get_addr_reg(vt2), brw_address(c->reg.vertex[2]));
+    brw_MOV(p, v0, deref_4f(vt0, c->offset[VERT_RESULT_HPOS]));
+    brw_MOV(p, v1, deref_4f(vt1, c->offset[VERT_RESULT_HPOS]));
+    brw_MOV(p, v2, deref_4f(vt2, c->offset[VERT_RESULT_HPOS]));
+
+    /* test nearz, xmin, ymin plane */
+    brw_CMP(p, t1, BRW_CONDITIONAL_LE, negate(v0), get_element(v0, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, t2, BRW_CONDITIONAL_LE, negate(v1), get_element(v1, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, t3, BRW_CONDITIONAL_LE, negate(v2), get_element(v2, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_XOR(p, t, t1, t2);
+    brw_XOR(p, t1, t2, t3);
+    brw_OR(p, t, t, t1);
+
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 0), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<5)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 1), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<3)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 2), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<1)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
+    /* test farz, xmax, ymax plane */
+    brw_CMP(p, t1, BRW_CONDITIONAL_L, v0, get_element(v0, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, t2, BRW_CONDITIONAL_L, v1, get_element(v1, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, t3, BRW_CONDITIONAL_L, v2, get_element(v2, 3)); 
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
+    brw_XOR(p, t, t1, t2);
+    brw_XOR(p, t1, t2, t3);
+    brw_OR(p, t, t, t1);
+
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 0), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<4)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 1), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<2)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ, 
+	    get_element(t, 2), brw_imm_ud(0));
+    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<0)));
+    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
+    release_tmps(c);
+}
 
 
 void brw_emit_tri_clip( struct brw_clip_compile *c )
 {
+   struct brw_instruction *neg_rhw;
+   struct brw_compile *p = &c->func;
    brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
    brw_clip_tri_init_vertices(c);
    brw_clip_init_clipmask(c);
 
+   /* if -ve rhw workaround bit is set, 
+      do cliptest */
+   if (!BRW_IS_G4X(p->brw)) {
+      brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
+      brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), 
+              brw_imm_ud(1<<20));
+      neg_rhw = brw_IF(p, BRW_EXECUTE_1); 
+      {
+         brw_clip_test(c);
+      }
+      brw_ENDIF(p, neg_rhw);
+   }
    /* Can't push into do_clip_tri because with polygon (or quad)
     * flatshading, need to apply the flatshade here because we don't
     * respect the PV when converting to trifan for emit:
@@ -462,6 +554,3 @@ void brw_emit_tri_clip( struct brw_clip_compile *c )
     */
    brw_clip_kill_thread(c);
 }
-
-
-
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 918e0001870..d7ca517927b 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -29,11 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
@@ -58,10 +58,30 @@ static void compute_tri_direction( struct brw_clip_compile *c )
    struct brw_reg v2 = byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_HPOS]); 
 
 
+   struct brw_reg v0n = get_tmp(c);
+   struct brw_reg v1n = get_tmp(c);
+   struct brw_reg v2n = get_tmp(c);
+
+   /* Convert to NDC.
+    * NOTE: We can't modify the original vertex coordinates,
+    * as it may impact further operations.
+    * So, we have to keep normalized coordinates in temp registers.
+    *
+    * TBD-KC
+    * Try to optimize unnecessary MOV's.
+    */
+   brw_MOV(p, v0n, v0);
+   brw_MOV(p, v1n, v1);
+   brw_MOV(p, v2n, v2);
+
+   brw_clip_project_position(c, v0n);
+   brw_clip_project_position(c, v1n);
+   brw_clip_project_position(c, v2n);
+
    /* Calculate the vectors of two edges of the triangle:
     */
-   brw_ADD(p, e, v0, negate(v2)); 
-   brw_ADD(p, f, v1, negate(v2)); 
+   brw_ADD(p, e, v0n, negate(v2n)); 
+   brw_ADD(p, f, v1n, negate(v2n)); 
 
    /* Take their crossproduct:
     */
@@ -220,8 +240,8 @@ static void apply_one_offset( struct brw_clip_compile *c,
 			  struct brw_indirect vert )
 {
    struct brw_compile *p = &c->func;
-   struct brw_reg pos = deref_4f(vert, c->offset[VERT_RESULT_HPOS]);
-   struct brw_reg z = get_element(pos, 2);
+   struct brw_reg z = deref_1f(vert, c->header_position_offset +
+			       2 * type_sz(BRW_REGISTER_TYPE_F));
 
    brw_ADD(p, z, z, vec1(c->reg.offset));
 }
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 19bef19801a..9d3b0be694a 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -30,11 +30,11 @@
   */
 
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
+
 #include "intel_batchbuffer.h"
 
 #include "brw_defines.h"
@@ -46,8 +46,7 @@
 
 
 
-
-static struct brw_reg get_tmp( struct brw_clip_compile *c )
+struct brw_reg get_tmp( struct brw_clip_compile *c )
 {
    struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
 
@@ -90,7 +89,7 @@ void brw_clip_init_planes( struct brw_clip_compile *c )
 
 /* Project 'pos' to screen space (or back again), overwrite with results:
  */
-static void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
+void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
 {
    struct brw_compile *p = &c->func;
 
@@ -262,7 +261,7 @@ void brw_clip_kill_thread(struct brw_clip_compile *c)
 		 c->reg.R0,
 		 0,		/* allocate */
 		 0,		/* used */
-		 0, 		/* msg len */
+		 1, 		/* msg len */
 		 0, 		/* response len */
 		 1, 		/* eot */
 		 1,		/* writes complete */
@@ -272,6 +271,7 @@ void brw_clip_kill_thread(struct brw_clip_compile *c)
 
 
 
+
 struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
 {
    return brw_address(c->reg.fixed_planes);
@@ -327,8 +327,7 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
    
    /* Shift so that lowest outcode bit is rightmost: 
     */
-   brw_MOV(p, c->reg.planemask, incoming);
-   brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(26));
+   brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
 
    if (c->key.nr_userclip) {
       struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
@@ -342,13 +341,5 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
       
       release_tmp(c, tmp);
    }
-
-   /* Test for -ve rhw workaround 
-    */
-   brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
-   brw_AND(p, vec1(brw_null_reg()), incoming, brw_imm_ud(1<<20));
-   brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 397a9bd3f5c..1d6ac2cea68 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -30,42 +30,49 @@
   */
 
 
+#include "main/imports.h"
+#include "main/api_noop.h"
+#include "main/vtxfmt.h"
+#include "main/simple_list.h"
+#include "shader/shader_api.h"
+
 #include "brw_context.h"
-#include "brw_aub.h"
 #include "brw_defines.h"
 #include "brw_draw.h"
+#include "brw_state.h"
 #include "brw_vs.h"
-#include "imports.h"
 #include "intel_tex.h"
 #include "intel_blit.h"
 #include "intel_batchbuffer.h"
+#include "intel_pixel.h"
+#include "intel_span.h"
+#include "tnl/t_pipeline.h"
 
 #include "utils.h"
-#include "api_noop.h"
-#include "vtxfmt.h"
+
 
 /***************************************
  * Mesa's Driver Functions
  ***************************************/
 
-static const struct dri_extension brw_extensions[] =
+static void brwUseProgram(GLcontext *ctx, GLuint program)
 {
-    { "GL_ARB_depth_texture",              NULL },
-    { "GL_ARB_fragment_program",           NULL },
-    { "GL_ARB_shadow",                     NULL },
-    { "GL_EXT_shadow_funcs",               NULL },
-    /* ARB extn won't work if not enabled */
-    { "GL_SGIX_depth_texture",             NULL },
-    { "GL_ARB_texture_env_crossbar",       NULL },
-    { NULL,                                NULL }
-};
-
+   _mesa_use_program(ctx, program);
+}
 
+static void brwInitProgFuncs( struct dd_function_table *functions )
+{
+   functions->UseProgram = brwUseProgram;
+}
 static void brwInitDriverFunctions( struct dd_function_table *functions )
 {
    intelInitDriverFunctions( functions );
-   brwInitTextureFuncs( functions );
+
    brwInitFragProgFuncs( functions );
+   brwInitProgFuncs( functions );
+   brw_init_queryobj_functions(functions);
+
+   functions->Viewport = intel_viewport;
 }
 
 
@@ -116,10 +123,15 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
       return GL_FALSE;
    }
 
+   /* Initialize swrast, tnl driver tables: */
+   intelInitSpanFuncs(ctx);
+
+   TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
+
    ctx->Const.MaxTextureUnits = BRW_MAX_TEX_UNIT;
    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
    ctx->Const.MaxTextureCoordUnits = BRW_MAX_TEX_UNIT;
-
+   ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
 
    /* Advertise the full hardware capabilities.  The new memory
     * manager should cope much better with overload situations:
@@ -128,15 +140,9 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
    ctx->Const.Max3DTextureLevels = 9;
    ctx->Const.MaxCubeTextureLevels = 12;
    ctx->Const.MaxTextureRectSize = (1<<11);
-   ctx->Const.MaxTextureUnits = BRW_MAX_TEX_UNIT;
    
 /*    ctx->Const.MaxNativeVertexProgramTemps = 32; */
 
-
-   driInitExtensions( ctx, brw_extensions, GL_FALSE );
-
-   brw_aub_init( brw );
-
    brw_init_attribs( brw );
    brw_init_metaops( brw );
    brw_init_state( brw );
@@ -144,25 +150,14 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
    brw->state.dirty.mesa = ~0;
    brw->state.dirty.brw = ~0;
 
-   memset(&brw->wm.bind, ~0, sizeof(brw->wm.bind));
-
    brw->emit_state_always = 0;
 
-   ctx->FragmentProgram._MaintainTexEnvProgram = 1;
+   ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
+   ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 
-   brw_draw_init( brw );
-
-   brw_ProgramCacheInit( ctx );
-
-   brw_FrameBufferTexInit( brw );
+   make_empty_list(&brw->query.active_head);
 
-   {
-      const char *filename = getenv("INTEL_REPLAY");
-      if (filename) {
-	 brw_playback_aubfile(brw, filename);
-	 exit(0);
-      }
-   }
+   brw_draw_init( brw );
 
    return GL_TRUE;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 08fdc545205..77980109cdf 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -35,7 +35,7 @@
 
 #include "intel_context.h"
 #include "brw_structs.h"
-#include "imports.h"
+#include "main/imports.h"
 
 
 /* Glossary:
@@ -130,24 +130,34 @@ struct brw_context;
 #define BRW_NEW_CONTEXT                 0x80
 #define BRW_NEW_WM_INPUT_DIMENSIONS     0x100
 #define BRW_NEW_INPUT_VARYING           0x200
-#define BRW_NEW_TNL_PROGRAM             0x400
 #define BRW_NEW_PSP                     0x800
 #define BRW_NEW_METAOPS                 0x1000
 #define BRW_NEW_FENCE                   0x2000
-#define BRW_NEW_LOCK                    0x4000
-
-
+#define BRW_NEW_INDICES			0x4000
+#define BRW_NEW_VERTICES		0x8000
+/**
+ * Used for any batch entry with a relocated pointer that will be used
+ * by any 3D rendering.
+ */
+#define BRW_NEW_BATCH			0x10000
+/** brw->depth_region updated */
+#define BRW_NEW_DEPTH_BUFFER		0x20000
+#define BRW_NEW_NR_SURFACES		0x40000
 
 struct brw_state_flags {
+   /** State update flags signalled by mesa internals */
    GLuint mesa;
-   GLuint cache;
+   /**
+    * State update flags signalled as the result of brw_tracked_state updates
+    */
    GLuint brw;
+   /** State update flags signalled by brw_state_cache.c searches */
+   GLuint cache;
 };
 
 struct brw_vertex_program {
    struct gl_vertex_program program;
    GLuint id;
-   GLuint param_state;		/* flags indicating state tracked by params */
 };
 
 
@@ -155,7 +165,6 @@ struct brw_vertex_program {
 struct brw_fragment_program {
    struct gl_fragment_program program;
    GLuint id;
-   GLuint param_state;		/* flags indicating state tracked by params */
 };
 
 
@@ -230,32 +239,46 @@ struct brw_vs_ouput_sizes {
 
 
 #define BRW_MAX_TEX_UNIT 8
-#define BRW_WM_MAX_SURF BRW_MAX_TEX_UNIT + 1
+#define BRW_WM_MAX_SURF BRW_MAX_TEX_UNIT + MAX_DRAW_BUFFERS
 
-/* Create a fixed sized struct for caching binding tables:
- */
-struct brw_surface_binding_table {
-   GLuint surf_ss_offset[BRW_WM_MAX_SURF];
-};
-
-
-struct brw_cache;
-
-struct brw_mem_pool {
-   struct buffer *buffer;
-
-   GLuint size;
-   GLuint offset;		/* offset of first free byte */
+enum brw_cache_id {
+   BRW_CC_VP,
+   BRW_CC_UNIT,
+   BRW_WM_PROG,
+   BRW_SAMPLER_DEFAULT_COLOR,
+   BRW_SAMPLER,
+   BRW_WM_UNIT,
+   BRW_SF_PROG,
+   BRW_SF_VP,
+   BRW_SF_UNIT,
+   BRW_VS_UNIT,
+   BRW_VS_PROG,
+   BRW_GS_UNIT,
+   BRW_GS_PROG,
+   BRW_CLIP_VP,
+   BRW_CLIP_UNIT,
+   BRW_CLIP_PROG,
+   BRW_SS_SURFACE,
+   BRW_SS_SURF_BIND,
 
-   struct brw_context *brw;
+   BRW_MAX_CACHE
 };
 
 struct brw_cache_item {
+   /**
+    * Effectively part of the key, cache_id identifies what kind of state
+    * buffer is involved, and also which brw->state.dirty.cache flag should
+    * be set when this cache item is chosen.
+    */
+   enum brw_cache_id cache_id;
+   /** 32-bit hash of the key data */
    GLuint hash;
    GLuint key_size;		/* for variable-sized keys */
    const void *key;
+   dri_bo **reloc_bufs;
+   GLuint nr_reloc_bufs;
 
-   GLuint offset;		/* offset within pool's buffer */
+   dri_bo *bo;
    GLuint data_size;
 
    struct brw_cache_item *next;
@@ -264,23 +287,19 @@ struct brw_cache_item {
 
 
 struct brw_cache {
-   GLuint id;
-
-   const char *name;
-
    struct brw_context *brw;
-   struct brw_mem_pool *pool;
 
    struct brw_cache_item **items;
    GLuint size, n_items;
-   
-   GLuint key_size;		/* for fixed-size keys */
-   GLuint aux_size;
 
-   GLuint aub_type;
-   GLuint aub_sub_type;
-   
-   GLuint last_addr;			/* offset of active item */
+   GLuint key_size[BRW_MAX_CACHE];		/* for fixed-size keys */
+   GLuint aux_size[BRW_MAX_CACHE];
+   char *name[BRW_MAX_CACHE];
+
+   /* Record of the last BOs chosen for each cache_id.  Used to set
+    * brw->state.dirty.cache when a new cache item is chosen.
+    */
+   dri_bo *last_bo[BRW_MAX_CACHE];
 };
 
 
@@ -312,34 +331,8 @@ struct brw_state_pointers {
  */
 struct brw_tracked_state {
    struct brw_state_flags dirty;
-   void (*update)( struct brw_context *brw );
-};
-
-
-enum brw_cache_id {
-   BRW_CC_VP,
-   BRW_CC_UNIT,
-   BRW_WM_PROG,
-   BRW_SAMPLER_DEFAULT_COLOR,
-   BRW_SAMPLER,
-   BRW_WM_UNIT,
-   BRW_SF_PROG,
-   BRW_SF_VP,
-   BRW_SF_UNIT,
-   BRW_VS_UNIT,
-   BRW_VS_PROG,
-   BRW_GS_UNIT,
-   BRW_GS_PROG,
-   BRW_CLIP_VP,
-   BRW_CLIP_UNIT,
-   BRW_CLIP_PROG,
-
-   /* These two are in the SS pool:
-    */
-   BRW_SS_SURFACE,
-   BRW_SS_SURF_BIND,
-
-   BRW_MAX_CACHE
+   void (*prepare)( struct brw_context *brw );
+   void (*emit)( struct brw_context *brw );
 };
 
 /* Flags for brw->state.cache.
@@ -363,16 +356,6 @@ enum brw_cache_id {
 #define CACHE_NEW_SURFACE                (1<<BRW_SS_SURFACE)
 #define CACHE_NEW_SURF_BIND              (1<<BRW_SS_SURF_BIND)
 
-
-
-
-enum brw_mempool_id {
-   BRW_GS_POOL,
-   BRW_SS_POOL,
-   BRW_MAX_POOL
-};
-
-
 struct brw_cached_batch_item {
    struct header *header;
    GLuint sz;
@@ -389,12 +372,16 @@ struct brw_cached_batch_item {
 struct brw_vertex_element {
    const struct gl_client_array *glarray;
 
-   struct brw_vertex_element_state *vep;
-
-   GLuint index;
+   /** Size of a complete element */
    GLuint element_size;
+   /** Number of uploaded elements for this input. */
    GLuint count;
-   GLuint vbo_rebase_offset;
+   /** Byte stride between elements in the uploaded array */
+   GLuint stride;
+   /** Offset of the first element within the buffer object */
+   unsigned int offset;
+   /** Buffer object containing the uploaded vertex data */
+   dri_bo *bo;
 };
 
 
@@ -421,7 +408,22 @@ struct brw_tnl_cache {
    GLuint size, n_items;
 };
 
+struct brw_query_object {
+   struct gl_query_object Base;
+
+   /** Doubly linked list of active query objects in the context. */
+   struct brw_query_object *prev, *next;
+
+   /** Last query BO associated with this query. */
+   dri_bo *bo;
+   /** First index in bo with query data for this object. */
+   int first_index;
+   /** Last index in bo with query data for this object. */
+   int last_index;
 
+   /* Total count of pixels from previous BOs */
+   unsigned int count;
+};
 
 struct brw_context 
 {
@@ -429,51 +431,67 @@ struct brw_context
    GLuint primitive;
 
    GLboolean emit_state_always;
-   GLboolean wrap;
    GLboolean tmp_fallback;
+   GLboolean no_batch_wrap;
 
    struct {
       struct brw_state_flags dirty;
       struct brw_tracked_state **atoms;
       GLuint nr_atoms;
 
-
-      struct intel_region *draw_region;
+      GLuint nr_draw_regions;
+      struct intel_region *draw_regions[MAX_DRAW_BUFFERS];
       struct intel_region *depth_region;
+
+      /**
+       * List of buffers accumulated in brw_validate_state to receive
+       * dri_bo_check_aperture treatment before exec, so we can know if we
+       * should flush the batch and try again before emitting primitives.
+       *
+       * This can be a fixed number as we only have a limited number of
+       * objects referenced from the batchbuffer in a primitive emit,
+       * consisting of the vertex buffers, pipelined state pointers,
+       * the CURBE, the depth buffer, and a query BO.
+       */
+      dri_bo *validated_bos[VERT_ATTRIB_MAX + 16];
+      int validated_bo_count;
    } state;
 
    struct brw_state_pointers attribs;
-   struct brw_mem_pool pool[BRW_MAX_POOL];
-   struct brw_cache cache[BRW_MAX_CACHE];
+   struct brw_cache cache;
    struct brw_cached_batch_item *cached_batch_items;
 
    struct {
-
-      /* Arrays with buffer objects to copy non-bufferobj arrays into
-       * for upload:
-       */
-      struct gl_client_array vbo_array[VERT_ATTRIB_MAX];
-
       struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
 
 #define BRW_NR_UPLOAD_BUFS 17
 #define BRW_UPLOAD_INIT_SIZE (128*1024)
 
       struct {
-	 struct gl_buffer_object *vbo[BRW_NR_UPLOAD_BUFS];
-	 GLuint buf;
+	 dri_bo *bo;
 	 GLuint offset;
-	 GLuint size;
-	 GLuint wrap;
       } upload;
 
       /* Summary of size and varying of active arrays, so we can check
        * for changes to this state:
        */
       struct brw_vertex_info info;
+      unsigned int min_index, max_index;
    } vb;
 
    struct {
+      /**
+       * Index buffer for this draw_prims call.
+       *
+       * Updates are signaled by BRW_NEW_INDICES.
+       */
+      const struct _mesa_index_buffer *ib;
+
+      dri_bo *bo;
+      unsigned int offset;
+   } ib;
+
+   struct {
       /* Will be allocated on demand if needed.   
        */
       struct brw_state_pointers attribs;
@@ -483,18 +501,17 @@ struct brw_context
       struct gl_buffer_object *vbo;
 
       struct intel_region *saved_draw_region;
+      GLuint saved_nr_draw_regions;
       struct intel_region *saved_depth_region;
 
-      GLuint restore_draw_mask;
+      GLuint restore_draw_buffers[MAX_DRAW_BUFFERS];
+      GLuint restore_num_draw_buffers;
+
       struct gl_fragment_program *restore_fp;
       
       GLboolean active;
    } metaops;
 
-   /* Track fixed function t&l in a vertex program:
-    */
-   struct gl_vertex_program *tnl_program;
-   struct brw_tnl_cache tnl_program_cache;
 
    /* Active vertex program: 
     */
@@ -552,42 +569,51 @@ struct brw_context
        */
       struct brw_tracked_state tracked_state;
 
-      GLuint gs_offset;
+      dri_bo *curbe_bo;
+      /** Offset within curbe_bo of space for current curbe entry */
+      GLuint curbe_offset;
+      /** Offset within curbe_bo of space for next curbe entry */
+      GLuint curbe_next_offset;
 
       GLfloat *last_buf;
       GLuint last_bufsz;
+      /**
+       *  Whether we should create a new bo instead of reusing the old one
+       * (if we just dispatch the batch pointing at the old one.
+       */
+      GLboolean need_new_bo;
    } curbe;
 
    struct {
       struct brw_vs_prog_data *prog_data;
 
-      GLuint prog_gs_offset;
-      GLuint state_gs_offset;	
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
    } vs;
 
    struct {
       struct brw_gs_prog_data *prog_data;
 
       GLboolean prog_active;
-      GLuint prog_gs_offset;
-      GLuint state_gs_offset;	
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
    } gs;
 
    struct {
       struct brw_clip_prog_data *prog_data;
 
-      GLuint prog_gs_offset;
-      GLuint vp_gs_offset;
-      GLuint state_gs_offset;	
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
+      dri_bo *vp_bo;
    } clip;
 
 
    struct {
       struct brw_sf_prog_data *prog_data;
 
-      GLuint prog_gs_offset;
-      GLuint vp_gs_offset;
-      GLuint state_gs_offset;
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
+      dri_bo *vp_bo;
    } sf;
 
    struct {
@@ -598,36 +624,39 @@ struct brw_context
        */
       GLuint input_size_masks[4];
 
-
-      /* State structs
-       */
-      struct brw_sampler_default_color sdc[BRW_MAX_TEX_UNIT];
-      struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
+      /** Array of surface default colors (texture border color) */
+      dri_bo *sdc_bo[BRW_MAX_TEX_UNIT];
 
       GLuint render_surf;
       GLuint nr_surfaces;      
 
       GLuint max_threads;
-      struct buffer *scratch_buffer;
-      GLuint scratch_buffer_size;
+      dri_bo *scratch_buffer;
 
       GLuint sampler_count;
-      GLuint sampler_gs_offset;
+      dri_bo *sampler_bo;
 
-      struct brw_surface_binding_table bind;
-      GLuint bind_ss_offset;
+      /** Binding table of pointers to surf_bo entries */
+      dri_bo *bind_bo;
+      dri_bo *surf_bo[BRW_WM_MAX_SURF];
 
-      GLuint prog_gs_offset;
-      GLuint state_gs_offset;
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
    } wm;
 
 
    struct {
-      GLuint vp_gs_offset;
-      GLuint state_gs_offset;
+      dri_bo *prog_bo;
+      dri_bo *state_bo;
+      dri_bo *vp_bo;
    } cc;
 
-   
+   struct {
+      struct brw_query_object active_head;
+      dri_bo *bo;
+      int index;
+      GLboolean active;
+   } query;
    /* Used to give every program string a unique id
     */
    GLuint program_id;
@@ -652,24 +681,27 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
 			    __DRIcontextPrivate *driContextPriv,
 			    void *sharedContextPrivate);
 
-
-
 /*======================================================================
- * brw_state.c
+ * brw_queryobj.c
  */
-void brw_validate_state( struct brw_context *brw );
-void brw_init_state( struct brw_context *brw );
-void brw_destroy_state( struct brw_context *brw );
-
+void brw_init_queryobj_functions(struct dd_function_table *functions);
+void brw_prepare_query_begin(struct brw_context *brw);
+void brw_emit_query_begin(struct brw_context *brw);
+void brw_emit_query_end(struct brw_context *brw);
 
+/*======================================================================
+ * brw_state_dump.c
+ */
+void brw_debug_batch(struct intel_context *intel);
 
 /*======================================================================
  * brw_tex.c
  */
 void brwUpdateTextureState( struct intel_context *intel );
-void brwInitTextureFuncs( struct dd_function_table *functions );
-void brw_FrameBufferTexInit( struct brw_context *brw );
+void brw_FrameBufferTexInit( struct brw_context *brw,
+			     struct intel_region *region );
 void brw_FrameBufferTexDestroy( struct brw_context *brw );
+void brw_validate_textures( struct brw_context *brw );
 
 /*======================================================================
  * brw_metaops.c
@@ -696,11 +728,13 @@ void brw_upload_constant_buffer_state(struct brw_context *brw);
  * Inline conversion functions.  These are better-typed than the
  * macros used previously:
  */
-static inline struct brw_context *
+static INLINE struct brw_context *
 brw_context( GLcontext *ctx )
 {
    return (struct brw_context *)ctx;
 }
 
+#define DO_SETUP_BITS ((1<<(FRAG_ATTRIB_MAX)) - 1)
+
 #endif
 
diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c
index 3f0aaa1f86d..fbf473abf66 100644
--- a/src/mesa/drivers/dri/i965/brw_curbe.c
+++ b/src/mesa/drivers/dri/i965/brw_curbe.c
@@ -31,10 +31,10 @@
 
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
 #include "intel_batchbuffer.h"
@@ -42,7 +42,6 @@
 #include "brw_defines.h"
 #include "brw_state.h"
 #include "brw_util.h"
-#include "brw_aub.h"
 
 
 /* Partition the CURBE between the various users of constant values:
@@ -90,7 +89,7 @@ static void calculate_curbe_offsets( struct brw_context *brw )
     */
    if (nr_fp_regs > brw->curbe.wm_size ||
        nr_vp_regs > brw->curbe.vs_size ||
-       nr_clip_regs > brw->curbe.clip_size ||
+       nr_clip_regs != brw->curbe.clip_size ||
        (total_regs < brw->curbe.total_size / 4 &&
 	brw->curbe.total_size > 16)) {
 
@@ -127,7 +126,7 @@ const struct brw_tracked_state brw_curbe_offsets = {
       .brw  = BRW_NEW_VERTEX_PROGRAM,
       .cache = CACHE_NEW_WM_PROG
    },
-   .update = calculate_curbe_offsets
+   .prepare = calculate_curbe_offsets
 };
 
 
@@ -156,19 +155,7 @@ void brw_upload_constant_buffer_state(struct brw_context *brw)
 
    assert(brw->urb.nr_cs_entries);
    BRW_CACHED_BATCH_STRUCT(brw, &cbs);
-}      
-
-#if 0
-const struct brw_tracked_state brw_constant_buffer_state = {
-   .dirty = {
-      .mesa = 0,
-      .brw = BRW_NEW_URB_FENCE,
-      .cache = 0
-   },
-   .update = brw_upload_constant_buffer_state
-};
-#endif
-
+}
 
 static GLfloat fixed_plane[6][4] = {
    { 0,    0,   -1, 1 },
@@ -183,12 +170,11 @@ static GLfloat fixed_plane[6][4] = {
  * cache mechanism, but maybe would benefit from a comparison against
  * the current uploaded set of constants.
  */
-static void upload_constant_buffer(struct brw_context *brw)
+static void prepare_constant_buffer(struct brw_context *brw)
 {
    GLcontext *ctx = &brw->intel.ctx;
    struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program;
    struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program;
-   struct brw_mem_pool *pool = &brw->pool[BRW_GS_POOL];
    GLuint sz = brw->curbe.total_size;
    GLuint bufsz = sz * 16 * sizeof(GLfloat);
    GLfloat *buf;
@@ -198,24 +184,17 @@ static void upload_constant_buffer(struct brw_context *brw)
     * function will also be called whenever fp or vp changes.
     */
    brw->curbe.tracked_state.dirty.mesa = (_NEW_TRANSFORM|_NEW_PROJECTION);
-   brw->curbe.tracked_state.dirty.mesa |= vp->param_state;
-   brw->curbe.tracked_state.dirty.mesa |= fp->param_state;
+   brw->curbe.tracked_state.dirty.mesa |= vp->program.Base.Parameters->StateFlags;
+   brw->curbe.tracked_state.dirty.mesa |= fp->program.Base.Parameters->StateFlags;
 
    if (sz == 0) {
-      struct brw_constant_buffer cb;
-      cb.header.opcode = CMD_CONST_BUFFER;
-      cb.header.length = sizeof(cb)/4 - 2;
-      cb.header.valid = 0;
-      cb.bits0.buffer_length = 0;
-      cb.bits0.buffer_address = 0;
-      BRW_BATCH_STRUCT(brw, &cb);
 
       if (brw->curbe.last_buf) {
 	 free(brw->curbe.last_buf);
 	 brw->curbe.last_buf = NULL;
 	 brw->curbe.last_bufsz  = 0;
       }
-       
+
       return;
    }
 
@@ -290,11 +269,11 @@ static void upload_constant_buffer(struct brw_context *brw)
 		   brw->curbe.last_buf ? memcmp(buf, brw->curbe.last_buf, bufsz) : -1);
    }
 
-   if (brw->curbe.last_buf &&
+   if (brw->curbe.curbe_bo != NULL &&
+       brw->curbe.last_buf &&
        bufsz == brw->curbe.last_bufsz &&
        memcmp(buf, brw->curbe.last_buf, bufsz) == 0) {
       free(buf);
-/*       return; */
    } 
    else {
       if (brw->curbe.last_buf)
@@ -302,61 +281,66 @@ static void upload_constant_buffer(struct brw_context *brw)
       brw->curbe.last_buf = buf;
       brw->curbe.last_bufsz = bufsz;
 
-      
-      if (!brw_pool_alloc(pool, 
-			  bufsz,
-			  6,
-			  &brw->curbe.gs_offset)) {
-	 _mesa_printf("out of GS memory for curbe\n");
-	 assert(0);
-	 return;
+      if (brw->curbe.curbe_bo != NULL &&
+	  (brw->curbe.need_new_bo ||
+	   brw->curbe.curbe_next_offset + bufsz > brw->curbe.curbe_bo->size))
+      {
+	 dri_bo_unreference(brw->curbe.curbe_bo);
+	 brw->curbe.curbe_bo = NULL;
+      }
+
+      if (brw->curbe.curbe_bo == NULL) {
+	 /* Allocate a single page for CURBE entries for this batchbuffer.
+	  * They're generally around 64b.
+	  */
+	 brw->curbe.curbe_bo = dri_bo_alloc(brw->intel.bufmgr, "CURBE",
+					    4096, 1 << 6);
+	 brw->curbe.curbe_next_offset = 0;
       }
-            
+
+      brw->curbe.curbe_offset = brw->curbe.curbe_next_offset;
+      brw->curbe.curbe_next_offset += bufsz;
+      brw->curbe.curbe_next_offset = ALIGN(brw->curbe.curbe_next_offset, 64);
 
       /* Copy data to the buffer:
        */
-      bmBufferSubDataAUB(&brw->intel,
-			 pool->buffer,
-			 brw->curbe.gs_offset, 
-			 bufsz, 
-			 buf,
-			 DW_CONSTANT_BUFFER,
-			 0);
+      dri_bo_subdata(brw->curbe.curbe_bo, brw->curbe.curbe_offset, bufsz, buf);
    }
 
-   /* TODO: only emit the constant_buffer packet when necessary, ie:
-      - contents have changed
-      - offset has changed
-      - hw requirements due to other packets emitted.
-   */
-   {
-      struct brw_constant_buffer cb;
-      
-      memset(&cb, 0, sizeof(cb));
-
-      cb.header.opcode = CMD_CONST_BUFFER;
-      cb.header.length = sizeof(cb)/4 - 2;
-      cb.header.valid = 1;
-      cb.bits0.buffer_length = sz - 1;
-      cb.bits0.buffer_address = brw->curbe.gs_offset >> 6;
-      
-      /* Because this provokes an action (ie copy the constants into the
-       * URB), it shouldn't be shortcircuited if identical to the
-       * previous time - because eg. the urb destination may have
-       * changed, or the urb contents different to last time.  
-       *
-       * Note that the data referred to is actually copied internally,
-       * not just used in place according to passed pointer.
-       *
-       * It appears that the CS unit takes care of using each available
-       * URB entry (Const URB Entry == CURBE) in turn, and issuing
-       * flushes as necessary when doublebuffering of CURBEs isn't
-       * possible.
-       */
-/*       intel_batchbuffer_align(brw->intel.batch, 64, sizeof(cb)); */
-      BRW_BATCH_STRUCT(brw, &cb);
-/*       intel_batchbuffer_align(brw->intel.batch, 64, 0); */
+   brw_add_validated_bo(brw, brw->curbe.curbe_bo);
+
+   /* Because this provokes an action (ie copy the constants into the
+    * URB), it shouldn't be shortcircuited if identical to the
+    * previous time - because eg. the urb destination may have
+    * changed, or the urb contents different to last time.
+    *
+    * Note that the data referred to is actually copied internally,
+    * not just used in place according to passed pointer.
+    *
+    * It appears that the CS unit takes care of using each available
+    * URB entry (Const URB Entry == CURBE) in turn, and issuing
+    * flushes as necessary when doublebuffering of CURBEs isn't
+    * possible.
+    */
+}
+
+
+static void emit_constant_buffer(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+   GLuint sz = brw->curbe.total_size;
+
+   BEGIN_BATCH(2, IGNORE_CLIPRECTS);
+   if (sz == 0) {
+      OUT_BATCH((CMD_CONST_BUFFER << 16) | (2 - 2));
+      OUT_BATCH(0);
+   } else {
+      OUT_BATCH((CMD_CONST_BUFFER << 16) | (1 << 8) | (2 - 2));
+      OUT_RELOC(brw->curbe.curbe_bo,
+		I915_GEM_DOMAIN_INSTRUCTION, 0,
+		(sz - 1) + brw->curbe.curbe_offset);
    }
+   ADVANCE_BATCH();
 }
 
 /* This tracked state is unique in that the state it monitors varies
@@ -372,9 +356,11 @@ const struct brw_tracked_state brw_constant_buffer = {
 	       BRW_NEW_VERTEX_PROGRAM |
 	       BRW_NEW_URB_FENCE | /* Implicit - hardware requires this, not used above */
 	       BRW_NEW_PSP | /* Implicit - hardware requires this, not used above */
-	       BRW_NEW_CURBE_OFFSETS),
+	       BRW_NEW_CURBE_OFFSETS |
+	       BRW_NEW_BATCH),
       .cache = (CACHE_NEW_WM_PROG) 
    },
-   .update = upload_constant_buffer
+   .prepare = prepare_constant_buffer,
+   .emit = emit_constant_buffer,
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index e8f878a7018..39c32255f8b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -33,69 +33,6 @@
 #ifndef BRW_DEFINES_H
 #define BRW_DEFINES_H
 
-/*
- */
-#define MI_NOOP                              0x00
-#define MI_USER_INTERRUPT                    0x02
-#define MI_WAIT_FOR_EVENT                    0x03
-#define MI_FLUSH                             0x04
-#define MI_REPORT_HEAD                       0x07
-#define MI_ARB_ON_OFF                        0x08
-#define MI_BATCH_BUFFER_END                  0x0A
-#define MI_OVERLAY_FLIP                      0x11
-#define MI_LOAD_SCAN_LINES_INCL              0x12
-#define MI_LOAD_SCAN_LINES_EXCL              0x13
-#define MI_DISPLAY_BUFFER_INFO               0x14
-#define MI_SET_CONTEXT                       0x18
-#define MI_STORE_DATA_IMM                    0x20
-#define MI_STORE_DATA_INDEX                  0x21
-#define MI_LOAD_REGISTER_IMM                 0x22
-#define MI_STORE_REGISTER_MEM                0x24
-#define MI_BATCH_BUFFER_START                0x31
-
-#define MI_SYNCHRONOUS_FLIP                  0x0 
-#define MI_ASYNCHRONOUS_FLIP                 0x1
-
-#define MI_BUFFER_SECURE                     0x0 
-#define MI_BUFFER_NONSECURE                  0x1
-
-#define MI_ARBITRATE_AT_CHAIN_POINTS         0x0 
-#define MI_ARBITRATE_BETWEEN_INSTS           0x1
-#define MI_NO_ARBITRATION                    0x3 
-
-#define MI_CONDITION_CODE_WAIT_DISABLED      0x0
-#define MI_CONDITION_CODE_WAIT_0             0x1
-#define MI_CONDITION_CODE_WAIT_1             0x2
-#define MI_CONDITION_CODE_WAIT_2             0x3
-#define MI_CONDITION_CODE_WAIT_3             0x4
-#define MI_CONDITION_CODE_WAIT_4             0x5
-
-#define MI_DISPLAY_PIPE_A                    0x0
-#define MI_DISPLAY_PIPE_B                    0x1
-
-#define MI_DISPLAY_PLANE_A                   0x0 
-#define MI_DISPLAY_PLANE_B                   0x1
-#define MI_DISPLAY_PLANE_C                   0x2
-
-#define MI_STANDARD_FLIP                                 0x0
-#define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD   0x1
-#define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE     0x2
-#define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER     0x3
-
-#define MI_PHYSICAL_ADDRESS                  0x0
-#define MI_VIRTUAL_ADDRESS                   0x1
-
-#define MI_BUFFER_MEMORY_MAIN                0x0 
-#define MI_BUFFER_MEMORY_GTT                 0x2
-#define MI_BUFFER_MEMORY_PER_PROCESS_GTT     0x3 
-
-#define MI_FLIP_CONTINUE                     0x0
-#define MI_FLIP_ON                           0x1
-#define MI_FLIP_OFF                          0x2
-
-#define MI_UNTRUSTED_REGISTER_SPACE          0x0
-#define MI_TRUSTED_REGISTER_SPACE            0x1
-
 /* 3D state:
  */
 #define _3DOP_3DSTATE_PIPELINED       0x0
@@ -119,7 +56,6 @@
 #define _3DSTATE_LINE_STIPPLE                 0x08
 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP    0x09
 #define _3DCONTROL    0x00
-#define _3DPRIMITIVE  0x00
 
 #define PIPE_CONTROL_NOWRITE          0x00
 #define PIPE_CONTROL_WRITEIMMEDIATE   0x01
@@ -240,6 +176,8 @@
 #define BRW_FRONTWINDING_CW      0
 #define BRW_FRONTWINDING_CCW     1
 
+#define BRW_SPRITE_POINT_ENABLE  16
+
 #define BRW_INDEX_BYTE     0
 #define BRW_INDEX_WORD     1
 #define BRW_INDEX_DWORD    2
@@ -485,20 +423,6 @@
 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS  0
 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS  1
 
-#define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA     0
-#define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA   1
-
-#define BRW_VFCOMPONENT_NOSTORE      0
-#define BRW_VFCOMPONENT_STORE_SRC    1
-#define BRW_VFCOMPONENT_STORE_0      2
-#define BRW_VFCOMPONENT_STORE_1_FLT  3
-#define BRW_VFCOMPONENT_STORE_1_INT  4
-#define BRW_VFCOMPONENT_STORE_VID    5
-#define BRW_VFCOMPONENT_STORE_IID    6
-#define BRW_VFCOMPONENT_STORE_PID    7
-
-
-
 /* Execution Unit (EU) defines
  */
 
@@ -815,14 +739,40 @@
 
 #define CMD_STATE_BASE_ADDRESS        0x6101
 #define CMD_STATE_INSN_POINTER        0x6102
-#define CMD_PIPELINE_SELECT           0x6104
+#define CMD_PIPELINE_SELECT_965       0x6104
+#define CMD_PIPELINE_SELECT_GM45      0x6904
 
 #define CMD_PIPELINED_STATE_POINTERS  0x7800
 #define CMD_BINDING_TABLE_PTRS        0x7801
+
 #define CMD_VERTEX_BUFFER             0x7808
+# define BRW_VB0_INDEX_SHIFT		27
+# define BRW_VB0_ACCESS_VERTEXDATA	(0 << 26)
+# define BRW_VB0_ACCESS_INSTANCEDATA	(1 << 26)
+# define BRW_VB0_PITCH_SHIFT		0
+
 #define CMD_VERTEX_ELEMENT            0x7809
+# define BRW_VE0_INDEX_SHIFT		27
+# define BRW_VE0_FORMAT_SHIFT		16
+# define BRW_VE0_VALID			(1 << 26)
+# define BRW_VE0_SRC_OFFSET_SHIFT	0
+# define BRW_VE1_COMPONENT_NOSTORE	0
+# define BRW_VE1_COMPONENT_STORE_SRC	1
+# define BRW_VE1_COMPONENT_STORE_0	2
+# define BRW_VE1_COMPONENT_STORE_1_FLT	3
+# define BRW_VE1_COMPONENT_STORE_1_INT	4
+# define BRW_VE1_COMPONENT_STORE_VID	5
+# define BRW_VE1_COMPONENT_STORE_IID	6
+# define BRW_VE1_COMPONENT_STORE_PID	7
+# define BRW_VE1_COMPONENT_0_SHIFT	28
+# define BRW_VE1_COMPONENT_1_SHIFT	24
+# define BRW_VE1_COMPONENT_2_SHIFT	20
+# define BRW_VE1_COMPONENT_3_SHIFT	16
+# define BRW_VE1_DST_OFFSET_SHIFT	0
+
 #define CMD_INDEX_BUFFER              0x780a
-#define CMD_VF_STATISTICS             0x780b
+#define CMD_VF_STATISTICS_965         0x780b
+#define CMD_VF_STATISTICS_GM45        0x680b
 
 #define CMD_DRAW_RECT                 0x7900
 #define CMD_BLEND_CONSTANT_COLOR      0x7901
@@ -832,6 +782,7 @@
 #define CMD_POLY_STIPPLE_PATTERN      0x7907
 #define CMD_LINE_STIPPLE_PATTERN      0x7908
 #define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909
+#define CMD_AA_LINE_PARAMETERS        0x790a
 
 #define CMD_PIPE_CONTROL              0x7a00
 
@@ -845,6 +796,11 @@
 #define R02_PRIM_END    0x1
 #define R02_PRIM_START  0x2
 
+#include "intel_chipset.h"
 
+#define BRW_IS_G4X(brw)         (IS_G4X((brw)->intel.intelScreen->deviceID))
+#define CMD_PIPELINE_SELECT(brw)        (BRW_IS_G4X(brw) ? CMD_PIPELINE_SELECT_GM45 : CMD_PIPELINE_SELECT_965)
+#define CMD_VF_STATISTICS(brw)          (BRW_IS_G4X(brw) ? CMD_VF_STATISTICS_GM45 : CMD_VF_STATISTICS_965)
+#define URB_SIZES(brw)                  (BRW_IS_G4X(brw) ? 384 : 256)  /* 512 bit units */
 
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 0c64d7e756d..c3a26fc82eb 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -27,20 +27,18 @@
 
 #include <stdlib.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "state.h"
-#include "api_validate.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/state.h"
+#include "main/api_validate.h"
+#include "main/enums.h"
 
 #include "brw_draw.h"
 #include "brw_defines.h"
 #include "brw_context.h"
-#include "brw_aub.h"
 #include "brw_state.h"
 #include "brw_fallback.h"
 
-#include "intel_ioctl.h"
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
 
@@ -49,9 +47,9 @@
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 
+#define FILE_DEBUG_FLAG DEBUG_BATCH
 
-
-static GLuint hw_prim[GL_POLYGON+1] = {
+static GLuint prim_to_hw_prim[GL_POLYGON+1] = {
    _3DPRIM_POINTLIST,
    _3DPRIM_LINELIST,
    _3DPRIM_LINELOOP,
@@ -105,11 +103,9 @@ static GLuint brw_set_prim(struct brw_context *brw, GLenum prim)
 	 brw->intel.reduced_primitive = reduced_prim[prim];
 	 brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
       }
-
-      brw_validate_state(brw);
    }
 
-   return hw_prim[prim];
+   return prim_to_hw_prim[prim];
 }
 
 
@@ -124,28 +120,9 @@ static GLuint trim(GLenum prim, GLuint length)
 }
 
 
-static void brw_emit_cliprect( struct brw_context *brw, 
-			       const drm_clip_rect_t *rect )
-{
-   struct brw_drawrect bdr;
-
-   bdr.header.opcode = CMD_DRAW_RECT;
-   bdr.header.length = sizeof(bdr)/4 - 2;
-   bdr.xmin = rect->x1;
-   bdr.xmax = rect->x2 - 1;
-   bdr.ymin = rect->y1;
-   bdr.ymax = rect->y2 - 1;
-   bdr.xorg = brw->intel.drawX;
-   bdr.yorg = brw->intel.drawY;
-
-   intel_batchbuffer_data( brw->intel.batch, &bdr, sizeof(bdr), 
-			   INTEL_BATCH_NO_CLIPRECTS);
-}
-
-
-static void brw_emit_prim( struct brw_context *brw, 
-			   const struct _mesa_prim *prim )
-
+static void brw_emit_prim(struct brw_context *brw,
+			  const struct _mesa_prim *prim,
+			  uint32_t hw_prim)
 {
    struct brw_3d_primitive prim_packet;
 
@@ -156,7 +133,7 @@ static void brw_emit_prim( struct brw_context *brw,
    prim_packet.header.opcode = CMD_3D_PRIM;
    prim_packet.header.length = sizeof(prim_packet)/4 - 2;
    prim_packet.header.pad = 0;
-   prim_packet.header.topology = brw_set_prim(brw, prim->mode);
+   prim_packet.header.topology = hw_prim;
    prim_packet.header.indexed = prim->indexed;
 
    prim_packet.verts_per_instance = trim(prim->mode, prim->count);
@@ -165,20 +142,25 @@ static void brw_emit_prim( struct brw_context *brw,
    prim_packet.start_instance_location = 0;
    prim_packet.base_vert_location = 0;
 
+   /* Can't wrap here, since we rely on the validated state. */
+   brw->no_batch_wrap = GL_TRUE;
    if (prim_packet.verts_per_instance) {
-      intel_batchbuffer_data( brw->intel.batch, &prim_packet, sizeof(prim_packet), 
-			      INTEL_BATCH_NO_CLIPRECTS);
+      intel_batchbuffer_data( brw->intel.batch, &prim_packet,
+			      sizeof(prim_packet), LOOP_CLIPRECTS);
    }
+   brw->no_batch_wrap = GL_FALSE;
 }
 
 static void brw_merge_inputs( struct brw_context *brw,
 		       const struct gl_client_array *arrays[])
 {
-   struct brw_vertex_element *inputs = brw->vb.inputs;
    struct brw_vertex_info old = brw->vb.info;
    GLuint i;
 
-   memset(inputs, 0, sizeof(*inputs));
+   for (i = 0; i < VERT_ATTRIB_MAX; i++)
+      dri_bo_unreference(brw->vb.inputs[i].bo);
+
+   memset(&brw->vb.inputs, 0, sizeof(brw->vb.inputs));
    memset(&brw->vb.info, 0, sizeof(brw->vb.info));
 
    for (i = 0; i < VERT_ATTRIB_MAX; i++) {
@@ -189,7 +171,8 @@ static void brw_merge_inputs( struct brw_context *brw,
 	 if (arrays[i]->StrideB != 0)
 	    brw->vb.info.varying |= 1 << i;
 
-	 brw->vb.info.sizes[i/16] |= (inputs[i].glarray->Size - 1) << ((i%16) * 2);
+	 brw->vb.info.sizes[i/16] |= (brw->vb.inputs[i].glarray->Size - 1) <<
+	    ((i%16) * 2);
       }
    }
 
@@ -271,15 +254,29 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
    struct intel_context *intel = intel_context(ctx);
    struct brw_context *brw = brw_context(ctx);
    GLboolean retval = GL_FALSE;
-   GLuint i, j;
+   GLboolean warn = GL_FALSE;
+   GLboolean first_time = GL_TRUE;
+   GLuint i;
 
    if (ctx->NewState)
       _mesa_update_state( ctx );
 
+   if (check_fallbacks(brw, prim, nr_prims))
+      return GL_FALSE;
+
+   brw_validate_textures( brw );
+
    /* Bind all inputs, derive varying and size information:
     */
    brw_merge_inputs( brw, arrays );
-      
+
+   brw->ib.ib = ib;
+   brw->state.dirty.brw |= BRW_NEW_INDICES;
+
+   brw->vb.min_index = min_index;
+   brw->vb.max_index = max_index;
+   brw->state.dirty.brw |= BRW_NEW_VERTICES;
+
    /* Have to validate state quite late.  Will rebuild tnl_program,
     * which depends on varying information.  
     * 
@@ -289,95 +286,73 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
 
    LOCK_HARDWARE(intel);
 
-   if (brw->intel.numClipRects == 0) {
-      assert(intel->batch->ptr == intel->batch->map + intel->batch->offset);
+   if (!intel->constant_cliprect && intel->driDrawable->numClipRects == 0) {
       UNLOCK_HARDWARE(intel);
       return GL_TRUE;
    }
 
-   {
-      /* Set the first primitive early, ahead of validate_state:
-       */
-      brw_set_prim(brw, prim[0].mode);
+   for (i = 0; i < nr_prims; i++) {
+      uint32_t hw_prim;
 
-      /* XXX:  Need to separate validate and upload of state.  
+      /* Flush the batch if it's approaching full, so that we don't wrap while
+       * we've got validated state that needs to be in the same batch as the
+       * primitives.  This fraction is just a guess (minimal full state plus
+       * a primitive is around 512 bytes), and would be better if we had
+       * an upper bound of how much we might emit in a single
+       * brw_try_draw_prims().
        */
-      brw_validate_state( brw );
+      intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4,
+				      LOOP_CLIPRECTS);
 
-      /* Various fallback checks:
-       */
-      if (brw->intel.Fallback) 
-	 goto out;
+      hw_prim = brw_set_prim(brw, prim[i].mode);
 
-      if (check_fallbacks( brw, prim, nr_prims ))
-	 goto out;
-	  
-      /* Upload index, vertex data: 
-       */
-      if (ib)
-	 brw_upload_indices( brw, ib );
+      if (first_time || (brw->state.dirty.brw & BRW_NEW_PRIMITIVE)) {
+	 first_time = GL_FALSE;
 
-      if (!brw_upload_vertices( brw, min_index, max_index)) {
-	 goto out;
-      }
+	 /* Various fallback checks:  */
+	 if (brw->intel.Fallback)
+	    goto out;
 
-      /* For single cliprect, state is already emitted: 
-       */
-      if (brw->intel.numClipRects == 1) {
-	 for (i = 0; i < nr_prims; i++) {
-	    brw_emit_prim(brw, &prim[i]);   
-	 }
-      }
-      else {
-	 /* Otherwise, explicitly do the cliprects at this point:
-	  */
-	 for (j = 0; j < brw->intel.numClipRects; j++) {
-	    brw_emit_cliprect(brw, &brw->intel.pClipRects[j]);
+	 brw_validate_state(brw);
 
-	    /* Emit prims to batchbuffer: 
+	 /* Check that we can fit our state in with our existing batchbuffer, or
+	  * flush otherwise.
+	  */
+	 if (dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+					     brw->state.validated_bo_count)) {
+	    static GLboolean warned;
+	    intel_batchbuffer_flush(intel->batch);
+
+	    /* Validate the state after we flushed the batch (which would have
+	     * changed the set of dirty state).  If we still fail to
+	     * check_aperture, warn of what's happening, but attempt to continue
+	     * on since it may succeed anyway, and the user would probably rather
+	     * see a failure and a warning than a fallback.
 	     */
-	    for (i = 0; i < nr_prims; i++) {
-	       brw_emit_prim(brw, &prim[i]);   
+	    brw_validate_state(brw);
+	    if (!warned &&
+		dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+						brw->state.validated_bo_count)) {
+	       warn = GL_TRUE;
+	       warned = GL_TRUE;
 	    }
 	 }
-      }
-      
-      intel->need_flush = GL_TRUE;
-      retval = GL_TRUE;
-   }
-
- out:
 
-   /* Currently have to do this to synchronize with the map/unmap of
-    * the vertex buffer in brw_exec_api.c.  Not sure if there is any
-    * way around this, as not every flush is due to a buffer filling
-    * up.
-    */
-   if (!intel_batchbuffer_flush( brw->intel.batch )) {
-      DBG("%s intel_batchbuffer_flush failed\n", __FUNCTION__);
-      retval = GL_FALSE;
-   }
+	 brw_upload_state(brw);
+      }
 
-   if (retval && intel->thrashing) {
-      bmSetFence(intel);
-   }
+      brw_emit_prim(brw, &prim[i], hw_prim);
 
-   /* Free any old data so it doesn't clog up texture memory - we
-    * won't be referencing it again.
-    */
-   while (brw->vb.upload.wrap != brw->vb.upload.buf) {
-      ctx->Driver.BufferData(ctx,
-			     GL_ARRAY_BUFFER_ARB,
-			     BRW_UPLOAD_INIT_SIZE,
-			     NULL,
-			     GL_DYNAMIC_DRAW_ARB,
-			     brw->vb.upload.vbo[brw->vb.upload.wrap]);
-      brw->vb.upload.wrap++;
-      brw->vb.upload.wrap %= BRW_NR_UPLOAD_BUFS;
+      retval = GL_TRUE;
    }
 
+ out:
    UNLOCK_HARDWARE(intel);
 
+   if (warn)
+      fprintf(stderr, "i965: Single primitive emit potentially exceeded "
+	      "available aperture space\n");
+
    if (!retval)
       DBG("%s failed\n", __FUNCTION__);
 
@@ -420,7 +395,6 @@ void brw_draw_prims( GLcontext *ctx,
 		     GLuint min_index,
 		     GLuint max_index )
 {
-   struct intel_context *intel = intel_context(ctx);
    GLboolean retval;
 
    /* Decide if we want to rebase.  If so we end up recursing once
@@ -435,25 +409,10 @@ void brw_draw_prims( GLcontext *ctx,
       return;
    }
 
-
    /* Make a first attempt at drawing:
     */
    retval = brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
 
-   
-   /* This looks like out-of-memory but potentially we have
-    * situation where there is enough memory but it has become
-    * fragmented.  Clear out all heaps and start from scratch by
-    * faking a contended lock event:  (done elsewhere)
-    */
-   if (!retval && !intel->Fallback && bmError(intel)) {
-      DBG("retrying\n");
-      /* Then try a second time only to upload textures and draw the
-       * primitives:
-       */
-      retval = brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
-   }
-
    /* Otherwise, we really are out of memory.  Pass the drawing
     * command to the software tnl module and which will in turn call
     * swrast to do the drawing.
@@ -463,56 +422,32 @@ void brw_draw_prims( GLcontext *ctx,
       _tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
    }
 
-   if (intel->aub_file && (INTEL_DEBUG & DEBUG_SYNC)) {
-      intelFinish( &intel->ctx );
-      intel->aub_wrap = 1;
-   }
-}
-
-
-static void brw_invalidate_vbo_cb( struct intel_context *intel, void *ptr )
-{
-   /* nothing to do, we don't rely on the contents being preserved */
 }
 
-
 void brw_draw_init( struct brw_context *brw )
 {
    GLcontext *ctx = &brw->intel.ctx;
    struct vbo_context *vbo = vbo_context(ctx);
-   GLuint i;
-   
+
    /* Register our drawing function: 
     */
    vbo->draw_prims = brw_draw_prims;
+}
 
-   brw->vb.upload.size = BRW_UPLOAD_INIT_SIZE;
+void brw_draw_destroy( struct brw_context *brw )
+{
+   int i;
 
-   for (i = 0; i < BRW_NR_UPLOAD_BUFS; i++) {
-      brw->vb.upload.vbo[i] = ctx->Driver.NewBufferObject(ctx, 1, GL_ARRAY_BUFFER_ARB);
-      
-      /* NOTE:  These are set to no-backing-store.
-       */
-      bmBufferSetInvalidateCB(&brw->intel,
-			      intel_bufferobj_buffer(intel_buffer_object(brw->vb.upload.vbo[i])),
-			      brw_invalidate_vbo_cb,
-			      &brw->intel,
-			      GL_TRUE);
+   if (brw->vb.upload.bo != NULL) {
+      dri_bo_unreference(brw->vb.upload.bo);
+      brw->vb.upload.bo = NULL;
    }
 
-   ctx->Driver.BufferData( ctx, 
-			   GL_ARRAY_BUFFER_ARB, 
-			   BRW_UPLOAD_INIT_SIZE,
-			   NULL,
-			   GL_DYNAMIC_DRAW_ARB,
-			   brw->vb.upload.vbo[0] );
-}
+   for (i = 0; i < VERT_ATTRIB_MAX; i++) {
+      dri_bo_unreference(brw->vb.inputs[i].bo);
+      brw->vb.inputs[i].bo = NULL;
+   }
 
-void brw_draw_destroy( struct brw_context *brw )
-{
-   GLcontext *ctx = &brw->intel.ctx;
-   GLuint i;
-   
-   for (i = 0; i < BRW_NR_UPLOAD_BUFS; i++)
-      ctx->Driver.DeleteBuffer(ctx, brw->vb.upload.vbo[i]);
+   dri_bo_unreference(brw->ib.bo);
+   brw->ib.bo = NULL;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h b/src/mesa/drivers/dri/i965/brw_draw.h
index 0f7b7383102..9aebbdb1b86 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -28,7 +28,7 @@
 #ifndef BRW_DRAW_H
 #define BRW_DRAW_H
 
-#include "mtypes.h"		/* for GLcontext... */
+#include "main/mtypes.h"		/* for GLcontext... */
 #include "vbo/vbo.h"
 
 struct brw_context;
@@ -50,16 +50,4 @@ void brw_draw_destroy( struct brw_context *brw );
 void brw_init_current_values(GLcontext *ctx,
 			     struct gl_client_array *arrays);
 
-
-/* brw_draw_upload.c
- */
-void brw_upload_indices( struct brw_context *brw,
-			 const struct _mesa_index_buffer *index_buffer);
-
-GLboolean brw_upload_vertices( struct brw_context *brw,
-			       GLuint min_index,
-			       GLuint max_index );
-
-
-
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 6150cac4aa3..73d6dea01ee 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -27,52 +27,21 @@
 
 #include <stdlib.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "state.h"
-#include "api_validate.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/state.h"
+#include "main/api_validate.h"
+#include "main/enums.h"
 
 #include "brw_draw.h"
 #include "brw_defines.h"
 #include "brw_context.h"
-#include "brw_aub.h"
 #include "brw_state.h"
 #include "brw_fallback.h"
 
-#include "intel_ioctl.h"
 #include "intel_batchbuffer.h"
 #include "intel_buffer_objects.h"
-
-
-struct brw_array_state {
-   union header_union header;
-
-   struct {
-      union {
-	 struct {
-	    GLuint pitch:11; 
-	    GLuint pad:15;
-	    GLuint access_type:1; 
-	    GLuint vb_index:5; 
-	 } bits;
-	 GLuint dword;
-      } vb0;
-   
-      struct buffer *buffer;
-      GLuint offset;
-
-      GLuint max_index;   
-      GLuint instance_data_step_rate;
-
-   } vb[BRW_VBP_MAX];
-};
-
-
-static struct buffer *array_buffer( const struct gl_client_array *array )
-{
-   return intel_bufferobj_buffer(intel_buffer_object(array->BufferObj));
-}
+#include "intel_tex.h"
 
 static GLuint double_types[5] = {
    0,
@@ -247,194 +216,176 @@ static GLuint get_index_type(GLenum type)
    }
 }
 
-static void copy_strided_array( GLubyte *dest, 
-				const GLubyte *src, 
-				GLuint size, 
-				GLuint stride,
-				GLuint count )
-{
-   if (size == stride) 
-      do_memcpy(dest, src, count * size);
-   else {
-      GLuint i,j;
-   
-      for (i = 0; i < count; i++) {
-	 for (j = 0; j < size; j++)
-	    *dest++ = *src++;
-	 src += (stride - size);
-      }
-   }
-}
-
 static void wrap_buffers( struct brw_context *brw,
 			  GLuint size )
 {
-   GLcontext *ctx = &brw->intel.ctx;
-
    if (size < BRW_UPLOAD_INIT_SIZE)
       size = BRW_UPLOAD_INIT_SIZE;
 
-   brw->vb.upload.buf++;
-   brw->vb.upload.buf %= BRW_NR_UPLOAD_BUFS;
    brw->vb.upload.offset = 0;
 
-   ctx->Driver.BufferData(ctx,
-			  GL_ARRAY_BUFFER_ARB,
-			  size,
-			  NULL,
-			  GL_DYNAMIC_DRAW_ARB,
-			  brw->vb.upload.vbo[brw->vb.upload.buf]);
+   if (brw->vb.upload.bo != NULL)
+      dri_bo_unreference(brw->vb.upload.bo);
+   brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
+				    size, 1);
+
+   /* Set the internal VBO\ to no-backing-store.  We only use them as a
+    * temporary within a brw_try_draw_prims while the lock is held.
+    */
+   /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
+      FAKE TO PUSH THIS STUFF */
+//   if (!brw->intel.ttm)
+//      dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
 }
 
 static void get_space( struct brw_context *brw,
 		       GLuint size,
-		       struct gl_buffer_object **vbo_return,
+		       dri_bo **bo_return,
 		       GLuint *offset_return )
 {
-   size = (size + 63) & ~63;
-   
-   if (brw->vb.upload.offset + size > BRW_UPLOAD_INIT_SIZE)
+   size = ALIGN(size, 64);
+
+   if (brw->vb.upload.bo == NULL ||
+       brw->vb.upload.offset + size > brw->vb.upload.bo->size) {
       wrap_buffers(brw, size);
+   }
 
-   *vbo_return = brw->vb.upload.vbo[brw->vb.upload.buf];
+   assert(*bo_return == NULL);
+   dri_bo_reference(brw->vb.upload.bo);
+   *bo_return = brw->vb.upload.bo;
    *offset_return = brw->vb.upload.offset;
-
    brw->vb.upload.offset += size;
 }
 
-
-
-static struct gl_client_array *
+static void
 copy_array_to_vbo_array( struct brw_context *brw,
-			 GLuint i,
-			 const struct gl_client_array *array,
-			 GLuint element_size,
-			 GLuint count)
+			 struct brw_vertex_element *element,
+			 GLuint dst_stride)
 {
-   GLcontext *ctx = &brw->intel.ctx;
-   struct gl_client_array *vbo_array = &brw->vb.vbo_array[i];
-   GLuint size = count * element_size;
-   struct gl_buffer_object *vbo;
-   GLuint offset;
-   GLuint new_stride;
+   GLuint size = element->count * dst_stride;
 
-   get_space(brw, size, &vbo, &offset);
+   get_space(brw, size, &element->bo, &element->offset);
 
-   if (array->StrideB == 0) {
-      assert(count == 1);
-      new_stride = 0;
+   if (element->glarray->StrideB == 0) {
+      assert(element->count == 1);
+      element->stride = 0;
+   } else {
+      element->stride = dst_stride;
    }
-   else 
-      new_stride = element_size;
-
-   vbo_array->Size = array->Size;
-   vbo_array->Type = array->Type;
-   vbo_array->Stride = new_stride;
-   vbo_array->StrideB = new_stride;   
-   vbo_array->Ptr = (const void *)offset;
-   vbo_array->Enabled = 1;
-   vbo_array->Normalized = array->Normalized;
-   vbo_array->_MaxElement = array->_MaxElement;	/* ? */
-   vbo_array->BufferObj = vbo;
-
-   {
-      GLubyte *map = ctx->Driver.MapBuffer(ctx,
-					   GL_ARRAY_BUFFER_ARB,
-					   GL_DYNAMIC_DRAW_ARB,
-					   vbo);
-   
-      map += offset;
 
-      copy_strided_array( map, 
-			  array->Ptr,
-			  element_size,
-			  array->StrideB,
-			  count);
+   if (dst_stride == element->glarray->StrideB) {
+      dri_bo_subdata(element->bo,
+		     element->offset,
+		     size,
+		     element->glarray->Ptr);
+   } else {
+      void *data;
+      char *dest;
+      const char *src = element->glarray->Ptr;
+      int i;
+
+      data = _mesa_malloc(dst_stride * element->count);
+      dest = data;
+      for (i = 0; i < element->count; i++) {
+	 memcpy(dest, src, dst_stride);
+	 src += element->glarray->StrideB;
+	 dest += dst_stride;
+      }
 
-      ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER_ARB, vbo_array->BufferObj);
+      dri_bo_subdata(element->bo,
+		     element->offset,
+		     size,
+		     data);
+      _mesa_free(data);
    }
-
-   return vbo_array;
-}
-
-
-
-static struct gl_client_array *
-interleaved_vbo_array( struct brw_context *brw,
-		       GLuint i,
-		       const struct gl_client_array *uploaded_array,
-		       const struct gl_client_array *array,
-		       const char *ptr)
-{
-   struct gl_client_array *vbo_array = &brw->vb.vbo_array[i];
-
-   vbo_array->Size = array->Size;
-   vbo_array->Type = array->Type;
-   vbo_array->Stride = array->Stride;
-   vbo_array->StrideB = array->StrideB;   
-   vbo_array->Ptr = (const void *)((const char *)uploaded_array->Ptr + 
-				   ((const char *)array->Ptr - ptr));
-   vbo_array->Enabled = 1;
-   vbo_array->Normalized = array->Normalized;
-   vbo_array->_MaxElement = array->_MaxElement;	
-   vbo_array->BufferObj = uploaded_array->BufferObj;
-
-   return vbo_array;
 }
 
-
-GLboolean brw_upload_vertices( struct brw_context *brw,
-			       GLuint min_index,
-			       GLuint max_index )
+static void brw_prepare_vertices(struct brw_context *brw)
 {
    GLcontext *ctx = &brw->intel.ctx;
    struct intel_context *intel = intel_context(ctx);
    GLuint tmp = brw->vs.prog_data->inputs_read; 
-   struct brw_vertex_element_packet vep;
-   struct brw_array_state vbp;
    GLuint i;
-   const void *ptr = NULL;
+   const unsigned char *ptr = NULL;
    GLuint interleave = 0;
+   unsigned int min_index = brw->vb.min_index;
+   unsigned int max_index = brw->vb.max_index;
 
    struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
    GLuint nr_enabled = 0;
 
    struct brw_vertex_element *upload[VERT_ATTRIB_MAX];
    GLuint nr_uploads = 0;
-   
-
-   memset(&vbp, 0, sizeof(vbp));
-   memset(&vep, 0, sizeof(vep));
 
    /* First build an array of pointers to ve's in vb.inputs_read
     */
    if (0)
       _mesa_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
-   
+
+   /* Accumulate the list of enabled arrays. */
    while (tmp) {
       GLuint i = _mesa_ffsll(tmp)-1;
       struct brw_vertex_element *input = &brw->vb.inputs[i];
 
       tmp &= ~(1<<i);
       enabled[nr_enabled++] = input;
+   }
+
+   /* XXX: In the rare cases where this happens we fallback all
+    * the way to software rasterization, although a tnl fallback
+    * would be sufficient.  I don't know of *any* real world
+    * cases with > 17 vertex attributes enabled, so it probably
+    * isn't an issue at this point.
+    */
+   if (nr_enabled >= BRW_VEP_MAX) {
+      intel->Fallback = 1;
+      return;
+   }
+
+   for (i = 0; i < nr_enabled; i++) {
+      struct brw_vertex_element *input = enabled[i];
 
-      input->index = i;
       input->element_size = get_size(input->glarray->Type) * input->glarray->Size;
       input->count = input->glarray->StrideB ? max_index + 1 - min_index : 1;
 
-      if (!input->glarray->BufferObj->Name) {
+      if (input->glarray->BufferObj->Name != 0) {
+	 struct intel_buffer_object *intel_buffer =
+	    intel_buffer_object(input->glarray->BufferObj);
+
+	 /* Named buffer object: Just reference its contents directly. */
+	 dri_bo_unreference(input->bo);
+	 input->bo = intel_bufferobj_buffer(intel, intel_buffer,
+					    INTEL_READ);
+	 dri_bo_reference(input->bo);
+	 input->offset = (unsigned long)input->glarray->Ptr;
+	 input->stride = input->glarray->StrideB;
+      } else {
+	 if (input->bo != NULL) {
+	    /* Already-uploaded vertex data is present from a previous
+	     * prepare_vertices, but we had to re-validate state due to
+	     * check_aperture failing and a new batch being produced.
+	     */
+	    continue;
+	 }
+
+	 /* Queue the buffer object up to be uploaded in the next pass,
+	  * when we've decided if we're doing interleaved or not.
+	  */
 	 if (i == 0) {
 	    /* Position array not properly enabled:
 	     */
-	    if (input->glarray->StrideB == 0)
-	       return GL_FALSE;
+            if (input->glarray->StrideB == 0) {
+               intel->Fallback = 1;
+               return;
+            }
 
 	    interleave = input->glarray->StrideB;
 	    ptr = input->glarray->Ptr;
 	 }
 	 else if (interleave != input->glarray->StrideB ||
-		  (const char *)input->glarray->Ptr - (const char *)ptr < 0 ||
-		  (const char *)input->glarray->Ptr - (const char *)ptr > interleave) {
+		  (const unsigned char *)input->glarray->Ptr - ptr < 0 ||
+		  (const unsigned char *)input->glarray->Ptr - ptr > interleave)
+	 {
 	    interleave = 0;
 	 }
 
@@ -451,131 +402,140 @@ GLboolean brw_upload_vertices( struct brw_context *brw,
       }
    }
 
-   /* Upload interleaved arrays if all uploads are interleaved
-    */
-   if (nr_uploads > 1 && 
-       interleave && 
-       interleave <= 256) {
-      struct brw_vertex_element *input0 = upload[0];
-
-      input0->glarray = copy_array_to_vbo_array(brw, 0,
-						input0->glarray, 
-						interleave,
-						input0->count);
+   /* Handle any arrays to be uploaded. */
+   if (nr_uploads > 1 && interleave && interleave <= 256) {
+      /* All uploads are interleaved, so upload the arrays together as
+       * interleaved.  First, upload the contents and set up upload[0].
+       */
+      copy_array_to_vbo_array(brw, upload[0], interleave);
 
       for (i = 1; i < nr_uploads; i++) {
-	 upload[i]->glarray = interleaved_vbo_array(brw,
-						    i,
-						    input0->glarray,
-						    upload[i]->glarray,
-						    ptr);
+	 /* Then, just point upload[i] at upload[0]'s buffer. */
+	 upload[i]->stride = interleave;
+	 upload[i]->offset = upload[0]->offset +
+	    ((const unsigned char *)upload[i]->glarray->Ptr - ptr);
+	 upload[i]->bo = upload[0]->bo;
+	 dri_bo_reference(upload[i]->bo);
       }
    }
    else {
+      /* Upload non-interleaved arrays */
       for (i = 0; i < nr_uploads; i++) {
-	 struct brw_vertex_element *input = upload[i];
-
-	 input->glarray = copy_array_to_vbo_array(brw, i, 
-						  input->glarray,
-						  input->element_size,
-						  input->count);
-
+          copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
       }
    }
 
-   /* XXX: In the rare cases where this happens we fallback all
-    * the way to software rasterization, although a tnl fallback
-    * would be sufficient.  I don't know of *any* real world
-    * cases with > 17 vertex attributes enabled, so it probably
-    * isn't an issue at this point.
-    */
-   if (nr_enabled >= BRW_VEP_MAX)
-	 return GL_FALSE;
+   brw_prepare_query_begin(brw);
 
-   /* This still defines a hardware VB for each input, even if they
-    * are interleaved or from the same VBO.  TBD if this makes a
-    * performance difference.
-    */
    for (i = 0; i < nr_enabled; i++) {
       struct brw_vertex_element *input = enabled[i];
 
-      input->vep = &vep.ve[i];
-      input->vep->ve0.src_format = get_surface_type(input->glarray->Type, 
-						    input->glarray->Size,
-						    input->glarray->Normalized);
-      input->vep->ve0.valid = 1;
-      input->vep->ve1.dst_offset = (i) * 4;
-      input->vep->ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC;
-      input->vep->ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC;
-      input->vep->ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC;
-      input->vep->ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC;
+      brw_add_validated_bo(brw, input->bo);
+   }
+}
 
-      switch (input->glarray->Size) {
-      case 0: input->vep->ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_0;
-      case 1: input->vep->ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0;
-      case 2: input->vep->ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0;
-      case 3: input->vep->ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT;
-	 break;
-      }
+static void brw_emit_vertices(struct brw_context *brw)
+{
+   GLcontext *ctx = &brw->intel.ctx;
+   struct intel_context *intel = intel_context(ctx);
+   GLuint tmp = brw->vs.prog_data->inputs_read;
+   struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
+   GLuint i;
+   GLuint nr_enabled = 0;
 
-      input->vep->ve0.vertex_buffer_index = i;
-      input->vep->ve0.src_offset = 0;
+  /* Accumulate the list of enabled arrays. */
+   while (tmp) {
+      i = _mesa_ffsll(tmp)-1;
+      struct brw_vertex_element *input = &brw->vb.inputs[i];
 
-      vbp.vb[i].vb0.bits.pitch = input->glarray->StrideB;
-      vbp.vb[i].vb0.bits.pad = 0;
-      vbp.vb[i].vb0.bits.access_type = BRW_VERTEXBUFFER_ACCESS_VERTEXDATA;
-      vbp.vb[i].vb0.bits.vb_index = i;
-      vbp.vb[i].offset = (GLuint)input->glarray->Ptr;
-      vbp.vb[i].buffer = array_buffer(input->glarray);
-      vbp.vb[i].max_index = max_index;
+      tmp &= ~(1<<i);
+      enabled[nr_enabled++] = input;
    }
 
+   brw_emit_query_begin(brw);
 
-
-   /* Now emit VB and VEP state packets:
+   /* Now emit VB and VEP state packets.
+    *
+    * This still defines a hardware VB for each input, even if they
+    * are interleaved or from the same VBO.  TBD if this makes a
+    * performance difference.
     */
-   vbp.header.bits.length = (1 + nr_enabled * 4) - 2;
-   vbp.header.bits.opcode = CMD_VERTEX_BUFFER;
+   BEGIN_BATCH(1 + nr_enabled * 4, IGNORE_CLIPRECTS);
+   OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
+	     ((1 + nr_enabled * 4) - 2));
 
-   BEGIN_BATCH(vbp.header.bits.length+2, 0);
-   OUT_BATCH( vbp.header.dword );
-   
    for (i = 0; i < nr_enabled; i++) {
-      OUT_BATCH( vbp.vb[i].vb0.dword );
-      OUT_BATCH( bmBufferOffset(&brw->intel, vbp.vb[i].buffer) + vbp.vb[i].offset);
-      OUT_BATCH( vbp.vb[i].max_index );
-      OUT_BATCH( vbp.vb[i].instance_data_step_rate );
+      struct brw_vertex_element *input = enabled[i];
+
+      OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
+		BRW_VB0_ACCESS_VERTEXDATA |
+		(input->stride << BRW_VB0_PITCH_SHIFT));
+      OUT_RELOC(input->bo,
+		I915_GEM_DOMAIN_VERTEX, 0,
+		input->offset);
+      OUT_BATCH(brw->vb.max_index);
+      OUT_BATCH(0); /* Instance data step rate */
    }
    ADVANCE_BATCH();
 
-   vep.header.length = (1 + nr_enabled * sizeof(vep.ve[0])/4) - 2;
-   vep.header.opcode = CMD_VERTEX_ELEMENT;
-   brw_cached_batch_struct(brw, &vep, 4 + nr_enabled * sizeof(vep.ve[0]));
-
-   return GL_TRUE;
-}
+   BEGIN_BATCH(1 + nr_enabled * 2, IGNORE_CLIPRECTS);
+   OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + nr_enabled * 2) - 2));
+   for (i = 0; i < nr_enabled; i++) {
+      struct brw_vertex_element *input = enabled[i];
+      uint32_t format = get_surface_type(input->glarray->Type,
+					 input->glarray->Size,
+					 input->glarray->Normalized);
+      uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
+      uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
+      uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
+      uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 
+      switch (input->glarray->Size) {
+      case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
+      case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
+      case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
+      case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
+	 break;
+      }
 
-static GLuint element_size( GLenum type )
-{
-   switch(type) {
-   case GL_UNSIGNED_INT: return 4;
-   case GL_UNSIGNED_SHORT: return 2;
-   case GL_UNSIGNED_BYTE: return 1;
-   default: assert(0); return 0;
+      OUT_BATCH((i << BRW_VE0_INDEX_SHIFT) |
+		BRW_VE0_VALID |
+		(format << BRW_VE0_FORMAT_SHIFT) |
+		(0 << BRW_VE0_SRC_OFFSET_SHIFT));
+      OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
+		(comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
+		(comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
+		(comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
+		((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
    }
+   ADVANCE_BATCH();
 }
 
+const struct brw_tracked_state brw_vertices = {
+   .dirty = {
+      .mesa = 0,
+      .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
+      .cache = 0,
+   },
+   .prepare = brw_prepare_vertices,
+   .emit = brw_emit_vertices,
+};
 
-
-void brw_upload_indices( struct brw_context *brw,
-			 const struct _mesa_index_buffer *index_buffer )
+static void brw_prepare_indices(struct brw_context *brw)
 {
    GLcontext *ctx = &brw->intel.ctx;
    struct intel_context *intel = &brw->intel;
-   GLuint ib_size = get_size(index_buffer->type) * index_buffer->count;
-   struct gl_buffer_object *bufferobj = index_buffer->obj;
-   GLuint offset = (GLuint)index_buffer->ptr;
+   const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
+   GLuint ib_size;
+   dri_bo *bo = NULL;
+   struct gl_buffer_object *bufferobj;
+   GLuint offset;
+
+   if (index_buffer == NULL)
+      return;
+
+   ib_size = get_size(index_buffer->type) * index_buffer->count;
+   bufferobj = index_buffer->obj;;
 
    /* Turn into a proper VBO:
     */
@@ -583,23 +543,58 @@ void brw_upload_indices( struct brw_context *brw,
      
       /* Get new bufferobj, offset:
        */
-      get_space(brw, ib_size, &bufferobj, &offset);
+      get_space(brw, ib_size, &bo, &offset);
 
       /* Straight upload
        */
-      ctx->Driver.BufferSubData( ctx,
-				 GL_ELEMENT_ARRAY_BUFFER_ARB,
-				 offset, 
-				 ib_size,
-				 index_buffer->ptr,
-				 bufferobj);
+      dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
+   } else {
+      offset = (GLuint)index_buffer->ptr;
+
+      /* If the index buffer isn't aligned to its element size, we have to
+       * rebase it into a temporary.
+       */
+       if ((get_size(index_buffer->type) - 1) & offset) {
+           GLubyte *map = ctx->Driver.MapBuffer(ctx,
+                                                GL_ELEMENT_ARRAY_BUFFER_ARB,
+                                                GL_DYNAMIC_DRAW_ARB,
+                                                bufferobj);
+           map += offset;
+
+	   get_space(brw, ib_size, &bo, &offset);
+
+	   dri_bo_subdata(bo, offset, ib_size, map);
+
+           ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER_ARB, bufferobj);
+       } else {
+	  bo = intel_bufferobj_buffer(intel, intel_buffer_object(bufferobj),
+				      INTEL_READ);
+	  dri_bo_reference(bo);
+       }
    }
 
+   dri_bo_unreference(brw->ib.bo);
+   brw->ib.bo = bo;
+   brw->ib.offset = offset;
+
+   brw_add_validated_bo(brw, brw->ib.bo);
+}
+
+static void brw_emit_indices(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+   const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
+   GLuint ib_size;
+
+   if (index_buffer == NULL)
+      return;
+
+   ib_size = get_size(index_buffer->type) * index_buffer->count;
+
    /* Emit the indexbuffer packet:
     */
    {
       struct brw_indexbuffer ib;
-      struct buffer *buffer = intel_bufferobj_buffer(intel_buffer_object(bufferobj));
 
       memset(&ib, 0, sizeof(ib));
    
@@ -609,11 +604,25 @@ void brw_upload_indices( struct brw_context *brw,
       ib.header.bits.cut_index_enable = 0;
    
 
-      BEGIN_BATCH(4, 0);
+      BEGIN_BATCH(4, IGNORE_CLIPRECTS);
       OUT_BATCH( ib.header.dword );
-      OUT_BATCH( bmBufferOffset(intel, buffer) + offset );
-      OUT_BATCH( bmBufferOffset(intel, buffer) + offset + ib_size );
+      OUT_RELOC(brw->ib.bo,
+		I915_GEM_DOMAIN_VERTEX, 0,
+		brw->ib.offset);
+      OUT_RELOC(brw->ib.bo,
+		I915_GEM_DOMAIN_VERTEX, 0,
+		brw->ib.offset + ib_size);
       OUT_BATCH( 0 );
       ADVANCE_BATCH();
    }
 }
+
+const struct brw_tracked_state brw_indices = {
+   .dirty = {
+      .mesa = 0,
+      .brw = BRW_NEW_BATCH | BRW_NEW_INDICES,
+      .cache = 0,
+   },
+   .prepare = brw_prepare_indices,
+   .emit = brw_emit_indices,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index d1244befd78..b3ae4eef334 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -101,8 +101,9 @@ void brw_pop_insn_state( struct brw_compile *p )
 
 /***********************************************************************
  */
-void brw_init_compile( struct brw_compile *p )
+void brw_init_compile( struct brw_context *brw, struct brw_compile *p )
 {
+   p->brw = brw;
    p->nr_insn = 0;
    p->current = p->stack;
    memset(p->current, 0, sizeof(p->current[0]));
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 52f89d577ca..49b422ee2ff 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -65,7 +65,7 @@ struct brw_reg
    GLuint abs:1;		/* source only */
    GLuint vstride:4;		/* source only */
    GLuint width:3;		/* src only, align1 only */
-   GLuint hstride:2;   		/* src only, align1 only */
+   GLuint hstride:2;   		/* align1 only */
    GLuint address_mode:1;	/* relative addressing, hopefully! */
    GLuint pad0:1;
 
@@ -105,11 +105,12 @@ struct brw_compile {
 
    GLuint flag_value;
    GLboolean single_program_flow;
+   struct brw_context *brw;
 };
 
 
 
-static __inline int type_sz( GLuint type )
+static INLINE int type_sz( GLuint type )
 {
    switch( type ) {
    case BRW_REGISTER_TYPE_UD:
@@ -128,7 +129,7 @@ static __inline int type_sz( GLuint type )
    }
 }
 
-static __inline struct brw_reg brw_reg( GLuint file,
+static INLINE struct brw_reg brw_reg( GLuint file,
 					GLuint nr,
 					GLuint subnr,
 					GLuint type,
@@ -165,7 +166,7 @@ static __inline struct brw_reg brw_reg( GLuint file,
    return reg;
 }
 
-static __inline struct brw_reg brw_vec16_reg( GLuint file,
+static INLINE struct brw_reg brw_vec16_reg( GLuint file,
 					      GLuint nr,
 					      GLuint subnr )
 {
@@ -180,7 +181,7 @@ static __inline struct brw_reg brw_vec16_reg( GLuint file,
 		  WRITEMASK_XYZW);
 }
 
-static __inline struct brw_reg brw_vec8_reg( GLuint file,
+static INLINE struct brw_reg brw_vec8_reg( GLuint file,
 					     GLuint nr,
 					     GLuint subnr )
 {
@@ -196,7 +197,7 @@ static __inline struct brw_reg brw_vec8_reg( GLuint file,
 }
 
 
-static __inline struct brw_reg brw_vec4_reg( GLuint file,
+static INLINE struct brw_reg brw_vec4_reg( GLuint file,
 					      GLuint nr,
 					      GLuint subnr )
 {
@@ -212,7 +213,7 @@ static __inline struct brw_reg brw_vec4_reg( GLuint file,
 }
 
 
-static __inline struct brw_reg brw_vec2_reg( GLuint file,
+static INLINE struct brw_reg brw_vec2_reg( GLuint file,
 					      GLuint nr,
 					      GLuint subnr )
 {
@@ -227,7 +228,7 @@ static __inline struct brw_reg brw_vec2_reg( GLuint file,
 		  WRITEMASK_XY);
 }
 
-static __inline struct brw_reg brw_vec1_reg( GLuint file,
+static INLINE struct brw_reg brw_vec1_reg( GLuint file,
 					     GLuint nr,
 					     GLuint subnr )
 {
@@ -243,14 +244,14 @@ static __inline struct brw_reg brw_vec1_reg( GLuint file,
 }
 
 
-static __inline struct brw_reg retype( struct brw_reg reg,
+static INLINE struct brw_reg retype( struct brw_reg reg,
 				       GLuint type )
 {
    reg.type = type;
    return reg;
 }
 
-static __inline struct brw_reg suboffset( struct brw_reg reg,
+static INLINE struct brw_reg suboffset( struct brw_reg reg,
 					  GLuint delta )
 {   
    reg.subnr += delta * type_sz(reg.type);
@@ -258,7 +259,7 @@ static __inline struct brw_reg suboffset( struct brw_reg reg,
 }
 
 
-static __inline struct brw_reg offset( struct brw_reg reg,
+static INLINE struct brw_reg offset( struct brw_reg reg,
 				       GLuint delta )
 {
    reg.nr += delta;
@@ -266,7 +267,7 @@ static __inline struct brw_reg offset( struct brw_reg reg,
 }
 
 
-static __inline struct brw_reg byte_offset( struct brw_reg reg,
+static INLINE struct brw_reg byte_offset( struct brw_reg reg,
 					    GLuint bytes )
 {
    GLuint newoffset = reg.nr * REG_SIZE + reg.subnr + bytes;
@@ -276,28 +277,28 @@ static __inline struct brw_reg byte_offset( struct brw_reg reg,
 }
    
 
-static __inline struct brw_reg brw_uw16_reg( GLuint file,
+static INLINE struct brw_reg brw_uw16_reg( GLuint file,
 					     GLuint nr,
 					     GLuint subnr )
 {
    return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
 }
 
-static __inline struct brw_reg brw_uw8_reg( GLuint file,
+static INLINE struct brw_reg brw_uw8_reg( GLuint file,
 					    GLuint nr,
 					    GLuint subnr )
 {
    return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
 }
 
-static __inline struct brw_reg brw_uw1_reg( GLuint file,
+static INLINE struct brw_reg brw_uw1_reg( GLuint file,
 					    GLuint nr,
 					    GLuint subnr )
 {
    return suboffset(retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
 }
 
-static __inline struct brw_reg brw_imm_reg( GLuint type )
+static INLINE struct brw_reg brw_imm_reg( GLuint type )
 {
    return brw_reg( BRW_IMMEDIATE_VALUE,
 		   0,
@@ -310,38 +311,38 @@ static __inline struct brw_reg brw_imm_reg( GLuint type )
 		   0);      
 }
 
-static __inline struct brw_reg brw_imm_f( GLfloat f )
+static INLINE struct brw_reg brw_imm_f( GLfloat f )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F);
    imm.dw1.f = f;
    return imm;
 }
 
-static __inline struct brw_reg brw_imm_d( GLint d )
+static INLINE struct brw_reg brw_imm_d( GLint d )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D);
    imm.dw1.d = d;
    return imm;
 }
 
-static __inline struct brw_reg brw_imm_ud( GLuint ud )
+static INLINE struct brw_reg brw_imm_ud( GLuint ud )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD);
    imm.dw1.ud = ud;
    return imm;
 }
 
-static __inline struct brw_reg brw_imm_uw( GLushort uw )
+static INLINE struct brw_reg brw_imm_uw( GLushort uw )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW);
-   imm.dw1.ud = uw;
+   imm.dw1.ud = uw | (uw << 16);
    return imm;
 }
 
-static __inline struct brw_reg brw_imm_w( GLshort w )
+static INLINE struct brw_reg brw_imm_w( GLshort w )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W);
-   imm.dw1.d = w;
+   imm.dw1.d = w | (w << 16);
    return imm;
 }
 
@@ -351,7 +352,7 @@ static __inline struct brw_reg brw_imm_w( GLshort w )
 
 /* Vector of eight signed half-byte values: 
  */
-static __inline struct brw_reg brw_imm_v( GLuint v )
+static INLINE struct brw_reg brw_imm_v( GLuint v )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V);
    imm.vstride = BRW_VERTICAL_STRIDE_0;
@@ -363,7 +364,7 @@ static __inline struct brw_reg brw_imm_v( GLuint v )
 
 /* Vector of four 8-bit float values:
  */
-static __inline struct brw_reg brw_imm_vf( GLuint v )
+static INLINE struct brw_reg brw_imm_vf( GLuint v )
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF);
    imm.vstride = BRW_VERTICAL_STRIDE_0;
@@ -377,7 +378,7 @@ static __inline struct brw_reg brw_imm_vf( GLuint v )
 #define VF_ONE  0x30
 #define VF_NEG  (1<<7)
 
-static __inline struct brw_reg brw_imm_vf4( GLuint v0, 
+static INLINE struct brw_reg brw_imm_vf4( GLuint v0, 
 					    GLuint v1, 
 					    GLuint v2,
 					    GLuint v3)
@@ -394,51 +395,57 @@ static __inline struct brw_reg brw_imm_vf4( GLuint v0,
 }
 
 
-static __inline struct brw_reg brw_address( struct brw_reg reg )
+static INLINE struct brw_reg brw_address( struct brw_reg reg )
 {
    return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr);
 }
 
 
-static __inline struct brw_reg brw_vec1_grf( GLuint nr,
+static INLINE struct brw_reg brw_vec1_grf( GLuint nr,
 					       GLuint subnr )
 {
    return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
 }
 
-static __inline struct brw_reg brw_vec8_grf( GLuint nr,
+static INLINE struct brw_reg brw_vec8_grf( GLuint nr,
 					     GLuint subnr )
 {
    return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
 }
 
-static __inline struct brw_reg brw_vec4_grf( GLuint nr,
+static INLINE struct brw_reg brw_vec4_grf( GLuint nr,
 					     GLuint subnr )
 {
    return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
 }
 
 
-static __inline struct brw_reg brw_vec2_grf( GLuint nr,
+static INLINE struct brw_reg brw_vec2_grf( GLuint nr,
 					     GLuint subnr )
 {
    return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
 }
 
-static __inline struct brw_reg brw_uw8_grf( GLuint nr,
+static INLINE struct brw_reg brw_uw8_grf( GLuint nr,
 					    GLuint subnr )
 {
    return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
 }
 
-static __inline struct brw_reg brw_null_reg( void )
+static INLINE struct brw_reg brw_uw16_grf( GLuint nr,
+					    GLuint subnr )
+{
+   return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
+}
+
+static INLINE struct brw_reg brw_null_reg( void )
 {
    return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, 
 		       BRW_ARF_NULL, 
 		       0);
 }
 
-static __inline struct brw_reg brw_address_reg( GLuint subnr )
+static INLINE struct brw_reg brw_address_reg( GLuint subnr )
 {
    return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, 
 		      BRW_ARF_ADDRESS, 
@@ -449,7 +456,7 @@ static __inline struct brw_reg brw_address_reg( GLuint subnr )
  * aren't xyzw.  This goes against the convention for other scalar
  * regs:
  */
-static __inline struct brw_reg brw_ip_reg( void )
+static INLINE struct brw_reg brw_ip_reg( void )
 {
    return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, 
 		  BRW_ARF_IP, 
@@ -462,7 +469,7 @@ static __inline struct brw_reg brw_ip_reg( void )
 		  WRITEMASK_XYZW); /* NOTE! */
 }
 
-static __inline struct brw_reg brw_acc_reg( void )
+static INLINE struct brw_reg brw_acc_reg( void )
 {
    return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, 
 		       BRW_ARF_ACCUMULATOR, 
@@ -470,7 +477,7 @@ static __inline struct brw_reg brw_acc_reg( void )
 }
 
 
-static __inline struct brw_reg brw_flag_reg( void )
+static INLINE struct brw_reg brw_flag_reg( void )
 {
    return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
 		      BRW_ARF_FLAG,
@@ -478,14 +485,14 @@ static __inline struct brw_reg brw_flag_reg( void )
 }
 
 
-static __inline struct brw_reg brw_mask_reg( GLuint subnr )
+static INLINE struct brw_reg brw_mask_reg( GLuint subnr )
 {
    return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
 		      BRW_ARF_MASK,
 		      subnr);
 }
 
-static __inline struct brw_reg brw_message_reg( GLuint nr )
+static INLINE struct brw_reg brw_message_reg( GLuint nr )
 {
    return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE,
 		       nr,
@@ -498,7 +505,7 @@ static __inline struct brw_reg brw_message_reg( GLuint nr )
 /* This is almost always called with a numeric constant argument, so
  * make things easy to evaluate at compile time:
  */
-static __inline GLuint cvt( GLuint val )
+static INLINE GLuint cvt( GLuint val )
 {
    switch (val) {
    case 0: return 0;
@@ -512,7 +519,7 @@ static __inline GLuint cvt( GLuint val )
    return 0;
 }
 
-static __inline struct brw_reg stride( struct brw_reg reg,
+static INLINE struct brw_reg stride( struct brw_reg reg,
 				       GLuint vstride,
 				       GLuint width,
 				       GLuint hstride )
@@ -524,43 +531,43 @@ static __inline struct brw_reg stride( struct brw_reg reg,
    return reg;
 }
 
-static __inline struct brw_reg vec16( struct brw_reg reg )
+static INLINE struct brw_reg vec16( struct brw_reg reg )
 {
    return stride(reg, 16,16,1);
 }
 
-static __inline struct brw_reg vec8( struct brw_reg reg )
+static INLINE struct brw_reg vec8( struct brw_reg reg )
 {
    return stride(reg, 8,8,1);
 }
 
-static __inline struct brw_reg vec4( struct brw_reg reg )
+static INLINE struct brw_reg vec4( struct brw_reg reg )
 {
    return stride(reg, 4,4,1);
 }
 
-static __inline struct brw_reg vec2( struct brw_reg reg )
+static INLINE struct brw_reg vec2( struct brw_reg reg )
 {
    return stride(reg, 2,2,1);
 }
 
-static __inline struct brw_reg vec1( struct brw_reg reg )
+static INLINE struct brw_reg vec1( struct brw_reg reg )
 {
    return stride(reg, 0,1,0);
 }
 
-static __inline struct brw_reg get_element( struct brw_reg reg, GLuint elt )
+static INLINE struct brw_reg get_element( struct brw_reg reg, GLuint elt )
 {
    return vec1(suboffset(reg, elt));
 }
 
-static __inline struct brw_reg get_element_ud( struct brw_reg reg, GLuint elt )
+static INLINE struct brw_reg get_element_ud( struct brw_reg reg, GLuint elt )
 {
    return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_UD), elt));
 }
 
 
-static __inline struct brw_reg brw_swizzle( struct brw_reg reg,
+static INLINE struct brw_reg brw_swizzle( struct brw_reg reg,
 					    GLuint x,
 					    GLuint y, 
 					    GLuint z,
@@ -574,33 +581,33 @@ static __inline struct brw_reg brw_swizzle( struct brw_reg reg,
 }
 
 
-static __inline struct brw_reg brw_swizzle1( struct brw_reg reg,
+static INLINE struct brw_reg brw_swizzle1( struct brw_reg reg,
 					     GLuint x )
 {
    return brw_swizzle(reg, x, x, x, x);
 }
 
-static __inline struct brw_reg brw_writemask( struct brw_reg reg,
+static INLINE struct brw_reg brw_writemask( struct brw_reg reg,
 					      GLuint mask )
 {
    reg.dw1.bits.writemask &= mask;
    return reg;
 }
 
-static __inline struct brw_reg brw_set_writemask( struct brw_reg reg,
+static INLINE struct brw_reg brw_set_writemask( struct brw_reg reg,
 						  GLuint mask )
 {
    reg.dw1.bits.writemask = mask;
    return reg;
 }
 
-static __inline struct brw_reg negate( struct brw_reg reg )
+static INLINE struct brw_reg negate( struct brw_reg reg )
 {
    reg.negate ^= 1;
    return reg;
 }
 
-static __inline struct brw_reg brw_abs( struct brw_reg reg )
+static INLINE struct brw_reg brw_abs( struct brw_reg reg )
 {
    reg.abs = 1;
    return reg;
@@ -608,7 +615,7 @@ static __inline struct brw_reg brw_abs( struct brw_reg reg )
 
 /***********************************************************************
  */
-static __inline struct brw_reg brw_vec4_indirect( GLuint subnr,
+static INLINE struct brw_reg brw_vec4_indirect( GLuint subnr,
 						  GLint offset )
 {
    struct brw_reg reg =  brw_vec4_grf(0, 0);
@@ -618,7 +625,7 @@ static __inline struct brw_reg brw_vec4_indirect( GLuint subnr,
    return reg;
 }
 
-static __inline struct brw_reg brw_vec1_indirect( GLuint subnr,
+static INLINE struct brw_reg brw_vec1_indirect( GLuint subnr,
 						  GLint offset )
 {
    struct brw_reg reg =  brw_vec1_grf(0, 0);
@@ -628,38 +635,48 @@ static __inline struct brw_reg brw_vec1_indirect( GLuint subnr,
    return reg;
 }
 
-static __inline struct brw_reg deref_4f(struct brw_indirect ptr, GLint offset)
+static INLINE struct brw_reg deref_4f(struct brw_indirect ptr, GLint offset)
 {
    return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset);
 }
 
-static __inline struct brw_reg deref_1f(struct brw_indirect ptr, GLint offset)
+static INLINE struct brw_reg deref_1f(struct brw_indirect ptr, GLint offset)
 {
    return brw_vec1_indirect(ptr.addr_subnr, ptr.addr_offset + offset);
 }
 
-static __inline struct brw_reg deref_4b(struct brw_indirect ptr, GLint offset)
+static INLINE struct brw_reg deref_4b(struct brw_indirect ptr, GLint offset)
 {
    return retype(deref_4f(ptr, offset), BRW_REGISTER_TYPE_B);
 }
 
-static __inline struct brw_reg deref_1uw(struct brw_indirect ptr, GLint offset)
+static INLINE struct brw_reg deref_1uw(struct brw_indirect ptr, GLint offset)
 {
    return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UW);
 }
 
-static __inline struct brw_reg get_addr_reg(struct brw_indirect ptr)
+static INLINE struct brw_reg deref_1d(struct brw_indirect ptr, GLint offset)
+{
+   return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_D);
+}
+
+static INLINE struct brw_reg deref_1ud(struct brw_indirect ptr, GLint offset)
+{
+   return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UD);
+}
+
+static INLINE struct brw_reg get_addr_reg(struct brw_indirect ptr)
 {
    return brw_address_reg(ptr.addr_subnr);
 }
 
-static __inline struct brw_indirect brw_indirect_offset( struct brw_indirect ptr, GLint offset )
+static INLINE struct brw_indirect brw_indirect_offset( struct brw_indirect ptr, GLint offset )
 {
    ptr.addr_offset += offset;
    return ptr;
 }
 
-static __inline struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset )
+static INLINE struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset )
 {
    struct brw_indirect ptr;
    ptr.addr_subnr = addr_subnr;
@@ -668,7 +685,10 @@ static __inline struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offse
    return ptr;
 }
 
-
+static INLINE struct brw_instruction *current_insn( struct brw_compile *p)
+{
+	return &p->store[p->nr_insn];
+}
 
 void brw_pop_insn_state( struct brw_compile *p );
 void brw_push_insn_state( struct brw_compile *p );
@@ -680,7 +700,7 @@ void brw_set_predicate_control_flag_value( struct brw_compile *p, GLuint value )
 void brw_set_predicate_control( struct brw_compile *p, GLuint pc );
 void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional );
 
-void brw_init_compile( struct brw_compile *p );
+void brw_init_compile( struct brw_context *, struct brw_compile *p );
 const GLuint *brw_get_program( struct brw_compile *p, GLuint *sz );
 
 
@@ -808,9 +828,11 @@ void brw_ENDIF(struct brw_compile *p,
 struct brw_instruction *brw_DO(struct brw_compile *p,
 			       GLuint execute_size);
 
-void brw_WHILE(struct brw_compile *p, 
+struct brw_instruction *brw_WHILE(struct brw_compile *p, 
 	       struct brw_instruction *patch_insn);
 
+struct brw_instruction *brw_BREAK(struct brw_compile *p);
+struct brw_instruction *brw_CONT(struct brw_compile *p);
 /* Forward jumps:
  */
 void brw_land_fwd_jump(struct brw_compile *p, 
@@ -860,5 +882,6 @@ void brw_math_invert( struct brw_compile *p,
 		      struct brw_reg dst,
 		      struct brw_reg src);
 
-
+void brw_set_src1( struct brw_instruction *insn,
+                          struct brw_reg reg );
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_eu_debug.c b/src/mesa/drivers/dri/i965/brw_eu_debug.c
index 2dff1ad2244..91dbbd5af62 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_debug.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_debug.c
@@ -30,9 +30,9 @@
   */
     
 
-#include "mtypes.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
 #include "brw_eu.h"
-#include "imports.h"
 
 void brw_print_reg( struct brw_reg hwreg )
 {
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 9992b47d8ae..ce4cf46cfa6 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -64,7 +64,9 @@ static void brw_set_dest( struct brw_instruction *insn,
 
       if (insn->header.access_mode == BRW_ALIGN_1) {
 	 insn->bits1.da1.dest_subreg_nr = dest.subnr;
-	 insn->bits1.da1.dest_horiz_stride = BRW_HORIZONTAL_STRIDE_1;
+	 if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
+	    dest.hstride = BRW_HORIZONTAL_STRIDE_1;
+	 insn->bits1.da1.dest_horiz_stride = dest.hstride;
       }
       else {
 	 insn->bits1.da16.dest_subreg_nr = dest.subnr / 16;
@@ -78,7 +80,9 @@ static void brw_set_dest( struct brw_instruction *insn,
        */
       if (insn->header.access_mode == BRW_ALIGN_1) {
 	 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
-	 insn->bits1.ia1.dest_horiz_stride = BRW_HORIZONTAL_STRIDE_1;
+	 if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
+	    dest.hstride = BRW_HORIZONTAL_STRIDE_1;
+	 insn->bits1.ia1.dest_horiz_stride = dest.hstride;
       }
       else {
 	 insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset;
@@ -164,7 +168,7 @@ static void brw_set_src0( struct brw_instruction *insn,
 }
 
 
-static void brw_set_src1( struct brw_instruction *insn,
+void brw_set_src1( struct brw_instruction *insn,
 			  struct brw_reg reg )
 {
    assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
@@ -186,7 +190,7 @@ static void brw_set_src1( struct brw_instruction *insn,
        * in the future:
        */
       assert (reg.address_mode == BRW_ADDRESS_DIRECT);
-      assert (reg.file == BRW_GENERAL_REGISTER_FILE);
+      //assert (reg.file == BRW_GENERAL_REGISTER_FILE);
 
       if (insn->header.access_mode == BRW_ALIGN_1) {
 	 insn->bits3.da1.src1_subreg_nr = reg.subnr;
@@ -318,7 +322,8 @@ static void brw_set_dp_read_message( struct brw_instruction *insn,
    insn->bits3.dp_read.end_of_thread = end_of_thread;
 }
 
-static void brw_set_sampler_message( struct brw_instruction *insn,
+static void brw_set_sampler_message(struct brw_context *brw,
+                 struct brw_instruction *insn,
 				     GLuint binding_table_index,
 				     GLuint sampler,
 				     GLuint msg_type,
@@ -328,14 +333,24 @@ static void brw_set_sampler_message( struct brw_instruction *insn,
 {
    brw_set_src1(insn, brw_imm_d(0));
 
-   insn->bits3.sampler.binding_table_index = binding_table_index;
-   insn->bits3.sampler.sampler = sampler;
-   insn->bits3.sampler.msg_type = msg_type;
-   insn->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32;
-   insn->bits3.sampler.response_length = response_length;
-   insn->bits3.sampler.msg_length = msg_length;
-   insn->bits3.sampler.end_of_thread = eot;
-   insn->bits3.sampler.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+   if (BRW_IS_G4X(brw)) {
+      insn->bits3.sampler_g4x.binding_table_index = binding_table_index;
+      insn->bits3.sampler_g4x.sampler = sampler;
+      insn->bits3.sampler_g4x.msg_type = msg_type;
+      insn->bits3.sampler_g4x.response_length = response_length;
+      insn->bits3.sampler_g4x.msg_length = msg_length;
+      insn->bits3.sampler_g4x.end_of_thread = eot;
+      insn->bits3.sampler_g4x.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+   } else {
+      insn->bits3.sampler.binding_table_index = binding_table_index;
+      insn->bits3.sampler.sampler = sampler;
+      insn->bits3.sampler.msg_type = msg_type;
+      insn->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32;
+      insn->bits3.sampler.response_length = response_length;
+      insn->bits3.sampler.msg_length = msg_length;
+      insn->bits3.sampler.end_of_thread = eot;
+      insn->bits3.sampler.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+   }
 }
 
 
@@ -502,6 +517,8 @@ struct brw_instruction *brw_IF(struct brw_compile *p, GLuint execute_size)
    insn->header.compression_control = BRW_COMPRESSION_NONE;
    insn->header.predicate_control = BRW_PREDICATE_NORMAL;
    insn->header.mask_control = BRW_MASK_ENABLE;
+   if (!p->single_program_flow)
+       insn->header.thread_control = BRW_THREAD_SWITCH;
 
    p->current->header.predicate_control = BRW_PREDICATE_NONE;
 
@@ -527,6 +544,8 @@ struct brw_instruction *brw_ELSE(struct brw_compile *p,
    insn->header.compression_control = BRW_COMPRESSION_NONE;
    insn->header.execution_size = if_insn->header.execution_size;
    insn->header.mask_control = BRW_MASK_ENABLE;
+   if (!p->single_program_flow)
+       insn->header.thread_control = BRW_THREAD_SWITCH;
 
    /* Patch the if instruction to point at this instruction.
     */
@@ -568,6 +587,7 @@ void brw_ENDIF(struct brw_compile *p,
       insn->header.compression_control = BRW_COMPRESSION_NONE;
       insn->header.execution_size = patch_insn->header.execution_size;
       insn->header.mask_control = BRW_MASK_ENABLE;
+      insn->header.thread_control = BRW_THREAD_SWITCH;
 
       assert(patch_insn->bits3.if_else.jump_count == 0);
 
@@ -597,6 +617,34 @@ void brw_ENDIF(struct brw_compile *p,
    }
 }
 
+struct brw_instruction *brw_BREAK(struct brw_compile *p)
+{
+   struct brw_instruction *insn;
+   insn = next_insn(p, BRW_OPCODE_BREAK);
+   brw_set_dest(insn, brw_ip_reg());
+   brw_set_src0(insn, brw_ip_reg());
+   brw_set_src1(insn, brw_imm_d(0x0));
+   insn->header.compression_control = BRW_COMPRESSION_NONE;
+   insn->header.execution_size = BRW_EXECUTE_8;
+   /* insn->header.mask_control = BRW_MASK_DISABLE; */
+   insn->bits3.if_else.pad0 = 0;
+   return insn;
+}
+
+struct brw_instruction *brw_CONT(struct brw_compile *p)
+{
+   struct brw_instruction *insn;
+   insn = next_insn(p, BRW_OPCODE_CONTINUE);
+   brw_set_dest(insn, brw_ip_reg());
+   brw_set_src0(insn, brw_ip_reg());
+   brw_set_src1(insn, brw_imm_d(0x0));
+   insn->header.compression_control = BRW_COMPRESSION_NONE;
+   insn->header.execution_size = BRW_EXECUTE_8;
+   /* insn->header.mask_control = BRW_MASK_DISABLE; */
+   insn->bits3.if_else.pad0 = 0;
+   return insn;
+}
+
 /* DO/WHILE loop:
  */
 struct brw_instruction *brw_DO(struct brw_compile *p, GLuint execute_size)
@@ -608,13 +656,15 @@ struct brw_instruction *brw_DO(struct brw_compile *p, GLuint execute_size)
 
       /* Override the defaults for this instruction:
        */
-      brw_set_dest(insn, retype(brw_vec1_grf(0,0), BRW_REGISTER_TYPE_UD));
-      brw_set_src0(insn, retype(brw_vec1_grf(0,0), BRW_REGISTER_TYPE_UD));
-      brw_set_src1(insn, retype(brw_vec1_grf(0,0), BRW_REGISTER_TYPE_UD));
+      brw_set_dest(insn, brw_null_reg());
+      brw_set_src0(insn, brw_null_reg());
+      brw_set_src1(insn, brw_null_reg());
 
       insn->header.compression_control = BRW_COMPRESSION_NONE;
       insn->header.execution_size = execute_size;
+      insn->header.predicate_control = BRW_PREDICATE_NONE;
       /* insn->header.mask_control = BRW_MASK_ENABLE; */
+      /* insn->header.mask_control = BRW_MASK_DISABLE; */
 
       return insn;
    }
@@ -622,7 +672,7 @@ struct brw_instruction *brw_DO(struct brw_compile *p, GLuint execute_size)
 
 
 
-void brw_WHILE(struct brw_compile *p, 
+struct brw_instruction *brw_WHILE(struct brw_compile *p, 
 	       struct brw_instruction *do_insn)
 {
    struct brw_instruction *insn;
@@ -646,14 +696,16 @@ void brw_WHILE(struct brw_compile *p,
       insn->header.execution_size = do_insn->header.execution_size;
 
       assert(do_insn->header.opcode == BRW_OPCODE_DO);
-      insn->bits3.if_else.jump_count = do_insn - insn;
+      insn->bits3.if_else.jump_count = do_insn - insn + 1;
       insn->bits3.if_else.pop_count = 0;
       insn->bits3.if_else.pad0 = 0;
    }
 
 /*    insn->header.mask_control = BRW_MASK_ENABLE; */
 
+   /* insn->header.mask_control = BRW_MASK_DISABLE; */
    p->current->header.predicate_control = BRW_PREDICATE_NONE;   
+   return insn;
 }
 
 
@@ -985,7 +1037,7 @@ void brw_SAMPLE(struct brw_compile *p,
 
       brw_set_dest(insn, dest);
       brw_set_src0(insn, src0);
-      brw_set_sampler_message(insn,
+      brw_set_sampler_message(p->brw, insn,
 			      binding_table_index,
 			      sampler,
 			      msg_type,
diff --git a/src/mesa/drivers/dri/i965/brw_exec_generic.c b/src/mesa/drivers/dri/i965/brw_exec_generic.c
deleted file mode 100644
index 11d1ef76f59..00000000000
--- a/src/mesa/drivers/dri/i965/brw_exec_generic.c
+++ /dev/null
@@ -1,530 +0,0 @@
-/**************************************************************************
-
-Copyright 2004 Tungsten Graphics Inc., Cedar Park, Texas.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, TUNGSTEN GRAPHICS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- *   Keith Whitwell <keith@tungstengraphics.com>
- */
-
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "vtxfmt.h"
-#include "dlist.h"
-#include "state.h"
-#include "light.h"
-#include "api_arrayelt.h"
-#include "api_noop.h"
-
-#include "brw_exec.h"
-
-
-/* Versions of all the entrypoints for situations where codegen isn't
- * available.  
- *
- * Note: Only one size for each attribute may be active at once.
- * Eg. if Color3f is installed/active, then Color4f may not be, even
- * if the vertex actually contains 4 color coordinates.  This is
- * because the 3f version won't otherwise set color[3] to 1.0 -- this
- * is the job of the chooser function when switching between Color4f
- * and Color3f.
- */
-#define ATTRFV( ATTR, N )				\
-static void attrib_##ATTR##_##N( const GLfloat *v )	\
-{							\
-   GET_CURRENT_CONTEXT( ctx );				\
-   struct brw_exec_context *exec = IMM_CONTEXT(ctx)->exec;			\
-							\
-   if ((ATTR) == 0) {					\
-      GLuint i;						\
-							\
-      if (N>0) exec->vtx.vbptr[0] = v[0];		\
-      if (N>1) exec->vtx.vbptr[1] = v[1];		\
-      if (N>2) exec->vtx.vbptr[2] = v[2];		\
-      if (N>3) exec->vtx.vbptr[3] = v[3];		\
-							\
-      for (i = N; i < exec->vtx.vertex_size; i++)	\
-	 exec->vtx.vbptr[i] = exec->vtx.vertex[i];	\
-							\
-      exec->vtx.vbptr += exec->vtx.vertex_size;		\
-      exec->ctx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; \
-							\
-      if (++exec->vtx.vert_count >= exec->vtx.max_vert)	\
-	 brw_exec_vtx_wrap( exec );		\
-   }							\
-   else {						\
-      GLfloat *dest = exec->vtx.attrptr[ATTR];		\
-      if (N>0) dest[0] = v[0];				\
-      if (N>1) dest[1] = v[1];				\
-      if (N>2) dest[2] = v[2];				\
-      if (N>3) dest[3] = v[3];				\
-   }							\
-}
-
-#define INIT(TAB, ATTR)						\
-   TAB[ATTR][0] = attrib_##ATTR##_1;				\
-   TAB[ATTR][1] = attrib_##ATTR##_2;				\
-   TAB[ATTR][2] = attrib_##ATTR##_3;				\
-   TAB[ATTR][3] = attrib_##ATTR##_4;
-
-
-#define ATTRS( ATTRIB )				\
-   ATTRFV( ATTRIB, 1 )				\
-   ATTRFV( ATTRIB, 2 )				\
-   ATTRFV( ATTRIB, 3 )				\
-   ATTRFV( ATTRIB, 4 )			
-
-ATTRS( 0 )
-ATTRS( 1 )
-ATTRS( 2 )
-ATTRS( 3 )
-ATTRS( 4 )
-ATTRS( 5 )
-ATTRS( 6 )
-ATTRS( 7 )
-ATTRS( 8 )
-ATTRS( 9 )
-ATTRS( 10 )
-ATTRS( 11 )
-ATTRS( 12 )
-ATTRS( 13 )
-ATTRS( 14 )
-ATTRS( 15 )
-
-void brw_exec_generic_attr_table_init( brw_attrfv_func (*tab)[4] )
-{
-   INIT( tab, 0 );
-   INIT( tab, 1 );
-   INIT( tab, 2 );
-   INIT( tab, 3 );
-   INIT( tab, 4 );
-   INIT( tab, 5 );
-   INIT( tab, 6 );
-   INIT( tab, 7 );
-   INIT( tab, 8 );
-   INIT( tab, 9 );
-   INIT( tab, 10 );
-   INIT( tab, 11 );
-   INIT( tab, 12 );
-   INIT( tab, 13 );
-   INIT( tab, 14 );
-   INIT( tab, 15 );
-}
-
-/* These can be made efficient with codegen.  Further, by adding more
- * logic to do_choose(), the double-dispatch for legacy entrypoints
- * like glVertex3f() can be removed.
- */
-#define DISPATCH_ATTRFV( ATTR, COUNT, P )	\
-do {						\
-   GET_CURRENT_CONTEXT( ctx ); 			\
-   struct brw_exec_context *exec = IMM_CONTEXT(ctx)->exec; 		\
-   exec->vtx.tabfv[ATTR][COUNT-1]( P );		\
-} while (0)
-
-#define DISPATCH_ATTR1FV( ATTR, V ) DISPATCH_ATTRFV( ATTR, 1, V )
-#define DISPATCH_ATTR2FV( ATTR, V ) DISPATCH_ATTRFV( ATTR, 2, V )
-#define DISPATCH_ATTR3FV( ATTR, V ) DISPATCH_ATTRFV( ATTR, 3, V )
-#define DISPATCH_ATTR4FV( ATTR, V ) DISPATCH_ATTRFV( ATTR, 4, V )
-
-#define DISPATCH_ATTR1F( ATTR, S ) DISPATCH_ATTRFV( ATTR, 1, &(S) )
-
-#define DISPATCH_ATTR2F( ATTR, S,T ) 		\
-do { 						\
-   GLfloat v[2]; 				\
-   v[0] = S; v[1] = T;				\
-   DISPATCH_ATTR2FV( ATTR, v );			\
-} while (0)
-#define DISPATCH_ATTR3F( ATTR, S,T,R ) 		\
-do { 						\
-   GLfloat v[3]; 				\
-   v[0] = S; v[1] = T; v[2] = R;		\
-   DISPATCH_ATTR3FV( ATTR, v );			\
-} while (0)
-#define DISPATCH_ATTR4F( ATTR, S,T,R,Q )	\
-do { 						\
-   GLfloat v[4]; 				\
-   v[0] = S; v[1] = T; v[2] = R; v[3] = Q;	\
-   DISPATCH_ATTR4FV( ATTR, v );			\
-} while (0)
-
-
-static void GLAPIENTRY brw_Vertex2f( GLfloat x, GLfloat y )
-{
-   DISPATCH_ATTR2F( BRW_ATTRIB_POS, x, y );
-}
-
-static void GLAPIENTRY brw_Vertex2fv( const GLfloat *v )
-{
-   DISPATCH_ATTR2FV( BRW_ATTRIB_POS, v );
-}
-
-static void GLAPIENTRY brw_Vertex3f( GLfloat x, GLfloat y, GLfloat z )
-{
-   DISPATCH_ATTR3F( BRW_ATTRIB_POS, x, y, z );
-}
-
-static void GLAPIENTRY brw_Vertex3fv( const GLfloat *v )
-{
-   DISPATCH_ATTR3FV( BRW_ATTRIB_POS, v );
-}
-
-static void GLAPIENTRY brw_Vertex4f( GLfloat x, GLfloat y, GLfloat z, 
-				      GLfloat w )
-{
-   DISPATCH_ATTR4F( BRW_ATTRIB_POS, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_Vertex4fv( const GLfloat *v )
-{
-   DISPATCH_ATTR4FV( BRW_ATTRIB_POS, v );
-}
-
-static void GLAPIENTRY brw_TexCoord1f( GLfloat x )
-{
-   DISPATCH_ATTR1F( BRW_ATTRIB_TEX0, x );
-}
-
-static void GLAPIENTRY brw_TexCoord1fv( const GLfloat *v )
-{
-   DISPATCH_ATTR1FV( BRW_ATTRIB_TEX0, v );
-}
-
-static void GLAPIENTRY brw_TexCoord2f( GLfloat x, GLfloat y )
-{
-   DISPATCH_ATTR2F( BRW_ATTRIB_TEX0, x, y );
-}
-
-static void GLAPIENTRY brw_TexCoord2fv( const GLfloat *v )
-{
-   DISPATCH_ATTR2FV( BRW_ATTRIB_TEX0, v );
-}
-
-static void GLAPIENTRY brw_TexCoord3f( GLfloat x, GLfloat y, GLfloat z )
-{
-   DISPATCH_ATTR3F( BRW_ATTRIB_TEX0, x, y, z );
-}
-
-static void GLAPIENTRY brw_TexCoord3fv( const GLfloat *v )
-{
-   DISPATCH_ATTR3FV( BRW_ATTRIB_TEX0, v );
-}
-
-static void GLAPIENTRY brw_TexCoord4f( GLfloat x, GLfloat y, GLfloat z,
-					GLfloat w )
-{
-   DISPATCH_ATTR4F( BRW_ATTRIB_TEX0, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_TexCoord4fv( const GLfloat *v )
-{
-   DISPATCH_ATTR4FV( BRW_ATTRIB_TEX0, v );
-}
-
-static void GLAPIENTRY brw_Normal3f( GLfloat x, GLfloat y, GLfloat z )
-{
-   DISPATCH_ATTR3F( BRW_ATTRIB_NORMAL, x, y, z );
-}
-
-static void GLAPIENTRY brw_Normal3fv( const GLfloat *v )
-{
-   DISPATCH_ATTR3FV( BRW_ATTRIB_NORMAL, v );
-}
-
-static void GLAPIENTRY brw_FogCoordfEXT( GLfloat x )
-{
-   DISPATCH_ATTR1F( BRW_ATTRIB_FOG, x );
-}
-
-static void GLAPIENTRY brw_FogCoordfvEXT( const GLfloat *v )
-{
-   DISPATCH_ATTR1FV( BRW_ATTRIB_FOG, v );
-}
-
-static void GLAPIENTRY brw_Color3f( GLfloat x, GLfloat y, GLfloat z )
-{
-   DISPATCH_ATTR3F( BRW_ATTRIB_COLOR0, x, y, z );
-}
-
-static void GLAPIENTRY brw_Color3fv( const GLfloat *v )
-{
-   DISPATCH_ATTR3FV( BRW_ATTRIB_COLOR0, v );
-}
-
-static void GLAPIENTRY brw_Color4f( GLfloat x, GLfloat y, GLfloat z, 
-				     GLfloat w )
-{
-   DISPATCH_ATTR4F( BRW_ATTRIB_COLOR0, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_Color4fv( const GLfloat *v )
-{
-   DISPATCH_ATTR4FV( BRW_ATTRIB_COLOR0, v );
-}
-
-static void GLAPIENTRY brw_SecondaryColor3fEXT( GLfloat x, GLfloat y, 
-						 GLfloat z )
-{
-   DISPATCH_ATTR3F( BRW_ATTRIB_COLOR1, x, y, z );
-}
-
-static void GLAPIENTRY brw_SecondaryColor3fvEXT( const GLfloat *v )
-{
-   DISPATCH_ATTR3FV( BRW_ATTRIB_COLOR1, v );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord1f( GLenum target, GLfloat x  )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR1F( attr, x );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord1fv( GLenum target,
-					      const GLfloat *v )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR1FV( attr, v );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord2f( GLenum target, GLfloat x, 
-					     GLfloat y )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR2F( attr, x, y );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord2fv( GLenum target, 
-					      const GLfloat *v )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR2FV( attr, v );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord3f( GLenum target, GLfloat x, 
-					     GLfloat y, GLfloat z)
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR3F( attr, x, y, z );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord3fv( GLenum target, 
-					      const GLfloat *v )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR3FV( attr, v );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord4f( GLenum target, GLfloat x, 
-					     GLfloat y, GLfloat z,
-					     GLfloat w )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR4F( attr, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_MultiTexCoord4fv( GLenum target, 
-					      const GLfloat *v )
-{
-   GLuint attr = (target & 0x7) + BRW_ATTRIB_TEX0;
-   DISPATCH_ATTR4FV( attr, v );
-}
-
-
-static void GLAPIENTRY brw_VertexAttrib1fNV( GLuint index, GLfloat x )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR1F( index, x );
-}
-
-static void GLAPIENTRY brw_VertexAttrib1fvNV( GLuint index, 
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR1FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib2fNV( GLuint index, GLfloat x, 
-					      GLfloat y )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR2F( index, x, y );
-}
-
-static void GLAPIENTRY brw_VertexAttrib2fvNV( GLuint index,
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR2FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib3fNV( GLuint index, GLfloat x,
-					      GLfloat y, GLfloat z )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR3F( index, x, y, z );
-}
-
-static void GLAPIENTRY brw_VertexAttrib3fvNV( GLuint index,
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR3FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib4fNV( GLuint index, GLfloat x,
-					      GLfloat y, GLfloat z,
-					      GLfloat w )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR4F( index, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_VertexAttrib4fvNV( GLuint index, 
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR4FV( index, v );
-}
-
-
-/*
- * XXX adjust index
- */
-
-static void GLAPIENTRY brw_VertexAttrib1fARB( GLuint index, GLfloat x )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR1F( index, x );
-}
-
-static void GLAPIENTRY brw_VertexAttrib1fvARB( GLuint index, 
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR1FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib2fARB( GLuint index, GLfloat x, 
-					      GLfloat y )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR2F( index, x, y );
-}
-
-static void GLAPIENTRY brw_VertexAttrib2fvARB( GLuint index,
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR2FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib3fARB( GLuint index, GLfloat x,
-					      GLfloat y, GLfloat z )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR3F( index, x, y, z );
-}
-
-static void GLAPIENTRY brw_VertexAttrib3fvARB( GLuint index,
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR3FV( index, v );
-}
-
-static void GLAPIENTRY brw_VertexAttrib4fARB( GLuint index, GLfloat x,
-					      GLfloat y, GLfloat z,
-					      GLfloat w )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR4F( index, x, y, z, w );
-}
-
-static void GLAPIENTRY brw_VertexAttrib4fvARB( GLuint index, 
-					       const GLfloat *v )
-{
-   if (index >= BRW_ATTRIB_FIRST_MATERIAL) index = ERROR_ATTRIB;
-   DISPATCH_ATTR4FV( index, v );
-}
-
-
-/* Install the generic versions of the 2nd level dispatch
- * functions.  Some of these have a codegen alternative.
- */
-void brw_exec_vtx_generic_init( struct brw_exec_context *exec )
-{
-   GLvertexformat *vfmt = &exec->vtxfmt;
-
-   vfmt->Color3f = brw_Color3f;
-   vfmt->Color3fv = brw_Color3fv;
-   vfmt->Color4f = brw_Color4f;
-   vfmt->Color4fv = brw_Color4fv;
-   vfmt->FogCoordfEXT = brw_FogCoordfEXT;
-   vfmt->FogCoordfvEXT = brw_FogCoordfvEXT;
-   vfmt->MultiTexCoord1fARB = brw_MultiTexCoord1f;
-   vfmt->MultiTexCoord1fvARB = brw_MultiTexCoord1fv;
-   vfmt->MultiTexCoord2fARB = brw_MultiTexCoord2f;
-   vfmt->MultiTexCoord2fvARB = brw_MultiTexCoord2fv;
-   vfmt->MultiTexCoord3fARB = brw_MultiTexCoord3f;
-   vfmt->MultiTexCoord3fvARB = brw_MultiTexCoord3fv;
-   vfmt->MultiTexCoord4fARB = brw_MultiTexCoord4f;
-   vfmt->MultiTexCoord4fvARB = brw_MultiTexCoord4fv;
-   vfmt->Normal3f = brw_Normal3f;
-   vfmt->Normal3fv = brw_Normal3fv;
-   vfmt->SecondaryColor3fEXT = brw_SecondaryColor3fEXT;
-   vfmt->SecondaryColor3fvEXT = brw_SecondaryColor3fvEXT;
-   vfmt->TexCoord1f = brw_TexCoord1f;
-   vfmt->TexCoord1fv = brw_TexCoord1fv;
-   vfmt->TexCoord2f = brw_TexCoord2f;
-   vfmt->TexCoord2fv = brw_TexCoord2fv;
-   vfmt->TexCoord3f = brw_TexCoord3f;
-   vfmt->TexCoord3fv = brw_TexCoord3fv;
-   vfmt->TexCoord4f = brw_TexCoord4f;
-   vfmt->TexCoord4fv = brw_TexCoord4fv;
-   vfmt->Vertex2f = brw_Vertex2f;
-   vfmt->Vertex2fv = brw_Vertex2fv;
-   vfmt->Vertex3f = brw_Vertex3f;
-   vfmt->Vertex3fv = brw_Vertex3fv;
-   vfmt->Vertex4f = brw_Vertex4f;
-   vfmt->Vertex4fv = brw_Vertex4fv;
-   vfmt->VertexAttrib1fNV = brw_VertexAttrib1fNV;
-   vfmt->VertexAttrib1fvNV = brw_VertexAttrib1fvNV;
-   vfmt->VertexAttrib2fNV = brw_VertexAttrib2fNV;
-   vfmt->VertexAttrib2fvNV = brw_VertexAttrib2fvNV;
-   vfmt->VertexAttrib3fNV = brw_VertexAttrib3fNV;
-   vfmt->VertexAttrib3fvNV = brw_VertexAttrib3fvNV;
-   vfmt->VertexAttrib4fNV = brw_VertexAttrib4fNV;
-   vfmt->VertexAttrib4fvNV = brw_VertexAttrib4fvNV;
-   vfmt->VertexAttrib1fARB = brw_VertexAttrib1fARB;
-   vfmt->VertexAttrib1fvARB = brw_VertexAttrib1fvARB;
-   vfmt->VertexAttrib2fARB = brw_VertexAttrib2fARB;
-   vfmt->VertexAttrib2fvARB = brw_VertexAttrib2fvARB;
-   vfmt->VertexAttrib3fARB = brw_VertexAttrib3fARB;
-   vfmt->VertexAttrib3fvARB = brw_VertexAttrib3fvARB;
-   vfmt->VertexAttrib4fARB = brw_VertexAttrib4fARB;
-   vfmt->VertexAttrib4fvARB = brw_VertexAttrib4fvARB;
-}
diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c
index 86464b2ec5f..4ea660a51a3 100644
--- a/src/mesa/drivers/dri/i965/brw_fallback.c
+++ b/src/mesa/drivers/dri/i965/brw_fallback.c
@@ -25,52 +25,47 @@
  * 
  **************************************************************************/
 
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+
 #include "swrast_setup/swrast_setup.h"
 #include "swrast/swrast.h"
 #include "tnl/tnl.h"
-#include "context.h"
 #include "brw_context.h"
 #include "brw_fallback.h"
 
-#include "glheader.h"
-#include "enums.h"
-#include "glapi.h"
-#include "imports.h"
-#include "macros.h"
-#include "mtypes.h"
-
-
-
-
-
+#include "glapi/glapi.h"
 
+#define FILE_DEBUG_FLAG DEBUG_FALLBACKS
 
 static GLboolean do_check_fallback(struct brw_context *brw)
 {
    GLcontext *ctx = &brw->intel.ctx;
    GLuint i;
-   
+
    /* BRW_NEW_METAOPS
     */
    if (brw->metaops.active)
       return GL_FALSE;
 
-   if (brw->intel.no_rast)
-      return GL_TRUE;
-   
-   /* _NEW_BUFFERS
-    */
-   if (ctx->DrawBuffer->_ColorDrawBufferMask[0] != BUFFER_BIT_FRONT_LEFT &&
-       ctx->DrawBuffer->_ColorDrawBufferMask[0] != BUFFER_BIT_BACK_LEFT)
+   if (brw->intel.no_rast) {
+      DBG("FALLBACK: rasterization disabled\n");
       return GL_TRUE;
+   }
 
    /* _NEW_RENDERMODE
     *
     * XXX: need to save/restore RenderMode in metaops state, or
     * somehow move to a new attribs pointer:
     */
-   if (ctx->RenderMode != GL_RENDER)
+   if (ctx->RenderMode != GL_RENDER) {
+      DBG("FALLBACK: render mode\n");
       return GL_TRUE;
+   }
 
    /* _NEW_TEXTURE:
     */
@@ -79,8 +74,10 @@ static GLboolean do_check_fallback(struct brw_context *brw)
       if (texUnit->_ReallyEnabled) {
 	 struct intel_texture_object *intelObj = intel_texture_object(texUnit->_Current);
 	 struct gl_texture_image *texImage = intelObj->base.Image[0][intelObj->firstLevel];
-	 if (texImage->Border)
+	 if (texImage->Border) {
+	    DBG("FALLBACK: texture border\n");
 	    return GL_TRUE;
+	 }
       }
    }
    
@@ -88,6 +85,7 @@ static GLboolean do_check_fallback(struct brw_context *brw)
     */
    if (brw->attribs.Stencil->Enabled && 
        !brw->intel.hw_stencil) {
+      DBG("FALLBACK: stencil\n");
       return GL_TRUE;
    }
 
@@ -106,7 +104,7 @@ const struct brw_tracked_state brw_check_fallback = {
       .brw  = BRW_NEW_METAOPS,
       .cache = 0
    },
-   .update = check_fallback
+   .prepare = check_fallback
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_fallback.h b/src/mesa/drivers/dri/i965/brw_fallback.h
index 684a46cd170..50dcdacd17a 100644
--- a/src/mesa/drivers/dri/i965/brw_fallback.h
+++ b/src/mesa/drivers/dri/i965/brw_fallback.h
@@ -28,7 +28,7 @@
 #ifndef BRW_FALLBACK_H
 #define BRW_FALLBACK_H
 
-#include "mtypes.h"		/* for GLcontext... */
+#include "main/mtypes.h"		/* for GLcontext... */
 
 struct brw_context;
 struct vbo_prim;
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 73263a5fff4..a8b74a0afe6 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -29,9 +29,9 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
       
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "intel_batchbuffer.h"
 
@@ -65,7 +65,7 @@ static void compile_gs_prog( struct brw_context *brw,
    
    /* Begin the compilation:
     */
-   brw_init_compile(&c.func);
+   brw_init_compile(brw, &c.func);
 
    c.func.single_program_flow = 1;
 
@@ -119,26 +119,15 @@ static void compile_gs_prog( struct brw_context *brw,
 
    /* Upload
     */
-   brw->gs.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_GS_PROG],
-					      &c.key,
-					      sizeof(c.key),
-					      program,
-					      program_size,
-					      &c.prog_data,
-					      &brw->gs.prog_data );
+   dri_bo_unreference(brw->gs.prog_bo);
+   brw->gs.prog_bo = brw_upload_cache( &brw->cache, BRW_GS_PROG,
+				       &c.key, sizeof(c.key),
+				       NULL, 0,
+				       program, program_size,
+				       &c.prog_data,
+				       &brw->gs.prog_data );
 }
 
-
-static GLboolean search_cache( struct brw_context *brw, 
-			       struct brw_gs_prog_key *key )
-{
-   return brw_search_cache(&brw->cache[BRW_GS_PROG], 
-			   key, sizeof(*key),
-			   &brw->gs.prog_data,
-			   &brw->gs.prog_gs_offset);
-}
-
-
 static const GLenum gs_prim[GL_POLYGON+1] = {  
    GL_POINTS,
    GL_LINES,
@@ -173,10 +162,9 @@ static void populate_key( struct brw_context *brw,
 
 /* Calculate interpolants for triangle and line rasterization.
  */
-static void upload_gs_prog( struct brw_context *brw )
+static void prepare_gs_prog(struct brw_context *brw)
 {
    struct brw_gs_prog_key key;
-
    /* Populate the key:
     */
    populate_key(brw, &key);
@@ -187,7 +175,12 @@ static void upload_gs_prog( struct brw_context *brw )
    }
 
    if (brw->gs.prog_active) {
-      if (!search_cache(brw, &key))
+      dri_bo_unreference(brw->gs.prog_bo);
+      brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG,
+					 &key, sizeof(key),
+					 NULL, 0,
+					 &brw->gs.prog_data);
+      if (brw->gs.prog_bo == NULL)
 	 compile_gs_prog( brw, &key );
    }
 }
@@ -199,5 +192,5 @@ const struct brw_tracked_state brw_gs_prog = {
       .brw   = BRW_NEW_PRIMITIVE,
       .cache = CACHE_NEW_VS_PROG
    },
-   .update = upload_gs_prog
+   .prepare = prepare_gs_prog
 };
diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h
index 29a4e80ce1b..18a4537c323 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -40,11 +40,11 @@
 #define MAX_GS_VERTS (4)	     
 
 struct brw_gs_prog_key {
+   GLuint attrs:32;
    GLuint primitive:4;
-   GLuint attrs:16;		
    GLuint hint_gs_always:1;
    GLuint need_gs_prog:1;
-   GLuint pad:10;
+   GLuint pad:26;
 };
 
 struct brw_gs_compile {
diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index 9abb94d82ed..22e0d25c2e7 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -30,9 +30,9 @@
   */
  
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "shader/program.h"
 #include "intel_batchbuffer.h"
diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
index 5826c01d4f9..27023cf0344 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
@@ -34,49 +34,103 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "macros.h"
+#include "main/macros.h"
 
+struct brw_gs_unit_key {
+   unsigned int total_grf;
+   unsigned int urb_entry_read_length;
 
+   unsigned int curbe_offset;
 
-static void upload_gs_unit( struct brw_context *brw )
-{
-   struct brw_gs_unit_state gs;
+   unsigned int nr_urb_entries, urb_size;
+   GLboolean prog_active;
+};
 
-   memset(&gs, 0, sizeof(gs));
+static void
+gs_unit_populate_key(struct brw_context *brw, struct brw_gs_unit_key *key)
+{
+   memset(key, 0, sizeof(*key));
 
    /* CACHE_NEW_GS_PROG */
-   if (brw->gs.prog_active) {
-      gs.thread0.grf_reg_count = ((brw->gs.prog_data->total_grf-1) & ~15) / 16;
-      gs.thread0.kernel_start_pointer = brw->gs.prog_gs_offset >> 6;
-      gs.thread3.urb_entry_read_length = brw->gs.prog_data->urb_read_length;
-   }
-   else {
-      gs.thread0.grf_reg_count = 0;
-      gs.thread0.kernel_start_pointer = 0;
-      gs.thread3.urb_entry_read_length = 1;
+   key->prog_active = brw->gs.prog_active;
+   if (key->prog_active) {
+      key->total_grf = brw->gs.prog_data->total_grf;
+      key->urb_entry_read_length = brw->gs.prog_data->urb_read_length;
+   } else {
+      key->total_grf = 1;
+      key->urb_entry_read_length = 1;
    }
 
+   /* BRW_NEW_CURBE_OFFSETS */
+   key->curbe_offset = brw->curbe.clip_start;
+
    /* BRW_NEW_URB_FENCE */
-   gs.thread4.nr_urb_entries = brw->urb.nr_gs_entries; 
-   gs.thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
+   key->nr_urb_entries = brw->urb.nr_gs_entries;
+   key->urb_size = brw->urb.vsize;
+}
 
-   gs.thread4.max_threads = 0; /* Hardware requirement */
+static dri_bo *
+gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
+{
+   struct brw_gs_unit_state gs;
+   dri_bo *bo;
 
-   if (INTEL_DEBUG & DEBUG_STATS)
-      gs.thread4.stats_enable = 1; 
+   memset(&gs, 0, sizeof(gs));
+
+   gs.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
+   if (key->prog_active) /* reloc */
+      gs.thread0.kernel_start_pointer = brw->gs.prog_bo->offset >> 6;
 
-   /* CONSTANT */
    gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
    gs.thread1.single_program_flow = 1;
+
    gs.thread3.dispatch_grf_start_reg = 1;
    gs.thread3.const_urb_entry_read_offset = 0;
    gs.thread3.const_urb_entry_read_length = 0;
    gs.thread3.urb_entry_read_offset = 0;
-   
+   gs.thread3.urb_entry_read_length = key->urb_entry_read_length;
+
+   gs.thread4.nr_urb_entries = key->nr_urb_entries;
+   gs.thread4.urb_entry_allocation_size = key->urb_size - 1;
+
+   gs.thread4.max_threads = 0; /* Hardware requirement */
+
+   if (INTEL_DEBUG & DEBUG_STATS)
+      gs.thread4.stats_enable = 1;
+
+   bo = brw_upload_cache(&brw->cache, BRW_GS_UNIT,
+			 key, sizeof(*key),
+			 &brw->gs.prog_bo, 1,
+			 &gs, sizeof(gs),
+			 NULL, NULL);
 
-   brw->gs.state_gs_offset = brw_cache_data( &brw->cache[BRW_GS_UNIT], &gs );
+   if (key->prog_active) {
+      /* Emit GS program relocation */
+      dri_bo_emit_reloc(bo,
+			I915_GEM_DOMAIN_INSTRUCTION, 0,
+			gs.thread0.grf_reg_count << 1,
+			offsetof(struct brw_gs_unit_state, thread0),
+			brw->gs.prog_bo);
+   }
+
+   return bo;
 }
 
+static void prepare_gs_unit(struct brw_context *brw)
+{
+   struct brw_gs_unit_key key;
+
+   gs_unit_populate_key(brw, &key);
+
+   dri_bo_unreference(brw->gs.state_bo);
+   brw->gs.state_bo = brw_search_cache(&brw->cache, BRW_GS_UNIT,
+				       &key, sizeof(key),
+				       &brw->gs.prog_bo, 1,
+				       NULL);
+   if (brw->gs.state_bo == NULL) {
+      brw->gs.state_bo = gs_unit_create_from_key(brw, &key);
+   }
+}
 
 const struct brw_tracked_state brw_gs_unit = {
    .dirty = {
@@ -85,5 +139,5 @@ const struct brw_tracked_state brw_gs_unit = {
 		BRW_NEW_URB_FENCE),
       .cache = CACHE_NEW_GS_PROG
    },
-   .update = upload_gs_unit
+   .prepare = prepare_gs_unit,
 };
diff --git a/src/mesa/drivers/dri/i965/brw_hal.c b/src/mesa/drivers/dri/i965/brw_hal.c
deleted file mode 100644
index 3126102749b..00000000000
--- a/src/mesa/drivers/dri/i965/brw_hal.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
-
-#include "intel_batchbuffer.h"
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_hal.h"
-#include <dlfcn.h>
-
-static void *brw_hal_lib;
-static GLboolean brw_hal_tried;
-
-void *
-brw_hal_find_symbol (char *symbol)
-{
-    if (!brw_hal_tried)
-    {
-	char *brw_hal_name = getenv ("INTEL_HAL");
-    
-	if (!brw_hal_name)
-	    brw_hal_name = "/usr/lib/xorg/modules/drivers/intel_hal.so";
-
-	brw_hal_lib = dlopen (brw_hal_name, RTLD_LAZY|RTLD_LOCAL);
-	brw_hal_tried = 1;
-    }
-    if (!brw_hal_lib)
-	return NULL;
-    return dlsym (brw_hal_lib, symbol);
-}
diff --git a/src/mesa/drivers/dri/i965/brw_hal.h b/src/mesa/drivers/dri/i965/brw_hal.h
deleted file mode 100644
index cd86e395b59..00000000000
--- a/src/mesa/drivers/dri/i965/brw_hal.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
-
-void *
-brw_hal_find_symbol (char *symbol);
diff --git a/src/mesa/drivers/dri/i965/brw_metaops.c b/src/mesa/drivers/dri/i965/brw_metaops.c
index 6e030f191ef..41bfa2e2567 100644
--- a/src/mesa/drivers/dri/i965/brw_metaops.c
+++ b/src/mesa/drivers/dri/i965/brw_metaops.c
@@ -32,15 +32,16 @@
  
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
 
 #include "shader/arbprogparse.h"
 
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
 #include "intel_regions.h"
+#include "intel_buffers.h"
 
 #include "brw_context.h"
 #include "brw_defines.h"
@@ -156,7 +157,7 @@ static const char *fp_tex_prog =
  *   FragmentProgram->_Current
  *   VertexProgram->_Enabled
  *   brw->vertex_program
- *   DrawBuffer->_ColorDrawBufferMask[0]
+ *   DrawBuffer->_ColorDrawBufferIndexes[0]
  * 
  *
  * More if drawpixels-through-texture is added.  
@@ -195,7 +196,7 @@ static void init_metaops_state( struct brw_context *brw )
 				  vp_prog, strlen(vp_prog),
 				  brw->metaops.vp);
 
-   brw->metaops.attribs.VertexProgram->Current = brw->metaops.vp;
+   brw->metaops.attribs.VertexProgram->_Current = brw->metaops.vp;
    brw->metaops.attribs.VertexProgram->_Enabled = GL_TRUE;
 
    brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp;
@@ -361,13 +362,21 @@ static void meta_draw_region( struct intel_context *intel,
    struct brw_context *brw = brw_context(&intel->ctx);
 
    if (!brw->metaops.saved_draw_region) {
-      brw->metaops.saved_draw_region = brw->state.draw_region;
+      brw->metaops.saved_draw_region = brw->state.draw_regions[0];
+      brw->metaops.saved_nr_draw_regions = brw->state.nr_draw_regions;
       brw->metaops.saved_depth_region = brw->state.depth_region;
    }
 
-   brw->state.draw_region = draw_region;
+   brw->state.draw_regions[0] = draw_region;
+   brw->state.nr_draw_regions = 1;
    brw->state.depth_region = depth_region;
 
+   if (intel->frame_buffer_texobj != NULL)
+      brw_FrameBufferTexDestroy(brw);
+
+   if (draw_region)
+       brw_FrameBufferTexInit(brw, draw_region);
+
    brw->state.dirty.mesa |= _NEW_BUFFERS;
 }
 
@@ -376,8 +385,7 @@ static void meta_draw_quad(struct intel_context *intel,
 			   GLfloat x0, GLfloat x1,
 			   GLfloat y0, GLfloat y1, 
 			   GLfloat z,
-			   GLubyte red, GLubyte green,
-			   GLubyte blue, GLubyte alpha,
+			   GLuint color,
 			   GLfloat s0, GLfloat s1,
 			   GLfloat t0, GLfloat t1)
 {
@@ -388,7 +396,6 @@ static void meta_draw_quad(struct intel_context *intel,
    struct gl_client_array *attribs[VERT_ATTRIB_MAX];
    struct _mesa_prim prim[1];
    GLfloat pos[4][3];
-   GLubyte color[4];
 
    ctx->Driver.BufferData(ctx,
 			  GL_ARRAY_BUFFER_ARB,
@@ -413,7 +420,6 @@ static void meta_draw_quad(struct intel_context *intel,
    pos[3][1] = y1;
    pos[3][2] = z;
 
-
    ctx->Driver.BufferSubData(ctx,
 			     GL_ARRAY_BUFFER_ARB,
 			     0,
@@ -421,16 +427,15 @@ static void meta_draw_quad(struct intel_context *intel,
 			     pos,
 			     brw->metaops.vbo);
 
-   color[0] = red;
-   color[1] = green;
-   color[2] = blue;
-   color[3] = alpha;
+   /* Convert incoming ARGB to required RGBA */
+   /* Note this color is stored as GL_UNSIGNED_BYTE */
+   color = (color & 0xff00ff00) | (((color >> 16) | (color << 16)) & 0xff00ff);
 
    ctx->Driver.BufferSubData(ctx,
 			     GL_ARRAY_BUFFER_ARB,
 			     sizeof(pos),
 			     sizeof(color),
-			     color,
+			     &color,
 			     brw->metaops.vbo);
 
    /* Ignoring texture coords. 
@@ -486,6 +491,7 @@ static void install_meta_state( struct intel_context *intel )
 {
    GLcontext *ctx = &intel->ctx;
    struct brw_context *brw = brw_context(ctx);
+   GLuint i;
 
    if (!brw->metaops.vbo) {
       init_metaops_state(brw);
@@ -495,12 +501,18 @@ static void install_meta_state( struct intel_context *intel )
    
    meta_no_texture(&brw->intel);
    meta_flat_shade(&brw->intel);
-   brw->metaops.restore_draw_mask = ctx->DrawBuffer->_ColorDrawBufferMask[0];
+   for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) {
+      brw->metaops.restore_draw_buffers[i]
+         = ctx->DrawBuffer->_ColorDrawBufferIndexes[i];
+   }
+   brw->metaops.restore_num_draw_buffers = ctx->DrawBuffer->_NumColorDrawBuffers;
+
    brw->metaops.restore_fp = ctx->FragmentProgram.Current;
 
    /* This works without adjusting refcounts.  Fix later? 
     */
-   brw->metaops.saved_draw_region = brw->state.draw_region;
+   brw->metaops.saved_draw_region = brw->state.draw_regions[0];
+   brw->metaops.saved_nr_draw_regions = brw->state.nr_draw_regions;
    brw->metaops.saved_depth_region = brw->state.depth_region;
    brw->metaops.active = 1;
    
@@ -511,13 +523,20 @@ static void leave_meta_state( struct intel_context *intel )
 {
    GLcontext *ctx = &intel->ctx;
    struct brw_context *brw = brw_context(ctx);
+   GLuint i;
 
    restore_attribs(brw);
 
-   ctx->DrawBuffer->_ColorDrawBufferMask[0] = brw->metaops.restore_draw_mask;
+   for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) {
+      ctx->DrawBuffer->_ColorDrawBufferIndexes[i]
+         = brw->metaops.restore_draw_buffers[i];
+   }
+   ctx->DrawBuffer->_NumColorDrawBuffers = brw->metaops.restore_num_draw_buffers;
+
    ctx->FragmentProgram.Current = brw->metaops.restore_fp;
 
-   brw->state.draw_region = brw->metaops.saved_draw_region;
+   brw->state.draw_regions[0] = brw->metaops.saved_draw_region;
+   brw->state.nr_draw_regions = brw->metaops.saved_nr_draw_regions;
    brw->state.depth_region = brw->metaops.saved_depth_region;
    brw->metaops.saved_draw_region = NULL;
    brw->metaops.saved_depth_region = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index d5779680ffc..627705fa9ba 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -68,148 +68,114 @@ const struct brw_tracked_state brw_blend_constant_color = {
       .brw = 0,
       .cache = 0
    },
-   .update = upload_blend_constant_color
+   .emit = upload_blend_constant_color
 };
 
-/***********************************************************************
- * Drawing rectangle -- Need for AUB file only.
- */
+/* Constant single cliprect for framebuffer object or DRI2 drawing */
 static void upload_drawing_rect(struct brw_context *brw)
 {
    struct intel_context *intel = &brw->intel;
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   struct brw_drawrect bdr;
-   int x1, y1;
-   int x2, y2;
+   GLcontext *ctx = &intel->ctx;
 
-   /* If there is a single cliprect, set it here.  Otherwise iterate
-    * over them in brw_draw_prim().
-    */
-   if (brw->intel.numClipRects > 1) 
-      return; 
- 
-   x1 = brw->intel.pClipRects[0].x1;
-   y1 = brw->intel.pClipRects[0].y1;
-   x2 = brw->intel.pClipRects[0].x2;
-   y2 = brw->intel.pClipRects[0].y2;
-	 
-   if (x1 < 0) x1 = 0;
-   if (y1 < 0) y1 = 0;
-   if (x2 > intel->intelScreen->width) x2 = intel->intelScreen->width;
-   if (y2 > intel->intelScreen->height) y2 = intel->intelScreen->height;
-
-   memset(&bdr, 0, sizeof(bdr));
-   bdr.header.opcode = CMD_DRAW_RECT;
-   bdr.header.length = sizeof(bdr)/4 - 2;
-   bdr.xmin = x1;
-   bdr.ymin = y1;
-   bdr.xmax = x2;
-   bdr.ymax = y2;
-   bdr.xorg = dPriv->x;
-   bdr.yorg = dPriv->y;
-
-   /* Can't use BRW_CACHED_BATCH_STRUCT because this is also emitted
-    * uncached in brw_draw.c:
-    */
-   BRW_BATCH_STRUCT(brw, &bdr);
+   if (!intel->constant_cliprect)
+      return;
+
+   BEGIN_BATCH(4, NO_LOOP_CLIPRECTS);
+   OUT_BATCH(_3DSTATE_DRAWRECT_INFO_I965);
+   OUT_BATCH(0); /* xmin, ymin */
+   OUT_BATCH(((ctx->DrawBuffer->Width - 1) & 0xffff) |
+	    ((ctx->DrawBuffer->Height - 1) << 16));
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state brw_drawing_rect = {
    .dirty = {
-      .mesa = _NEW_WINDOW_POS,
+      .mesa = _NEW_BUFFERS,
       .brw = 0,
       .cache = 0
    },
-   .update = upload_drawing_rect
+   .emit = upload_drawing_rect
 };
 
-/***********************************************************************
- * Binding table pointers
- */
+static void prepare_binding_table_pointers(struct brw_context *brw)
+{
+   brw_add_validated_bo(brw, brw->wm.bind_bo);
+}
 
+/**
+ * Upload the binding table pointers, which point each stage's array of surface
+ * state pointers.
+ *
+ * The binding table pointers are relative to the surface state base address,
+ * which is 0.
+ */
 static void upload_binding_table_pointers(struct brw_context *brw)
 {
-   struct brw_binding_table_pointers btp;
-   memset(&btp, 0, sizeof(btp));
-
-   /* The binding table has been emitted to the SS pool already, so we
-    * know what its offset is.  When the batch buffer is fired, the
-    * binding table and surface structs will get fixed up to point to
-    * where the textures actually landed, but that won't change the
-    * value of the offsets here:
-    */
-   btp.header.opcode = CMD_BINDING_TABLE_PTRS;
-   btp.header.length = sizeof(btp)/4 - 2;
-   btp.vs = 0;
-   btp.gs = 0;
-   btp.clp = 0;
-   btp.sf = 0;
-   btp.wm = brw->wm.bind_ss_offset;
-
-   BRW_CACHED_BATCH_STRUCT(brw, &btp);
+   struct intel_context *intel = &brw->intel;
+
+   BEGIN_BATCH(6, IGNORE_CLIPRECTS);
+   OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
+   OUT_BATCH(0); /* vs */
+   OUT_BATCH(0); /* gs */
+   OUT_BATCH(0); /* clip */
+   OUT_BATCH(0); /* sf */
+   OUT_RELOC(brw->wm.bind_bo,
+	     I915_GEM_DOMAIN_SAMPLER, 0,
+	     0);
+   ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state brw_binding_table_pointers = {
    .dirty = {
       .mesa = 0,
-      .brw = 0,
-      .cache = CACHE_NEW_SURF_BIND 
+      .brw = BRW_NEW_BATCH,
+      .cache = CACHE_NEW_SURF_BIND,
    },
-   .update = upload_binding_table_pointers
+   .prepare = prepare_binding_table_pointers,
+   .emit = upload_binding_table_pointers,
 };
 
 
-/***********************************************************************
- * Pipelined state pointers.  This is the key state packet from which
- * the hardware chases pointers to all the uploaded state in VRAM.
+/**
+ * Upload pointers to the per-stage state.
+ *
+ * The state pointers in this packet are all relative to the general state
+ * base address set by CMD_STATE_BASE_ADDRESS, which is 0.
  */
-   
 static void upload_pipelined_state_pointers(struct brw_context *brw )
 {
-   struct brw_pipelined_state_pointers psp;
-   memset(&psp, 0, sizeof(psp));
-
-   psp.header.opcode = CMD_PIPELINED_STATE_POINTERS;
-   psp.header.length = sizeof(psp)/4 - 2;
-
-   psp.vs.offset = brw->vs.state_gs_offset >> 5;
-   psp.sf.offset = brw->sf.state_gs_offset >> 5;
-   psp.wm.offset = brw->wm.state_gs_offset >> 5;
-   psp.cc.offset = brw->cc.state_gs_offset >> 5;
-
-   /* GS gets turned on and off regularly.  Need to re-emit URB fence
-    * after this occurs.  
-    */
-   if (brw->gs.prog_active) {
-      psp.gs.offset = brw->gs.state_gs_offset >> 5;
-      psp.gs.enable = 1;
-   }
+   struct intel_context *intel = &brw->intel;
 
-   if (!brw->metaops.active) {
-      psp.clp.offset = brw->clip.state_gs_offset >> 5;
-      psp.clp.enable = 1;
-   }
+   BEGIN_BATCH(7, IGNORE_CLIPRECTS);
+   OUT_BATCH(CMD_PIPELINED_STATE_POINTERS << 16 | (7 - 2));
+   OUT_RELOC(brw->vs.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+   if (brw->gs.prog_active)
+      OUT_RELOC(brw->gs.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+   else
+      OUT_BATCH(0);
+   if (!brw->metaops.active)
+      OUT_RELOC(brw->clip.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+   else
+      OUT_BATCH(0);
+   OUT_RELOC(brw->sf.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+   OUT_RELOC(brw->wm.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+   OUT_RELOC(brw->cc.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+   ADVANCE_BATCH();
+
+   brw->state.dirty.brw |= BRW_NEW_PSP;
+}
 
 
-   if (BRW_CACHED_BATCH_STRUCT(brw, &psp))
-      brw->state.dirty.brw |= BRW_NEW_PSP;
+static void prepare_psp_urb_cbs(struct brw_context *brw)
+{
+   brw_add_validated_bo(brw, brw->vs.state_bo);
+   brw_add_validated_bo(brw, brw->gs.state_bo);
+   brw_add_validated_bo(brw, brw->clip.state_bo);
+   brw_add_validated_bo(brw, brw->wm.state_bo);
+   brw_add_validated_bo(brw, brw->cc.state_bo);
 }
 
-const struct brw_tracked_state brw_pipelined_state_pointers = {
-   .dirty = {
-      .mesa = 0,
-      .brw = BRW_NEW_METAOPS,
-      .cache = (CACHE_NEW_VS_UNIT | 
-		CACHE_NEW_GS_UNIT | 
-		CACHE_NEW_GS_PROG | 
-		CACHE_NEW_CLIP_UNIT | 
-		CACHE_NEW_SF_UNIT | 
-		CACHE_NEW_WM_UNIT | 
-		CACHE_NEW_CC_UNIT)
-   },
-   .update = upload_pipelined_state_pointers
-};
-
 static void upload_psp_urb_cbs(struct brw_context *brw )
 {
    upload_pipelined_state_pointers(brw);
@@ -217,11 +183,10 @@ static void upload_psp_urb_cbs(struct brw_context *brw )
    brw_upload_constant_buffer_state(brw);
 }
 
-
 const struct brw_tracked_state brw_psp_urb_cbs = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_URB_FENCE | BRW_NEW_METAOPS,
+      .brw = BRW_NEW_URB_FENCE | BRW_NEW_METAOPS | BRW_NEW_BATCH,
       .cache = (CACHE_NEW_VS_UNIT | 
 		CACHE_NEW_GS_UNIT | 
 		CACHE_NEW_GS_PROG | 
@@ -230,74 +195,85 @@ const struct brw_tracked_state brw_psp_urb_cbs = {
 		CACHE_NEW_WM_UNIT | 
 		CACHE_NEW_CC_UNIT)
    },
-   .update = upload_psp_urb_cbs
+   .prepare = prepare_psp_urb_cbs,
+   .emit = upload_psp_urb_cbs,
 };
 
+static void prepare_depthbuffer(struct brw_context *brw)
+{
+   struct intel_region *region = brw->state.depth_region;
 
+   if (region != NULL)
+      brw_add_validated_bo(brw, region->buffer);
+}
 
-
-/***********************************************************************
- * Depthbuffer - currently constant, but rotation would change that.
- */
-
-static void upload_depthbuffer(struct brw_context *brw)
+static void emit_depthbuffer(struct brw_context *brw)
 {
-   /* 0x79050003  Depth Buffer */
    struct intel_context *intel = &brw->intel;
    struct intel_region *region = brw->state.depth_region;
-   struct brw_depthbuffer bd;
-   memset(&bd, 0, sizeof(bd));
-
-   bd.header.bits.opcode = CMD_DEPTH_BUFFER;
-   bd.header.bits.length = sizeof(bd)/4-2;
-   bd.dword1.bits.pitch = (region->pitch * region->cpp) - 1;
-   
-   switch (region->cpp) {
-   case 2:
-      bd.dword1.bits.format = BRW_DEPTHFORMAT_D16_UNORM;
-      break;
-   case 4:
-      if (intel->depth_buffer_is_float)
-	 bd.dword1.bits.format = BRW_DEPTHFORMAT_D32_FLOAT;
-      else
-	 bd.dword1.bits.format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
-      break;
-   default:
-      assert(0);
-      return;
+   unsigned int len = BRW_IS_G4X(brw) ? 6 : 5;
+
+   if (region == NULL) {
+      BEGIN_BATCH(len, IGNORE_CLIPRECTS);
+      OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
+      OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
+		(BRW_SURFACE_NULL << 29));
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+      OUT_BATCH(0);
+
+      if (BRW_IS_G4X(brw))
+         OUT_BATCH(0);
+
+      ADVANCE_BATCH();
+   } else {
+      unsigned int format;
+
+      switch (region->cpp) {
+      case 2:
+	 format = BRW_DEPTHFORMAT_D16_UNORM;
+	 break;
+      case 4:
+	 if (intel->depth_buffer_is_float)
+	    format = BRW_DEPTHFORMAT_D32_FLOAT;
+	 else
+	    format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
+	 break;
+      default:
+	 assert(0);
+	 return;
+      }
+
+      BEGIN_BATCH(len, IGNORE_CLIPRECTS);
+      OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
+      OUT_BATCH(((region->pitch * region->cpp) - 1) |
+		(format << 18) |
+		(BRW_TILEWALK_YMAJOR << 26) |
+		((region->tiling != I915_TILING_NONE) << 27) |
+		(BRW_SURFACE_2D << 29));
+      OUT_RELOC(region->buffer,
+		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+		0);
+      OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
+		((region->pitch - 1) << 6) |
+		((region->height - 1) << 19));
+      OUT_BATCH(0);
+
+      if (BRW_IS_G4X(brw))
+         OUT_BATCH(0);
+
+      ADVANCE_BATCH();
    }
-
-   bd.dword1.bits.depth_offset_disable = 0; /* coordinate offset */
-
-   /* The depthbuffer can only use YMAJOR tiling...  This is a bit of
-    * a shame as it clashes with the 2d blitter which only supports
-    * XMAJOR tiling...  
-    */
-   bd.dword1.bits.tile_walk = BRW_TILEWALK_YMAJOR;
-   bd.dword1.bits.tiled_surface = intel->depth_region->tiled;
-   bd.dword1.bits.surface_type = BRW_SURFACE_2D;
-
-   /* BRW_NEW_LOCK */
-   bd.dword2_base_addr = bmBufferOffset(intel, region->buffer);    
-
-   bd.dword3.bits.mipmap_layout = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
-   bd.dword3.bits.lod = 0;
-   bd.dword3.bits.width = region->pitch - 1; /* XXX: width ? */
-   bd.dword3.bits.height = region->height - 1;
-
-   bd.dword4.bits.min_array_element = 0;
-   bd.dword4.bits.depth = 0;
-      
-   BRW_CACHED_BATCH_STRUCT(brw, &bd);
 }
 
 const struct brw_tracked_state brw_depthbuffer = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_CONTEXT | BRW_NEW_LOCK,
-      .cache = 0
+      .brw = BRW_NEW_DEPTH_BUFFER | BRW_NEW_BATCH,
+      .cache = 0,
    },
-   .update = upload_depthbuffer
+   .prepare = prepare_depthbuffer,
+   .emit = emit_depthbuffer,
 };
 
 
@@ -327,7 +303,7 @@ const struct brw_tracked_state brw_polygon_stipple = {
       .brw = 0,
       .cache = 0
    },
-   .update = upload_polygon_stipple
+   .emit = upload_polygon_stipple
 };
 
 
@@ -350,13 +326,42 @@ static void upload_polygon_stipple_offset(struct brw_context *brw)
    BRW_CACHED_BATCH_STRUCT(brw, &bpso);
 }
 
+#define _NEW_WINDOW_POS 0x40000000
+
 const struct brw_tracked_state brw_polygon_stipple_offset = {
    .dirty = {
       .mesa = _NEW_WINDOW_POS,
       .brw = 0,
       .cache = 0
    },
-   .update = upload_polygon_stipple_offset
+   .emit = upload_polygon_stipple_offset
+};
+
+/**********************************************************************
+ * AA Line parameters
+ */
+static void upload_aa_line_parameters(struct brw_context *brw)
+{
+   struct brw_aa_line_parameters balp;
+   
+   if (!BRW_IS_G4X(brw))
+      return;
+
+   /* use legacy aa line coverage computation */
+   memset(&balp, 0, sizeof(balp));
+   balp.header.opcode = CMD_AA_LINE_PARAMETERS;
+   balp.header.length = sizeof(balp) / 4 - 2;
+   
+   BRW_CACHED_BATCH_STRUCT(brw, &balp);
+}
+
+const struct brw_tracked_state brw_aa_line_parameters = {
+   .dirty = {
+      .mesa = 0,
+      .brw = BRW_NEW_CONTEXT,
+      .cache = 0
+   },
+   .emit = upload_aa_line_parameters
 };
 
 /***********************************************************************
@@ -391,41 +396,7 @@ const struct brw_tracked_state brw_line_stipple = {
       .brw = 0,
       .cache = 0
    },
-   .update = upload_line_stipple
-};
-
-
-
-/***********************************************************************
- * Misc constant state packets
- */
-
-static void upload_pipe_control(struct brw_context *brw)
-{
-   struct brw_pipe_control pc;
-
-   return;
-
-   memset(&pc, 0, sizeof(pc));
-
-   pc.header.opcode = CMD_PIPE_CONTROL;
-   pc.header.length = sizeof(pc)/4 - 2;
-   pc.header.post_sync_operation = PIPE_CONTROL_NOWRITE;
-
-   pc.header.instruction_state_cache_flush_enable = 1;
-
-   pc.bits1.dest_addr_type = PIPE_CONTROL_GTTWRITE_GLOBAL;
-
-   BRW_BATCH_STRUCT(brw, &pc);
-}
-
-const struct brw_tracked_state brw_pipe_control = {
-   .dirty = {
-      .mesa = 0,
-      .brw = BRW_NEW_CONTEXT,
-      .cache = 0
-   },
-   .update = upload_pipe_control
+   .emit = upload_line_stipple
 };
 
 
@@ -441,7 +412,7 @@ static void upload_invarient_state( struct brw_context *brw )
       struct brw_pipeline_select ps;
 
       memset(&ps, 0, sizeof(ps));
-      ps.header.opcode = CMD_PIPELINE_SELECT;
+      ps.header.opcode = CMD_PIPELINE_SELECT(brw);
       ps.header.pipeline_select = 0;
       BRW_BATCH_STRUCT(brw, &ps);
    }
@@ -477,7 +448,7 @@ static void upload_invarient_state( struct brw_context *brw )
       struct brw_vf_statistics vfs;
       memset(&vfs, 0, sizeof(vfs));
 
-      vfs.opcode = CMD_VF_STATISTICS;
+      vfs.opcode = CMD_VF_STATISTICS(brw);
       if (INTEL_DEBUG & DEBUG_STATS)
 	 vfs.statistics_enable = 1; 
 
@@ -491,43 +462,39 @@ const struct brw_tracked_state brw_invarient_state = {
       .brw = BRW_NEW_CONTEXT,
       .cache = 0
    },
-   .update = upload_invarient_state
+   .emit = upload_invarient_state
 };
 
-
-/* State pool addresses:
+/**
+ * Define the base addresses which some state is referenced from.
+ *
+ * This allows us to avoid having to emit relocations in many places for
+ * cached state, and instead emit pointers inside of large, mostly-static
+ * state pools.  This comes at the expense of memory, and more expensive cache
+ * misses.
  */
 static void upload_state_base_address( struct brw_context *brw )
 {
    struct intel_context *intel = &brw->intel;
-   struct brw_state_base_address sba;
-      
-   memset(&sba, 0, sizeof(sba));
-
-   sba.header.opcode = CMD_STATE_BASE_ADDRESS;
-   sba.header.length = 0x4;
-
-   /* BRW_NEW_LOCK */
-   sba.bits0.general_state_address = bmBufferOffset(intel, brw->pool[BRW_GS_POOL].buffer) >> 5;
-   sba.bits0.modify_enable = 1;
 
-   /* BRW_NEW_LOCK */
-   sba.bits1.surface_state_address = bmBufferOffset(intel, brw->pool[BRW_SS_POOL].buffer) >> 5;
-   sba.bits1.modify_enable = 1;
-
-   sba.bits2.modify_enable = 1;
-   sba.bits3.modify_enable = 1;
-   sba.bits4.modify_enable = 1;
-
-   BRW_CACHED_BATCH_STRUCT(brw, &sba);
+   /* Output the structure (brw_state_base_address) directly to the
+    * batchbuffer, so we can emit relocations inline.
+    */
+   BEGIN_BATCH(6, IGNORE_CLIPRECTS);
+   OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (6 - 2));
+   OUT_BATCH(1); /* General state base address */
+   OUT_BATCH(1); /* Surface state base address */
+   OUT_BATCH(1); /* Indirect object base address */
+   OUT_BATCH(1); /* General state upper bound */
+   OUT_BATCH(1); /* Indirect object upper bound */
+   ADVANCE_BATCH();
 }
 
-
 const struct brw_tracked_state brw_state_base_address = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_CONTEXT | BRW_NEW_LOCK,
-      .cache = 0
+      .brw = BRW_NEW_CONTEXT,
+      .cache = 0,
    },
-   .update = upload_state_base_address
+   .emit = upload_state_base_address
 };
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 752fe49bcbf..a18dee85e80 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -29,15 +29,15 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
   
+#include "main/imports.h"
+#include "main/enums.h"
 #include "shader/prog_parameter.h"
-#include "brw_context.h"
-#include "brw_aub.h"
-#include "brw_util.h"
-#include "program.h"
-#include "imports.h"
-#include "enums.h"
+#include "shader/program.h"
+#include "shader/programopt.h"
 #include "tnl/tnl.h"
 
+#include "brw_context.h"
+#include "brw_util.h"
 
 static void brwBindProgram( GLcontext *ctx,
 			    GLenum target, 
@@ -117,7 +117,6 @@ static void brwProgramStringNotify( GLcontext *ctx,
       if (p == fp)
 	 brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
       p->id = brw->program_id++;      
-      p->param_state = p->program.Base.Parameters->StateFlags;
    }
    else if (target == GL_VERTEX_PROGRAM_ARB) {
       struct brw_context *brw = brw_context(ctx);
@@ -125,8 +124,10 @@ static void brwProgramStringNotify( GLcontext *ctx,
       struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program;
       if (p == vp)
 	 brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
+      if (p->program.IsPositionInvariant) {
+	 _mesa_insert_mvp_code(ctx, &p->program);
+      }
       p->id = brw->program_id++;      
-      p->param_state = p->program.Base.Parameters->StateFlags;
 
       /* Also tell tnl about it:
        */
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
new file mode 100644
index 00000000000..cb9169e2eef
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -0,0 +1,259 @@
+/*
+ * Copyright © 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+/** @file support for ARB_query_object
+ *
+ * ARB_query_object is implemented by using the PIPE_CONTROL command to stall
+ * execution on the completion of previous depth tests, and write the
+ * current PS_DEPTH_COUNT to a buffer object.
+ *
+ * We use before and after counts when drawing during a query so that
+ * we don't pick up other clients' query data in ours.  To reduce overhead,
+ * a single BO is used to record the query data for all active queries at
+ * once.  This also gives us a simple bound on how much batchbuffer space is
+ * required for handling queries, so that we can be sure that we won't
+ * have to emit a batchbuffer without getting the ending PS_DEPTH_COUNT.
+ */
+#include "main/simple_list.h"
+#include "main/imports.h"
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "intel_batchbuffer.h"
+#include "intel_reg.h"
+
+/** Waits on the query object's BO and totals the results for this query */
+static void
+brw_queryobj_get_results(struct brw_query_object *query)
+{
+   int i;
+   uint64_t *results;
+
+   if (query->bo == NULL)
+      return;
+
+   /* Map and count the pixels from the current query BO */
+   dri_bo_map(query->bo, GL_FALSE);
+   results = query->bo->virtual;
+   for (i = query->first_index; i <= query->last_index; i++) {
+      query->Base.Result += results[i * 2 + 1] - results[i * 2];
+   }
+   dri_bo_unmap(query->bo);
+
+   dri_bo_unreference(query->bo);
+   query->bo = NULL;
+}
+
+static struct gl_query_object *
+brw_new_query_object(GLcontext *ctx, GLuint id)
+{
+   struct brw_query_object *query;
+
+   query = _mesa_calloc(sizeof(struct brw_query_object));
+
+   query->Base.Id = id;
+   query->Base.Result = 0;
+   query->Base.Active = GL_FALSE;
+   query->Base.Ready = GL_TRUE;
+
+   return &query->Base;
+}
+
+static void
+brw_delete_query(GLcontext *ctx, struct gl_query_object *q)
+{
+   struct brw_query_object *query = (struct brw_query_object *)q;
+
+   dri_bo_unreference(query->bo);
+   _mesa_free(query);
+}
+
+static void
+brw_begin_query(GLcontext *ctx, struct gl_query_object *q)
+{
+   struct brw_context *brw = brw_context(ctx);
+   struct intel_context *intel = intel_context(ctx);
+   struct brw_query_object *query = (struct brw_query_object *)q;
+
+   /* Reset our driver's tracking of query state. */
+   dri_bo_unreference(query->bo);
+   query->bo = NULL;
+   query->first_index = -1;
+   query->last_index = -1;
+
+   insert_at_head(&brw->query.active_head, query);
+   intel->stats_wm++;
+}
+
+/**
+ * Begin the ARB_occlusion_query query on a query object.
+ */
+static void
+brw_end_query(GLcontext *ctx, struct gl_query_object *q)
+{
+   struct brw_context *brw = brw_context(ctx);
+   struct intel_context *intel = intel_context(ctx);
+   struct brw_query_object *query = (struct brw_query_object *)q;
+
+   /* Flush the batchbuffer in case it has writes to our query BO.
+    * Have later queries write to a new query BO so that further rendering
+    * doesn't delay the collection of our results.
+    */
+   if (query->bo) {
+      brw_emit_query_end(brw);
+      intel_batchbuffer_flush(intel->batch);
+
+      dri_bo_unreference(brw->query.bo);
+      brw->query.bo = NULL;
+   }
+
+   remove_from_list(query);
+
+   intel->stats_wm--;
+}
+
+static void brw_wait_query(GLcontext *ctx, struct gl_query_object *q)
+{
+   struct brw_query_object *query = (struct brw_query_object *)q;
+
+   brw_queryobj_get_results(query);
+   query->Base.Ready = GL_TRUE;
+}
+
+static void brw_check_query(GLcontext *ctx, struct gl_query_object *q)
+{
+   /* XXX: Need to expose dri_bo_is_idle from bufmgr. */
+#if 0
+   struct brw_query_object *query = (struct brw_query_object *)q;
+
+   if (dri_bo_is_idle(query->bo)) {
+      brw_queryobj_get_results(query);
+      query->Base.Ready = GL_TRUE;
+   }
+#else
+   brw_wait_query(ctx, q);
+#endif
+}
+
+/** Called to set up the query BO and account for its aperture space */
+void
+brw_prepare_query_begin(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+
+   /* Skip if we're not doing any queries. */
+   if (is_empty_list(&brw->query.active_head))
+      return;
+
+   /* Get a new query BO if we're going to need it. */
+   if (brw->query.bo == NULL ||
+       brw->query.index * 2 + 1 >= 4096 / sizeof(uint64_t)) {
+      dri_bo_unreference(brw->query.bo);
+      brw->query.bo = NULL;
+
+      brw->query.bo = dri_bo_alloc(intel->bufmgr, "query", 4096, 1);
+      brw->query.index = 0;
+   }
+
+   brw_add_validated_bo(brw, brw->query.bo);
+}
+
+/** Called just before primitive drawing to get a beginning PS_DEPTH_COUNT. */
+void
+brw_emit_query_begin(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+   struct brw_query_object *query;
+
+   /* Skip if we're not doing any queries, or we've emitted the start. */
+   if (brw->query.active || is_empty_list(&brw->query.active_head))
+      return;
+
+   BEGIN_BATCH(4, IGNORE_CLIPRECTS);
+   OUT_BATCH(_3DSTATE_PIPE_CONTROL |
+	     PIPE_CONTROL_DEPTH_STALL |
+	     PIPE_CONTROL_WRITE_DEPTH_COUNT);
+   /* This object could be mapped cacheable, but we don't have an exposed
+    * mechanism to support that.  Since it's going uncached, tell GEM that
+    * we're writing to it.  The usual clflush should be all that's required
+    * to pick up the results.
+    */
+   OUT_RELOC(brw->query.bo,
+	     I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+	     PIPE_CONTROL_GLOBAL_GTT_WRITE |
+	     ((brw->query.index * 2) * sizeof(uint64_t)));
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+
+   foreach(query, &brw->query.active_head) {
+      if (query->bo != brw->query.bo) {
+	 if (query->bo != NULL)
+	    brw_queryobj_get_results(query);
+	 dri_bo_reference(brw->query.bo);
+	 query->bo = brw->query.bo;
+	 query->first_index = brw->query.index;
+      }
+      query->last_index = brw->query.index;
+   }
+   brw->query.active = GL_TRUE;
+}
+
+/** Called at batchbuffer flush to get an ending PS_DEPTH_COUNT */
+void
+brw_emit_query_end(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+
+   if (!brw->query.active)
+      return;
+
+   BEGIN_BATCH(4, IGNORE_CLIPRECTS);
+   OUT_BATCH(_3DSTATE_PIPE_CONTROL |
+	     PIPE_CONTROL_DEPTH_STALL |
+	     PIPE_CONTROL_WRITE_DEPTH_COUNT);
+   OUT_RELOC(brw->query.bo,
+	     I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+	     PIPE_CONTROL_GLOBAL_GTT_WRITE |
+	     ((brw->query.index * 2 + 1) * sizeof(uint64_t)));
+   OUT_BATCH(0);
+   OUT_BATCH(0);
+   ADVANCE_BATCH();
+
+   brw->query.active = GL_FALSE;
+   brw->query.index++;
+}
+
+void brw_init_queryobj_functions(struct dd_function_table *functions)
+{
+   functions->NewQueryObject = brw_new_query_object;
+   functions->DeleteQuery = brw_delete_query;
+   functions->BeginQuery = brw_begin_query;
+   functions->EndQuery = brw_end_query;
+   functions->CheckQuery = brw_check_query;
+   functions->WaitQuery = brw_wait_query;
+}
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c
index d5175399d6c..9dce6cd8e6c 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.c
+++ b/src/mesa/drivers/dri/i965/brw_sf.c
@@ -30,9 +30,9 @@
   */
   
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "intel_batchbuffer.h"
 
@@ -43,8 +43,6 @@
 #include "brw_sf.h"
 #include "brw_state.h"
 
-#define DO_SETUP_BITS ((1<<FRAG_ATTRIB_MAX)-1)
-
 static void compile_sf_prog( struct brw_context *brw,
 			     struct brw_sf_prog_key *key )
 {
@@ -57,7 +55,7 @@ static void compile_sf_prog( struct brw_context *brw,
 
    /* Begin the compilation:
     */
-   brw_init_compile(&c.func);
+   brw_init_compile(brw, &c.func);
 
    c.key = *key;
    c.nr_attrs = brw_count_bits(c.key.attrs);
@@ -74,6 +72,11 @@ static void compile_sf_prog( struct brw_context *brw,
       if (c.key.attrs & (1<<i)) {
 	 c.attr_to_idx[i] = idx;
 	 c.idx_to_attr[idx] = i;
+	 if (i >= VERT_RESULT_TEX0 && i <= VERT_RESULT_TEX7) {
+		 c.point_attrs[i].CoordReplace = 
+			brw->attribs.Point->CoordReplace[i - VERT_RESULT_TEX0];
+	 } else
+		 c.point_attrs[i].CoordReplace = GL_FALSE;
 	 idx++;
       }
    
@@ -82,15 +85,18 @@ static void compile_sf_prog( struct brw_context *brw,
    switch (key->primitive) {
    case SF_TRIANGLES:
       c.nr_verts = 3;
-      brw_emit_tri_setup( &c );
+      brw_emit_tri_setup( &c, GL_TRUE );
       break;
    case SF_LINES:
       c.nr_verts = 2;
-      brw_emit_line_setup( &c );
+      brw_emit_line_setup( &c, GL_TRUE );
       break;
    case SF_POINTS:
       c.nr_verts = 1;
-      brw_emit_point_setup( &c );
+      if (key->do_point_sprite)
+	  brw_emit_point_sprite_setup( &c, GL_TRUE );
+      else
+	  brw_emit_point_setup( &c, GL_TRUE );
       break;
    case SF_UNFILLED_TRIS:
       c.nr_verts = 3;
@@ -108,29 +114,18 @@ static void compile_sf_prog( struct brw_context *brw,
 
    /* Upload
     */
-   brw->sf.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_SF_PROG],
-					      &c.key,
-					      sizeof(c.key),
-					      program,
-					      program_size,
-					      &c.prog_data,
-					      &brw->sf.prog_data );
+   dri_bo_unreference(brw->sf.prog_bo);
+   brw->sf.prog_bo = brw_upload_cache( &brw->cache, BRW_SF_PROG,
+				       &c.key, sizeof(c.key),
+				       NULL, 0,
+				       program, program_size,
+				       &c.prog_data,
+				       &brw->sf.prog_data );
 }
 
-
-static GLboolean search_cache( struct brw_context *brw, 
-			       struct brw_sf_prog_key *key )
-{
-   return brw_search_cache(&brw->cache[BRW_SF_PROG], 
-			   key, sizeof(*key),
-			   &brw->sf.prog_data,
-			   &brw->sf.prog_gs_offset);
-}
-
-
 /* Calculate interpolants for triangle and line rasterization.
  */
-static void upload_sf_prog( struct brw_context *brw )
+static void upload_sf_prog(struct brw_context *brw)
 {
    struct brw_sf_prog_key key;
 
@@ -162,7 +157,8 @@ static void upload_sf_prog( struct brw_context *brw )
       break;
    }
 
-
+   key.do_point_sprite = brw->attribs.Point->PointSprite;
+   key.SpriteOrigin = brw->attribs.Point->SpriteOrigin;
    /* _NEW_LIGHT */
    key.do_flat_shading = (brw->attribs.Light->ShadeModel == GL_FLAT);
    key.do_twoside_color = (brw->attribs.Light->Enabled && brw->attribs.Light->Model.TwoSide);
@@ -171,18 +167,22 @@ static void upload_sf_prog( struct brw_context *brw )
    if (key.do_twoside_color)
       key.frontface_ccw = (brw->attribs.Polygon->FrontFace == GL_CCW);
 
-
-   if (!search_cache(brw, &key))
+   dri_bo_unreference(brw->sf.prog_bo);
+   brw->sf.prog_bo = brw_search_cache(&brw->cache, BRW_SF_PROG,
+				      &key, sizeof(key),
+				      NULL, 0,
+				      &brw->sf.prog_data);
+   if (brw->sf.prog_bo == NULL)
       compile_sf_prog( brw, &key );
 }
 
 
 const struct brw_tracked_state brw_sf_prog = {
    .dirty = {
-      .mesa  = (_NEW_LIGHT|_NEW_POLYGON),
+      .mesa  = (_NEW_LIGHT|_NEW_POLYGON|_NEW_POINT),
       .brw   = (BRW_NEW_REDUCED_PRIMITIVE),
       .cache = CACHE_NEW_VS_PROG
    },
-   .update = upload_sf_prog
+   .prepare = upload_sf_prog
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_sf.h b/src/mesa/drivers/dri/i965/brw_sf.h
index fb72b84ba8a..1c0fb70fe06 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.h
+++ b/src/mesa/drivers/dri/i965/brw_sf.h
@@ -34,9 +34,9 @@
 #define BRW_SF_H
 
 
+#include "shader/program.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "program.h"
 
 
 #define SF_POINTS    0
@@ -45,14 +45,19 @@
 #define SF_UNFILLED_TRIS   3
 
 struct brw_sf_prog_key {
+   GLuint attrs:32;
    GLuint primitive:2;
    GLuint do_twoside_color:1;
    GLuint do_flat_shading:1;
-   GLuint attrs:16;
    GLuint frontface_ccw:1;
-   GLuint pad:11;
+   GLuint do_point_sprite:1;
+   GLuint pad:10;
+   GLenum SpriteOrigin;
 };
 
+struct brw_sf_point_tex {
+	GLboolean CoordReplace;	
+};
 
 struct brw_sf_compile {
    struct brw_compile func;
@@ -94,12 +99,14 @@ struct brw_sf_compile {
 
    GLubyte attr_to_idx[VERT_RESULT_MAX];   
    GLubyte idx_to_attr[VERT_RESULT_MAX];   
+   struct brw_sf_point_tex point_attrs[VERT_RESULT_MAX];
 };
 
  
-void brw_emit_tri_setup( struct brw_sf_compile *c );
-void brw_emit_line_setup( struct brw_sf_compile *c );
-void brw_emit_point_setup( struct brw_sf_compile *c );
+void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate );
+void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate );
+void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate );
+void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate );
 void brw_emit_anyprim_setup( struct brw_sf_compile *c );
 
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index cbaf018c44a..ffdb0ae6df8 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -30,9 +30,9 @@
   */
    
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 
 #include "intel_batchbuffer.h"
 
@@ -59,6 +59,35 @@ static GLboolean have_attr(struct brw_sf_compile *c,
    return (c->key.attrs & (1<<attr)) ? 1 : 0;
 }
 
+/**
+ * Sets VERT_RESULT_FOGC.Y  for gl_FrontFacing
+ *
+ * This is currently executed if the fragment program uses VERT_RESULT_FOGC
+ * at all, but this could be eliminated with a scan of the FP contents.
+ */
+static void
+do_front_facing( struct brw_sf_compile *c )
+{
+   struct brw_compile *p = &c->func; 
+   int i;
+
+   if (!have_attr(c, VERT_RESULT_FOGC))
+      return;
+
+   brw_push_insn_state(p);
+   brw_CMP(p, brw_null_reg(), 
+        c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L,
+        c->det, brw_imm_f(0));
+   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+   for (i = 0; i < 3; i++) {
+       struct brw_reg fogc = get_vert_attr(c, c->vert[i],FRAG_ATTRIB_FOGC);
+       brw_MOV(p, get_element(fogc, 1), brw_imm_f(0));
+       brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+       brw_MOV(p, get_element(fogc, 1), brw_imm_f(1));
+       brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+   }
+   brw_pop_insn_state(p);
+}
 
 			 
 /*********************************************************************** 
@@ -343,15 +372,19 @@ static GLboolean calculate_masks( struct brw_sf_compile *c,
 
 
 
-void brw_emit_tri_setup( struct brw_sf_compile *c )
+void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate)
 {
    struct brw_compile *p = &c->func;
    GLuint i;
 
    c->nr_verts = 3;
-   alloc_regs(c);
+
+   if (allocate)
+      alloc_regs(c);
+
    invert_det(c);
    copy_z_inv_w(c);
+   do_front_facing(c);
 
    if (c->key.do_twoside_color) 
       do_twoside_color(c);
@@ -428,14 +461,17 @@ void brw_emit_tri_setup( struct brw_sf_compile *c )
 
 
 
-void brw_emit_line_setup( struct brw_sf_compile *c )
+void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate)
 {
    struct brw_compile *p = &c->func;
    GLuint i;
 
 
    c->nr_verts = 2;
-   alloc_regs(c);
+
+   if (allocate)
+      alloc_regs(c);
+
    invert_det(c);
    copy_z_inv_w(c);
 
@@ -497,17 +533,103 @@ void brw_emit_line_setup( struct brw_sf_compile *c )
    } 
 }
 
+void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate)
+{
+   struct brw_compile *p = &c->func;
+   GLuint i;
+
+   c->nr_verts = 1;
+
+   if (allocate)
+      alloc_regs(c);
+
+   copy_z_inv_w(c);
+   for (i = 0; i < c->nr_setup_regs; i++)
+   {
+      struct brw_sf_point_tex *tex = &c->point_attrs[c->idx_to_attr[2*i]];
+      struct brw_reg a0 = offset(c->vert[0], i);
+      GLushort pc, pc_persp, pc_linear;
+      GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear);
+            
+      if (pc_persp)
+      {				
+	  if (!tex->CoordReplace) {
+	      brw_set_predicate_control_flag_value(p, pc_persp);
+	      brw_MUL(p, a0, a0, c->inv_w[0]);
+	  }
+      }
+
+      if (tex->CoordReplace) {
+	  /* Caculate 1.0/PointWidth */
+	  brw_math(&c->func,
+		  c->tmp,
+		  BRW_MATH_FUNCTION_INV,
+		  BRW_MATH_SATURATE_NONE,
+		  0,
+		  c->dx0,
+		  BRW_MATH_DATA_SCALAR,
+		  BRW_MATH_PRECISION_FULL);
+
+	  if (c->key.SpriteOrigin == GL_LOWER_LEFT) {
+	   	brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]);
+		brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0));
+	  	brw_MUL(p, c->m2Cy, c->tmp, negate(c->inv_w[0]));
+		brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0));
+	  } else {
+	   	brw_MUL(p, c->m1Cx, c->tmp, c->inv_w[0]);
+		brw_MOV(p, vec1(suboffset(c->m1Cx, 1)), brw_imm_f(0.0));
+	  	brw_MUL(p, c->m2Cy, c->tmp, c->inv_w[0]);
+		brw_MOV(p, vec1(suboffset(c->m2Cy, 0)), brw_imm_f(0.0));
+	  }
+      } else {
+	  brw_MOV(p, c->m1Cx, brw_imm_ud(0));
+	  brw_MOV(p, c->m2Cy, brw_imm_ud(0));
+      }
+
+      {
+	 brw_set_predicate_control_flag_value(p, pc); 
+	 if (tex->CoordReplace) {
+	     if (c->key.SpriteOrigin == GL_LOWER_LEFT) {
+		 brw_MUL(p, c->m3C0, c->inv_w[0], brw_imm_f(1.0));
+		 brw_MOV(p, vec1(suboffset(c->m3C0, 0)), brw_imm_f(0.0));
+	     }
+	     else
+		 brw_MOV(p, c->m3C0, brw_imm_f(0.0));
+	 } else {
+	 	brw_MOV(p, c->m3C0, a0); /* constant value */
+	 }
+
+	 /* Copy m0..m3 to URB. 
+	  */
+	 brw_urb_WRITE(p, 
+		       brw_null_reg(),
+		       0,
+		       brw_vec8_grf(0, 0),
+		       0, 	/* allocate */
+		       1,	/* used */
+		       4, 	/* msg len */
+		       0,	/* response len */
+		       last, 	/* eot */
+		       last, 	/* writes complete */
+		       i*4,	/* urb destination offset */
+		       BRW_URB_SWIZZLE_TRANSPOSE);
+      }
+   }
+}
 
 /* Points setup - several simplifications as all attributes are
  * constant across the face of the point (point sprites excluded!)
  */
-void brw_emit_point_setup( struct brw_sf_compile *c )
+void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate)
 {
    struct brw_compile *p = &c->func;
    GLuint i;
 
    c->nr_verts = 1;
-   alloc_regs(c);
+   
+   if (allocate)
+      alloc_regs(c);
+
    copy_z_inv_w(c);
 
    brw_MOV(p, c->m1Cx, brw_imm_ud(0)); /* zero - move out of loop */
@@ -561,10 +683,14 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
    struct brw_compile *p = &c->func;
    struct brw_reg ip = brw_ip_reg();
    struct brw_reg payload_prim = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0);
+   struct brw_reg payload_attr = get_element_ud(brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0), 0); 
    struct brw_reg primmask;
    struct brw_instruction *jmp;
    struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
+   
+   GLuint saveflag;
 
+   c->nr_verts = 3;
    alloc_regs(c);
 
    primmask = retype(get_element(c->tmp, 0), BRW_REGISTER_TYPE_UD);
@@ -582,8 +708,15 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
 					       (1<<_3DPRIM_TRIFAN_NOSTIPPLE)));
    jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
    {
-      brw_emit_tri_setup( c );
-      /* note - thread killed in subroutine */
+      saveflag = p->flag_value;
+      brw_push_insn_state(p); 
+      brw_emit_tri_setup( c, GL_FALSE );
+      brw_pop_insn_state(p);
+      p->flag_value = saveflag;
+      /* note - thread killed in subroutine, so must
+       * restore the flag which is changed when building
+       * the subroutine. fix #13240
+       */
    }
    brw_land_fwd_jump(p, jmp);
 
@@ -596,12 +729,28 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c )
 					       (1<<_3DPRIM_LINESTRIP_CONT_BF)));
    jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
    {
-      brw_emit_line_setup( c );
+      saveflag = p->flag_value;
+      brw_push_insn_state(p); 
+      brw_emit_line_setup( c, GL_FALSE );
+      brw_pop_insn_state(p);
+      p->flag_value = saveflag;
       /* note - thread killed in subroutine */
    }
    brw_land_fwd_jump(p, jmp); 
 
-   brw_emit_point_setup( c );
+   brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
+   brw_AND(p, v1_null_ud, payload_attr, brw_imm_ud(1<<BRW_SPRITE_POINT_ENABLE));
+   jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
+   {
+      saveflag = p->flag_value;
+      brw_push_insn_state(p); 
+      brw_emit_point_sprite_setup( c, GL_FALSE );
+      brw_pop_insn_state(p);
+      p->flag_value = saveflag;
+   }
+   brw_land_fwd_jump(p, jmp); 
+
+   brw_emit_point_setup( c, GL_FALSE );
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index 9a6e5f5f192..506126fcfb0 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -34,70 +34,70 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "macros.h"
+#include "main/macros.h"
+#include "intel_fbo.h"
 
 static void upload_sf_vp(struct brw_context *brw)
 {
+   GLcontext *ctx = &brw->intel.ctx;
+   const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
    struct brw_sf_viewport sfv;
+   struct intel_renderbuffer *irb =
+      intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[0]);
+   GLfloat y_scale, y_bias;
 
    memset(&sfv, 0, sizeof(sfv));
-   
-   if (brw->intel.driDrawable) 
-   {
-      /* _NEW_VIEWPORT, BRW_NEW_METAOPS */
-
-      if (!brw->metaops.active) {
-	 const GLfloat *v = brw->intel.ctx.Viewport._WindowMap.m;
-	 
-	 sfv.viewport.m00 =   v[MAT_SX];
-	 sfv.viewport.m11 = - v[MAT_SY];
-	 sfv.viewport.m22 =   v[MAT_SZ] * brw->intel.depth_scale;
-	 sfv.viewport.m30 =   v[MAT_TX];
-	 sfv.viewport.m31 = - v[MAT_TY] + brw->intel.driDrawable->h;
-	 sfv.viewport.m32 =   v[MAT_TZ] * brw->intel.depth_scale;
-      }
-      else {
-	 sfv.viewport.m00 =   1;
-	 sfv.viewport.m11 = - 1;
-	 sfv.viewport.m22 =   1;
-	 sfv.viewport.m30 =   0;
-	 sfv.viewport.m31 =   brw->intel.driDrawable->h;
-	 sfv.viewport.m32 =   0;
+
+   if (ctx->DrawBuffer->Name) {
+      /* User-created FBO */
+      if (irb && !irb->RenderToTexture) {
+	 y_scale = -1.0;
+	 y_bias = ctx->DrawBuffer->Height;
+      } else {
+	 y_scale = 1.0;
+	 y_bias = 0;
       }
+   } else {
+      y_scale = -1.0;
+      y_bias = ctx->DrawBuffer->Height;
    }
 
-   /* XXX: what state for this? */
-   if (brw->intel.driDrawable)
-   {
-      intelScreenPrivate *screen = brw->intel.intelScreen;
-      /* _NEW_SCISSOR */
-      GLint x = brw->attribs.Scissor->X;
-      GLint y = brw->attribs.Scissor->Y;
-      GLuint w = brw->attribs.Scissor->Width;
-      GLuint h = brw->attribs.Scissor->Height;
-
-      GLint x1 = x;
-      GLint y1 = brw->intel.driDrawable->h - (y + h);
-      GLint x2 = x + w - 1;
-      GLint y2 = y1 + h - 1;
-
-      if (x1 < 0) x1 = 0;
-      if (y1 < 0) y1 = 0;
-      if (x2 < 0) x2 = 0;
-      if (y2 < 0) y2 = 0;
-
-      if (x2 >= screen->width) x2 = screen->width-1;
-      if (y2 >= screen->height) y2 = screen->height-1;
-      if (x1 >= screen->width) x1 = screen->width-1;
-      if (y1 >= screen->height) y1 = screen->height-1;
-      
-      sfv.scissor.xmin = x1;
-      sfv.scissor.xmax = x2;
-      sfv.scissor.ymin = y1;
-      sfv.scissor.ymax = y2;
+   /* _NEW_VIEWPORT, BRW_NEW_METAOPS */
+
+   if (!brw->metaops.active) {
+      const GLfloat *v = ctx->Viewport._WindowMap.m;
+
+      sfv.viewport.m00 = v[MAT_SX];
+      sfv.viewport.m11 = v[MAT_SY] * y_scale;
+      sfv.viewport.m22 = v[MAT_SZ] * depth_scale;
+      sfv.viewport.m30 = v[MAT_TX];
+      sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias;
+      sfv.viewport.m32 = v[MAT_TZ] * depth_scale;
+   } else {
+      sfv.viewport.m00 =   1;
+      sfv.viewport.m11 = - 1;
+      sfv.viewport.m22 =   1;
+      sfv.viewport.m30 =   0;
+      sfv.viewport.m31 =   ctx->DrawBuffer->Height;
+      sfv.viewport.m32 =   0;
    }
 
-   brw->sf.vp_gs_offset = brw_cache_data( &brw->cache[BRW_SF_VP], &sfv );
+   /* _NEW_SCISSOR */
+
+   /* The scissor only needs to handle the intersection of drawable and
+    * scissor rect.  Clipping to the boundaries of static shared buffers
+    * for front/back/depth is covered by looping over cliprects in brw_draw.c.
+    *
+    * Note that the hardware's coordinates are inclusive, while Mesa's min is
+    * inclusive but max is exclusive.
+    */
+   sfv.scissor.xmin = ctx->DrawBuffer->_Xmin;
+   sfv.scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
+   sfv.scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
+   sfv.scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
+
+   dri_bo_unreference(brw->sf.vp_bo);
+   brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 );
 }
 
 const struct brw_tracked_state brw_sf_vp = {
@@ -107,87 +107,132 @@ const struct brw_tracked_state brw_sf_vp = {
       .brw   = BRW_NEW_METAOPS,
       .cache = 0
    },
-   .update = upload_sf_vp
+   .prepare = upload_sf_vp
 };
 
+struct brw_sf_unit_key {
+   unsigned int total_grf;
+   unsigned int urb_entry_read_length;
 
+   unsigned int nr_urb_entries, urb_size, sfsize;
 
-static void upload_sf_unit( struct brw_context *brw )
+   GLenum front_face, cull_face;
+   GLboolean scissor, line_smooth, point_sprite, point_attenuated;
+   float line_width;
+   float point_size;
+};
+
+static void
+sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key)
+{
+   memset(key, 0, sizeof(*key));
+
+   /* CACHE_NEW_SF_PROG */
+   key->total_grf = brw->sf.prog_data->total_grf;
+   key->urb_entry_read_length = brw->sf.prog_data->urb_read_length;
+
+   /* BRW_NEW_URB_FENCE */
+   key->nr_urb_entries = brw->urb.nr_sf_entries;
+   key->urb_size = brw->urb.vsize;
+   key->sfsize = brw->urb.sfsize;
+
+   key->scissor = brw->attribs.Scissor->Enabled;
+   key->front_face = brw->attribs.Polygon->FrontFace;
+
+   if (brw->attribs.Polygon->CullFlag)
+      key->cull_face = brw->attribs.Polygon->CullFaceMode;
+   else
+      key->cull_face = GL_NONE;
+
+   key->line_width = brw->attribs.Line->Width;
+   key->line_smooth = brw->attribs.Line->SmoothFlag;
+
+   key->point_sprite = brw->attribs.Point->PointSprite;
+   key->point_size = brw->attribs.Point->Size;
+   key->point_attenuated = brw->attribs.Point->_Attenuated;
+}
+
+static dri_bo *
+sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
+			dri_bo **reloc_bufs)
 {
    struct brw_sf_unit_state sf;
+   dri_bo *bo;
+
    memset(&sf, 0, sizeof(sf));
 
-   /* CACHE_NEW_SF_PROG */
-   sf.thread0.grf_reg_count = ((brw->sf.prog_data->total_grf-1) & ~15) / 16;
-   sf.thread0.kernel_start_pointer = brw->sf.prog_gs_offset >> 6;
-   sf.thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
+   sf.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
+   sf.thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */
 
    sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+
    sf.thread3.dispatch_grf_start_reg = 3;
    sf.thread3.urb_entry_read_offset = 1;
+   sf.thread3.urb_entry_read_length = key->urb_entry_read_length;
 
-   /* BRW_NEW_URB_FENCE */
-   sf.thread4.nr_urb_entries = brw->urb.nr_sf_entries;
-   sf.thread4.urb_entry_allocation_size = brw->urb.sfsize - 1;
-   sf.thread4.max_threads = MIN2(12, brw->urb.nr_sf_entries / 2) - 1;
+   sf.thread4.nr_urb_entries = key->nr_urb_entries;
+   sf.thread4.urb_entry_allocation_size = key->sfsize - 1;
+   /* Each SF thread produces 1 PUE, and there can be up to 24 threads */
+   sf.thread4.max_threads = MIN2(24, key->nr_urb_entries) - 1;
 
    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
-      sf.thread4.max_threads = 0; 
+      sf.thread4.max_threads = 0;
 
    if (INTEL_DEBUG & DEBUG_STATS)
-      sf.thread4.stats_enable = 1; 
+      sf.thread4.stats_enable = 1;
 
    /* CACHE_NEW_SF_VP */
-   sf.sf5.sf_viewport_state_offset = brw->sf.vp_gs_offset >> 5;
-   
+   sf.sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset >> 5; /* reloc */
+
    sf.sf5.viewport_transform = 1;
-   
+
    /* _NEW_SCISSOR */
-   if (brw->attribs.Scissor->Enabled) 
-      sf.sf6.scissor = 1;  
+   if (key->scissor)
+      sf.sf6.scissor = 1;
 
    /* _NEW_POLYGON */
-   if (brw->attribs.Polygon->FrontFace == GL_CCW)
+   if (key->front_face == GL_CCW)
       sf.sf5.front_winding = BRW_FRONTWINDING_CCW;
    else
       sf.sf5.front_winding = BRW_FRONTWINDING_CW;
 
-   if (brw->attribs.Polygon->CullFlag) {
-      switch (brw->attribs.Polygon->CullFaceMode) {
-      case GL_FRONT:
-	 sf.sf6.cull_mode = BRW_CULLMODE_FRONT;
-	 break;
-      case GL_BACK:
-	 sf.sf6.cull_mode = BRW_CULLMODE_BACK;
-	 break;
-      case GL_FRONT_AND_BACK:
-	 sf.sf6.cull_mode = BRW_CULLMODE_BOTH;
-	 break;
-      default:
-	 assert(0);
-	 break;
-      }
-   }
-   else
+   switch (key->cull_face) {
+   case GL_FRONT:
+      sf.sf6.cull_mode = BRW_CULLMODE_FRONT;
+      break;
+   case GL_BACK:
+      sf.sf6.cull_mode = BRW_CULLMODE_BACK;
+      break;
+   case GL_FRONT_AND_BACK:
+      sf.sf6.cull_mode = BRW_CULLMODE_BOTH;
+      break;
+   case GL_NONE:
       sf.sf6.cull_mode = BRW_CULLMODE_NONE;
-      
+      break;
+   default:
+      assert(0);
+      break;
+   }
 
    /* _NEW_LINE */
    /* XXX use ctx->Const.Min/MaxLineWidth here */
-   sf.sf6.line_width = CLAMP(brw->attribs.Line->Width, 1.0, 5.0) * (1<<1);
+   sf.sf6.line_width = CLAMP(key->line_width, 1.0, 5.0) * (1<<1);
 
    sf.sf6.line_endcap_aa_region_width = 1;
-   if (brw->attribs.Line->SmoothFlag)
+   if (key->line_smooth)
       sf.sf6.aa_enable = 1;
-   else if (sf.sf6.line_width <= 0x2) 
-       sf.sf6.line_width = 0; 
+   else if (sf.sf6.line_width <= 0x2)
+       sf.sf6.line_width = 0;
 
    /* _NEW_POINT */
-   sf.sf6.point_rast_rule = 1;	/* opengl conventions */
+   sf.sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;	/* opengl conventions */
    /* XXX clamp max depends on AA vs. non-AA */
-   sf.sf7.point_size = CLAMP(brw->attribs.Point->Size, 1.0, 3.0) * (1<<3);
-   sf.sf7.use_point_size_state = !brw->attribs.Point->_Attenuated;
-      
+
+   sf.sf7.sprite_point = key->point_sprite;
+   sf.sf7.point_size = CLAMP(nearbyint(key->point_size), 1, 255) * (1<<3);
+   sf.sf7.use_point_size_state = !key->point_attenuated;
+   sf.sf7.aa_line_distance_mode = 0;
+
    /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
     */
    sf.sf7.trifan_pv = 2;
@@ -200,9 +245,48 @@ static void upload_sf_unit( struct brw_context *brw )
    sf.sf6.dest_org_vbias = 0x8;
    sf.sf6.dest_org_hbias = 0x8;
 
-   brw->sf.state_gs_offset = brw_cache_data( &brw->cache[BRW_SF_UNIT], &sf );
+   bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT,
+			 key, sizeof(*key),
+			 reloc_bufs, 2,
+			 &sf, sizeof(sf),
+			 NULL, NULL);
+
+   /* Emit SF program relocation */
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION, 0,
+		     sf.thread0.grf_reg_count << 1,
+		     offsetof(struct brw_sf_unit_state, thread0),
+		     brw->sf.prog_bo);
+
+   /* Emit SF viewport relocation */
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION, 0,
+		     sf.sf5.front_winding | (sf.sf5.viewport_transform << 1),
+		     offsetof(struct brw_sf_unit_state, sf5),
+		     brw->sf.vp_bo);
+
+   return bo;
 }
 
+static void upload_sf_unit( struct brw_context *brw )
+{
+   struct brw_sf_unit_key key;
+   dri_bo *reloc_bufs[2];
+
+   sf_unit_populate_key(brw, &key);
+
+   reloc_bufs[0] = brw->sf.prog_bo;
+   reloc_bufs[1] = brw->sf.vp_bo;
+
+   dri_bo_unreference(brw->sf.state_bo);
+   brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT,
+				       &key, sizeof(key),
+				       reloc_bufs, 2,
+				       NULL);
+   if (brw->sf.state_bo == NULL) {
+      brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs);
+   }
+}
 
 const struct brw_tracked_state brw_sf_unit = {
    .dirty = {
@@ -215,7 +299,5 @@ const struct brw_tracked_state brw_sf_unit = {
       .cache = (CACHE_NEW_SF_VP |
 		CACHE_NEW_SF_PROG)
    },
-   .update = upload_sf_unit
+   .prepare = upload_sf_unit,
 };
-
-
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index b4cbdd7a380..bb22c03eeb6 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -35,6 +35,16 @@
 
 #include "brw_context.h"
 
+static inline void
+brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
+{
+   assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
+
+   if (bo != NULL) {
+      dri_bo_reference(bo);
+      brw->state.validated_bos[brw->state.validated_bo_count++] = bo;
+   }
+};
 
 const struct brw_tracked_state brw_blend_constant_color;
 const struct brw_tracked_state brw_cc_unit;
@@ -48,8 +58,8 @@ const struct brw_tracked_state brw_curbe_offsets;
 const struct brw_tracked_state brw_invarient_state;
 const struct brw_tracked_state brw_gs_prog;
 const struct brw_tracked_state brw_gs_unit;
-const struct brw_tracked_state brw_drawing_rect;
 const struct brw_tracked_state brw_line_stipple;
+const struct brw_tracked_state brw_aa_line_parameters;
 const struct brw_tracked_state brw_pipelined_state_pointers;
 const struct brw_tracked_state brw_binding_table_pointers;
 const struct brw_tracked_state brw_depthbuffer;
@@ -74,73 +84,72 @@ const struct brw_tracked_state brw_wm_unit;
 const struct brw_tracked_state brw_psp_urb_cbs;
 
 const struct brw_tracked_state brw_active_vertprog;
-const struct brw_tracked_state brw_tnl_vertprog;
 const struct brw_tracked_state brw_pipe_control;
 
 const struct brw_tracked_state brw_clear_surface_cache;
 const struct brw_tracked_state brw_clear_batch_cache;
 
+const struct brw_tracked_state brw_drawing_rect;
+const struct brw_tracked_state brw_indices;
+const struct brw_tracked_state brw_vertices;
+
+/***********************************************************************
+ * brw_state.c
+ */
+void brw_validate_state(struct brw_context *brw);
+void brw_upload_state(struct brw_context *brw);
+void brw_init_state(struct brw_context *brw);
+void brw_destroy_state(struct brw_context *brw);
+
 /***********************************************************************
  * brw_state_cache.c
  */
-GLuint brw_cache_data(struct brw_cache *cache,
-		      const void *data );
-
-GLuint brw_cache_data_sz(struct brw_cache *cache,
-			 const void *data,
-			 GLuint data_sz);
-
-GLuint brw_upload_cache( struct brw_cache *cache,
-			 const void *key,
-			 GLuint key_sz,
-			 const void *data,
-			 GLuint data_sz,
-			 const void *aux,
-			 void *aux_return );
-
-GLboolean brw_search_cache( struct brw_cache *cache,
-			    const void *key,
-			    GLuint key_size,
-			    void *aux_return,
-			    GLuint *offset_return);
-
-void brw_init_caches( struct brw_context *brw );
-void brw_destroy_caches( struct brw_context *brw );
+dri_bo *brw_cache_data(struct brw_cache *cache,
+		       enum brw_cache_id cache_id,
+		       const void *data,
+		       dri_bo **reloc_bufs,
+		       GLuint nr_reloc_bufs);
+
+dri_bo *brw_cache_data_sz(struct brw_cache *cache,
+			  enum brw_cache_id cache_id,
+			  const void *data,
+			  GLuint data_size,
+			  dri_bo **reloc_bufs,
+			  GLuint nr_reloc_bufs);
+
+dri_bo *brw_upload_cache( struct brw_cache *cache,
+			  enum brw_cache_id cache_id,
+			  const void *key,
+			  GLuint key_sz,
+			  dri_bo **reloc_bufs,
+			  GLuint nr_reloc_bufs,
+			  const void *data,
+			  GLuint data_sz,
+			  const void *aux,
+			  void *aux_return );
+
+dri_bo *brw_search_cache( struct brw_cache *cache,
+			  enum brw_cache_id cache_id,
+			  const void *key,
+			  GLuint key_size,
+			  dri_bo **reloc_bufs,
+			  GLuint nr_reloc_bufs,
+			  void *aux_return);
+void brw_state_cache_check_size( struct brw_context *brw );
+
+void brw_init_cache( struct brw_context *brw );
+void brw_destroy_cache( struct brw_context *brw );
 
 /***********************************************************************
  * brw_state_batch.c
  */
-#define BRW_BATCH_STRUCT(brw, s) intel_batchbuffer_data( brw->intel.batch, (s), sizeof(*(s)), 0)
+#define BRW_BATCH_STRUCT(brw, s) intel_batchbuffer_data( brw->intel.batch, (s), sizeof(*(s)), IGNORE_CLIPRECTS)
 #define BRW_CACHED_BATCH_STRUCT(brw, s) brw_cached_batch_struct( brw, (s), sizeof(*(s)) )
 
 GLboolean brw_cached_batch_struct( struct brw_context *brw,
 				   const void *data,
 				   GLuint sz );
-
 void brw_destroy_batch_cache( struct brw_context *brw );
-
-
-/***********************************************************************
- * brw_state_pool.c
- */
-void brw_init_pools( struct brw_context *brw );
-void brw_destroy_pools( struct brw_context *brw );
-
-GLboolean brw_pool_alloc( struct brw_mem_pool *pool,
-			  GLuint size,
-			  GLuint alignment,
-			  GLuint *offset_return);
-
-void brw_pool_fence( struct brw_context *brw,
-		     struct brw_mem_pool *pool,
-		     GLuint fence );
-
-
-void brw_pool_check_wrap( struct brw_context *brw,
-			  struct brw_mem_pool *pool );
-
-void brw_clear_all_caches( struct brw_context *brw );
-void brw_invalidate_pools( struct brw_context *brw );
 void brw_clear_batch_cache_flush( struct brw_context *brw );
 
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c b/src/mesa/drivers/dri/i965/brw_state_batch.c
index 909b0acd121..dc87859f3f5 100644
--- a/src/mesa/drivers/dri/i965/brw_state_batch.c
+++ b/src/mesa/drivers/dri/i965/brw_state_batch.c
@@ -32,9 +32,8 @@
 
 
 #include "brw_state.h"
-#include "brw_aub.h"
 #include "intel_batchbuffer.h"
-#include "imports.h"
+#include "main/imports.h"
 
 
 
@@ -49,7 +48,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw,
    struct header *newheader = (struct header *)data;
 
    if (brw->emit_state_always) {
-      intel_batchbuffer_data(brw->intel.batch, data, sz, 0);
+      intel_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
       return GL_TRUE;
    }
 
@@ -76,7 +75,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw,
 
  emit:
    memcpy(item->header, newheader, sz);
-   intel_batchbuffer_data(brw->intel.batch, data, sz, 0);
+   intel_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
    return GL_TRUE;
 }
 
@@ -92,21 +91,12 @@ static void clear_batch_cache( struct brw_context *brw )
    }
 
    brw->cached_batch_items = NULL;
-
-
-   brw_clear_all_caches(brw);
-
-   bmReleaseBuffers(&brw->intel);
-   
-   brw_invalidate_pools(brw);
 }
 
 void brw_clear_batch_cache_flush( struct brw_context *brw )
 {
    clear_batch_cache(brw);
 
-   brw->wrap = 0;
-   
 /*    brw_do_flush(brw, BRW_FLUSH_STATE_CACHE|BRW_FLUSH_READ_CACHE); */
    
    brw->state.dirty.mesa |= ~0;
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c
index 71c6938f9a3..d5b51664066 100644
--- a/src/mesa/drivers/dri/i965/brw_state_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
@@ -28,12 +28,37 @@
   * Authors:
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
-      
+
+/** @file brw_state_cache.c
+ *
+ * This file implements a simple static state cache for 965.  The consumers
+ * can query the hash table of state using a cache_id, opaque key data,
+ * and list of buffers that will be used in relocations, and receive the
+ * corresponding state buffer object of state (plus associated auxiliary
+ * data) in return.
+ *
+ * The inner workings are a simple hash table based on a CRC of the key data.
+ * The cache_id and relocation target buffers associated with the state
+ * buffer are included as auxiliary key data, but are not part of the hash
+ * value (this should be fixed, but will likely be fixed instead by making
+ * consumers use structured keys).
+ *
+ * Replacement is not implemented.  Instead, when the cache gets too big, at
+ * a safe point (unlock) we throw out all of the cache data and let it
+ * regenerate for the next rendering operation.
+ *
+ * The reloc_buf pointers need to be included as key data, otherwise the
+ * non-unique values stuffed in the offset in key data through
+ * brw_cache_data() may result in successful probe for state buffers
+ * even when the buffer being referenced doesn't match.  The result would be
+ * that the same state cache entry is used twice for different buffers,
+ * only one of the two buffers referenced gets put into the offset, and the
+ * incorrect program is run for the other instance.
+ */
 
 #include "brw_state.h"
-#include "brw_aub.h"
 #include "intel_batchbuffer.h"
-#include "imports.h"
+#include "main/imports.h"
 
 /* XXX: Fixme - have to include these to get the sizes of the prog_key
  * structs:
@@ -44,16 +69,8 @@
 #include "brw_sf.h"
 #include "brw_gs.h"
 
-
-/***********************************************************************
- * Check cache for uploaded version of struct, else upload new one.
- * Fail when memory is exhausted.
- *
- * XXX: FIXME: Currently search is so slow it would be quicker to
- * regenerate the data every time...
- */
-
-static GLuint hash_key( const void *key, GLuint key_size )
+static GLuint hash_key( const void *key, GLuint key_size,
+			dri_bo **reloc_bufs, GLuint nr_reloc_bufs)
 {
    GLuint *ikey = (GLuint *)key;
    GLuint hash = 0, i;
@@ -62,23 +79,63 @@ static GLuint hash_key( const void *key, GLuint key_size )
 
    /* I'm sure this can be improved on:
     */
-   for (i = 0; i < key_size/4; i++)
+   for (i = 0; i < key_size/4; i++) {
       hash ^= ikey[i];
+      hash = (hash << 5) | (hash >> 27);
+   }
+
+   /* Include the BO pointers as key data as well */
+   ikey = (GLuint *)reloc_bufs;
+   key_size = nr_reloc_bufs * sizeof(dri_bo *);
+   for (i = 0; i < key_size/4; i++) {
+      hash ^= ikey[i];
+      hash = (hash << 5) | (hash >> 27);
+   }
 
    return hash;
 }
 
-static struct brw_cache_item *search_cache( struct brw_cache *cache,
-					     GLuint hash,
-					     const void *key,
-					     GLuint key_size)
+/**
+ * Marks a new buffer as being chosen for the given cache id.
+ */
+static void
+update_cache_last(struct brw_cache *cache, enum brw_cache_id cache_id,
+		  dri_bo *bo)
+{
+   if (bo == cache->last_bo[cache_id])
+      return; /* no change */
+
+   dri_bo_unreference(cache->last_bo[cache_id]);
+   cache->last_bo[cache_id] = bo;
+   dri_bo_reference(cache->last_bo[cache_id]);
+   cache->brw->state.dirty.cache |= 1 << cache_id;
+}
+
+static struct brw_cache_item *
+search_cache(struct brw_cache *cache, enum brw_cache_id cache_id,
+	     GLuint hash, const void *key, GLuint key_size,
+	     dri_bo **reloc_bufs, GLuint nr_reloc_bufs)
 {
    struct brw_cache_item *c;
 
+#if 0
+   int bucketcount = 0;
+
+   for (c = cache->items[hash % cache->size]; c; c = c->next)
+      bucketcount++;
+
+   fprintf(stderr, "bucket %d/%d = %d/%d items\n", hash % cache->size,
+	   cache->size, bucketcount, cache->n_items);
+#endif
+
    for (c = cache->items[hash % cache->size]; c; c = c->next) {
-      if (c->hash == hash && 
+      if (c->cache_id == cache_id &&
+	  c->hash == hash &&
 	  c->key_size == key_size &&
-	  memcmp(c->key, key, key_size) == 0)
+	  memcmp(c->key, key, key_size) == 0 &&
+	  c->nr_reloc_bufs == nr_reloc_bufs &&
+	  memcmp(c->reloc_bufs, reloc_bufs,
+		 nr_reloc_bufs * sizeof(dri_bo *)) == 0)
 	 return c;
    }
 
@@ -93,8 +150,7 @@ static void rehash( struct brw_cache *cache )
    GLuint size, i;
 
    size = cache->size * 3;
-   items = (struct brw_cache_item**) _mesa_malloc(size * sizeof(*items));
-   _mesa_memset(items, 0, size * sizeof(*items));
+   items = (struct brw_cache_item**) _mesa_calloc(size * sizeof(*items));
 
    for (i = 0; i < cache->size; i++)
       for (c = cache->items[i]; c; c = next) {
@@ -108,142 +164,180 @@ static void rehash( struct brw_cache *cache )
    cache->size = size;
 }
 
-
-GLboolean brw_search_cache( struct brw_cache *cache,
-			    const void *key,
-			    GLuint key_size,
-			    void *aux_return,
-			    GLuint *offset_return)
+/**
+ * Returns the buffer object matching cache_id and key, or NULL.
+ */
+dri_bo *brw_search_cache( struct brw_cache *cache,
+			  enum brw_cache_id cache_id,
+			  const void *key,
+			  GLuint key_size,
+			  dri_bo **reloc_bufs, GLuint nr_reloc_bufs,
+			  void *aux_return )
 {
    struct brw_cache_item *item;
-   GLuint addr = 0;
-   GLuint hash = hash_key(key, key_size);
+   GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs);
 
-   item = search_cache(cache, hash, key, key_size);
+   item = search_cache(cache, cache_id, hash, key, key_size,
+		       reloc_bufs, nr_reloc_bufs);
 
-   if (item) {
-      if (aux_return) 
-	 *(void **)aux_return = (void *)((char *)item->key + item->key_size);
-      
-      *offset_return = addr = item->offset;
-   }    
-    
-   if (item == NULL || addr != cache->last_addr) {
-      cache->brw->state.dirty.cache |= 1<<cache->id;
-      cache->last_addr = addr;
-   }
-   
-   return item != NULL;
+   if (item == NULL)
+      return NULL;
+
+   if (aux_return)
+      *(void **)aux_return = (void *)((char *)item->key + item->key_size);
+
+   update_cache_last(cache, cache_id, item->bo);
+
+   dri_bo_reference(item->bo);
+   return item->bo;
 }
 
-GLuint brw_upload_cache( struct brw_cache *cache,
-			 const void *key,
-			 GLuint key_size,
-			 const void *data,
-			 GLuint data_size,
-			 const void *aux,
-			 void *aux_return )
-{   
-   GLuint offset;
+dri_bo *
+brw_upload_cache( struct brw_cache *cache,
+		  enum brw_cache_id cache_id,
+		  const void *key,
+		  GLuint key_size,
+		  dri_bo **reloc_bufs,
+		  GLuint nr_reloc_bufs,
+		  const void *data,
+		  GLuint data_size,
+		  const void *aux,
+		  void *aux_return )
+{
    struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item);
-   GLuint hash = hash_key(key, key_size);
-   void *tmp = _mesa_malloc(key_size + cache->aux_size);
-   
-   if (!brw_pool_alloc(cache->pool, data_size, 6, &offset)) {
-      /* Should not be possible: 
-       */
-      _mesa_printf("brw_pool_alloc failed\n");
-      exit(1);
-   }
+   GLuint hash = hash_key(key, key_size, reloc_bufs, nr_reloc_bufs);
+   GLuint relocs_size = nr_reloc_bufs * sizeof(dri_bo *);
+   GLuint aux_size = cache->aux_size[cache_id];
+   void *tmp;
+   dri_bo *bo;
+   int i;
+
+   /* Create the buffer object to contain the data */
+   bo = dri_bo_alloc(cache->brw->intel.bufmgr,
+		     cache->name[cache_id], data_size, 1 << 6);
+
+
+   /* Set up the memory containing the key, aux_data, and reloc_bufs */
+   tmp = _mesa_malloc(key_size + aux_size + relocs_size);
 
    memcpy(tmp, key, key_size);
+   memcpy(tmp + key_size, aux, cache->aux_size[cache_id]);
+   memcpy(tmp + key_size + aux_size, reloc_bufs, relocs_size);
+   for (i = 0; i < nr_reloc_bufs; i++) {
+      if (reloc_bufs[i] != NULL)
+	 dri_bo_reference(reloc_bufs[i]);
+   }
 
-   if (cache->aux_size)
-      memcpy(tmp+key_size, aux, cache->aux_size);
-	 
+   item->cache_id = cache_id;
    item->key = tmp;
    item->hash = hash;
    item->key_size = key_size;
-   item->offset = offset;
+   item->reloc_bufs = tmp + key_size + aux_size;
+   item->nr_reloc_bufs = nr_reloc_bufs;
+
+   item->bo = bo;
+   dri_bo_reference(bo);
    item->data_size = data_size;
 
-   if (++cache->n_items > cache->size * 1.5)
+   if (cache->n_items > cache->size * 1.5)
       rehash(cache);
-   
+
    hash %= cache->size;
    item->next = cache->items[hash];
    cache->items[hash] = item;
-      
+   cache->n_items++;
+
    if (aux_return) {
-      assert(cache->aux_size);
+      assert(cache->aux_size[cache_id]);
       *(void **)aux_return = (void *)((char *)item->key + item->key_size);
    }
 
    if (INTEL_DEBUG & DEBUG_STATE)
-      _mesa_printf("upload %s: %d bytes to pool buffer %d offset %x\n",
-		   cache->name,
-		   data_size, 
-		   cache->pool->buffer,
-		   offset);
+      _mesa_printf("upload %s: %d bytes to cache id %d\n",
+		   cache->name[cache_id],
+		   data_size, cache_id);
 
-   /* Copy data to the buffer:
-    */
-   bmBufferSubDataAUB(&cache->brw->intel,
-		      cache->pool->buffer,
-		      offset, 
-		      data_size, 
-		      data,
-		      cache->aub_type,
-		      cache->aub_sub_type);
-   
-
-   cache->brw->state.dirty.cache |= 1<<cache->id;
-   cache->last_addr = offset;
-
-   return offset;
+   /* Copy data to the buffer */
+   dri_bo_subdata(bo, 0, data_size, data);
+
+   update_cache_last(cache, cache_id, bo);
+
+   return bo;
 }
 
 /* This doesn't really work with aux data.  Use search/upload instead
  */
-GLuint brw_cache_data_sz(struct brw_cache *cache,
-			 const void *data,
-			 GLuint data_size)
+dri_bo *
+brw_cache_data_sz(struct brw_cache *cache,
+		  enum brw_cache_id cache_id,
+		  const void *data,
+		  GLuint data_size,
+		  dri_bo **reloc_bufs,
+		  GLuint nr_reloc_bufs)
 {
-   GLuint addr;
+   dri_bo *bo;
+   struct brw_cache_item *item;
+   GLuint hash = hash_key(data, data_size, reloc_bufs, nr_reloc_bufs);
 
-   if (!brw_search_cache(cache, data, data_size, NULL, &addr)) {
-      addr = brw_upload_cache(cache, 
-			      data, data_size, 
-			      data, data_size, 
-			      NULL, NULL);
+   item = search_cache(cache, cache_id, hash, data, data_size,
+		       reloc_bufs, nr_reloc_bufs);
+   if (item) {
+      update_cache_last(cache, cache_id, item->bo);
+      dri_bo_reference(item->bo);
+      return item->bo;
    }
 
-   return addr;
+   bo = brw_upload_cache(cache, cache_id,
+			 data, data_size,
+			 reloc_bufs, nr_reloc_bufs,
+			 data, data_size,
+			 NULL, NULL);
+
+   return bo;
 }
 
-GLuint brw_cache_data(struct brw_cache *cache,
-		      const void *data)
+/**
+ * Wrapper around brw_cache_data_sz using the cache_id's canonical key size.
+ *
+ * If nr_reloc_bufs is nonzero, brw_search_cache()/brw_upload_cache() would be
+ * better to use, as the potentially changing offsets in the data-used-as-key
+ * will result in excessive cache misses.
+ */
+dri_bo *
+brw_cache_data(struct brw_cache *cache,
+	       enum brw_cache_id cache_id,
+	       const void *data,
+	       dri_bo **reloc_bufs,
+	       GLuint nr_reloc_bufs)
 {
-   return brw_cache_data_sz(cache, data, cache->key_size);
+   return brw_cache_data_sz(cache, cache_id, data, cache->key_size[cache_id],
+			    reloc_bufs, nr_reloc_bufs);
 }
 
+enum pool_type {
+   DW_SURFACE_STATE,
+   DW_GENERAL_STATE
+};
+
+static void
+brw_init_cache_id( struct brw_context *brw,
+		const char *name,
+		enum brw_cache_id id,
+		GLuint key_size,
+		GLuint aux_size)
+{
+   struct brw_cache *cache = &brw->cache;
 
+   cache->name[id] = strdup(name);
+   cache->key_size[id] = key_size;
+   cache->aux_size[id] = aux_size;
+}
 
-
-
-static void brw_init_cache( struct brw_context *brw, 
-			    const char *name,
-			    GLuint id,
-			    GLuint key_size,
-			    GLuint aux_size,
-			    GLuint aub_type,
-			    GLuint aub_sub_type )
+void brw_init_cache( struct brw_context *brw )
 {
-   struct brw_cache *cache = &brw->cache[id];
+   struct brw_cache *cache = &brw->cache;
+
    cache->brw = brw;
-   cache->id = id;
-   cache->name = name;
-   cache->items = NULL;
 
    cache->size = 7;
    cache->n_items = 0;
@@ -251,200 +345,133 @@ static void brw_init_cache( struct brw_context *brw,
       _mesa_calloc(cache->size * 
 		   sizeof(struct brw_cache_item));
 
-
-   cache->key_size = key_size;
-   cache->aux_size = aux_size;
-   cache->aub_type = aub_type;
-   cache->aub_sub_type = aub_sub_type;
-   switch (aub_type) {
-   case DW_GENERAL_STATE: cache->pool = &brw->pool[BRW_GS_POOL]; break;
-   case DW_SURFACE_STATE: cache->pool = &brw->pool[BRW_SS_POOL]; break;
-   default: assert(0); break;
-   }
-}
-
-void brw_init_caches( struct brw_context *brw )
-{
-
-   brw_init_cache(brw,
-		  "CC_VP",
-		  BRW_CC_VP,
-		  sizeof(struct brw_cc_viewport),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_COLOR_CALC_VIEWPORT_STATE);
-
-   brw_init_cache(brw,
-		  "CC_UNIT",
-		  BRW_CC_UNIT,
-		  sizeof(struct brw_cc_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_COLOR_CALC_STATE);
-
-   brw_init_cache(brw,
-		  "WM_PROG",
-		  BRW_WM_PROG,
-		  sizeof(struct brw_wm_prog_key),
-		  sizeof(struct brw_wm_prog_data),
-		  DW_GENERAL_STATE,
-		  DWGS_KERNEL_INSTRUCTIONS);
-
-   brw_init_cache(brw,
-		  "SAMPLER_DEFAULT_COLOR",
-		  BRW_SAMPLER_DEFAULT_COLOR,
-		  sizeof(struct brw_sampler_default_color),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_SAMPLER_DEFAULT_COLOR);
-
-   brw_init_cache(brw,
-		  "SAMPLER",
-		  BRW_SAMPLER,
-		  0,		/* variable key/data size */
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_SAMPLER_STATE);
-
-   brw_init_cache(brw,
-		  "WM_UNIT",
-		  BRW_WM_UNIT,
-		  sizeof(struct brw_wm_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_WINDOWER_IZ_STATE);
-
-   brw_init_cache(brw,
-		  "SF_PROG",
-		  BRW_SF_PROG,
-		  sizeof(struct brw_sf_prog_key),
-		  sizeof(struct brw_sf_prog_data),
-		  DW_GENERAL_STATE,
-		  DWGS_KERNEL_INSTRUCTIONS);
-
-   brw_init_cache(brw,
-		  "SF_VP",
-		  BRW_SF_VP,
-		  sizeof(struct brw_sf_viewport),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_STRIPS_FANS_VIEWPORT_STATE);
-
-   brw_init_cache(brw,
-		  "SF_UNIT",
-		  BRW_SF_UNIT,
-		  sizeof(struct brw_sf_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_STRIPS_FANS_STATE);
-
-   brw_init_cache(brw,
-		  "VS_UNIT",
-		  BRW_VS_UNIT,
-		  sizeof(struct brw_vs_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_VERTEX_SHADER_STATE);
-
-   brw_init_cache(brw,
-		  "VS_PROG",
-		  BRW_VS_PROG,
-		  sizeof(struct brw_vs_prog_key),
-		  sizeof(struct brw_vs_prog_data),
-		  DW_GENERAL_STATE,
-		  DWGS_KERNEL_INSTRUCTIONS);
-
-   brw_init_cache(brw,
-		  "CLIP_UNIT",
-		  BRW_CLIP_UNIT,
-		  sizeof(struct brw_clip_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_CLIPPER_STATE);
-
-   brw_init_cache(brw,
-		  "CLIP_PROG",
-		  BRW_CLIP_PROG,
-		  sizeof(struct brw_clip_prog_key),
-		  sizeof(struct brw_clip_prog_data),
-		  DW_GENERAL_STATE,
-		  DWGS_KERNEL_INSTRUCTIONS);
-
-   brw_init_cache(brw,
-		  "GS_UNIT",
-		  BRW_GS_UNIT,
-		  sizeof(struct brw_gs_unit_state),
-		  0,
-		  DW_GENERAL_STATE,
-		  DWGS_GEOMETRY_SHADER_STATE);
-
-   brw_init_cache(brw,
-		  "GS_PROG",
-		  BRW_GS_PROG,
-		  sizeof(struct brw_gs_prog_key),
-		  sizeof(struct brw_gs_prog_data),
-		  DW_GENERAL_STATE,
-		  DWGS_KERNEL_INSTRUCTIONS);
-
-   brw_init_cache(brw,
-		  "SS_SURFACE",
-		  BRW_SS_SURFACE,
-		  sizeof(struct brw_surface_state),
-		  0,
-		  DW_SURFACE_STATE,
-		  DWSS_SURFACE_STATE);
-
-   brw_init_cache(brw,
-		  "SS_SURF_BIND",
-		  BRW_SS_SURF_BIND,
-		  sizeof(struct brw_surface_binding_table),
-		  0,
-		  DW_SURFACE_STATE,
-		  DWSS_BINDING_TABLE_STATE);
+   brw_init_cache_id(brw,
+		     "CC_VP",
+		     BRW_CC_VP,
+		     sizeof(struct brw_cc_viewport),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "CC_UNIT",
+		     BRW_CC_UNIT,
+		     sizeof(struct brw_cc_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "WM_PROG",
+		     BRW_WM_PROG,
+		     sizeof(struct brw_wm_prog_key),
+		     sizeof(struct brw_wm_prog_data));
+
+   brw_init_cache_id(brw,
+		     "SAMPLER_DEFAULT_COLOR",
+		     BRW_SAMPLER_DEFAULT_COLOR,
+		     sizeof(struct brw_sampler_default_color),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "SAMPLER",
+		     BRW_SAMPLER,
+		     0,		/* variable key/data size */
+		     0);
+
+   brw_init_cache_id(brw,
+		     "WM_UNIT",
+		     BRW_WM_UNIT,
+		     sizeof(struct brw_wm_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "SF_PROG",
+		     BRW_SF_PROG,
+		     sizeof(struct brw_sf_prog_key),
+		     sizeof(struct brw_sf_prog_data));
+
+   brw_init_cache_id(brw,
+		     "SF_VP",
+		     BRW_SF_VP,
+		     sizeof(struct brw_sf_viewport),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "SF_UNIT",
+		     BRW_SF_UNIT,
+		     sizeof(struct brw_sf_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "VS_UNIT",
+		     BRW_VS_UNIT,
+		     sizeof(struct brw_vs_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "VS_PROG",
+		     BRW_VS_PROG,
+		     sizeof(struct brw_vs_prog_key),
+		     sizeof(struct brw_vs_prog_data));
+
+   brw_init_cache_id(brw,
+		     "CLIP_UNIT",
+		     BRW_CLIP_UNIT,
+		     sizeof(struct brw_clip_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "CLIP_PROG",
+		     BRW_CLIP_PROG,
+		     sizeof(struct brw_clip_prog_key),
+		     sizeof(struct brw_clip_prog_data));
+
+   brw_init_cache_id(brw,
+		     "GS_UNIT",
+		     BRW_GS_UNIT,
+		     sizeof(struct brw_gs_unit_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "GS_PROG",
+		     BRW_GS_PROG,
+		     sizeof(struct brw_gs_prog_key),
+		     sizeof(struct brw_gs_prog_data));
+
+   brw_init_cache_id(brw,
+		     "SS_SURFACE",
+		     BRW_SS_SURFACE,
+		     sizeof(struct brw_surface_state),
+		     0);
+
+   brw_init_cache_id(brw,
+		     "SS_SURF_BIND",
+		     BRW_SS_SURF_BIND,
+		     0,
+		     0);
 }
 
-
-/* When we lose hardware context, need to invalidate the surface cache
- * as these structs must be explicitly re-uploaded.  They are subject
- * to fixup by the memory manager as they contain absolute agp
- * offsets, so we need to ensure there is a fresh version of the
- * struct available to receive the fixup.
- *
- * XXX: Need to ensure that there aren't two versions of a surface or
- * bufferobj with different backing data active in the same buffer at
- * once?  Otherwise the cache could confuse them.  Maybe better not to
- * cache at all?
- * 
- * --> Isn't this the same as saying need to ensure batch is flushed
- *         before new data is uploaded to an existing buffer?  We
- *         already try to make sure of that.
- */
-static void clear_cache( struct brw_cache *cache )
+static void
+brw_clear_cache( struct brw_context *brw )
 {
    struct brw_cache_item *c, *next;
    GLuint i;
 
-   for (i = 0; i < cache->size; i++) {
-      for (c = cache->items[i]; c; c = next) {
+   if (INTEL_DEBUG & DEBUG_STATE)
+      _mesa_printf("%s\n", __FUNCTION__);
+
+   for (i = 0; i < brw->cache.size; i++) {
+      for (c = brw->cache.items[i]; c; c = next) {
+	 int j;
+
 	 next = c->next;
+	 for (j = 0; j < c->nr_reloc_bufs; j++)
+	    dri_bo_unreference(c->reloc_bufs[j]);
+	 dri_bo_unreference(c->bo);
 	 free((void *)c->key);
 	 free(c);
       }
-      cache->items[i] = NULL;
+      brw->cache.items[i] = NULL;
    }
 
-   cache->n_items = 0;
-}
-
-void brw_clear_all_caches( struct brw_context *brw )
-{
-   GLint i;
-
-   if (INTEL_DEBUG & DEBUG_STATE)
-      _mesa_printf("%s\n", __FUNCTION__);
-
-   for (i = 0; i < BRW_MAX_CACHE; i++)
-      clear_cache(&brw->cache[i]);      
+   brw->cache.n_items = 0;
 
    if (brw->curbe.last_buf) {
       _mesa_free(brw->curbe.last_buf);
@@ -456,14 +483,25 @@ void brw_clear_all_caches( struct brw_context *brw )
    brw->state.dirty.cache |= ~0;
 }
 
+void brw_state_cache_check_size( struct brw_context *brw )
+{
+   /* un-tuned guess.  We've got around 20 state objects for a total of around
+    * 32k, so 1000 of them is around 1.5MB.
+    */
+   if (brw->cache.n_items > 1000)
+      brw_clear_cache(brw);
+}
 
-
-
-
-void brw_destroy_caches( struct brw_context *brw )
+void brw_destroy_cache( struct brw_context *brw )
 {
    GLuint i;
 
-   for (i = 0; i < BRW_MAX_CACHE; i++)
-      clear_cache(&brw->cache[i]);      
+   brw_clear_cache(brw);
+   for (i = 0; i < BRW_MAX_CACHE; i++) {
+      dri_bo_unreference(brw->cache.last_bo[i]);
+      free(brw->cache.name[i]);
+   }
+   free(brw->cache.items);
+   brw->cache.items = NULL;
+   brw->cache.size = 0;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
new file mode 100644
index 00000000000..b28c57c2bcf
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -0,0 +1,200 @@
+/*
+ * Copyright © 2007 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+#include "main/mtypes.h"
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+
+/**
+ * Prints out a header, the contents, and the message associated with
+ * the hardware state data given.
+ *
+ * \param name Name of the state object
+ * \param data Pointer to the base of the state object
+ * \param hw_offset Hardware offset of the base of the state data.
+ * \param index Index of the DWORD being output.
+ */
+static void
+state_out(const char *name, void *data, uint32_t hw_offset, int index,
+	  char *fmt, ...)
+{
+    va_list va;
+
+    fprintf(stderr, "%8s: 0x%08x: 0x%08x: ",
+	    name, hw_offset + index * 4, ((uint32_t *)data)[index]);
+    va_start(va, fmt);
+    vfprintf(stderr, fmt, va);
+    va_end(va);
+}
+
+/** Generic, undecoded state buffer debug printout */
+static void
+state_struct_out(const char *name, dri_bo *buffer, unsigned int state_size)
+{
+   int i;
+
+   if (buffer == NULL)
+      return;
+
+   dri_bo_map(buffer, GL_FALSE);
+   for (i = 0; i < state_size / 4; i++) {
+      state_out(name, buffer->virtual, buffer->offset, i,
+		"dword %d\n", i);
+   }
+   dri_bo_unmap(buffer);
+}
+
+static const char *
+get_965_surfacetype(unsigned int surfacetype)
+{
+    switch (surfacetype) {
+    case 0: return "1D";
+    case 1: return "2D";
+    case 2: return "3D";
+    case 3: return "CUBE";
+    case 4: return "BUFFER";
+    case 7: return "NULL";
+    default: return "unknown";
+    }
+}
+
+static void dump_wm_surface_state(struct brw_context *brw)
+{
+   int i;
+
+   for (i = 0; i < brw->wm.nr_surfaces; i++) {
+      dri_bo *surf_bo = brw->wm.surf_bo[i];
+      unsigned int surfoff;
+      struct brw_surface_state *surf;
+      char name[20];
+
+      if (surf_bo == NULL) {
+	 fprintf(stderr, "WM SS%d: NULL\n", i);
+	 continue;
+      }
+      dri_bo_map(surf_bo, GL_FALSE);
+      surfoff = surf_bo->offset;
+      surf = (struct brw_surface_state *)(surf_bo->virtual);
+
+      sprintf(name, "WM SS%d", i);
+      state_out(name, surf, surfoff, 0, "%s\n",
+		get_965_surfacetype(surf->ss0.surface_type));
+      state_out(name, surf, surfoff, 1, "offset\n");
+      state_out(name, surf, surfoff, 2, "%dx%d size, %d mips\n",
+		surf->ss2.width + 1, surf->ss2.height + 1, surf->ss2.mip_count);
+      state_out(name, surf, surfoff, 3, "pitch %d, %stiled\n",
+		surf->ss3.pitch + 1, surf->ss3.tiled_surface ? "" : "not ");
+      state_out(name, surf, surfoff, 4, "mip base %d\n",
+		surf->ss4.min_lod);
+
+      dri_bo_unmap(surf_bo);
+   }
+}
+
+static void dump_sf_viewport_state(struct brw_context *brw)
+{
+   const char *name = "SF VP";
+   struct brw_sf_viewport *vp;
+   uint32_t vp_off;
+
+   if (brw->sf.vp_bo == NULL)
+      return;
+
+   dri_bo_map(brw->sf.vp_bo, GL_FALSE);
+
+   vp = brw->sf.vp_bo->virtual;
+   vp_off = brw->sf.vp_bo->offset;
+
+   state_out(name, vp, vp_off, 0, "m00 = %f\n", vp->viewport.m00);
+   state_out(name, vp, vp_off, 1, "m11 = %f\n", vp->viewport.m11);
+   state_out(name, vp, vp_off, 2, "m22 = %f\n", vp->viewport.m22);
+   state_out(name, vp, vp_off, 3, "m30 = %f\n", vp->viewport.m30);
+   state_out(name, vp, vp_off, 4, "m31 = %f\n", vp->viewport.m31);
+   state_out(name, vp, vp_off, 5, "m32 = %f\n", vp->viewport.m32);
+
+   state_out(name, vp, vp_off, 6, "top left = %d,%d\n",
+	     vp->scissor.xmin, vp->scissor.ymin);
+   state_out(name, vp, vp_off, 7, "bottom right = %d,%d\n",
+	     vp->scissor.xmax, vp->scissor.ymax);
+
+   dri_bo_unmap(brw->sf.vp_bo);
+}
+
+static void brw_debug_prog(const char *name, dri_bo *prog)
+{
+   unsigned int i;
+   uint32_t *data;
+
+   if (prog == NULL)
+      return;
+
+   dri_bo_map(prog, GL_FALSE);
+
+   data = prog->virtual;
+
+   for (i = 0; i < prog->size / 4 / 4; i++) {
+      fprintf(stderr, "%8s: 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
+	      name, (unsigned int)prog->offset + i * 4 * 4,
+	      data[i * 4], data[i * 4 + 1], data[i * 4 + 2], data[i * 4 + 3]);
+   }
+
+   dri_bo_unmap(prog);
+}
+
+
+/**
+ * Print additional debug information associated with the batchbuffer
+ * when DEBUG_BATCH is set.
+ *
+ * For 965, this means mapping the state buffers that would have been referenced
+ * by the batchbuffer and dumping them.
+ *
+ * The buffer offsets printed rely on the buffer containing the last offset
+ * it was validated at.
+ */
+void brw_debug_batch(struct intel_context *intel)
+{
+   struct brw_context *brw = brw_context(&intel->ctx);
+
+   state_struct_out("WM bind", brw->wm.bind_bo, 4 * brw->wm.nr_surfaces);
+   dump_wm_surface_state(brw);
+
+   state_struct_out("VS", brw->vs.state_bo, sizeof(struct brw_vs_unit_state));
+   brw_debug_prog("VS prog", brw->vs.prog_bo);
+
+   state_struct_out("GS", brw->gs.state_bo, sizeof(struct brw_gs_unit_state));
+   brw_debug_prog("GS prog", brw->gs.prog_bo);
+
+   state_struct_out("SF", brw->sf.state_bo, sizeof(struct brw_sf_unit_state));
+   dump_sf_viewport_state(brw);
+   brw_debug_prog("SF prog", brw->sf.prog_bo);
+
+   state_struct_out("WM", brw->wm.state_bo, sizeof(struct brw_wm_unit_state));
+   brw_debug_prog("WM prog", brw->wm.prog_bo);
+}
diff --git a/src/mesa/drivers/dri/i965/brw_state_pool.c b/src/mesa/drivers/dri/i965/brw_state_pool.c
deleted file mode 100644
index b9926f2a5d7..00000000000
--- a/src/mesa/drivers/dri/i965/brw_state_pool.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-       
-
-#include "brw_state.h"
-#include "imports.h"
-
-#include "intel_ioctl.h"
-#include "bufmgr.h"
-
-GLboolean brw_pool_alloc( struct brw_mem_pool *pool,
-			  GLuint size,
-			  GLuint align,
-			  GLuint *offset_return)
-{
-   GLuint align_mask = (1<<align)-1;
-   GLuint fixup = ((pool->offset + align_mask) & ~align_mask) - pool->offset;
-
-   size = (size + 3) & ~3;
-
-   if (pool->offset + fixup + size >= pool->size) {
-      _mesa_printf("%s failed\n", __FUNCTION__);
-      assert(0);
-      exit(0);
-   }
-
-   pool->offset += fixup;
-   *offset_return = pool->offset;
-   pool->offset += size; 
-  
-   return GL_TRUE;
-}
-
-static
-void brw_invalidate_pool( struct intel_context *intel,
-			  struct brw_mem_pool *pool )
-{
-   if (INTEL_DEBUG & DEBUG_STATE)
-      _mesa_printf("\n\n\n %s \n\n\n", __FUNCTION__);
-   
-   bmBufferData(intel,
-		pool->buffer,
-		pool->size,
-		NULL,
-		0); 
-
-   pool->offset = 0;
-
-   brw_clear_all_caches(pool->brw);
-}
-
-static void brw_invalidate_pool_cb( struct intel_context *intel, void *ptr )
-{
-   struct brw_mem_pool *pool = (struct brw_mem_pool *) ptr;
-
-   pool->offset = 0;
-   brw_clear_all_caches(pool->brw);
-}
-
-
-
-static void brw_init_pool( struct brw_context *brw,
-			   GLuint pool_id,
-			   GLuint size )
-{
-   struct brw_mem_pool *pool = &brw->pool[pool_id];
-
-   pool->size = size;   
-   pool->brw = brw;
-   
-   bmGenBuffers(&brw->intel, "pool", 1, &pool->buffer, 12);
-
-   /* Also want to say not to wait on fences when data is presented
-    */
-   bmBufferSetInvalidateCB(&brw->intel, pool->buffer, 
-			   brw_invalidate_pool_cb, 
-			   pool,
-			   GL_TRUE);   
-
-   bmBufferData(&brw->intel,
-		pool->buffer,
-		pool->size,
-		NULL,
-		0); 
-
-}
-
-static void brw_destroy_pool( struct brw_context *brw,
-			      GLuint pool_id )
-{
-   struct brw_mem_pool *pool = &brw->pool[pool_id];
-   
-   bmDeleteBuffers(&brw->intel, 1, &pool->buffer);
-}
-
-
-void brw_pool_check_wrap( struct brw_context *brw,
-			  struct brw_mem_pool *pool )
-{
-   if (pool->offset > (pool->size * 3) / 4) {
-      if (brw->intel.aub_file)
-	 brw->intel.aub_wrap = 1;
-      else
-	 brw->state.dirty.brw |= BRW_NEW_CONTEXT;
-   }
-
-}
-
-void brw_init_pools( struct brw_context *brw )
-{
-   brw_init_pool(brw, BRW_GS_POOL, 0x80000);
-   brw_init_pool(brw, BRW_SS_POOL, 0x80000);
-}
-
-void brw_destroy_pools( struct brw_context *brw )
-{
-   brw_destroy_pool(brw, BRW_GS_POOL);
-   brw_destroy_pool(brw, BRW_SS_POOL);
-}
-
-
-void brw_invalidate_pools( struct brw_context *brw )
-{
-   brw_invalidate_pool(&brw->intel, &brw->pool[BRW_GS_POOL]);
-   brw_invalidate_pool(&brw->intel, &brw->pool[BRW_SS_POOL]);
-}
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 92c07c29624..5124535f2a6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -33,7 +33,6 @@
 
 #include "brw_context.h"
 #include "brw_state.h"
-#include "bufmgr.h"
 #include "intel_batchbuffer.h"
 
 /* This is used to initialize brw->state.atoms[].  We could use this
@@ -46,8 +45,6 @@ const struct brw_tracked_state *atoms[] =
 {
    &brw_check_fallback,
 
-   &brw_tnl_vertprog,
-   &brw_active_vertprog,
    &brw_wm_input_sizes,
    &brw_vs_prog,
    &brw_gs_prog, 
@@ -80,19 +77,17 @@ const struct brw_tracked_state *atoms[] =
     */
    &brw_invarient_state,
    &brw_state_base_address,
-   &brw_pipe_control,
 
    &brw_binding_table_pointers,
    &brw_blend_constant_color,
 
-   &brw_drawing_rect,
    &brw_depthbuffer,
 
    &brw_polygon_stipple,
    &brw_polygon_stipple_offset,
 
    &brw_line_stipple,
-
+   &brw_aa_line_parameters,
    /* Ordering of the commands below is documented as fixed.  
     */
 #if 0
@@ -103,6 +98,9 @@ const struct brw_tracked_state *atoms[] =
    &brw_psp_urb_cbs,
 #endif
 
+   &brw_drawing_rect,
+   &brw_indices,
+   &brw_vertices,
 
    NULL,			/* brw_constant_buffer */
 };
@@ -112,8 +110,7 @@ void brw_init_state( struct brw_context *brw )
 {
    GLuint i;
 
-   brw_init_pools(brw);
-   brw_init_caches(brw);
+   brw_init_cache(brw);
 
    brw->state.atoms = _mesa_malloc(sizeof(atoms));
    brw->state.nr_atoms = sizeof(atoms)/sizeof(*atoms);
@@ -138,9 +135,8 @@ void brw_destroy_state( struct brw_context *brw )
       brw->state.atoms = NULL;
    }
 
-   brw_destroy_caches(brw);
+   brw_destroy_cache(brw);
    brw_destroy_batch_cache(brw);
-   brw_destroy_pools(brw);   
 }
 
 /***********************************************************************
@@ -172,20 +168,146 @@ static void xor_states( struct brw_state_flags *result,
    result->cache = a->cache ^ b->cache;
 }
 
+static void
+brw_clear_validated_bos(struct brw_context *brw)
+{
+   int i;
+
+   /* Clear the last round of validated bos */
+   for (i = 0; i < brw->state.validated_bo_count; i++) {
+      dri_bo_unreference(brw->state.validated_bos[i]);
+      brw->state.validated_bos[i] = NULL;
+   }
+   brw->state.validated_bo_count = 0;
+}
+
+struct dirty_bit_map {
+   uint32_t bit;
+   char *name;
+   uint32_t count;
+};
+
+#define DEFINE_BIT(name) {name, #name, 0}
+
+static struct dirty_bit_map mesa_bits[] = {
+   DEFINE_BIT(_NEW_MODELVIEW),
+   DEFINE_BIT(_NEW_PROJECTION),
+   DEFINE_BIT(_NEW_TEXTURE_MATRIX),
+   DEFINE_BIT(_NEW_COLOR_MATRIX),
+   DEFINE_BIT(_NEW_ACCUM),
+   DEFINE_BIT(_NEW_COLOR),
+   DEFINE_BIT(_NEW_DEPTH),
+   DEFINE_BIT(_NEW_EVAL),
+   DEFINE_BIT(_NEW_FOG),
+   DEFINE_BIT(_NEW_HINT),
+   DEFINE_BIT(_NEW_LIGHT),
+   DEFINE_BIT(_NEW_LINE),
+   DEFINE_BIT(_NEW_PIXEL),
+   DEFINE_BIT(_NEW_POINT),
+   DEFINE_BIT(_NEW_POLYGON),
+   DEFINE_BIT(_NEW_POLYGONSTIPPLE),
+   DEFINE_BIT(_NEW_SCISSOR),
+   DEFINE_BIT(_NEW_STENCIL),
+   DEFINE_BIT(_NEW_TEXTURE),
+   DEFINE_BIT(_NEW_TRANSFORM),
+   DEFINE_BIT(_NEW_VIEWPORT),
+   DEFINE_BIT(_NEW_PACKUNPACK),
+   DEFINE_BIT(_NEW_ARRAY),
+   DEFINE_BIT(_NEW_RENDERMODE),
+   DEFINE_BIT(_NEW_BUFFERS),
+   DEFINE_BIT(_NEW_MULTISAMPLE),
+   DEFINE_BIT(_NEW_TRACK_MATRIX),
+   DEFINE_BIT(_NEW_PROGRAM),
+   {0, 0, 0}
+};
+
+static struct dirty_bit_map brw_bits[] = {
+   DEFINE_BIT(BRW_NEW_URB_FENCE),
+   DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM),
+   DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM),
+   DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS),
+   DEFINE_BIT(BRW_NEW_CURBE_OFFSETS),
+   DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE),
+   DEFINE_BIT(BRW_NEW_PRIMITIVE),
+   DEFINE_BIT(BRW_NEW_CONTEXT),
+   DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
+   DEFINE_BIT(BRW_NEW_INPUT_VARYING),
+   DEFINE_BIT(BRW_NEW_PSP),
+   DEFINE_BIT(BRW_NEW_METAOPS),
+   DEFINE_BIT(BRW_NEW_FENCE),
+   DEFINE_BIT(BRW_NEW_INDICES),
+   DEFINE_BIT(BRW_NEW_VERTICES),
+   DEFINE_BIT(BRW_NEW_BATCH),
+   DEFINE_BIT(BRW_NEW_DEPTH_BUFFER),
+   {0, 0, 0}
+};
+
+static struct dirty_bit_map cache_bits[] = {
+   DEFINE_BIT(CACHE_NEW_CC_VP),
+   DEFINE_BIT(CACHE_NEW_CC_UNIT),
+   DEFINE_BIT(CACHE_NEW_WM_PROG),
+   DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR),
+   DEFINE_BIT(CACHE_NEW_SAMPLER),
+   DEFINE_BIT(CACHE_NEW_WM_UNIT),
+   DEFINE_BIT(CACHE_NEW_SF_PROG),
+   DEFINE_BIT(CACHE_NEW_SF_VP),
+   DEFINE_BIT(CACHE_NEW_SF_UNIT),
+   DEFINE_BIT(CACHE_NEW_VS_UNIT),
+   DEFINE_BIT(CACHE_NEW_VS_PROG),
+   DEFINE_BIT(CACHE_NEW_GS_UNIT),
+   DEFINE_BIT(CACHE_NEW_GS_PROG),
+   DEFINE_BIT(CACHE_NEW_CLIP_VP),
+   DEFINE_BIT(CACHE_NEW_CLIP_UNIT),
+   DEFINE_BIT(CACHE_NEW_CLIP_PROG),
+   DEFINE_BIT(CACHE_NEW_SURFACE),
+   DEFINE_BIT(CACHE_NEW_SURF_BIND),
+   {0, 0, 0}
+};
+
+
+static void
+brw_update_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
+{
+   int i;
+
+   for (i = 0; i < 32; i++) {
+      if (bit_map[i].bit == 0)
+	 return;
+
+      if (bit_map[i].bit & bits)
+	 bit_map[i].count++;
+   }
+}
+
+static void
+brw_print_dirty_count(struct dirty_bit_map *bit_map, int32_t bits)
+{
+   int i;
+
+   for (i = 0; i < 32; i++) {
+      if (bit_map[i].bit == 0)
+	 return;
+
+      fprintf(stderr, "0x%08x: %12d (%s)\n",
+	      bit_map[i].bit, bit_map[i].count, bit_map[i].name);
+   }
+}
 
 /***********************************************************************
  * Emit all state:
  */
 void brw_validate_state( struct brw_context *brw )
 {
+   struct intel_context *intel = &brw->intel;
    struct brw_state_flags *state = &brw->state.dirty;
    GLuint i;
 
+   brw_clear_validated_bos(brw);
+
    state->mesa |= brw->intel.NewGLState;
    brw->intel.NewGLState = 0;
 
-   if (brw->wrap)
-      state->brw |= BRW_NEW_CONTEXT;
+   brw_add_validated_bo(brw, intel->batch->buf);
 
    if (brw->emit_state_always) {
       state->mesa |= ~0;
@@ -201,6 +323,10 @@ void brw_validate_state( struct brw_context *brw )
       brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
    }
 
+   if (brw->vertex_program != brw->attribs.VertexProgram->_Current) {
+      brw->vertex_program = brw->attribs.VertexProgram->_Current;
+      brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
+   }
 
    if (state->mesa == 0 &&
        state->cache == 0 &&
@@ -210,13 +336,31 @@ void brw_validate_state( struct brw_context *brw )
    if (brw->state.dirty.brw & BRW_NEW_CONTEXT)
       brw_clear_batch_cache_flush(brw);
 
+   brw->intel.Fallback = 0;
 
-   /* Make an early reference to the state pools, as we don't cope
-    * well with them being evicted from here down.
-    */
-   (void)bmBufferOffset(&brw->intel, brw->pool[BRW_GS_POOL].buffer);
-   (void)bmBufferOffset(&brw->intel, brw->pool[BRW_SS_POOL].buffer);
-   (void)bmBufferOffset(&brw->intel, brw->intel.batch->buffer);
+   /* do prepare stage for all atoms */
+   for (i = 0; i < Elements(atoms); i++) {
+      const struct brw_tracked_state *atom = brw->state.atoms[i];
+
+      if (brw->intel.Fallback)
+         break;
+
+      if (check_state(state, &atom->dirty)) {
+         if (atom->prepare) {
+            atom->prepare(brw);
+        }
+      }
+   }
+}
+
+
+void brw_upload_state(struct brw_context *brw)
+{
+   struct brw_state_flags *state = &brw->state.dirty;
+   int i;
+   static int dirty_count = 0;
+
+   brw_clear_validated_bos(brw);
 
    if (INTEL_DEBUG) {
       /* Debug version which enforces various sanity checks on the
@@ -234,12 +378,14 @@ void brw_validate_state( struct brw_context *brw )
 	 assert(atom->dirty.mesa ||
 		atom->dirty.brw ||
 		atom->dirty.cache);
-	 assert(atom->update);
+
+	 if (brw->intel.Fallback)
+	    break;
 
 	 if (check_state(state, &atom->dirty)) {
-	    brw->state.atoms[i]->update( brw );
-	    
-/* 	    emit_foo(brw); */
+	    if (atom->emit) {
+	       atom->emit( brw );
+	    }
 	 }
 
 	 accumulate_state(&examined, &atom->dirty);
@@ -255,10 +401,31 @@ void brw_validate_state( struct brw_context *brw )
    }
    else {
       for (i = 0; i < Elements(atoms); i++) {	 
-	 if (check_state(state, &brw->state.atoms[i]->dirty))
-	    brw->state.atoms[i]->update( brw );
+	 const struct brw_tracked_state *atom = brw->state.atoms[i];
+
+	 if (brw->intel.Fallback)
+	    break;
+
+	 if (check_state(state, &atom->dirty)) {
+	    if (atom->emit) {
+	       atom->emit( brw );
+	    }
+	 }
+      }
+   }
+
+   if (INTEL_DEBUG & DEBUG_STATE) {
+      brw_update_dirty_count(mesa_bits, state->mesa);
+      brw_update_dirty_count(brw_bits, state->brw);
+      brw_update_dirty_count(cache_bits, state->cache);
+      if (dirty_count++ % 1000 == 0) {
+	 brw_print_dirty_count(mesa_bits, state->mesa);
+	 brw_print_dirty_count(brw_bits, state->brw);
+	 brw_print_dirty_count(cache_bits, state->cache);
+	 fprintf(stderr, "\n");
       }
    }
 
-   memset(state, 0, sizeof(*state));
+   if (!brw->intel.Fallback)
+      memset(state, 0, sizeof(*state));
 }
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 10fee944e8d..4e577d0f6a8 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -141,7 +141,8 @@ struct brw_depthbuffer
       struct {
 	 GLuint pitch:18; 
 	 GLuint format:3; 
-	 GLuint pad:4;
+	 GLuint pad:2;
+	 GLuint software_tiled_rendering_mode:2;
 	 GLuint depth_offset_disable:1; 
 	 GLuint tile_walk:1; 
 	 GLuint tiled_surface:1; 
@@ -166,14 +167,64 @@ struct brw_depthbuffer
 
    union {
       struct {
-	 GLuint pad:12;
-	 GLuint min_array_element:9; 
+	 GLuint pad:10;
+	 GLuint min_array_element:11; 
 	 GLuint depth:11; 
       } bits;
       GLuint dword;
    } dword4;
 };
 
+struct brw_depthbuffer_g4x
+{
+   union header_union header;
+   
+   union {
+      struct {
+	 GLuint pitch:18; 
+	 GLuint format:3; 
+	 GLuint pad:2;
+	 GLuint software_tiled_rendering_mode:2;
+	 GLuint depth_offset_disable:1; 
+	 GLuint tile_walk:1; 
+	 GLuint tiled_surface:1; 
+	 GLuint pad2:1;
+	 GLuint surface_type:3; 
+      } bits;
+      GLuint dword;
+   } dword1;
+   
+   GLuint dword2_base_addr; 
+ 
+   union {
+      struct {
+	 GLuint pad:1;
+	 GLuint mipmap_layout:1; 
+	 GLuint lod:4; 
+	 GLuint width:13; 
+	 GLuint height:13; 
+      } bits;
+      GLuint dword;
+   } dword3;
+
+   union {
+      struct {
+	 GLuint pad:10;
+	 GLuint min_array_element:11; 
+	 GLuint depth:11; 
+      } bits;
+      GLuint dword;
+   } dword4;
+
+   union {
+      struct {
+         GLuint xoffset:16;
+         GLuint yoffset:16;
+      } bits;
+      GLuint dword;
+   } dword5;   /* NEW in Integrated Graphics Device */
+};
+
 struct brw_drawrect
 {
    struct header header;
@@ -213,6 +264,25 @@ struct brw_indexbuffer
    GLuint buffer_end; 
 };
 
+/* NEW in Integrated Graphics Device */
+struct brw_aa_line_parameters
+{
+   struct header header;
+
+   struct {
+      GLuint aa_coverage_scope:8;
+      GLuint pad0:8;
+      GLuint aa_coverage_bias:8;
+      GLuint pad1:8;
+   } bits0;
+
+   struct {
+      GLuint aa_coverage_endcap_slope:8;
+      GLuint pad0:8;
+      GLuint aa_coverage_endcap_bias:8;
+      GLuint pad1:8;
+   } bits1;
+};
 
 struct brw_line_stipple
 {   
@@ -239,39 +309,39 @@ struct brw_pipelined_state_pointers
    
    struct {
       GLuint pad:5;
-      GLuint offset:27; 
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
    } vs;
    
    struct
    {
       GLuint enable:1;
       GLuint pad:4;
-      GLuint offset:27; 
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
    } gs;
    
    struct
    {
       GLuint enable:1;
       GLuint pad:4;
-      GLuint offset:27; 
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
    } clp;
    
    struct
    {
       GLuint pad:5;
-      GLuint offset:27; 
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
    } sf;
 
    struct
    {
       GLuint pad:5;
-      GLuint offset:27; 
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
    } wm;
    
    struct
    {
       GLuint pad:5;
-      GLuint offset:27; /* KW: check me! */
+      GLuint offset:27; /* Offset from GENERAL_STATE_BASE. KW: check me! */
    } cc;
 };
 
@@ -315,7 +385,8 @@ struct brw_pipe_control
    {
       GLuint length:8;
       GLuint notify_enable:1;
-      GLuint pad:2;
+      GLuint texture_cache_flush_enable:1;
+      GLuint indirect_state_pointers_disable:1;
       GLuint instruction_state_cache_flush_enable:1;
       GLuint write_cache_flush_enable:1;
       GLuint depth_stall_enable:1;
@@ -473,7 +544,7 @@ struct thread0
    GLuint pad0:1;
    GLuint grf_reg_count:3; 
    GLuint pad1:2;
-   GLuint kernel_start_pointer:26; 
+   GLuint kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */
 };
 
 struct thread1
@@ -547,8 +618,8 @@ struct brw_clip_unit_state
       GLuint pad1:1;
       GLuint urb_entry_allocation_size:5; 
       GLuint pad2:1;
-      GLuint max_threads:1; 	/* may be less */
-      GLuint pad3:6;
+      GLuint max_threads:5; 	/* may be less */
+      GLuint pad3:2;
    } thread4;   
       
    struct
@@ -557,7 +628,7 @@ struct brw_clip_unit_state
       GLuint clip_mode:3; 
       GLuint userclip_enable_flags:8; 
       GLuint userclip_must_clip:1; 
-      GLuint pad1:1;
+      GLuint negative_w_clip_test:1;
       GLuint guard_band_enable:1; 
       GLuint viewport_z_clip_enable:1; 
       GLuint viewport_xy_clip_enable:1; 
@@ -637,7 +708,7 @@ struct brw_cc_unit_state
    struct
    {
       GLuint pad0:5; 
-      GLuint cc_viewport_state_offset:27; 
+      GLuint cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
    } cc4;
    
    struct
@@ -699,7 +770,7 @@ struct brw_sf_unit_state
       GLuint front_winding:1; 
       GLuint viewport_transform:1; 
       GLuint pad0:3;
-      GLuint sf_viewport_state_offset:27; 
+      GLuint sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
    } sf5;
    
    struct
@@ -724,7 +795,8 @@ struct brw_sf_unit_state
       GLuint use_point_size_state:1; 
       GLuint subpixel_precision:1; 
       GLuint sprite_point:1; 
-      GLuint pad0:11;
+      GLuint pad0:10;
+      GLuint aa_line_distance_mode:1;
       GLuint trifan_pv:2; 
       GLuint linestrip_pv:2; 
       GLuint tristrip_pv:2; 
@@ -749,8 +821,8 @@ struct brw_gs_unit_state
       GLuint pad1:1;
       GLuint urb_entry_allocation_size:5; 
       GLuint pad2:1;
-      GLuint max_threads:1; 
-      GLuint pad3:6;
+      GLuint max_threads:5; 
+      GLuint pad3:2;
    } thread4;   
       
    struct
@@ -764,9 +836,14 @@ struct brw_gs_unit_state
    struct
    {
       GLuint max_vp_index:4; 
-      GLuint pad0:26;
-      GLuint reorder_enable:1; 
+      GLuint pad0:12;
+      GLuint svbi_post_inc_value:10;
       GLuint pad1:1;
+      GLuint svbi_post_inc_enable:1;
+      GLuint svbi_payload:1;
+      GLuint discard_adjaceny:1;
+      GLuint reorder_enable:1; 
+      GLuint pad2:1;
    } gs6;
 };
 
@@ -786,8 +863,8 @@ struct brw_vs_unit_state
       GLuint pad1:1;
       GLuint urb_entry_allocation_size:5; 
       GLuint pad2:1;
-      GLuint max_threads:4; 
-      GLuint pad3:3;
+      GLuint max_threads:6; 
+      GLuint pad3:1;
    } thread4;   
 
    struct
@@ -815,7 +892,7 @@ struct brw_wm_unit_state
    
    struct {
       GLuint stats_enable:1; 
-      GLuint pad0:1;
+      GLuint depth_buffer_clear:1;
       GLuint sampler_count:3; 
       GLuint sampler_state_pointer:27; 
    } wm4;
@@ -825,7 +902,9 @@ struct brw_wm_unit_state
       GLuint enable_8_pix:1; 
       GLuint enable_16_pix:1; 
       GLuint enable_32_pix:1; 
-      GLuint pad0:7;
+      GLuint enable_con_32_pix:1;
+      GLuint enable_con_64_pix:1;
+      GLuint pad0:5;
       GLuint legacy_global_depth_bias:1; 
       GLuint line_stipple:1; 
       GLuint depth_offset:1; 
@@ -838,9 +917,8 @@ struct brw_wm_unit_state
       GLuint program_computes_depth:1; 
       GLuint program_uses_killpixel:1; 
       GLuint legacy_line_rast: 1; 
-      GLuint pad1:1; 
-      GLuint max_threads:6; 
-      GLuint pad2:1;
+      GLuint transposed_urb_read_enable:1; 
+      GLuint max_threads:7; 
    } wm5;
    
    GLfloat global_depth_offset_constant;  
@@ -924,6 +1002,7 @@ struct brw_sf_viewport
       GLfloat m32;  
    } viewport;
 
+   /* scissor coordinates are inclusive */
    struct {
       GLshort xmin;
       GLshort ymin;
@@ -978,10 +1057,26 @@ struct brw_surface_state
    } ss3;
    
    struct {
-      GLuint pad:19;
-      GLuint min_array_elt:9; 
+      GLuint multisample_position_palette_index:3;
+      GLuint pad1:1;
+      GLuint num_multisamples:3;
+      GLuint pad0:1;
+      GLuint render_target_view_extent:9;
+      GLuint min_array_elt:11;
       GLuint min_lod:4; 
    } ss4;
+
+   struct {
+      GLuint pad1:16;
+      GLuint llc_mapping:1;
+      GLuint mlc_mapping:1;
+      GLuint gfdt:1;
+      GLuint gfdt_src:1;
+      GLuint y_offset:4;
+      GLuint pad0:1;
+      GLuint x_offset:7;
+   } ss5;   /* NEW in Integrated Graphics Device */
+
 };
 
 
@@ -1301,6 +1396,17 @@ struct brw_instruction
 	 GLuint end_of_thread:1;
       } sampler;
 
+      struct {
+         GLuint binding_table_index:8;
+         GLuint sampler:4;
+         GLuint msg_type:4;
+         GLuint response_length:4;
+         GLuint msg_length:4;
+         GLuint msg_target:4;
+         GLuint pad1:3;
+         GLuint end_of_thread:1;
+      } sampler_g4x;
+
       struct brw_urb_immediate urb;
 
       struct {
diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c
index 9d4b9867d24..0bb6f176a0d 100644
--- a/src/mesa/drivers/dri/i965/brw_tex.c
+++ b/src/mesa/drivers/dri/i965/brw_tex.c
@@ -30,165 +30,30 @@
   */
         
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "image.h"
-#include "teximage.h"
-#include "texstore.h"
-#include "texformat.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/teximage.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
+
 #include "texmem.h"
 
 #include "intel_context.h"
-#include "intel_ioctl.h"
 #include "intel_regions.h"
+#include "intel_tex.h"
 #include "brw_context.h"
 #include "brw_defines.h"
 
 
-
-
-static const struct gl_texture_format *
-brwChooseTextureFormat( GLcontext *ctx, GLint internalFormat,
-			 GLenum srcFormat, GLenum srcType )
-{
-   switch ( internalFormat ) {
-   case 4:
-   case GL_RGBA:
-   case GL_COMPRESSED_RGBA:
-      if (srcFormat == GL_BGRA && srcType == GL_UNSIGNED_SHORT_4_4_4_4_REV)
-	 return &_mesa_texformat_argb4444;
-      else if (srcFormat == GL_BGRA && srcType == GL_UNSIGNED_SHORT_1_5_5_5_REV)
-	 return &_mesa_texformat_argb1555;
-      else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
-	       (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE) ||
-	       (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8)) 
-	 return &_mesa_texformat_rgba8888_rev;
-      else
-	 return &_mesa_texformat_argb8888;
-
-   case GL_RGBA8:
-   case GL_RGB10_A2:
-   case GL_RGBA12:
-   case GL_RGBA16:
-      return &_mesa_texformat_argb8888; 
-
-   case GL_RGB8:
-   case GL_RGB10:
-   case GL_RGB12:
-   case GL_RGB16:
-      /* Broadwater doesn't support RGB888 textures, so these must be
-       * stored as ARGB.
-       */
-      return &_mesa_texformat_argb8888;
-
-   case 3:
-   case GL_COMPRESSED_RGB:
-   case GL_RGB:
-      if (srcFormat == GL_RGB &&
-	  srcType == GL_UNSIGNED_SHORT_5_6_5)
-	 return &_mesa_texformat_rgb565;
-      else
-	 return &_mesa_texformat_argb8888;
-
-
-   case GL_RGB5:
-   case GL_RGB5_A1:
-      return &_mesa_texformat_argb1555;
-
-   case GL_R3_G3_B2:
-   case GL_RGBA2:
-   case GL_RGBA4:
-   case GL_RGB4:
-      return &_mesa_texformat_argb4444;
-
-   case GL_ALPHA:
-   case GL_ALPHA4:
-   case GL_ALPHA8:
-   case GL_ALPHA12:
-   case GL_ALPHA16:
-   case GL_COMPRESSED_ALPHA:
-      return &_mesa_texformat_a8;
-
-   case 1:
-   case GL_LUMINANCE:
-   case GL_LUMINANCE4:
-   case GL_LUMINANCE8:
-   case GL_LUMINANCE12:
-   case GL_LUMINANCE16:
-   case GL_COMPRESSED_LUMINANCE:
-      return &_mesa_texformat_l8;
-
-   case 2:
-   case GL_LUMINANCE_ALPHA:
-   case GL_LUMINANCE4_ALPHA4:
-   case GL_LUMINANCE6_ALPHA2:
-   case GL_LUMINANCE8_ALPHA8:
-   case GL_LUMINANCE12_ALPHA4:
-   case GL_LUMINANCE12_ALPHA12:
-   case GL_LUMINANCE16_ALPHA16:
-   case GL_COMPRESSED_LUMINANCE_ALPHA:
-      return &_mesa_texformat_al88;
-
-   case GL_INTENSITY:
-   case GL_INTENSITY4:
-   case GL_INTENSITY8:
-   case GL_INTENSITY12:
-   case GL_INTENSITY16:
-   case GL_COMPRESSED_INTENSITY:
-      return &_mesa_texformat_i8;
-
-   case GL_YCBCR_MESA:
-      if (srcType == GL_UNSIGNED_SHORT_8_8_MESA ||
-	  srcType == GL_UNSIGNED_BYTE)
-         return &_mesa_texformat_ycbcr;
-      else
-         return &_mesa_texformat_ycbcr_rev;
-
-   case GL_COMPRESSED_RGB_FXT1_3DFX:
-       return &_mesa_texformat_rgb_fxt1;
-   case GL_COMPRESSED_RGBA_FXT1_3DFX:
-       return &_mesa_texformat_rgba_fxt1;
-
-   case GL_RGB_S3TC:
-   case GL_RGB4_S3TC:
-   case GL_RGBA_S3TC:
-   case GL_RGBA4_S3TC:
-   case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
-   case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
-   case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
-   case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
-     return &_mesa_texformat_rgb_dxt1; /* there is no rgba support? */
-
-   case GL_DEPTH_COMPONENT:
-   case GL_DEPTH_COMPONENT16:
-   case GL_DEPTH_COMPONENT24:
-   case GL_DEPTH_COMPONENT32:
-      return &_mesa_texformat_z16;
-
-   default:
-      fprintf(stderr, "unexpected texture format %s in %s\n", 
-	      _mesa_lookup_enum_by_nr(internalFormat),
-	      __FUNCTION__);
-      return NULL;
-   }
-
-   return NULL; /* never get here */
-}
-
-
-void brwInitTextureFuncs( struct dd_function_table *functions )
-{
-   functions->ChooseTextureFormat = brwChooseTextureFormat;
-}
-
-void brw_FrameBufferTexInit( struct brw_context *brw )
+void brw_FrameBufferTexInit( struct brw_context *brw,
+			     struct intel_region *region )
 {
    struct intel_context *intel = &brw->intel;
    GLcontext *ctx = &intel->ctx;
-   struct intel_region *region = intel->front_region;
    struct gl_texture_object *obj;
    struct gl_texture_image *img;
    
@@ -209,6 +74,26 @@ void brw_FrameBufferTexInit( struct brw_context *brw )
 
 void brw_FrameBufferTexDestroy( struct brw_context *brw )
 {
-   brw->intel.ctx.Driver.DeleteTexture( &brw->intel.ctx,
-					brw->intel.frame_buffer_texobj );
+   if (brw->intel.frame_buffer_texobj != NULL)
+      brw->intel.ctx.Driver.DeleteTexture( &brw->intel.ctx,
+					   brw->intel.frame_buffer_texobj );
+   brw->intel.frame_buffer_texobj = NULL;
+}
+
+/**
+ * Finalizes all textures, completing any rendering that needs to be done
+ * to prepare them.
+ */
+void brw_validate_textures( struct brw_context *brw )
+{
+   struct intel_context *intel = &brw->intel;
+   int i;
+
+   for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
+      struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
+
+      if (texUnit->_ReallyEnabled) {
+	 intel_finalize_mipmap_tree(intel, i);
+      }
+   }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index af1ad0f1ef1..51a617fcb40 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -35,10 +35,12 @@
 
 #include "intel_mipmap_tree.h"
 #include "intel_tex_layout.h"
-#include "macros.h"
+#include "intel_context.h"
+#include "main/macros.h"
 
+#define FILE_DEBUG_FLAG DEBUG_MIPTREE
 
-GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
+GLboolean brw_miptree_layout( struct intel_context *intel, struct intel_mipmap_tree *mt )
 {
    /* XXX: these vary depending on image format: 
     */
@@ -53,11 +55,20 @@ GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
       GLuint pack_x_pitch, pack_x_nr;
       GLuint pack_y_pitch;
       GLuint level;
+      GLuint align_h = 2;
+      GLuint align_w = 4;
 
-      mt->pitch = ((mt->width0 * mt->cpp + 3) & ~3) / mt->cpp;
       mt->total_height = 0;
+      
+      if (mt->compressed) {
+          align_w = intel_compressed_alignment(mt->internal_format);
+          mt->pitch = ALIGN(width, align_w);
+          pack_y_pitch = (height + 3) / 4;
+      } else {
+          mt->pitch = intel_miptree_pitch_align (intel, mt, mt->width0);
+          pack_y_pitch = ALIGN(mt->height0, align_h);
+      }
 
-      pack_y_pitch = MAX2(mt->height0, 2);
       pack_x_pitch = mt->pitch;
       pack_x_nr = 1;
 
@@ -83,26 +94,36 @@ GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
 
 
 	 mt->total_height += y;
-
-	 if (pack_x_pitch > 4) {
-	    pack_x_pitch >>= 1;
-	    pack_x_nr <<= 1;
-	    assert(pack_x_pitch * pack_x_nr <= mt->pitch);
-	 }
-
-	 if (pack_y_pitch > 2) {
-	    pack_y_pitch >>= 1;
-	 }
-
 	 width  = minify(width);
 	 height = minify(height);
 	 depth  = minify(depth);
+
+    if (mt->compressed) {
+        pack_y_pitch = (height + 3) / 4;
+        
+        if (pack_x_pitch > ALIGN(width, align_w)) {
+            pack_x_pitch = ALIGN(width, align_w);
+            pack_x_nr <<= 1;
+        }
+    } else {
+        if (pack_x_pitch > 4) {
+            pack_x_pitch >>= 1;
+            pack_x_nr <<= 1;
+            assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+        }
+
+        if (pack_y_pitch > 2) {
+            pack_y_pitch >>= 1;
+            pack_y_pitch = ALIGN(pack_y_pitch, align_h);
+        }
+    }
+
       }
       break;
    }
 
    default:
-      i945_miptree_layout_2d(mt);
+      i945_miptree_layout_2d(intel, mt);
       break;
    }
    DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__, 
diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c
index 64f5904ac68..7673dd36eb9 100644
--- a/src/mesa/drivers/dri/i965/brw_urb.c
+++ b/src/mesa/drivers/dri/i965/brw_urb.c
@@ -35,7 +35,6 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "brw_hal.h"
 
 #define VS 0
 #define GS 1
@@ -43,7 +42,44 @@
 #define SF 3
 #define CS 4
 
-/* XXX: Are the min_entry_size numbers useful?
+/** @file brw_urb.c
+ *
+ * Manages the division of the URB space between the various fixed-function
+ * units.
+ *
+ * See the Thread Initiation Management section of the GEN4 B-Spec, and
+ * the individual *_STATE structures for restrictions on numbers of
+ * entries and threads.
+ */
+
+/*
+ * Generally, a unit requires a min_nr_entries based on how many entries
+ * it produces before the downstream unit gets unblocked and can use and
+ * dereference some of its handles.
+ *
+ * The SF unit preallocates a PUE at the start of thread dispatch, and only
+ * uses that one.  So it requires one entry per thread.
+ *
+ * For CLIP, the SF unit will hold the previous primitive while the
+ * next is getting assembled, meaning that linestrips require 3 CLIP VUEs
+ * (vertices) to ensure continued processing, trifans require 4, and tristrips
+ * require 5.  There can be 1 or 2 threads, and each has the same requirement.
+ *
+ * GS has the same requirement as CLIP, but it never handles tristrips,
+ * so we can lower the minimum to 4 for the POLYGONs (trifans) it produces.
+ * We only run it single-threaded.
+ *
+ * For VS, the number of entries may be 8, 12, 16, or 32 (or 64 on G4X).
+ * Each thread processes 2 preallocated VUEs (vertices) at a time, and they
+ * get streamed down as soon as threads processing earlier vertices get
+ * theirs accepted.
+ *
+ * Each unit will take the number of URB entries we give it (based on the
+ * entry size calculated in brw_vs_emit.c for VUEs, brw_sf_emit.c for PUEs,
+ * and brw_curbe.c for the CURBEs) and decide its maximum number of
+ * threads it can support based on that. in brw_*_state.c.
+ *
+ * XXX: Are the min_entry_size numbers useful?
  * XXX: Verify min_nr_entries, esp for VS.
  * XXX: Verify SF min_entry_size.
  */
@@ -53,9 +89,9 @@ static const struct {
    GLuint min_entry_size;
    GLuint max_entry_size;
 } limits[CS+1] = {
-   { 8, 32, 1, 5 },			/* vs */
+   { 16, 32, 1, 5 },			/* vs */
    { 4, 8,  1, 5 },			/* gs */
-   { 6, 8,  1, 5 },			/* clp */
+   { 5, 10,  1, 5 },			/* clp */
    { 1, 8,  1, 12 },		        /* sf */
    { 1, 4,  1, 32 }			/* cs */
 };
@@ -69,7 +105,7 @@ static GLboolean check_urb_layout( struct brw_context *brw )
    brw->urb.sf_start = brw->urb.clip_start + brw->urb.nr_clip_entries * brw->urb.vsize;
    brw->urb.cs_start = brw->urb.sf_start + brw->urb.nr_sf_entries * brw->urb.sfsize;
 
-   return brw->urb.cs_start + brw->urb.nr_cs_entries * brw->urb.csize <= 256;
+   return brw->urb.cs_start + brw->urb.nr_cs_entries * brw->urb.csize <= URB_SIZES(brw);
 }
 
 /* Most minimal update, forces re-emit of URB fence packet after GS
@@ -81,20 +117,6 @@ static void recalculate_urb_fence( struct brw_context *brw )
    GLuint vsize = brw->vs.prog_data->urb_entry_size;
    GLuint sfsize = brw->sf.prog_data->urb_entry_size;
 
-   static GLboolean (*hal_recalculate_urb_fence) (struct brw_context *brw);
-   static GLboolean hal_tried;
-
-   if (!hal_tried)
-   {
-      hal_recalculate_urb_fence = brw_hal_find_symbol ("intel_hal_recalculate_urb_fence");
-      hal_tried = 1;
-   }
-   if (hal_recalculate_urb_fence)
-   {
-      if ((*hal_recalculate_urb_fence) (brw))
-	 return;
-   }
-   
    if (csize < limits[CS].min_entry_size)
       csize = limits[CS].min_entry_size;
 
@@ -107,9 +129,9 @@ static void recalculate_urb_fence( struct brw_context *brw )
    if (brw->urb.vsize < vsize ||
        brw->urb.sfsize < sfsize ||
        brw->urb.csize < csize ||
-       (brw->urb.constrained && (brw->urb.vsize > brw->urb.vsize ||
-				 brw->urb.sfsize > brw->urb.sfsize ||
-				 brw->urb.csize > brw->urb.csize))) {
+       (brw->urb.constrained && (brw->urb.vsize > vsize ||
+				 brw->urb.sfsize > sfsize ||
+				 brw->urb.csize > csize))) {
       
 
       brw->urb.csize = csize;
@@ -129,6 +151,10 @@ static void recalculate_urb_fence( struct brw_context *brw )
 	 brw->urb.nr_sf_entries = limits[SF].min_nr_entries;	
 	 brw->urb.nr_cs_entries = limits[CS].min_nr_entries;	
 
+	 /* Mark us as operating with constrained nr_entries, so that next
+	  * time we recalculate we'll resize the fences in the hope of
+	  * escaping constrained mode and getting back to normal performance.
+	  */
 	 brw->urb.constrained = 1;
 	 
 	 if (!check_urb_layout(brw)) {
@@ -153,7 +179,7 @@ static void recalculate_urb_fence( struct brw_context *brw )
 		      brw->urb.clip_start,
 		      brw->urb.sf_start,
 		      brw->urb.cs_start, 
-		      256);
+		      URB_SIZES(brw));
       
       brw->state.dirty.brw |= BRW_NEW_URB_FENCE;
    }
@@ -167,7 +193,7 @@ const struct brw_tracked_state brw_recalculate_urb_fence = {
       .cache = (CACHE_NEW_VS_PROG |
 		CACHE_NEW_SF_PROG)
    },
-   .update = recalculate_urb_fence
+   .prepare = recalculate_urb_fence
 };
 
 
@@ -191,25 +217,13 @@ void brw_upload_urb_fence(struct brw_context *brw)
    /* The ordering below is correct, not the layout in the
     * instruction.
     *
-    * There are 256 urb reg pairs in total.
+    * There are 256/384 urb reg pairs in total.
     */
    uf.bits0.vs_fence  = brw->urb.gs_start;
    uf.bits0.gs_fence  = brw->urb.clip_start; 
    uf.bits0.clp_fence = brw->urb.sf_start; 
    uf.bits1.sf_fence  = brw->urb.cs_start; 
-   uf.bits1.cs_fence  = 256;
+   uf.bits1.cs_fence  = URB_SIZES(brw);
 
    BRW_BATCH_STRUCT(brw, &uf);
 }
-
-
-#if 0
-const struct brw_tracked_state brw_urb_fence = {
-   .dirty = {
-      .mesa = 0,
-      .brw = BRW_NEW_URB_FENCE | BRW_NEW_PSP,
-      .cache = 0
-   },
-   .update = brw_upload_urb_fence
-};
-#endif
diff --git a/src/mesa/drivers/dri/i965/brw_util.c b/src/mesa/drivers/dri/i965/brw_util.c
index b6deee23769..ce21aa48695 100644
--- a/src/mesa/drivers/dri/i965/brw_util.c
+++ b/src/mesa/drivers/dri/i965/brw_util.c
@@ -30,7 +30,7 @@
   */
          
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "shader/prog_parameter.h"
 #include "brw_util.h"
 #include "brw_defines.h"
@@ -45,86 +45,6 @@ GLuint brw_count_bits( GLuint val )
 }
 
 
-static GLuint brw_parameter_state_flags(const gl_state_index state[])
-{
-   switch (state[0]) {
-   case STATE_MATERIAL:
-   case STATE_LIGHT:
-   case STATE_LIGHTMODEL_AMBIENT:
-   case STATE_LIGHTMODEL_SCENECOLOR:
-   case STATE_LIGHTPROD:
-      return _NEW_LIGHT;
-
-   case STATE_TEXGEN:
-   case STATE_TEXENV_COLOR:
-      return _NEW_TEXTURE;
-
-   case STATE_FOG_COLOR:
-   case STATE_FOG_PARAMS:
-      return _NEW_FOG;
-
-   case STATE_CLIPPLANE:
-      return _NEW_TRANSFORM;
-
-   case STATE_POINT_SIZE:
-   case STATE_POINT_ATTENUATION:
-      return _NEW_POINT;
-
-   case STATE_MODELVIEW_MATRIX:
-      return _NEW_MODELVIEW;
-   case STATE_PROJECTION_MATRIX:
-      return _NEW_PROJECTION;
-   case STATE_MVP_MATRIX:
-      return _NEW_MODELVIEW | _NEW_PROJECTION;
-   case STATE_TEXTURE_MATRIX:
-      return _NEW_TEXTURE_MATRIX;
-   case STATE_PROGRAM_MATRIX:
-      return _NEW_TRACK_MATRIX;
-
-   case STATE_DEPTH_RANGE:
-      return _NEW_VIEWPORT;
-
-   case STATE_FRAGMENT_PROGRAM:
-   case STATE_VERTEX_PROGRAM:
-      return _NEW_PROGRAM;
-
-   case STATE_INTERNAL:
-      switch (state[1]) {
-      case STATE_NORMAL_SCALE:
-	 return _NEW_MODELVIEW;
-      case STATE_TEXRECT_SCALE:
-	 return _NEW_TEXTURE;
-      default:
-	 assert(0);
-	 return 0;
-      }
-
-   default:
-      assert(0);
-      return 0;
-   }
-}
-
-
-GLuint
-brw_parameter_list_state_flags(struct gl_program_parameter_list *paramList)
-{
-   GLuint i;
-   GLuint result = 0;
-
-   if (!paramList)
-      return 0;
-
-   for (i = 0; i < paramList->NumParameters; i++) {
-      if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
-         result |= brw_parameter_state_flags(paramList->Parameters[i].StateIndexes);
-      }
-   }
-
-   return result;
-}
-
-
 GLuint brw_translate_blend_equation( GLenum mode )
 {
    switch (mode) {
diff --git a/src/mesa/drivers/dri/i965/brw_util.h b/src/mesa/drivers/dri/i965/brw_util.h
index bd6cc0a2682..33e7cd87e42 100644
--- a/src/mesa/drivers/dri/i965/brw_util.h
+++ b/src/mesa/drivers/dri/i965/brw_util.h
@@ -33,7 +33,7 @@
 #ifndef BRW_UTIL_H
 #define BRW_UTIL_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern GLuint brw_count_bits( GLuint val );
 extern GLuint brw_parameter_list_state_flags(struct gl_program_parameter_list *paramList);
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index e173f6fce3e..1db7ceebcfb 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -49,7 +49,7 @@ static void do_vs_prog( struct brw_context *brw,
    memset(&c, 0, sizeof(c));
    memcpy(&c.key, key, sizeof(*key));
 
-   brw_init_compile(&c.func);
+   brw_init_compile(brw, &c.func);
    c.vp = vp;
 
    c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
@@ -73,19 +73,17 @@ static void do_vs_prog( struct brw_context *brw,
     */
    program = brw_get_program(&c.func, &program_size);
 
-   /*
-    */
-   brw->vs.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_VS_PROG],
-					      &c.key,
-					      sizeof(c.key),
-					      program,
-					      program_size,
-					      &c.prog_data,
-					      &brw->vs.prog_data);
+   dri_bo_unreference(brw->vs.prog_bo);
+   brw->vs.prog_bo = brw_upload_cache( &brw->cache, BRW_VS_PROG,
+				       &c.key, sizeof(c.key),
+				       NULL, 0,
+				       program, program_size,
+				       &c.prog_data,
+				       &brw->vs.prog_data );
 }
 
 
-static void brw_upload_vs_prog( struct brw_context *brw )
+static void brw_upload_vs_prog(struct brw_context *brw)
 {
    struct brw_vs_prog_key key;
    struct brw_vertex_program *vp = 
@@ -110,13 +108,13 @@ static void brw_upload_vs_prog( struct brw_context *brw )
 
    /* Make an early check for the key.
     */
-   if (brw_search_cache(&brw->cache[BRW_VS_PROG], 
-			&key, sizeof(key),
-			&brw->vs.prog_data,
-			&brw->vs.prog_gs_offset))
-       return;
-
-   do_vs_prog(brw, vp, &key);
+   dri_bo_unreference(brw->vs.prog_bo);
+   brw->vs.prog_bo = brw_search_cache(&brw->cache, BRW_VS_PROG,
+				      &key, sizeof(key),
+				      NULL, 0,
+				      &brw->vs.prog_data);
+   if (brw->vs.prog_bo == NULL)
+      do_vs_prog(brw, vp, &key);
 }
 
 
@@ -128,5 +126,5 @@ const struct brw_tracked_state brw_vs_prog = {
       .brw   = BRW_NEW_VERTEX_PROGRAM | BRW_NEW_METAOPS,
       .cache = 0
    },
-   .update = brw_upload_vs_prog
+   .prepare = brw_upload_vs_prog
 };
diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h
index fdb5785d67d..22388ec99d0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.h
+++ b/src/mesa/drivers/dri/i965/brw_vs.h
@@ -36,7 +36,7 @@
 
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "program.h"
+#include "shader/program.h"
 
 
 struct brw_vs_prog_key {
@@ -67,6 +67,12 @@ struct brw_vs_compile {
    struct brw_reg r1;
    struct brw_reg regs[PROGRAM_ADDRESS+1][128];
    struct brw_reg tmp;
+   struct brw_reg stack;
+
+   struct {	
+       GLboolean used_in_src;
+       struct brw_reg reg;
+   } output_regs[128];
 
    struct brw_reg userplane[6];
 
@@ -74,8 +80,4 @@ struct brw_vs_compile {
 
 void brw_vs_emit( struct brw_vs_compile *c );
 
-
-void brw_ProgramCacheDestroy( GLcontext *ctx );
-void brw_ProgramCacheInit( GLcontext *ctx );
-
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c
index caef042f1cd..6fbac02de63 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_constval.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c
@@ -30,7 +30,7 @@
   */
             
 
-#include "macros.h"
+#include "main/macros.h"
 #include "brw_context.h"
 #include "brw_vs.h"
 
@@ -218,6 +218,6 @@ const struct brw_tracked_state brw_wm_input_sizes = {
       .brw   = BRW_NEW_VERTEX_PROGRAM | BRW_NEW_INPUT_DIMENSIONS,
       .cache = 0
    },
-   .update = calc_wm_input_sizes
+   .prepare = calc_wm_input_sizes
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 6eb11b19ad2..25b4ee85cb0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -30,8 +30,8 @@
   */
             
 
-#include "program.h"
-#include "macros.h"
+#include "main/macros.h"
+#include "shader/program.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_print.h"
 #include "brw_context.h"
@@ -134,6 +134,16 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c )
 					     WRITEMASK_X);
       reg++;
    }
+
+   for (i = 0; i < 128; i++) {
+       if (c->output_regs[i].used_in_src) {
+            c->output_regs[i].reg = brw_vec8_grf(reg, 0);
+            reg++;
+        }
+   }
+
+   c->stack =  brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, reg, 0);
+   reg += 2;
  
    
    /* Some opcodes need an internal temporary:
@@ -201,7 +211,7 @@ static void unalias2( struct brw_vs_compile *c,
 				    struct brw_reg,
 				    struct brw_reg ))
 {
-   if ((dst.file == arg0.file && dst.nr == arg0.nr) &&
+   if ((dst.file == arg0.file && dst.nr == arg0.nr) ||
        (dst.file == arg1.file && dst.nr == arg1.nr)) {
       struct brw_compile *p = &c->func;
       struct brw_reg tmp = brw_writemask(get_tmp(c), dst.dw1.bits.writemask);
@@ -213,57 +223,65 @@ static void unalias2( struct brw_vs_compile *c,
    }
 }
 
+static void emit_sop( struct brw_compile *p,
+                      struct brw_reg dst,
+                      struct brw_reg arg0,
+                      struct brw_reg arg1, 
+		      GLuint cond)
+{
+   brw_MOV(p, dst, brw_imm_f(0.0f));
+   brw_CMP(p, brw_null_reg(), cond, arg0, arg1);
+   brw_MOV(p, dst, brw_imm_f(1.0f));
+   brw_set_predicate_control_flag_value(p, 0xff);
+}
 
+static void emit_seq( struct brw_compile *p,
+                      struct brw_reg dst,
+                      struct brw_reg arg0,
+                      struct brw_reg arg1 )
+{
+   emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_EQ);
+}
 
-
+static void emit_sne( struct brw_compile *p,
+                      struct brw_reg dst,
+                      struct brw_reg arg0,
+                      struct brw_reg arg1 )
+{
+   emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_NEQ);
+}
 static void emit_slt( struct brw_compile *p, 
 		      struct brw_reg dst,
 		      struct brw_reg arg0,
 		      struct brw_reg arg1 )
 {
-   /* Could be done with an if/else/endif, but this method uses half
-    * the instructions.  Note that we are careful to reference the
-    * arguments before writing the dest.  That means we emit the
-    * instructions in an odd order and have to play with the flag
-    * values.
-    */
-   brw_push_insn_state(p);
-   brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0, arg1);
-
-   /* Write all values to 1:
-    */
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-   brw_MOV(p, dst, brw_imm_f(1.0));
+   emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_L);
+}
 
-   /* Where the test succeeded, overwite with zero:
-    */
-   brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
-   brw_MOV(p, dst, brw_imm_f(0.0));
-   brw_pop_insn_state(p);
+static void emit_sle( struct brw_compile *p, 
+		      struct brw_reg dst,
+		      struct brw_reg arg0,
+		      struct brw_reg arg1 )
+{
+   emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_LE);
 }
 
+static void emit_sgt( struct brw_compile *p, 
+		      struct brw_reg dst,
+		      struct brw_reg arg0,
+		      struct brw_reg arg1 )
+{
+   emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_G);
+}
 
 static void emit_sge( struct brw_compile *p, 
 		      struct brw_reg dst,
 		      struct brw_reg arg0,
 		      struct brw_reg arg1 )
 {
-   brw_push_insn_state(p);
-   brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0, arg1);
-
-   /* Write all values to zero:
-    */
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-   brw_MOV(p, dst, brw_imm_f(0));
-
-   /* Where the test succeeded, overwite with 1:
-    */
-   brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
-   brw_MOV(p, dst, brw_imm_f(1.0));
-   brw_pop_insn_state(p);
+  emit_sop(p, dst, arg0, arg1, BRW_CONDITIONAL_GE);
 }
 
-
 static void emit_max( struct brw_compile *p, 
 		      struct brw_reg dst,
 		      struct brw_reg arg0,
@@ -592,9 +610,13 @@ static struct brw_reg get_reg( struct brw_vs_compile *c,
    case PROGRAM_TEMPORARY:
    case PROGRAM_INPUT:
    case PROGRAM_OUTPUT:
-   case PROGRAM_STATE_VAR:
       assert(c->regs[file][index].nr != 0);
       return c->regs[file][index];
+   case PROGRAM_STATE_VAR:
+   case PROGRAM_CONSTANT:
+   case PROGRAM_UNIFORM:
+      assert(c->regs[PROGRAM_STATE_VAR][index].nr != 0);
+      return c->regs[PROGRAM_STATE_VAR][index];
    case PROGRAM_ADDRESS:
       assert(index == 0);
       return c->regs[file][index];
@@ -668,28 +690,28 @@ static void emit_arl( struct brw_vs_compile *c,
  * account.
  */
 static struct brw_reg get_arg( struct brw_vs_compile *c,
-			       struct prog_src_register src )
+			       struct prog_src_register *src )
 {
    struct brw_reg reg;
 
-   if (src.File == PROGRAM_UNDEFINED)
+   if (src->File == PROGRAM_UNDEFINED)
       return brw_null_reg();
 
-   if (src.RelAddr) 
-      reg = deref(c, c->regs[PROGRAM_STATE_VAR][0], src.Index);
+   if (src->RelAddr) 
+      reg = deref(c, c->regs[PROGRAM_STATE_VAR][0], src->Index);
    else
-      reg = get_reg(c, src.File, src.Index);
+      reg = get_reg(c, src->File, src->Index);
 
    /* Convert 3-bit swizzle to 2-bit.  
     */
-   reg.dw1.bits.swizzle = BRW_SWIZZLE4(GET_SWZ(src.Swizzle, 0),
-				       GET_SWZ(src.Swizzle, 1),
-				       GET_SWZ(src.Swizzle, 2),
-				       GET_SWZ(src.Swizzle, 3));
+   reg.dw1.bits.swizzle = BRW_SWIZZLE4(GET_SWZ(src->Swizzle, 0),
+				       GET_SWZ(src->Swizzle, 1),
+				       GET_SWZ(src->Swizzle, 2),
+				       GET_SWZ(src->Swizzle, 3));
 
    /* Note this is ok for non-swizzle instructions: 
     */
-   reg.negate = src.NegateBase ? 1 : 0;   
+   reg.negate = src->NegateBase ? 1 : 0;   
 
    return reg;
 }
@@ -796,8 +818,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
    }
 
 
-   /* Build ndc coords?   TODO: Shortcircuit when w is known to be one.
-    */
+   /* Build ndc coords */
    if (!c->key.know_w_is_one) {
       ndc = get_tmp(c);
       emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL);
@@ -807,12 +828,12 @@ static void emit_vertex_write( struct brw_vs_compile *c)
       ndc = pos;
    }
 
-   /* This includes the workaround for -ve rhw, so is no longer an
-    * optional step:
+   /* Update the header for point size, user clipping flags, and -ve rhw
+    * workaround.
     */
    if ((c->prog_data.outputs_written & (1<<VERT_RESULT_PSIZ)) ||
        c->key.nr_userclip ||
-       !c->key.know_w_is_one)
+       (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one))
    {
       struct brw_reg header1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
       GLuint i;
@@ -845,7 +866,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
        * Later, clipping will detect ucp[6] and ensure the primitive is
        * clipped against all fixed planes.
        */
-      if (!c->key.know_w_is_one) {
+      if (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one) {
 	 brw_CMP(p,
 		 vec8(brw_null_reg()),
 		 BRW_CONDITIONAL_L,
@@ -891,17 +912,50 @@ static void emit_vertex_write( struct brw_vs_compile *c)
 
 }
 
-
-
+static void 
+post_vs_emit( struct brw_vs_compile *c, struct brw_instruction *end_inst )
+{
+   GLuint nr_insns = c->vp->program.Base.NumInstructions;
+   GLuint insn, target_insn;
+   struct prog_instruction *inst1, *inst2;
+   struct brw_instruction *brw_inst1, *brw_inst2;
+   int offset;
+   for (insn = 0; insn < nr_insns; insn++) {
+       inst1 = &c->vp->program.Base.Instructions[insn];
+       brw_inst1 = inst1->Data;
+       switch (inst1->Opcode) {
+	   case OPCODE_CAL:
+	   case OPCODE_BRA:
+	       target_insn = inst1->BranchTarget;
+	       inst2 = &c->vp->program.Base.Instructions[target_insn];
+	       brw_inst2 = inst2->Data;
+	       offset = brw_inst2 - brw_inst1;
+	       brw_set_src1(brw_inst1, brw_imm_d(offset*16));
+	       break;
+	   case OPCODE_END:
+	       offset = end_inst - brw_inst1;
+	       brw_set_src1(brw_inst1, brw_imm_d(offset*16));
+	       break;
+	   default:
+	       break;
+       }
+   }
+}
 
 /* Emit the fragment program instructions here.
  */
-void brw_vs_emit( struct brw_vs_compile *c )
+void brw_vs_emit(struct brw_vs_compile *c )
 {
+#define MAX_IFSN 32
    struct brw_compile *p = &c->func;
    GLuint nr_insns = c->vp->program.Base.NumInstructions;
-   GLuint insn;
+   GLuint insn, if_insn = 0;
+   struct brw_instruction *end_inst;
+   struct brw_instruction *if_inst[MAX_IFSN];
+   struct brw_indirect stack_index = brw_indirect(0, 0);   
 
+   GLuint index;
+   GLuint file;
 
    if (INTEL_DEBUG & DEBUG_VS) {
       _mesa_printf("\n\n\nvs-emit:\n");
@@ -912,9 +966,24 @@ void brw_vs_emit( struct brw_vs_compile *c )
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_access_mode(p, BRW_ALIGN_16);
    
+   /* Message registers can't be read, so copy the output into GRF register
+      if they are used in source registers */
+   for (insn = 0; insn < nr_insns; insn++) {
+       GLuint i;
+       struct prog_instruction *inst = &c->vp->program.Base.Instructions[insn];
+       for (i = 0; i < 3; i++) {
+	   struct prog_src_register *src = &inst->SrcReg[i];
+	   GLuint index = src->Index;
+	   GLuint file = src->File;	
+	   if (file == PROGRAM_OUTPUT && index != VERT_RESULT_HPOS)
+	       c->output_regs[index].used_in_src = GL_TRUE;
+       }
+   }
+
    /* Static register allocation
     */
    brw_vs_alloc_regs(c);
+   brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
 
    for (insn = 0; insn < nr_insns; insn++) {
 
@@ -924,17 +993,29 @@ void brw_vs_emit( struct brw_vs_compile *c )
       
       /* Get argument regs.  SWZ is special and does this itself.
        */
+      inst->Data = &p->store[p->nr_insn];
       if (inst->Opcode != OPCODE_SWZ)
-	 for (i = 0; i < 3; i++) 
-	    args[i] = get_arg(c, inst->SrcReg[i]);
+	  for (i = 0; i < 3; i++) {
+	      struct prog_src_register *src = &inst->SrcReg[i];
+	      index = src->Index;
+	      file = src->File;	
+	      if (file == PROGRAM_OUTPUT&&c->output_regs[index].used_in_src)
+		  args[i] = c->output_regs[index].reg;
+	      else
+		  args[i] = get_arg(c, src);
+	  }
 
       /* Get dest regs.  Note that it is possible for a reg to be both
        * dst and arg, given the static allocation of registers.  So
        * care needs to be taken emitting multi-operation instructions.
-       */
-      dst = get_dst(c, inst->DstReg);
+       */ 
+      index = inst->DstReg.Index;
+      file = inst->DstReg.File;
+      if (file == PROGRAM_OUTPUT && c->output_regs[index].used_in_src)
+	  dst = c->output_regs[index].reg;
+      else
+	  dst = get_dst(c, inst->DstReg);
 
-      
       switch (inst->Opcode) {
       case OPCODE_ABS:
 	 brw_MOV(p, dst, brw_abs(args[0]));
@@ -942,6 +1023,9 @@ void brw_vs_emit( struct brw_vs_compile *c )
       case OPCODE_ADD:
 	 brw_ADD(p, dst, args[0], args[1]);
 	 break;
+      case OPCODE_COS:
+	 emit_math1(c, BRW_MATH_FUNCTION_COS, dst, args[0], BRW_MATH_PRECISION_FULL);
+	 break;
       case OPCODE_DP3:
 	 brw_DP3(p, dst, args[0], args[1]);
 	 break;
@@ -1003,12 +1087,28 @@ void brw_vs_emit( struct brw_vs_compile *c )
       case OPCODE_RSQ:
 	 emit_math1(c, BRW_MATH_FUNCTION_RSQ, dst, args[0], BRW_MATH_PRECISION_FULL);
 	 break;
+
+      case OPCODE_SEQ:
+         emit_seq(p, dst, args[0], args[1]);
+         break;
+      case OPCODE_SIN:
+	 emit_math1(c, BRW_MATH_FUNCTION_SIN, dst, args[0], BRW_MATH_PRECISION_FULL);
+	 break;
+      case OPCODE_SNE:
+         emit_sne(p, dst, args[0], args[1]);
+         break;
       case OPCODE_SGE:
 	 emit_sge(p, dst, args[0], args[1]);
 	 break;
+      case OPCODE_SGT:
+         emit_sgt(p, dst, args[0], args[1]);
+        break;
       case OPCODE_SLT:
 	 emit_slt(p, dst, args[0], args[1]);
 	 break;
+      case OPCODE_SLE:
+         emit_sle(p, dst, args[0], args[1]);
+         break;
       case OPCODE_SUB:
 	 brw_ADD(p, dst, args[0], negate(args[1]));
 	 break;
@@ -1021,21 +1121,85 @@ void brw_vs_emit( struct brw_vs_compile *c )
       case OPCODE_XPD:
 	 emit_xpd(p, dst, args[0], args[1]);
 	 break;
+      case OPCODE_IF:
+	 assert(if_insn < MAX_IFSN);
+         if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);
+	 break;
+      case OPCODE_ELSE:
+	 if_inst[if_insn-1] = brw_ELSE(p, if_inst[if_insn-1]);
+	 break;
+      case OPCODE_ENDIF:
+         assert(if_insn > 0);
+	 brw_ENDIF(p, if_inst[--if_insn]);
+	 break;			
+      case OPCODE_BRA:
+         brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+         brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+         brw_set_predicate_control_flag_value(p, 0xff);
+        break;
+      case OPCODE_CAL:
+	 brw_set_access_mode(p, BRW_ALIGN_1);
+	 brw_ADD(p, deref_1d(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16));
+	 brw_set_access_mode(p, BRW_ALIGN_16);
+	 brw_ADD(p, get_addr_reg(stack_index),
+			 get_addr_reg(stack_index), brw_imm_d(4));
+	 inst->Data = &p->store[p->nr_insn];
+	 brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+        break;
+      case OPCODE_RET:
+	 brw_ADD(p, get_addr_reg(stack_index),
+			 get_addr_reg(stack_index), brw_imm_d(-4));
+	 brw_set_access_mode(p, BRW_ALIGN_1);
+         brw_MOV(p, brw_ip_reg(), deref_1d(stack_index, 0));
+	 brw_set_access_mode(p, BRW_ALIGN_16);
       case OPCODE_END:	
+         brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+        break;
       case OPCODE_PRINT:
+      case OPCODE_BGNSUB:
+      case OPCODE_ENDSUB:
 	 break;
       default:
+	 _mesa_printf("Unsupported opcode %i (%s) in vertex shader\n",
+		      inst->Opcode, inst->Opcode < MAX_OPCODE ?
+				    _mesa_opcode_string(inst->Opcode) :
+				    "unknown");
 	 break;
       }
 
+      if ((inst->DstReg.File == PROGRAM_OUTPUT)
+          && (inst->DstReg.Index != VERT_RESULT_HPOS)
+          && c->output_regs[inst->DstReg.Index].used_in_src) {
+         brw_MOV(p, get_dst(c, inst->DstReg), dst);
+      }
+
+      /* Result color clamping.
+       *
+       * When destination register is an output register and
+       * it's primary/secondary front/back color, we have to clamp
+       * the result to [0,1]. This is done by enabling the
+       * saturation bit for the last instruction.
+       *
+       * We don't use brw_set_saturate() as it modifies
+       * p->current->header.saturate, which affects all the subsequent
+       * instructions. Instead, we directly modify the header
+       * of the last (already stored) instruction.
+       */
+      if (inst->DstReg.File == PROGRAM_OUTPUT) {
+         if ((inst->DstReg.Index == VERT_RESULT_COL0)
+             || (inst->DstReg.Index == VERT_RESULT_COL1)
+             || (inst->DstReg.Index == VERT_RESULT_BFC0)
+             || (inst->DstReg.Index == VERT_RESULT_BFC1)) {
+            p->store[p->nr_insn-1].header.saturate = 1;
+         }
+      }
+
       release_tmps(c);
    }
 
+   end_inst = &p->store[p->nr_insn];
    emit_vertex_write(c);
-
+   post_vs_emit(c, end_inst);
+   for (insn = 0; insn < nr_insns; insn++)
+       c->vp->program.Base.Instructions[insn].Data = NULL;
 }
-
-
-
-
-
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index c225bf8f5c5..942581696d8 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -34,62 +34,123 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "macros.h"
+#include "main/macros.h"
 
-static void upload_vs_unit( struct brw_context *brw )
-{
-   struct brw_vs_unit_state vs;
-
-   memset(&vs, 0, sizeof(vs));
+struct brw_vs_unit_key {
+   unsigned int total_grf;
+   unsigned int urb_entry_read_length;
+   unsigned int curb_entry_read_length;
 
-   /* CACHE_NEW_VS_PROG */
-   vs.thread0.kernel_start_pointer = brw->vs.prog_gs_offset >> 6;
-   vs.thread0.grf_reg_count = ((brw->vs.prog_data->total_grf-1) & ~15) / 16;
-   vs.thread3.urb_entry_read_length = brw->vs.prog_data->urb_read_length;
-   vs.thread3.const_urb_entry_read_length = brw->vs.prog_data->curb_read_length;
-   vs.thread3.dispatch_grf_start_reg = 1;
+   unsigned int curbe_offset;
 
+   unsigned int nr_urb_entries, urb_size;
+};
 
-   /* BRW_NEW_URB_FENCE  */
-   vs.thread4.nr_urb_entries = brw->urb.nr_vs_entries; 
-   vs.thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
-   vs.thread4.max_threads = MIN2(
-      MAX2(0, (brw->urb.nr_vs_entries - 6) / 2 - 1), 
-      15);
-
+static void
+vs_unit_populate_key(struct brw_context *brw, struct brw_vs_unit_key *key)
+{
+   memset(key, 0, sizeof(*key));
 
+   /* CACHE_NEW_VS_PROG */
+   key->total_grf = brw->vs.prog_data->total_grf;
+   key->urb_entry_read_length = brw->vs.prog_data->urb_read_length;
+   key->curb_entry_read_length = brw->vs.prog_data->curb_read_length;
 
-   if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
-      vs.thread4.max_threads = 0; 
+   /* BRW_NEW_URB_FENCE */
+   key->nr_urb_entries = brw->urb.nr_vs_entries;
+   key->urb_size = brw->urb.vsize;
 
    /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */
    if (brw->attribs.Transform->ClipPlanesEnabled) {
       /* Note that we read in the userclip planes as well, hence
        * clip_start:
        */
-      vs.thread3.const_urb_entry_read_offset = brw->curbe.clip_start * 2;
+      key->curbe_offset = brw->curbe.clip_start;
    }
    else {
-      vs.thread3.const_urb_entry_read_offset = brw->curbe.vs_start * 2;
+      key->curbe_offset = brw->curbe.vs_start;
    }
+}
+
+static dri_bo *
+vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
+{
+   struct brw_vs_unit_state vs;
+   dri_bo *bo;
+   int chipset_max_threads;
 
+   memset(&vs, 0, sizeof(vs));
+
+   vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */
+   vs.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
    vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+   /* Choosing multiple program flow means that we may get 2-vertex threads,
+    * which will have the channel mask for dwords 4-7 enabled in the thread,
+    * and those dwords will be written to the second URB handle when we
+    * brw_urb_WRITE() results.
+    */
+   vs.thread1.single_program_flow = 0;
+   vs.thread3.urb_entry_read_length = key->urb_entry_read_length;
+   vs.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
+   vs.thread3.dispatch_grf_start_reg = 1;
    vs.thread3.urb_entry_read_offset = 0;
+   vs.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
+
+   vs.thread4.nr_urb_entries = key->nr_urb_entries;
+   vs.thread4.urb_entry_allocation_size = key->urb_size - 1;
+
+   if (BRW_IS_G4X(brw))
+      chipset_max_threads = 32;
+   else
+      chipset_max_threads = 16;
+   vs.thread4.max_threads = CLAMP(key->nr_urb_entries / 2,
+				  1, chipset_max_threads) - 1;
+
+   if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
+      vs.thread4.max_threads = 0;
 
    /* No samplers for ARB_vp programs:
     */
    vs.vs5.sampler_count = 0;
 
    if (INTEL_DEBUG & DEBUG_STATS)
-      vs.thread4.stats_enable = 1; 
+      vs.thread4.stats_enable = 1;
 
-   /* Vertex program always enabled: 
+   /* Vertex program always enabled:
     */
    vs.vs6.vs_enable = 1;
 
-   brw->vs.state_gs_offset = brw_cache_data( &brw->cache[BRW_VS_UNIT], &vs );
+   bo = brw_upload_cache(&brw->cache, BRW_VS_UNIT,
+			 key, sizeof(*key),
+			 &brw->vs.prog_bo, 1,
+			 &vs, sizeof(vs),
+			 NULL, NULL);
+
+   /* Emit VS program relocation */
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION, 0,
+		     vs.thread0.grf_reg_count << 1,
+		     offsetof(struct brw_vs_unit_state, thread0),
+		     brw->vs.prog_bo);
+
+   return bo;
 }
 
+static void prepare_vs_unit(struct brw_context *brw)
+{
+   struct brw_vs_unit_key key;
+
+   vs_unit_populate_key(brw, &key);
+
+   dri_bo_unreference(brw->vs.state_bo);
+   brw->vs.state_bo = brw_search_cache(&brw->cache, BRW_VS_UNIT,
+				       &key, sizeof(key),
+				       &brw->vs.prog_bo, 1,
+				       NULL);
+   if (brw->vs.state_bo == NULL) {
+      brw->vs.state_bo = vs_unit_create_from_key(brw, &key);
+   }
+}
 
 const struct brw_tracked_state brw_vs_unit = {
    .dirty = {
@@ -98,5 +159,5 @@ const struct brw_tracked_state brw_vs_unit = {
 		BRW_NEW_URB_FENCE),
       .cache = CACHE_NEW_VS_PROG
    },
-   .update = upload_vs_unit
+   .prepare = prepare_vs_unit,
 };
diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
index b69be350a92..eacc289f1f1 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
@@ -30,1620 +30,18 @@
  */
 
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-#include "shader/prog_parameter.h"
-#include "shader/prog_print.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "brw_vs.h"
 #include "brw_state.h"
 
 
-struct state_key {
-   unsigned light_global_enabled:1;
-   unsigned light_local_viewer:1;
-   unsigned light_twoside:1;
-   unsigned light_color_material:1;
-   unsigned light_color_material_mask:12;
-   unsigned light_material_mask:12;
-   unsigned normalize:1;
-   unsigned rescale_normals:1;
-   unsigned fog_source_is_depth:1;
-   unsigned tnl_do_vertex_fog:1;
-   unsigned separate_specular:1;
-   unsigned fog_option:2;
-   unsigned point_attenuated:1;
-   unsigned texture_enabled_global:1;
-   unsigned fragprog_inputs_read:12;
-
-   struct {
-      unsigned light_enabled:1;
-      unsigned light_eyepos3_is_zero:1;
-      unsigned light_spotcutoff_is_180:1;
-      unsigned light_attenuated:1;      
-      unsigned texunit_really_enabled:1;
-      unsigned texmat_enabled:1;
-      unsigned texgen_enabled:4;
-      unsigned texgen_mode0:4;
-      unsigned texgen_mode1:4;
-      unsigned texgen_mode2:4;
-      unsigned texgen_mode3:4;
-   } unit[8];
-};
-
-
-
-#define FOG_NONE   0
-#define FOG_LINEAR 1
-#define FOG_EXP    2
-#define FOG_EXP2   3
-
-static GLuint translate_fog_mode( GLenum mode )
-{
-   switch (mode) {
-   case GL_LINEAR: return FOG_LINEAR;
-   case GL_EXP: return FOG_EXP;
-   case GL_EXP2: return FOG_EXP2;
-   default: return FOG_NONE;
-   }
-}
-
-#define TXG_NONE           0
-#define TXG_OBJ_LINEAR     1
-#define TXG_EYE_LINEAR     2
-#define TXG_SPHERE_MAP     3
-#define TXG_REFLECTION_MAP 4
-#define TXG_NORMAL_MAP     5
-
-static GLuint translate_texgen( GLboolean enabled, GLenum mode )
-{
-   if (!enabled)
-      return TXG_NONE;
-
-   switch (mode) {
-   case GL_OBJECT_LINEAR: return TXG_OBJ_LINEAR;
-   case GL_EYE_LINEAR: return TXG_EYE_LINEAR;
-   case GL_SPHERE_MAP: return TXG_SPHERE_MAP;
-   case GL_REFLECTION_MAP_NV: return TXG_REFLECTION_MAP;
-   case GL_NORMAL_MAP_NV: return TXG_NORMAL_MAP;
-   default: return TXG_NONE;
-   }
-}
-
-static void make_state_key( GLcontext *ctx, struct state_key *key )
-{
-   struct brw_context *brw = brw_context(ctx);
-   const struct gl_fragment_program *fp = brw->fragment_program;
-   GLuint i;
-
-   /* This now relies on texenvprogram.c being active:
-    */
-   assert(fp);
-
-   memset(key, 0, sizeof(*key));
-
-   /* BRW_NEW_FRAGMENT_PROGRAM */
-   key->fragprog_inputs_read = fp->Base.InputsRead;
-
-   /* _NEW_LIGHT */
-   key->separate_specular = (brw->attribs.Light->Model.ColorControl ==
-			     GL_SEPARATE_SPECULAR_COLOR);
-
-   /* _NEW_LIGHT */
-   if (brw->attribs.Light->Enabled) {
-      key->light_global_enabled = 1;
-
-      if (brw->attribs.Light->Model.LocalViewer)
-	 key->light_local_viewer = 1;
-
-      if (brw->attribs.Light->Model.TwoSide)
-	 key->light_twoside = 1;
-
-      if (brw->attribs.Light->ColorMaterialEnabled) {
-	 key->light_color_material = 1;
-	 key->light_color_material_mask = brw->attribs.Light->ColorMaterialBitmask;
-      }
-
-      /* BRW_NEW_INPUT_VARYING */
-
-      /* For these programs, material values are stuffed into the
-       * generic slots:
-       */
-      for (i = 0 ; i < MAT_ATTRIB_MAX ; i++) 
-	 if (brw->vb.info.varying & (1<<(VERT_ATTRIB_GENERIC0 + i))) 
-	    key->light_material_mask |= 1<<i;
-
-      for (i = 0; i < MAX_LIGHTS; i++) {
-	 struct gl_light *light = &brw->attribs.Light->Light[i];
-
-	 if (light->Enabled) {
-	    key->unit[i].light_enabled = 1;
-
-	    if (light->EyePosition[3] == 0.0)
-	       key->unit[i].light_eyepos3_is_zero = 1;
-	    
-	    if (light->SpotCutoff == 180.0)
-	       key->unit[i].light_spotcutoff_is_180 = 1;
-
-	    if (light->ConstantAttenuation != 1.0 ||
-		light->LinearAttenuation != 0.0 ||
-		light->QuadraticAttenuation != 0.0)
-	       key->unit[i].light_attenuated = 1;
-	 }
-      }
-   }
-
-   /* _NEW_TRANSFORM */
-   if (brw->attribs.Transform->Normalize)
-      key->normalize = 1;
-
-   if (brw->attribs.Transform->RescaleNormals)
-      key->rescale_normals = 1;
-
-   /* BRW_NEW_FRAGMENT_PROGRAM */
-   key->fog_option = translate_fog_mode(fp->FogOption);
-   if (key->fog_option)
-      key->fragprog_inputs_read |= FRAG_BIT_FOGC;
-   
-   /* _NEW_FOG */
-   if (brw->attribs.Fog->FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT)
-      key->fog_source_is_depth = 1;
-   
-   /* _NEW_HINT, ??? */
-   if (1)
-      key->tnl_do_vertex_fog = 1;
-
-   /* _NEW_POINT */
-   if (brw->attribs.Point->_Attenuated)
-      key->point_attenuated = 1;
-
-   /* _NEW_TEXTURE */
-   if (brw->attribs.Texture->_TexGenEnabled ||
-       brw->attribs.Texture->_TexMatEnabled ||
-       brw->attribs.Texture->_EnabledUnits)
-      key->texture_enabled_global = 1;
-      
-   for (i = 0; i < MAX_TEXTURE_UNITS; i++) {
-      struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
-
-      if (texUnit->_ReallyEnabled)
- 	 key->unit[i].texunit_really_enabled = 1;
-
-      if (brw->attribs.Texture->_TexMatEnabled & ENABLE_TEXMAT(i))      
-	 key->unit[i].texmat_enabled = 1;
-      
-      if (texUnit->TexGenEnabled) {
-	 key->unit[i].texgen_enabled = 1;
-      
-	 key->unit[i].texgen_mode0 = 
-	    translate_texgen( texUnit->TexGenEnabled & (1<<0),
-			      texUnit->GenModeS );
-	 key->unit[i].texgen_mode1 = 
-	    translate_texgen( texUnit->TexGenEnabled & (1<<1),
-			      texUnit->GenModeT );
-	 key->unit[i].texgen_mode2 = 
-	    translate_texgen( texUnit->TexGenEnabled & (1<<2),
-			      texUnit->GenModeR );
-	 key->unit[i].texgen_mode3 = 
-	    translate_texgen( texUnit->TexGenEnabled & (1<<3),
-			      texUnit->GenModeQ );
-      }
-   }
-}
-
-
-   
-/* Very useful debugging tool - produces annotated listing of
- * generated program with line/function references for each
- * instruction back into this file:
- */
-#define DISASSEM 0
-
-/* Should be tunable by the driver - do we want to do matrix
- * multiplications with DP4's or with MUL/MAD's?  SSE works better
- * with the latter, drivers may differ.
- */
-#define PREFER_DP4 1
-
-
-/* Use uregs to represent registers internally, translate to Mesa's
- * expected formats on emit.  
- *
- * NOTE: These are passed by value extensively in this file rather
- * than as usual by pointer reference.  If this disturbs you, try
- * remembering they are just 32bits in size.
- *
- * GCC is smart enough to deal with these dword-sized structures in
- * much the same way as if I had defined them as dwords and was using
- * macros to access and set the fields.  This is much nicer and easier
- * to evolve.
- */
-struct ureg {
-   GLuint file:4;
-   GLint idx:8;      /* relative addressing may be negative */
-   GLuint negate:1;
-   GLuint swz:12;
-   GLuint pad:7;
-};
-
-
-struct tnl_program {
-   const struct state_key *state;
-   struct gl_vertex_program *program;
-   
-   GLuint nr_instructions;
-   GLuint temp_in_use;
-   GLuint temp_reserved;
-   
-   struct ureg eye_position;
-   struct ureg eye_position_normalized;
-   struct ureg eye_normal;
-   struct ureg identity;
-
-   GLuint materials;
-   GLuint color_materials;
-};
-
-
-const static struct ureg undef = { 
-   PROGRAM_UNDEFINED,
-   ~0,
-   0,
-   0,
-   0
-};
-
-/* Local shorthand:
- */
-#define X    SWIZZLE_X
-#define Y    SWIZZLE_Y
-#define Z    SWIZZLE_Z
-#define W    SWIZZLE_W
-
-
-/* Construct a ureg:
- */
-static struct ureg make_ureg(GLuint file, GLint idx)
-{
-   struct ureg reg;
-   reg.file = file;
-   reg.idx = idx;
-   reg.negate = 0;
-   reg.swz = SWIZZLE_NOOP;
-   reg.pad = 0;
-   return reg;
-}
-
-
-
-static struct ureg ureg_negate( struct ureg reg )
-{
-   reg.negate ^= 1;
-   return reg;
-} 
-
-
-static struct ureg swizzle( struct ureg reg, int x, int y, int z, int w )
-{
-   reg.swz = MAKE_SWIZZLE4(GET_SWZ(reg.swz, x),
-			   GET_SWZ(reg.swz, y),
-			   GET_SWZ(reg.swz, z),
-			   GET_SWZ(reg.swz, w));
-
-   return reg;
-}
-
-static struct ureg swizzle1( struct ureg reg, int x )
-{
-   return swizzle(reg, x, x, x, x);
-}
-
-static struct ureg get_temp( struct tnl_program *p )
-{
-   int bit = ffs( ~p->temp_in_use );
-   if (!bit) {
-      fprintf(stderr, "%s: out of temporaries\n", __FILE__);
-      assert(0);
-   }
-
-   if (bit > p->program->Base.NumTemporaries)
-      p->program->Base.NumTemporaries = bit;
-
-   p->temp_in_use |= 1<<(bit-1);
-   return make_ureg(PROGRAM_TEMPORARY, bit-1);
-}
-
-static struct ureg reserve_temp( struct tnl_program *p )
-{
-   struct ureg temp = get_temp( p );
-   p->temp_reserved |= 1<<temp.idx;
-   return temp;
-}
-
-static void release_temp( struct tnl_program *p, struct ureg reg )
-{
-   if (reg.file == PROGRAM_TEMPORARY) {
-      p->temp_in_use &= ~(1<<reg.idx);
-      p->temp_in_use |= p->temp_reserved; /* can't release reserved temps */
-   }
-}
-
-static void release_temps( struct tnl_program *p )
-{
-   p->temp_in_use = p->temp_reserved;
-}
-
-
-
-static struct ureg register_input( struct tnl_program *p, GLuint input )
-{
-   assert(input < 32);
-
-   p->program->Base.InputsRead |= (1<<input);
-   return make_ureg(PROGRAM_INPUT, input);
-}
-
-static struct ureg register_output( struct tnl_program *p, GLuint output )
-{
-   p->program->Base.OutputsWritten |= (1<<output);
-   return make_ureg(PROGRAM_OUTPUT, output);
-}
-
-static struct ureg register_const4f( struct tnl_program *p, 
-			      GLfloat s0,
-			      GLfloat s1,
-			      GLfloat s2,
-			      GLfloat s3)
-{
-   GLfloat values[4];
-   GLint idx;
-   GLuint swizzle;
-   values[0] = s0;
-   values[1] = s1;
-   values[2] = s2;
-   values[3] = s3;
-   idx = _mesa_add_unnamed_constant( p->program->Base.Parameters, values, 4,
-                                     &swizzle);
-   /* XXX what about swizzle? */
-   return make_ureg(PROGRAM_STATE_VAR, idx);
-}
-
-#define register_const1f(p, s0)         register_const4f(p, s0, 0, 0, 1)
-#define register_scalar_const(p, s0)    register_const4f(p, s0, s0, s0, s0)
-#define register_const2f(p, s0, s1)     register_const4f(p, s0, s1, 0, 1)
-#define register_const3f(p, s0, s1, s2) register_const4f(p, s0, s1, s2, 1)
-
-static GLboolean is_undef( struct ureg reg )
-{
-   return reg.file == PROGRAM_UNDEFINED;
-}
-
-static struct ureg get_identity_param( struct tnl_program *p )
-{
-   if (is_undef(p->identity)) 
-      p->identity = register_const4f(p, 0,0,0,1);
-
-   return p->identity;
-}
-
-static struct ureg register_param5( struct tnl_program *p, 
-                                    GLint s0,
-                                    GLint s1,
-                                    GLint s2,
-                                    GLint s3,
-                                    GLint s4)
-{
-   gl_state_index tokens[STATE_LENGTH];
-   GLint idx;
-   tokens[0] = s0;
-   tokens[1] = s1;
-   tokens[2] = s2;
-   tokens[3] = s3;
-   tokens[4] = s4;
-   idx = _mesa_add_state_reference( p->program->Base.Parameters, tokens );
-   return make_ureg(PROGRAM_STATE_VAR, idx);
-}
-
-
-#define register_param1(p,s0)          register_param5(p,s0,0,0,0,0)
-#define register_param2(p,s0,s1)       register_param5(p,s0,s1,0,0,0)
-#define register_param3(p,s0,s1,s2)    register_param5(p,s0,s1,s2,0,0)
-#define register_param4(p,s0,s1,s2,s3) register_param5(p,s0,s1,s2,s3,0)
-
-
-static void register_matrix_param5( struct tnl_program *p,
-				    GLint s0, /* matrix name */
-				    GLint s1, /* texture matrix number */
-				    GLint s2, /* first row */
-				    GLint s3, /* last row */
-				    GLint s4, /* modifier */
-				    struct ureg *matrix )
-{
-   GLint i;
-
-   /* This is a bit sad as the support is there to pull the whole
-    * matrix out in one go:
-    */
-   for (i = 0; i <= s3 - s2; i++) 
-      matrix[i] = register_param5( p, s0, s1, i, i, s4 );
-}
-
-
-static void emit_arg( struct prog_src_register *src,
-		      struct ureg reg )
-{
-   src->File = reg.file;
-   src->Index = reg.idx;
-   src->Swizzle = reg.swz;
-   src->RelAddr = 0;
-   src->NegateBase = reg.negate;
-   src->Abs = 0;
-   src->NegateAbs = 0;
-}
-
-static void emit_dst( struct prog_dst_register *dst,
-		      struct ureg reg, GLuint mask )
-{
-   dst->File = reg.file;
-   dst->Index = reg.idx;
-   /* allow zero as a shorthand for xyzw */
-   dst->WriteMask = mask ? mask : WRITEMASK_XYZW; 
-   dst->CondMask = 0;
-   dst->CondSwizzle = 0;
-   dst->CondSrc = 0;
-   dst->pad = 0;
-}
-
-static void debug_insn( struct prog_instruction *inst, const char *fn,
-			GLuint line )
-{
-   if (DISASSEM) {
-      static const char *last_fn;
-   
-      if (fn != last_fn) {
-	 last_fn = fn;
-	 _mesa_printf("%s:\n", fn);
-      }
-	 
-      _mesa_printf("%d:\t", line);
-      _mesa_print_instruction(inst);
-   }
-}
-
-
-static void emit_op3fn(struct tnl_program *p,
-		       GLuint op,
-		       struct ureg dest,
-		       GLuint mask,
-		       struct ureg src0,
-		       struct ureg src1,
-		       struct ureg src2,
-		       const char *fn,
-		       GLuint line)
-{
-   GLuint nr = p->program->Base.NumInstructions++;
-      
-   if (nr >= p->nr_instructions) {
-      p->program->Base.Instructions = 
-	 _mesa_realloc(p->program->Base.Instructions,
-		       sizeof(struct prog_instruction) * p->nr_instructions,
-		       sizeof(struct prog_instruction) * (p->nr_instructions *= 2));
-   }
-
-   {      
-      struct prog_instruction *inst = &p->program->Base.Instructions[nr];
-      memset(inst, 0, sizeof(*inst));
-      inst->Opcode = op; 
-      inst->StringPos = 0;
-      inst->Data = 0;
-   
-      emit_arg( &inst->SrcReg[0], src0 );
-      emit_arg( &inst->SrcReg[1], src1 );
-      emit_arg( &inst->SrcReg[2], src2 );   
-
-      emit_dst( &inst->DstReg, dest, mask );
-
-      debug_insn(inst, fn, line);
-   }
-}
-
-   
-
-#define emit_op3(p, op, dst, mask, src0, src1, src2) \
-   emit_op3fn(p, op, dst, mask, src0, src1, src2, __FUNCTION__, __LINE__)
-
-#define emit_op2(p, op, dst, mask, src0, src1) \
-    emit_op3fn(p, op, dst, mask, src0, src1, undef, __FUNCTION__, __LINE__)
-
-#define emit_op1(p, op, dst, mask, src0) \
-    emit_op3fn(p, op, dst, mask, src0, undef, undef, __FUNCTION__, __LINE__)
-
-
-static struct ureg make_temp( struct tnl_program *p, struct ureg reg )
-{
-   if (reg.file == PROGRAM_TEMPORARY && 
-       !(p->temp_reserved & (1<<reg.idx)))
-      return reg;
-   else {
-      struct ureg temp = get_temp(p);
-      emit_op1(p, OPCODE_MOV, temp, 0, reg);
-      return temp;
-   }
-}
-
-
-/* Currently no tracking performed of input/output/register size or
- * active elements.  Could be used to reduce these operations, as
- * could the matrix type.
- */
-static void emit_matrix_transform_vec4( struct tnl_program *p,
-					struct ureg dest,
-					const struct ureg *mat,
-					struct ureg src)
-{
-   emit_op2(p, OPCODE_DP4, dest, WRITEMASK_X, src, mat[0]);
-   emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Y, src, mat[1]);
-   emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Z, src, mat[2]);
-   emit_op2(p, OPCODE_DP4, dest, WRITEMASK_W, src, mat[3]);
-}
-
-/* This version is much easier to implement if writemasks are not
- * supported natively on the target or (like SSE), the target doesn't
- * have a clean/obvious dotproduct implementation.
- */
-static void emit_transpose_matrix_transform_vec4( struct tnl_program *p,
-						  struct ureg dest,
-						  const struct ureg *mat,
-						  struct ureg src)
-{
-   struct ureg tmp;
-
-   if (dest.file != PROGRAM_TEMPORARY)
-      tmp = get_temp(p);
-   else
-      tmp = dest;
-
-   emit_op2(p, OPCODE_MUL, tmp, 0, swizzle1(src,X), mat[0]);
-   emit_op3(p, OPCODE_MAD, tmp, 0, swizzle1(src,Y), mat[1], tmp);
-   emit_op3(p, OPCODE_MAD, tmp, 0, swizzle1(src,Z), mat[2], tmp);
-   emit_op3(p, OPCODE_MAD, dest, 0, swizzle1(src,W), mat[3], tmp);
-
-   if (dest.file != PROGRAM_TEMPORARY)
-      release_temp(p, tmp);
-}
-
-static void emit_matrix_transform_vec3( struct tnl_program *p,
-					struct ureg dest,
-					const struct ureg *mat,
-					struct ureg src)
-{
-   emit_op2(p, OPCODE_DP3, dest, WRITEMASK_X, src, mat[0]);
-   emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Y, src, mat[1]);
-   emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Z, src, mat[2]);
-}
-
-
-static void emit_normalize_vec3( struct tnl_program *p,
-				 struct ureg dest,
-				 struct ureg src )
-{
-   emit_op2(p, OPCODE_DP3, dest, WRITEMASK_W, src, src);
-   emit_op1(p, OPCODE_RSQ, dest, WRITEMASK_W, swizzle1(dest,W));
-   emit_op2(p, OPCODE_MUL, dest, WRITEMASK_XYZ, src, swizzle1(dest,W));
-}
-
-static void emit_passthrough( struct tnl_program *p, 
-			      GLuint input,
-			      GLuint output )
-{
-   struct ureg out = register_output(p, output);
-   emit_op1(p, OPCODE_MOV, out, 0, register_input(p, input)); 
-}
-
-static struct ureg get_eye_position( struct tnl_program *p )
-{
-   if (is_undef(p->eye_position)) {
-      struct ureg pos = register_input( p, VERT_ATTRIB_POS ); 
-      struct ureg modelview[4];
-
-      p->eye_position = reserve_temp(p);
-
-      if (PREFER_DP4) {
-	 register_matrix_param5( p, STATE_MODELVIEW_MATRIX, 0, 0, 3, 
-				 0, modelview );
-
-	 emit_matrix_transform_vec4(p, p->eye_position, modelview, pos);
-      }
-      else {
-	 register_matrix_param5( p, STATE_MODELVIEW_MATRIX, 0, 0, 3, 
-				 STATE_MATRIX_TRANSPOSE, modelview );
-
-	 emit_transpose_matrix_transform_vec4(p, p->eye_position, modelview, pos);
-      }
-   }
-   
-   return p->eye_position;
-}
-
-
-#if 0
-static struct ureg get_eye_z( struct tnl_program *p )
-{
-   if (!is_undef(p->eye_position)) {
-      return swizzle1(p->eye_position, Z);
-   }
-   else if (!is_undef(p->eye_z)) {
-      struct ureg pos = register_input( p, BRW_ATTRIB_POS ); 
-      struct ureg modelview2;
-
-      p->eye_z = reserve_temp(p);
-
-      register_matrix_param6( p, STATE_MATRIX, STATE_MODELVIEW, 0, 2, 1, 
-			      STATE_MATRIX, &modelview2 );
-
-      emit_matrix_transform_vec4(p, p->eye_position, modelview, pos);
-      emit_op2(p, OPCODE_DP4, p->eye_z, WRITEMASK_Z, pos, modelview2);
-   }
-   
-   return swizzle1(p->eye_z, Z)
-}
-#endif
-
-
-
-static struct ureg get_eye_position_normalized( struct tnl_program *p )
-{
-   if (is_undef(p->eye_position_normalized)) {
-      struct ureg eye = get_eye_position(p);
-      p->eye_position_normalized = reserve_temp(p);
-      emit_normalize_vec3(p, p->eye_position_normalized, eye);
-   }
-   
-   return p->eye_position_normalized;
-}
-
-
-static struct ureg get_eye_normal( struct tnl_program *p )
-{
-   if (is_undef(p->eye_normal)) {
-      struct ureg normal = register_input(p, VERT_ATTRIB_NORMAL );
-      struct ureg mvinv[3];
-
-      register_matrix_param5( p, STATE_MODELVIEW_MATRIX, 0, 0, 2,
-			      STATE_MATRIX_INVTRANS, mvinv );
-
-      p->eye_normal = reserve_temp(p);
-
-      /* Transform to eye space:
-       */
-      emit_matrix_transform_vec3( p, p->eye_normal, mvinv, normal );
-
-      /* Normalize/Rescale:
-       */
-      if (p->state->normalize) {
-	 emit_normalize_vec3( p, p->eye_normal, p->eye_normal );
-      }
-      else if (p->state->rescale_normals) {
-	 struct ureg rescale = register_param2(p, STATE_INTERNAL,
-					       STATE_NORMAL_SCALE);
-
-	 emit_op2( p, OPCODE_MUL, p->eye_normal, 0, p->eye_normal, 
-		   swizzle1(rescale, X));
-      }
-   }
-
-   return p->eye_normal;
-}
-
-
-
-static void build_hpos( struct tnl_program *p )
-{
-   struct ureg pos = register_input( p, VERT_ATTRIB_POS ); 
-   struct ureg hpos = register_output( p, VERT_RESULT_HPOS );
-   struct ureg mvp[4];
-
-   if (PREFER_DP4) {
-      register_matrix_param5( p, STATE_MVP_MATRIX, 0, 0, 3, 
-			      0, mvp );
-      emit_matrix_transform_vec4( p, hpos, mvp, pos );
-   }
-   else {
-      register_matrix_param5( p, STATE_MVP_MATRIX, 0, 0, 3, 
-			      STATE_MATRIX_TRANSPOSE, mvp );
-      emit_transpose_matrix_transform_vec4( p, hpos, mvp, pos );
-   }
-}
-
-
-static GLuint material_attrib( GLuint side, GLuint property )
-{
-   return (property - STATE_AMBIENT) * 2 + side;
-}
-
-/* Get a bitmask of which material values vary on a per-vertex basis.
- */
-static void set_material_flags( struct tnl_program *p )
-{
-   p->color_materials = 0;
-   p->materials = 0;
-
-   if (p->state->light_color_material) {
-      p->materials = 
-	 p->color_materials = p->state->light_color_material_mask;
-   }
-
-   p->materials |= p->state->light_material_mask;
-}
-
-
-static struct ureg get_material( struct tnl_program *p, GLuint side, 
-				 GLuint property )
-{
-   GLuint attrib = material_attrib(side, property);
-
-   if (p->color_materials & (1<<attrib))
-      return register_input(p, VERT_ATTRIB_COLOR0);
-   else if (p->materials & (1<<attrib)) 
-      return register_input( p, attrib + _TNL_ATTRIB_MAT_FRONT_AMBIENT );
-   else
-      return register_param3( p, STATE_MATERIAL, side, property );
-}
-
-#define SCENE_COLOR_BITS(side) ((MAT_BIT_FRONT_EMISSION | \
-				 MAT_BIT_FRONT_AMBIENT | \
-				 MAT_BIT_FRONT_DIFFUSE) << (side))
-
-/* Either return a precalculated constant value or emit code to
- * calculate these values dynamically in the case where material calls
- * are present between begin/end pairs.
- *
- * Probably want to shift this to the program compilation phase - if
- * we always emitted the calculation here, a smart compiler could
- * detect that it was constant (given a certain set of inputs), and
- * lift it out of the main loop.  That way the programs created here
- * would be independent of the vertex_buffer details.
- */
-static struct ureg get_scenecolor( struct tnl_program *p, GLuint side )
-{
-   if (p->materials & SCENE_COLOR_BITS(side)) {
-      struct ureg lm_ambient = register_param1(p, STATE_LIGHTMODEL_AMBIENT);
-      struct ureg material_emission = get_material(p, side, STATE_EMISSION);
-      struct ureg material_ambient = get_material(p, side, STATE_AMBIENT);
-      struct ureg material_diffuse = get_material(p, side, STATE_DIFFUSE);
-      struct ureg tmp = make_temp(p, material_diffuse);
-      emit_op3(p, OPCODE_MAD, tmp,  WRITEMASK_XYZ, lm_ambient, 
-	       material_ambient, material_emission);
-      return tmp;
-   }
-   else
-      return register_param2( p, STATE_LIGHTMODEL_SCENECOLOR, side );
-}
-
-
-static struct ureg get_lightprod( struct tnl_program *p, GLuint light, 
-				  GLuint side, GLuint property )
-{
-   GLuint attrib = material_attrib(side, property);
-   if (p->materials & (1<<attrib)) {
-      struct ureg light_value = 
-	 register_param3(p, STATE_LIGHT, light, property);
-      struct ureg material_value = get_material(p, side, property);
-      struct ureg tmp = get_temp(p);
-      emit_op2(p, OPCODE_MUL, tmp,  0, light_value, material_value);
-      return tmp;
-   }
-   else
-      return register_param4(p, STATE_LIGHTPROD, light, side, property);
-}
-
-static struct ureg calculate_light_attenuation( struct tnl_program *p,
-						GLuint i, 
-						struct ureg VPpli,
-						struct ureg dist )
-{
-   struct ureg attenuation = register_param3(p, STATE_LIGHT, i,
-					     STATE_ATTENUATION);
-   struct ureg att = get_temp(p);
-
-   /* Calculate spot attenuation:
-    */
-   if (!p->state->unit[i].light_spotcutoff_is_180) {
-      struct ureg spot_dir_norm = register_param3(p, STATE_INTERNAL,
-						  STATE_SPOT_DIR_NORMALIZED, i);
-      struct ureg spot = get_temp(p);
-      struct ureg slt = get_temp(p);
-
-      emit_op2(p, OPCODE_DP3, spot, 0, ureg_negate(VPpli), spot_dir_norm);
-      emit_op2(p, OPCODE_SLT, slt, 0, swizzle1(spot_dir_norm,W), spot);
-      emit_op2(p, OPCODE_POW, spot, 0, spot, swizzle1(attenuation, W));
-      emit_op2(p, OPCODE_MUL, att, 0, slt, spot);
-
-      release_temp(p, spot);
-      release_temp(p, slt);
-   }
-
-   /* Calculate distance attenuation:
-    */
-   if (p->state->unit[i].light_attenuated) {
-
-      /* 1/d,d,d,1/d */
-      emit_op1(p, OPCODE_RCP, dist, WRITEMASK_YZ, dist); 
-      /* 1,d,d*d,1/d */
-      emit_op2(p, OPCODE_MUL, dist, WRITEMASK_XZ, dist, swizzle1(dist,Y)); 
-      /* 1/dist-atten */
-      emit_op2(p, OPCODE_DP3, dist, 0, attenuation, dist); 
-
-      if (!p->state->unit[i].light_spotcutoff_is_180) {
-	 /* dist-atten */
-	 emit_op1(p, OPCODE_RCP, dist, 0, dist); 
-	 /* spot-atten * dist-atten */
-	 emit_op2(p, OPCODE_MUL, att, 0, dist, att);	
-      } else {
-	 /* dist-atten */
-	 emit_op1(p, OPCODE_RCP, att, 0, dist); 
-      }
-   }
-
-   return att;
-}
-						
-
-
-
-
-/* Need to add some addtional parameters to allow lighting in object
- * space - STATE_SPOT_DIRECTION and STATE_HALF_VECTOR implicitly assume eye
- * space lighting.
- */
-static void build_lighting( struct tnl_program *p )
-{
-   const GLboolean twoside = p->state->light_twoside;
-   const GLboolean separate = p->state->separate_specular;
-   GLuint nr_lights = 0, count = 0;
-   struct ureg normal = get_eye_normal(p);
-   struct ureg lit = get_temp(p);
-   struct ureg dots = get_temp(p);
-   struct ureg _col0 = undef, _col1 = undef;
-   struct ureg _bfc0 = undef, _bfc1 = undef;
-   GLuint i;
-
-   for (i = 0; i < MAX_LIGHTS; i++) 
-      if (p->state->unit[i].light_enabled)
-	 nr_lights++;
-   
-   set_material_flags(p);
-
-   {
-      struct ureg shininess = get_material(p, 0, STATE_SHININESS);
-      emit_op1(p, OPCODE_MOV, dots,  WRITEMASK_W, swizzle1(shininess,X));
-      release_temp(p, shininess);
-
-      _col0 = make_temp(p, get_scenecolor(p, 0));
-      if (separate)
-	 _col1 = make_temp(p, get_identity_param(p));
-      else
-	 _col1 = _col0;
-
-   }
-
-   if (twoside) {
-      struct ureg shininess = get_material(p, 1, STATE_SHININESS);
-      emit_op1(p, OPCODE_MOV, dots, WRITEMASK_Z, 
-	       ureg_negate(swizzle1(shininess,X)));
-      release_temp(p, shininess);
-
-      _bfc0 = make_temp(p, get_scenecolor(p, 1));
-      if (separate)
-	 _bfc1 = make_temp(p, get_identity_param(p));
-      else
-	 _bfc1 = _bfc0;
-   }
-
-
-   /* If no lights, still need to emit the scenecolor.
-    */
-   /* KW: changed to do this always - v1.17 "Fix lighting alpha result"? 
-    */
-   if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-   {
-      struct ureg res0 = register_output( p, VERT_RESULT_COL0 );
-      emit_op1(p, OPCODE_MOV, res0, 0, _col0);
-
-      if (twoside) {
-	 struct ureg res0 = register_output( p, VERT_RESULT_BFC0 );
-	 emit_op1(p, OPCODE_MOV, res0, 0, _bfc0);
-      }
-   }
-
-   if (separate && (p->state->fragprog_inputs_read & FRAG_BIT_COL1)) {
-
-      struct ureg res1 = register_output( p, VERT_RESULT_COL1 );
-      emit_op1(p, OPCODE_MOV, res1, 0, _col1);
-      
-      if (twoside) {
-	 struct ureg res1 = register_output( p, VERT_RESULT_BFC1 );
-	 emit_op1(p, OPCODE_MOV, res1, 0, _bfc1);
-      }
-   }
-      
-   if (nr_lights == 0) {
-      release_temps(p);
-      return;
-   }
-
-
-   for (i = 0; i < MAX_LIGHTS; i++) {
-      if (p->state->unit[i].light_enabled) {
-	 struct ureg half = undef;
-	 struct ureg att = undef, VPpli = undef;
-	  
-	 count++;
-
-	 if (p->state->unit[i].light_eyepos3_is_zero) {
-	    /* Can used precomputed constants in this case.
-	     * Attenuation never applies to infinite lights.
-	     */
-	    VPpli = register_param3(p, STATE_LIGHT, i, 
-				    STATE_POSITION_NORMALIZED); 
-            if (p->state->light_local_viewer) {
-                struct ureg eye_hat = get_eye_position_normalized(p);
-                half = get_temp(p);
-                emit_op2(p, OPCODE_SUB, half, 0, VPpli, eye_hat);
-                emit_normalize_vec3(p, half, half);
-            } else {
-                half = register_param3(p, STATE_LIGHT, i, STATE_HALF_VECTOR);
-            }
-	 } 
-	 else {
-	    struct ureg Ppli = register_param3(p, STATE_LIGHT, i, 
-					       STATE_POSITION); 
-	    struct ureg V = get_eye_position(p);
-	    struct ureg dist = get_temp(p);
-
-	    VPpli = get_temp(p); 
-	    half = get_temp(p);
- 
-	    /* Calulate VPpli vector
-	     */
-	    emit_op2(p, OPCODE_SUB, VPpli, 0, Ppli, V); 
-
-	    /* Normalize VPpli.  The dist value also used in
-	     * attenuation below.
-	     */
-	    emit_op2(p, OPCODE_DP3, dist, 0, VPpli, VPpli);
-	    emit_op1(p, OPCODE_RSQ, dist, 0, dist);
-	    emit_op2(p, OPCODE_MUL, VPpli, 0, VPpli, dist);
-
-
-	    /* Calculate  attenuation:
-	     */ 
-	    if (!p->state->unit[i].light_spotcutoff_is_180 ||
-		p->state->unit[i].light_attenuated) {
-	       att = calculate_light_attenuation(p, i, VPpli, dist);
-	    }
-	 
-      
-	    /* Calculate viewer direction, or use infinite viewer:
-	     */
-	    if (p->state->light_local_viewer) {
-	       struct ureg eye_hat = get_eye_position_normalized(p);
-	       emit_op2(p, OPCODE_SUB, half, 0, VPpli, eye_hat);
-	    }
-	    else {
-	       struct ureg z_dir = swizzle(get_identity_param(p),X,Y,W,Z); 
-	       emit_op2(p, OPCODE_ADD, half, 0, VPpli, z_dir);
-	    }
-
-	    emit_normalize_vec3(p, half, half);
-
-	    release_temp(p, dist);
-	 }
-
-	 /* Calculate dot products:
-	  */
-	 emit_op2(p, OPCODE_DP3, dots, WRITEMASK_X, normal, VPpli);
-	 emit_op2(p, OPCODE_DP3, dots, WRITEMASK_Y, normal, half);
-
-	
-	 /* Front face lighting:
-	  */
-	 {
-	    struct ureg ambient = get_lightprod(p, i, 0, STATE_AMBIENT);
-	    struct ureg diffuse = get_lightprod(p, i, 0, STATE_DIFFUSE);
-	    struct ureg specular = get_lightprod(p, i, 0, STATE_SPECULAR);
-	    struct ureg res0, res1;
-	    GLuint mask0, mask1;
-
-	    emit_op1(p, OPCODE_LIT, lit, 0, dots);
-   
-	    if (!is_undef(att)) 
-	       emit_op2(p, OPCODE_MUL, lit, 0, lit, att);
-
-
-	    mask0 = 0;
-	    mask1 = 0;
-	    res0 = _col0;
-	    res1 = _col1;
-	    
-	    if (count == nr_lights) {
-	       if (separate) {
-		  mask0 = WRITEMASK_XYZ;
-		  mask1 = WRITEMASK_XYZ;
-
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-		     res0 = register_output( p, VERT_RESULT_COL0 );
-
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL1)
-		     res1 = register_output( p, VERT_RESULT_COL1 );
-	       }
-	       else {
-		  mask1 = WRITEMASK_XYZ;
-
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-		     res1 = register_output( p, VERT_RESULT_COL0 );
-	       }
-	    } 
-
-	    emit_op3(p, OPCODE_MAD, _col0, 0, swizzle1(lit,X), ambient, _col0);
-	    emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _col0);
-	    emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _col1);
-      
-	    release_temp(p, ambient);
-	    release_temp(p, diffuse);
-	    release_temp(p, specular);
-	 }
-
-	 /* Back face lighting:
-	  */
-	 if (twoside) {
-	    struct ureg ambient = get_lightprod(p, i, 1, STATE_AMBIENT);
-	    struct ureg diffuse = get_lightprod(p, i, 1, STATE_DIFFUSE);
-	    struct ureg specular = get_lightprod(p, i, 1, STATE_SPECULAR);
-	    struct ureg res0, res1;
-	    GLuint mask0, mask1;
-	       
-	    emit_op1(p, OPCODE_LIT, lit, 0, ureg_negate(swizzle(dots,X,Y,W,Z)));
-
-	    if (!is_undef(att)) 
-	       emit_op2(p, OPCODE_MUL, lit, 0, lit, att);
-
-	    mask0 = 0;
-	    mask1 = 0;
-	    res0 = _bfc0;
-	    res1 = _bfc1;
-
-	    if (count == nr_lights) {
-	       if (separate) {
-		  mask0 = WRITEMASK_XYZ;
-		  mask1 = WRITEMASK_XYZ;
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-		     res0 = register_output( p, VERT_RESULT_BFC0 );
-
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL1)
-		     res1 = register_output( p, VERT_RESULT_BFC1 );
-	       }
-	       else {
-		  mask1 = WRITEMASK_XYZ;
-
-		  if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-		     res1 = register_output( p, VERT_RESULT_BFC0 );
-	       }
-	    }
-
-	    emit_op3(p, OPCODE_MAD, _bfc0, 0, swizzle1(lit,X), ambient, _bfc0);
-	    emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0);
-	    emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1);
-
-	    release_temp(p, ambient);
-	    release_temp(p, diffuse);
-	    release_temp(p, specular);
-	 }
-
-	 release_temp(p, half);
-	 release_temp(p, VPpli);
-	 release_temp(p, att);
-      }
-   }
-
-   release_temps( p );
-}
-
-
-static void build_fog( struct tnl_program *p )
-{
-   struct ureg fog = register_output(p, VERT_RESULT_FOGC);
-   struct ureg input;
-   GLuint useabs = p->state->fog_source_is_depth && p->state->fog_option &&
-		   (p->state->fog_option != FOG_EXP2);
-
-   if (p->state->fog_source_is_depth) {
-      input = swizzle1(get_eye_position(p), Z);
-   }
-   else {
-      input = swizzle1(register_input(p, VERT_ATTRIB_FOG), X);
-   }
-
-   if (p->state->fog_option &&
-       p->state->tnl_do_vertex_fog) {
-      struct ureg params = register_param2(p, STATE_INTERNAL,
-					   STATE_FOG_PARAMS_OPTIMIZED);
-      struct ureg tmp = get_temp(p);
-      struct ureg id = get_identity_param(p);
-
-      emit_op1(p, OPCODE_MOV, fog, 0, id);
-
-      if (useabs) {
-	 emit_op1(p, OPCODE_ABS, tmp, 0, input);
-      }
-
-      switch (p->state->fog_option) {
-      case FOG_LINEAR: {
-	 emit_op3(p, OPCODE_MAD, tmp, 0, useabs ? tmp : input,
-			swizzle1(params,X), swizzle1(params,Y));
-	 emit_op2(p, OPCODE_MAX, tmp, 0, tmp, swizzle1(id,X)); /* saturate */
-	 emit_op2(p, OPCODE_MIN, fog, WRITEMASK_X, tmp, swizzle1(id,W));
-	 break;
-      }
-      case FOG_EXP:
-	 emit_op2(p, OPCODE_MUL, tmp, 0, useabs ? tmp : input,
-			swizzle1(params,Z));
-	 emit_op1(p, OPCODE_EX2, fog, WRITEMASK_X, ureg_negate(tmp));
-	 break;
-      case FOG_EXP2:
-	 emit_op2(p, OPCODE_MUL, tmp, 0, input, swizzle1(params,W));
-	 emit_op2(p, OPCODE_MUL, tmp, 0, tmp, tmp);
-	 emit_op1(p, OPCODE_EX2, fog, WRITEMASK_X, ureg_negate(tmp));
-	 break;
-      }
-
-      release_temp(p, tmp);
-   }
-   else {
-      /* results = incoming fog coords (compute fog per-fragment later) 
-       *
-       * KW:  Is it really necessary to do anything in this case?
-       */
-      emit_op1(p, useabs ? OPCODE_ABS : OPCODE_MOV, fog, 0, input);
-   }
-}
- 
-static void build_reflect_texgen( struct tnl_program *p,
-				  struct ureg dest,
-				  GLuint writemask )
-{
-   struct ureg normal = get_eye_normal(p);
-   struct ureg eye_hat = get_eye_position_normalized(p);
-   struct ureg tmp = get_temp(p);
-
-   /* n.u */
-   emit_op2(p, OPCODE_DP3, tmp, 0, normal, eye_hat); 
-   /* 2n.u */
-   emit_op2(p, OPCODE_ADD, tmp, 0, tmp, tmp); 
-   /* (-2n.u)n + u */
-   emit_op3(p, OPCODE_MAD, dest, writemask, ureg_negate(tmp), normal, eye_hat);
-
-   release_temp(p, tmp);
-}
-
-static void build_sphere_texgen( struct tnl_program *p,
-				 struct ureg dest,
-				 GLuint writemask )
-{
-   struct ureg normal = get_eye_normal(p);
-   struct ureg eye_hat = get_eye_position_normalized(p);
-   struct ureg tmp = get_temp(p);
-   struct ureg half = register_scalar_const(p, .5);
-   struct ureg r = get_temp(p);
-   struct ureg inv_m = get_temp(p);
-   struct ureg id = get_identity_param(p);
-
-   /* Could share the above calculations, but it would be
-    * a fairly odd state for someone to set (both sphere and
-    * reflection active for different texture coordinate
-    * components.  Of course - if two texture units enable
-    * reflect and/or sphere, things start to tilt in favour
-    * of seperating this out:
-    */
-
-   /* n.u */
-   emit_op2(p, OPCODE_DP3, tmp, 0, normal, eye_hat); 
-   /* 2n.u */
-   emit_op2(p, OPCODE_ADD, tmp, 0, tmp, tmp); 
-   /* (-2n.u)n + u */
-   emit_op3(p, OPCODE_MAD, r, 0, ureg_negate(tmp), normal, eye_hat); 
-   /* r + 0,0,1 */
-   emit_op2(p, OPCODE_ADD, tmp, 0, r, swizzle(id,X,Y,W,Z)); 
-   /* rx^2 + ry^2 + (rz+1)^2 */
-   emit_op2(p, OPCODE_DP3, tmp, 0, tmp, tmp); 
-   /* 2/m */
-   emit_op1(p, OPCODE_RSQ, tmp, 0, tmp); 
-   /* 1/m */
-   emit_op2(p, OPCODE_MUL, inv_m, 0, tmp, half); 
-   /* r/m + 1/2 */
-   emit_op3(p, OPCODE_MAD, dest, writemask, r, inv_m, half); 
-	       
-   release_temp(p, tmp);
-   release_temp(p, r);
-   release_temp(p, inv_m);
-}
-
-
-static void build_texture_transform( struct tnl_program *p )
-{
-   GLuint i, j;
-
-   for (i = 0; i < MAX_TEXTURE_UNITS; i++) {
-
-      if (!(p->state->fragprog_inputs_read & (FRAG_BIT_TEX0<<i)))
-	 continue;
-							     
-      if (p->state->unit[i].texgen_enabled || 
-	  p->state->unit[i].texmat_enabled) {
-	 
-	 GLuint texmat_enabled = p->state->unit[i].texmat_enabled;
-	 struct ureg out = register_output(p, VERT_RESULT_TEX0 + i);
-	 struct ureg out_texgen = undef;
-
-	 if (p->state->unit[i].texgen_enabled) {
-	    GLuint copy_mask = 0;
-	    GLuint sphere_mask = 0;
-	    GLuint reflect_mask = 0;
-	    GLuint normal_mask = 0;
-	    GLuint modes[4];
-	 
-	    if (texmat_enabled) 
-	       out_texgen = get_temp(p);
-	    else
-	       out_texgen = out;
-
-	    modes[0] = p->state->unit[i].texgen_mode0;
-	    modes[1] = p->state->unit[i].texgen_mode1;
-	    modes[2] = p->state->unit[i].texgen_mode2;
-	    modes[3] = p->state->unit[i].texgen_mode3;
-
-	    for (j = 0; j < 4; j++) {
-	       switch (modes[j]) {
-	       case TXG_OBJ_LINEAR: {
-		  struct ureg obj = register_input(p, VERT_ATTRIB_POS);
-		  struct ureg plane = 
-		     register_param3(p, STATE_TEXGEN, i,
-				     STATE_TEXGEN_OBJECT_S + j);
-
-		  emit_op2(p, OPCODE_DP4, out_texgen, WRITEMASK_X << j, 
-			   obj, plane );
-		  break;
-	       }
-	       case TXG_EYE_LINEAR: {
-		  struct ureg eye = get_eye_position(p);
-		  struct ureg plane = 
-		     register_param3(p, STATE_TEXGEN, i, 
-				     STATE_TEXGEN_EYE_S + j);
-
-		  emit_op2(p, OPCODE_DP4, out_texgen, WRITEMASK_X << j, 
-			   eye, plane );
-		  break;
-	       }
-	       case TXG_SPHERE_MAP: 
-		  sphere_mask |= WRITEMASK_X << j;
-		  break;
-	       case TXG_REFLECTION_MAP:
-		  reflect_mask |= WRITEMASK_X << j;
-		  break;
-	       case TXG_NORMAL_MAP: 
-		  normal_mask |= WRITEMASK_X << j;
-		  break;
-	       case TXG_NONE:
-		  copy_mask |= WRITEMASK_X << j;
-	       }
-
-	    }
-
-	 
-	    if (sphere_mask) {
-	       build_sphere_texgen(p, out_texgen, sphere_mask);
-	    }
-
-	    if (reflect_mask) {
-	       build_reflect_texgen(p, out_texgen, reflect_mask);
-	    }
-
-	    if (normal_mask) {
-	       struct ureg normal = get_eye_normal(p);
-	       emit_op1(p, OPCODE_MOV, out_texgen, normal_mask, normal );
-	    }
-
-	    if (copy_mask) {
-	       struct ureg in = register_input(p, VERT_ATTRIB_TEX0+i);
-	       emit_op1(p, OPCODE_MOV, out_texgen, copy_mask, in );
-	    }
-	 }
-
-	 if (texmat_enabled) {
-	    struct ureg texmat[4];
-	    struct ureg in = (!is_undef(out_texgen) ? 
-			      out_texgen : 
-			      register_input(p, VERT_ATTRIB_TEX0+i));
-	    if (PREFER_DP4) {
-	       register_matrix_param5( p, STATE_TEXTURE_MATRIX, i, 0, 3,
-				       0, texmat );
-	       emit_matrix_transform_vec4( p, out, texmat, in );
-	    }
-	    else {
-	       register_matrix_param5( p, STATE_TEXTURE_MATRIX, i, 0, 3,
-				       STATE_MATRIX_TRANSPOSE, texmat );
-	       emit_transpose_matrix_transform_vec4( p, out, texmat, in );
-	    }
-	 }
-
-	 release_temps(p);
-      } 
-      else {
-	 emit_passthrough(p, VERT_ATTRIB_TEX0+i, VERT_RESULT_TEX0+i);
-      }
-   }
-}
-
-
-/* Seems like it could be tighter:
- */
-static void build_pointsize( struct tnl_program *p )
-{
-   struct ureg eye = get_eye_position(p);
-   struct ureg state_size = register_param1(p, STATE_POINT_SIZE);
-   struct ureg state_attenuation = register_param1(p, STATE_POINT_ATTENUATION);
-   struct ureg out = register_output(p, VERT_RESULT_PSIZ);
-   struct ureg ut = get_temp(p);
-
-   /* 1, Z, Z * Z, 1 */      
-   emit_op1(p, OPCODE_MOV, ut, WRITEMASK_XW, swizzle1(get_identity_param(p), W));
-   emit_op1(p, OPCODE_ABS, ut, WRITEMASK_YZ, swizzle1(eye, Z));
-   emit_op2(p, OPCODE_MUL, ut, WRITEMASK_Z, ut, ut);
-
-
-   /* p1 +  p2 * dist + p3 * dist * dist, 0 */
-   emit_op2(p, OPCODE_DP3, ut, WRITEMASK_X, ut, state_attenuation);
-
-   /* 1 / sqrt(factor) */
-   emit_op1(p, OPCODE_RSQ, ut, WRITEMASK_X, ut ); 
-
-   /* ut = pointSize / factor */
-   emit_op2(p, OPCODE_MUL, ut, WRITEMASK_X, ut, state_size); 
-
-   /* Clamp to min/max - state_size.[yz]
-    */
-   emit_op2(p, OPCODE_MAX, ut, WRITEMASK_X, ut, swizzle1(state_size, Y)); 
-   emit_op2(p, OPCODE_MIN, out, 0, swizzle1(ut, X), swizzle1(state_size, Z)); 
-   
-   release_temp(p, ut);
-}
-
-static void build_tnl_program( struct tnl_program *p )
-{  
-   /* Emit the program, starting with modelviewproject:
-    */
-   build_hpos(p);
-
-   /* Lighting calculations:
-    */
-   if (p->state->fragprog_inputs_read & (FRAG_BIT_COL0|FRAG_BIT_COL1)) {
-      if (p->state->light_global_enabled)
-	 build_lighting(p);
-      else {
-	 if (p->state->fragprog_inputs_read & FRAG_BIT_COL0)
-	    emit_passthrough(p, VERT_ATTRIB_COLOR0, VERT_RESULT_COL0);
-
-	 if (p->state->fragprog_inputs_read & FRAG_BIT_COL1)
-	    emit_passthrough(p, VERT_ATTRIB_COLOR1, VERT_RESULT_COL1);
-      }
-   }
-
-   if ((p->state->fragprog_inputs_read & FRAG_BIT_FOGC) ||
-       p->state->fog_option != FOG_NONE)
-      build_fog(p);
-
-   if (p->state->fragprog_inputs_read & FRAG_BITS_TEX_ANY)
-      build_texture_transform(p);
-
-   if (p->state->point_attenuated)
-      build_pointsize(p);
-
-   /* Finish up:
-    */
-   emit_op1(p, OPCODE_END, undef, 0, undef);
-
-   /* Disassemble:
-    */
-   if (DISASSEM) {
-      _mesa_printf ("\n");
-   }
-}
-
-
-static void build_new_tnl_program( const struct state_key *key,
-				   struct gl_vertex_program *program,
-				   GLuint max_temps)
-{
-   struct tnl_program p;
-
-   _mesa_memset(&p, 0, sizeof(p));
-   p.state = key;
-   p.program = program;
-   p.eye_position = undef;
-   p.eye_position_normalized = undef;
-   p.eye_normal = undef;
-   p.identity = undef;
-   p.temp_in_use = 0;
-   p.nr_instructions = 16;
-   
-   if (max_temps >= sizeof(int) * 8)
-      p.temp_reserved = 0;
-   else
-      p.temp_reserved = ~((1<<max_temps)-1);
-
-   p.program->Base.Instructions = 
-      _mesa_malloc(sizeof(struct prog_instruction) * p.nr_instructions);
-   p.program->Base.String = 0;
-   p.program->Base.NumInstructions =
-   p.program->Base.NumTemporaries =
-   p.program->Base.NumParameters =
-   p.program->Base.NumAttributes = p.program->Base.NumAddressRegs = 0;
-   p.program->Base.Parameters = _mesa_new_parameter_list();
-   p.program->Base.InputsRead = 0;
-   p.program->Base.OutputsWritten = 0;
-
-   build_tnl_program( &p );
-}
-
-static void *search_cache( struct brw_tnl_cache *cache,
-			   GLuint hash,
-			   const void *key,
-			   GLuint keysize)
-{
-   struct brw_tnl_cache_item *c;
-
-   for (c = cache->items[hash % cache->size]; c; c = c->next) {
-      if (c->hash == hash && memcmp(c->key, key, keysize) == 0)
-	 return c->data;
-   }
-
-   return NULL;
-}
-
-static void rehash( struct brw_tnl_cache *cache )
-{
-   struct brw_tnl_cache_item **items;
-   struct brw_tnl_cache_item *c, *next;
-   GLuint size, i;
-
-   size = cache->size * 3;
-   items = (struct brw_tnl_cache_item**) _mesa_malloc(size * sizeof(*items));
-   _mesa_memset(items, 0, size * sizeof(*items));
-
-   for (i = 0; i < cache->size; i++)
-      for (c = cache->items[i]; c; c = next) {
-	 next = c->next;
-	 c->next = items[c->hash % size];
-	 items[c->hash % size] = c;
-      }
-
-   FREE(cache->items);
-   cache->items = items;
-   cache->size = size;
-}
-
-static void cache_item( struct brw_tnl_cache *cache,
-			GLuint hash,
-			const struct state_key *key,
-			void *data )
-{
-   struct brw_tnl_cache_item *c = MALLOC(sizeof(*c));
-   c->hash = hash;
-
-   c->key = malloc(sizeof(*key));
-   memcpy(c->key, key, sizeof(*key));
-
-   c->data = data;
-
-   if (++cache->n_items > cache->size * 1.5)
-      rehash(cache);
-
-   c->next = cache->items[hash % cache->size];
-   cache->items[hash % cache->size] = c;
-}
-
-
-static GLuint hash_key( struct state_key *key )
-{
-   GLuint *ikey = (GLuint *)key;
-   GLuint hash = 0, i;
-
-   /* I'm sure this can be improved on, but speed is important:
-    */
-   for (i = 0; i < sizeof(*key)/sizeof(GLuint); i++)
-      hash += ikey[i];
-
-   return hash;
-}
-
-static void update_tnl_program( struct brw_context *brw )
-{
-   GLcontext *ctx = &brw->intel.ctx;
-   struct state_key key;
-   GLuint hash;
-   struct gl_vertex_program *old = brw->tnl_program;
-
-   /* _NEW_PROGRAM */
-   if (brw->attribs.VertexProgram->_Enabled) 
-      return;
-      
-   /* Grab all the relevent state and put it in a single structure:
-    */
-   make_state_key(ctx, &key);
-   hash = hash_key(&key);
-
-   /* Look for an already-prepared program for this state:
-    */
-   brw->tnl_program = (struct gl_vertex_program *)
-      search_cache( &brw->tnl_program_cache, hash, &key, sizeof(key) );
-   
-   /* OK, we'll have to build a new one:
-    */
-   if (!brw->tnl_program) {
-      brw->tnl_program = (struct gl_vertex_program *)
-	 ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0); 
-
-      build_new_tnl_program( &key, brw->tnl_program, 
-/* 			     ctx->Const.MaxVertexProgramTemps  */
-			     32
-	 );
-
-      if (ctx->Driver.ProgramStringNotify)
-	 ctx->Driver.ProgramStringNotify( ctx, GL_VERTEX_PROGRAM_ARB, 
-					  &brw->tnl_program->Base );
-
-      cache_item( &brw->tnl_program_cache, 
-		  hash, &key, brw->tnl_program );
-   }
-
-   if (old != brw->tnl_program)
-      brw->state.dirty.brw |= BRW_NEW_TNL_PROGRAM;
-}
-
-/* Note: See brw_draw.c - the vertex program must not rely on
- * brw->primitive or brw->reduced_prim.
- */
-const struct brw_tracked_state brw_tnl_vertprog = {
-   .dirty = {
-      .mesa = (_NEW_PROGRAM | 
-	       _NEW_LIGHT | 
-	       _NEW_TRANSFORM | 
-	       _NEW_FOG | 
-	       _NEW_HINT | 
-	       _NEW_POINT | 
-	       _NEW_TEXTURE),
-      .brw = (BRW_NEW_FRAGMENT_PROGRAM | 
-	      BRW_NEW_INPUT_VARYING),
-      .cache = 0
-   },
-   .update = update_tnl_program
-};
-
-
-
-
-static void update_active_vertprog( struct brw_context *brw )
+static void prepare_active_vertprog( struct brw_context *brw )
 {
    const struct gl_vertex_program *prev = brw->vertex_program;
 
-   /* NEW_PROGRAM */
-   if (brw->attribs.VertexProgram->_Enabled) {
-      brw->vertex_program = brw->attribs.VertexProgram->Current;
-   }
-   else {
-      /* BRW_NEW_TNL_PROGRAM */
-      brw->vertex_program = brw->tnl_program;
-   }
+   brw->vertex_program = brw->attribs.VertexProgram->_Current;
 
    if (brw->vertex_program != prev) 
       brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
@@ -1654,37 +52,8 @@ static void update_active_vertprog( struct brw_context *brw )
 const struct brw_tracked_state brw_active_vertprog = {
    .dirty = {
       .mesa = _NEW_PROGRAM,
-      .brw = BRW_NEW_TNL_PROGRAM,
+      .brw = 0,
       .cache = 0
    },
-   .update = update_active_vertprog
+   .prepare = prepare_active_vertprog
 };
-
-
-void brw_ProgramCacheInit( GLcontext *ctx )
-{
-   struct brw_context *brw = brw_context(ctx);
-
-   brw->tnl_program_cache.size = 17;
-   brw->tnl_program_cache.n_items = 0;
-   brw->tnl_program_cache.items = (struct brw_tnl_cache_item **)
-      _mesa_calloc(brw->tnl_program_cache.size * 
-		   sizeof(struct brw_tnl_cache_item));
-}
-
-void brw_ProgramCacheDestroy( GLcontext *ctx )
-{
-   struct brw_context *brw = brw_context(ctx);
-   struct brw_tnl_cache_item *c, *next;
-   GLuint i;
-
-   for (i = 0; i < brw->tnl_program_cache.size; i++)
-      for (c = brw->tnl_program_cache.items[i]; c; c = next) {
-	 next = c->next;
-	 FREE(c->key);
-	 FREE(c->data);
-	 FREE(c);
-      }
-
-   FREE(brw->tnl_program_cache.items);
-}
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 786f30e641e..f7293ef4233 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -32,11 +32,11 @@
 
 
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "intel_batchbuffer.h" 
 #include "intel_regions.h" 
@@ -47,64 +47,117 @@
 
 #include "brw_draw.h"
 #include "brw_state.h"
-#include "brw_aub.h"
 #include "brw_fallback.h"
 #include "brw_vs.h"
+#include <stdarg.h>
 
-
+static void
+dri_bo_release(dri_bo **bo)
+{
+   dri_bo_unreference(*bo);
+   *bo = NULL;
+}
 
 /* called from intelDestroyContext()
  */
 static void brw_destroy_context( struct intel_context *intel )
 {
-   GLcontext *ctx = &intel->ctx;
    struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw_aub_destroy(brw);
+   int i;
 
    brw_destroy_metaops(brw);
    brw_destroy_state(brw);
    brw_draw_destroy( brw );
 
-   brw_ProgramCacheDestroy( ctx );
    brw_FrameBufferTexDestroy( brw );
+
+   for (i = 0; i < brw->state.nr_draw_regions; i++)
+       intel_region_release(&brw->state.draw_regions[i]);
+   brw->state.nr_draw_regions = 0;
+   intel_region_release(&brw->state.depth_region);
+
+   dri_bo_release(&brw->curbe.curbe_bo);
+   dri_bo_release(&brw->vs.prog_bo);
+   dri_bo_release(&brw->vs.state_bo);
+   dri_bo_release(&brw->gs.prog_bo);
+   dri_bo_release(&brw->gs.state_bo);
+   dri_bo_release(&brw->clip.prog_bo);
+   dri_bo_release(&brw->clip.state_bo);
+   dri_bo_release(&brw->clip.vp_bo);
+   dri_bo_release(&brw->sf.prog_bo);
+   dri_bo_release(&brw->sf.state_bo);
+   dri_bo_release(&brw->sf.vp_bo);
+   for (i = 0; i < BRW_MAX_TEX_UNIT; i++)
+      dri_bo_release(&brw->wm.sdc_bo[i]);
+   dri_bo_release(&brw->wm.bind_bo);
+   for (i = 0; i < BRW_WM_MAX_SURF; i++)
+      dri_bo_release(&brw->wm.surf_bo[i]);
+   dri_bo_release(&brw->wm.prog_bo);
+   dri_bo_release(&brw->wm.state_bo);
+   dri_bo_release(&brw->cc.prog_bo);
+   dri_bo_release(&brw->cc.state_bo);
+   dri_bo_release(&brw->cc.vp_bo);
 }
 
 /* called from intelDrawBuffer()
  */
 static void brw_set_draw_region( struct intel_context *intel, 
-				  struct intel_region *draw_region,
-				  struct intel_region *depth_region)
+				  struct intel_region *draw_regions[],
+				  struct intel_region *depth_region,
+				GLuint num_regions)
 {
    struct brw_context *brw = brw_context(&intel->ctx);
-
-   intel_region_release(intel, &brw->state.draw_region);
-   intel_region_release(intel, &brw->state.depth_region);
-   intel_region_reference(&brw->state.draw_region, draw_region);
+   int i;
+   if (brw->state.depth_region != depth_region)
+      brw->state.dirty.brw |= BRW_NEW_DEPTH_BUFFER;
+   for (i = 0; i < brw->state.nr_draw_regions; i++)
+       intel_region_release(&brw->state.draw_regions[i]);
+   intel_region_release(&brw->state.depth_region);
+   for (i = 0; i < num_regions; i++)
+       intel_region_reference(&brw->state.draw_regions[i], draw_regions[i]);
    intel_region_reference(&brw->state.depth_region, depth_region);
+   brw->state.nr_draw_regions = num_regions;
 }
 
+/* called from intel_batchbuffer_flush and children before sending a
+ * batchbuffer off.
+ */
+static void brw_finish_batch(struct intel_context *intel)
+{
+   struct brw_context *brw = brw_context(&intel->ctx);
+
+   brw_emit_query_end(brw);
+}
 
 /* called from intelFlushBatchLocked
  */
-static void brw_lost_hardware( struct intel_context *intel )
+static void brw_new_batch( struct intel_context *intel )
 {
    struct brw_context *brw = brw_context(&intel->ctx);
 
-   /* Note that we effectively lose the context after this.
-    * 
-    * Setting this flag provokes a state buffer wrap and also flushes
-    * the hardware caches.
-    */
-   brw->state.dirty.brw |= BRW_NEW_CONTEXT;
+   /* Check that we didn't just wrap our batchbuffer at a bad time. */
+   assert(!brw->no_batch_wrap);
+
+   brw->curbe.need_new_bo = GL_TRUE;
 
-   /* Which means there shouldn't be any commands already queued:
+   /* Mark all context state as needing to be re-emitted.
+    * This is probably not as severe as on 915, since almost all of our state
+    * is just in referenced buffers.
     */
-   assert(intel->batch->ptr == intel->batch->map + intel->batch->offset);
+   brw->state.dirty.brw |= BRW_NEW_CONTEXT;
 
    brw->state.dirty.mesa |= ~0;
    brw->state.dirty.brw |= ~0;
    brw->state.dirty.cache |= ~0;
+
+   /* Move to the end of the current upload buffer so that we'll force choosing
+    * a new buffer next time.
+    */
+   if (brw->vb.upload.bo != NULL) {
+      dri_bo_unreference(brw->vb.upload.bo);
+      brw->vb.upload.bo = NULL;
+      brw->vb.upload.offset = 0;
+   }
 }
 
 static void brw_note_fence( struct intel_context *intel, 
@@ -115,12 +168,9 @@ static void brw_note_fence( struct intel_context *intel,
  
 static void brw_note_unlock( struct intel_context *intel )
 {
-  struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw_pool_check_wrap(brw, &brw->pool[BRW_GS_POOL]);
-   brw_pool_check_wrap(brw, &brw->pool[BRW_SS_POOL]);
+   struct brw_context *brw = brw_context(&intel->ctx);
 
-   brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_LOCK;
+   brw_state_cache_check_size(brw);
 }
 
 
@@ -156,9 +206,6 @@ static GLuint brw_flush_cmd( void )
    return *(GLuint *)&flush;
 }
 
-
-
-
 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
 {
    /* nothing */
@@ -176,10 +223,12 @@ void brwInitVtbl( struct brw_context *brw )
    brw->intel.vtbl.invalidate_state = brw_invalidate_state; 
    brw->intel.vtbl.note_fence = brw_note_fence; 
    brw->intel.vtbl.note_unlock = brw_note_unlock; 
-   brw->intel.vtbl.lost_hardware = brw_lost_hardware;
+   brw->intel.vtbl.new_batch = brw_new_batch;
+   brw->intel.vtbl.finish_batch = brw_finish_batch;
    brw->intel.vtbl.destroy = brw_destroy_context;
    brw->intel.vtbl.set_draw_region = brw_set_draw_region;
    brw->intel.vtbl.flush_cmd = brw_flush_cmd;
    brw->intel.vtbl.emit_flush = brw_emit_flush;
+   brw->intel.vtbl.debug_batch = brw_debug_batch;
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 1497dc79687..bad76793af7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -29,12 +29,11 @@
   *   Keith Whitwell <keith@tungstengraphics.com>
   */
              
-
+#include "main/texformat.h"
 #include "brw_context.h"
 #include "brw_util.h"
 #include "brw_wm.h"
 #include "brw_state.h"
-#include "brw_hal.h"
 
 
 GLuint brw_wm_nr_args( GLuint opcode )
@@ -66,7 +65,11 @@ GLuint brw_wm_nr_args( GLuint opcode )
    case OPCODE_POW:
    case OPCODE_SUB:
    case OPCODE_SGE:
+   case OPCODE_SGT:
+   case OPCODE_SLE:
    case OPCODE_SLT:
+   case OPCODE_SEQ:
+   case OPCODE_SNE:
    case OPCODE_ADD:
    case OPCODE_MAX:
    case OPCODE_MIN:
@@ -116,20 +119,6 @@ GLuint brw_wm_is_scalar_result( GLuint opcode )
 }
 
 
-static void brw_wm_pass_hal (struct brw_wm_compile *c)
-{
-   static void (*hal_wm_pass) (struct brw_wm_compile *c);
-   static GLboolean hal_tried;
-   
-   if (!hal_tried)
-   {
-      hal_wm_pass = brw_hal_find_symbol ("intel_hal_wm_pass");
-      hal_tried = 1;
-   }
-   if (hal_wm_pass)
-      (*hal_wm_pass) (c);
-}
-
 static void do_wm_prog( struct brw_context *brw,
 			struct brw_fragment_program *fp, 
 			struct brw_wm_prog_key *key)
@@ -150,60 +139,53 @@ static void do_wm_prog( struct brw_context *brw,
    c->fp = fp;
    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 
-
-   /* Augment fragment program.  Add instructions for pre- and
-    * post-fragment-program tasks such as interpolation and fogging.
-    */
-   brw_wm_pass_fp(c);
-   
-   /* Translate to intermediate representation.  Build register usage
-    * chains.
-    */
-   brw_wm_pass0(c);
-
-   /* Dead code removal.
-    */
-   brw_wm_pass1(c);
-
-   /* Hal optimization
-    */
-   brw_wm_pass_hal (c);
-   
-   /* Register allocation.
-    */
-   c->grf_limit = BRW_WM_MAX_GRF/2;
-
-   /* This is where we start emitting gen4 code:
-    */
-   brw_init_compile(&c->func);    
-
-   brw_wm_pass2(c);
-
-   c->prog_data.total_grf = c->max_wm_grf;
-   if (c->last_scratch) {
-      c->prog_data.total_scratch =
-	 c->last_scratch + 0x40;
+    brw_init_compile(brw, &c->func);
+   if (brw_wm_is_glsl(&c->fp->program)) {
+       brw_wm_glsl_emit(brw, c);
    } else {
-      c->prog_data.total_scratch = 0;
+       /* Augment fragment program.  Add instructions for pre- and
+	* post-fragment-program tasks such as interpolation and fogging.
+	*/
+       brw_wm_pass_fp(c);
+
+       /* Translate to intermediate representation.  Build register usage
+	* chains.
+	*/
+       brw_wm_pass0(c);
+
+       /* Dead code removal.
+	*/
+       brw_wm_pass1(c);
+
+       /* Register allocation.
+	*/
+       c->grf_limit = BRW_WM_MAX_GRF/2;
+
+       brw_wm_pass2(c);
+
+       c->prog_data.total_grf = c->max_wm_grf;
+       if (c->last_scratch) {
+	   c->prog_data.total_scratch =
+	       c->last_scratch + 0x40;
+       } else {
+	   c->prog_data.total_scratch = 0;
+       }
+
+       /* Emit GEN4 code.
+	*/
+       brw_wm_emit(c);
    }
-
-   /* Emit GEN4 code.
-    */
-   brw_wm_emit(c);
-
    /* get the program
     */
    program = brw_get_program(&c->func, &program_size);
 
-   /*
-    */
-   brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
-					      &c->key,
-					      sizeof(c->key),
-					      program,
-					      program_size,
-					      &c->prog_data,
-					      &brw->wm.prog_data );
+   dri_bo_unreference(brw->wm.prog_bo);
+   brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
+				       &c->key, sizeof(c->key),
+				       NULL, 0,
+				       program, program_size,
+				       &c->prog_data,
+				       &brw->wm.prog_data );
 }
 
 
@@ -243,16 +225,11 @@ static void brw_wm_populate_key( struct brw_context *brw,
       lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 
       if (brw->attribs.Stencil->WriteMask[0] ||
-	  (brw->attribs.Stencil->TestTwoSide && brw->attribs.Stencil->WriteMask[1]))
+	  (brw->attribs.Stencil->_TestTwoSide &&
+	   brw->attribs.Stencil->WriteMask[1]))
 	 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
    }
 
-   /* XXX: when should this be disabled?
-    */
-   if (1)
-      lookup |= IZ_EARLY_DEPTH_TEST_BIT;
-
-   
    line_aa = AA_NEVER;
 
    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
@@ -285,7 +262,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
 
 
    /* BRW_NEW_WM_INPUT_DIMENSIONS */
-   key->projtex_mask = brw->wm.input_size_masks[4-1]; 
+   key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS); 
 
    /* _NEW_LIGHT */
    key->flat_shade = (brw->attribs.Light->ShadeModel == GL_FLAT);
@@ -296,17 +273,41 @@ static void brw_wm_populate_key( struct brw_context *brw,
       const struct gl_texture_object *t = unit->_Current;
 
       if (unit->_ReallyEnabled) {
-
-	 if (t->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB &&
-	     t->Image[0][t->BaseLevel]->_BaseFormat == GL_DEPTH_COMPONENT) {
-	    key->shadowtex_mask |= 1<<i;
-	 }
-
-	 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
+	 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA) {
 	    key->yuvtex_mask |= 1<<i;
+	    if (t->Image[0][t->BaseLevel]->TexFormat->MesaFormat == 
+		    MESA_FORMAT_YCBCR)
+		key->yuvtex_swap_mask |= 1<< i;
+	 }
       }
    }
-	  
+
+   /* Shadow */
+   key->shadowtex_mask = fp->program.Base.ShadowSamplers;
+
+   /* _NEW_BUFFERS */
+   /*
+    * Include the draw buffer origin and height so that we can calculate
+    * fragment position values relative to the bottom left of the drawable,
+    * from the incoming screen origin relative position we get as part of our
+    * payload.
+    *
+    * We could avoid recompiling by including this as a constant referenced by
+    * our program, but if we were to do that it would also be nice to handle
+    * getting that constant updated at batchbuffer submit time (when we
+    * hold the lock and know where the buffer really is) rather than at emit
+    * time when we don't hold the lock and are just guessing.  We could also
+    * just avoid using this as key data if the program doesn't use
+    * fragment.position.
+    *
+    * This pretty much becomes moot with DRI2 and redirected buffers anyway,
+    * as our origins will always be zero then.
+    */
+   if (brw->intel.driDrawable != NULL) {
+      key->origin_x = brw->intel.driDrawable->x;
+      key->origin_y = brw->intel.driDrawable->y;
+      key->drawable_height = brw->intel.driDrawable->h;
+   }
 
    /* Extra info:
     */
@@ -315,7 +316,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
 }
 
 
-static void brw_upload_wm_prog( struct brw_context *brw )
+static void brw_prepare_wm_prog(struct brw_context *brw)
 {
    struct brw_wm_prog_key key;
    struct brw_fragment_program *fp = (struct brw_fragment_program *)
@@ -325,13 +326,13 @@ static void brw_upload_wm_prog( struct brw_context *brw )
 
    /* Make an early check for the key.
     */
-   if (brw_search_cache(&brw->cache[BRW_WM_PROG], 
-			&key, sizeof(key),
-			&brw->wm.prog_data,
-			&brw->wm.prog_gs_offset))
-      return;
-
-   do_wm_prog(brw, fp, &key);
+   dri_bo_unreference(brw->wm.prog_bo);
+   brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
+				      &key, sizeof(key),
+				      NULL, 0,
+				      &brw->wm.prog_data);
+   if (brw->wm.prog_bo == NULL)
+      do_wm_prog(brw, fp, &key);
 }
 
 
@@ -345,12 +346,13 @@ const struct brw_tracked_state brw_wm_prog = {
 		_NEW_POLYGON |
 		_NEW_LINE |
 		_NEW_LIGHT |
+		_NEW_BUFFERS |
 		_NEW_TEXTURE),
       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 		BRW_NEW_WM_INPUT_DIMENSIONS |
 		BRW_NEW_REDUCED_PRIMITIVE),
       .cache = 0
    },
-   .update = brw_upload_wm_prog
+   .prepare = brw_prepare_wm_prog
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index f5fddfdb68a..ded079695ee 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -34,9 +34,9 @@
 #define BRW_WM_H
 
 
+#include "shader/prog_instruction.h"
 #include "brw_context.h"
 #include "brw_eu.h"
-#include "prog_instruction.h"
 
 /* A big lookup table is used to figure out which and how many
  * additional regs will inserted before the main payload in the WM
@@ -49,8 +49,7 @@
 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
-#define IZ_EARLY_DEPTH_TEST_BIT     0x40
-#define IZ_BIT_MAX                  0x80
+#define IZ_BIT_MAX                  0x40
 
 #define AA_NEVER     0
 #define AA_SOMETIMES 1
@@ -69,9 +68,12 @@ struct brw_wm_prog_key {
    GLuint runtime_check_aads_emit:1;
    
    GLuint yuvtex_mask:8;
-   GLuint pad1:24;
+   GLuint yuvtex_swap_mask:8;	/* UV swaped */
+   GLuint pad1:16;
 
    GLuint program_string_id:32;
+   GLuint origin_x, origin_y;
+   GLuint drawable_height;
 };
 
 
@@ -140,6 +142,8 @@ struct brw_wm_instruction {
    GLuint writemask:4;
    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
+   GLuint eot:1;    	/* End of thread indicator for FB_WRITE*/
+   GLuint target:10;    /* target binding table index for FB_WRITE*/
 };
 
 
@@ -152,6 +156,7 @@ struct brw_wm_instruction {
 #define BRW_WM_MAX_PARAM 256
 #define BRW_WM_MAX_CONST 256
 #define BRW_WM_MAX_KILLS MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS
+#define BRW_WM_MAX_SUBROUTINE 16
 
 
 
@@ -194,6 +199,8 @@ struct brw_wm_compile {
    GLuint nr_fp_insns;
    GLuint fp_temp;
    GLuint fp_interp_emitted;
+   GLuint fp_fragcolor_emitted;
+   GLuint fp_deriv_emitted;
 
    struct prog_src_register pixel_xy;
    struct prog_src_register delta_xy;
@@ -231,6 +238,18 @@ struct brw_wm_compile {
    GLuint grf_limit;
    GLuint max_wm_grf;
    GLuint last_scratch;
+
+   struct {
+	GLboolean inited;
+	struct brw_reg reg;
+   } wm_regs[PROGRAM_PAYLOAD+1][256][4];
+   struct brw_reg stack;
+   struct brw_reg emit_mask_reg;
+   GLuint reg_index;
+   GLuint tmp_regs[BRW_WM_MAX_GRF];
+   GLuint tmp_index;
+   GLuint tmp_max;
+   GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 };
 
 
@@ -259,4 +278,6 @@ void brw_wm_lookup_iz( GLuint line_aa,
 		       GLuint lookup,
 		       struct brw_wm_prog_key *key );
 
+GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp);
+void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c);
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index fd605159727..58c78c4b2c5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -30,7 +30,7 @@
   */
                
 
-#include "macros.h"
+#include "main/macros.h"
 #include "brw_context.h"
 #include "brw_wm.h"
 
@@ -39,7 +39,7 @@
 /* Not quite sure how correct this is - need to understand horiz
  * vs. vertical strides a little better.
  */
-static __inline struct brw_reg sechalf( struct brw_reg reg )
+static INLINE struct brw_reg sechalf( struct brw_reg reg )
 {
    if (reg.vstride)
       reg.nr++;
@@ -122,26 +122,30 @@ static void emit_delta_xy(struct brw_compile *p,
    }
 }
 
-static void emit_wpos_xy(struct brw_compile *p,
-			   const struct brw_reg *dst,
-			   GLuint mask,
-			   const struct brw_reg *arg0)
+static void emit_wpos_xy(struct brw_wm_compile *c,
+			 const struct brw_reg *dst,
+			 GLuint mask,
+			 const struct brw_reg *arg0)
 {
-   /* Calc delta X,Y by subtracting origin in r1 from the pixel
-    * centers.
+   struct brw_compile *p = &c->func;
+
+   /* Calculate the pixel offset from window bottom left into destination
+    * X and Y channels.
     */
    if (mask & WRITEMASK_X) {
-      brw_MOV(p,
+      /* X' = X - origin */
+      brw_ADD(p,
 	      dst[0],
-	      retype(arg0[0], BRW_REGISTER_TYPE_UW));
+	      retype(arg0[0], BRW_REGISTER_TYPE_W),
+	      brw_imm_d(0 - c->key.origin_x));
    }
 
    if (mask & WRITEMASK_Y) {
-      /* TODO -- window_height - Y */
-      brw_MOV(p,
+      /* Y' = height - (Y - origin_y) = height + origin_y - Y */
+      brw_ADD(p,
 	      dst[1],
-	      negate(retype(arg0[1], BRW_REGISTER_TYPE_UW)));
-
+	      negate(retype(arg0[1], BRW_REGISTER_TYPE_W)),
+	      brw_imm_d(c->key.origin_y + c->key.drawable_height - 1));
    }
 }
 
@@ -219,6 +223,10 @@ static void emit_pinterp( struct brw_compile *p,
       if (mask & (1<<i)) {
 	 brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
 	 brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
+      }
+   }
+   for(i = 0; i < 4; i++ ) {
+      if (mask & (1<<i)) {
 	 brw_MUL(p, dst[i], dst[i], w[3]);
       }
    }
@@ -229,20 +237,20 @@ static void emit_cinterp( struct brw_compile *p,
 			 GLuint mask,
 			 const struct brw_reg *arg0 )
 {
-   struct brw_reg interp[4];
-   GLuint nr = arg0[0].nr;
-   GLuint i;
-
-   interp[0] = brw_vec1_grf(nr, 0);
-   interp[1] = brw_vec1_grf(nr, 4);
-   interp[2] = brw_vec1_grf(nr+1, 0);
-   interp[3] = brw_vec1_grf(nr+1, 4);
-
-   for(i = 0; i < 4; i++ ) {
-      if (mask & (1<<i)) {
-	 brw_MOV(p, dst[i], suboffset(interp[i],3));	/* TODO: optimize away like other moves */
-      }
-   }
+	struct brw_reg interp[4];
+	GLuint nr = arg0[0].nr;
+	GLuint i;
+
+	interp[0] = brw_vec1_grf(nr, 0);
+	interp[1] = brw_vec1_grf(nr, 4);
+	interp[2] = brw_vec1_grf(nr+1, 0);
+	interp[3] = brw_vec1_grf(nr+1, 4);
+
+	for(i = 0; i < 4; i++ ) {
+		if (mask & (1<<i)) {
+			brw_MOV(p, dst[i], suboffset(interp[i],3));	/* TODO: optimize away like other moves */
+		}
+	}
 }
 
 
@@ -343,11 +351,10 @@ static void emit_lrp( struct brw_compile *p,
       }
    }
 }
-
-
-static void emit_slt( struct brw_compile *p, 
+static void emit_sop( struct brw_compile *p, 
 		      const struct brw_reg *dst,
 		      GLuint mask,
+		      GLuint cond,
 		      const struct brw_reg *arg0,
 		      const struct brw_reg *arg1 )
 {
@@ -356,34 +363,66 @@ static void emit_slt( struct brw_compile *p,
    for (i = 0; i < 4; i++) {
       if (mask & (1<<i)) {	
 	 brw_MOV(p, dst[i], brw_imm_f(0));
-	 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], arg1[i]);
+	 brw_CMP(p, brw_null_reg(), cond, arg0[i], arg1[i]);
 	 brw_MOV(p, dst[i], brw_imm_f(1.0));
 	 brw_set_predicate_control_flag_value(p, 0xff);
       }
    }
 }
 
-/* Isn't this just the same as the above with the args swapped?
- */
-static void emit_sge( struct brw_compile *p, 
+static void emit_slt( struct brw_compile *p, 
 		      const struct brw_reg *dst,
 		      GLuint mask,
 		      const struct brw_reg *arg0,
 		      const struct brw_reg *arg1 )
 {
-   GLuint i;
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
+}
 
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {	
-	 brw_MOV(p, dst[i], brw_imm_f(0));
-	 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], arg1[i]);
-	 brw_MOV(p, dst[i], brw_imm_f(1.0));
-	 brw_set_predicate_control_flag_value(p, 0xff);
-      }
-   }
+static void emit_sle( struct brw_compile *p, 
+		      const struct brw_reg *dst,
+		      GLuint mask,
+		      const struct brw_reg *arg0,
+		      const struct brw_reg *arg1 )
+{
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
 }
 
+static void emit_sgt( struct brw_compile *p, 
+		      const struct brw_reg *dst,
+		      GLuint mask,
+		      const struct brw_reg *arg0,
+		      const struct brw_reg *arg1 )
+{
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
+}
 
+static void emit_sge( struct brw_compile *p, 
+		      const struct brw_reg *dst,
+		      GLuint mask,
+		      const struct brw_reg *arg0,
+		      const struct brw_reg *arg1 )
+{
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
+}
+
+static void emit_seq( struct brw_compile *p, 
+		      const struct brw_reg *dst,
+		      GLuint mask,
+		      const struct brw_reg *arg0,
+		      const struct brw_reg *arg1 )
+{
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
+}
+
+static void emit_sne( struct brw_compile *p, 
+		      const struct brw_reg *dst,
+		      GLuint mask,
+		      const struct brw_reg *arg0,
+		      const struct brw_reg *arg1 )
+{
+	 emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
+}
 
 static void emit_cmp( struct brw_compile *p, 
 		      const struct brw_reg *dst,
@@ -465,6 +504,9 @@ static void emit_dp3( struct brw_compile *p,
 		      const struct brw_reg *arg0,
 		      const struct brw_reg *arg1 )
 {
+   if (!(mask & WRITEMASK_XYZW))
+      return; /* Do not emit dead code*/
+
    assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
 
    brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
@@ -482,6 +524,9 @@ static void emit_dp4( struct brw_compile *p,
 		      const struct brw_reg *arg0,
 		      const struct brw_reg *arg1 )
 {
+   if (!(mask & WRITEMASK_XYZW))
+      return; /* Do not emit dead code*/
+
    assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
 
    brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
@@ -500,6 +545,9 @@ static void emit_dph( struct brw_compile *p,
 		      const struct brw_reg *arg0,
 		      const struct brw_reg *arg1 )
 {
+   if (!(mask & WRITEMASK_XYZW))
+      return; /* Do not emit dead code*/
+
    assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
 
    brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
@@ -543,8 +591,11 @@ static void emit_math1( struct brw_compile *p,
 			GLuint mask,
 			const struct brw_reg *arg0 )
 {
-   assert((mask & WRITEMASK_XYZW) == WRITEMASK_X ||
-	  function == BRW_MATH_FUNCTION_SINCOS);
+   if (!(mask & WRITEMASK_XYZW))
+      return; /* Do not emit dead code*/
+
+   //assert((mask & WRITEMASK_XYZW) == WRITEMASK_X ||
+   //	  function == BRW_MATH_FUNCTION_SINCOS);
    
    brw_MOV(p, brw_message_reg(2), arg0[0]);
 
@@ -567,6 +618,9 @@ static void emit_math2( struct brw_compile *p,
 			const struct brw_reg *arg0,
 			const struct brw_reg *arg1)
 {
+   if (!(mask & WRITEMASK_XYZW))
+      return; /* Do not emit dead code*/
+
    assert((mask & WRITEMASK_XYZW) == WRITEMASK_X);
 
    brw_push_insn_state(p);
@@ -661,7 +715,7 @@ static void emit_tex( struct brw_wm_compile *c,
 	      retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
 	      1,
 	      retype(c->payload.depth[0].hw_reg, BRW_REGISTER_TYPE_UW),
-	      inst->tex_unit + 1, /* surface */
+	      inst->tex_unit + MAX_DRAW_BUFFERS, /* surface */
 	      inst->tex_unit,	  /* sampler */
 	      inst->writemask,
 	      (shadow ? 
@@ -670,7 +724,6 @@ static void emit_tex( struct brw_wm_compile *c,
 	      responseLength,
 	      msgLength,
 	      0);	
-
 }
 
 
@@ -712,7 +765,7 @@ static void emit_txb( struct brw_wm_compile *c,
 	      retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
 	      1,
 	      retype(c->payload.depth[0].hw_reg, BRW_REGISTER_TYPE_UW),
-	      inst->tex_unit + 1, /* surface */
+	      inst->tex_unit + MAX_DRAW_BUFFERS, /* surface */
 	      inst->tex_unit,	  /* sampler */
 	      inst->writemask,
 	      BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS,
@@ -777,6 +830,7 @@ static void emit_kil( struct brw_wm_compile *c,
       brw_push_insn_state(p);
       brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], brw_imm_f(0));   
       brw_set_predicate_control_flag_value(p, 0xff);
+      brw_set_compression_control(p, BRW_COMPRESSION_NONE);
       brw_AND(p, r0uw, brw_flag_reg(), r0uw);
       brw_pop_insn_state(p);
    }
@@ -784,7 +838,9 @@ static void emit_kil( struct brw_wm_compile *c,
 
 static void fire_fb_write( struct brw_wm_compile *c,
 			   GLuint base_reg,
-			   GLuint nr )
+			   GLuint nr,
+			   GLuint target,
+			   GLuint eot )
 {
    struct brw_compile *p = &c->func;
    
@@ -807,10 +863,10 @@ static void fire_fb_write( struct brw_wm_compile *c,
 		retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW),
 		base_reg,
 		retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
-		0,		/* render surface always 0 */
+		target,		
 		nr,
 		0, 
-		1);
+		eot);
 }
 
 static void emit_aa( struct brw_wm_compile *c,
@@ -835,7 +891,9 @@ static void emit_aa( struct brw_wm_compile *c,
 static void emit_fb_write( struct brw_wm_compile *c,
 			   struct brw_reg *arg0,
 			   struct brw_reg *arg1,
-			   struct brw_reg *arg2)
+			   struct brw_reg *arg2,
+			   GLuint target,
+			   GLuint eot)
 {
    struct brw_compile *p = &c->func;
    GLuint nr = 2;
@@ -890,15 +948,16 @@ static void emit_fb_write( struct brw_wm_compile *c,
       GLuint off = c->key.dest_depth_reg % 2;
 
       if (off != 0) {
-	 brw_push_insn_state(p);
-	 brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-	 brw_MOV(p, brw_message_reg(nr), arg1[comp]);
-	 /* 2nd half? */
-	 brw_MOV(p, brw_message_reg(nr+1), offset(arg1[comp],1));
-	 brw_pop_insn_state(p);
+         brw_push_insn_state(p);
+         brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+
+         brw_MOV(p, brw_message_reg(nr), offset(arg1[comp],1));
+         /* 2nd half? */
+         brw_MOV(p, brw_message_reg(nr+1), arg1[comp+1]);
+         brw_pop_insn_state(p);
       }
       else {
-	 brw_MOV(p, brw_message_reg(nr), arg1[comp]);
+         brw_MOV(p, brw_message_reg(nr), arg1[comp]);
       }
       nr += 2;
    }
@@ -908,7 +967,7 @@ static void emit_fb_write( struct brw_wm_compile *c,
       if (c->key.aa_dest_stencil_reg)
 	 emit_aa(c, arg1, 2);
 
-      fire_fb_write(c, 0, nr);
+      fire_fb_write(c, 0, nr, target, eot);
    }
    else {
       struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
@@ -925,14 +984,14 @@ static void emit_fb_write( struct brw_wm_compile *c,
       jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
       {
 	 emit_aa(c, arg1, 2);
-	 fire_fb_write(c, 0, nr);
+	 fire_fb_write(c, 0, nr, target, eot);
 	 /* note - thread killed in subroutine */
       }
       brw_land_fwd_jump(p, jmp);
 
       /* ELSE: Shuffle up one register to fill in the hole left for AA:
        */
-      fire_fb_write(c, 1, nr-1);
+      fire_fb_write(c, 1, nr-1, target, eot);
    }
 }
 
@@ -1080,7 +1139,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
 	 break;
 
       case WM_WPOSXY:
-	 emit_wpos_xy(p, dst, dst_flags, args[0]);
+	 emit_wpos_xy(c, dst, dst_flags, args[0]);
 	 break;
 
       case WM_PIXELW:
@@ -1100,7 +1159,7 @@ void brw_wm_emit( struct brw_wm_compile *c )
 	 break;
 
       case WM_FB_WRITE:
-	 emit_fb_write(c, args[0], args[1], args[2]);
+	 emit_fb_write(c, args[0], args[1], args[2], inst->target, inst->eot);
 	 break;
 
 	 /* Straightforward arithmetic:
@@ -1208,9 +1267,21 @@ void brw_wm_emit( struct brw_wm_compile *c )
 	 emit_slt(p, dst, dst_flags, args[0], args[1]);
 	 break;
 
+      case OPCODE_SLE:
+	 emit_sle(p, dst, dst_flags, args[0], args[1]);
+	break;
+      case OPCODE_SGT:
+	 emit_sgt(p, dst, dst_flags, args[0], args[1]);
+	break;
       case OPCODE_SGE:
 	 emit_sge(p, dst, dst_flags, args[0], args[1]);
 	 break;
+      case OPCODE_SEQ:
+	 emit_seq(p, dst, dst_flags, args[0], args[1]);
+	break;
+      case OPCODE_SNE:
+	 emit_sne(p, dst, dst_flags, args[0], args[1]);
+	break;
 
       case OPCODE_LIT:
 	 emit_lit(p, dst, dst_flags, args[0]);
@@ -1231,7 +1302,10 @@ void brw_wm_emit( struct brw_wm_compile *c )
 	 break;
 
       default:
-	 assert(0);
+	 _mesa_printf("Unsupported opcode %i (%s) in fragment shader\n",
+		      inst->opcode, inst->opcode < MAX_OPCODE ?
+				    _mesa_opcode_string(inst->opcode) :
+				    "unknown");
       }
       
       for (i = 0; i < 4; i++)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index ff97d87dc45..7f7b957cbe8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -30,9 +30,9 @@
   */
                
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "brw_context.h"
 #include "brw_wm.h"
 #include "brw_util.h"
@@ -144,7 +144,7 @@ static struct prog_dst_register dst_undef( void )
 
 static struct prog_dst_register get_temp( struct brw_wm_compile *c )
 {
-   int bit = ffs( ~c->fp_temp );
+   int bit = _mesa_ffs( ~c->fp_temp );
 
    if (!bit) {
       _mesa_printf("%s: out of temporaries\n", __FILE__);
@@ -158,7 +158,7 @@ static struct prog_dst_register get_temp( struct brw_wm_compile *c )
 
 static void release_temp( struct brw_wm_compile *c, struct prog_dst_register temp )
 {
-   c->fp_temp &= ~1<<(temp.Index + 1 - FIRST_INTERNAL_TEMP);
+   c->fp_temp &= ~(1 << (temp.Index - FIRST_INTERNAL_TEMP));
 }
 
 
@@ -176,6 +176,7 @@ static struct prog_instruction *emit_insn(struct brw_wm_compile *c,
 {
    struct prog_instruction *inst = get_fp_inst(c);
    *inst = *inst0;
+   inst->Data = (void *)inst0;
    return inst;
 }
 
@@ -201,7 +202,6 @@ static struct prog_instruction * emit_op(struct brw_wm_compile *c,
    inst->SrcReg[0] = src0;
    inst->SrcReg[1] = src1;
    inst->SrcReg[2] = src2;
-   
    return inst;
 }
    
@@ -361,6 +361,37 @@ static void emit_interp( struct brw_wm_compile *c,
    c->fp_interp_emitted |= 1<<idx;
 }
 
+static void emit_ddx( struct brw_wm_compile *c,
+        const struct prog_instruction *inst )
+{
+    GLuint idx = inst->SrcReg[0].Index;
+    struct prog_src_register interp = src_reg(PROGRAM_PAYLOAD, idx);
+
+    c->fp_deriv_emitted |= 1<<idx;
+    emit_op(c,
+            OPCODE_DDX,
+            inst->DstReg,
+            0, 0, 0,
+            interp,
+            get_pixel_w(c),
+            src_undef());
+}
+
+static void emit_ddy( struct brw_wm_compile *c,
+        const struct prog_instruction *inst )
+{
+    GLuint idx = inst->SrcReg[0].Index;
+    struct prog_src_register interp = src_reg(PROGRAM_PAYLOAD, idx);
+
+    c->fp_deriv_emitted |= 1<<idx;
+    emit_op(c,
+            OPCODE_DDY,
+            inst->DstReg,
+            0, 0, 0,
+            interp,
+            get_pixel_w(c),
+            src_undef());
+}
 
 /***********************************************************************
  * Hacks to extend the program parameter and constant lists.
@@ -395,10 +426,6 @@ static struct prog_src_register search_or_add_param5(struct brw_wm_compile *c,
 
    idx = _mesa_add_state_reference( paramList, tokens );
 
-   /* Recalculate state dependency: 
-    */
-   c->fp->param_state = paramList->StateFlags;
-
    return src_reg(PROGRAM_STATE_VAR, idx);
 }
 
@@ -433,7 +460,7 @@ static struct prog_src_register search_or_add_const4f( struct brw_wm_compile *c,
    }
    
    idx = _mesa_add_unnamed_constant( paramList, values, 4, &swizzle );
-   /* XXX what about swizzle? */
+   assert(swizzle == SWIZZLE_NOOP); /* Need to handle swizzle in reg setup */
    return src_reg(PROGRAM_STATE_VAR, idx);
 }
 
@@ -463,17 +490,20 @@ static void precalc_dst( struct brw_wm_compile *c,
 
 
    if (dst.WriteMask & WRITEMASK_XZ) {
+      struct prog_instruction *swz;
       GLuint z = GET_SWZ(src0.Swizzle, Z);
 
       /* dst.xz = swz src0.1zzz
        */
-      emit_op(c,
-	      OPCODE_SWZ,
-	      dst_mask(dst, WRITEMASK_XZ),
-	      inst->SaturateMode, 0, 0,
-	      src_swizzle(src0, SWIZZLE_ONE, z, z, z),
-	      src_undef(),
-	      src_undef());
+      swz = emit_op(c,
+		    OPCODE_SWZ,
+		    dst_mask(dst, WRITEMASK_XZ),
+		    inst->SaturateMode, 0, 0,
+		    src_swizzle(src0, SWIZZLE_ONE, z, z, z),
+		    src_undef(),
+		    src_undef());
+      /* Avoid letting negation flag of src0 affect our 1 constant. */
+      swz->SrcReg[0].NegateBase &= ~NEGATE_X;
    }
    if (dst.WriteMask & WRITEMASK_W) {
       /* dst.w = mov src1.w
@@ -496,15 +526,19 @@ static void precalc_lit( struct brw_wm_compile *c,
    struct prog_dst_register dst = inst->DstReg;
    
    if (dst.WriteMask & WRITEMASK_XW) {
+      struct prog_instruction *swz;
+
       /* dst.xw = swz src0.1111
        */
-      emit_op(c,
-	      OPCODE_SWZ,
-	      dst_mask(dst, WRITEMASK_XW),
-	      0, 0, 0,
-	      src_swizzle1(src0, SWIZZLE_ONE),
-	      src_undef(),
-	      src_undef());
+      swz = emit_op(c,
+		    OPCODE_SWZ,
+		    dst_mask(dst, WRITEMASK_XW),
+		    0, 0, 0,
+		    src_swizzle1(src0, SWIZZLE_ONE),
+		    src_undef(),
+		    src_undef());
+      /* Avoid letting the negation flag of src0 affect our 1 constant. */
+      swz->SrcReg[0].NegateBase = 0;
    }
 
 
@@ -524,13 +558,64 @@ static void precalc_tex( struct brw_wm_compile *c,
 {
    struct prog_src_register coord;
    struct prog_dst_register tmpcoord;
-
-   if (inst->TexSrcTarget == TEXTURE_RECT_INDEX) {
+   GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
+
+   if (inst->TexSrcTarget == TEXTURE_CUBE_INDEX) {
+       struct prog_instruction *out;
+       struct prog_dst_register tmp0 = get_temp(c);
+       struct prog_src_register tmp0src = src_reg_from_dst(tmp0);
+       struct prog_dst_register tmp1 = get_temp(c);
+       struct prog_src_register tmp1src = src_reg_from_dst(tmp1);
+       struct prog_src_register src0 = inst->SrcReg[0];
+
+       tmpcoord = get_temp(c);
+       coord = src_reg_from_dst(tmpcoord);
+
+       out = emit_op(c, OPCODE_MOV,
+                     tmpcoord,
+                     0, 0, 0,
+                     src0,
+                     src_undef(),
+                     src_undef());
+       out->SrcReg[0].NegateBase = 0;
+       out->SrcReg[0].Abs = 1;
+
+       emit_op(c, OPCODE_MAX,
+               tmp0,
+               0, 0, 0,
+               src_swizzle1(coord, X),
+               src_swizzle1(coord, Y),
+               src_undef());
+
+       emit_op(c, OPCODE_MAX,
+               tmp1,
+               0, 0, 0,
+               tmp0src,
+               src_swizzle1(coord, Z),
+               src_undef());
+
+       emit_op(c, OPCODE_RCP,
+               tmp0,
+               0, 0, 0,
+               tmp1src,
+               src_undef(),
+               src_undef());
+
+       emit_op(c, OPCODE_MUL,
+               tmpcoord,
+               0, 0, 0,
+               src0,
+               tmp0src,
+               src_undef());
+
+       release_temp(c, tmp0);
+       release_temp(c, tmp1);
+   } else if (inst->TexSrcTarget == TEXTURE_RECT_INDEX) {
       struct prog_src_register scale = 
 	 search_or_add_param5( c, 
 			       STATE_INTERNAL, 
 			       STATE_TEXRECT_SCALE,
-			       inst->TexSrcUnit,
+			       unit,
 			       0,0 );
 
       tmpcoord = get_temp(c);
@@ -556,29 +641,33 @@ static void precalc_tex( struct brw_wm_compile *c,
     * conversion requires allocating a temporary variable which we
     * don't have the facility to do that late in the compilation.
     */
-   if (!(c->key.yuvtex_mask & (1<<inst->TexSrcUnit))) {
+   if (!(c->key.yuvtex_mask & (1<<unit))) {
       emit_op(c, 
 	      OPCODE_TEX,
 	      inst->DstReg,
 	      inst->SaturateMode,
-	      inst->TexSrcUnit,
+	      unit,
 	      inst->TexSrcTarget,
 	      coord,
 	      src_undef(),
 	      src_undef());
    }
    else {
+       GLboolean  swap_uv = c->key.yuvtex_swap_mask & (1<<unit);
+
       /* 
 	 CONST C0 = { -.5, -.0625,  -.5, 1.164 }
 	 CONST C1 = { 1.596, -0.813, 2.018, -.391 }
 	 UYV     = TEX ...
 	 UYV.xyz = ADD UYV,     C0
 	 UYV.y   = MUL UYV.y,   C0.w
-	 RGB.xyz = MAD UYV.xxz, C1,   UYV.y
+ 	 if (UV swaped)
+	    RGB.xyz = MAD UYV.zzx, C1,   UYV.y
+	 else
+	    RGB.xyz = MAD UYV.xxz, C1,   UYV.y 
 	 RGB.y   = MAD UYV.z,   C1.w, RGB.y
       */
       struct prog_dst_register dst = inst->DstReg;
-      struct prog_src_register src0 = inst->SrcReg[0];
       struct prog_dst_register tmp = get_temp(c);
       struct prog_src_register tmpsrc = src_reg_from_dst(tmp);
       struct prog_src_register C0 = search_or_add_const4f( c,  -.5, -.0625, -.5, 1.164 );
@@ -590,9 +679,9 @@ static void precalc_tex( struct brw_wm_compile *c,
 	      OPCODE_TEX,
 	      tmp,
 	      inst->SaturateMode,
-	      inst->TexSrcUnit,
+	      unit,
 	      inst->TexSrcTarget,
-	      src0,
+	      coord,
 	      src_undef(),
 	      src_undef());
 
@@ -608,6 +697,7 @@ static void precalc_tex( struct brw_wm_compile *c,
 
       /* YUV.y   = MUL YUV.y, C0.w
        */
+
       emit_op(c,
 	      OPCODE_MUL,
 	      dst_mask(tmp, WRITEMASK_Y),
@@ -616,13 +706,18 @@ static void precalc_tex( struct brw_wm_compile *c,
 	      src_swizzle1(C0, W),
 	      src_undef());
 
-      /* RGB.xyz = MAD YUV.xxz, C1, YUV.y
+      /* 
+       * if (UV swaped)
+       *     RGB.xyz = MAD YUV.zzx, C1, YUV.y
+       * else
+       *     RGB.xyz = MAD YUV.xxz, C1, YUV.y
        */
+
       emit_op(c,
 	      OPCODE_MAD,
 	      dst_mask(dst, WRITEMASK_XYZ),
 	      0, 0, 0,
-	      src_swizzle(tmpsrc, X,X,Z,Z),
+	      swap_uv?src_swizzle(tmpsrc, Z,Z,X,X):src_swizzle(tmpsrc, X,X,Z,Z),
 	      C1,
 	      src_swizzle1(tmpsrc, Y));
 
@@ -639,7 +734,8 @@ static void precalc_tex( struct brw_wm_compile *c,
       release_temp(c, tmp);
    }
 
-   if (inst->TexSrcTarget == GL_TEXTURE_RECTANGLE_NV) 
+   if ((inst->TexSrcTarget == TEXTURE_RECT_INDEX) ||
+       (inst->TexSrcTarget == TEXTURE_CUBE_INDEX))
       release_temp(c, tmpcoord);
 }
 
@@ -660,7 +756,7 @@ static GLboolean projtex( struct brw_wm_compile *c,
       return 0;  /* ut2004 gun rendering !?! */
    else if (src.File == PROGRAM_INPUT && 
 	    GET_SWZ(src.Swizzle, W) == W &&
-	    (c->key.projtex_mask & (1<<src.Index)) == 0)
+           (c->key.projtex_mask & (1<<(src.Index + FRAG_ATTRIB_WPOS - FRAG_ATTRIB_TEX0))) == 0)
       return 0;
    else
       return 1;
@@ -770,14 +866,34 @@ static void emit_fb_write( struct brw_wm_compile *c )
    struct prog_src_register outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR);
    struct prog_src_register payload_r0_depth = src_reg(PROGRAM_PAYLOAD, PAYLOAD_DEPTH);
    struct prog_src_register outdepth = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_DEPR);
+   GLuint i;
 
-   emit_op(c,
-	   WM_FB_WRITE,
-	   dst_mask(dst_undef(),0),
-	   0, 0, 0,
-	   outcolor,
-	   payload_r0_depth,
-	   outdepth);
+   struct prog_instruction *inst, *last_inst;
+   struct brw_context *brw = c->func.brw;
+
+   /* inst->Sampler is not used by backend, 
+      use it for fb write target and eot */
+
+   if (brw->state.nr_draw_regions > 1) {
+       for (i = 0 ; i < brw->state.nr_draw_regions; i++) {
+	   outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_DATA0 + i);
+	   last_inst = inst = emit_op(c,
+		   WM_FB_WRITE, dst_mask(dst_undef(),0), 0, 0, 0,
+		   outcolor, payload_r0_depth, outdepth);
+	   inst->Sampler = (i<<1);
+	   if (c->fp_fragcolor_emitted) {
+	       outcolor = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_COLR);
+	       last_inst = inst = emit_op(c, WM_FB_WRITE, dst_mask(dst_undef(),0),
+		       0, 0, 0, outcolor, payload_r0_depth, outdepth);
+	       inst->Sampler = (i<<1);
+	   }
+       }
+       last_inst->Sampler |= 1; //eot
+   }else {
+       inst = emit_op(c, WM_FB_WRITE, dst_mask(dst_undef(),0),
+	       0, 0, 0, outcolor, payload_r0_depth, outdepth);
+       inst->Sampler = 1|(0<<1);
+   }
 }
 
 
@@ -803,7 +919,15 @@ static void validate_src_regs( struct brw_wm_compile *c,
    }
 }
 	 
-
+static void validate_dst_regs( struct brw_wm_compile *c,
+			       const struct prog_instruction *inst )
+{
+   if (inst->DstReg.File == PROGRAM_OUTPUT) {
+       GLuint idx = inst->DstReg.Index;
+       if (idx == FRAG_RESULT_COLR)
+	   c->fp_fragcolor_emitted = 1;
+   }
+}
 
 static void print_insns( const struct prog_instruction *insn,
 			 GLuint nr )
@@ -848,12 +972,16 @@ void brw_wm_pass_fp( struct brw_wm_compile *c )
 
    for (insn = 0; insn < fp->program.Base.NumInstructions; insn++) {
       const struct prog_instruction *inst = &fp->program.Base.Instructions[insn];
+      validate_src_regs(c, inst);
+      validate_dst_regs(c, inst);
+   }
+   for (insn = 0; insn < fp->program.Base.NumInstructions; insn++) {
+      const struct prog_instruction *inst = &fp->program.Base.Instructions[insn];
       struct prog_instruction *out;
 
       /* Check for INPUT values, emit INTERP instructions where
        * necessary:
        */
-      validate_src_regs(c, inst);
 
 
       switch (inst->Opcode) {
@@ -889,11 +1017,20 @@ void brw_wm_pass_fp( struct brw_wm_compile *c )
       case OPCODE_LIT:
 	 precalc_lit(c, inst);
 	 break;
-     
+
+      case OPCODE_TEX:
+	 precalc_tex(c, inst);
+	 break;
+
       case OPCODE_TXP:
 	 precalc_txp(c, inst);
 	 break;
 
+      case OPCODE_TXB:
+	 out = emit_insn(c, inst);
+	 out->TexSrcUnit = fp->program.Base.SamplerUnits[inst->TexSrcUnit];
+	 break;
+
       case OPCODE_XPD: 
 	 out = emit_insn(c, inst);
 	 /* This should probably be done in the parser. 
@@ -907,8 +1044,16 @@ void brw_wm_pass_fp( struct brw_wm_compile *c )
 	  */
 	 out->DstReg.WriteMask = 0;
 	 break;
-
+      case OPCODE_DDX:
+	 emit_ddx(c, inst);
+	 break;
+      case OPCODE_DDY:
+         emit_ddy(c, inst);
+	break;
       case OPCODE_END:
+	 emit_fog(c);
+	 emit_fb_write(c);
+	 break;
       case OPCODE_PRINT:
 	 break;
 	 
@@ -917,15 +1062,11 @@ void brw_wm_pass_fp( struct brw_wm_compile *c )
 	 break;
       }
    }
-   
-   emit_fog(c);
-   emit_fb_write(c);
-
 
    if (INTEL_DEBUG & DEBUG_WM) {
-      _mesa_printf("\n\n\npass_fp:\n");
-      print_insns( c->prog_instructions, c->nr_fp_insns );
-      _mesa_printf("\n");
+	   _mesa_printf("\n\n\npass_fp:\n");
+	   print_insns( c->prog_instructions, c->nr_fp_insns );
+	   _mesa_printf("\n");
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
new file mode 100644
index 00000000000..baecfdcb799
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -0,0 +1,2519 @@
+#include "main/macros.h"
+#include "shader/prog_parameter.h"
+#include "brw_context.h"
+#include "brw_eu.h"
+#include "brw_wm.h"
+
+enum _subroutine {
+    SUB_NOISE1, SUB_NOISE2, SUB_NOISE3, SUB_NOISE4
+};
+
+/* Only guess, need a flag in gl_fragment_program later */
+GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp)
+{
+    int i;
+    for (i = 0; i < fp->Base.NumInstructions; i++) {
+	struct prog_instruction *inst = &fp->Base.Instructions[i];
+	switch (inst->Opcode) {
+	    case OPCODE_IF:
+	    case OPCODE_TRUNC:
+	    case OPCODE_ENDIF:
+	    case OPCODE_CAL:
+	    case OPCODE_BRK:
+	    case OPCODE_RET:
+	    case OPCODE_DDX:
+	    case OPCODE_DDY:
+	    case OPCODE_NOISE1:
+	    case OPCODE_NOISE2:
+	    case OPCODE_NOISE3:
+	    case OPCODE_NOISE4:
+	    case OPCODE_BGNLOOP:
+		return GL_TRUE; 
+	    default:
+		break;
+	}
+    }
+    return GL_FALSE; 
+}
+
+static void set_reg(struct brw_wm_compile *c, int file, int index, 
+	int component, struct brw_reg reg)
+{
+    c->wm_regs[file][index][component].reg = reg;
+    c->wm_regs[file][index][component].inited = GL_TRUE;
+}
+
+static int get_scalar_dst_index(struct prog_instruction *inst)
+{
+    int i;
+    for (i = 0; i < 4; i++)
+	if (inst->DstReg.WriteMask & (1<<i))
+	    break;
+    return i;
+}
+
+static struct brw_reg alloc_tmp(struct brw_wm_compile *c)
+{
+    struct brw_reg reg;
+    if(c->tmp_index == c->tmp_max)
+	c->tmp_regs[ c->tmp_max++ ] = c->reg_index++;
+    
+    reg = brw_vec8_grf(c->tmp_regs[ c->tmp_index++ ], 0);
+    return reg;
+}
+
+static int mark_tmps(struct brw_wm_compile *c)
+{
+    return c->tmp_index;
+}
+
+static struct brw_reg lookup_tmp( struct brw_wm_compile *c, int index )
+{
+    return brw_vec8_grf( c->tmp_regs[ index ], 0 );
+}
+
+static void release_tmps(struct brw_wm_compile *c, int mark)
+{
+    c->tmp_index = mark;
+}
+
+static struct brw_reg 
+get_reg(struct brw_wm_compile *c, int file, int index, int component, int nr, GLuint neg, GLuint abs)
+{
+    struct brw_reg reg;
+    switch (file) {
+	case PROGRAM_STATE_VAR:
+	case PROGRAM_CONSTANT:
+	case PROGRAM_UNIFORM:
+	    file = PROGRAM_STATE_VAR;
+	    break;
+	case PROGRAM_UNDEFINED:
+	    return brw_null_reg();	
+	default:
+	    break;
+    }
+
+    if(c->wm_regs[file][index][component].inited)
+	reg = c->wm_regs[file][index][component].reg;
+    else 
+	reg = brw_vec8_grf(c->reg_index, 0);
+
+    if(!c->wm_regs[file][index][component].inited) {
+	set_reg(c, file, index, component, reg);
+	c->reg_index++;
+    }
+
+    if (neg & (1<< component)) {
+	reg = negate(reg);
+    }
+    if (abs)
+	reg = brw_abs(reg);
+    return reg;
+}
+
+static void prealloc_reg(struct brw_wm_compile *c)
+{
+    int i, j;
+    struct brw_reg reg;
+    int nr_interp_regs = 0;
+    GLuint inputs = FRAG_BIT_WPOS | c->fp_interp_emitted | c->fp_deriv_emitted;
+
+    for (i = 0; i < 4; i++) {
+	reg = (i < c->key.nr_depth_regs) 
+	    ? brw_vec8_grf(i*2, 0) : brw_vec8_grf(0, 0);
+	set_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, i, reg);
+    }
+    c->reg_index += 2*c->key.nr_depth_regs;
+    {
+	int nr_params = c->fp->program.Base.Parameters->NumParameters;
+	struct gl_program_parameter_list *plist = 
+	    c->fp->program.Base.Parameters;
+	int index = 0;
+	c->prog_data.nr_params = 4*nr_params;
+	for (i = 0; i < nr_params; i++) {
+	    for (j = 0; j < 4; j++, index++) {
+		reg = brw_vec1_grf(c->reg_index + index/8, 
+			index%8);
+		c->prog_data.param[index] = 
+		    &plist->ParameterValues[i][j];
+		set_reg(c, PROGRAM_STATE_VAR, i, j, reg);
+	    }
+	}
+	c->nr_creg = 2*((4*nr_params+15)/16);
+	c->reg_index += c->nr_creg;
+    }
+    for (i = 0; i < FRAG_ATTRIB_MAX; i++) {
+	if (inputs & (1<<i)) {
+	    nr_interp_regs++;
+	    reg = brw_vec8_grf(c->reg_index, 0);
+	    for (j = 0; j < 4; j++)
+		set_reg(c, PROGRAM_PAYLOAD, i, j, reg);
+	    c->reg_index += 2;
+
+	}
+    }
+    c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2;
+    c->prog_data.urb_read_length = nr_interp_regs * 2;
+    c->prog_data.curb_read_length = c->nr_creg;
+    c->emit_mask_reg = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 0);
+    c->reg_index++;
+    c->stack =  brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 0);
+    c->reg_index += 2;
+}
+
+static struct brw_reg get_dst_reg(struct brw_wm_compile *c, 
+	struct prog_instruction *inst, int component, int nr)
+{
+    return get_reg(c, inst->DstReg.File, inst->DstReg.Index, component, nr,
+	    0, 0);
+}
+
+static struct brw_reg get_src_reg(struct brw_wm_compile *c, 
+	struct prog_src_register *src, int index, int nr)
+{
+    int component = GET_SWZ(src->Swizzle, index);
+    return get_reg(c, src->File, src->Index, component, nr, 
+	    src->NegateBase, src->Abs);
+}
+
+/* Subroutines are minimal support for resusable instruction sequences.
+   They are implemented as simply as possible to minimise overhead: there
+   is no explicit support for communication between the caller and callee
+   other than saving the return address in a temporary register, nor is
+   there any automatic local storage.  This implies that great care is
+   required before attempting reentrancy or any kind of nested
+   subroutine invocations. */
+static void invoke_subroutine( struct brw_wm_compile *c,
+			       enum _subroutine subroutine,
+			       void (*emit)( struct brw_wm_compile * ) )
+{
+    struct brw_compile *p = &c->func;
+
+    assert( subroutine < BRW_WM_MAX_SUBROUTINE );
+    
+    if( c->subroutines[ subroutine ] ) {
+	/* subroutine previously emitted: reuse existing instructions */
+
+	int mark = mark_tmps( c );
+	struct brw_reg return_address = retype( alloc_tmp( c ),
+						BRW_REGISTER_TYPE_UD );
+	int here = p->nr_insn;
+	
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE);
+	brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 2 << 4 ) );
+
+	brw_ADD( p, brw_ip_reg(), brw_ip_reg(),
+		 brw_imm_d( ( c->subroutines[ subroutine ] -
+			      here - 1 ) << 4 ) );
+	brw_pop_insn_state(p);
+
+	release_tmps( c, mark );
+    } else {
+	/* previously unused subroutine: emit, and mark for later reuse */
+	
+	int mark = mark_tmps( c );
+	struct brw_reg return_address = retype( alloc_tmp( c ),
+						BRW_REGISTER_TYPE_UD );
+	struct brw_instruction *calc;
+	int base = p->nr_insn;
+	
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE);
+	calc = brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 0 ) );
+	brw_pop_insn_state(p);
+	
+	c->subroutines[ subroutine ] = p->nr_insn;
+
+	emit( c );
+	
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE);
+	brw_MOV( p, brw_ip_reg(), return_address );
+	brw_pop_insn_state(p);
+
+	brw_set_src1( calc, brw_imm_ud( ( p->nr_insn - base ) << 4 ) );
+	
+	release_tmps( c, mark );
+    }
+}
+
+static void emit_abs( struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    int i;
+    struct brw_compile *p = &c->func;
+    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+    for (i = 0; i < 4; i++) {
+	if (inst->DstReg.WriteMask & (1<<i)) {
+	    struct brw_reg src, dst;
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    brw_MOV(p, dst, brw_abs(src));
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_trunc( struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    int i;
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    struct brw_reg src, dst;
+	    dst = get_dst_reg(c, inst, i, 1) ;
+	    src = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    brw_RNDD(p, dst, src);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_mov( struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    int i;
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    struct brw_reg src, dst;
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    brw_MOV(p, dst, src);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_pixel_xy(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_reg r1 = brw_vec1_grf(1, 0);
+    struct brw_reg r1_uw = retype(r1, BRW_REGISTER_TYPE_UW);
+
+    struct brw_reg dst0, dst1;
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+
+    dst0 = get_dst_reg(c, inst, 0, 1);
+    dst1 = get_dst_reg(c, inst, 1, 1);
+    /* Calculate pixel centers by adding 1 or 0 to each of the
+     * micro-tile coordinates passed in r1.
+     */
+    if (mask & WRITEMASK_X) {
+	brw_ADD(p,
+		vec8(retype(dst0, BRW_REGISTER_TYPE_UW)),
+		stride(suboffset(r1_uw, 4), 2, 4, 0),
+		brw_imm_v(0x10101010));
+    }
+
+    if (mask & WRITEMASK_Y) {
+	brw_ADD(p,
+		vec8(retype(dst1, BRW_REGISTER_TYPE_UW)),
+		stride(suboffset(r1_uw, 5), 2, 4, 0),
+		brw_imm_v(0x11001100));
+    }
+
+}
+
+static void emit_delta_xy(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_reg r1 = brw_vec1_grf(1, 0);
+    struct brw_reg dst0, dst1, src0, src1;
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+
+    dst0 = get_dst_reg(c, inst, 0, 1);
+    dst1 = get_dst_reg(c, inst, 1, 1);
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    src1 = get_src_reg(c, &inst->SrcReg[0], 1, 1);
+    /* Calc delta X,Y by subtracting origin in r1 from the pixel
+     * centers.
+     */
+    if (mask & WRITEMASK_X) {
+	brw_ADD(p,
+		dst0,
+		retype(src0, BRW_REGISTER_TYPE_UW),
+		negate(r1));
+    }
+
+    if (mask & WRITEMASK_Y) {
+	brw_ADD(p,
+		dst1,
+		retype(src1, BRW_REGISTER_TYPE_UW),
+		negate(suboffset(r1,1)));
+
+    }
+
+}
+
+
+static void fire_fb_write( struct brw_wm_compile *c,
+                           GLuint base_reg,
+                           GLuint nr,
+                           GLuint target,
+                           GLuint eot)
+{
+    struct brw_compile *p = &c->func;
+    /* Pass through control information:
+     */
+    /*  mov (8) m1.0<1>:ud   r1.0<8;8,1>:ud   { Align1 NoMask } */
+    {
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE); /* ? */
+	brw_MOV(p,
+		brw_message_reg(base_reg + 1),
+		brw_vec8_grf(1, 0));
+	brw_pop_insn_state(p);
+    }
+    /* Send framebuffer write message: */
+    brw_fb_WRITE(p,
+	    retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW),
+	    base_reg,
+	    retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
+	    target,              
+	    nr,
+	    0,
+	    eot);
+}
+
+static void emit_fb_write(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    int nr = 2;
+    int channel;
+    GLuint target, eot;
+    struct brw_reg src0;
+
+    /* Reserve a space for AA - may not be needed:
+     */
+    if (c->key.aa_dest_stencil_reg)
+	nr += 1;
+    {
+	brw_push_insn_state(p);
+	for (channel = 0; channel < 4; channel++) {
+	    src0 = get_src_reg(c,  &inst->SrcReg[0], channel, 1);
+	    /*  mov (8) m2.0<1>:ud   r28.0<8;8,1>:ud  { Align1 } */
+	    /*  mov (8) m6.0<1>:ud   r29.0<8;8,1>:ud  { Align1 SecHalf } */
+	    brw_MOV(p, brw_message_reg(nr + channel), src0);
+	}
+	/* skip over the regs populated above: */
+	nr += 8;
+	brw_pop_insn_state(p);
+    }
+
+   if (c->key.source_depth_to_render_target)
+   {
+      if (c->key.computes_depth) {
+         src0 = get_src_reg(c, &inst->SrcReg[2], 2, 1);
+         brw_MOV(p, brw_message_reg(nr), src0);
+      } else {
+         src0 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
+         brw_MOV(p, brw_message_reg(nr), src0);
+      }
+
+      nr += 2;
+   }
+    target = inst->Sampler >> 1;
+    eot = inst->Sampler & 1;
+    fire_fb_write(c, 0, nr, target, eot);
+}
+
+static void emit_pixel_w( struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    if (mask & WRITEMASK_W) {
+	struct brw_reg dst, src0, delta0, delta1;
+	struct brw_reg interp3;
+
+	dst = get_dst_reg(c, inst, 3, 1);
+	src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+	delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
+	delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
+
+	interp3 = brw_vec1_grf(src0.nr+1, 4);
+	/* Calc 1/w - just linterp wpos[3] optimized by putting the
+	 * result straight into a message reg.
+	 */
+	brw_LINE(p, brw_null_reg(), interp3, delta0);
+	brw_MAC(p, brw_message_reg(2), suboffset(interp3, 1), delta1);
+
+	/* Calc w */
+	brw_math_16( p, dst,
+		BRW_MATH_FUNCTION_INV,
+		BRW_MATH_SATURATE_NONE,
+		2, brw_null_reg(),
+		BRW_MATH_PRECISION_FULL);
+    }
+}
+
+static void emit_linterp(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg interp[4];
+    struct brw_reg dst, delta0, delta1;
+    struct brw_reg src0;
+
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
+    delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
+    GLuint nr = src0.nr;
+    int i;
+
+    interp[0] = brw_vec1_grf(nr, 0);
+    interp[1] = brw_vec1_grf(nr, 4);
+    interp[2] = brw_vec1_grf(nr+1, 0);
+    interp[3] = brw_vec1_grf(nr+1, 4);
+
+    for(i = 0; i < 4; i++ ) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_LINE(p, brw_null_reg(), interp[i], delta0);
+	    brw_MAC(p, dst, suboffset(interp[i],1), delta1);
+	}
+    }
+}
+
+static void emit_cinterp(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+
+    struct brw_reg interp[4];
+    struct brw_reg dst, src0;
+
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    GLuint nr = src0.nr;
+    int i;
+
+    interp[0] = brw_vec1_grf(nr, 0);
+    interp[1] = brw_vec1_grf(nr, 4);
+    interp[2] = brw_vec1_grf(nr+1, 0);
+    interp[3] = brw_vec1_grf(nr+1, 4);
+
+    for(i = 0; i < 4; i++ ) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_MOV(p, dst, suboffset(interp[i],3));
+	}
+    }
+}
+
+static void emit_pinterp(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+
+    struct brw_reg interp[4];
+    struct brw_reg dst, delta0, delta1;
+    struct brw_reg src0, w;
+
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
+    delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
+    w = get_src_reg(c, &inst->SrcReg[2], 3, 1);
+    GLuint nr = src0.nr;
+    int i;
+
+    interp[0] = brw_vec1_grf(nr, 0);
+    interp[1] = brw_vec1_grf(nr, 4);
+    interp[2] = brw_vec1_grf(nr+1, 0);
+    interp[3] = brw_vec1_grf(nr+1, 4);
+
+    for(i = 0; i < 4; i++ ) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_LINE(p, brw_null_reg(), interp[i], delta0);
+	    brw_MAC(p, dst, suboffset(interp[i],1), 
+		    delta1);
+	    brw_MUL(p, dst, dst, w);
+	}
+    }
+}
+
+static void emit_xpd(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    int i;
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    for (i = 0; i < 4; i++) {
+	GLuint i2 = (i+2)%3;
+	GLuint i1 = (i+1)%3;
+	if (mask & (1<<i)) {
+	    struct brw_reg src0, src1, dst;
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = negate(get_src_reg(c, &inst->SrcReg[0], i2, 1));
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i1, 1);
+	    brw_MUL(p, brw_null_reg(), src0, src1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i1, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i2, 1);
+	    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+	    brw_MAC(p, dst, src0, src1);
+	    brw_set_saturate(p, 0);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_dp3(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_reg src0[3], src1[3], dst;
+    int i;
+    struct brw_compile *p = &c->func;
+    for (i = 0; i < 3; i++) {
+	src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
+    }
+
+    dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
+    brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
+    brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    brw_MAC(p, dst, src0[2], src1[2]);
+    brw_set_saturate(p, 0);
+}
+
+static void emit_dp4(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_reg src0[4], src1[4], dst;
+    int i;
+    struct brw_compile *p = &c->func;
+    for (i = 0; i < 4; i++) {
+	src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
+    }
+    dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
+    brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
+    brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
+    brw_MAC(p, brw_null_reg(), src0[2], src1[2]);
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    brw_MAC(p, dst, src0[3], src1[3]);
+    brw_set_saturate(p, 0);
+}
+
+static void emit_dph(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_reg src0[4], src1[4], dst;
+    int i;
+    struct brw_compile *p = &c->func;
+    for (i = 0; i < 4; i++) {
+	src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
+    }
+    dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
+    brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
+    brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
+    brw_MAC(p, dst, src0[2], src1[2]);
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    brw_ADD(p, dst, src0[3], src1[3]);
+    brw_set_saturate(p, 0);
+}
+
+static void emit_math1(struct brw_wm_compile *c,
+		struct prog_instruction *inst, GLuint func)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, dst;
+
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
+    brw_MOV(p, brw_message_reg(2), src0);
+    brw_math(p,
+	    dst,
+	    func,
+	    (inst->SaturateMode != SATURATE_OFF) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
+	    2,
+	    brw_null_reg(),
+	    BRW_MATH_DATA_VECTOR,
+	    BRW_MATH_PRECISION_FULL);
+}
+
+static void emit_rcp(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_INV);
+}
+
+static void emit_rsq(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_RSQ);
+}
+
+static void emit_sin(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_SIN);
+}
+
+static void emit_cos(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_COS);
+}
+
+static void emit_ex2(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_EXP);
+}
+
+static void emit_lg2(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_math1(c, inst, BRW_MATH_FUNCTION_LOG);
+}
+
+static void emit_add(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_ADD(p, dst, src0, src1);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_sub(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_ADD(p, dst, src0, negate(src1));
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_mul(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_MUL(p, dst, src0, src1);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_frc(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    brw_FRC(p, dst, src0);
+	}
+    }
+    if (inst->SaturateMode != SATURATE_OFF)
+	brw_set_saturate(p, 0);
+}
+
+static void emit_flr(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    brw_RNDD(p, dst, src0);
+	}
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_max(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg src0, src1, dst;
+    int i;
+    brw_push_insn_state(p);
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_MOV(p, dst, src0);
+	    brw_set_saturate(p, 0);
+
+	    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, src0, src1);
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+	    brw_MOV(p, dst, src1);
+	    brw_set_saturate(p, 0);
+	    brw_set_predicate_control_flag_value(p, 0xff);
+	}
+    }
+    brw_pop_insn_state(p);
+}
+
+static void emit_min(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg src0, src1, dst;
+    int i;
+    brw_push_insn_state(p);
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_MOV(p, dst, src0);
+	    brw_set_saturate(p, 0);
+
+	    brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, src1, src0);
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+	    brw_MOV(p, dst, src1);
+	    brw_set_saturate(p, 0);
+	    brw_set_predicate_control_flag_value(p, 0xff);
+	}
+    }
+    brw_pop_insn_state(p);
+}
+
+static void emit_pow(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg dst, src0, src1;
+    dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    src1 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
+
+    brw_MOV(p, brw_message_reg(2), src0);
+    brw_MOV(p, brw_message_reg(3), src1);
+
+    brw_math(p,
+	    dst,
+	    BRW_MATH_FUNCTION_POW,
+	    (inst->SaturateMode != SATURATE_OFF) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
+	    2,
+	    brw_null_reg(),
+	    BRW_MATH_DATA_VECTOR,
+	    BRW_MATH_PRECISION_FULL);
+}
+
+static void emit_lrp(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg dst, tmp1, tmp2, src0, src1, src2;
+    int i;
+    int mark = mark_tmps(c);
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+
+	    if (src1.nr == dst.nr) {
+		tmp1 = alloc_tmp(c);
+		brw_MOV(p, tmp1, src1);
+	    } else
+		tmp1 = src1;
+
+	    src2 = get_src_reg(c, &inst->SrcReg[2], i, 1);
+	    if (src2.nr == dst.nr) {
+		tmp2 = alloc_tmp(c);
+		brw_MOV(p, tmp2, src2);
+	    } else
+		tmp2 = src2;
+
+	    brw_ADD(p, dst, negate(src0), brw_imm_f(1.0));
+	    brw_MUL(p, brw_null_reg(), dst, tmp2);
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_MAC(p, dst, src0, tmp1);
+	    brw_set_saturate(p, 0);
+	}
+	release_tmps(c, mark);
+    }
+}
+
+static void emit_kil(struct brw_wm_compile *c)
+{
+	struct brw_compile *p = &c->func;
+	struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE);
+	brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+	brw_AND(p, depth, c->emit_mask_reg, depth);
+	brw_pop_insn_state(p);
+}
+
+static void emit_mad(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg dst, src0, src1, src2;
+    int i;
+
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    src2 = get_src_reg(c, &inst->SrcReg[2], i, 1);
+	    brw_MUL(p, dst, src0, src1);
+
+	    brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
+	    brw_ADD(p, dst, dst, src2);
+	    brw_set_saturate(p, 0);
+	}
+    }
+}
+
+static void emit_sop(struct brw_wm_compile *c,
+		struct prog_instruction *inst, GLuint cond)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg dst, src0, src1;
+    int i;
+
+    for (i = 0; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
+	    src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
+	    brw_push_insn_state(p);
+	    brw_CMP(p, brw_null_reg(), cond, src0, src1);
+	    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+	    brw_MOV(p, dst, brw_imm_f(0.0));
+	    brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+	    brw_MOV(p, dst, brw_imm_f(1.0));
+	    brw_pop_insn_state(p);
+	}
+    }
+}
+
+static void emit_slt(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_L);
+}
+
+static void emit_sle(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_LE);
+}
+
+static void emit_sgt(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_G);
+}
+
+static void emit_sge(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_GE);
+}
+
+static void emit_seq(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_EQ);
+}
+
+static void emit_sne(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    emit_sop(c, inst, BRW_CONDITIONAL_NEQ);
+}
+
+static void emit_ddx(struct brw_wm_compile *c,
+                struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg interp[4];
+    struct brw_reg dst;
+    struct brw_reg src0, w;
+    GLuint nr, i;
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    w = get_src_reg(c, &inst->SrcReg[1], 3, 1);
+    nr = src0.nr;
+    interp[0] = brw_vec1_grf(nr, 0);
+    interp[1] = brw_vec1_grf(nr, 4);
+    interp[2] = brw_vec1_grf(nr+1, 0);
+    interp[3] = brw_vec1_grf(nr+1, 4);
+    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+    for(i = 0; i < 4; i++ ) {
+        if (mask & (1<<i)) {
+            dst = get_dst_reg(c, inst, i, 1);
+            brw_MOV(p, dst, interp[i]);
+            brw_MUL(p, dst, dst, w);
+        }
+    }
+    brw_set_saturate(p, 0);
+}
+
+static void emit_ddy(struct brw_wm_compile *c,
+                struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg interp[4];
+    struct brw_reg dst;
+    struct brw_reg src0, w;
+    GLuint nr, i;
+
+    src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    nr = src0.nr;
+    w = get_src_reg(c, &inst->SrcReg[1], 3, 1);
+    interp[0] = brw_vec1_grf(nr, 0);
+    interp[1] = brw_vec1_grf(nr, 4);
+    interp[2] = brw_vec1_grf(nr+1, 0);
+    interp[3] = brw_vec1_grf(nr+1, 4);
+    brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
+    for(i = 0; i < 4; i++ ) {
+        if (mask & (1<<i)) {
+            dst = get_dst_reg(c, inst, i, 1);
+            brw_MOV(p, dst, suboffset(interp[i], 1));
+            brw_MUL(p, dst, dst, w);
+        }
+    }
+    brw_set_saturate(p, 0);
+}
+
+static __inline struct brw_reg high_words( struct brw_reg reg )
+{
+    return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_W ), 1 ),
+		   0, 8, 2 );
+}
+
+static __inline struct brw_reg low_words( struct brw_reg reg )
+{
+    return stride( retype( reg, BRW_REGISTER_TYPE_W ), 0, 8, 2 );
+}
+
+static __inline struct brw_reg even_bytes( struct brw_reg reg )
+{
+    return stride( retype( reg, BRW_REGISTER_TYPE_B ), 0, 16, 2 );
+}
+
+static __inline struct brw_reg odd_bytes( struct brw_reg reg )
+{
+    return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_B ), 1 ),
+		   0, 16, 2 );
+}
+
+/* One-, two- and three-dimensional Perlin noise, similar to the description
+   in _Improving Noise_, Ken Perlin, Computer Graphics vol. 35 no. 3. */
+static void noise1_sub( struct brw_wm_compile *c ) {
+
+    struct brw_compile *p = &c->func;
+    struct brw_reg param,
+	x0, x1, /* gradients at each end */       
+	t, tmp[ 2 ], /* float temporaries */
+	itmp[ 5 ]; /* unsigned integer temporaries (aliases of floats above) */
+    int i;
+    int mark = mark_tmps( c );
+
+    x0 = alloc_tmp( c );
+    x1 = alloc_tmp( c );
+    t = alloc_tmp( c );
+    tmp[ 0 ] = alloc_tmp( c );
+    tmp[ 1 ] = alloc_tmp( c );
+    itmp[ 0 ] = retype( tmp[ 0 ], BRW_REGISTER_TYPE_UD );
+    itmp[ 1 ] = retype( tmp[ 1 ], BRW_REGISTER_TYPE_UD );
+    itmp[ 2 ] = retype( x0, BRW_REGISTER_TYPE_UD );
+    itmp[ 3 ] = retype( x1, BRW_REGISTER_TYPE_UD );
+    itmp[ 4 ] = retype( t, BRW_REGISTER_TYPE_UD );
+    
+    param = lookup_tmp( c, mark - 2 );
+
+    brw_set_access_mode( p, BRW_ALIGN_1 );
+
+    brw_MOV( p, itmp[ 2 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
+
+    /* Arrange the two end coordinates into scalars (itmp0/itmp1) to
+       be hashed.  Also compute the remainder (offset within the unit
+       length), interleaved to reduce register dependency penalties. */
+    brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param );
+    brw_FRC( p, param, param );
+    brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 1 ) );
+    brw_MOV( p, itmp[ 3 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
+    brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
+
+    /* We're now ready to perform the hashing.  The two hashes are
+       interleaved for performance.  The hash function used is
+       designed to rapidly achieve avalanche and require only 32x16
+       bit multiplication, and 16-bit swizzles (which we get for
+       free).  We can't use immediate operands in the multiplies,
+       because immediates are permitted only in src1 and the 16-bit
+       factor is permitted only in src0. */
+    for( i = 0; i < 2; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 2 ], itmp[ i ] );
+    for( i = 0; i < 2; i++ )
+       brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		high_words( itmp[ i ] ) );
+    for( i = 0; i < 2; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 3 ], itmp[ i ] );
+    for( i = 0; i < 2; i++ )
+       brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		high_words( itmp[ i ] ) );
+    for( i = 0; i < 2; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
+    for( i = 0; i < 2; i++ )
+       brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		high_words( itmp[ i ] ) );
+
+    /* Now we want to initialise the two gradients based on the
+       hashes.  Format conversion from signed integer to float leaves
+       everything scaled too high by a factor of pow( 2, 31 ), but
+       we correct for that right at the end. */
+    brw_ADD( p, t, param, brw_imm_f( -1.0 ) );
+    brw_MOV( p, x0, retype( tmp[ 0 ], BRW_REGISTER_TYPE_D ) );
+    brw_MOV( p, x1, retype( tmp[ 1 ], BRW_REGISTER_TYPE_D ) );
+
+    brw_MUL( p, x0, x0, param );
+    brw_MUL( p, x1, x1, t );
+    
+    /* We interpolate between the gradients using the polynomial
+       6t^5 - 15t^4 + 10t^3 (Perlin). */
+    brw_MUL( p, tmp[ 0 ], param, brw_imm_f( 6.0 ) );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+    brw_ADD( p, x1, x1, negate( x0 ) ); /* unrelated work to fill the
+					   pipeline */
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+    brw_MUL( p, param, tmp[ 0 ], param );
+    brw_MUL( p, x1, x1, param );
+    brw_ADD( p, x0, x0, x1 );    
+    /* scale by pow( 2, -30 ), to compensate for the format conversion
+       above and an extra factor of 2 so that a single gradient covers
+       the [-1,1] range */
+    brw_MUL( p, param, x0, brw_imm_f( 0.000000000931322574615478515625 ) );
+
+    release_tmps( c, mark );
+}
+
+static void emit_noise1( struct brw_wm_compile *c,
+			 struct prog_instruction *inst )
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src, param, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    int mark = mark_tmps( c );
+
+    assert( mark == 0 );
+    
+    src = get_src_reg( c, inst->SrcReg, 0, 1 );
+
+    param = alloc_tmp( c );
+
+    brw_MOV( p, param, src );
+
+    invoke_subroutine( c, SUB_NOISE1, noise1_sub );
+    
+    /* Fill in the result: */
+    brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_MOV( p, dst, param );
+	}
+    }
+    if( inst->SaturateMode == SATURATE_ZERO_ONE )
+	brw_set_saturate( p, 0 );
+    
+    release_tmps( c, mark );
+}
+    
+static void noise2_sub( struct brw_wm_compile *c ) {
+
+    struct brw_compile *p = &c->func;
+    struct brw_reg param0, param1,
+	x0y0, x0y1, x1y0, x1y1, /* gradients at each corner */       
+	t, tmp[ 4 ], /* float temporaries */
+	itmp[ 7 ]; /* unsigned integer temporaries (aliases of floats above) */
+    int i;
+    int mark = mark_tmps( c );
+
+    x0y0 = alloc_tmp( c );
+    x0y1 = alloc_tmp( c );
+    x1y0 = alloc_tmp( c );
+    x1y1 = alloc_tmp( c );
+    t = alloc_tmp( c );
+    for( i = 0; i < 4; i++ ) {
+	tmp[ i ] = alloc_tmp( c );
+	itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
+    }
+    itmp[ 4 ] = retype( x0y0, BRW_REGISTER_TYPE_UD );
+    itmp[ 5 ] = retype( x0y1, BRW_REGISTER_TYPE_UD );
+    itmp[ 6 ] = retype( x1y0, BRW_REGISTER_TYPE_UD );
+    
+    param0 = lookup_tmp( c, mark - 3 );
+    param1 = lookup_tmp( c, mark - 2 );
+
+    brw_set_access_mode( p, BRW_ALIGN_1 );
+    
+    /* Arrange the four corner coordinates into scalars (itmp0..itmp3) to
+       be hashed.  Also compute the remainders (offsets within the unit
+       square), interleaved to reduce register dependency penalties. */
+    brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param0 );
+    brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param1 );
+    brw_FRC( p, param0, param0 );
+    brw_FRC( p, param1, param1 );
+    brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
+    brw_ADD( p, high_words( itmp[ 0 ] ), high_words( itmp[ 0 ] ),
+	     low_words( itmp[ 1 ] ) );
+    brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
+    brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
+    brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 0x10000 ) );
+    brw_ADD( p, itmp[ 2 ], itmp[ 0 ], brw_imm_ud( 0x1 ) );
+    brw_ADD( p, itmp[ 3 ], itmp[ 0 ], brw_imm_ud( 0x10001 ) );
+
+    /* We're now ready to perform the hashing.  The four hashes are
+       interleaved for performance.  The hash function used is
+       designed to rapidly achieve avalanche and require only 32x16
+       bit multiplication, and 16-bit swizzles (which we get for
+       free).  We can't use immediate operands in the multiplies,
+       because immediates are permitted only in src1 and the 16-bit
+       factor is permitted only in src0. */
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		 high_words( itmp[ i ] ) );
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 5 ], itmp[ i ] );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		 high_words( itmp[ i ] ) );
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, itmp[ i ], itmp[ 6 ], itmp[ i ] );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+		 high_words( itmp[ i ] ) );
+
+    /* Now we want to initialise the four gradients based on the
+       hashes.  Format conversion from signed integer to float leaves
+       everything scaled too high by a factor of pow( 2, 15 ), but
+       we correct for that right at the end. */
+    brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+    brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
+    brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
+    brw_MOV( p, x1y0, low_words( tmp[ 2 ] ) );
+    brw_MOV( p, x1y1, low_words( tmp[ 3 ] ) );
+    
+    brw_MOV( p, tmp[ 0 ], high_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 1 ], high_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 2 ], high_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 3 ], high_words( tmp[ 3 ] ) );
+    
+    brw_MUL( p, x1y0, x1y0, t );
+    brw_MUL( p, x1y1, x1y1, t );
+    brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+    brw_MUL( p, x0y0, x0y0, param0 );
+    brw_MUL( p, x0y1, x0y1, param0 );
+
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param1 );
+    brw_MUL( p, tmp[ 2 ], tmp[ 2 ], param1 );
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], t );
+    brw_MUL( p, tmp[ 3 ], tmp[ 3 ], t );
+
+    brw_ADD( p, x0y0, x0y0, tmp[ 0 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 2 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 1 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 3 ] );
+    
+    /* We interpolate between the gradients using the polynomial
+       6t^5 - 15t^4 + 10t^3 (Perlin). */
+    brw_MUL( p, tmp[ 0 ], param0, brw_imm_f( 6.0 ) );
+    brw_MUL( p, tmp[ 1 ], param1, brw_imm_f( 6.0 ) );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
+    brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( -15.0 ) );
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+    brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work to fill the
+						 pipeline */
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
+    brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( 10.0 ) );
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+    brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work to fill the
+						 pipeline */
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+    brw_MUL( p, param0, tmp[ 0 ], param0 );
+    brw_MUL( p, param1, tmp[ 1 ], param1 );
+    
+    /* Here we interpolate in the y dimension... */
+    brw_MUL( p, x0y1, x0y1, param1 );
+    brw_MUL( p, x1y1, x1y1, param1 );
+    brw_ADD( p, x0y0, x0y0, x0y1 );
+    brw_ADD( p, x1y0, x1y0, x1y1 );
+
+    /* And now in x.  There are horrible register dependencies here,
+       but we have nothing else to do. */
+    brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+    brw_MUL( p, x1y0, x1y0, param0 );
+    brw_ADD( p, x0y0, x0y0, x1y0 );
+    
+    /* scale by pow( 2, -15 ), as described above */
+    brw_MUL( p, param0, x0y0, brw_imm_f( 0.000030517578125 ) );
+
+    release_tmps( c, mark );
+}
+
+static void emit_noise2( struct brw_wm_compile *c,
+			 struct prog_instruction *inst )
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, param0, param1, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    int mark = mark_tmps( c );
+
+    assert( mark == 0 );
+    
+    src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
+    src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
+
+    param0 = alloc_tmp( c );
+    param1 = alloc_tmp( c );
+
+    brw_MOV( p, param0, src0 );
+    brw_MOV( p, param1, src1 );
+
+    invoke_subroutine( c, SUB_NOISE2, noise2_sub );
+    
+    /* Fill in the result: */
+    brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_MOV( p, dst, param0 );
+	}
+    }
+    if( inst->SaturateMode == SATURATE_ZERO_ONE )
+	brw_set_saturate( p, 0 );
+    
+    release_tmps( c, mark );
+}
+
+/* The three-dimensional case is much like the one- and two- versions above,
+   but since the number of corners is rapidly growing we now pack 16 16-bit
+   hashes into each register to extract more parallelism from the EUs. */
+static void noise3_sub( struct brw_wm_compile *c ) {
+
+    struct brw_compile *p = &c->func;
+    struct brw_reg param0, param1, param2,
+	x0y0, x0y1, x1y0, x1y1, /* gradients at four of the corners */
+	xi, yi, zi, /* interpolation coefficients */
+	t, tmp[ 8 ], /* float temporaries */
+	itmp[ 8 ], /* unsigned integer temporaries (aliases of floats above) */
+	wtmp[ 8 ]; /* 16-way unsigned word temporaries (aliases of above) */
+    int i;
+    int mark = mark_tmps( c );
+
+    x0y0 = alloc_tmp( c );
+    x0y1 = alloc_tmp( c );
+    x1y0 = alloc_tmp( c );
+    x1y1 = alloc_tmp( c );
+    xi = alloc_tmp( c );
+    yi = alloc_tmp( c );
+    zi = alloc_tmp( c );
+    t = alloc_tmp( c );
+    for( i = 0; i < 8; i++ ) {
+	tmp[ i ] = alloc_tmp( c );
+	itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
+	wtmp[ i ] = brw_uw16_grf( tmp[ i ].nr, 0 );
+    }
+    
+    param0 = lookup_tmp( c, mark - 4 );
+    param1 = lookup_tmp( c, mark - 3 );
+    param2 = lookup_tmp( c, mark - 2 );
+
+    brw_set_access_mode( p, BRW_ALIGN_1 );
+    
+    /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to
+       be hashed.  Also compute the remainders (offsets within the unit
+       cube), interleaved to reduce register dependency penalties. */
+    brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param0 );
+    brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param1 );
+    brw_RNDD( p, retype( itmp[ 2 ], BRW_REGISTER_TYPE_D ), param2 );
+    brw_FRC( p, param0, param0 );
+    brw_FRC( p, param1, param1 );
+    brw_FRC( p, param2, param2 );
+    /* Since we now have only 16 bits of precision in the hash, we must
+       be more careful about thorough mixing to maintain entropy as we
+       squash the input vector into a small scalar. */
+    brw_MUL( p, brw_null_reg(), low_words( itmp[ 0 ] ), brw_imm_uw( 0xBC8F ) );
+    brw_MAC( p, brw_null_reg(), low_words( itmp[ 1 ] ), brw_imm_uw( 0xD0BD ) );
+    brw_MAC( p, low_words( itmp[ 0 ] ), low_words( itmp[ 2 ] ),
+	     brw_imm_uw( 0x9B93 ) );
+    brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ),
+	     brw_imm_uw( 0xBC8F ) );
+
+    /* Temporarily disable the execution mask while we work with ExecSize=16
+       channels (the mask is set for ExecSize=8 and is probably incorrect).
+       Although this might cause execution of unwanted channels, the code
+       writes only to temporary registers and has no side effects, so
+       disabling the mask is harmless. */
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_ADD( p, wtmp[ 1 ], wtmp[ 0 ], brw_imm_uw( 0xD0BD ) );
+    brw_ADD( p, wtmp[ 2 ], wtmp[ 0 ], brw_imm_uw( 0x9B93 ) );
+    brw_ADD( p, wtmp[ 3 ], wtmp[ 1 ], brw_imm_uw( 0x9B93 ) );
+
+    /* We're now ready to perform the hashing.  The eight hashes are
+       interleaved for performance.  The hash function used is
+       designed to rapidly achieve avalanche and require only 16x16
+       bit multiplication, and 8-bit swizzles (which we get for
+       free). */
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0x28D9 ) );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+		 odd_bytes( wtmp[ i ] ) );
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0xC6D5 ) );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+		 odd_bytes( wtmp[ i ] ) );
+    brw_pop_insn_state( p );
+
+    /* Now we want to initialise the four rear gradients based on the
+       hashes.  Format conversion from signed integer to float leaves
+       everything scaled too high by a factor of pow( 2, 15 ), but
+       we correct for that right at the end. */
+    /* x component */
+    brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+    brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
+    brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
+    brw_MOV( p, x1y0, high_words( tmp[ 0 ] ) );
+    brw_MOV( p, x1y1, high_words( tmp[ 1 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
+    brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
+    brw_pop_insn_state( p );
+    
+    brw_MUL( p, x1y0, x1y0, t );
+    brw_MUL( p, x1y1, x1y1, t );
+    brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+    brw_MUL( p, x0y0, x0y0, param0 );
+    brw_MUL( p, x0y1, x0y1, param0 );
+
+    /* y component */
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+    
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
+    brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
+    
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    
+    /* z component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param2 );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], param2 );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param2 );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], param2 );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    
+    /* We interpolate between the gradients using the polynomial
+       6t^5 - 15t^4 + 10t^3 (Perlin). */
+    brw_MUL( p, xi, param0, brw_imm_f( 6.0 ) );
+    brw_MUL( p, yi, param1, brw_imm_f( 6.0 ) );
+    brw_MUL( p, zi, param2, brw_imm_f( 6.0 ) );
+    brw_ADD( p, xi, xi, brw_imm_f( -15.0 ) );
+    brw_ADD( p, yi, yi, brw_imm_f( -15.0 ) );
+    brw_ADD( p, zi, zi, brw_imm_f( -15.0 ) );
+    brw_MUL( p, xi, xi, param0 );
+    brw_MUL( p, yi, yi, param1 );
+    brw_MUL( p, zi, zi, param2 );
+    brw_ADD( p, xi, xi, brw_imm_f( 10.0 ) );
+    brw_ADD( p, yi, yi, brw_imm_f( 10.0 ) );
+    brw_ADD( p, zi, zi, brw_imm_f( 10.0 ) );
+    brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work */
+    brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work */
+    brw_MUL( p, xi, xi, param0 );
+    brw_MUL( p, yi, yi, param1 );
+    brw_MUL( p, zi, zi, param2 );
+    brw_MUL( p, xi, xi, param0 );
+    brw_MUL( p, yi, yi, param1 );
+    brw_MUL( p, zi, zi, param2 );
+    brw_MUL( p, xi, xi, param0 );
+    brw_MUL( p, yi, yi, param1 );
+    brw_MUL( p, zi, zi, param2 );
+    
+    /* Here we interpolate in the y dimension... */
+    brw_MUL( p, x0y1, x0y1, yi );
+    brw_MUL( p, x1y1, x1y1, yi );
+    brw_ADD( p, x0y0, x0y0, x0y1 );
+    brw_ADD( p, x1y0, x1y0, x1y1 );
+
+    /* And now in x.  Leave the result in tmp[ 0 ] (see below)... */
+    brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+    brw_MUL( p, x1y0, x1y0, xi );
+    brw_ADD( p, tmp[ 0 ], x0y0, x1y0 );
+
+    /* Now do the same thing for the front four gradients... */
+    /* x component */
+    brw_MOV( p, x0y0, low_words( tmp[ 2 ] ) );
+    brw_MOV( p, x0y1, low_words( tmp[ 3 ] ) );
+    brw_MOV( p, x1y0, high_words( tmp[ 2 ] ) );
+    brw_MOV( p, x1y1, high_words( tmp[ 3 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
+    brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, x1y0, x1y0, t );
+    brw_MUL( p, x1y1, x1y1, t );
+    brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+    brw_MUL( p, x0y0, x0y0, param0 );
+    brw_MUL( p, x0y1, x0y1, param0 );
+
+    /* y component */
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+    
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
+    brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    brw_ADD( p, t, param2, brw_imm_f( -1.0 ) );
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
+    
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    
+    /* z component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    
+    /* The interpolation coefficients are still around from last time, so
+       again interpolate in the y dimension... */
+    brw_ADD( p, x0y1, x0y1, negate( x0y0 ) );
+    brw_ADD( p, x1y1, x1y1, negate( x1y0 ) );
+    brw_MUL( p, x0y1, x0y1, yi );
+    brw_MUL( p, x1y1, x1y1, yi );
+    brw_ADD( p, x0y0, x0y0, x0y1 );
+    brw_ADD( p, x1y0, x1y0, x1y1 );
+
+    /* And now in x.  The rear face is in tmp[ 0 ] (see above), so this
+       time put the front face in tmp[ 1 ] and we're nearly there... */
+    brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+    brw_MUL( p, x1y0, x1y0, xi );
+    brw_ADD( p, tmp[ 1 ], x0y0, x1y0 );
+
+    /* The final interpolation, in the z dimension: */
+    brw_ADD( p, tmp[ 1 ], tmp[ 1 ], negate( tmp[ 0 ] ) );    
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], zi );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], tmp[ 1 ] );
+    
+    /* scale by pow( 2, -15 ), as described above */
+    brw_MUL( p, param0, tmp[ 0 ], brw_imm_f( 0.000030517578125 ) );
+
+    release_tmps( c, mark );
+}
+
+static void emit_noise3( struct brw_wm_compile *c,
+			 struct prog_instruction *inst )
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, src2, param0, param1, param2, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    int mark = mark_tmps( c );
+
+    assert( mark == 0 );
+    
+    src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
+    src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
+    src2 = get_src_reg( c, inst->SrcReg, 2, 1 );
+
+    param0 = alloc_tmp( c );
+    param1 = alloc_tmp( c );
+    param2 = alloc_tmp( c );
+
+    brw_MOV( p, param0, src0 );
+    brw_MOV( p, param1, src1 );
+    brw_MOV( p, param2, src2 );
+
+    invoke_subroutine( c, SUB_NOISE3, noise3_sub );
+    
+    /* Fill in the result: */
+    brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_MOV( p, dst, param0 );
+	}
+    }
+    if( inst->SaturateMode == SATURATE_ZERO_ONE )
+	brw_set_saturate( p, 0 );
+    
+    release_tmps( c, mark );
+}
+    
+/* For the four-dimensional case, the little micro-optimisation benefits
+   we obtain by unrolling all the loops aren't worth the massive bloat it
+   now causes.  Instead, we loop twice around performing a similar operation
+   to noise3, once for the w=0 cube and once for the w=1, with a bit more
+   code to glue it all together. */
+static void noise4_sub( struct brw_wm_compile *c ) {
+
+    struct brw_compile *p = &c->func;
+    struct brw_reg param[ 4 ],
+	x0y0, x0y1, x1y0, x1y1, /* gradients at four of the corners */
+	w0, /* noise for the w=0 cube */
+	floors[ 2 ], /* integer coordinates of base corner of hypercube */
+	interp[ 4 ], /* interpolation coefficients */
+	t, tmp[ 8 ], /* float temporaries */
+	itmp[ 8 ], /* unsigned integer temporaries (aliases of floats above) */
+	wtmp[ 8 ]; /* 16-way unsigned word temporaries (aliases of above) */
+    int i, j;
+    int mark = mark_tmps( c );
+    GLuint loop, origin;
+    
+    x0y0 = alloc_tmp( c );
+    x0y1 = alloc_tmp( c );
+    x1y0 = alloc_tmp( c );
+    x1y1 = alloc_tmp( c );
+    t = alloc_tmp( c );
+    w0 = alloc_tmp( c );    
+    floors[ 0 ] = retype( alloc_tmp( c ), BRW_REGISTER_TYPE_UD );
+    floors[ 1 ] = retype( alloc_tmp( c ), BRW_REGISTER_TYPE_UD );
+
+    for( i = 0; i < 4; i++ ) {
+	param[ i ] = lookup_tmp( c, mark - 5 + i );
+	interp[ i ] = alloc_tmp( c );
+    }
+    
+    for( i = 0; i < 8; i++ ) {
+	tmp[ i ] = alloc_tmp( c );
+	itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
+	wtmp[ i ] = brw_uw16_grf( tmp[ i ].nr, 0 );
+    }
+
+    brw_set_access_mode( p, BRW_ALIGN_1 );
+
+    /* We only want 16 bits of precision from the integral part of each
+       co-ordinate, but unfortunately the RNDD semantics would saturate
+       at 16 bits if we performed the operation directly to a 16-bit
+       destination.  Therefore, we round to 32-bit temporaries where
+       appropriate, and then store only the lower 16 bits. */
+    brw_RNDD( p, retype( floors[ 0 ], BRW_REGISTER_TYPE_D ), param[ 0 ] );
+    brw_RNDD( p, retype( itmp[ 0 ], BRW_REGISTER_TYPE_D ), param[ 1 ] );
+    brw_RNDD( p, retype( floors[ 1 ], BRW_REGISTER_TYPE_D ), param[ 2 ] );
+    brw_RNDD( p, retype( itmp[ 1 ], BRW_REGISTER_TYPE_D ), param[ 3 ] );
+    brw_MOV( p, high_words( floors[ 0 ] ), low_words( itmp[ 0 ] ) );
+    brw_MOV( p, high_words( floors[ 1 ] ), low_words( itmp[ 1 ] ) );
+
+    /* Modify the flag register here, because the side effect is useful
+       later (see below).  We know for certain that all flags will be
+       cleared, since the FRC instruction cannot possibly generate
+       negative results.  Even for exceptional inputs (infinities, denormals,
+       NaNs), the architecture guarantees that the L conditional is false. */
+    brw_set_conditionalmod( p, BRW_CONDITIONAL_L );
+    brw_FRC( p, param[ 0 ], param[ 0 ] );
+    brw_set_predicate_control( p, BRW_PREDICATE_NONE );
+    for( i = 1; i < 4; i++ )	
+	brw_FRC( p, param[ i ], param[ i ] );
+    
+    /* Calculate the interpolation coefficients (6t^5 - 15t^4 + 10t^3) first
+       of all. */
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, interp[ i ], param[ i ], brw_imm_f( 6.0 ) );
+    for( i = 0; i < 4; i++ )
+	brw_ADD( p, interp[ i ], interp[ i ], brw_imm_f( -15.0 ) );
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, interp[ i ], interp[ i ], param[ i ] );
+    for( i = 0; i < 4; i++ )
+	brw_ADD( p, interp[ i ], interp[ i ], brw_imm_f( 10.0 ) );
+    for( j = 0; j < 3; j++ )
+	for( i = 0; i < 4; i++ )
+	    brw_MUL( p, interp[ i ], interp[ i ], param[ i ] );
+
+    /* Mark the current address, as it will be a jump destination.  The
+       following code will be executed twice: first, with the flag
+       register clear indicating the w=0 case, and second with flags
+       set for w=1. */
+    loop = p->nr_insn;
+    
+    /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to
+       be hashed.  Since we have only 16 bits of precision in the hash, we
+       must be careful about thorough mixing to maintain entropy as we
+       squash the input vector into a small scalar. */
+    brw_MUL( p, brw_null_reg(), low_words( floors[ 0 ] ),
+	     brw_imm_uw( 0xBC8F ) );
+    brw_MAC( p, brw_null_reg(), high_words( floors[ 0 ] ),
+	     brw_imm_uw( 0xD0BD ) );
+    brw_MAC( p, brw_null_reg(), low_words( floors[ 1 ] ),
+	     brw_imm_uw( 0x9B93 ) );
+    brw_MAC( p, low_words( itmp[ 0 ] ), high_words( floors[ 1 ] ),
+	     brw_imm_uw( 0xA359 ) );
+    brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ),
+	     brw_imm_uw( 0xBC8F ) );
+
+    /* Temporarily disable the execution mask while we work with ExecSize=16
+       channels (the mask is set for ExecSize=8 and is probably incorrect).
+       Although this might cause execution of unwanted channels, the code
+       writes only to temporary registers and has no side effects, so
+       disabling the mask is harmless. */
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_ADD( p, wtmp[ 1 ], wtmp[ 0 ], brw_imm_uw( 0xD0BD ) );
+    brw_ADD( p, wtmp[ 2 ], wtmp[ 0 ], brw_imm_uw( 0x9B93 ) );
+    brw_ADD( p, wtmp[ 3 ], wtmp[ 1 ], brw_imm_uw( 0x9B93 ) );
+
+    /* We're now ready to perform the hashing.  The eight hashes are
+       interleaved for performance.  The hash function used is
+       designed to rapidly achieve avalanche and require only 16x16
+       bit multiplication, and 8-bit swizzles (which we get for
+       free). */
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0x28D9 ) );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+		 odd_bytes( wtmp[ i ] ) );
+    for( i = 0; i < 4; i++ )
+	brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0xC6D5 ) );
+    for( i = 0; i < 4; i++ )
+	brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+		 odd_bytes( wtmp[ i ] ) );
+    brw_pop_insn_state( p );
+
+    /* Now we want to initialise the four rear gradients based on the
+       hashes.  Format conversion from signed integer to float leaves
+       everything scaled too high by a factor of pow( 2, 15 ), but
+       we correct for that right at the end. */
+    /* x component */
+    brw_ADD( p, t, param[ 0 ], brw_imm_f( -1.0 ) );
+    brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
+    brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
+    brw_MOV( p, x1y0, high_words( tmp[ 0 ] ) );
+    brw_MOV( p, x1y1, high_words( tmp[ 1 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+    
+    brw_MUL( p, x1y0, x1y0, t );
+    brw_MUL( p, x1y1, x1y1, t );
+    brw_ADD( p, t, param[ 1 ], brw_imm_f( -1.0 ) );
+    brw_MUL( p, x0y0, x0y0, param[ 0 ] );
+    brw_MUL( p, x0y1, x0y1, param[ 0 ] );
+
+    /* y component */
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+    
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );    
+    /* prepare t for the w component (used below): w the first time through
+       the loop; w - 1 the second time) */
+    brw_set_predicate_control( p, BRW_PREDICATE_NORMAL );
+    brw_ADD( p, t, param[ 3 ], brw_imm_f( -1.0 ) );
+    p->current->header.predicate_inverse = 1;
+    brw_MOV( p, t, param[ 3 ] );
+    p->current->header.predicate_inverse = 0;
+    brw_set_predicate_control( p, BRW_PREDICATE_NONE );
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 1 ] );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 1 ] );
+    
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    
+    /* z component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 2 ] );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], param[ 2 ] );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 2 ] );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], param[ 2 ] );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+    /* w component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    brw_ADD( p, t, param[ 0 ], brw_imm_f( -1.0 ) );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+    /* Here we interpolate in the y dimension... */
+    brw_ADD( p, x0y1, x0y1, negate( x0y0 ) );
+    brw_ADD( p, x1y1, x1y1, negate( x1y0 ) );
+    brw_MUL( p, x0y1, x0y1, interp[ 1 ] );
+    brw_MUL( p, x1y1, x1y1, interp[ 1 ] );
+    brw_ADD( p, x0y0, x0y0, x0y1 );
+    brw_ADD( p, x1y0, x1y0, x1y1 );
+
+    /* And now in x.  Leave the result in tmp[ 0 ] (see below)... */
+    brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+    brw_MUL( p, x1y0, x1y0, interp[ 0 ] );
+    brw_ADD( p, tmp[ 0 ], x0y0, x1y0 );
+
+    /* Now do the same thing for the front four gradients... */
+    /* x component */
+    brw_MOV( p, x0y0, low_words( tmp[ 2 ] ) );
+    brw_MOV( p, x0y1, low_words( tmp[ 3 ] ) );
+    brw_MOV( p, x1y0, high_words( tmp[ 2 ] ) );
+    brw_MOV( p, x1y1, high_words( tmp[ 3 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, x1y0, x1y0, t );
+    brw_MUL( p, x1y1, x1y1, t );
+    brw_ADD( p, t, param[ 1 ], brw_imm_f( -1.0 ) );
+    brw_MUL( p, x0y0, x0y0, param[ 0 ] );
+    brw_MUL( p, x0y1, x0y1, param[ 0 ] );
+
+    /* y component */
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+    
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    brw_ADD( p, t, param[ 2 ], brw_imm_f( -1.0 ) );
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param[ 1 ] );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param[ 1 ] );
+    
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    
+    /* z component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 4 ) );
+    brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 4 ) );
+    brw_pop_insn_state( p );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    /* prepare t for the w component (used below): w the first time through
+       the loop; w - 1 the second time) */
+    brw_set_predicate_control( p, BRW_PREDICATE_NORMAL );
+    brw_ADD( p, t, param[ 3 ], brw_imm_f( -1.0 ) );
+    p->current->header.predicate_inverse = 1;
+    brw_MOV( p, t, param[ 3 ] );
+    p->current->header.predicate_inverse = 0;
+    brw_set_predicate_control( p, BRW_PREDICATE_NONE );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+    /* w component */
+    brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+    brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+    brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+
+    brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
+    brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+    brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
+    brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+    
+    brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+    brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+    brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+    brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+    /* Interpolate in the y dimension: */
+    brw_ADD( p, x0y1, x0y1, negate( x0y0 ) );
+    brw_ADD( p, x1y1, x1y1, negate( x1y0 ) );
+    brw_MUL( p, x0y1, x0y1, interp[ 1 ] );
+    brw_MUL( p, x1y1, x1y1, interp[ 1 ] );
+    brw_ADD( p, x0y0, x0y0, x0y1 );
+    brw_ADD( p, x1y0, x1y0, x1y1 );
+
+    /* And now in x.  The rear face is in tmp[ 0 ] (see above), so this
+       time put the front face in tmp[ 1 ] and we're nearly there... */
+    brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+    brw_MUL( p, x1y0, x1y0, interp[ 0 ] );
+    brw_ADD( p, tmp[ 1 ], x0y0, x1y0 );
+
+    /* Another interpolation, in the z dimension: */
+    brw_ADD( p, tmp[ 1 ], tmp[ 1 ], negate( tmp[ 0 ] ) );    
+    brw_MUL( p, tmp[ 1 ], tmp[ 1 ], interp[ 2 ] );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], tmp[ 1 ] );
+
+    /* Exit the loop if we've computed both cubes... */
+    origin = p->nr_insn;
+    brw_push_insn_state( p );
+    brw_set_predicate_control( p, BRW_PREDICATE_NORMAL );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_ADD( p, brw_ip_reg(), brw_ip_reg(), brw_imm_d( 0 ) );
+    brw_pop_insn_state( p );
+
+    /* Save the result for the w=0 case, and increment the w coordinate: */
+    brw_MOV( p, w0, tmp[ 0 ] );
+    brw_ADD( p, high_words( floors[ 1 ] ), high_words( floors[ 1 ] ),
+	     brw_imm_uw( 1 ) );
+
+    /* Loop around for the other cube.  Explicitly set the flag register
+       (unfortunately we must spend an extra instruction to do this: we
+       can't rely on a side effect of the previous MOV or ADD because
+       conditional modifiers which are normally true might be false in
+       exceptional circumstances, e.g. given a NaN input; the add to
+       brw_ip_reg() is not suitable because the IP is not an 8-vector). */
+    brw_push_insn_state( p );
+    brw_set_mask_control( p, BRW_MASK_DISABLE );
+    brw_MOV( p, brw_flag_reg(), brw_imm_uw( 0xFF ) );
+    brw_ADD( p, brw_ip_reg(), brw_ip_reg(),
+	     brw_imm_d( ( loop - p->nr_insn ) << 4 ) );
+    brw_pop_insn_state( p );
+
+    /* Patch the previous conditional branch now that we know the
+       destination address. */
+    brw_set_src1( p->store + origin,
+		  brw_imm_d( ( p->nr_insn - origin ) << 4 ) );
+
+    /* The very last interpolation. */
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], negate( w0 ) );    
+    brw_MUL( p, tmp[ 0 ], tmp[ 0 ], interp[ 3 ] );
+    brw_ADD( p, tmp[ 0 ], tmp[ 0 ], w0 );
+
+    /* scale by pow( 2, -15 ), as described above */
+    brw_MUL( p, param[ 0 ], tmp[ 0 ], brw_imm_f( 0.000030517578125 ) );
+
+    release_tmps( c, mark );
+}
+
+static void emit_noise4( struct brw_wm_compile *c,
+			 struct prog_instruction *inst )
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg src0, src1, src2, src3, param0, param1, param2, param3, dst;
+    GLuint mask = inst->DstReg.WriteMask;
+    int i;
+    int mark = mark_tmps( c );
+
+    assert( mark == 0 );
+    
+    src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
+    src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
+    src2 = get_src_reg( c, inst->SrcReg, 2, 1 );
+    src3 = get_src_reg( c, inst->SrcReg, 3, 1 );
+
+    param0 = alloc_tmp( c );
+    param1 = alloc_tmp( c );
+    param2 = alloc_tmp( c );
+    param3 = alloc_tmp( c );
+
+    brw_MOV( p, param0, src0 );
+    brw_MOV( p, param1, src1 );
+    brw_MOV( p, param2, src2 );
+    brw_MOV( p, param3, src3 );
+
+    invoke_subroutine( c, SUB_NOISE4, noise4_sub );
+    
+    /* Fill in the result: */
+    brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+    for (i = 0 ; i < 4; i++) {
+	if (mask & (1<<i)) {
+	    dst = get_dst_reg(c, inst, i, 1);
+	    brw_MOV( p, dst, param0 );
+	}
+    }
+    if( inst->SaturateMode == SATURATE_ZERO_ONE )
+	brw_set_saturate( p, 0 );
+    
+    release_tmps( c, mark );
+}
+    
+static void emit_wpos_xy(struct brw_wm_compile *c,
+                struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    GLuint mask = inst->DstReg.WriteMask;
+    struct brw_reg src0[2], dst[2];
+
+    dst[0] = get_dst_reg(c, inst, 0, 1);
+    dst[1] = get_dst_reg(c, inst, 1, 1);
+
+    src0[0] = get_src_reg(c, &inst->SrcReg[0], 0, 1);
+    src0[1] = get_src_reg(c, &inst->SrcReg[0], 1, 1);
+
+    /* Calculate the pixel offset from window bottom left into destination
+     * X and Y channels.
+     */
+    if (mask & WRITEMASK_X) {
+	/* X' = X - origin_x */
+	brw_ADD(p,
+		dst[0],
+		retype(src0[0], BRW_REGISTER_TYPE_W),
+		brw_imm_d(0 - c->key.origin_x));
+    }
+
+    if (mask & WRITEMASK_Y) {
+	/* Y' = height - (Y - origin_y) = height + origin_y - Y */
+	brw_ADD(p,
+		dst[1],
+		negate(retype(src0[1], BRW_REGISTER_TYPE_W)),
+		brw_imm_d(c->key.origin_y + c->key.drawable_height - 1));
+    }
+}
+
+/* TODO
+   BIAS on SIMD8 not workind yet...
+ */	
+static void emit_txb(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg dst[4], src[4], payload_reg;
+    GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
+
+    GLuint i;
+    payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
+    for (i = 0; i < 4; i++) 
+	dst[i] = get_dst_reg(c, inst, i, 1);
+    for (i = 0; i < 4; i++)
+	src[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
+
+    switch (inst->TexSrcTarget) {
+	case TEXTURE_1D_INDEX:
+	    brw_MOV(p, brw_message_reg(2), src[0]);
+	    brw_MOV(p, brw_message_reg(3), brw_imm_f(0));
+	    brw_MOV(p, brw_message_reg(4), brw_imm_f(0));
+	    break;
+	case TEXTURE_2D_INDEX:
+	case TEXTURE_RECT_INDEX:
+	    brw_MOV(p, brw_message_reg(2), src[0]);
+	    brw_MOV(p, brw_message_reg(3), src[1]);
+	    brw_MOV(p, brw_message_reg(4), brw_imm_f(0));
+	    break;
+	default:
+	    brw_MOV(p, brw_message_reg(2), src[0]);
+	    brw_MOV(p, brw_message_reg(3), src[1]);
+	    brw_MOV(p, brw_message_reg(4), src[2]);
+	    break;
+    }
+    brw_MOV(p, brw_message_reg(5), src[3]);
+    brw_MOV(p, brw_message_reg(6), brw_imm_f(0));
+    brw_SAMPLE(p,
+	    retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW),
+	    1,
+	    retype(payload_reg, BRW_REGISTER_TYPE_UW),
+	    unit + MAX_DRAW_BUFFERS, /* surface */
+	    unit,     /* sampler */
+	    inst->DstReg.WriteMask,
+	    BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS,
+	    4,
+	    4,
+	    0);
+}
+
+static void emit_tex(struct brw_wm_compile *c,
+		struct prog_instruction *inst)
+{
+    struct brw_compile *p = &c->func;
+    struct brw_reg dst[4], src[4], payload_reg;
+    GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
+
+    GLuint msg_len;
+    GLuint i, nr;
+    GLuint emit;
+    GLboolean shadow = (c->key.shadowtex_mask & (1<<unit)) ? 1 : 0;
+
+    payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
+
+    for (i = 0; i < 4; i++) 
+	dst[i] = get_dst_reg(c, inst, i, 1);
+    for (i = 0; i < 4; i++)
+	src[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
+
+
+    switch (inst->TexSrcTarget) {
+	case TEXTURE_1D_INDEX:
+	    emit = WRITEMASK_X;
+	    nr = 1;
+	    break;
+	case TEXTURE_2D_INDEX:
+	case TEXTURE_RECT_INDEX:
+	    emit = WRITEMASK_XY;
+	    nr = 2;
+	    break;
+	default:
+	    emit = WRITEMASK_XYZ;
+	    nr = 3;
+	    break;
+    }
+    msg_len = 1;
+
+    for (i = 0; i < nr; i++) {
+	static const GLuint swz[4] = {0,1,2,2};
+	if (emit & (1<<i))
+	    brw_MOV(p, brw_message_reg(msg_len+1), src[swz[i]]);
+	else
+	    brw_MOV(p, brw_message_reg(msg_len+1), brw_imm_f(0));
+	msg_len += 1;
+    }
+
+    if (shadow) {
+	brw_MOV(p, brw_message_reg(5), brw_imm_f(0));
+	brw_MOV(p, brw_message_reg(6), src[2]);
+    }
+
+    brw_SAMPLE(p,
+	    retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW),
+	    1,
+	    retype(payload_reg, BRW_REGISTER_TYPE_UW),
+	    unit + MAX_DRAW_BUFFERS, /* surface */
+	    unit,     /* sampler */
+	    inst->DstReg.WriteMask,
+	    BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE,
+	    4,
+	    shadow ? 6 : 4,
+	    0);
+
+    if (shadow)
+	brw_MOV(p, dst[3], brw_imm_f(1.0));
+}
+
+static void post_wm_emit( struct brw_wm_compile *c )
+{
+    GLuint nr_insns = c->fp->program.Base.NumInstructions;
+    GLuint insn, target_insn;
+    struct prog_instruction *inst1, *inst2;
+    struct brw_instruction *brw_inst1, *brw_inst2;
+    int offset;
+    for (insn = 0; insn < nr_insns; insn++) {
+	inst1 = &c->fp->program.Base.Instructions[insn];
+	brw_inst1 = inst1->Data;
+	switch (inst1->Opcode) {
+	    case OPCODE_CAL:
+		target_insn = inst1->BranchTarget;
+		inst2 = &c->fp->program.Base.Instructions[target_insn];
+		brw_inst2 = inst2->Data;
+		offset = brw_inst2 - brw_inst1;
+		brw_set_src1(brw_inst1, brw_imm_d(offset*16));
+		break;
+	    default:
+		break;
+	}
+    }
+}
+
+static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
+{
+#define MAX_IFSN 32
+#define MAX_LOOP_DEPTH 32
+    struct brw_instruction *if_inst[MAX_IFSN], *loop_inst[MAX_LOOP_DEPTH];
+    struct brw_instruction *inst0, *inst1;
+    int i, if_insn = 0, loop_insn = 0;
+    struct brw_compile *p = &c->func;
+    struct brw_indirect stack_index = brw_indirect(0, 0);
+
+    c->reg_index = 0;
+    prealloc_reg(c);
+    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+    brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
+
+    for (i = 0; i < c->nr_fp_insns; i++) {
+	struct prog_instruction *inst = &c->prog_instructions[i];
+	struct prog_instruction *orig_inst;
+
+	if ((orig_inst = inst->Data) != 0)
+	    orig_inst->Data = current_insn(p);
+
+	if (inst->CondUpdate)
+	    brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
+	else
+	    brw_set_conditionalmod(p, BRW_CONDITIONAL_NONE);
+
+	switch (inst->Opcode) {
+	    case WM_PIXELXY:
+		emit_pixel_xy(c, inst);
+		break;
+	    case WM_DELTAXY: 
+		emit_delta_xy(c, inst);
+		break;
+	    case WM_PIXELW:
+		emit_pixel_w(c, inst);
+		break;	
+	    case WM_LINTERP:
+		emit_linterp(c, inst);
+		break;
+	    case WM_PINTERP:
+		emit_pinterp(c, inst);
+		break;
+	    case WM_CINTERP:
+		emit_cinterp(c, inst);
+		break;
+	    case WM_WPOSXY:
+		emit_wpos_xy(c, inst);
+		break;
+	    case WM_FB_WRITE:
+		emit_fb_write(c, inst);
+		break;
+	    case OPCODE_ABS:
+		emit_abs(c, inst);
+		break;
+	    case OPCODE_ADD:
+		emit_add(c, inst);
+		break;
+	    case OPCODE_SUB:
+		emit_sub(c, inst);
+		break;
+	    case OPCODE_FRC:
+		emit_frc(c, inst);
+		break;
+	    case OPCODE_FLR:
+		emit_flr(c, inst);
+		break;
+	    case OPCODE_LRP:
+		emit_lrp(c, inst);
+		break;
+	    case OPCODE_TRUNC:
+		emit_trunc(c, inst);
+		break;
+	    case OPCODE_MOV:
+		emit_mov(c, inst);
+		break;
+	    case OPCODE_DP3:
+		emit_dp3(c, inst);
+		break;
+	    case OPCODE_DP4:
+		emit_dp4(c, inst);
+		break;
+	    case OPCODE_XPD:
+		emit_xpd(c, inst);
+		break;
+	    case OPCODE_DPH:
+		emit_dph(c, inst);
+		break;
+	    case OPCODE_RCP:
+		emit_rcp(c, inst);
+		break;
+	    case OPCODE_RSQ:
+		emit_rsq(c, inst);
+		break;
+	    case OPCODE_SIN:
+		emit_sin(c, inst);
+		break;
+	    case OPCODE_COS:
+		emit_cos(c, inst);
+		break;
+	    case OPCODE_EX2:
+		emit_ex2(c, inst);
+		break;
+	    case OPCODE_LG2:
+		emit_lg2(c, inst);
+		break;
+	    case OPCODE_MAX:	
+		emit_max(c, inst);
+		break;
+	    case OPCODE_MIN:	
+		emit_min(c, inst);
+		break;
+	    case OPCODE_DDX:
+		emit_ddx(c, inst);
+		break;
+	    case OPCODE_DDY:
+                emit_ddy(c, inst);
+                break;
+	    case OPCODE_SLT:
+		emit_slt(c, inst);
+		break;
+	    case OPCODE_SLE:
+		emit_sle(c, inst);
+		break;
+	    case OPCODE_SGT:
+		emit_sgt(c, inst);
+		break;
+	    case OPCODE_SGE:
+		emit_sge(c, inst);
+		break;
+	    case OPCODE_SEQ:
+		emit_seq(c, inst);
+		break;
+	    case OPCODE_SNE:
+		emit_sne(c, inst);
+		break;
+	    case OPCODE_MUL:
+		emit_mul(c, inst);
+		break;
+	    case OPCODE_POW:
+		emit_pow(c, inst);
+		break;
+	    case OPCODE_MAD:
+		emit_mad(c, inst);
+		break;
+	    case OPCODE_NOISE1:
+		emit_noise1(c, inst);
+		break;
+	    case OPCODE_NOISE2:
+		emit_noise2(c, inst);
+		break;
+	    case OPCODE_NOISE3:
+		emit_noise3(c, inst);
+		break;
+	    case OPCODE_NOISE4:
+		emit_noise4(c, inst);
+		break;
+	    case OPCODE_TEX:
+		emit_tex(c, inst);
+		break;
+	    case OPCODE_TXB:
+		emit_txb(c, inst);
+		break;
+	    case OPCODE_KIL_NV:
+		emit_kil(c);
+		break;
+	    case OPCODE_IF:
+		assert(if_insn < MAX_IFSN);
+		if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);
+		break;
+	    case OPCODE_ELSE:
+		if_inst[if_insn-1]  = brw_ELSE(p, if_inst[if_insn-1]);
+		break;
+	    case OPCODE_ENDIF:
+		assert(if_insn > 0);
+		brw_ENDIF(p, if_inst[--if_insn]);
+		break;
+	    case OPCODE_BGNSUB:
+	    case OPCODE_ENDSUB:
+		break;
+	    case OPCODE_CAL: 
+		brw_push_insn_state(p);
+		brw_set_mask_control(p, BRW_MASK_DISABLE);
+                brw_set_access_mode(p, BRW_ALIGN_1);
+                brw_ADD(p, deref_1ud(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16));
+                brw_set_access_mode(p, BRW_ALIGN_16);
+                brw_ADD(p, get_addr_reg(stack_index),
+                         get_addr_reg(stack_index), brw_imm_d(4));
+                orig_inst = inst->Data;
+                orig_inst->Data = &p->store[p->nr_insn];
+                brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+                brw_pop_insn_state(p);
+		break;
+
+	    case OPCODE_RET:
+		brw_push_insn_state(p);
+		brw_set_mask_control(p, BRW_MASK_DISABLE);
+                brw_ADD(p, get_addr_reg(stack_index),
+                        get_addr_reg(stack_index), brw_imm_d(-4));
+                brw_set_access_mode(p, BRW_ALIGN_1);
+                brw_MOV(p, brw_ip_reg(), deref_1ud(stack_index, 0));
+                brw_set_access_mode(p, BRW_ALIGN_16);
+		brw_pop_insn_state(p);
+
+		break;
+	    case OPCODE_BGNLOOP:
+		loop_inst[loop_insn++] = brw_DO(p, BRW_EXECUTE_8);
+		break;
+	    case OPCODE_BRK:
+		brw_BREAK(p);
+		brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+		break;
+	    case OPCODE_CONT:
+		brw_CONT(p);
+		brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+		break;
+	    case OPCODE_ENDLOOP: 
+		loop_insn--;
+		inst0 = inst1 = brw_WHILE(p, loop_inst[loop_insn]);
+		/* patch all the BREAK instructions from
+		   last BEGINLOOP */
+		while (inst0 > loop_inst[loop_insn]) {
+		    inst0--;
+		    if (inst0->header.opcode == BRW_OPCODE_BREAK) {
+			inst0->bits3.if_else.jump_count = inst1 - inst0 + 1;
+			inst0->bits3.if_else.pop_count = 0;
+		    } else if (inst0->header.opcode == BRW_OPCODE_CONTINUE) {
+                        inst0->bits3.if_else.jump_count = inst1 - inst0;
+                        inst0->bits3.if_else.pop_count = 0;
+                    }
+		}
+		break;
+	    default:
+		_mesa_printf("unsupported IR in fragment shader %d\n",
+			inst->Opcode);
+	}
+	if (inst->CondUpdate)
+	    brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+	else
+	    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    }
+    post_wm_emit(c);
+    for (i = 0; i < c->fp->program.Base.NumInstructions; i++)
+	c->fp->program.Base.Instructions[i].Data = NULL;
+}
+
+void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
+{
+    brw_wm_pass_fp(c);
+    brw_wm_emit_glsl(brw, c);
+    c->prog_data.total_grf = c->reg_index;
+    c->prog_data.total_scratch = 0;
+}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c
index ec2b976faa7..bd60ac9b315 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_iz.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c
@@ -30,7 +30,7 @@
   */
                 
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "brw_wm.h"
 
 
@@ -52,70 +52,6 @@ const struct {
 {
  { P, 0, 0, 0, 0 }, 
  { P, 0, 0, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 1, 1, 0, 0 }, 
- { C, 1, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { P, 0, 0, 0, 0 }, 
- { P, 0, 0, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 1, 1, 0, 0 }, 
- { C, 1, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 0, 1, 0, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 1, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 0, 1, 1, 0 }, 
- { C, 0, 0, 0, 1 }, 
- { C, 0, 0, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 1, 1, 0, 1 }, 
- { C, 1, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 0, 0, 0, 1 }, 
- { C, 0, 0, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 1, 1, 0, 1 }, 
- { C, 1, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 0, 1, 0, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 1, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { C, 0, 1, 1, 1 }, 
- { P, 0, 0, 0, 0 }, 
- { P, 0, 0, 0, 0 }, 
  { P, 0, 0, 0, 0 }, 
  { P, 0, 0, 0, 0 }, 
  { P, 0, 0, 0, 0 }, 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass0.c b/src/mesa/drivers/dri/i965/brw_wm_pass0.c
index 00f6f6b9a4f..205a7160d39 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass0.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass0.c
@@ -168,6 +168,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
       case PROGRAM_PAYLOAD:
       case PROGRAM_TEMPORARY:
       case PROGRAM_OUTPUT:
+      case PROGRAM_VARYING:
 	 break;
 
       case PROGRAM_LOCAL_PARAM:
@@ -179,6 +180,8 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
 	 break;
 
       case PROGRAM_STATE_VAR:
+      case PROGRAM_UNIFORM:
+      case PROGRAM_CONSTANT:
       case PROGRAM_NAMED_PARAM: {
 	 struct gl_program_parameter_list *plist = c->fp->program.Base.Parameters;
 	 
@@ -197,6 +200,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
 	    break;
 	    
 	 case PROGRAM_STATE_VAR:
+	 case PROGRAM_UNIFORM:
 	    /* These may change from run to run:
 	     */
 	    ref = get_param_ref(c, &plist->ParameterValues[idx][component] );
@@ -344,6 +348,8 @@ static struct brw_wm_instruction *translate_insn( struct brw_wm_compile *c,
    out->saturate = (inst->SaturateMode != SATURATE_OFF);
    out->tex_unit = inst->TexSrcUnit;
    out->tex_idx = inst->TexSrcTarget;
+   out->eot = inst->Sampler & 1;
+   out->target = inst->Sampler>>1;
 
    /* Args:
     */
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
index d668def7007..f6f3a38e9e0 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
@@ -150,12 +150,17 @@ void brw_wm_pass1( struct brw_wm_compile *c )
       case OPCODE_FLR:
       case OPCODE_FRC:
       case OPCODE_MOV:
+      case OPCODE_SWZ:
 	 read0 = writemask;
 	 break;
 
       case OPCODE_SUB:
       case OPCODE_SLT:
+      case OPCODE_SLE:
       case OPCODE_SGE:
+      case OPCODE_SGT:
+      case OPCODE_SEQ:
+      case OPCODE_SNE:
       case OPCODE_ADD:
       case OPCODE_MAX:
       case OPCODE_MIN:
@@ -253,11 +258,9 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 	 read0 = WRITEMASK_XYW;
 	 break;
 
-      case OPCODE_SWZ:
       case OPCODE_DST:
       case OPCODE_TXP:
       default:
-	 assert(0);
 	 break;
       }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
index a1edbd6168d..6fca9ad220a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
@@ -69,7 +69,8 @@ static void prealloc_reg(struct brw_wm_compile *c,
  */
 static void init_registers( struct brw_wm_compile *c )
 {
-   GLuint inputs = FRAG_BIT_WPOS | c->fp_interp_emitted;
+   struct brw_context *brw = c->func.brw;
+   GLuint inputs = (brw->vs.prog_data->outputs_written & DO_SETUP_BITS);
    GLuint nr_interp_regs = 0;
    GLuint i = 0;
    GLuint j;
@@ -85,8 +86,15 @@ static void init_registers( struct brw_wm_compile *c )
 
    for (j = 0; j < FRAG_ATTRIB_MAX; j++) 
       if (inputs & (1<<j)) {
+	 /* index for vs output and ps input are not the same 
+	    in shader varying */
+	 GLuint index;
+	 if (j > FRAG_ATTRIB_VAR0)
+	     index = j - (VERT_RESULT_VAR0 - FRAG_ATTRIB_VAR0);
+	 else
+	     index = j;
 	 nr_interp_regs++;
-	 prealloc_reg(c, &c->payload.input_interp[j], i++);
+	 prealloc_reg(c, &c->payload.input_interp[index], i++);
       }
 
    assert(nr_interp_regs >= 1);
@@ -328,7 +336,7 @@ void brw_wm_pass2( struct brw_wm_compile *c )
    c->state = PASS2_DONE;
 
    if (INTEL_DEBUG & DEBUG_WM) {
-      brw_wm_print_program(c, "pass2/done");
+       brw_wm_print_program(c, "pass2/done");
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
index 93d4cfc3a5f..f12ef47a7d7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
@@ -34,7 +34,7 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 
-#include "macros.h"
+#include "main/macros.h"
 
 
 
@@ -54,7 +54,7 @@ static GLuint translate_wrap_mode( GLenum wrap )
    case GL_REPEAT: 
       return BRW_TEXCOORDMODE_WRAP;
    case GL_CLAMP:  
-      return BRW_TEXCOORDMODE_CLAMP_BORDER; /* conform likes it this way */
+      return BRW_TEXCOORDMODE_CLAMP;
    case GL_CLAMP_TO_EDGE: 
       return BRW_TEXCOORDMODE_CLAMP; /* conform likes it this way */
    case GL_CLAMP_TO_BORDER: 
@@ -79,27 +79,43 @@ static GLint S_FIXED(GLfloat value, GLuint frac_bits)
 }
 
 
-static GLuint upload_default_color( struct brw_context *brw,
-				    const GLfloat *color )
+static dri_bo *upload_default_color( struct brw_context *brw,
+				     const GLfloat *color )
 {
    struct brw_sampler_default_color sdc;
 
    COPY_4V(sdc.color, color); 
    
-   return brw_cache_data( &brw->cache[BRW_SAMPLER_DEFAULT_COLOR], &sdc );
+   return brw_cache_data( &brw->cache, BRW_SAMPLER_DEFAULT_COLOR, &sdc,
+			  NULL, 0 );
 }
 
 
-/*
+struct wm_sampler_key {
+   int sampler_count;
+
+   struct wm_sampler_entry {
+      GLenum wrap_r, wrap_s, wrap_t;
+      float maxlod, minlod;
+      float lod_bias;
+      float max_aniso;
+      GLenum minfilter, magfilter;
+      GLenum comparemode, comparefunc;
+      dri_bo *sdc_bo;
+   } sampler[BRW_MAX_TEX_UNIT];
+};
+
+/**
+ * Sets the sampler state for a single unit based off of the sampler key
+ * entry.
  */
-static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
-				      struct gl_texture_object *texObj,
-				      GLuint sdc_gs_offset,
-				      struct brw_sampler_state *sampler)
-{   
+static void brw_update_sampler_state(struct wm_sampler_entry *key,
+				     dri_bo *sdc_bo,
+				     struct brw_sampler_state *sampler)
+{
    _mesa_memset(sampler, 0, sizeof(*sampler));
 
-   switch (texObj->MinFilter) {
+   switch (key->minfilter) {
    case GL_NEAREST:
       sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST;
       sampler->ss0.mip_filter = BRW_MIPFILTER_NONE;
@@ -130,17 +146,17 @@ static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
 
    /* Set Anisotropy: 
     */
-   if ( texObj->MaxAnisotropy > 1.0 ) {
+   if (key->max_aniso > 1.0) {
       sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC; 
       sampler->ss0.mag_filter = BRW_MAPFILTER_ANISOTROPIC;
 
-      if (texObj->MaxAnisotropy > 2.0) {
-	 sampler->ss3.max_aniso = MAX2((texObj->MaxAnisotropy - 2) / 2,
+      if (key->max_aniso > 2.0) {
+	 sampler->ss3.max_aniso = MAX2((key->max_aniso - 2) / 2,
 				       BRW_ANISORATIO_16);
       }
    }
    else {
-      switch (texObj->MagFilter) {
+      switch (key->magfilter) {
       case GL_NEAREST:
 	 sampler->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
 	 break;
@@ -152,9 +168,9 @@ static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
       }  
    }
 
-   sampler->ss1.r_wrap_mode = translate_wrap_mode(texObj->WrapR);
-   sampler->ss1.s_wrap_mode = translate_wrap_mode(texObj->WrapS);
-   sampler->ss1.t_wrap_mode = translate_wrap_mode(texObj->WrapT);
+   sampler->ss1.r_wrap_mode = translate_wrap_mode(key->wrap_r);
+   sampler->ss1.s_wrap_mode = translate_wrap_mode(key->wrap_s);
+   sampler->ss1.t_wrap_mode = translate_wrap_mode(key->wrap_t);
 
    /* Fulsim complains if I don't do this.  Hardware doesn't mind:
     */
@@ -168,17 +184,18 @@ static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
 
    /* Set shadow function: 
     */
-   if (texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB) {
+   if (key->comparemode == GL_COMPARE_R_TO_TEXTURE_ARB) {
       /* Shadowing is "enabled" by emitting a particular sampler
        * message (sample_c).  So need to recompile WM program when
        * shadow comparison is enabled on each/any texture unit.
        */
-      sampler->ss0.shadow_function = intel_translate_compare_func(texObj->CompareFunc);
+      sampler->ss0.shadow_function =
+	 intel_translate_shadow_compare_func(key->comparefunc);
    }
 
    /* Set LOD bias: 
     */
-   sampler->ss0.lod_bias = S_FIXED(texUnit->LodBias + texObj->LodBias, 6);
+   sampler->ss0.lod_bias = S_FIXED(CLAMP(key->lod_bias, -16, 15), 6);
 
    sampler->ss0.lod_preclamp = 1; /* OpenGL mode */
    sampler->ss0.default_color_mode = 0; /* OpenGL/DX10 mode */
@@ -192,13 +209,64 @@ static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
     */
    sampler->ss0.base_level = U_FIXED(0, 1);
 
-   sampler->ss1.max_lod = U_FIXED(MAX2(texObj->MaxLod, 0), 6);
-   sampler->ss1.min_lod = U_FIXED(MAX2(texObj->MinLod, 0), 6);
+   sampler->ss1.max_lod = U_FIXED(MIN2(MAX2(key->maxlod, 0), 13), 6);
+   sampler->ss1.min_lod = U_FIXED(MIN2(MAX2(key->minlod, 0), 13), 6);
    
-   sampler->ss2.default_color_pointer = sdc_gs_offset >> 5;
+   sampler->ss2.default_color_pointer = sdc_bo->offset >> 5; /* reloc */
 }
 
+/** Sets up the cache key for sampler state for all texture units */
+static void
+brw_wm_sampler_populate_key(struct brw_context *brw,
+			    struct wm_sampler_key *key)
+{
+   int unit;
 
+   memset(key, 0, sizeof(*key));
+
+   for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) {
+      if (brw->attribs.Texture->Unit[unit]._ReallyEnabled) {
+	 struct wm_sampler_entry *entry = &key->sampler[unit];
+	 struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[unit];
+	 struct gl_texture_object *texObj = texUnit->_Current;
+	 struct intel_texture_object *intelObj = intel_texture_object(texObj);
+	 struct gl_texture_image *firstImage =
+	    texObj->Image[0][intelObj->firstLevel];
+
+	 entry->wrap_r = texObj->WrapR;
+	 entry->wrap_s = texObj->WrapS;
+	 entry->wrap_t = texObj->WrapT;
+
+	 entry->maxlod = texObj->MaxLod;
+	 entry->minlod = texObj->MinLod;
+	 entry->lod_bias = texUnit->LodBias + texObj->LodBias;
+	 entry->max_aniso = texObj->MaxAnisotropy;
+	 entry->minfilter = texObj->MinFilter;
+	 entry->magfilter = texObj->MagFilter;
+	 entry->comparemode = texObj->CompareMode;
+    entry->comparefunc = texObj->CompareFunc;
+
+	 dri_bo_unreference(brw->wm.sdc_bo[unit]);
+	 if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
+	    float bordercolor[4] = {
+	       texObj->BorderColor[0],
+	       texObj->BorderColor[0],
+	       texObj->BorderColor[0],
+	       texObj->BorderColor[0]
+	    };
+	    /* GL specs that border color for depth textures is taken from the
+	     * R channel, while the hardware uses A.  Spam R into all the
+	     * channels for safety.
+	     */
+	    brw->wm.sdc_bo[unit] = upload_default_color(brw, bordercolor);
+	 } else {
+	    brw->wm.sdc_bo[unit] = upload_default_color(brw,
+							texObj->BorderColor);
+	 }
+	 key->sampler_count = unit + 1;
+      }
+   }
+}
 
 /* All samplers must be uploaded in a single contiguous array, which
  * complicates various things.  However, this is still too confusing -
@@ -206,40 +274,61 @@ static void brw_update_sampler_state( struct gl_texture_unit *texUnit,
  */
 static void upload_wm_samplers( struct brw_context *brw )
 {
-   GLuint unit;
-   GLuint sampler_count = 0;
-
-   /* _NEW_TEXTURE */
-   for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) {
-      if (brw->attribs.Texture->Unit[unit]._ReallyEnabled) {	 
-	 struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[unit];
-	 struct gl_texture_object *texObj = texUnit->_Current;
+   struct wm_sampler_key key;
+   int i;
 
-	 GLuint sdc_gs_offset = upload_default_color(brw, texObj->BorderColor);
+   brw_wm_sampler_populate_key(brw, &key);
 
-	 brw_update_sampler_state(texUnit,
-				  texObj, 
-				  sdc_gs_offset,
-				  &brw->wm.sampler[unit]);
-
-	 sampler_count = unit + 1;
-      }
-   }
-   
-   if (brw->wm.sampler_count != sampler_count) {
-      brw->wm.sampler_count = sampler_count;
+   if (brw->wm.sampler_count != key.sampler_count) {
+      brw->wm.sampler_count = key.sampler_count;
       brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
    }
 
-   brw->wm.sampler_gs_offset = 0;
+   dri_bo_unreference(brw->wm.sampler_bo);
+   brw->wm.sampler_bo = NULL;
+   if (brw->wm.sampler_count == 0)
+      return;
 
-   if (brw->wm.sampler_count) 
-      brw->wm.sampler_gs_offset = 
-	 brw_cache_data_sz(&brw->cache[BRW_SAMPLER],
-			   brw->wm.sampler,
-			   sizeof(struct brw_sampler_state) * brw->wm.sampler_count);
-}
+   brw->wm.sampler_bo = brw_search_cache(&brw->cache, BRW_SAMPLER,
+					 &key, sizeof(key),
+					 brw->wm.sdc_bo, key.sampler_count,
+					 NULL);
 
+   /* If we didnt find it in the cache, compute the state and put it in the
+    * cache.
+    */
+   if (brw->wm.sampler_bo == NULL) {
+      struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
+
+      memset(sampler, 0, sizeof(sampler));
+      for (i = 0; i < key.sampler_count; i++) {
+	 if (brw->wm.sdc_bo[i] == NULL)
+	    continue;
+
+	 brw_update_sampler_state(&key.sampler[i], brw->wm.sdc_bo[i],
+				  &sampler[i]);
+      }
+
+      brw->wm.sampler_bo = brw_upload_cache(&brw->cache, BRW_SAMPLER,
+					    &key, sizeof(key),
+					    brw->wm.sdc_bo, key.sampler_count,
+					    &sampler, sizeof(sampler),
+					    NULL, NULL);
+
+      /* Emit SDC relocations */
+      for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
+	 if (!brw->attribs.Texture->Unit[i]._ReallyEnabled)
+	    continue;
+
+	 dri_bo_emit_reloc(brw->wm.sampler_bo,
+			   I915_GEM_DOMAIN_SAMPLER, 0,
+			   0,
+			   i * sizeof(struct brw_sampler_state) +
+			   offsetof(struct brw_sampler_state, ss2),
+			   brw->wm.sdc_bo[i]);
+      }
+   }
+}
 
 const struct brw_tracked_state brw_wm_samplers = {
    .dirty = {
@@ -247,7 +336,7 @@ const struct brw_tracked_state brw_wm_samplers = {
       .brw = 0,
       .cache = 0
    },
-   .update = upload_wm_samplers
+   .prepare = upload_wm_samplers,
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index ff5cb31bdd1..5302405eda1 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -34,109 +34,140 @@
 #include "brw_context.h"
 #include "brw_state.h"
 #include "brw_defines.h"
-#include "bufmgr.h"
+#include "brw_wm.h"
 
 /***********************************************************************
  * WM unit - fragment programs and rasterization
  */
 
-static void invalidate_scratch_cb( struct intel_context *intel,
-				   void *unused )
-{
-   /* nothing */
-}
+struct brw_wm_unit_key {
+   unsigned int total_grf, total_scratch;
+   unsigned int urb_entry_read_length;
+   unsigned int curb_entry_read_length;
+   unsigned int dispatch_grf_start_reg;
+
+   unsigned int curbe_offset;
+   unsigned int urb_size;
+
+   unsigned int max_threads;
 
+   unsigned int nr_surfaces, sampler_count;
+   GLboolean uses_depth, computes_depth, uses_kill, is_glsl;
+   GLboolean polygon_stipple, stats_wm, line_stipple, offset_enable;
+   GLfloat offset_units, offset_factor;
+};
 
-static void upload_wm_unit(struct brw_context *brw )
+static void
+wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key)
 {
+   const struct gl_fragment_program *fp = brw->fragment_program;
    struct intel_context *intel = &brw->intel;
-   struct brw_wm_unit_state wm;
-   GLuint max_threads;
+
+   memset(key, 0, sizeof(*key));
 
    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
-      max_threads = 0; 
-   else
-      max_threads = 31;
+      key->max_threads = 1;
+   else {
+      /* WM maximum threads is number of EUs times number of threads per EU. */
+      if (BRW_IS_G4X(brw))
+	 key->max_threads = 10 * 5;
+      else
+	 key->max_threads = 8 * 4;
+   }
 
+   /* CACHE_NEW_WM_PROG */
+   key->total_grf = brw->wm.prog_data->total_grf;
+   key->urb_entry_read_length = brw->wm.prog_data->urb_read_length;
+   key->curb_entry_read_length = brw->wm.prog_data->curb_read_length;
+   key->dispatch_grf_start_reg = brw->wm.prog_data->first_curbe_grf;
+   key->total_scratch = ALIGN(brw->wm.prog_data->total_scratch, 1024);
 
-   memset(&wm, 0, sizeof(wm));
+   /* BRW_NEW_URB_FENCE */
+   key->urb_size = brw->urb.vsize;
 
-   /* CACHE_NEW_WM_PROG */
-   wm.thread0.grf_reg_count = ((brw->wm.prog_data->total_grf-1) & ~15) / 16;
-   wm.thread0.kernel_start_pointer = brw->wm.prog_gs_offset >> 6;
-   wm.thread3.dispatch_grf_start_reg = brw->wm.prog_data->first_curbe_grf;
-   wm.thread3.urb_entry_read_length = brw->wm.prog_data->urb_read_length;
-   wm.thread3.const_urb_entry_read_length = brw->wm.prog_data->curb_read_length;
-
-   wm.wm5.max_threads = max_threads;      
-
-   if (brw->wm.prog_data->total_scratch) {
-      GLuint per_thread = (brw->wm.prog_data->total_scratch + 1023) / 1024;
-      GLuint total = per_thread * (max_threads + 1);
-
-      /* Scratch space -- just have to make sure there is sufficient
-       * allocated for the active program and current number of threads.
-       */      
-
-      if (!brw->wm.scratch_buffer) {
-	 bmGenBuffers(intel, "wm scratch", 1, &brw->wm.scratch_buffer, 12);
-	 bmBufferSetInvalidateCB(intel,
-				 brw->wm.scratch_buffer,
-				 invalidate_scratch_cb,
-				 NULL,
-				 GL_FALSE);
-      }
+   /* BRW_NEW_CURBE_OFFSETS */
+   key->curbe_offset = brw->curbe.wm_start;
 
-      if (total > brw->wm.scratch_buffer_size) {
-	 brw->wm.scratch_buffer_size = total;
-	 bmBufferData(intel,
-		      brw->wm.scratch_buffer,
-		      brw->wm.scratch_buffer_size,
-		      NULL,
-		      0);
-      }
-		   
-      assert(per_thread <= 12 * 1024);
-      wm.thread2.per_thread_scratch_space = (per_thread / 1024) - 1;
+   /* BRW_NEW_NR_SURFACEs */
+   key->nr_surfaces = brw->wm.nr_surfaces;
 
-      /* XXX: could make this dynamic as this is so rarely active:
-       */
-      /* BRW_NEW_LOCK */
-      wm.thread2.scratch_space_base_pointer = 
-	 bmBufferOffset(intel, brw->wm.scratch_buffer) >> 10;
-   }
+   /* CACHE_NEW_SAMPLER */
+   key->sampler_count = brw->wm.sampler_count;
+
+   /* _NEW_POLYGONSTIPPLE */
+   key->polygon_stipple = brw->attribs.Polygon->StippleFlag;
 
-   /* CACHE_NEW_SURFACE */
-   wm.thread1.binding_table_entry_count = brw->wm.nr_surfaces;
+   /* BRW_NEW_FRAGMENT_PROGRAM */
+   key->uses_depth = (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
 
-   /* BRW_NEW_CURBE_OFFSETS */
-   wm.thread3.const_urb_entry_read_offset = brw->curbe.wm_start * 2;
+   /* as far as we can tell */
+   key->computes_depth =
+      (fp->Base.OutputsWritten & (1 << FRAG_RESULT_DEPR)) != 0;
 
-   wm.thread3.urb_entry_read_offset = 0;
+   /* _NEW_COLOR */
+   key->uses_kill = fp->UsesKill || brw->attribs.Color->AlphaEnabled;
+   key->is_glsl = brw_wm_is_glsl(fp);
+
+   /* XXX: This needs a flag to indicate when it changes. */
+   key->stats_wm = intel->stats_wm;
+
+   /* _NEW_LINE */
+   key->line_stipple = brw->attribs.Line->StippleFlag;
+
+   /* _NEW_POLYGON */
+   key->offset_enable = brw->attribs.Polygon->OffsetFill;
+   key->offset_units = brw->attribs.Polygon->OffsetUnits;
+   key->offset_factor = brw->attribs.Polygon->OffsetFactor;
+}
+
+static dri_bo *
+wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
+			dri_bo **reloc_bufs)
+{
+   struct brw_wm_unit_state wm;
+   dri_bo *bo;
+
+   memset(&wm, 0, sizeof(wm));
+
+   wm.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
+   wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */
    wm.thread1.depth_coef_urb_read_offset = 1;
    wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+   wm.thread1.binding_table_entry_count = key->nr_surfaces;
+
+   if (key->total_scratch != 0) {
+      wm.thread2.scratch_space_base_pointer =
+	 brw->wm.scratch_buffer->offset >> 10; /* reloc */
+      wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1;
+   } else {
+      wm.thread2.scratch_space_base_pointer = 0;
+      wm.thread2.per_thread_scratch_space = 0;
+   }
 
-   /* CACHE_NEW_SAMPLER */
-   wm.wm4.sampler_count = brw->wm.sampler_count;
-   wm.wm4.sampler_state_pointer = brw->wm.sampler_gs_offset >> 5;
+   wm.thread3.dispatch_grf_start_reg = key->dispatch_grf_start_reg;
+   wm.thread3.urb_entry_read_length = key->urb_entry_read_length;
+   wm.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
+   wm.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
+   wm.thread3.urb_entry_read_offset = 0;
 
-   /* BRW_NEW_FRAGMENT_PROGRAM */
-   {
-      const struct gl_fragment_program *fp = brw->fragment_program; 
-
-      if (fp->Base.InputsRead & (1<<FRAG_ATTRIB_WPOS)) 
-	 wm.wm5.program_uses_depth = 1; /* as far as we can tell */
-   
-      if (fp->Base.OutputsWritten & (1<<FRAG_RESULT_DEPR)) 
-	 wm.wm5.program_computes_depth = 1;
-   
-      /* _NEW_COLOR */
-      if (fp->UsesKill || 
-	  brw->attribs.Color->AlphaEnabled) 
-	 wm.wm5.program_uses_killpixel = 1; 
+   wm.wm4.sampler_count = (key->sampler_count + 1) / 4;
+   if (brw->wm.sampler_bo != NULL) {
+      /* reloc */
+      wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5;
+   } else {
+      wm.wm4.sampler_state_pointer = 0;
    }
 
-   wm.wm5.enable_16_pix = 1;
+   wm.wm5.program_uses_depth = key->uses_depth;
+   wm.wm5.program_computes_depth = key->computes_depth;
+   wm.wm5.program_uses_killpixel = key->uses_kill;
+
+   if (key->is_glsl)
+      wm.wm5.enable_8_pix = 1;
+   else
+      wm.wm5.enable_16_pix = 1;
+
+   wm.wm5.max_threads = key->max_threads - 1;
    wm.wm5.thread_dispatch_enable = 1;	/* AKA: color_write */
    wm.wm5.legacy_line_rast = 0;
    wm.wm5.legacy_global_depth_bias = 0;
@@ -144,34 +175,101 @@ static void upload_wm_unit(struct brw_context *brw )
    wm.wm5.line_aa_region_width = 0;
    wm.wm5.line_endcap_aa_region_width = 1;
 
-   /* _NEW_POLYGONSTIPPLE */
-   if (brw->attribs.Polygon->StippleFlag) 
-      wm.wm5.polygon_stipple = 1;
+   wm.wm5.polygon_stipple = key->polygon_stipple;
 
-   /* _NEW_POLYGON */
-   if (brw->attribs.Polygon->OffsetFill) {
+   if (key->offset_enable) {
       wm.wm5.depth_offset = 1;
       /* Something wierd going on with legacy_global_depth_bias,
        * offset_constant, scaling and MRD.  This value passes glean
        * but gives some odd results elsewere (eg. the
        * quad-offset-units test).
        */
-      wm.global_depth_offset_constant = brw->attribs.Polygon->OffsetUnits * 2;
+      wm.global_depth_offset_constant = key->offset_units * 2;
 
       /* This is the only value that passes glean:
        */
-      wm.global_depth_offset_scale = brw->attribs.Polygon->OffsetFactor;
+      wm.global_depth_offset_scale = key->offset_factor;
    }
 
-   /* _NEW_LINE */
-   if (brw->attribs.Line->StippleFlag) {
-      wm.wm5.line_stipple = 1;
-   }
+   wm.wm5.line_stipple = key->line_stipple;
 
-   if (INTEL_DEBUG & DEBUG_STATS || intel->stats_wm)
+   if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm)
       wm.wm4.stats_enable = 1;
 
-   brw->wm.state_gs_offset = brw_cache_data( &brw->cache[BRW_WM_UNIT], &wm );
+   bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT,
+			 key, sizeof(*key),
+			 reloc_bufs, 3,
+			 &wm, sizeof(wm),
+			 NULL, NULL);
+
+   /* Emit WM program relocation */
+   dri_bo_emit_reloc(bo,
+		     I915_GEM_DOMAIN_INSTRUCTION, 0,
+		     wm.thread0.grf_reg_count << 1,
+		     offsetof(struct brw_wm_unit_state, thread0),
+		     brw->wm.prog_bo);
+
+   /* Emit scratch space relocation */
+   if (key->total_scratch != 0) {
+      dri_bo_emit_reloc(bo,
+			0, 0,
+			wm.thread2.per_thread_scratch_space,
+			offsetof(struct brw_wm_unit_state, thread2),
+			brw->wm.scratch_buffer);
+   }
+
+   /* Emit sampler state relocation */
+   if (key->sampler_count != 0) {
+      dri_bo_emit_reloc(bo,
+			I915_GEM_DOMAIN_INSTRUCTION, 0,
+			wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
+			offsetof(struct brw_wm_unit_state, wm4),
+			brw->wm.sampler_bo);
+   }
+
+   return bo;
+}
+
+
+static void upload_wm_unit( struct brw_context *brw )
+{
+   struct intel_context *intel = &brw->intel;
+   struct brw_wm_unit_key key;
+   dri_bo *reloc_bufs[3];
+   wm_unit_populate_key(brw, &key);
+
+   /* Allocate the necessary scratch space if we haven't already.  Don't
+    * bother reducing the allocation later, since we use scratch so
+    * rarely.
+    */
+   assert(key.total_scratch <= 12 * 1024);
+   if (key.total_scratch) {
+      GLuint total = key.total_scratch * key.max_threads;
+
+      if (brw->wm.scratch_buffer && total > brw->wm.scratch_buffer->size) {
+	 dri_bo_unreference(brw->wm.scratch_buffer);
+	 brw->wm.scratch_buffer = NULL;
+      }
+      if (brw->wm.scratch_buffer == NULL) {
+	 brw->wm.scratch_buffer = dri_bo_alloc(intel->bufmgr,
+					       "wm scratch",
+					       total,
+					       4096);
+      }
+   }
+
+   reloc_bufs[0] = brw->wm.prog_bo;
+   reloc_bufs[1] = brw->wm.scratch_buffer;
+   reloc_bufs[2] = brw->wm.sampler_bo;
+
+   dri_bo_unreference(brw->wm.state_bo);
+   brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
+				       &key, sizeof(key),
+				       reloc_bufs, 3,
+				       NULL);
+   if (brw->wm.state_bo == NULL) {
+      brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs);
+   }
 }
 
 const struct brw_tracked_state brw_wm_unit = {
@@ -183,12 +281,11 @@ const struct brw_tracked_state brw_wm_unit = {
 
       .brw = (BRW_NEW_FRAGMENT_PROGRAM | 
 	      BRW_NEW_CURBE_OFFSETS |
-	      BRW_NEW_LOCK),
+	      BRW_NEW_NR_SURFACES),
 
-      .cache = (CACHE_NEW_SURFACE | 
-		CACHE_NEW_WM_PROG | 
+      .cache = (CACHE_NEW_WM_PROG |
 		CACHE_NEW_SAMPLER)
    },
-   .update = upload_wm_unit
+   .prepare = upload_wm_unit,
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index d24c618a668..63e14cc3900 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -30,9 +30,9 @@
   */
                    
 
-#include "mtypes.h"
-#include "texformat.h"
-#include "texstore.h"
+#include "main/mtypes.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
 
 #include "intel_mipmap_tree.h"
 #include "intel_batchbuffer.h"
@@ -69,7 +69,7 @@ static GLuint translate_tex_target( GLenum target )
 }
 
 
-static GLuint translate_tex_format( GLuint mesa_format )
+static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode )
 {
    switch( mesa_format ) {
    case MESA_FORMAT_L8:
@@ -114,11 +114,32 @@ static GLuint translate_tex_format( GLuint mesa_format )
       return BRW_SURFACEFORMAT_FXT1;
 
    case MESA_FORMAT_Z16:
-      return BRW_SURFACEFORMAT_L16_UNORM;
+      if (depth_mode == GL_INTENSITY) 
+	  return BRW_SURFACEFORMAT_I16_UNORM;
+      else if (depth_mode == GL_ALPHA)
+	  return BRW_SURFACEFORMAT_A16_UNORM;
+      else
+	  return BRW_SURFACEFORMAT_L16_UNORM;
 
-   case MESA_FORMAT_RGBA_DXT1:
    case MESA_FORMAT_RGB_DXT1:
-      return BRW_SURFACEFORMAT_DXT1_RGB;
+       return BRW_SURFACEFORMAT_DXT1_RGB;
+
+   case MESA_FORMAT_RGBA_DXT1:
+       return BRW_SURFACEFORMAT_BC1_UNORM;
+       
+   case MESA_FORMAT_RGBA_DXT3:
+       return BRW_SURFACEFORMAT_BC2_UNORM;
+       
+   case MESA_FORMAT_RGBA_DXT5:
+       return BRW_SURFACEFORMAT_BC3_UNORM;
+
+   case MESA_FORMAT_SRGBA8:
+      return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
+   case MESA_FORMAT_SRGB_DXT1:
+      return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
+
+   case MESA_FORMAT_S8_Z24:
+      return BRW_SURFACEFORMAT_I24X8_UNORM;
 
    default:
       assert(0);
@@ -126,142 +147,347 @@ static GLuint translate_tex_format( GLuint mesa_format )
    }
 }
 
-static
-void brw_update_texture_surface( GLcontext *ctx, 
-				 GLuint unit,
-				 struct brw_surface_state *surf )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
-   struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
+struct brw_wm_surface_key {
+   GLenum target, depthmode;
+   dri_bo *bo;
+   GLint format;
+   GLint first_level, last_level;
+   GLint width, height, depth;
+   GLint pitch, cpp;
+   uint32_t tiling;
+   GLuint offset;
+};
 
-   memset(surf, 0, sizeof(*surf));
+static void
+brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
+{
+   switch (tiling) {
+   case I915_TILING_NONE:
+      surf->ss3.tiled_surface = 0;
+      surf->ss3.tile_walk = 0;
+      break;
+   case I915_TILING_X:
+      surf->ss3.tiled_surface = 1;
+      surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
+      break;
+   case I915_TILING_Y:
+      surf->ss3.tiled_surface = 1;
+      surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
+      break;
+   }
+}
 
-   surf->ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;   
-   surf->ss0.surface_type = translate_tex_target(tObj->Target);
-   surf->ss0.surface_format = translate_tex_format(firstImage->TexFormat->MesaFormat);
+static dri_bo *
+brw_create_texture_surface( struct brw_context *brw,
+			    struct brw_wm_surface_key *key )
+{
+   struct brw_surface_state surf;
+   dri_bo *bo;
+
+   memset(&surf, 0, sizeof(surf));
+
+   surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
+   surf.ss0.surface_type = translate_tex_target(key->target);
+
+   if (key->bo) 
+      surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode);
+   else {
+     switch(key->depth) {
+     case 32: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break;
+     default:
+     case 24: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; break;
+     case 16: surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; break;
+     }
+   }
 
    /* This is ok for all textures with channel width 8bit or less:
     */
-/*    surf->ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
-
-   /* BRW_NEW_LOCK */
-   surf->ss1.base_addr = bmBufferOffset(intel,
-					intelObj->mt->region->buffer);
-
-   surf->ss2.mip_count = intelObj->lastLevel - intelObj->firstLevel;
-   surf->ss2.width = firstImage->Width - 1;
-   surf->ss2.height = firstImage->Height - 1;
-
-   surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
-   surf->ss3.tiled_surface = intelObj->mt->region->tiled; /* always zero */
-   surf->ss3.pitch = (intelObj->mt->pitch * intelObj->mt->cpp) - 1;
-   surf->ss3.depth = firstImage->Depth - 1;
-
-   surf->ss4.min_lod = 0;
+/*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
+   if (key->bo)
+     surf.ss1.base_addr = key->bo->offset; /* reloc */
+   else
+     surf.ss1.base_addr = key->offset;
+
+   surf.ss2.mip_count = key->last_level - key->first_level;
+   surf.ss2.width = key->width - 1;
+   surf.ss2.height = key->height - 1;
+   brw_set_surface_tiling(&surf, key->tiling);
+   surf.ss3.pitch = (key->pitch * key->cpp) - 1;
+   surf.ss3.depth = key->depth - 1;
+
+   surf.ss4.min_lod = 0;
  
-   if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
-      surf->ss0.cube_pos_x = 1;
-      surf->ss0.cube_pos_y = 1;
-      surf->ss0.cube_pos_z = 1;
-      surf->ss0.cube_neg_x = 1;
-      surf->ss0.cube_neg_y = 1;
-      surf->ss0.cube_neg_z = 1;
+   if (key->target == GL_TEXTURE_CUBE_MAP) {
+      surf.ss0.cube_pos_x = 1;
+      surf.ss0.cube_pos_y = 1;
+      surf.ss0.cube_pos_z = 1;
+      surf.ss0.cube_neg_x = 1;
+      surf.ss0.cube_neg_y = 1;
+      surf.ss0.cube_neg_z = 1;
    }
-}
-
 
+   bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
+			 key, sizeof(*key),
+			 &key->bo, key->bo ? 1 : 0,
+			 &surf, sizeof(surf),
+			 NULL, NULL);
+
+   if (key->bo) {
+      /* Emit relocation to surface contents */
+      dri_bo_emit_reloc(bo,
+			I915_GEM_DOMAIN_SAMPLER, 0,
+			0,
+			offsetof(struct brw_surface_state, ss1),
+			key->bo);
+   }
+   return bo;
+}
 
-#define OFFSET(TYPE, FIELD) ( (GLuint)&(((TYPE *)0)->FIELD) )
+static void
+brw_update_texture_surface( GLcontext *ctx, GLuint unit )
+{
+   struct brw_context *brw = brw_context(ctx);
+   struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
+   struct brw_wm_surface_key key;
+
+   memset(&key, 0, sizeof(key));
+
+   if (intelObj->imageOverride) {
+      key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
+      key.depth = intelObj->depthOverride;
+      key.bo = NULL;
+      key.offset = intelObj->textureOffset;
+   } else {
+      key.format = firstImage->TexFormat->MesaFormat;
+      key.pitch = intelObj->mt->pitch;
+      key.depth = firstImage->Depth;
+      key.bo = intelObj->mt->region->buffer;
+      key.offset = 0;
+   }
 
+   key.target = tObj->Target;
+   key.depthmode = tObj->DepthMode;
+   key.first_level = intelObj->firstLevel;
+   key.last_level = intelObj->lastLevel;
+   key.width = firstImage->Width;
+   key.height = firstImage->Height;
+   key.cpp = intelObj->mt->cpp;
+   key.tiling = intelObj->mt->region->tiling;
+
+   dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
+   brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
+							       &key, sizeof(key),
+							       &key.bo, key.bo ? 1 : 0,
+							       NULL);
+   if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
+      brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
+   }
+}
 
-static void upload_wm_surfaces(struct brw_context *brw )
+/**
+ * Sets up a surface state structure to point at the given region.
+ * While it is only used for the front/back buffer currently, it should be
+ * usable for further buffers when doing ARB_draw_buffer support.
+ */
+static void
+brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
+			  unsigned int unit, GLboolean cached)
 {
-   GLcontext *ctx = &brw->intel.ctx;
-   struct intel_context *intel = &brw->intel;
-   struct brw_surface_binding_table bind;
-   GLuint i;
-
-   memcpy(&bind, &brw->wm.bind, sizeof(bind));
-      
-   {
+   dri_bo *region_bo = NULL;
+   struct {
+      unsigned int surface_type;
+      unsigned int surface_format;
+      unsigned int width, height, cpp;
+      GLubyte color_mask[4];
+      GLboolean color_blend;
+      uint32_t tiling;
+   } key;
+
+   memset(&key, 0, sizeof(key));
+
+   if (region != NULL) {
+      region_bo = region->buffer;
+
+      key.surface_type = BRW_SURFACE_2D;
+      if (region->cpp == 4)
+	 key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+      else
+	 key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+      key.tiling = region->tiling;
+      key.width = region->pitch; /* XXX: not really! */
+      key.height = region->height;
+      key.cpp = region->cpp;
+   } else {
+      key.surface_type = BRW_SURFACE_NULL;
+      key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+      key.tiling = 0;
+      key.width = 1;
+      key.height = 1;
+      key.cpp = 4;
+   }
+   memcpy(key.color_mask, brw->attribs.Color->ColorMask,
+	  sizeof(key.color_mask));
+   key.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
+		      brw->attribs.Color->BlendEnabled);
+
+   dri_bo_unreference(brw->wm.surf_bo[unit]);
+   brw->wm.surf_bo[unit] = NULL;
+   if (cached) 
+       brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
+	       &key, sizeof(key),
+	       &region_bo, 1,
+	       NULL);
+
+   if (brw->wm.surf_bo[unit] == NULL) {
       struct brw_surface_state surf;
-      struct intel_region *region = brw->state.draw_region;
 
       memset(&surf, 0, sizeof(surf));
 
-      if (region->cpp == 4)
-	 surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
-      else 
-	 surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+      surf.ss0.surface_format = key.surface_format;
+      surf.ss0.surface_type = key.surface_type;
+      if (region_bo != NULL)
+	 surf.ss1.base_addr = region_bo->offset; /* reloc */
 
-      surf.ss0.surface_type = BRW_SURFACE_2D;
+      surf.ss2.width = key.width - 1;
+      surf.ss2.height = key.height - 1;
+      brw_set_surface_tiling(&surf, key.tiling);
+      surf.ss3.pitch = (key.width * key.cpp) - 1;
 
       /* _NEW_COLOR */
-      surf.ss0.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
-			      brw->attribs.Color->BlendEnabled);
+      surf.ss0.color_blend = key.color_blend;
+      surf.ss0.writedisable_red =   !key.color_mask[0];
+      surf.ss0.writedisable_green = !key.color_mask[1];
+      surf.ss0.writedisable_blue =  !key.color_mask[2];
+      surf.ss0.writedisable_alpha = !key.color_mask[3];
+
+      /* Key size will never match key size for textures, so we're safe. */
+      brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
+					      &key, sizeof(key),
+					       &region_bo, 1,
+					       &surf, sizeof(surf),
+					       NULL, NULL);
+      if (region_bo != NULL) {
+	 /* We might sample from it, and we might render to it, so flag
+	  * them both.  We might be able to figure out from other state
+	  * a more restrictive relocation to emit.
+	  */
+	 dri_bo_emit_reloc(brw->wm.surf_bo[unit],
+			   I915_GEM_DOMAIN_RENDER |
+			   I915_GEM_DOMAIN_SAMPLER,
+			   I915_GEM_DOMAIN_RENDER,
+			   0,
+			   offsetof(struct brw_surface_state, ss1),
+			   region_bo);
+      }
+   }
+}
 
 
-      surf.ss0.writedisable_red =   !brw->attribs.Color->ColorMask[0];
-      surf.ss0.writedisable_green = !brw->attribs.Color->ColorMask[1];
-      surf.ss0.writedisable_blue =  !brw->attribs.Color->ColorMask[2];
-      surf.ss0.writedisable_alpha = !brw->attribs.Color->ColorMask[3];
+/**
+ * Constructs the binding table for the WM surface state, which maps unit
+ * numbers to surface state objects.
+ */
+static dri_bo *
+brw_wm_get_binding_table(struct brw_context *brw)
+{
+   dri_bo *bind_bo;
+
+   bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
+			      NULL, 0,
+			      brw->wm.surf_bo, brw->wm.nr_surfaces,
+			      NULL);
+
+   if (bind_bo == NULL) {
+      GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
+      uint32_t *data = malloc(data_size);
+      int i;
+
+      for (i = 0; i < brw->wm.nr_surfaces; i++)
+         if (brw->wm.surf_bo[i])
+            data[i] = brw->wm.surf_bo[i]->offset;
+         else
+            data[i] = 0;
+
+      bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
+				  NULL, 0,
+				  brw->wm.surf_bo, brw->wm.nr_surfaces,
+				  data, data_size,
+				  NULL, NULL);
+
+      /* Emit binding table relocations to surface state */
+      for (i = 0; i < BRW_WM_MAX_SURF; i++) {
+	 if (brw->wm.surf_bo[i] != NULL) {
+	    dri_bo_emit_reloc(bind_bo,
+			      I915_GEM_DOMAIN_INSTRUCTION, 0,
+			      0,
+			      i * sizeof(GLuint),
+			      brw->wm.surf_bo[i]);
+	 }
+      }
 
-      /* BRW_NEW_LOCK */
-      surf.ss1.base_addr = bmBufferOffset(&brw->intel, region->buffer);
+      free(data);
+   }
 
+   return bind_bo;
+}
 
-      surf.ss2.width = region->pitch - 1; /* XXX: not really! */
-      surf.ss2.height = region->height - 1;
-      surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
-      surf.ss3.tiled_surface = region->tiled;
-      surf.ss3.pitch = (region->pitch * region->cpp) - 1;
+static void prepare_wm_surfaces(struct brw_context *brw )
+{
+   GLcontext *ctx = &brw->intel.ctx;
+   struct intel_context *intel = &brw->intel;
+   GLuint i;
+   int old_nr_surfaces;
 
-      brw->wm.bind.surf_ss_offset[0] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
-      brw->wm.nr_surfaces = 1;
+   if (brw->state.nr_draw_regions  > 1) {
+      for (i = 0; i < brw->state.nr_draw_regions; i++) {
+         brw_update_region_surface(brw, brw->state.draw_regions[i], i,
+				   GL_FALSE);
+      }
+   }else {
+      brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
    }
 
+   old_nr_surfaces = brw->wm.nr_surfaces;
+   brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 
    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
       struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
 
-      /* _NEW_TEXTURE, BRW_NEW_TEXDATA 
-       */
-      if (texUnit->_ReallyEnabled &&
-	  intel_finalize_mipmap_tree(intel,texUnit->_Current)) {
-
-	 struct brw_surface_state surf;
-
-	 brw_update_texture_surface(ctx, i, &surf);
-
-	 brw->wm.bind.surf_ss_offset[i+1] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
-	 brw->wm.nr_surfaces = i+2;
-      }
-      else if( texUnit->_ReallyEnabled &&
-	       texUnit->_Current == intel->frame_buffer_texobj )
-      {
-	 brw->wm.bind.surf_ss_offset[i+1] = brw->wm.bind.surf_ss_offset[0];
-	 brw->wm.nr_surfaces = i+2;
-      }    
-      else {
-	 brw->wm.bind.surf_ss_offset[i+1] = 0;
+      /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
+      if(texUnit->_ReallyEnabled) {
+         if (texUnit->_Current == intel->frame_buffer_texobj) {
+            dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
+            brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
+            dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
+            brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
+         } else {
+            brw_update_texture_surface(ctx, i);
+            brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
+         }
+      } else {
+         dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
+         brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
       }
+
    }
 
-   brw->wm.bind_ss_offset = brw_cache_data( &brw->cache[BRW_SS_SURF_BIND],
-					    &brw->wm.bind );
+   dri_bo_unreference(brw->wm.bind_bo);
+   brw->wm.bind_bo = brw_wm_get_binding_table(brw);
+
+   if (brw->wm.nr_surfaces != old_nr_surfaces)
+      brw->state.dirty.brw |= BRW_NEW_NR_SURFACES;
 }
 
+
 const struct brw_tracked_state brw_wm_surfaces = {
    .dirty = {
       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
-      .brw = (BRW_NEW_CONTEXT | 
-	      BRW_NEW_LOCK),	/* required for bmBufferOffset */
+      .brw = BRW_NEW_CONTEXT,
       .cache = 0
    },
-   .update = upload_wm_surfaces
+   .prepare = prepare_wm_surfaces,
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/bufmgr.h b/src/mesa/drivers/dri/i965/bufmgr.h
deleted file mode 100644
index e748c0d6d0b..00000000000
--- a/src/mesa/drivers/dri/i965/bufmgr.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef BUFMGR_H
-#define BUFMGR_H
-
-#include "intel_context.h"
-
-
-/* The buffer manager context.  Opaque.
- */
-struct bufmgr;
-struct buffer;
-
-
-struct bufmgr *bm_fake_intel_Attach( struct intel_context *intel ); 
-
-/* Flags for validate and other calls.  If both NO_UPLOAD and NO_EVICT
- * are specified, ValidateBuffers is essentially a query.
- */
-#define BM_MEM_LOCAL   0x1
-#define BM_MEM_AGP     0x2
-#define BM_MEM_VRAM    0x4	/* not yet used */
-#define BM_WRITE       0x8	/* not yet used */
-#define BM_READ        0x10	/* not yet used */
-#define BM_NO_UPLOAD   0x20
-#define BM_NO_EVICT    0x40
-#define BM_NO_MOVE     0x80	/* not yet used */
-#define BM_NO_ALLOC    0x100	/* legacy "fixed" buffers only */
-#define BM_CLIENT      0x200	/* for map - pointer will be accessed
-				 * without dri lock */
-
-#define BM_MEM_MASK (BM_MEM_LOCAL|BM_MEM_AGP|BM_MEM_VRAM)
-
-
-
-
-/* Create a pool of a given memory type, from a certain offset and a
- * certain size.  
- *
- * Also passed in is a virtual pointer to the start of the pool.  This
- * is useful in the faked-out version in i915 so that MapBuffer can
- * return a pointer to a buffer residing in AGP space.  
- *
- * Flags passed into a pool are inherited by all buffers allocated in
- * that pool.  So pools representing the static front,back,depth
- * buffer allocations should have MEM_AGP|NO_UPLOAD|NO_EVICT|NO_MOVE to match
- * the behaviour of the legacy allocations.
- *
- * Returns -1 for failure, pool number for success.
- */
-int bmInitPool( struct intel_context *, 
-		unsigned long low_offset,
-		void *low_virtual,
-		unsigned long size,
-		unsigned flags);
-
-
-/* Stick closely to ARB_vbo semantics - they're well defined and
- * understood, and drivers can just pass the calls through without too
- * much thunking.
- */
-void bmGenBuffers(struct intel_context *, const char *, unsigned n, struct buffer **buffers,
-		  int align );
-void bmDeleteBuffers(struct intel_context *, unsigned n, struct buffer **buffers);
-
-
-/* Hook to inform faked buffer manager about fixed-position
- * front,depth,back buffers.  These may move to a fully memory-managed
- * scheme, or they may continue to be managed as is.
- */
-struct buffer *bmGenBufferStatic(struct intel_context *,
-				 unsigned pool);
-
-/* On evict, buffer manager will call invalidate_cb() to note that the
- * buffer needs to be reloaded.
- *
- * Buffer is uploaded by calling bmMapBuffer() and copying data into
- * the returned pointer.
- *
- * This is basically a big hack to get some more performance by
- * turning off backing store for buffers where we either have it
- * already (textures) or don't need it (batch buffers, temporary
- * vbo's).
- */
-void bmBufferSetInvalidateCB(struct intel_context *,
-			     struct buffer *buf,
-			     void (*invalidate_cb)( struct intel_context *, void *ptr ),
-			     void *ptr,
-			     GLboolean dont_fence_subdata);
-
-
-/* The driver has more intimate knowledge of the hardare than a GL
- * client would, so flags here is more proscriptive than the usage
- * values in the ARB_vbo interface:
- */
-int bmBufferData(struct intel_context *, 
-		  struct buffer *buf, 
-		  unsigned size, 
-		  const void *data, 
-		  unsigned flags );
-
-int bmBufferSubData(struct intel_context *, 
-		     struct buffer *buf, 
-		     unsigned offset, 
-		     unsigned size, 
-		     const void *data );
-
-
-int bmBufferDataAUB(struct intel_context *, 
-		     struct buffer *buf, 
-		     unsigned size, 
-		     const void *data, 
-		     unsigned flags,
-		     unsigned aubtype,
-		     unsigned aubsubtype );
-
-int bmBufferSubDataAUB(struct intel_context *, 
-			struct buffer *buf, 
-			unsigned offset, 
-			unsigned size, 
-			const void *data,
-			unsigned aubtype,
-			unsigned aubsubtype );
-
-
-/* In this version, taking the offset will provoke an upload on
- * buffers not already resident in AGP:
- */
-unsigned bmBufferOffset(struct intel_context *, 
-			struct buffer *buf);
-
-
-/* Extract data from the buffer:
- */
-void bmBufferGetSubData(struct intel_context *, 
-			struct buffer *buf, 
-			unsigned offset, 
-			unsigned size, 
-			void *data );
-
-void *bmMapBuffer( struct intel_context *,
-		   struct buffer *buf, 
-		   unsigned access );
-
-void bmUnmapBuffer( struct intel_context *,
-		    struct buffer *buf );
-
-void bmUnmapBufferAUB( struct intel_context *,
-		       struct buffer *buf,
-		       unsigned aubtype,
-		       unsigned aubsubtype );
-
-
-/* Pertains to all buffers who's offset has been taken since the last
- * fence or release.
- */
-int bmValidateBuffers( struct intel_context * );
-void bmReleaseBuffers( struct intel_context * );
-
-GLuint bmCtxId( struct intel_context *intel );
-
-
-GLboolean bmError( struct intel_context * );
-void bmEvictAll( struct intel_context * );
-
-void *bmFindVirtual( struct intel_context *intel,
-		     unsigned int offset,
-		     size_t sz );
-
-/* This functionality is used by the buffer manager, not really sure
- * if we need to be exposing it in this way, probably libdrm will
- * offer equivalent calls.
- *
- * For now they can stay, but will likely change/move before final:
- */
-unsigned bmSetFence( struct intel_context * );
-unsigned bmSetFenceLock( struct intel_context * );
-unsigned bmLockAndFence( struct intel_context *intel );
-int bmTestFence( struct intel_context *, unsigned fence );
-void bmFinishFence( struct intel_context *, unsigned fence );
-void bmFinishFenceLock( struct intel_context *, unsigned fence );
-
-void bm_fake_NotifyContendedLockTake( struct intel_context * );
-
-extern int INTEL_DEBUG;
-#define DEBUG_BUFMGR 0x10000000
-
-#define DBG(...)  do { if (INTEL_DEBUG & DEBUG_BUFMGR) _mesa_printf(__VA_ARGS__); } while(0)
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/bufmgr_fake.c b/src/mesa/drivers/dri/i965/bufmgr_fake.c
deleted file mode 100644
index 24ee11edd8c..00000000000
--- a/src/mesa/drivers/dri/i965/bufmgr_fake.c
+++ /dev/null
@@ -1,1460 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-/* Originally a fake version of the buffer manager so that we can
- * prototype the changes in a driver fairly quickly, has been fleshed
- * out to a fully functional interim solution.
- *
- * Basically wraps the old style memory management in the new
- * programming interface, but is more expressive and avoids many of
- * the bugs in the old texture manager.
- */
-#include "bufmgr.h"
-
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-
-#include "simple_list.h"
-#include "mm.h"
-#include "imports.h"
-
-#define BM_POOL_MAX 8
-
-/* Internal flags:
- */
-#define BM_NO_BACKING_STORE   0x2000
-#define BM_NO_FENCE_SUBDATA   0x4000
-
-
-static int check_fenced( struct intel_context *intel );
-
-static int nr_attach = 0;
-
-/* Wrapper around mm.c's mem_block, which understands that you must
- * wait for fences to expire before memory can be freed.  This is
- * specific to our use of memcpy for uploads - an upload that was
- * processed through the command queue wouldn't need to care about
- * fences.
- */
-struct block {
-   struct block *next, *prev;
-   struct pool *pool;		/* BM_MEM_AGP */
-   struct mem_block *mem;	/* BM_MEM_AGP */
-
-   unsigned referenced:1;
-   unsigned on_hardware:1;
-   unsigned fenced:1;	
-   
-
-   unsigned fence;		/* BM_MEM_AGP, Split to read_fence, write_fence */
-
-   struct buffer *buf;
-   void *virtual;
-};
-
-
-struct buffer {
-   unsigned id;			/* debug only */
-   const char *name;
-   unsigned size;
-
-   unsigned mapped:1;		
-   unsigned dirty:1;		
-   unsigned aub_dirty:1;	
-   unsigned alignment:13;
-   unsigned flags:16;
-
-   struct block *block;
-   void *backing_store;
-   void (*invalidate_cb)( struct intel_context *, void * );
-   void *invalidate_ptr;
-};
-
-struct pool {
-   unsigned size;
-   unsigned low_offset;
-   struct buffer *static_buffer;
-   unsigned flags;
-   struct mem_block *heap;
-   void *virtual;
-   struct block lru;		/* only allocated, non-fence-pending blocks here */
-};
-
-struct bufmgr {
-   _glthread_Mutex mutex;	/**< for thread safety */
-   struct pool pool[BM_POOL_MAX];
-   unsigned nr_pools;
-
-   unsigned buf_nr;		/* for generating ids */
-
-   struct block referenced;	/* after bmBufferOffset */
-   struct block on_hardware;	/* after bmValidateBuffers */
-   struct block fenced;		/* after bmFenceBuffers (mi_flush, emit irq, write dword) */
-                                /* then to pool->lru or free() */
-
-   unsigned ctxId;
-   unsigned last_fence;
-   unsigned free_on_hardware;
-
-   unsigned fail:1;
-   unsigned need_fence:1;
-};
-
-#define MAXFENCE 0x7fffffff
-
-static GLboolean FENCE_LTE( unsigned a, unsigned b )
-{
-   if (a == b)
-      return GL_TRUE;
-
-   if (a < b && b - a < (1<<24))
-      return GL_TRUE;
-
-   if (a > b && MAXFENCE - a + b < (1<<24))
-      return GL_TRUE;
-
-   return GL_FALSE;
-}
-
-int bmTestFence( struct intel_context *intel, unsigned fence )
-{
-   /* Slight problem with wrap-around:
-    */
-   return fence == 0 || FENCE_LTE(fence, intel->sarea->last_dispatch);
-}
-
-#define LOCK(bm) \
-  int dolock = nr_attach > 1; \
-  if (dolock) _glthread_LOCK_MUTEX(bm->mutex)
-
-#define UNLOCK(bm) \
-  if (dolock) _glthread_UNLOCK_MUTEX(bm->mutex)
-
-
-
-static GLboolean alloc_from_pool( struct intel_context *intel,				
-				  unsigned pool_nr,
-				  struct buffer *buf )
-{
-   struct bufmgr *bm = intel->bm;
-   struct pool *pool = &bm->pool[pool_nr];
-   struct block *block = (struct block *)calloc(sizeof *block, 1);
-   GLuint sz, align = (1<<buf->alignment);
-
-   if (!block)
-      return GL_FALSE;
-
-   sz = (buf->size + align-1) & ~(align-1);
-
-   block->mem = mmAllocMem(pool->heap, 
-			   sz, 
-			   buf->alignment, 0);
-   if (!block->mem) {
-      free(block);
-      return GL_FALSE;
-   }
-
-   make_empty_list(block);
-
-   /* Insert at head or at tail???   
-    */
-   insert_at_tail(&pool->lru, block);
-
-   block->pool = pool;
-   block->virtual = pool->virtual + block->mem->ofs;
-   block->buf = buf;
-
-   buf->block = block;
-
-   return GL_TRUE;
-}
-
-
-
-
-
-
-
-
-/* Release the card storage associated with buf:
- */
-static void free_block( struct intel_context *intel, struct block *block )
-{
-   DBG("free block %p\n", block);
-
-   if (!block) 
-      return;
-
-   check_fenced(intel);
-
-   if (block->referenced) {
-      _mesa_printf("tried to free block on referenced list\n");
-      assert(0);
-   }
-   else if (block->on_hardware) {
-      block->buf = NULL;
-      intel->bm->free_on_hardware += block->mem->size;
-   }
-   else if (block->fenced) {
-      block->buf = NULL;
-   }
-   else {
-      DBG("    - free immediately\n");
-      remove_from_list(block);
-
-      mmFreeMem(block->mem);
-      free(block);
-   }
-}
-
-
-static void alloc_backing_store( struct intel_context *intel, struct buffer *buf )
-{
-   assert(!buf->backing_store);
-   assert(!(buf->flags & (BM_NO_EVICT|BM_NO_BACKING_STORE)));
-
-   buf->backing_store = ALIGN_MALLOC(buf->size, 64);
-}
-
-static void free_backing_store( struct intel_context *intel, struct buffer *buf )
-{
-   assert(!(buf->flags & (BM_NO_EVICT|BM_NO_BACKING_STORE)));
-	  
-   if (buf->backing_store) {
-      ALIGN_FREE(buf->backing_store);
-      buf->backing_store = NULL;
-   }
-}
-
-
-
-
-
-
-static void set_dirty( struct intel_context *intel,
-			      struct buffer *buf )
-{
-   if (buf->flags & BM_NO_BACKING_STORE)
-      buf->invalidate_cb(intel, buf->invalidate_ptr);
-
-   assert(!(buf->flags & BM_NO_EVICT));
-
-   DBG("set_dirty - buf %d\n", buf->id);
-   buf->dirty = 1;
-}
-
-
-static int evict_lru( struct intel_context *intel, GLuint max_fence, GLuint *pool )
-{
-   struct bufmgr *bm = intel->bm;
-   struct block *block, *tmp;
-   int i;
-
-   DBG("%s\n", __FUNCTION__);
-
-   for (i = 0; i < bm->nr_pools; i++) {
-      if (!(bm->pool[i].flags & BM_NO_EVICT)) {
-	 foreach_s(block, tmp, &bm->pool[i].lru) {
-
-	    if (block->buf &&
-		(block->buf->flags & BM_NO_FENCE_SUBDATA))
-	       continue;
-
-	    if (block->fence && max_fence &&
-		!FENCE_LTE(block->fence, max_fence))
-	       return 0;
-
-	    set_dirty(intel, block->buf);
-	    block->buf->block = NULL;
-
-	    free_block(intel, block);
-	    *pool = i;
-	    return 1;
-	 }
-      }
-   }
-
-
-   return 0;
-}
-
-
-#define foreach_s_rev(ptr, t, list)   \
-        for(ptr=(list)->prev,t=(ptr)->prev; list != ptr; ptr=t, t=(t)->prev)
-
-static int evict_mru( struct intel_context *intel, GLuint *pool )
-{
-   struct bufmgr *bm = intel->bm;
-   struct block *block, *tmp;
-   int i;
-
-   DBG("%s\n", __FUNCTION__);
-
-   for (i = 0; i < bm->nr_pools; i++) {
-      if (!(bm->pool[i].flags & BM_NO_EVICT)) {
-	 foreach_s_rev(block, tmp, &bm->pool[i].lru) {
-
-	    if (block->buf &&
-		(block->buf->flags & BM_NO_FENCE_SUBDATA))
-	       continue;
-
-	    set_dirty(intel, block->buf);
-	    block->buf->block = NULL;
-
-	    free_block(intel, block);
-	    *pool = i;
-	    return 1;
-	 }
-      }
-   }
-
-
-   return 0;
-}
-
-
-static int check_fenced( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-   struct block *block, *tmp;
-   int ret = 0;
-
-   foreach_s(block, tmp, &bm->fenced ) {
-      assert(block->fenced);
-
-      if (bmTestFence(intel, block->fence)) {
-
-	 block->fenced = 0;
-
-	 if (!block->buf) {
-	    DBG("delayed free: offset %x sz %x\n", block->mem->ofs, block->mem->size);
-	    remove_from_list(block);
-	    mmFreeMem(block->mem);
-	    free(block);
-	 }
-	 else {
-	    DBG("return to lru: offset %x sz %x\n", block->mem->ofs, block->mem->size);
-	    move_to_tail(&block->pool->lru, block);
-	 }
-
-	 ret = 1;
-      }
-      else {
-	 /* Blocks are ordered by fence, so if one fails, all from
-	  * here will fail also:
-	  */
-	 break;
-      }
-   }
-
-   /* Also check the referenced list: 
-    */
-   foreach_s(block, tmp, &bm->referenced ) {
-      if (block->fenced &&
-	  bmTestFence(intel, block->fence)) {
-	 block->fenced = 0;
-      }
-   }
-
-   
-   DBG("%s: %d\n", __FUNCTION__, ret);
-   return ret;
-}
-
-
-
-static void fence_blocks( struct intel_context *intel,
-			  unsigned fence )
-{
-   struct bufmgr *bm = intel->bm;
-   struct block *block, *tmp;
-
-   foreach_s (block, tmp, &bm->on_hardware) {
-      DBG("Fence block %p (sz 0x%x buf %p) with fence %d\n", block, 
-	  block->mem->size, block->buf, fence);
-      block->fence = fence;
-
-      block->on_hardware = 0;
-      block->fenced = 1;
-
-      /* Move to tail of pending list here
-       */
-      move_to_tail(&bm->fenced, block);
-   }
-
-   /* Also check the referenced list:
-    */  
-   foreach_s (block, tmp, &bm->referenced) {
-      if (block->on_hardware) {
-	 DBG("Fence block %p (sz 0x%x buf %p) with fence %d\n", block, 
-	     block->mem->size, block->buf, fence);
-	 
-	 block->fence = fence;
-	 block->on_hardware = 0;
-	 block->fenced = 1;
-      }
-   }
-
-
-   bm->last_fence = fence;
-   assert(is_empty_list(&bm->on_hardware));
-}
-
-
-
-
-static GLboolean alloc_block( struct intel_context *intel,
-			      struct buffer *buf )
-{
-   struct bufmgr *bm = intel->bm;
-   int i;
-
-   assert(intel->locked);
-
-   DBG("%s 0x%x bytes (%s)\n", __FUNCTION__, buf->size, buf->name);
-
-   for (i = 0; i < bm->nr_pools; i++) {
-      if (!(bm->pool[i].flags & BM_NO_ALLOC) &&
-	  alloc_from_pool(intel, i, buf)) {
-
-	 DBG("%s --> 0x%x (sz %x)\n", __FUNCTION__, 
-	     buf->block->mem->ofs, buf->block->mem->size);
-	 
-	 return GL_TRUE;
-      }
-   }
-
-   DBG("%s --> fail\n", __FUNCTION__);
-   return GL_FALSE;   
-}
-
-
-static GLboolean evict_and_alloc_block( struct intel_context *intel,
-					struct buffer *buf )
-{
-   GLuint pool;
-   struct bufmgr *bm = intel->bm;
-
-   assert(buf->block == NULL);
-
-   /* Put a cap on the amount of free memory we'll allow to accumulate
-    * before emitting a fence.
-    */
-   if (bm->free_on_hardware > 1 * 1024 * 1024) {
-      DBG("fence for free space: %x\n", bm->free_on_hardware);
-      bmSetFence(intel);
-   }
-
-   /* Search for already free memory:
-    */
-   if (alloc_block(intel, buf))
-      return GL_TRUE;
-
-   /* Look for memory that may have become free: 
-    */
-   if (check_fenced(intel) &&
-       alloc_block(intel, buf))
-      return GL_TRUE;
-
-   /* Look for memory blocks not used for >1 frame:
-    */
-   while (evict_lru(intel, intel->second_last_swap_fence, &pool))
-      if (alloc_from_pool(intel, pool, buf))
-	 return GL_TRUE;
-
-   /* If we're not thrashing, allow lru eviction to dig deeper into
-    * recently used textures.  We'll probably be thrashing soon:
-    */
-   if (!intel->thrashing) {
-      while (evict_lru(intel, 0, &pool))
-	 if (alloc_from_pool(intel, pool, buf))
-	    return GL_TRUE;
-   }
-
-   /* Keep thrashing counter alive?
-    */
-   if (intel->thrashing)
-      intel->thrashing = 20;
-
-   /* Wait on any already pending fences - here we are waiting for any
-    * freed memory that has been submitted to hardware and fenced to
-    * become available:
-    */
-   while (!is_empty_list(&bm->fenced)) {
-      GLuint fence = bm->fenced.next->fence;
-      bmFinishFence(intel, fence);
-
-      if (alloc_block(intel, buf))
-	 return GL_TRUE;
-   }
-
-
-   /* 
-    */
-   if (!is_empty_list(&bm->on_hardware)) {
-      bmSetFence(intel);
-
-      while (!is_empty_list(&bm->fenced)) {
-	 GLuint fence = bm->fenced.next->fence;
-	 bmFinishFence(intel, fence);
-      }
-
-      if (!intel->thrashing) {	 
-	 DBG("thrashing\n");
-      }
-      intel->thrashing = 20; 
-
-      if (alloc_block(intel, buf))
-	 return GL_TRUE;
-   }
-
-   while (evict_mru(intel, &pool))
-      if (alloc_from_pool(intel, pool, buf))
-	 return GL_TRUE;
-
-   DBG("%s 0x%x bytes failed\n", __FUNCTION__, buf->size);
-
-   assert(is_empty_list(&bm->on_hardware));
-   assert(is_empty_list(&bm->fenced));
-
-   return GL_FALSE;
-}
-
-
-
-
-
-
-
-
-
-
-/***********************************************************************
- * Public functions
- */
-
-
-/* The initialization functions are skewed in the fake implementation.
- * This call would be to attach to an existing manager, rather than to
- * create a local one.
- */
-struct bufmgr *bm_fake_intel_Attach( struct intel_context *intel )
-{
-   _glthread_DECLARE_STATIC_MUTEX(initMutex);   
-   static struct bufmgr bm;
-   
-   /* This function needs a mutex of its own...
-    */
-   _glthread_LOCK_MUTEX(initMutex);
-
-   if (nr_attach == 0) {
-      _glthread_INIT_MUTEX(bm.mutex);
-
-      make_empty_list(&bm.referenced);
-      make_empty_list(&bm.fenced);
-      make_empty_list(&bm.on_hardware);
-      
-      /* The context id of any of the share group.  This won't be used
-       * in communication with the kernel, so it doesn't matter if
-       * this context is eventually deleted.
-       */
-      bm.ctxId = intel->hHWContext;
-   }
-
-   nr_attach++;
-
-   _glthread_UNLOCK_MUTEX(initMutex);
-
-   return &bm;
-}
-
-
-
-/* The virtual pointer would go away in a true implementation.
- */
-int bmInitPool( struct intel_context *intel, 
-		unsigned long low_offset,
-		void *low_virtual,
-		unsigned long size,
-		unsigned flags)
-{
-   struct bufmgr *bm = intel->bm;
-   int retval = 0;
-
-   LOCK(bm);
-   {
-      GLuint i;
-
-      for (i = 0; i < bm->nr_pools; i++) {
-	 if (bm->pool[i].low_offset == low_offset &&
-	     bm->pool[i].size == size) {
-	    retval = i;
-	    goto out;
-	 }
-      }
-
-
-      if (bm->nr_pools >= BM_POOL_MAX)
-	 retval = -1;
-      else {
-	 i = bm->nr_pools++;
-   
-	 DBG("bmInitPool %d low_offset %x sz %x\n",
-	     i, low_offset, size);
-   
-	 bm->pool[i].low_offset = low_offset;
-	 bm->pool[i].size = size;
-	 bm->pool[i].heap = mmInit( low_offset, size );
-	 bm->pool[i].virtual = low_virtual - low_offset;
-	 bm->pool[i].flags = flags;
-   
-	 make_empty_list(&bm->pool[i].lru);
-	 
-	 retval = i;
-      }
-   }
- out:
-   UNLOCK(bm);
-   return retval;
-}
-
-static struct buffer *do_GenBuffer(struct intel_context *intel, const char *name, int align)
-{
-   struct bufmgr *bm = intel->bm;
-   struct buffer *buf = calloc(sizeof(*buf), 1);
-
-   buf->id = ++bm->buf_nr;
-   buf->name = name;
-   buf->alignment = align;	
-   buf->flags = BM_MEM_AGP|BM_MEM_VRAM|BM_MEM_LOCAL;
-
-   return buf;
-}
-
-
-void *bmFindVirtual( struct intel_context *intel,
-		     unsigned int offset,
-		     size_t sz )
-{
-   struct bufmgr *bm = intel->bm;
-   int i;
-
-   for (i = 0; i < bm->nr_pools; i++)
-      if (offset >= bm->pool[i].low_offset &&
-	  offset + sz <= bm->pool[i].low_offset + bm->pool[i].size)
-	 return bm->pool[i].virtual + offset;
-
-   return NULL;
-}
- 
-
-void bmGenBuffers(struct intel_context *intel, 
-		  const char *name, unsigned n, 
-		  struct buffer **buffers,
-		  int align )
-{
-   struct bufmgr *bm = intel->bm;
-   LOCK(bm);
-   {
-      int i;
-
-      for (i = 0; i < n; i++)
-	 buffers[i] = do_GenBuffer(intel, name, align);
-   }
-   UNLOCK(bm);
-}
-
-
-void bmDeleteBuffers(struct intel_context *intel, unsigned n, struct buffer **buffers)
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      unsigned i;
-   
-      for (i = 0; i < n; i++) {
-	 struct buffer *buf = buffers[i];
-
-	 if (buf && buf->block)
-	    free_block(intel, buf->block);
-
-	 if (buf) 
-	    free(buf);	 
-      }
-   }
-   UNLOCK(bm);
-}
-
-
-
-
-/* Hook to inform faked buffer manager about fixed-position
- * front,depth,back buffers.  These may move to a fully memory-managed
- * scheme, or they may continue to be managed as is.  It will probably
- * be useful to pass a fixed offset here one day.
- */
-struct buffer *bmGenBufferStatic(struct intel_context *intel,
-				 unsigned pool )
-{
-   struct bufmgr *bm = intel->bm;
-   struct buffer *buf;
-   LOCK(bm);
-   {
-      assert(bm->pool[pool].flags & BM_NO_EVICT);
-      assert(bm->pool[pool].flags & BM_NO_MOVE);
-
-      if (bm->pool[pool].static_buffer)
-	 buf = bm->pool[pool].static_buffer;
-      else {
-	 buf = do_GenBuffer(intel, "static", 12);
-   
-	 bm->pool[pool].static_buffer = buf;
-	 assert(!buf->block);
-
-	 buf->size = bm->pool[pool].size;
-	 buf->flags = bm->pool[pool].flags;
-	 buf->alignment = 12;
-	 
-	 if (!alloc_from_pool(intel, pool, buf))
-	    assert(0);
-      }
-   }
-   UNLOCK(bm);
-   return buf;
-}
-
-
-static void wait_quiescent(struct intel_context *intel,
-			   struct block *block)
-{
-   if (block->on_hardware) {
-      assert(intel->bm->need_fence);
-      bmSetFence(intel);
-      assert(!block->on_hardware);
-   }
-
-
-   if (block->fenced) {
-      bmFinishFence(intel, block->fence);
-   }
-
-   assert(!block->on_hardware);
-   assert(!block->fenced);
-}
-
-
-
-/* If buffer size changes, free and reallocate.  Otherwise update in
- * place.
- */
-int bmBufferData(struct intel_context *intel, 
-		 struct buffer *buf, 
-		 unsigned size, 
-		 const void *data, 
-		 unsigned flags )
-{
-   struct bufmgr *bm = intel->bm;
-   int retval = 0;
-
-   LOCK(bm);
-   {
-      DBG("bmBufferData %d sz 0x%x data: %p\n", buf->id, size, data);
-
-      assert(!buf->mapped);
-
-      if (buf->block) {
-	 struct block *block = buf->block;
-
-	 /* Optimistic check to see if we can reuse the block -- not
-	  * required for correctness:
-	  */
-	 if (block->fenced)
-	    check_fenced(intel);
-
-	 if (block->on_hardware ||
-	     block->fenced ||
-	     (buf->size && buf->size != size) || 
-	     (data == NULL)) {
-
-	    assert(!block->referenced);
-
-	    free_block(intel, block);
-	    buf->block = NULL;
-	    buf->dirty = 1;
-	 }
-      }
-
-      buf->size = size;
-      if (buf->block) {
-	 assert (buf->block->mem->size >= size);
-      }
-
-      if (buf->flags & (BM_NO_BACKING_STORE|BM_NO_EVICT)) {
-
-	 assert(intel->locked || data == NULL);
-
-	 if (data != NULL) {
-	    if (!buf->block && !evict_and_alloc_block(intel, buf)) {
-	       bm->fail = 1;
-	       retval = -1;
-	       goto out;
-	    }
-
-	    wait_quiescent(intel, buf->block);
-
-	    DBG("bmBufferData %d offset 0x%x sz 0x%x\n", 
-		buf->id, buf->block->mem->ofs, size);
-
-	    assert(buf->block->virtual == buf->block->pool->virtual + buf->block->mem->ofs);
-
-	    do_memcpy(buf->block->virtual, data, size);
-	 }
-	 buf->dirty = 0;
-      }
-      else {
-	       DBG("%s - set buf %d dirty\n", __FUNCTION__, buf->id);
-	 set_dirty(intel, buf);
-	 free_backing_store(intel, buf);
-   
-	 if (data != NULL) {      
-	    alloc_backing_store(intel, buf);
-	    do_memcpy(buf->backing_store, data, size);
-	 }
-      }
-   }
- out:
-   UNLOCK(bm);
-   return retval;
-}
-
-
-/* Update the buffer in place, in whatever space it is currently resident:
- */
-int bmBufferSubData(struct intel_context *intel, 
-		     struct buffer *buf, 
-		     unsigned offset, 
-		     unsigned size, 
-		     const void *data )
-{
-   struct bufmgr *bm = intel->bm;
-   int retval = 0;
-
-   if (size == 0) 
-      return 0;
-
-   LOCK(bm); 
-   {
-      DBG("bmBufferSubdata %d offset 0x%x sz 0x%x\n", buf->id, offset, size);
-      
-      assert(offset+size <= buf->size);
-
-      if (buf->flags & (BM_NO_EVICT|BM_NO_BACKING_STORE)) {
-
-	 assert(intel->locked);
-
-	 if (!buf->block && !evict_and_alloc_block(intel, buf)) {
-	    bm->fail = 1;
-	    retval = -1;
-	    goto out;
-	 }
-	 
-	 if (!(buf->flags & BM_NO_FENCE_SUBDATA))
-	    wait_quiescent(intel, buf->block);
-
-	 buf->dirty = 0;
-
-	 do_memcpy(buf->block->virtual + offset, data, size);
-      }
-      else {
-	 DBG("%s - set buf %d dirty\n", __FUNCTION__, buf->id);
-	 set_dirty(intel, buf);
-
-	 if (buf->backing_store == NULL)
-	    alloc_backing_store(intel, buf);
-
-	 do_memcpy(buf->backing_store + offset, data, size); 
-      }
-   }
- out:
-   UNLOCK(bm);
-   return retval;
-}
-
-
-
-int bmBufferDataAUB(struct intel_context *intel, 
-		     struct buffer *buf, 
-		     unsigned size, 
-		     const void *data, 
-		     unsigned flags,
-		     unsigned aubtype,
-		     unsigned aubsubtype )
-{
-   int retval = bmBufferData(intel, buf, size, data, flags);
-   
-
-   /* This only works because in this version of the buffer manager we
-    * allocate all buffers statically in agp space and so can emit the
-    * uploads to the aub file with the correct offsets as they happen.
-    */
-   if (retval == 0 && data && intel->aub_file) {
-
-      if (buf->block && !buf->dirty) {
-	 intel->vtbl.aub_gtt_data(intel,
-				      buf->block->mem->ofs,
-				      buf->block->virtual,
-				      size,
-				      aubtype,
-				      aubsubtype);
-	 buf->aub_dirty = 0;
-      }
-   }
-   
-   return retval;
-}
-		       
-
-int bmBufferSubDataAUB(struct intel_context *intel, 
-			struct buffer *buf, 
-			unsigned offset, 
-			unsigned size, 
-			const void *data,
-			unsigned aubtype,
-			unsigned aubsubtype )
-{
-   int retval = bmBufferSubData(intel, buf, offset, size, data);
-   
-
-   /* This only works because in this version of the buffer manager we
-    * allocate all buffers statically in agp space and so can emit the
-    * uploads to the aub file with the correct offsets as they happen.
-    */
-   if (intel->aub_file) {
-      if (retval == 0 && buf->block && !buf->dirty)
-	 intel->vtbl.aub_gtt_data(intel,
-				      buf->block->mem->ofs + offset,
-				      ((const char *)buf->block->virtual) + offset,
-				      size,
-				      aubtype,
-				      aubsubtype);
-   }
-
-   return retval;
-}
-
-void bmUnmapBufferAUB( struct intel_context *intel, 
-		       struct buffer *buf,
-		       unsigned aubtype,
-		       unsigned aubsubtype )
-{
-   bmUnmapBuffer(intel, buf);
-
-   if (intel->aub_file) {
-      /* Hack - exclude the framebuffer mappings.  If you removed
-       * this, you'd get very big aubfiles, but you *would* be able to
-       * see fallback rendering.
-       */
-      if (buf->block  && !buf->dirty && buf->block->pool == &intel->bm->pool[0]) {
-	 buf->aub_dirty = 1;
-      }
-   }
-}
-
-unsigned bmBufferOffset(struct intel_context *intel, 
-			struct buffer *buf)
-{
-   struct bufmgr *bm = intel->bm;
-   unsigned retval = 0;
-
-   LOCK(bm);
-   {
-      assert(intel->locked);
-
-      if (!buf->block &&
-	  !evict_and_alloc_block(intel, buf)) {
-	 bm->fail = 1;
-	 retval = ~0;
-      }
-      else {
-	 assert(buf->block);
-	 assert(buf->block->buf == buf);
-
-	 DBG("Add buf %d (block %p, dirty %d) to referenced list\n", buf->id, buf->block,
-	     buf->dirty);
-
-	 move_to_tail(&bm->referenced, buf->block);
-	 buf->block->referenced = 1;
-
-	 retval = buf->block->mem->ofs;
-      }
-   }
-   UNLOCK(bm);
-
-   return retval;
-}
-
-
-
-/* Extract data from the buffer:
- */
-void bmBufferGetSubData(struct intel_context *intel, 
-			struct buffer *buf, 
-			unsigned offset, 
-			unsigned size, 
-			void *data )
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      DBG("bmBufferSubdata %d offset 0x%x sz 0x%x\n", buf->id, offset, size);
-
-      if (buf->flags & (BM_NO_EVICT|BM_NO_BACKING_STORE)) {
-	 if (buf->block && size) {
-	    wait_quiescent(intel, buf->block);
-	    do_memcpy(data, buf->block->virtual + offset, size); 
-	 }
-      }
-      else {
-	 if (buf->backing_store && size) {
-	    do_memcpy(data, buf->backing_store + offset, size); 
-	 }
-      }
-   }
-   UNLOCK(bm);
-}
-
-
-/* Return a pointer to whatever space the buffer is currently resident in:
- */
-void *bmMapBuffer( struct intel_context *intel,
-		   struct buffer *buf, 
-		   unsigned flags )
-{
-   struct bufmgr *bm = intel->bm;
-   void *retval = NULL;
-
-   LOCK(bm);
-   {
-      DBG("bmMapBuffer %d\n", buf->id);
-
-      if (buf->mapped) {
-	 _mesa_printf("%s: already mapped\n", __FUNCTION__);
-	 retval = NULL;
-      }
-      else if (buf->flags & (BM_NO_BACKING_STORE|BM_NO_EVICT)) {
-
-	 assert(intel->locked);
-
-	 if (!buf->block && !evict_and_alloc_block(intel, buf)) {
-	    DBG("%s: alloc failed\n", __FUNCTION__);
-	    bm->fail = 1;
-	    retval = NULL;
-	 }
-	 else {
-	    assert(buf->block);
-	    buf->dirty = 0;
-
-	    if (!(buf->flags & BM_NO_FENCE_SUBDATA)) 
-	       wait_quiescent(intel, buf->block);
-
-	    buf->mapped = 1;
-	    retval = buf->block->virtual;
-	 }
-      }
-      else {
-	 DBG("%s - set buf %d dirty\n", __FUNCTION__, buf->id);
-	 set_dirty(intel, buf);
-
-	 if (buf->backing_store == 0)
-	    alloc_backing_store(intel, buf);
-
-	 buf->mapped = 1;
-	 retval = buf->backing_store;
-      }
-   }
-   UNLOCK(bm);
-   return retval;
-}
-
-void bmUnmapBuffer( struct intel_context *intel, struct buffer *buf )
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      DBG("bmUnmapBuffer %d\n", buf->id);
-      buf->mapped = 0;
-   }
-   UNLOCK(bm);
-}
-
-
-
-
-/* This is the big hack that turns on BM_NO_BACKING_STORE.  Basically
- * says that an external party will maintain the backing store, eg
- * Mesa's local copy of texture data.
- */
-void bmBufferSetInvalidateCB(struct intel_context *intel,
-			     struct buffer *buf,
-			     void (*invalidate_cb)( struct intel_context *, void *ptr ),
-			     void *ptr,
-			     GLboolean dont_fence_subdata)
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      if (buf->backing_store)
-	 free_backing_store(intel, buf);
-
-      buf->flags |= BM_NO_BACKING_STORE;
-      
-      if (dont_fence_subdata)
-	 buf->flags |= BM_NO_FENCE_SUBDATA;
-
-      DBG("bmBufferSetInvalidateCB set buf %d dirty\n", buf->id);
-      buf->dirty = 1;
-      buf->invalidate_cb = invalidate_cb;
-      buf->invalidate_ptr = ptr;
-
-      /* Note that it is invalid right from the start.  Also note
-       * invalidate_cb is called with the bufmgr locked, so cannot
-       * itself make bufmgr calls.
-       */
-      invalidate_cb( intel, ptr );
-   }
-   UNLOCK(bm);
-}
-
-
-
-
-
-
-
-/* This is only protected against thread interactions by the DRI lock
- * and the policy of ensuring that all dma is flushed prior to
- * releasing that lock.  Otherwise you might have two threads building
- * up a list of buffers to validate at once.
- */
-int bmValidateBuffers( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-   int retval = 0;
-
-   LOCK(bm);
-   {
-      DBG("%s fail %d\n", __FUNCTION__, bm->fail);
-      assert(intel->locked);
-
-      if (!bm->fail) {
-	 struct block *block, *tmp;
-
-	 foreach_s(block, tmp, &bm->referenced) {
-	    struct buffer *buf = block->buf;
-
-	    DBG("Validate buf %d / block %p / dirty %d\n", buf->id, block, buf->dirty);
-
-	    /* Upload the buffer contents if necessary:
-	     */
-	    if (buf->dirty) {
-	       DBG("Upload dirty buf %d (%s) sz %d offset 0x%x\n", buf->id, 
-		   buf->name, buf->size, block->mem->ofs);
-
-	       assert(!(buf->flags & (BM_NO_BACKING_STORE|BM_NO_EVICT)));
-
-	       wait_quiescent(intel, buf->block);
-
-	       do_memcpy(buf->block->virtual,
-			 buf->backing_store, 
-			 buf->size);
-
-	       if (intel->aub_file) {
-		  intel->vtbl.aub_gtt_data(intel,
-					       buf->block->mem->ofs,
-					       buf->backing_store,
-					       buf->size,
-					       0,
-					       0);
-	       }
-
-	       buf->dirty = 0;
-	       buf->aub_dirty = 0;
-	    }
-	    else if (buf->aub_dirty) {
-	       intel->vtbl.aub_gtt_data(intel,
-					    buf->block->mem->ofs,
-					    buf->block->virtual,
-					    buf->size,
-					    0,
-					    0);
-	       buf->aub_dirty = 0;
-	    }
-
-	    block->referenced = 0;
-	    block->on_hardware = 1;
-	    move_to_tail(&bm->on_hardware, block);
-	 }
-
-	 bm->need_fence = 1;
-      }
-
-      retval = bm->fail ? -1 : 0;
-   }
-   UNLOCK(bm);
-
-
-   if (retval != 0)
-      DBG("%s failed\n", __FUNCTION__);
-
-   return retval;
-}
-
-
-
-
-void bmReleaseBuffers( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      struct block *block, *tmp;
-
-      foreach_s (block, tmp, &bm->referenced) {
-
-	 DBG("remove block %p from referenced list\n", block);
-
-	 if (block->on_hardware) {
-	    /* Return to the on-hardware list.
-	     */
-	    move_to_tail(&bm->on_hardware, block);	    
-	 }
-	 else if (block->fenced) {
-	    struct block *s;
-
-	    /* Hmm - have to scan the fenced list to insert the
-	     * buffers in order.  This is O(nm), but rare and the
-	     * numbers are low.
-	     */
-	    foreach (s, &bm->fenced) {
-	       if (FENCE_LTE(block->fence, s->fence))
-		  break;
-	    }
-	    
-	    move_to_tail(s, block);
-	 }
-	 else {			
-	    /* Return to the lru list:
-	     */
-	    move_to_tail(&block->pool->lru, block);
-	 }
-
-	 block->referenced = 0;
-      }
-   }
-   UNLOCK(bm);
-}
-
-
-/* This functionality is used by the buffer manager, not really sure
- * if we need to be exposing it in this way, probably libdrm will
- * offer equivalent calls.
- *
- * For now they can stay, but will likely change/move before final:
- */
-unsigned bmSetFence( struct intel_context *intel )
-{
-   assert(intel->locked);
-
-   /* Emit MI_FLUSH here:
-    */
-   if (intel->bm->need_fence) {
-
-      /* Emit a flush without using a batchbuffer.  Can't rely on the
-       * batchbuffer at this level really.  Would really prefer that
-       * the IRQ ioctly emitted the flush at the same time.
-       */
-      GLuint dword[2];
-      dword[0] = intel->vtbl.flush_cmd();
-      dword[1] = 0;
-      intel_cmd_ioctl(intel, (char *)&dword, sizeof(dword));
-      
-      intel->bm->last_fence = intelEmitIrqLocked( intel );
-      
-      fence_blocks(intel, intel->bm->last_fence);
-
-      intel->vtbl.note_fence(intel, intel->bm->last_fence);
-      intel->bm->need_fence = 0;
-
-      if (intel->thrashing) {
-	 intel->thrashing--;
-	 if (!intel->thrashing)
-	    DBG("not thrashing\n");
-      }
-      
-      intel->bm->free_on_hardware = 0;
-   }
-   
-   return intel->bm->last_fence;
-}
-
-unsigned bmSetFenceLock( struct intel_context *intel )
-{
-  unsigned last;
-  LOCK(intel->bm);
-  last = bmSetFence(intel);
-  UNLOCK(intel->bm);
-  return last;
-}
-unsigned bmLockAndFence( struct intel_context *intel )
-{
-   if (intel->bm->need_fence) {
-      LOCK_HARDWARE(intel);
-      LOCK(intel->bm);
-      bmSetFence(intel);
-      UNLOCK(intel->bm);
-      UNLOCK_HARDWARE(intel);
-   }
-
-   return intel->bm->last_fence;
-}
-
-
-void bmFinishFence( struct intel_context *intel, unsigned fence )
-{
-   if (!bmTestFence(intel, fence)) {
-      DBG("...wait on fence %d\n", fence);
-      intelWaitIrq( intel, fence );
-   }
-   assert(bmTestFence(intel, fence));
-   check_fenced(intel);
-}
-
-void bmFinishFenceLock( struct intel_context *intel, unsigned fence )
-{
-   LOCK(intel->bm);
-   bmFinishFence(intel, fence);
-   UNLOCK(intel->bm);
-}
-
-
-/* Specifically ignore texture memory sharing.
- *  -- just evict everything
- *  -- and wait for idle
- */
-void bm_fake_NotifyContendedLockTake( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      struct block *block, *tmp;
-      GLuint i;
-
-      assert(is_empty_list(&bm->referenced));
-
-      bm->need_fence = 1;
-      bm->fail = 0;
-      bmFinishFence(intel, bmSetFence(intel));
-
-      assert(is_empty_list(&bm->fenced));
-      assert(is_empty_list(&bm->on_hardware));
-
-      for (i = 0; i < bm->nr_pools; i++) {
-	 if (!(bm->pool[i].flags & BM_NO_EVICT)) {
-	    foreach_s(block, tmp, &bm->pool[i].lru) {
-	       assert(bmTestFence(intel, block->fence));
-	       set_dirty(intel, block->buf);
-	    }
-	 }
-      }
-   }
-   UNLOCK(bm);
-}
-
-
-
-void bmEvictAll( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-
-   LOCK(bm);
-   {
-      struct block *block, *tmp;
-      GLuint i;
-
-      DBG("%s\n", __FUNCTION__);
-
-      assert(is_empty_list(&bm->referenced));
-
-      bm->need_fence = 1;
-      bm->fail = 0;
-      bmFinishFence(intel, bmSetFence(intel));
-
-      assert(is_empty_list(&bm->fenced));
-      assert(is_empty_list(&bm->on_hardware));
-
-      for (i = 0; i < bm->nr_pools; i++) {
-	 if (!(bm->pool[i].flags & BM_NO_EVICT)) {
-	    foreach_s(block, tmp, &bm->pool[i].lru) {
-	       assert(bmTestFence(intel, block->fence));
-	       set_dirty(intel, block->buf);
-	       block->buf->block = NULL;
-
-	       free_block(intel, block);
-	    }
-	 }
-      }
-   }
-   UNLOCK(bm);
-}
-
-
-GLboolean bmError( struct intel_context *intel )
-{
-   struct bufmgr *bm = intel->bm;
-   GLboolean retval;
-
-   LOCK(bm);
-   {
-      retval = bm->fail;
-   }
-   UNLOCK(bm);
-
-   return retval;
-}
-
-
-GLuint bmCtxId( struct intel_context *intel )
-{
-   return intel->bm->ctxId;
-}
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 64885ed9b4b..d38cdf31cc6 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -1,243 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "imports.h"
-#include "intel_batchbuffer.h"
-#include "intel_ioctl.h"
-#include "bufmgr.h"
-
-
-static void intel_batchbuffer_reset( struct intel_batchbuffer *batch )
-{
-   assert(batch->map == NULL);
-
-   batch->offset = (unsigned long)batch->ptr;
-   batch->offset = (batch->offset + 63) & ~63;
-   batch->ptr = (unsigned char *) batch->offset;
-
-   if (BATCH_SZ - batch->offset < BATCH_REFILL) {
-      bmBufferData(batch->intel, 
-		   batch->buffer,
-		   BATCH_SZ, 
-		   NULL, 
-		   0); 
-      batch->offset = 0;
-      batch->ptr = NULL;
-   }
-		
-   batch->flags = 0;
-}
-
-static void intel_batchbuffer_reset_cb( struct intel_context *intel,
-					void *ptr )
-{
-   struct intel_batchbuffer *batch = (struct intel_batchbuffer *)ptr;
-   assert(batch->map == NULL);
-   batch->flags = 0;
-   batch->offset = 0;
-   batch->ptr = NULL;
-}
-
-GLubyte *intel_batchbuffer_map( struct intel_batchbuffer *batch )
-{
-   if (!batch->map) {
-      batch->map = bmMapBuffer(batch->intel, batch->buffer, 
-			       BM_MEM_AGP|BM_MEM_LOCAL|BM_CLIENT|BM_WRITE);
-      batch->ptr += (unsigned long)batch->map;
-   }
-
-   return batch->map;
-}
-
-void intel_batchbuffer_unmap( struct intel_batchbuffer *batch )
-{
-   if (batch->map) {
-      batch->ptr -= (unsigned long)batch->map;
-      batch->map = NULL;
-      bmUnmapBuffer(batch->intel, batch->buffer);
-   }
-}
-
-
-
-/*======================================================================
- * Public functions
- */
-struct intel_batchbuffer *intel_batchbuffer_alloc( struct intel_context *intel )
-{
-   struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
-
-   batch->intel = intel;
-
-   bmGenBuffers(intel, "batch", 1, &batch->buffer, 12);
-
-   bmBufferSetInvalidateCB(intel, batch->buffer,
-			   intel_batchbuffer_reset_cb,
-			   batch,
-			   GL_TRUE);
-
-   bmBufferData(batch->intel,
-		batch->buffer,
-		BATCH_SZ,
-		NULL,
-		0);
-
-
-   return batch;
-}
-
-void intel_batchbuffer_free( struct intel_batchbuffer *batch )
-{
-   if (batch->map) 
-      bmUnmapBuffer(batch->intel, batch->buffer);
-   
-   bmDeleteBuffers(batch->intel, 1, &batch->buffer);
-   free(batch);
-}
-
-
-#define MI_BATCH_BUFFER_END 	(0xA<<23)
-
-
-GLboolean intel_batchbuffer_flush( struct intel_batchbuffer *batch )
-{
-   struct intel_context *intel = batch->intel;
-   GLuint used = batch->ptr - (batch->map + batch->offset);
-   GLuint offset;
-   GLint retval = GL_TRUE;
-
-   assert(intel->locked);
-
-   if (used == 0) {
-      bmReleaseBuffers( batch->intel );
-      return GL_TRUE;
-   }
-
-   /* Add the MI_BATCH_BUFFER_END.  Always add an MI_FLUSH - this is a
-    * performance drain that we would like to avoid.
-    */
-   if (used & 4) {
-      ((int *)batch->ptr)[0] = MI_BATCH_BUFFER_END;
-      batch->ptr += 4;
-      used += 4;
-   }
-   else {
-      ((int *)batch->ptr)[0] = 0;
-      ((int *)batch->ptr)[1] = MI_BATCH_BUFFER_END;
-
-      batch->ptr += 8;
-      used += 8;
-   }
-
-   intel_batchbuffer_unmap(batch);
-
-   /* Get the batch buffer offset: Must call bmBufferOffset() before
-    * bmValidateBuffers(), otherwise the buffer won't be on the inuse
-    * list.
-    */
-   offset = bmBufferOffset(batch->intel, batch->buffer);
-
-   if (bmValidateBuffers( batch->intel ) != 0) {
-      assert(intel->locked);
-      bmReleaseBuffers( batch->intel );
-      retval = GL_FALSE;
-      goto out;
-   }
-
-
-   if (intel->aub_file) {
-      /* Send buffered commands to aubfile as a single packet. 
-       */
-      intel_batchbuffer_map(batch);
-      ((int *)batch->ptr)[-1] = intel->vtbl.flush_cmd();
-      intel->vtbl.aub_commands(intel,
-			       offset, /* Fulsim wierdness - don't adjust */
-			       batch->map + batch->offset,
-			       used);
-      ((int *)batch->ptr)[-1] = MI_BATCH_BUFFER_END;
-      intel_batchbuffer_unmap(batch);
-   }
-
-
-   /* Fire the batch buffer, which was uploaded above:
-    */
-   intel_batch_ioctl(batch->intel, 
-		     offset + batch->offset,
-		     used);
-
-   if (intel->aub_file && 
-       intel->ctx.DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT)
-      intel->vtbl.aub_dump_bmp( intel, 0 );
-
-   /* Reset the buffer:
-    */
- out:
-   intel_batchbuffer_reset( batch );
-   intel_batchbuffer_map( batch );
-
-   if (!retval)
-      DBG("%s failed\n", __FUNCTION__);
-
-   return retval;
-}
-
-
-
-
-
-
-
-void intel_batchbuffer_align( struct intel_batchbuffer *batch,
-			      GLuint align,
-			      GLuint sz )
-{
-   unsigned long ptr = (unsigned long) batch->ptr;
-   unsigned long aptr = (ptr + align) & ~((unsigned long)align-1);
-   GLuint fixup = aptr - ptr;
-
-   if (intel_batchbuffer_space(batch) < fixup + sz)
-      intel_batchbuffer_flush(batch);
-   else {
-      memset(batch->ptr, 0, fixup);      
-      batch->ptr += fixup;
-   }
-}
-
-
-
-
-void intel_batchbuffer_data(struct intel_batchbuffer *batch,
-			    const void *data,
-			    GLuint bytes,
-			    GLuint flags)
-{
-   assert((bytes & 3) == 0);
-   intel_batchbuffer_require_space(batch, bytes, flags);
-   __memcpy(batch->ptr, data, bytes);
-   batch->ptr += bytes;
-}
-
+../intel/intel_batchbuffer.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
deleted file mode 100644
index 25e0a65e99f..00000000000
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_BATCHBUFFER_H
-#define INTEL_BATCHBUFFER_H
-
-#include "mtypes.h"
-#include "bufmgr.h"
-
-struct intel_context;
-
-#define BATCH_SZ (16 * 1024)
-#define BATCH_REFILL 4096
-#define BATCH_RESERVED 16
-
-#define INTEL_BATCH_NO_CLIPRECTS 0x1
-#define INTEL_BATCH_CLIPRECTS    0x2
-
-struct intel_batchbuffer {
-   struct intel_context *intel;
-
-   struct buffer *buffer;
-
-   GLuint flags;
-   unsigned long offset;
-
-   GLubyte *map;
-   GLubyte *ptr; 
-};
-
-struct intel_batchbuffer *intel_batchbuffer_alloc( struct intel_context *intel );
-
-void intel_batchbuffer_free( struct intel_batchbuffer *batch );
-
-
-GLboolean intel_batchbuffer_flush( struct intel_batchbuffer *batch );
-
-void intel_batchbuffer_unmap( struct intel_batchbuffer *batch );
-GLubyte *intel_batchbuffer_map( struct intel_batchbuffer *batch );
-
-
-/* Unlike bmBufferData, this currently requires the buffer be mapped.
- * Consider it a convenience function wrapping multple
- * intel_buffer_dword() calls.
- */
-void intel_batchbuffer_data(struct intel_batchbuffer *batch,
-			    const void *data,
-			    GLuint bytes,
-			    GLuint flags);
-
-void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
-				   GLuint bytes);
-
-
-/* Inline functions - might actually be better off with these
- * non-inlined.  Certainly better off switching all command packets to
- * be passed as structs rather than dwords, but that's a little bit of
- * work...
- */
-static inline GLuint 
-intel_batchbuffer_space( struct intel_batchbuffer *batch )
-{
-   return (BATCH_SZ - BATCH_RESERVED) - (batch->ptr - (batch->map + batch->offset));
-}
-
-
-static inline void 
-intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch,
-			     GLuint dword)
-{
-   assert(batch->map);
-   assert(intel_batchbuffer_space(batch) >= 4);
-   *(GLuint *)(batch->ptr) = dword;
-   batch->ptr += 4;
-}
-
-static inline void 
-intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
-				GLuint sz,
-				GLuint flags)
-{
-   assert(sz < BATCH_SZ - 8);
-   if (intel_batchbuffer_space(batch) < sz ||
-       (batch->flags != 0 && flags != 0 && batch->flags != flags))
-      intel_batchbuffer_flush(batch);
-   
-   batch->flags |= flags;
-}
-
-void intel_batchbuffer_align( struct intel_batchbuffer *batch,
-			      GLuint align,
-			      GLuint sz );
-
-
-/* Here are the crusty old macros, to be removed:
- */
-#define BATCH_LOCALS 
-#define BEGIN_BATCH(n, flags) intel_batchbuffer_require_space(intel->batch, n*4, flags)
-#define OUT_BATCH(d)  intel_batchbuffer_emit_dword(intel->batch, d)
-#define ADVANCE_BATCH() do { } while(0)
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index f88cbb2328d..dd6c8d17c28 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -1,617 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include <stdio.h>
-#include <errno.h>
-
-#include "mtypes.h"
-#include "context.h"
-#include "enums.h"
-#include "vblank.h"
-
-#include "intel_reg.h"
-#include "intel_batchbuffer.h"
-#include "intel_context.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-#include "intel_structs.h"
-
-#include "bufmgr.h"
-
-
-
-
-/*
- * Copy the back buffer to the front buffer. 
- */
-void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
-		      const drm_clip_rect_t *rect ) 
-{
-   struct intel_context *intel;
-   GLboolean   missed_target;
-   int64_t ust;
-
-   DBG("%s\n", __FUNCTION__);
-
-   assert(dPriv);
-   assert(dPriv->driContextPriv);
-   assert(dPriv->driContextPriv->driverPrivate);
-
-   intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
-   intelFlush( &intel->ctx );
-
-
-   bmFinishFenceLock(intel, intel->last_swap_fence);
-
-   /* The LOCK_HARDWARE is required for the cliprects.  Buffer offsets
-    * should work regardless.
-    */
-   LOCK_HARDWARE( intel );
-
-   if (!rect)
-   {
-       UNLOCK_HARDWARE( intel );
-       driWaitForVBlank( dPriv, &intel->vbl_seq, intel->vblank_flags, & missed_target );
-       LOCK_HARDWARE( intel );
-   }
-
-   {
-      intelScreenPrivate *intelScreen = intel->intelScreen;
-      __DRIdrawablePrivate *dPriv = intel->driDrawable;
-      int nbox = dPriv->numClipRects;
-      drm_clip_rect_t *pbox = dPriv->pClipRects;
-      int cpp = intelScreen->cpp;
-      struct intel_region *src, *dst;
-      int BR13, CMD;
-      int i;
-      int src_pitch, dst_pitch;
-
-      if (intel->sarea->pf_current_page == 0) {
-	 dst = intel->front_region;
-	 src = intel->back_region;
-      }
-      else {
-	 assert(0);
-	 src = intel->front_region;
-	 dst = intel->back_region;
-      }
-
-      src_pitch = src->pitch * src->cpp;
-      dst_pitch = dst->pitch * dst->cpp;
-
-      if (cpp == 2) {
-	 BR13 = (0xCC << 16) | (1<<24);
-	 CMD = XY_SRC_COPY_BLT_CMD;
-      } 
-      else {
-	 BR13 = (0xCC << 16) | (1<<24) | (1<<25);
-	 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-		XY_SRC_COPY_BLT_WRITE_RGB);
-      }
-
-      if (src->tiled) {
-	 CMD |= XY_SRC_TILED;
-	 src_pitch /= 4;
-      }
-      
-      if (dst->tiled) {
-	 CMD |= XY_DST_TILED;
- 	 dst_pitch /= 4;
-      }
-  
-      for (i = 0 ; i < nbox; i++, pbox++) 
-      {
-	 drm_clip_rect_t tmp = *pbox;
-
-	 if (rect) {
-	    if (!intel_intersect_cliprects(&tmp, &tmp, rect))
-	       continue;
-	 }
-
-
-	 if (tmp.x1 > tmp.x2 ||
-	     tmp.y1 > tmp.y2 ||
-	     tmp.x2 > intelScreen->width ||
-	     tmp.y2 > intelScreen->height)
-	    continue;
- 
-	 BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
-	 OUT_BATCH( CMD );
-	 OUT_BATCH( dst_pitch | BR13 );
-	 OUT_BATCH( (tmp.y1 << 16) | tmp.x1 );
-	 OUT_BATCH( (tmp.y2 << 16) | tmp.x2 );
-	 OUT_BATCH( bmBufferOffset(intel, dst->buffer) );
-	 OUT_BATCH( (tmp.y1 << 16) | tmp.x1 );
-	 OUT_BATCH( src_pitch );
-	 OUT_BATCH( bmBufferOffset(intel, src->buffer) ); 
-	 ADVANCE_BATCH();
-      }
-   }
-
-   intel_batchbuffer_flush( intel->batch );
-   intel->second_last_swap_fence = intel->last_swap_fence;
-   intel->last_swap_fence = bmSetFenceLock( intel );
-   UNLOCK_HARDWARE( intel );
-
-   if (!rect)
-   {
-       intel->swap_count++;
-       (*dri_interface->getUST)(&ust);
-       if (missed_target) {
-	   intel->swap_missed_count++;
-	   intel->swap_missed_ust = ust -  intel->swap_ust;
-       }
-   
-       intel->swap_ust = ust;
-   }
-
-}
-
-
-
-
-void intelEmitFillBlit( struct intel_context *intel,
-			GLuint cpp,
-			GLshort dst_pitch,
-			struct buffer *dst_buffer,
-			GLuint dst_offset,
-			GLboolean dst_tiled,
-			GLshort x, GLshort y, 
-			GLshort w, GLshort h,
-			GLuint color )
-{
-   GLuint BR13, CMD;
-   BATCH_LOCALS;
-
-   dst_pitch *= cpp;
-
-   switch(cpp) {
-   case 1: 
-   case 2: 
-   case 3: 
-      BR13 = (0xF0 << 16) | (1<<24);
-      CMD = XY_COLOR_BLT_CMD;
-      break;
-   case 4:
-      BR13 = (0xF0 << 16) | (1<<24) | (1<<25);
-      CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
-	     XY_COLOR_BLT_WRITE_RGB);
-      break;
-   default:
-      return;
-   }
-
-   if (dst_tiled) {
-      CMD |= XY_DST_TILED;
-      dst_pitch /= 4;
-   }
-
-   BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
-   OUT_BATCH( CMD );
-   OUT_BATCH( dst_pitch | BR13 );
-   OUT_BATCH( (y << 16) | x );
-   OUT_BATCH( ((y+h) << 16) | (x+w) );
-   OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset );
-   OUT_BATCH( color );
-   ADVANCE_BATCH();
-}
-
-static GLuint translate_raster_op(GLenum logicop)
-{
-   switch(logicop) {
-   case GL_CLEAR: return 0x00;
-   case GL_AND: return 0x88;
-   case GL_AND_REVERSE: return 0x44;
-   case GL_COPY: return 0xCC;
-   case GL_AND_INVERTED: return 0x22;
-   case GL_NOOP: return 0xAA;
-   case GL_XOR: return 0x66;
-   case GL_OR: return 0xEE;
-   case GL_NOR: return 0x11;
-   case GL_EQUIV: return 0x99;
-   case GL_INVERT: return 0x55;
-   case GL_OR_REVERSE: return 0xDD;
-   case GL_COPY_INVERTED: return 0x33;
-   case GL_OR_INVERTED: return 0xBB;
-   case GL_NAND: return 0x77;
-   case GL_SET: return 0xFF;
-   default: return 0;
-   }
-}
-
-
-/* Copy BitBlt
- */
-void intelEmitCopyBlit( struct intel_context *intel,
-			GLuint cpp,
-			GLshort src_pitch,
-			struct buffer *src_buffer,
-			GLuint  src_offset,
-			GLboolean src_tiled,
-			GLshort dst_pitch,
-			struct buffer *dst_buffer,
-			GLuint  dst_offset,
-			GLboolean dst_tiled,
-			GLshort src_x, GLshort src_y,
-			GLshort dst_x, GLshort dst_y,
-			GLshort w, GLshort h,
-			GLenum logic_op )
-{
-   GLuint CMD, BR13;
-   int dst_y2 = dst_y + h;
-   int dst_x2 = dst_x + w;
-   BATCH_LOCALS;
-
-
-   DBG("%s src:buf(%d)/%d %d,%d dst:buf(%d)/%d %d,%d sz:%dx%d op:%d\n",
-       __FUNCTION__,
-       src_buffer, src_pitch, src_x, src_y,
-       dst_buffer, dst_pitch, dst_x, dst_y,
-       w,h,logic_op);
-
-   assert( logic_op - GL_CLEAR >= 0 );
-   assert( logic_op - GL_CLEAR < 0x10 );
-      
-   src_pitch *= cpp;
-   dst_pitch *= cpp;
-
-   switch(cpp) {
-   case 1: 
-   case 2: 
-   case 3: 
-      BR13 = (translate_raster_op(logic_op) << 16) | (1<<24);
-      CMD = XY_SRC_COPY_BLT_CMD;
-      break;
-   case 4:
-      BR13 = (translate_raster_op(logic_op) << 16) | (1<<24) |
-	  (1<<25);
-      CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-	     XY_SRC_COPY_BLT_WRITE_RGB);
-      break;
-   default:
-      return;
-   }
-
-   if (src_tiled) {
-      CMD |= XY_SRC_TILED;
-      src_pitch /= 4;
-   }
-   
-   if (dst_tiled) {
-      CMD |= XY_DST_TILED;
-      dst_pitch /= 4;
-   }
-
-   if (dst_y2 < dst_y ||
-       dst_x2 < dst_x) {
-      return;
-   }
-
-   dst_pitch &= 0xffff;
-   src_pitch &= 0xffff;
-
-   /* Initial y values don't seem to work with negative pitches.  If
-    * we adjust the offsets manually (below), it seems to work fine.
-    *
-    * On the other hand, if we always adjust, the hardware doesn't
-    * know which blit directions to use, so overlapping copypixels get
-    * the wrong result.
-    */
-   if (dst_pitch > 0 && src_pitch > 0) {
-      BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
-      OUT_BATCH( CMD );
-      OUT_BATCH( dst_pitch | BR13 );
-      OUT_BATCH( (dst_y << 16) | dst_x );
-      OUT_BATCH( (dst_y2 << 16) | dst_x2 );
-      OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset );	
-      OUT_BATCH( (src_y << 16) | src_x );
-      OUT_BATCH( src_pitch );
-      OUT_BATCH( bmBufferOffset(intel, src_buffer) + src_offset ); 
-      ADVANCE_BATCH();
-   }
-   else {
-      BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
-      OUT_BATCH( CMD );
-      OUT_BATCH( (dst_pitch & 0xffff) | BR13 );
-      OUT_BATCH( (0 << 16) | dst_x );
-      OUT_BATCH( (h << 16) | dst_x2 );
-      OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset + dst_y * dst_pitch );	
-      OUT_BATCH( (0 << 16) | src_x );
-      OUT_BATCH( (src_pitch & 0xffff) );
-      OUT_BATCH( bmBufferOffset(intel, src_buffer) + src_offset + src_y * src_pitch ); 
-      ADVANCE_BATCH();
-   }
-}
-
-
-
-void intelClearWithBlit(GLcontext *ctx, GLbitfield flags)
-{
-   struct intel_context *intel = intel_context( ctx );
-   intelScreenPrivate *intelScreen = intel->intelScreen;
-   GLuint clear_depth, clear_color;
-   GLint cx, cy, cw, ch;
-   GLint cpp = intelScreen->cpp;
-   GLboolean all;
-   GLint i;
-   struct intel_region *front = intel->front_region;
-   struct intel_region *back = intel->back_region;
-   struct intel_region *depth = intel->depth_region;
-   GLuint BR13, FRONT_CMD, BACK_CMD, DEPTH_CMD;
-   GLuint front_pitch;
-   GLuint back_pitch;
-   GLuint depth_pitch;
-   BATCH_LOCALS;
-
-   
-   clear_color = intel->ClearColor;
-   clear_depth = 0;
-
-   if (flags & BUFFER_BIT_DEPTH) {
-      clear_depth = (GLuint)(ctx->Depth.Clear * intel->ClearDepth);
-   }
-
-   if (flags & BUFFER_BIT_STENCIL) {
-      clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
-   }
-
-   switch(cpp) {
-   case 2: 
-      BR13 = (0xF0 << 16) | (1<<24);
-      BACK_CMD  = FRONT_CMD = XY_COLOR_BLT_CMD;
-      DEPTH_CMD = XY_COLOR_BLT_CMD;
-      break;
-   case 4:
-      BR13 = (0xF0 << 16) | (1<<24) | (1<<25);
-      BACK_CMD = FRONT_CMD = (XY_COLOR_BLT_CMD |
-			      XY_COLOR_BLT_WRITE_ALPHA | 
-			      XY_COLOR_BLT_WRITE_RGB);
-      DEPTH_CMD = XY_COLOR_BLT_CMD;
-      if (flags & BUFFER_BIT_DEPTH) DEPTH_CMD |= XY_COLOR_BLT_WRITE_RGB;
-      if (flags & BUFFER_BIT_STENCIL) DEPTH_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
-      break;
-   default:
-      return;
-   }
-
-
-
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-   {
-      /* get clear bounds after locking */
-      cx = ctx->DrawBuffer->_Xmin;
-      cy = ctx->DrawBuffer->_Ymin;
-      ch = ctx->DrawBuffer->_Ymax - ctx->DrawBuffer->_Ymin;
-      cw = ctx->DrawBuffer->_Xmax - ctx->DrawBuffer->_Xmin;
-      all = (cw == ctx->DrawBuffer->Width && ch == ctx->DrawBuffer->Height);
-
-      /* flip top to bottom */
-      cy = intel->driDrawable->h - cy - ch;
-      cx = cx + intel->drawX;
-      cy += intel->drawY;
-
-      /* adjust for page flipping */
-      if ( intel->sarea->pf_current_page == 0 ) {
-	 front = intel->front_region;
-	 back = intel->back_region;
-      } 
-      else {
-	 back = intel->front_region;
-	 front = intel->back_region;
-      }
-      
-      front_pitch = front->pitch * front->cpp;
-      back_pitch = back->pitch * back->cpp;
-      depth_pitch = depth->pitch * depth->cpp;
-      
-      if (front->tiled) {
-	 FRONT_CMD |= XY_DST_TILED;
-	 front_pitch /= 4;
-      }
-
-      if (back->tiled) {
-	 BACK_CMD |= XY_DST_TILED;
-	 back_pitch /= 4;
-      }
-
-      if (depth->tiled) {
-	 DEPTH_CMD |= XY_DST_TILED;
-	 depth_pitch /= 4;
-      }
-
-      for (i = 0 ; i < intel->numClipRects ; i++) 
-      { 	 
-	 drm_clip_rect_t *box = &intel->pClipRects[i];	 
-	 drm_clip_rect_t b;
-
-	 if (!all) {
-	    GLint x = box->x1;
-	    GLint y = box->y1;
-	    GLint w = box->x2 - x;
-	    GLint h = box->y2 - y;
-
-	    if (x < cx) w -= cx - x, x = cx; 
-	    if (y < cy) h -= cy - y, y = cy;
-	    if (x + w > cx + cw) w = cx + cw - x;
-	    if (y + h > cy + ch) h = cy + ch - y;
-	    if (w <= 0) continue;
-	    if (h <= 0) continue;
-
-	    b.x1 = x;
-	    b.y1 = y;
-	    b.x2 = x + w;
-	    b.y2 = y + h;      
-	 } else {
-	    b = *box;
-	 }
-
-
-	 if (b.x1 > b.x2 ||
-	     b.y1 > b.y2 ||
-	     b.x2 > intelScreen->width ||
-	     b.y2 > intelScreen->height)
-	    continue;
-
-	 if ( flags & BUFFER_BIT_FRONT_LEFT ) {	    
-	    BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
-	    OUT_BATCH( FRONT_CMD );
-	    OUT_BATCH( front_pitch | BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( bmBufferOffset(intel, front->buffer) );
-	    OUT_BATCH( clear_color );
-	    ADVANCE_BATCH();
-	 }
-
-	 if ( flags & BUFFER_BIT_BACK_LEFT ) {
-	    BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS); 
-	    OUT_BATCH( BACK_CMD );
-	    OUT_BATCH( back_pitch | BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( bmBufferOffset(intel, back->buffer) );
-	    OUT_BATCH( clear_color );
-	    ADVANCE_BATCH();
-	 }
-
-	 if ( flags & (BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH) ) {
-	    BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
-	    OUT_BATCH( DEPTH_CMD );
-	    OUT_BATCH( depth_pitch | BR13 );
-	    OUT_BATCH( (b.y1 << 16) | b.x1 );
-	    OUT_BATCH( (b.y2 << 16) | b.x2 );
-	    OUT_BATCH( bmBufferOffset(intel, depth->buffer) );
-	    OUT_BATCH( clear_depth );
-	    ADVANCE_BATCH();
-	 }      
-      }
-   }
-   intel_batchbuffer_flush( intel->batch );
-   UNLOCK_HARDWARE( intel );
-}
-
-
-
-#define BR13_565  0x1
-#define BR13_8888 0x3
-
-
-void
-intelEmitImmediateColorExpandBlit(struct intel_context *intel,
-				  GLuint cpp,
-				  GLubyte *src_bits, GLuint src_size,
-				  GLuint fg_color,
-				  GLshort dst_pitch,
-				  struct buffer *dst_buffer,
-				  GLuint dst_offset,
-				  GLboolean dst_tiled,
-				  GLshort x, GLshort y, 
-				  GLshort w, GLshort h,
-				  GLenum logic_op)
-{
-   struct xy_setup_blit setup;
-   struct xy_text_immediate_blit text;
-   int dwords = ((src_size + 7) & ~7) / 4;
-
-   assert( logic_op - GL_CLEAR >= 0 );
-   assert( logic_op - GL_CLEAR < 0x10 );
-
-   if (w < 0 || h < 0) 
-      return;
-
-   dst_pitch *= cpp;
-
-   if (dst_tiled) 
-      dst_pitch /= 4;
-
-   DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
-       __FUNCTION__,
-       dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
-
-   memset(&setup, 0, sizeof(setup));
-   
-   setup.br0.client = CLIENT_2D;
-   setup.br0.opcode = OPCODE_XY_SETUP_BLT;
-   setup.br0.write_alpha = (cpp == 4);
-   setup.br0.write_rgb = (cpp == 4);
-   setup.br0.dst_tiled = dst_tiled;
-   setup.br0.length = (sizeof(setup) / sizeof(int)) - 2;
-      
-   setup.br13.dest_pitch = dst_pitch;
-   setup.br13.rop = translate_raster_op(logic_op);
-   setup.br13.color_depth = (cpp == 4) ? BR13_8888 : BR13_565;
-   setup.br13.clipping_enable = 0;
-   setup.br13.mono_source_transparency = 1;
-
-   setup.dw2.clip_y1 = 0;
-   setup.dw2.clip_x1 = 0;
-   setup.dw3.clip_y2 = 100;
-   setup.dw3.clip_x2 = 100;
-
-   setup.dest_base_addr = bmBufferOffset(intel, dst_buffer) + dst_offset;
-   setup.background_color = 0;
-   setup.foreground_color = fg_color;
-   setup.pattern_base_addr = 0;
-
-   memset(&text, 0, sizeof(text));
-   text.dw0.client = CLIENT_2D;
-   text.dw0.opcode = OPCODE_XY_TEXT_IMMEDIATE_BLT;
-   text.dw0.pad0 = 0;
-   text.dw0.byte_packed = 1;	/* ?maybe? */
-   text.dw0.pad1 = 0;
-   text.dw0.dst_tiled = dst_tiled;
-   text.dw0.pad2 = 0;
-   text.dw0.length = (sizeof(text)/sizeof(int)) - 2 + dwords;
-   text.dw1.dest_y1 = y;	/* duplicates info in setup blit */
-   text.dw1.dest_x1 = x;
-   text.dw2.dest_y2 = y + h;
-   text.dw2.dest_x2 = x + w;
-
-   intel_batchbuffer_require_space( intel->batch,
-				    sizeof(setup) + 
-				    sizeof(text) + 
-				    dwords,
-				    INTEL_BATCH_NO_CLIPRECTS );
-
-   intel_batchbuffer_data( intel->batch,
-			   &setup,
-			   sizeof(setup),
-			   INTEL_BATCH_NO_CLIPRECTS );
-
-   intel_batchbuffer_data( intel->batch,
-			   &text,
-			   sizeof(text),
-			   INTEL_BATCH_NO_CLIPRECTS );
-
-   intel_batchbuffer_data( intel->batch,
-			   src_bits,
-			   dwords * 4,
-			   INTEL_BATCH_NO_CLIPRECTS );
-}
-
+../intel/intel_blit.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 015e433fd7a..e06dd3c8d3c 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -1,207 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include "imports.h"
-#include "mtypes.h"
-#include "bufferobj.h"
-
-#include "intel_context.h"
-#include "intel_buffer_objects.h"
-#include "bufmgr.h"
-
-
-/**
- * There is some duplication between mesa's bufferobjects and our
- * bufmgr buffers.  Both have an integer handle and a hashtable to
- * lookup an opaque structure.  It would be nice if the handles and
- * internal structure where somehow shared.
- */
-static struct gl_buffer_object *intel_bufferobj_alloc( GLcontext *ctx, 
-						       GLuint name, 
-						       GLenum target )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *obj = MALLOC_STRUCT(intel_buffer_object);
-
-   _mesa_initialize_buffer_object(&obj->Base, name, target);
-
-   /* XXX:  We generate our own handle, which is different to 'name' above.
-    */
-   bmGenBuffers(intel, "bufferobj", 1, &obj->buffer, 6);
-   assert(obj->buffer);
-
-   return &obj->Base;
-}
-
-
-/**
- * Deallocate/free a vertex/pixel buffer object.
- * Called via glDeleteBuffersARB().
- */
-static void intel_bufferobj_free( GLcontext *ctx, 
-				  struct gl_buffer_object *obj )
-{ 
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   assert(intel_obj);
-
-   if (intel_obj->buffer) 
-      bmDeleteBuffers( intel, 1, &intel_obj->buffer );
-  
-   _mesa_free(intel_obj);
-}
-
-
-
-/**
- * Allocate space for and store data in a buffer object.  Any data that was
- * previously stored in the buffer object is lost.  If data is NULL,
- * memory will be allocated, but no copy will occur.
- * Called via glBufferDataARB().
- */
-static void intel_bufferobj_data( GLcontext *ctx, 
-				  GLenum target, 
-				  GLsizeiptrARB size,
-				  const GLvoid *data, 
-				  GLenum usage,
-				  struct gl_buffer_object *obj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   /* XXX: do something useful with 'usage' (eg. populate flags
-    * argument below)
-    */
-   assert(intel_obj);
-
-   obj->Size = size;
-   obj->Usage = usage;
-
-   bmBufferDataAUB(intel, intel_obj->buffer, size, data, 0,
-		   0, 0);
-}
-
-
-/**
- * Replace data in a subrange of buffer object.  If the data range
- * specified by size + offset extends beyond the end of the buffer or
- * if data is NULL, no copy is performed.
- * Called via glBufferSubDataARB().
- */
-static void intel_bufferobj_subdata( GLcontext *ctx, 
-				     GLenum target, 
-				     GLintptrARB offset,
-				     GLsizeiptrARB size, 
-				     const GLvoid * data,
-				     struct gl_buffer_object * obj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   assert(intel_obj);
-   bmBufferSubDataAUB(intel, intel_obj->buffer, offset, size, data, 0, 0);
-}
-
-
-/**
- * Called via glGetBufferSubDataARB().
- */
-static void intel_bufferobj_get_subdata( GLcontext *ctx, 
-					 GLenum target, 
-					 GLintptrARB offset,
-					 GLsizeiptrARB size, 
-					 GLvoid * data,
-					 struct gl_buffer_object * obj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   assert(intel_obj);
-   bmBufferGetSubData(intel, intel_obj->buffer, offset, size, data);
-}
-
-
-
-/**
- * Called via glMapBufferARB().
- */
-static void *intel_bufferobj_map( GLcontext *ctx, 
-				  GLenum target, 
-				  GLenum access,
-				  struct gl_buffer_object *obj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   /* XXX: Translate access to flags arg below:
-    */
-   assert(intel_obj);
-   assert(intel_obj->buffer);
-   obj->Pointer = bmMapBuffer(intel, intel_obj->buffer, 0);
-   return obj->Pointer;
-}
-
-
-/**
- * Called via glMapBufferARB().
- */
-static GLboolean intel_bufferobj_unmap( GLcontext *ctx,
-					GLenum target,
-					struct gl_buffer_object *obj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
-
-   assert(intel_obj);
-   assert(intel_obj->buffer);
-   assert(obj->Pointer);
-   bmUnmapBufferAUB(intel, intel_obj->buffer, 0, 0);
-   obj->Pointer = NULL;
-   return GL_TRUE;
-}
-
-struct buffer *intel_bufferobj_buffer( const struct intel_buffer_object *intel_obj )
-{
-   assert(intel_obj->Base.Name);
-   assert(intel_obj->buffer);
-   return intel_obj->buffer;
-}  
-
-void intel_bufferobj_init( struct intel_context *intel )
-{
-   GLcontext *ctx = &intel->ctx;
-
-   ctx->Driver.NewBufferObject = intel_bufferobj_alloc;
-   ctx->Driver.DeleteBuffer = intel_bufferobj_free;
-   ctx->Driver.BufferData = intel_bufferobj_data;
-   ctx->Driver.BufferSubData = intel_bufferobj_subdata;
-   ctx->Driver.GetBufferSubData = intel_bufferobj_get_subdata;
-   ctx->Driver.MapBuffer = intel_bufferobj_map;
-   ctx->Driver.UnmapBuffer = intel_bufferobj_unmap;
-}
+../intel/intel_buffer_objects.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_buffers.c b/src/mesa/drivers/dri/i965/intel_buffers.c
index d155c039d77..c86daa49f47 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_buffers.c
+++ b/src/mesa/drivers/dri/i965/intel_buffers.c
@@ -1,547 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "intel_screen.h"
-#include "intel_context.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-#include "intel_batchbuffer.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "macros.h"
-#include "swrast/swrast.h"
-
-GLboolean intel_intersect_cliprects( drm_clip_rect_t *dst,
-				     const drm_clip_rect_t *a,
-				     const drm_clip_rect_t *b )
-{
-   dst->x1 = MAX2(a->x1, b->x1);
-   dst->x2 = MIN2(a->x2, b->x2);
-   dst->y1 = MAX2(a->y1, b->y1);
-   dst->y2 = MIN2(a->y2, b->y2);
-
-   return (dst->x1 <= dst->x2 &&
-	   dst->y1 <= dst->y2);
-}
-
-struct intel_region *intel_drawbuf_region( struct intel_context *intel )
-{
-   switch (intel->ctx.DrawBuffer->_ColorDrawBufferMask[0]) {
-   case BUFFER_BIT_FRONT_LEFT:
-      return intel->front_region;
-   case BUFFER_BIT_BACK_LEFT:
-      return intel->back_region;
-   default:
-      /* Not necessary to fallback - could handle either NONE or
-       * FRONT_AND_BACK cases below.
-       */
-      return NULL;		
-   }
-}
-
-struct intel_region *intel_readbuf_region( struct intel_context *intel )
-{
-   GLcontext *ctx = &intel->ctx;
-
-   /* This will have to change to support EXT_fbo's, but is correct
-    * for now:
-    */
-   switch (ctx->ReadBuffer->_ColorReadBufferIndex) {
-   case BUFFER_FRONT_LEFT:
-      return intel->front_region;
-   case BUFFER_BACK_LEFT:
-      return intel->back_region;
-   default:
-      assert(0);
-      return NULL;
-   }
-}
-
-
-
-static void intelBufferSize(GLframebuffer *buffer,
-			    GLuint *width, 
-			    GLuint *height)
-{
-   GET_CURRENT_CONTEXT(ctx);
-   struct intel_context *intel = intel_context(ctx);
-   /* Need to lock to make sure the driDrawable is uptodate.  This
-    * information is used to resize Mesa's software buffers, so it has
-    * to be correct.
-    */
-   LOCK_HARDWARE(intel);
-   if (intel->driDrawable) {
-      *width = intel->driDrawable->w;
-      *height = intel->driDrawable->h;
-   }
-   else {
-      *width = 0;
-      *height = 0;
-   }
-   UNLOCK_HARDWARE(intel);
-}
-
-
-static void intelSetFrontClipRects( struct intel_context *intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
-   if (!dPriv) return;
-
-   intel->numClipRects = dPriv->numClipRects;
-   intel->pClipRects = dPriv->pClipRects;
-   intel->drawX = dPriv->x;
-   intel->drawY = dPriv->y;
-}
-
-
-static void intelSetBackClipRects( struct intel_context *intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
-   if (!dPriv) return;
-
-   if (intel->sarea->pf_enabled == 0 && dPriv->numBackClipRects == 0) {
-      intel->numClipRects = dPriv->numClipRects;
-      intel->pClipRects = dPriv->pClipRects;
-      intel->drawX = dPriv->x;
-      intel->drawY = dPriv->y;
-   } else {
-      intel->numClipRects = dPriv->numBackClipRects;
-      intel->pClipRects = dPriv->pBackClipRects;
-      intel->drawX = dPriv->backX;
-      intel->drawY = dPriv->backY;
-      
-      if (dPriv->numBackClipRects == 1 &&
-	  dPriv->x == dPriv->backX &&
-	  dPriv->y == dPriv->backY) {
-      
-	 /* Repeat the calculation of the back cliprect dimensions here
-	  * as early versions of dri.a in the Xserver are incorrect.  Try
-	  * very hard not to restrict future versions of dri.a which
-	  * might eg. allocate truly private back buffers.
-	  */
-	 int x1, y1;
-	 int x2, y2;
-	 
-	 x1 = dPriv->x;
-	 y1 = dPriv->y;      
-	 x2 = dPriv->x + dPriv->w;
-	 y2 = dPriv->y + dPriv->h;
-	 
-	 if (x1 < 0) x1 = 0;
-	 if (y1 < 0) y1 = 0;
-	 if (x2 > intel->intelScreen->width) x2 = intel->intelScreen->width;
-	 if (y2 > intel->intelScreen->height) y2 = intel->intelScreen->height;
-
-	 if (x1 == dPriv->pBackClipRects[0].x1 &&
-	     y1 == dPriv->pBackClipRects[0].y1) {
-
-	    dPriv->pBackClipRects[0].x2 = x2;
-	    dPriv->pBackClipRects[0].y2 = y2;
-	 }
-      }
-   }
-}
-
-
-void intelWindowMoved( struct intel_context *intel )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
-   if (!intel->ctx.DrawBuffer) {
-      intelSetFrontClipRects( intel );
-   }
-   else {
-      switch (intel->ctx.DrawBuffer->_ColorDrawBufferMask[0]) {
-      case BUFFER_BIT_FRONT_LEFT:
-	 intelSetFrontClipRects( intel );
-	 break;
-      case BUFFER_BIT_BACK_LEFT:
-	 intelSetBackClipRects( intel );
-	 break;
-      default:
-	 /* glDrawBuffer(GL_NONE or GL_FRONT_AND_BACK): software fallback */
-	 intelSetFrontClipRects( intel );
-      }
-   }
-
-   _mesa_resize_framebuffer(&intel->ctx,
-			    (GLframebuffer*)dPriv->driverPrivate,
-			    dPriv->w, dPriv->h);
-
-   /* Set state we know depends on drawable parameters:
-    */
-   {
-      GLcontext *ctx = &intel->ctx;
-
-      if (ctx->Driver.Scissor)
-	 ctx->Driver.Scissor( ctx, ctx->Scissor.X, ctx->Scissor.Y,
-			      ctx->Scissor.Width, ctx->Scissor.Height );
-      
-      if (ctx->Driver.DepthRange)
-	 ctx->Driver.DepthRange( ctx, 
-				 ctx->Viewport.Near,
-				 ctx->Viewport.Far );
-
-      intel->NewGLState |= _NEW_SCISSOR;
-   }
-
-   /* This works because the lock is always grabbed before emitting
-    * commands and commands are always flushed prior to releasing
-    * the lock.
-    */
-   intel->NewGLState |= _NEW_WINDOW_POS; 
-}
-
-
-
-/* A true meta version of this would be very simple and additionally
- * machine independent.  Maybe we'll get there one day.
- */
-static void intelClearWithTris(struct intel_context *intel, 
-			       GLbitfield mask)
-{
-   GLcontext *ctx = &intel->ctx;
-   drm_clip_rect_t clear;
-   GLint cx, cy, cw, ch;
-
-   if (INTEL_DEBUG & DEBUG_DRI)
-      _mesa_printf("%s %x\n", __FUNCTION__, mask);
-
-   {
-
-      intel->vtbl.install_meta_state(intel);
-
-      /* Get clear bounds after locking */
-      cx = ctx->DrawBuffer->_Xmin;
-      cy = ctx->DrawBuffer->_Ymin;
-      cw = ctx->DrawBuffer->_Xmax - ctx->DrawBuffer->_Xmin;
-      ch = ctx->DrawBuffer->_Ymax - ctx->DrawBuffer->_Ymin;
-
-      clear.x1 = cx;
-      clear.y1 = cy;
-      clear.x2 = cx + cw;
-      clear.y2 = cy + ch;
-
-      /* Back and stencil cliprects are the same.  Try and do both
-       * buffers at once:
-       */
-      if (mask & (BUFFER_BIT_BACK_LEFT|BUFFER_BIT_STENCIL|BUFFER_BIT_DEPTH)) { 
-	 intel->vtbl.meta_draw_region(intel, 
-				      intel->back_region,
-				      intel->depth_region );
-
-	 if (mask & BUFFER_BIT_BACK_LEFT)
-	    intel->vtbl.meta_color_mask(intel, GL_TRUE );
-	 else
-	    intel->vtbl.meta_color_mask(intel, GL_FALSE );
-
-	 if (mask & BUFFER_BIT_STENCIL) 
-	    intel->vtbl.meta_stencil_replace( intel, 
-					      intel->ctx.Stencil.WriteMask[0], 
-					      intel->ctx.Stencil.Clear);
-	 else
-	    intel->vtbl.meta_no_stencil_write(intel);
-
-	 if (mask & BUFFER_BIT_DEPTH) 
-	    intel->vtbl.meta_depth_replace( intel );
-	 else
-	    intel->vtbl.meta_no_depth_write(intel);
-      
-	 /* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
-	  * drawing origin may not be correctly emitted.
-	  */
-	 intel->vtbl.meta_draw_quad(intel, 
-				    clear.x1, clear.x2, 
-				    clear.y1, clear.y2, 
-				    intel->ctx.Depth.Clear,
-				    intel->clear_chan[0], 
-				    intel->clear_chan[1], 
-				    intel->clear_chan[2], 
-				    intel->clear_chan[3], 
-				    0, 0, 0, 0);
-      }
-
-      /* Front may have different cliprects: 
-       */
-      if (mask & BUFFER_BIT_FRONT_LEFT) {
-	 intel->vtbl.meta_no_depth_write(intel);
-	 intel->vtbl.meta_no_stencil_write(intel);
-	 intel->vtbl.meta_color_mask(intel, GL_TRUE );
-	 intel->vtbl.meta_draw_region(intel, 
-				      intel->front_region,
-				      intel->depth_region);
-
-	 /* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
-	  * drawing origin may not be correctly emitted.
-	  */
-	 intel->vtbl.meta_draw_quad(intel, 
-				    clear.x1, clear.x2, 
-				    clear.y1, clear.y2, 
-				    0,
-				    intel->clear_chan[0], 
-				    intel->clear_chan[1], 
-				    intel->clear_chan[2], 
-				    intel->clear_chan[3], 
-				    0, 0, 0, 0);
-      }
-
-      intel->vtbl.leave_meta_state( intel );
-   }
-}
-
-
-
-
-
-static void intelClear(GLcontext *ctx, GLbitfield mask)
-{
-   struct intel_context *intel = intel_context( ctx );
-   const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask);
-   GLbitfield tri_mask = 0;
-   GLbitfield blit_mask = 0;
-   GLbitfield swrast_mask = 0;
-
-   if (INTEL_DEBUG & DEBUG_DRI)
-      fprintf(stderr, "%s %x\n", __FUNCTION__, mask);
-
-
-   if (mask & BUFFER_BIT_FRONT_LEFT) {
-      if (colorMask == ~0) {
-	 blit_mask |= BUFFER_BIT_FRONT_LEFT;
-      } 
-      else {
-	 tri_mask |= BUFFER_BIT_FRONT_LEFT;
-      }
-   }
-
-   if (mask & BUFFER_BIT_BACK_LEFT) {
-      if (colorMask == ~0) {
-	 blit_mask |= BUFFER_BIT_BACK_LEFT;
-      } 
-      else {
-	 tri_mask |= BUFFER_BIT_BACK_LEFT;
-      }
-   }
-
-
-   if (mask & BUFFER_BIT_STENCIL) {
-      if (!intel->hw_stencil) {
-	 swrast_mask |= BUFFER_BIT_STENCIL;
-      }
-      else if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff ||
-	       intel->depth_region->tiled) {
-	 tri_mask |= BUFFER_BIT_STENCIL;
-      } 
-      else {
-	 blit_mask |= BUFFER_BIT_STENCIL;
-      }
-   }
-
-   /* Do depth with stencil if possible to avoid 2nd pass over the
-    * same buffer.
-    */
-   if (mask & BUFFER_BIT_DEPTH) {
-      if ((tri_mask & BUFFER_BIT_STENCIL) ||
-	  intel->depth_region->tiled)
-	 tri_mask |= BUFFER_BIT_DEPTH;
-      else 
-	 blit_mask |= BUFFER_BIT_DEPTH;
-   }
-
-   swrast_mask |= (mask & BUFFER_BIT_ACCUM);
-
-   intelFlush( ctx );
-
-   if (blit_mask)
-      intelClearWithBlit( ctx, blit_mask );
-
-   if (tri_mask) 
-      intelClearWithTris( intel, tri_mask );
-
-   if (swrast_mask)
-      _swrast_Clear( ctx, swrast_mask );
-}
-
-
-
-
-
-
-
-/* Flip the front & back buffers
- */
-static void intelPageFlip( const __DRIdrawablePrivate *dPriv )
-{
-#if 0
-   struct intel_context *intel;
-   int tmp, ret;
-
-   if (INTEL_DEBUG & DEBUG_IOCTL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   assert(dPriv);
-   assert(dPriv->driContextPriv);
-   assert(dPriv->driContextPriv->driverPrivate);
-
-   intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
-
-   intelFlush( &intel->ctx );
-   LOCK_HARDWARE( intel );
-
-   if (dPriv->pClipRects) {
-      *(drm_clip_rect_t *)intel->sarea->boxes = dPriv->pClipRects[0];
-      intel->sarea->nbox = 1;
-   }
-
-   ret = drmCommandNone(intel->driFd, DRM_I830_FLIP); 
-   if (ret) {
-      fprintf(stderr, "%s: %d\n", __FUNCTION__, ret);
-      UNLOCK_HARDWARE( intel );
-      exit(1);
-   }
-
-   tmp = intel->sarea->last_enqueue;
-   intelRefillBatchLocked( intel );
-   UNLOCK_HARDWARE( intel );
-
-
-   intelSetDrawBuffer( &intel->ctx, intel->ctx.Color.DriverDrawBuffer );
-#endif
-}
-
-
-void intelSwapBuffers( __DRIdrawablePrivate *dPriv )
-{
-   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
-      struct intel_context *intel;
-      GLcontext *ctx;
-      intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
-      ctx = &intel->ctx;
-      if (ctx->Visual.doubleBufferMode) {
-	 _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
-	 if ( 0 /*intel->doPageFlip*/ ) { /* doPageFlip is never set !!! */
-	    intelPageFlip( dPriv );
-	 } else {
-	    intelCopyBuffer( dPriv, NULL );
-	 }
-	 if (intel->aub_file) {
-	    intelFlush(ctx);
-	    intel->vtbl.aub_dump_bmp( intel, 1 );
-
-	    intel->aub_wrap = 1;
-	 }
-      }
-   } else {
-      /* XXX this shouldn't be an error but we can't handle it for now */
-      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
-   }
-}
-
-void intelCopySubBuffer( __DRIdrawablePrivate *dPriv,
-			 int x, int y, int w, int h )
-{
-   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
-      struct intel_context *intel = dPriv->driContextPriv->driverPrivate;
-      GLcontext *ctx = &intel->ctx;
-
-      if (ctx->Visual.doubleBufferMode) {
-	 drm_clip_rect_t rect;
-	 rect.x1 = x + dPriv->x;
-	 rect.y1 = (dPriv->h - y - h) + dPriv->y;
-	 rect.x2 = rect.x1 + w;
-	 rect.y2 = rect.y1 + h;
-	 _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
-	 intelCopyBuffer( dPriv, &rect );
-      }
-   } else {
-      /* XXX this shouldn't be an error but we can't handle it for now */
-      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
-   }
-}
-
-
-static void intelDrawBuffer(GLcontext *ctx, GLenum mode )
-{
-   struct intel_context *intel = intel_context(ctx);
-   int front = 0;
- 
-   if (!ctx->DrawBuffer)
-      return;
-
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
-      front = 1;
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE );
-      break;
-   case BUFFER_BIT_BACK_LEFT:
-      front = 0;
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE );
-      break;
-   default:
-      FALLBACK( intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE );
-      return;
-   }
-
-   if ( intel->sarea->pf_current_page == 1 ) 
-      front ^= 1;
-   
-   intelSetFrontClipRects( intel );
-
-
-   if (front) {
-      if (intel->draw_region != intel->front_region) {
-	 intel_region_release(intel, &intel->draw_region);
-	 intel_region_reference(&intel->draw_region, intel->front_region);
-      }
-   } else {
-      if (intel->draw_region != intel->back_region) {
-	 intel_region_release(intel, &intel->draw_region);
-	 intel_region_reference(&intel->draw_region, intel->back_region);
-      }
-   }
-
-   intel->vtbl.set_draw_region( intel, 
-				intel->draw_region,
-				intel->depth_region);
-}
-
-static void intelReadBuffer( GLcontext *ctx, GLenum mode )
-{
-   /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */
-}
-
-
-
-void intelInitBufferFuncs( struct dd_function_table *functions )
-{
-   functions->Clear = intelClear;
-   functions->GetBufferSize = intelBufferSize;
-   functions->DrawBuffer = intelDrawBuffer;
-   functions->ReadBuffer = intelReadBuffer;
-}
+../intel/intel_buffers.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index 4f51fefe0f6..27a1cbb255e 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -1,712 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include "glheader.h"
-#include "context.h"
-#include "matrix.h"
-#include "simple_list.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "imports.h"
-#include "points.h"
-
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/tnl.h"
-#include "vbo/vbo.h"
-
-#include "tnl/t_pipeline.h"
-#include "tnl/t_vertex.h"
-
-#include "drivers/common/driverfuncs.h"
-
-#include "intel_screen.h"
-
-#include "i830_dri.h"
-#include "i830_common.h"
-
-#include "intel_tex.h"
-#include "intel_span.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-#include "intel_buffer_objects.h"
-
-#include "bufmgr.h"
-
-#include "utils.h"
-#include "vblank.h"
-#ifndef INTEL_DEBUG
-int INTEL_DEBUG = (0);
-#endif
-
-#define need_GL_ARB_multisample
-#define need_GL_ARB_point_parameters
-#define need_GL_ARB_texture_compression
-#define need_GL_ARB_vertex_buffer_object
-#define need_GL_ARB_vertex_program
-#define need_GL_ARB_window_pos
-#define need_GL_ARB_occlusion_query
-#define need_GL_EXT_blend_color
-#define need_GL_EXT_blend_equation_separate
-#define need_GL_EXT_blend_func_separate
-#define need_GL_EXT_blend_minmax
-#define need_GL_EXT_cull_vertex
-#define need_GL_EXT_fog_coord
-#define need_GL_EXT_multi_draw_arrays
-#define need_GL_EXT_secondary_color
-#include "extension_helper.h"
-
-#ifndef VERBOSE
-int VERBOSE = 0;
-#endif
-
-/***************************************
- * Mesa's Driver Functions
- ***************************************/
-
-#define DRIVER_VERSION                     "4.1.3002"
-
-static const GLubyte *intelGetString( GLcontext *ctx, GLenum name )
-{
-   const char * chipset;
-   static char buffer[128];
-
-   switch (name) {
-   case GL_VENDOR:
-      return (GLubyte *)"Tungsten Graphics, Inc";
-      break;
-      
-   case GL_RENDERER:
-      switch (intel_context(ctx)->intelScreen->deviceID) {
-      case PCI_CHIP_I965_Q:
-	 chipset = "Intel(R) 965Q";
-         break;
-      case PCI_CHIP_I965_G:
-      case PCI_CHIP_I965_G_1:
-	 chipset = "Intel(R) 965G";
-         break;
-      case PCI_CHIP_I946_GZ:
-	 chipset = "Intel(R) 946GZ";
-         break;
-      case PCI_CHIP_I965_GM:
-	 chipset = "Intel(R) 965GM";
-         break;
-      case PCI_CHIP_I965_GME:
-	 chipset = "Intel(R) 965GME/GLE";
-         break;
-      default:
-	 chipset = "Unknown Intel Chipset";
-      }
-
-      (void) driGetRendererString( buffer, chipset, DRIVER_VERSION, 0 );
-      return (GLubyte *) buffer;
-
-   default:
-      return NULL;
-   }
-}
-
-
-/**
- * Extension strings exported by the intel driver.
- *
- * \note
- * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
- * old i830-specific driver.
- */
-const struct dri_extension card_extensions[] =
-{
-    { "GL_ARB_multisample",                GL_ARB_multisample_functions },
-    { "GL_ARB_multitexture",               NULL },
-    { "GL_ARB_point_parameters",           GL_ARB_point_parameters_functions },
-    { "GL_ARB_texture_border_clamp",       NULL },
-    { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
-    { "GL_ARB_texture_cube_map",           NULL },
-    { "GL_ARB_texture_env_add",            NULL },
-    { "GL_ARB_texture_env_combine",        NULL },
-    { "GL_ARB_texture_env_dot3",           NULL },
-    { "GL_ARB_texture_mirrored_repeat",    NULL },
-    { "GL_ARB_texture_non_power_of_two",   NULL },
-    { "GL_ARB_texture_rectangle",          NULL },
-    { "GL_NV_texture_rectangle",           NULL },
-    { "GL_EXT_texture_rectangle",          NULL },
-    { "GL_ARB_texture_rectangle",          NULL },
-    { "GL_ARB_vertex_buffer_object",       GL_ARB_vertex_buffer_object_functions },
-    { "GL_ARB_vertex_program",             GL_ARB_vertex_program_functions },
-    { "GL_ARB_window_pos",                 GL_ARB_window_pos_functions },
-    { "GL_EXT_blend_color",                GL_EXT_blend_color_functions },
-    { "GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions },
-    { "GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions },
-    { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
-    { "GL_EXT_blend_logic_op",             NULL },
-    { "GL_EXT_blend_subtract",             NULL },
-    { "GL_EXT_cull_vertex",                GL_EXT_cull_vertex_functions },
-    { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
-    { "GL_EXT_multi_draw_arrays",          GL_EXT_multi_draw_arrays_functions },
-    { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
-    { "GL_EXT_stencil_wrap",               NULL },
-    { "GL_EXT_texture_edge_clamp",         NULL },
-    { "GL_EXT_texture_env_combine",        NULL },
-    { "GL_EXT_texture_env_dot3",           NULL },
-    { "GL_EXT_texture_filter_anisotropic", NULL },
-    { "GL_EXT_texture_lod_bias",           NULL },
-    { "GL_3DFX_texture_compression_FXT1",  NULL },
-    { "GL_APPLE_client_storage",           NULL },
-    { "GL_MESA_pack_invert",               NULL },
-    { "GL_MESA_ycbcr_texture",             NULL },
-    { "GL_NV_blend_square",                NULL },
-    { "GL_SGIS_generate_mipmap",           NULL },
-    { NULL,                                NULL }
-};
-
-const struct dri_extension arb_oc_extension = 
-    { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions};
-
-void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging)
-{	     
-	struct intel_context *intel = ctx?intel_context(ctx):NULL;
-	driInitExtensions(ctx, card_extensions, enable_imaging);
-	if (!ctx || intel->intelScreen->drmMinor >= 8)
-		driInitSingleExtension (ctx, &arb_oc_extension);
-}
-
-static const struct dri_debug_control debug_control[] =
-{
-    { "fall",  DEBUG_FALLBACKS },
-    { "tex",   DEBUG_TEXTURE },
-    { "ioctl", DEBUG_IOCTL },
-    { "prim",  DEBUG_PRIMS },
-    { "vert",  DEBUG_VERTS },
-    { "state", DEBUG_STATE },
-    { "verb",  DEBUG_VERBOSE },
-    { "dri",   DEBUG_DRI },
-    { "dma",   DEBUG_DMA },
-    { "san",   DEBUG_SANITY },
-    { "sync",  DEBUG_SYNC },
-    { "sleep", DEBUG_SLEEP },
-    { "pix",   DEBUG_PIXEL },
-    { "buf",   DEBUG_BUFMGR },
-    { "stats", DEBUG_STATS },
-    { "tile",  DEBUG_TILE },
-    { "sing",  DEBUG_SINGLE_THREAD },
-    { "thre",  DEBUG_SINGLE_THREAD },
-    { "wm",    DEBUG_WM },
-    { "vs",    DEBUG_VS },
-    { NULL,    0 }
-};
-
-
-static void intelInvalidateState( GLcontext *ctx, GLuint new_state )
-{
-   struct intel_context *intel = intel_context(ctx);
-
-   _swrast_InvalidateState( ctx, new_state );
-   _swsetup_InvalidateState( ctx, new_state );
-   _vbo_InvalidateState( ctx, new_state );
-   _tnl_InvalidateState( ctx, new_state );
-   _tnl_invalidate_vertex_state( ctx, new_state );
-   
-   intel->NewGLState |= new_state;
-
-   if (intel->vtbl.invalidate_state)
-      intel->vtbl.invalidate_state( intel, new_state );
-}
-
-
-void intelFlush( GLcontext *ctx )
-{
-   struct intel_context *intel = intel_context( ctx );
-
-   bmLockAndFence(intel);
-}
-
-void intelFinish( GLcontext *ctx ) 
-{
-   struct intel_context *intel = intel_context( ctx );
-
-   bmFinishFence(intel, bmLockAndFence(intel));
-}
-
-static void
-intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	struct intel_context *intel = intel_context( ctx );
-	drmI830MMIO io = {
-		.read_write = MMIO_READ,
-		.reg = MMIO_REGS_PS_DEPTH_COUNT,
-		.data = &q->Result 
-	};
-	intel->stats_wm++;
-	intelFinish(&intel->ctx);
-	drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
-}
-
-static void
-intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	struct intel_context *intel = intel_context( ctx );
-	GLuint64EXT tmp;	
-	drmI830MMIO io = {
-		.read_write = MMIO_READ,
-		.reg = MMIO_REGS_PS_DEPTH_COUNT,
-		.data = &tmp
-	};
-	intelFinish(&intel->ctx);
-	drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
-	q->Result = tmp - q->Result;
-	q->Ready = GL_TRUE;
-	intel->stats_wm--;
-}
-
-
-void intelInitDriverFunctions( struct dd_function_table *functions )
-{
-   _mesa_init_driver_functions( functions );
-
-   functions->Flush = intelFlush;
-   functions->Finish = intelFinish;
-   functions->GetString = intelGetString;
-   functions->UpdateState = intelInvalidateState;
-   functions->BeginQuery = intelBeginQuery;
-   functions->EndQuery = intelEndQuery;
-
-   /* CopyPixels can be accelerated even with the current memory
-    * manager:
-    */
-   if (!getenv("INTEL_NO_BLIT")) {
-      functions->CopyPixels = intelCopyPixels;
-      functions->Bitmap = intelBitmap;
-   }
-
-   intelInitTextureFuncs( functions );
-   intelInitStateFuncs( functions );
-   intelInitBufferFuncs( functions );
-}
-
-
-
-GLboolean intelInitContext( struct intel_context *intel,
-			    const __GLcontextModes *mesaVis,
-			    __DRIcontextPrivate *driContextPriv,
-			    void *sharedContextPrivate,
-			    struct dd_function_table *functions )
-{
-   GLcontext *ctx = &intel->ctx;
-   GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
-   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-   volatile drmI830Sarea *saPriv = (volatile drmI830Sarea *)
-      (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
-
-   if (!_mesa_initialize_context(&intel->ctx,
-				 mesaVis, shareCtx, 
-				 functions,
-				 (void*) intel)) {
-      _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
-      return GL_FALSE;
-   }
-
-   driContextPriv->driverPrivate = intel;
-   intel->intelScreen = intelScreen;
-   intel->driScreen = sPriv;
-   intel->sarea = saPriv;
-
-   driParseConfigFiles (&intel->optionCache, &intelScreen->optionCache,
-		   intel->driScreen->myNum, "i965");
-
-   intel->vblank_flags = (intel->intelScreen->irq_active != 0)
-	   ? driGetDefaultVBlankFlags(&intel->optionCache) : VBLANK_FLAG_NO_IRQ;
-
-   ctx->Const.MaxTextureMaxAnisotropy = 2.0;
-
-   if (getenv("INTEL_STRICT_CONFORMANCE")) {
-      intel->strict_conformance = 1;
-   }
-
-   if (intel->strict_conformance) {
-      ctx->Const.MinLineWidth = 1.0;
-      ctx->Const.MinLineWidthAA = 1.0;
-      ctx->Const.MaxLineWidth = 1.0;
-      ctx->Const.MaxLineWidthAA = 1.0;
-      ctx->Const.LineWidthGranularity = 1.0;
-   }
-   else {
-      ctx->Const.MinLineWidth = 1.0;
-      ctx->Const.MinLineWidthAA = 1.0;
-      ctx->Const.MaxLineWidth = 5.0;
-      ctx->Const.MaxLineWidthAA = 5.0;
-      ctx->Const.LineWidthGranularity = 0.5;
-   }
-
-   ctx->Const.MinPointSize = 1.0;
-   ctx->Const.MinPointSizeAA = 1.0;
-   ctx->Const.MaxPointSize = 255.0;
-   ctx->Const.MaxPointSizeAA = 3.0;
-   ctx->Const.PointSizeGranularity = 1.0;
-
-   /* reinitialize the context point state.
-    * It depend on constants in __GLcontextRec::Const
-    */
-   _mesa_init_point(ctx);
-
-   /* Initialize the software rasterizer and helper modules. */
-   _swrast_CreateContext( ctx );
-   _vbo_CreateContext( ctx );
-   _tnl_CreateContext( ctx );
-   _swsetup_CreateContext( ctx );
-
-   TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
-
-   /* Configure swrast to match hardware characteristics: */
-   _swrast_allow_pixel_fog( ctx, GL_FALSE );
-   _swrast_allow_vertex_fog( ctx, GL_TRUE );
-
-   /* Dri stuff */
-   intel->hHWContext = driContextPriv->hHWContext;
-   intel->driFd = sPriv->fd;
-   intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
-
-   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
-   intel->hw_stipple = 1;
-
-   switch(mesaVis->depthBits) {
-   case 0:			/* what to do in this case? */
-   case 16:
-      intel->depth_scale = 1.0/0xffff;
-      intel->polygon_offset_scale = 1.0/0xffff;
-      intel->depth_clear_mask = ~0;
-      intel->ClearDepth = 0xffff;
-      break;
-   case 24:
-      intel->depth_scale = 1.0/0xffffff;
-      intel->polygon_offset_scale = 2.0/0xffffff; /* req'd to pass glean */
-      intel->depth_clear_mask = 0x00ffffff;
-      intel->stencil_clear_mask = 0xff000000;
-      intel->ClearDepth = 0x00ffffff;
-      break;
-   default:
-      assert(0); 
-      break;
-   }
-
-   /* Initialize swrast, tnl driver tables: */
-   intelInitSpanFuncs( ctx );
-
-   intel->no_hw = getenv("INTEL_NO_HW") != NULL;
-
-   if (!intel->intelScreen->irq_active) {
-      _mesa_printf("IRQs not active.  Exiting\n");
-      exit(1);
-   }
-   intelInitExtensions(ctx, GL_TRUE); 
-
-   INTEL_DEBUG  = driParseDebugString( getenv( "INTEL_DEBUG" ),
-				       debug_control );
-
-
-   /* Buffer manager: 
-    */
-   intel->bm = bm_fake_intel_Attach( intel );
-
-
-   bmInitPool(intel,
-	      intel->intelScreen->tex.offset, /* low offset */
-	      intel->intelScreen->tex.map, /* low virtual */
-	      intel->intelScreen->tex.size,
-	      BM_MEM_AGP);
-
-   /* These are still static, but create regions for them.  
-    */
-   intel->front_region = 
-      intel_region_create_static(intel,
-				 BM_MEM_AGP,
-				 intelScreen->front.offset,
-				 intelScreen->front.map,
-				 intelScreen->cpp,
-				 intelScreen->front.pitch / intelScreen->cpp,
-				 intelScreen->height,
-				 intelScreen->front.size,
-				 intelScreen->front.tiled != 0);
-
-   intel->back_region = 
-      intel_region_create_static(intel,
-				 BM_MEM_AGP,
-				 intelScreen->back.offset,
-				 intelScreen->back.map,
-				 intelScreen->cpp,
-				 intelScreen->back.pitch / intelScreen->cpp,
-				 intelScreen->height,
-				 intelScreen->back.size,
-                                 intelScreen->back.tiled != 0);
-
-   /* Still assuming front.cpp == depth.cpp
-    *
-    * XXX: Setting tiling to false because Depth tiling only supports
-    * YMAJOR but the blitter only supports XMAJOR tiling.  Have to
-    * resolve later.
-    */
-   intel->depth_region = 
-      intel_region_create_static(intel,
-				 BM_MEM_AGP,
-				 intelScreen->depth.offset,
-				 intelScreen->depth.map,
-				 intelScreen->cpp,
-				 intelScreen->depth.pitch / intelScreen->cpp,
-				 intelScreen->height,
-				 intelScreen->depth.size,
-                                 intelScreen->depth.tiled != 0);
-   
-   intel_bufferobj_init( intel );
-   intel->batch = intel_batchbuffer_alloc( intel );
-
-   if (intel->ctx.Mesa_DXTn) {
-      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
-      _mesa_enable_extension( ctx, "GL_S3_s3tc" );
-   }
-   else if (driQueryOptionb (&intelScreen->optionCache, "force_s3tc_enable")) {
-      _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
-   }
-
-/*    driInitTextureObjects( ctx, & intel->swapped, */
-/* 			  DRI_TEXMGR_DO_TEXTURE_1D | */
-/* 			  DRI_TEXMGR_DO_TEXTURE_2D |  */
-/* 			  DRI_TEXMGR_DO_TEXTURE_RECT ); */
-
-
-   if (getenv("INTEL_NO_RAST")) {
-      fprintf(stderr, "disabling 3D rasterization\n");
-      intel->no_rast = 1;
-   }
-
-
-   return GL_TRUE;
-}
-
-void intelDestroyContext(__DRIcontextPrivate *driContextPriv)
-{
-   struct intel_context *intel = (struct intel_context *) driContextPriv->driverPrivate;
-
-   assert(intel); /* should never be null */
-   if (intel) {
-      GLboolean   release_texture_heaps;
-
-
-      intel->vtbl.destroy( intel );
-
-      release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
-      _swsetup_DestroyContext (&intel->ctx);
-      _tnl_DestroyContext (&intel->ctx);
-      _vbo_DestroyContext (&intel->ctx);
-
-      _swrast_DestroyContext (&intel->ctx);
-      intel->Fallback = 0;	/* don't call _swrast_Flush later */
-      intel_batchbuffer_free(intel->batch);
-      intel->batch = NULL;
-      
-
-      if ( release_texture_heaps ) {
-         /* This share group is about to go away, free our private
-          * texture object data.
-          */
-
-	 /* XXX: destroy the shared bufmgr struct here?
-	  */
-      }
-
-      /* Free the regions created to describe front/back/depth
-       * buffers:
-       */
-#if 0
-      intel_region_release(intel, &intel->front_region);
-      intel_region_release(intel, &intel->back_region);
-      intel_region_release(intel, &intel->depth_region);
-      intel_region_release(intel, &intel->draw_region);
-#endif
-
-      /* free the Mesa context */
-      _mesa_destroy_context(&intel->ctx);
-   }
-
-   driContextPriv->driverPrivate = NULL;
-}
-
-GLboolean intelUnbindContext(__DRIcontextPrivate *driContextPriv)
-{
-   return GL_TRUE;
-}
-
-GLboolean intelMakeCurrent(__DRIcontextPrivate *driContextPriv,
-			  __DRIdrawablePrivate *driDrawPriv,
-			  __DRIdrawablePrivate *driReadPriv)
-{
-
-   if (driContextPriv) {
-      struct intel_context *intel = (struct intel_context *) driContextPriv->driverPrivate;
-
-      if ( intel->driDrawable != driDrawPriv ) {
-	 /* Shouldn't the readbuffer be stored also? */
-	 driDrawableInitVBlank( driDrawPriv, intel->vblank_flags,
-		      &intel->vbl_seq );
-
-	 intel->driDrawable = driDrawPriv;
-	 intelWindowMoved( intel );
-      }
-
-      _mesa_make_current(&intel->ctx,
-			 (GLframebuffer *) driDrawPriv->driverPrivate,
-			 (GLframebuffer *) driReadPriv->driverPrivate);
-
-      intel->ctx.Driver.DrawBuffer( &intel->ctx, intel->ctx.Color.DrawBuffer[0] );
-   } else {
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   return GL_TRUE;
-}
-
-
-static void intelContendedLock( struct intel_context *intel, GLuint flags )
-{
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;
-   __DRIscreenPrivate *sPriv = intel->driScreen;
-   volatile drmI830Sarea * sarea = intel->sarea;
-   int me = intel->hHWContext;
-   int my_bufmgr = bmCtxId(intel);
-
-   drmGetLock(intel->driFd, intel->hHWContext, flags);
-
-   /* If the window moved, may need to set a new cliprect now.
-    *
-    * NOTE: This releases and regains the hw lock, so all state
-    * checking must be done *after* this call:
-    */
-   if (dPriv)
-      DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
-
-
-   intel->locked = 1;
-   intel->need_flush = 1;
-
-   /* Lost context?
-    */
-   if (sarea->ctxOwner != me) {
-      DBG("Lost Context: sarea->ctxOwner %x me %x\n", sarea->ctxOwner, me);
-      sarea->ctxOwner = me;
-      intel->vtbl.lost_hardware( intel );
-   }
-
-   /* As above, but don't evict the texture data on transitions
-    * between contexts which all share a local buffer manager.
-    */
-   if (sarea->texAge != my_bufmgr) {
-      DBG("Lost Textures: sarea->texAge %x my_bufmgr %x\n", sarea->ctxOwner, my_bufmgr);
-      sarea->texAge = my_bufmgr;
-      bm_fake_NotifyContendedLockTake( intel ); 
-   }
-
-   /* Drawable changed?
-    */
-   if (dPriv && intel->lastStamp != dPriv->lastStamp) {
-      intelWindowMoved( intel );
-      intel->lastStamp = dPriv->lastStamp;
-   }
-}
-
-_glthread_DECLARE_STATIC_MUTEX(lockMutex);
-
-/* Lock the hardware and validate our state.  
- */
-void LOCK_HARDWARE( struct intel_context *intel )
-{
-    char __ret=0;
-
-    _glthread_LOCK_MUTEX(lockMutex);
-    assert(!intel->locked);
-
-
-    DRM_CAS(intel->driHwLock, intel->hHWContext,
-	    (DRM_LOCK_HELD|intel->hHWContext), __ret);
-    if (__ret)
-        intelContendedLock( intel, 0 );
-
-   intel->locked = 1;
-
-   if (intel->aub_wrap) {
-      bm_fake_NotifyContendedLockTake( intel ); 
-      intel->vtbl.lost_hardware( intel );
-      intel->vtbl.aub_wrap(intel);
-      intel->aub_wrap = 0;
-   }
-
-   if (bmError(intel)) {
-      bmEvictAll(intel);
-      intel->vtbl.lost_hardware( intel );
-   }
-
-   /* Make sure nothing has been emitted prior to getting the lock: 
-    */
-   assert(intel->batch->map == 0);
-
-   /* XXX: postpone, may not be needed:
-    */
-   if (!intel_batchbuffer_map(intel->batch)) {
-      bmEvictAll(intel);
-      intel->vtbl.lost_hardware( intel );
-
-      /* This could only fail if the batchbuffer was greater in size
-       * than the available texture memory:
-       */
-      if (!intel_batchbuffer_map(intel->batch)) {
-	 _mesa_printf("double failure to map batchbuffer\n");
-	 assert(0);
-      }
-   }
-}
- 
-  
-/* Unlock the hardware using the global current context 
- */
-void UNLOCK_HARDWARE( struct intel_context *intel )
-{
-   /* Make sure everything has been released: 
-    */
-   assert(intel->batch->ptr == intel->batch->map + intel->batch->offset);
-
-   intel_batchbuffer_unmap(intel->batch);
-   intel->vtbl.note_unlock( intel );
-   intel->locked = 0;
-
-
-
-   DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
-   _glthread_UNLOCK_MUTEX(lockMutex); 
-}
-
-
+../intel/intel_context.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
deleted file mode 100644
index 406f8483dce..00000000000
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ /dev/null
@@ -1,528 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTELCONTEXT_INC
-#define INTELCONTEXT_INC
-
-
-
-#include "mtypes.h"
-#include "drm.h"
-#include "texmem.h"
-
-#include "intel_screen.h"
-#include "i830_common.h"
-#include "tnl/t_vertex.h"
-
-#define TAG(x) intel##x
-#include "tnl_dd/t_dd_vertex.h"
-#undef TAG
-
-#define DV_PF_555  (1<<8)
-#define DV_PF_565  (2<<8)
-#define DV_PF_8888 (3<<8)
-
-struct intel_region;
-struct intel_context;
-
-typedef void (*intel_tri_func)(struct intel_context *, intelVertex *, intelVertex *,
-							  intelVertex *);
-typedef void (*intel_line_func)(struct intel_context *, intelVertex *, intelVertex *);
-typedef void (*intel_point_func)(struct intel_context *, intelVertex *);
-
-#define INTEL_FALLBACK_DRAW_BUFFER	 0x1
-#define INTEL_FALLBACK_READ_BUFFER	 0x2
-#define INTEL_FALLBACK_USER		 0x4
-#define INTEL_FALLBACK_RENDERMODE	 0x8
-#define INTEL_FALLBACK_TEXTURE   	 0x10
-
-extern void intelFallback( struct intel_context *intel, GLuint bit, GLboolean mode );
-#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
-
-
-
-struct intel_texture_object
-{
-   struct gl_texture_object base; /* The "parent" object */
-
-   /* The mipmap tree must include at least these levels once
-    * validated:
-    */
-   GLuint firstLevel;
-   GLuint lastLevel;
-
-   GLuint dirty_images[6];
-   GLuint dirty;
-
-   /* On validation any active images held in main memory or in other
-    * regions will be copied to this region and the old storage freed.
-    */
-   struct intel_mipmap_tree *mt;
-};
-
-
-
-struct intel_context
-{
-   GLcontext ctx;		/* the parent class */
-
-   struct {
-      void (*destroy)( struct intel_context *intel ); 
-      void (*emit_state)( struct intel_context *intel );
-      void (*emit_invarient_state)( struct intel_context *intel );
-      void (*lost_hardware)( struct intel_context *intel );
-      void (*note_fence)( struct intel_context *intel, GLuint fence );
-      void (*note_unlock)( struct intel_context *intel );
-      void (*update_texture_state)( struct intel_context *intel );
-
-      void (*render_start)( struct intel_context *intel );
-      void (*set_draw_region)( struct intel_context *intel, 
-			       struct intel_region *draw_region,
-			       struct intel_region *depth_region );
-
-      GLuint (*flush_cmd)( void );
-
-      void (*emit_flush)( struct intel_context *intel,
-			  GLuint unused );
-
-      void (*aub_commands)( struct intel_context *intel, 
-			    GLuint offset,
-			    const void *buf,
-			    GLuint sz );
-      void (*aub_dump_bmp)( struct intel_context *intel, GLuint buffer );
-      void (*aub_wrap)( struct intel_context *intel );
-      void (*aub_gtt_data)( struct intel_context *intel, 
-			    GLuint offset,
-			    const void *src,
-			    GLuint size,
-			    GLuint aubtype, 
-			    GLuint aubsubtype);
-
-
-      void (*reduced_primitive_state)( struct intel_context *intel, GLenum rprim );
-
-      GLboolean (*check_vertex_size)( struct intel_context *intel, GLuint expected );
-
-      void (*invalidate_state)( struct intel_context *intel, GLuint new_state );
-
-      /* Metaops: 
-       */
-      void (*install_meta_state)( struct intel_context *intel );
-      void (*leave_meta_state)( struct intel_context *intel );
-
-      void (*meta_draw_region)( struct intel_context *intel,
-				struct intel_region *draw_region,
-				struct intel_region *depth_region );
-
-      void (*meta_color_mask)( struct intel_context *intel,
-			       GLboolean );
-      
-      void (*meta_stencil_replace)( struct intel_context *intel,
-				    GLuint mask,
-				    GLuint clear );
-
-      void (*meta_depth_replace)( struct intel_context *intel );
-
-      void (*meta_texture_blend_replace) (struct intel_context * intel);
-      
-      void (*meta_no_stencil_write)( struct intel_context *intel );
-      void (*meta_no_depth_write)( struct intel_context *intel );
-      void (*meta_no_texture)( struct intel_context *intel );
-      void (*meta_import_pixel_state) (struct intel_context * intel);
-      void (*meta_frame_buffer_texture)( struct intel_context *intel,
-					 GLint xoff, GLint yoff );
-
-      void (*meta_draw_quad)(struct intel_context *intel, 
-			     GLfloat x0, GLfloat x1,
-			     GLfloat y0, GLfloat y1, 
-			     GLfloat z,
-			     GLubyte red, GLubyte green,
-			     GLubyte blue, GLubyte alpha,
-			     GLfloat s0, GLfloat s1,
-			     GLfloat t0, GLfloat t1);
-
-
-
-   } vtbl;
-
-   GLint refcount;   
-   GLuint Fallback;
-   GLuint NewGLState;
-   
-   GLuint last_swap_fence;
-   GLuint second_last_swap_fence;
-   
-   GLboolean aub_wrap;
-   GLuint stats_wm;
-
-   struct intel_batchbuffer *batch;
-
-   GLubyte clear_chan[4];
-   GLuint ClearColor;
-   GLuint ClearDepth;
-
-   GLfloat depth_scale;
-   GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
-   GLuint depth_clear_mask;
-   GLuint stencil_clear_mask;
-
-   GLboolean hw_stencil;
-   GLboolean hw_stipple;
-   GLboolean depth_buffer_is_float;
-   GLboolean no_hw;
-   GLboolean no_rast;
-   GLboolean thrashing;
-   GLboolean locked;
-   GLboolean strict_conformance;
-   GLboolean need_flush;
-
-
-   
-   /* AGP memory buffer manager:
-    */
-   struct bufmgr *bm;
-
-
-   /* State for intelvb.c and inteltris.c.
-    */
-   GLenum render_primitive;
-   GLenum reduced_primitive;
-
-   struct intel_region *front_region;
-   struct intel_region *back_region;
-   struct intel_region *draw_region;
-   struct intel_region *depth_region;
-
-   /* These refer to the current draw (front vs. back) buffer:
-    */
-   int drawX;			/* origin of drawable in draw buffer */
-   int drawY;
-   GLuint numClipRects;		/* cliprects for that buffer */
-   drm_clip_rect_t *pClipRects;
-   struct gl_texture_object *frame_buffer_texobj;
-
-   GLboolean scissor;
-   drm_clip_rect_t draw_rect;
-   drm_clip_rect_t scissor_rect;
-
-   drm_context_t hHWContext;
-   drmLock *driHwLock;
-   int driFd;
-
-   __DRIdrawablePrivate *driDrawable;
-   __DRIscreenPrivate *driScreen;
-   intelScreenPrivate *intelScreen; 
-   volatile drmI830Sarea *sarea; 
-   
-   FILE *aub_file;
-
-   GLuint lastStamp;
-
-   /**
-    * Configuration cache
-    */
-   driOptionCache optionCache;
-
-   /* VBI
-    */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
-
-   int64_t swap_ust;
-   int64_t swap_missed_ust;
-
-   GLuint swap_count;
-   GLuint swap_missed_count;
-};
-
-/* These are functions now:
- */
-void LOCK_HARDWARE( struct intel_context *intel );
-void UNLOCK_HARDWARE( struct intel_context *intel );
-
-
-#define SUBPIXEL_X 0.125
-#define SUBPIXEL_Y 0.125
-
-/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
-  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
-  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
-    ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
-  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
-  ((a<<24) | (r<<16) | (g<<8) | b)
-
-
-#define INTEL_PACKCOLOR(format, r,  g,  b, a)		\
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) :	\
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) :	\
-  (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) :	\
-   0)))
-
-
-
-/* ================================================================
- * From linux kernel i386 header files, copes with odd sizes better
- * than COPY_DWORDS would:
- */
-#if defined(i386) || defined(__i386__)
-static inline void * __memcpy(void * to, const void * from, size_t n)
-{
-   int d0, d1, d2;
-   __asm__ __volatile__(
-      "rep ; movsl\n\t"
-      "testb $2,%b4\n\t"
-      "je 1f\n\t"
-      "movsw\n"
-      "1:\ttestb $1,%b4\n\t"
-      "je 2f\n\t"
-      "movsb\n"
-      "2:"
-      : "=&c" (d0), "=&D" (d1), "=&S" (d2)
-      :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
-      : "memory");
-   return (to);
-}
-#else
-#define __memcpy(a,b,c) memcpy(a,b,c)
-#endif
-
-
-/* The system memcpy (at least on ubuntu 5.10) has problems copying
- * to agp (writecombined) memory from a source which isn't 64-byte
- * aligned - there is a 4x performance falloff.
- *
- * The x86 __memcpy is immune to this but is slightly slower
- * (10%-ish) than the system memcpy.
- *
- * The sse_memcpy seems to have a slight cliff at 64/32 bytes, but
- * isn't much faster than x86_memcpy for agp copies.
- * 
- * TODO: switch dynamically.
- */
-static inline void *do_memcpy( void *dest, const void *src, size_t n )
-{
-   if ( (((unsigned long)src) & 63) ||
-	(((unsigned long)dest) & 63)) {
-      return  __memcpy(dest, src, n);	
-   }
-   else
-      return memcpy(dest, src, n);
-}
-
-
-
-
-
-/* ================================================================
- * Debugging:
- */
-extern int INTEL_DEBUG;
-
-#define DEBUG_TEXTURE	0x1
-#define DEBUG_STATE	0x2
-#define DEBUG_IOCTL	0x4
-#define DEBUG_PRIMS	0x8
-#define DEBUG_VERTS	0x10
-#define DEBUG_FALLBACKS	0x20
-#define DEBUG_VERBOSE	0x40
-#define DEBUG_DRI       0x80
-#define DEBUG_DMA       0x100
-#define DEBUG_SANITY    0x200
-#define DEBUG_SYNC      0x400
-#define DEBUG_SLEEP     0x800
-#define DEBUG_PIXEL     0x1000
-#define DEBUG_STATS     0x2000
-#define DEBUG_TILE      0x4000
-#define DEBUG_SINGLE_THREAD   0x8000
-#define DEBUG_WM        0x10000
-#define DEBUG_URB       0x20000
-#define DEBUG_VS        0x40000
-
-
-#define PCI_CHIP_845_G			0x2562
-#define PCI_CHIP_I830_M			0x3577
-#define PCI_CHIP_I855_GM		0x3582
-#define PCI_CHIP_I865_G			0x2572
-#define PCI_CHIP_I915_G			0x2582
-#define PCI_CHIP_I915_GM		0x2592
-#define PCI_CHIP_I945_G			0x2772
-#define PCI_CHIP_I965_G			0x29A2
-#define PCI_CHIP_I965_Q			0x2992
-#define PCI_CHIP_I965_G_1		0x2982
-#define PCI_CHIP_I946_GZ		0x2972
-#define PCI_CHIP_I965_GM                0x2A02
-#define PCI_CHIP_I965_GME               0x2A12
-
-
-/* ================================================================
- * intel_context.c:
- */
-
-extern GLboolean intelInitContext( struct intel_context *intel, 
-				   const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate,
-				   struct dd_function_table *functions );
-
-extern void intelGetLock(struct intel_context *intel, GLuint flags);
-
-extern void intelFinish( GLcontext *ctx );
-extern void intelFlush( GLcontext *ctx );
-
-extern void intelInitDriverFunctions( struct dd_function_table *functions );
-
-
-/* ================================================================
- * intel_state.c:
- */
-extern void intelInitStateFuncs( struct dd_function_table *functions );
-
-#define COMPAREFUNC_ALWAYS		0
-#define COMPAREFUNC_NEVER		0x1
-#define COMPAREFUNC_LESS		0x2
-#define COMPAREFUNC_EQUAL		0x3
-#define COMPAREFUNC_LEQUAL		0x4
-#define COMPAREFUNC_GREATER		0x5
-#define COMPAREFUNC_NOTEQUAL		0x6
-#define COMPAREFUNC_GEQUAL		0x7
-
-#define STENCILOP_KEEP			0
-#define STENCILOP_ZERO			0x1
-#define STENCILOP_REPLACE		0x2
-#define STENCILOP_INCRSAT		0x3
-#define STENCILOP_DECRSAT		0x4
-#define STENCILOP_INCR			0x5
-#define STENCILOP_DECR			0x6
-#define STENCILOP_INVERT		0x7
-
-#define LOGICOP_CLEAR			0
-#define LOGICOP_NOR			0x1
-#define LOGICOP_AND_INV 		0x2
-#define LOGICOP_COPY_INV		0x3
-#define LOGICOP_AND_RVRSE		0x4
-#define LOGICOP_INV			0x5
-#define LOGICOP_XOR			0x6
-#define LOGICOP_NAND			0x7
-#define LOGICOP_AND			0x8
-#define LOGICOP_EQUIV			0x9
-#define LOGICOP_NOOP			0xa
-#define LOGICOP_OR_INV			0xb
-#define LOGICOP_COPY			0xc
-#define LOGICOP_OR_RVRSE		0xd
-#define LOGICOP_OR			0xe
-#define LOGICOP_SET			0xf
-
-#define BLENDFACT_ZERO			0x01
-#define BLENDFACT_ONE			0x02
-#define BLENDFACT_SRC_COLR		0x03
-#define BLENDFACT_INV_SRC_COLR 		0x04
-#define BLENDFACT_SRC_ALPHA		0x05
-#define BLENDFACT_INV_SRC_ALPHA 	0x06
-#define BLENDFACT_DST_ALPHA		0x07
-#define BLENDFACT_INV_DST_ALPHA 	0x08
-#define BLENDFACT_DST_COLR		0x09
-#define BLENDFACT_INV_DST_COLR		0x0a
-#define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
-#define BLENDFACT_CONST_COLOR		0x0c
-#define BLENDFACT_INV_CONST_COLOR	0x0d
-#define BLENDFACT_CONST_ALPHA		0x0e
-#define BLENDFACT_INV_CONST_ALPHA	0x0f
-#define BLENDFACT_MASK          	0x0f
-
-
-extern int intel_translate_compare_func( GLenum func );
-extern int intel_translate_stencil_op( GLenum op );
-extern int intel_translate_blend_factor( GLenum factor );
-extern int intel_translate_logic_op( GLenum opcode );
-
-
-/* ================================================================
- * intel_buffers.c:
- */
-void intelInitBufferFuncs( struct dd_function_table *functions );
-
-struct intel_region *intel_readbuf_region( struct intel_context *intel );
-struct intel_region *intel_drawbuf_region( struct intel_context *intel );
-
-extern void intelWindowMoved( struct intel_context *intel );
-
-extern GLboolean intel_intersect_cliprects( drm_clip_rect_t *dest,
-					    const drm_clip_rect_t *a,
-					    const drm_clip_rect_t *b );
-
-
-/* ================================================================
- * intel_pixel_copy.c:
- */
-void intelCopyPixels(GLcontext * ctx,
-                     GLint srcx, GLint srcy,
-                     GLsizei width, GLsizei height,
-                     GLint destx, GLint desty, GLenum type);
-
-GLboolean intel_check_blit_fragment_ops(GLcontext * ctx);
-
-void intelBitmap(GLcontext * ctx,
-		 GLint x, GLint y,
-		 GLsizei width, GLsizei height,
-		 const struct gl_pixelstore_attrib *unpack,
-		 const GLubyte * pixels);
-
-void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging);
-#define _NEW_WINDOW_POS 0x40000000
-
-
-/*======================================================================
- * Inline conversion functions.  
- * These are better-typed than the macros used previously:
- */
-static inline struct intel_context *intel_context( GLcontext *ctx )
-{
-   return (struct intel_context *)ctx;
-}
-
-static inline struct intel_texture_object *intel_texture_object( struct gl_texture_object *obj )
-{
-   return (struct intel_texture_object *)obj;
-}
-
-static inline struct intel_texture_image *intel_texture_image( struct gl_texture_image *img )
-{
-   return (struct intel_texture_image *)img;
-}
-
-#endif
-
diff --git a/src/mesa/drivers/dri/i965/intel_decode.c b/src/mesa/drivers/dri/i965/intel_decode.c
new file mode 120000
index 00000000000..f671b6cbb13
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_decode.c
@@ -0,0 +1 @@
+../intel/intel_decode.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_depthstencil.c b/src/mesa/drivers/dri/i965/intel_depthstencil.c
new file mode 120000
index 00000000000..4ac4ae690a3
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_depthstencil.c
@@ -0,0 +1 @@
+../intel/intel_depthstencil.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
new file mode 120000
index 00000000000..a19f86dcc57
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -0,0 +1 @@
+../intel/intel_fbo.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_ioctl.c b/src/mesa/drivers/dri/i965/intel_ioctl.c
deleted file mode 100644
index 0a8e976f706..00000000000
--- a/src/mesa/drivers/dri/i965/intel_ioctl.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#include <stdio.h>
-#include <unistd.h>
-#include <errno.h>
-#include <sched.h>
-
-#include "mtypes.h"
-#include "context.h"
-#include "swrast/swrast.h"
-
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-#include "drm.h"
-#include "bufmgr.h"
-
-static int intelWaitIdleLocked( struct intel_context *intel )
-{
-   static int in_wait_idle = 0;
-   unsigned int fence;
-
-   if (!in_wait_idle) {
-      if (INTEL_DEBUG & DEBUG_SYNC) {
-	 fprintf(stderr, "waiting for idle\n");
-      }
-
-      in_wait_idle = 1;
-      fence = bmSetFence(intel);
-      intelWaitIrq(intel, fence);
-      in_wait_idle = 0;
-
-      return bmTestFence(intel, fence);
-   } else {
-      return 1;
-   }
-}
-
-int intelEmitIrqLocked( struct intel_context *intel )
-{
-   int seq = 1;
-
-   if (!intel->no_hw) {
-      drmI830IrqEmit ie;
-      int ret;
-      
-      assert(((*(int *)intel->driHwLock) & ~DRM_LOCK_CONT) == 
-	     (DRM_LOCK_HELD|intel->hHWContext));
-
-      ie.irq_seq = &seq;
-
-      ret = drmCommandWriteRead( intel->driFd, DRM_I830_IRQ_EMIT, 
-				 &ie, sizeof(ie) );
-      if ( ret ) {
-	 fprintf( stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret );
-	 exit(1);
-      }   
-
-      if (0)
-	 fprintf(stderr, "%s -->  %d\n", __FUNCTION__, seq );
-   }
-
-   return seq;
-}
-
-void intelWaitIrq( struct intel_context *intel, int seq )
-{
-   if (!intel->no_hw) {
-      drmI830IrqWait iw;
-      int ret, lastdispatch;
-      
-      if (0)
-	 fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
-
-      iw.irq_seq = seq;
-	
-      do {
-	 lastdispatch = intel->sarea->last_dispatch;
-	 ret = drmCommandWrite( intel->driFd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
-
-	 /* This seems quite often to return before it should!?! 
-	  */
-      } while (ret == -EAGAIN || ret == -EINTR || (ret == -EBUSY && lastdispatch != intel->sarea->last_dispatch) || (ret == 0 && seq > intel->sarea->last_dispatch)
-	       || (ret == 0 && intel->sarea->last_dispatch - seq >= (1 << 24)));
-      
-
-      if ( ret ) {
-	 fprintf( stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret );
-
-	 if (intel->aub_file) {
-	    intel->vtbl.aub_dump_bmp( intel, intel->ctx.Visual.doubleBufferMode ? 1 : 0 );
-	 }
-
-	 exit(1);
-      }
-   }
-}
-
-
-void intel_batch_ioctl( struct intel_context *intel, 
-			GLuint start_offset,
-			GLuint used)
-{
-   drmI830BatchBuffer batch;
-
-   assert(intel->locked);
-   assert(used);
-
-   if (0)
-      fprintf(stderr, "%s used %d offset %x..%x\n",
-	      __FUNCTION__, 
-	      used, 
-	      start_offset,
-	      start_offset + used);
-
-   batch.start = start_offset;
-   batch.used = used;
-   batch.cliprects = NULL;
-   batch.num_cliprects = 0;
-   batch.DR1 = 0;
-   batch.DR4 = 0;
-      
-   if (INTEL_DEBUG & DEBUG_DMA)
-      fprintf(stderr, "%s: 0x%x..0x%x\n",
-	      __FUNCTION__, 
-	      batch.start, 
-	      batch.start + batch.used * 4);
-
-   if (!intel->no_hw) {
-      if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch, 
-			   sizeof(batch))) {
-	 fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n",  -errno);
-	 UNLOCK_HARDWARE(intel);
-	 exit(1);
-      }
-
-      if (INTEL_DEBUG & DEBUG_SYNC) {
-	intelWaitIdleLocked(intel);
-      }
-   }
-}
-
-void intel_cmd_ioctl( struct intel_context *intel, 
-		      char *buf,
-		      GLuint used)
-{
-   drmI830CmdBuffer cmd;
-
-   assert(intel->locked);
-   assert(used);
-
-   cmd.buf = buf;
-   cmd.sz = used;
-   cmd.cliprects = intel->pClipRects;
-   cmd.num_cliprects = 0;
-   cmd.DR1 = 0;
-   cmd.DR4 = 0;
-      
-   if (INTEL_DEBUG & DEBUG_DMA)
-      fprintf(stderr, "%s: 0x%x..0x%x\n",
-	      __FUNCTION__, 
-	      0, 
-	      0 + cmd.sz);
-
-   if (!intel->no_hw) {
-      if (drmCommandWrite (intel->driFd, DRM_I830_CMDBUFFER, &cmd, 
-			   sizeof(cmd))) {
-	 fprintf(stderr, "DRM_I830_CMDBUFFER: %d\n",  -errno);
-	 UNLOCK_HARDWARE(intel);
-	 exit(1);
-      }
-
-      if (INTEL_DEBUG & DEBUG_SYNC) {
-	intelWaitIdleLocked(intel);
-      }
-   }
-}
diff --git a/src/mesa/drivers/dri/i965/intel_ioctl.h b/src/mesa/drivers/dri/i965/intel_ioctl.h
deleted file mode 100644
index df276593626..00000000000
--- a/src/mesa/drivers/dri/i965/intel_ioctl.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_IOCTL_H
-#define INTEL_IOCTL_H
-
-#include "intel_context.h"
-
-void intelWaitIrq( struct intel_context *intel, int seq );
-int intelEmitIrqLocked( struct intel_context *intel );
-
-void intel_batch_ioctl( struct intel_context *intel, 
-			GLuint start_offset,
-			GLuint used);
-
-void intel_cmd_ioctl( struct intel_context *intel, 
-		      char *buf,
-		      GLuint used);
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 8486086b274..242fed0b6ae 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1,247 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "intel_context.h"
-#include "intel_mipmap_tree.h"
-#include "intel_regions.h"
-#include "bufmgr.h"
-#include "enums.h"
-#include "imports.h"
-
-static GLenum target_to_target( GLenum target )
-{
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
-      return GL_TEXTURE_CUBE_MAP_ARB;
-   default:
-      return target;
-   }
-}
-
-struct intel_mipmap_tree *intel_miptree_create( struct intel_context *intel,
-						GLenum target,
-						GLenum internal_format,
-						GLuint first_level,
-						GLuint last_level,
-						GLuint width0,
-						GLuint height0,
-						GLuint depth0,
-						GLuint cpp,
-						GLboolean compressed)
-{
-   GLboolean ok;
-   struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
-
-   if (INTEL_DEBUG & DEBUG_TEXTURE)
-      _mesa_printf("%s target %s format %s level %d..%d\n", __FUNCTION__,
-		   _mesa_lookup_enum_by_nr(target),
-		   _mesa_lookup_enum_by_nr(internal_format),
-		   first_level,
-		   last_level);
-
-   mt->target = target_to_target(target);
-   mt->internal_format = internal_format;
-   mt->first_level = first_level;
-   mt->last_level = last_level;
-   mt->width0 = width0;
-   mt->height0 = height0;
-   mt->depth0 = depth0;
-   mt->cpp = compressed ? 2 : cpp;
-   mt->compressed = compressed;
-
-   switch (intel->intelScreen->deviceID) {
-#if 0
-   case PCI_CHIP_I945_G:
-      ok = i945_miptree_layout( mt );
-      break;
-   case PCI_CHIP_I915_G:
-   case PCI_CHIP_I915_GM:
-      ok = i915_miptree_layout( mt );
-      break;
-#endif
-   default:
-      if (INTEL_DEBUG & DEBUG_TEXTURE)
-	 _mesa_printf("assuming BRW texture layouts\n");
-      ok = brw_miptree_layout( mt );
-      break;
-   }
-
-   if (ok)
-      mt->region = intel_region_alloc( intel, 
-				       mt->cpp,
-				       mt->pitch, 
-				       mt->total_height );
-
-   if (!mt->region) {
-      free(mt);
-      return NULL;
-   }
-
-   return mt;
-}
-
-
-
-void intel_miptree_destroy( struct intel_context *intel,
-			    struct intel_mipmap_tree *mt )
-{
-   if (mt) {
-      GLuint i;
-
-      intel_region_release(intel, &(mt->region));
-
-      for (i = 0; i < MAX_TEXTURE_LEVELS; i++)
-	 if (mt->level[i].image_offset)
-	    free(mt->level[i].image_offset);
-
-      free(mt);
-   }
-}
-
-
-
-
-void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
-				  GLuint level,
-				  GLuint nr_images,
-				  GLuint x, GLuint y,
-				  GLuint w, GLuint h, GLuint d)
-{
-   mt->level[level].width = w;
-   mt->level[level].height = h;
-   mt->level[level].depth = d;
-   mt->level[level].level_offset = (x + y * mt->pitch) * mt->cpp;
-   mt->level[level].nr_images = nr_images;
-
-   if (INTEL_DEBUG & DEBUG_TEXTURE)
-      _mesa_printf("%s level %d img size: %d,%d level_offset 0x%x\n", __FUNCTION__, level, w, h, 
-		   mt->level[level].level_offset);
-
-   /* Not sure when this would happen, but anyway: 
-    */
-   if (mt->level[level].image_offset) {
-      free(mt->level[level].image_offset);
-      mt->level[level].image_offset = NULL;
-   }
-
-   if (nr_images > 1) {
-      mt->level[level].image_offset = malloc(nr_images * sizeof(GLuint));
-      mt->level[level].image_offset[0] = 0;
-   }
-}
-
-
-
-void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
-				    GLuint level,
-				    GLuint img,
-				    GLuint x, GLuint y)
-{
-   if (INTEL_DEBUG & DEBUG_TEXTURE)
-      _mesa_printf("%s level %d img %d pos %d,%d\n", __FUNCTION__, level, img, x, y);
-
-   if (img == 0)
-      assert(x == 0 && y == 0);
-
-   if (img > 0)
-      mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp;
-}
-
-
-/* Although we use the image_offset[] array to store relative offsets
- * to cube faces, Mesa doesn't know anything about this and expects
- * each cube face to be treated as a separate image.
- *
- * These functions present that view to mesa:
- */
-const GLuint *intel_miptree_depth_offsets(struct intel_mipmap_tree *mt,
-					  GLuint level)
-{
-   static const GLuint zero = 0;
-
-   if (mt->target != GL_TEXTURE_3D ||
-       mt->level[level].nr_images == 1)
-      return &zero;
-   else
-      return mt->level[level].image_offset;
-}
-
-
-GLuint intel_miptree_image_offset(struct intel_mipmap_tree *mt,
-				  GLuint face,
-				  GLuint level)
-{
-   if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
-      return (mt->level[level].level_offset +
-	      mt->level[level].image_offset[face]);
-   else
-      return mt->level[level].level_offset;
-}
-
-
-
-
-
-
-/* Upload data for a particular image.
- */
-GLboolean intel_miptree_image_data(struct intel_context *intel, 
-				   struct intel_mipmap_tree *dst,
-				   GLuint face,
-				   GLuint level,
-				   const void *src, 
-				   GLuint src_row_pitch,
-				   GLuint src_image_pitch)
-{
-   GLuint depth = dst->level[level].depth;
-   GLuint dst_offset = intel_miptree_image_offset(dst, face, level);
-   const GLuint *dst_depth_offset = intel_miptree_depth_offsets(dst, level);
-   GLuint i;
-
-   DBG("%s\n", __FUNCTION__);
-   for (i = 0; i < depth; i++) {
-      if (!intel_region_data(intel,
-			     dst->region, 
-			     dst_offset + dst_depth_offset[i],
-			     0,
-			     0,
-			     src,
-			     src_row_pitch,
-			     0, 0,	/* source x,y */
-			     dst->level[level].width,
-			     dst->level[level].height))
-	 return GL_FALSE;
-      src += src_image_pitch;
-   }
-   return GL_TRUE;
-}
-
+../intel/intel_mipmap_tree.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
deleted file mode 100644
index dbd7167b778..00000000000
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_MIPMAP_TREE_H
-#define INTEL_MIPMAP_TREE_H
-
-#include "intel_regions.h"
-
-/* A layer on top of the intel_regions code which adds:
- *
- * - Code to size and layout a region to hold a set of mipmaps.
- * - Query to determine if a new image fits in an existing tree.
- *
- * The fixed mipmap layout of intel hardware where one offset
- * specifies the position of all images in a mipmap hierachy
- * complicates the implementation of GL texture image commands,
- * compared to hardware where each image is specified with an
- * independent offset.
- *
- * In an ideal world, each texture object would be associated with a
- * single bufmgr buffer or 2d intel_region, and all the images within
- * the texture object would slot into the tree as they arrive.  The
- * reality can be a little messier, as images can arrive from the user
- * with sizes that don't fit in the existing tree, or in an order
- * where the tree layout cannot be guessed immediately.  
- * 
- * This structure encodes an idealized mipmap tree.  The GL image
- * commands build these where possible, otherwise store the images in
- * temporary system buffers.
- */
-
-
-struct intel_mipmap_level {
-   GLuint level_offset;
-   GLuint width;
-   GLuint height;
-   GLuint depth;
-   GLuint nr_images;
-
-   /* Explicitly store the offset of each image for each cube face or
-    * depth value.  Pretty much have to accept that hardware formats
-    * are going to be so diverse that there is no unified way to
-    * compute the offsets of depth/cube images within a mipmap level,
-    * so have to store them as a lookup table:
-    */
-   GLuint *image_offset;
-};
-
-struct intel_mipmap_tree {
-   /* Effectively the key:
-    */
-   GLenum target;
-   GLenum internal_format;
-
-   GLuint first_level;
-   GLuint last_level;
-
-   GLuint width0, height0, depth0;
-   GLuint cpp;
-   GLboolean compressed;
-
-   /* Derived from the above:
-    */   
-   GLuint pitch;
-   GLuint depth_pitch;		/* per-image on i945? */
-   GLuint total_height;
-   
-   /* Includes image offset tables:
-    */
-   struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
-
-   /* The data is held here:
-    */
-   struct intel_region *region;
-
-   /* These are also refcounted:
-    */
-   GLuint refcount;
-};
-
-
-
-struct intel_mipmap_tree *intel_miptree_create( struct intel_context *intel,
-						GLenum target,
-						GLenum internal_format,
-						GLuint first_level,
-						GLuint last_level,
-						GLuint width0,
-						GLuint height0,
-						GLuint depth0,
-						GLuint cpp,
-						GLboolean compressed);
-
-void intel_miptree_destroy( struct intel_context *intel,
-			    struct intel_mipmap_tree *mt );
-
-
-/* Return the linear offset of an image relative to the start of the
- * tree:
- */
-GLuint intel_miptree_image_offset( struct intel_mipmap_tree *mt,
-				   GLuint face,
-				   GLuint level );
-
-/* Return pointers to each 2d slice within an image.  Indexed by depth
- * value.
- */
-const GLuint *intel_miptree_depth_offsets(struct intel_mipmap_tree *mt,
-					  GLuint level);
-
-
-void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
-				  GLuint level,
-				  GLuint nr_images,
-				  GLuint x, GLuint y,
-				  GLuint w, GLuint h, GLuint d);
-
-void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
-				    GLuint level,
-				    GLuint img,
-				    GLuint x, GLuint y);
-
-
-/* Upload an image into a tree
- */
-GLboolean intel_miptree_image_data(struct intel_context *intel, 
-				   struct intel_mipmap_tree *dst,
-				   GLuint face,
-				   GLuint level,
-				   const void *src, 
-				   GLuint src_row_pitch,
-				   GLuint src_image_pitch);
-
-/* i915_mipmap_tree.c:
- */
-GLboolean i915_miptree_layout( struct intel_mipmap_tree *mt );
-GLboolean i945_miptree_layout( struct intel_mipmap_tree *mt );
-GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt );
-
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/intel_pixel.c b/src/mesa/drivers/dri/i965/intel_pixel.c
new file mode 120000
index 00000000000..d733c5e8745
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_pixel.c
@@ -0,0 +1 @@
+../intel/intel_pixel.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
index 421fcc5e511..9085c7b0397 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
@@ -1,353 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portionsalloc
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "enums.h"
-#include "image.h"
-#include "colormac.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "bufferobj.h"
-#include "swrast/swrast.h"
-
-#include "intel_screen.h"
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-#include "intel_buffer_objects.h"
-
-
-
-#define FILE_DEBUG_FLAG DEBUG_PIXEL
-
-
-/* Unlike the other intel_pixel_* functions, the expectation here is
- * that the incoming data is not in a PBO.  With the XY_TEXT blit
- * method, there's no benefit haveing it in a PBO, but we could
- * implement a path based on XY_MONO_SRC_COPY_BLIT which might benefit
- * PBO bitmaps.  I think they are probably pretty rare though - I
- * wonder if Xgl uses them?
- */
-static const GLubyte *map_pbo( GLcontext *ctx,
-			       GLsizei width, GLsizei height,
-			       const struct gl_pixelstore_attrib *unpack,
-			       const GLubyte *bitmap )
-{
-   GLubyte *buf;
-
-   if (!_mesa_validate_pbo_access(2, unpack, width, height, 1,
-				  GL_COLOR_INDEX, GL_BITMAP,
-				  (GLvoid *) bitmap)) {
-      _mesa_error(ctx, GL_INVALID_OPERATION,"glBitmap(invalid PBO access)");
-      return NULL;
-   }
-
-   buf = (GLubyte *) ctx->Driver.MapBuffer(ctx, GL_PIXEL_UNPACK_BUFFER_EXT,
-					   GL_READ_ONLY_ARB,
-					   unpack->BufferObj);
-   if (!buf) {
-      _mesa_error(ctx, GL_INVALID_OPERATION, "glBitmap(PBO is mapped)");
-      return NULL;
-   }
-
-   return ADD_POINTERS(buf, bitmap);
-}
-
-static GLboolean test_bit( const GLubyte *src,
-			    GLuint bit )
-{
-   return (src[bit/8] & (1<<(bit % 8))) ? 1 : 0;
-}
-
-static void set_bit( GLubyte *dest,
-			  GLuint bit )
-{
-   dest[bit/8] |= 1 << (bit % 8);
-}
-
-static int align(int x, int align)
-{
-   return (x + align - 1) & ~(align - 1);
-}
-
-/* Extract a rectangle's worth of data from the bitmap.  Called
- * per-cliprect.
- */
-static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
-			      const struct gl_pixelstore_attrib *unpack,
-			      const GLubyte *bitmap,
-			      GLuint x, GLuint y, 
-			      GLuint w, GLuint h,
-			      GLubyte *dest,
-			      GLuint row_align,
-			      GLboolean invert)
-{
-   GLuint src_offset = (x + unpack->SkipPixels) & 0x7;
-   GLuint mask = unpack->LsbFirst ? 0 : 7;
-   GLuint bit = 0;
-   GLint row, col;
-   GLint first, last;
-   GLint incr;
-   GLuint count = 0;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      _mesa_printf("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n",
-		   __FUNCTION__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask);
-
-   if (invert) {
-      first = h-1;
-      last = 0;
-      incr = -1;
-   }
-   else {
-      first = 0;
-      last = h-1;
-      incr = 1;
-   }
-
-   /* Require that dest be pre-zero'd.
-    */
-   for (row = first; row != (last+incr); row += incr) {
-      const GLubyte *rowsrc = _mesa_image_address2d(unpack, bitmap, 
-						    width, height, 
-						    GL_COLOR_INDEX, GL_BITMAP, 
-						    y + row, x);
-
-      for (col = 0; col < w; col++, bit++) {
-	 if (test_bit(rowsrc, (col + src_offset) ^ mask)) {
-	    set_bit(dest, bit ^ 7);
-	    count++;
-	 }
-      }
-
-      if (row_align)
-	 bit = (bit + row_align - 1) & ~(row_align - 1);
-   }
-
-   return count;
-}
-
-
-
-
-/*
- * Render a bitmap.
- */
-static GLboolean
-do_blit_bitmap( GLcontext *ctx, 
-		GLint dstx, GLint dsty,
-		GLsizei width, GLsizei height,
-		const struct gl_pixelstore_attrib *unpack,
-		const GLubyte *bitmap )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_region *dst = intel_drawbuf_region(intel);
-   
-   union {
-      GLuint ui;
-      GLubyte ub[4];
-   } color;
-
-
-   if (unpack->BufferObj->Name) {
-      bitmap = map_pbo(ctx, width, height, unpack, bitmap);
-      if (bitmap == NULL)
-	 return GL_TRUE;	/* even though this is an error, we're done */
-   }
-
-   UNCLAMPED_FLOAT_TO_CHAN(color.ub[0], ctx->Current.RasterColor[2]);
-   UNCLAMPED_FLOAT_TO_CHAN(color.ub[1], ctx->Current.RasterColor[1]);
-   UNCLAMPED_FLOAT_TO_CHAN(color.ub[2], ctx->Current.RasterColor[0]);
-   UNCLAMPED_FLOAT_TO_CHAN(color.ub[3], ctx->Current.RasterColor[3]);
-
-   /* Does zoom apply to bitmaps?
-    */
-   if (!intel_check_blit_fragment_ops(ctx) ||
-       ctx->Pixel.ZoomX != 1.0F || 
-       ctx->Pixel.ZoomY != 1.0F)
-      return GL_FALSE;
-
-   LOCK_HARDWARE(intel);
-
-   if (intel->driDrawable->numClipRects) {
-      __DRIdrawablePrivate *dPriv = intel->driDrawable;
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      drm_clip_rect_t dest_rect;
-      GLint nbox = dPriv->numClipRects;
-      GLint srcx = 0, srcy = 0;
-      GLint orig_screen_x1, orig_screen_y2;
-      GLuint i;
-
-
-      orig_screen_x1 = dPriv->x + dstx;
-      orig_screen_y2 = dPriv->y + (dPriv->h - dsty);
-
-      /* Do scissoring in GL coordinates:
-       */
-      if (ctx->Scissor.Enabled)
-      {
-	 GLint x = ctx->Scissor.X;
-	 GLint y = ctx->Scissor.Y;
-	 GLuint w = ctx->Scissor.Width;
-	 GLuint h = ctx->Scissor.Height;
-
-         if (!_mesa_clip_to_region(x, y, x+w-1, y+h-1, &dstx, &dsty, &width, &height))
-            goto out;
-      }
-
-      /* Convert from GL to hardware coordinates:
-       */
-      dsty = dPriv->y + (dPriv->h - dsty - height);  
-      dstx = dPriv->x + dstx;
-
-      dest_rect.x1 = dstx;
-      dest_rect.y1 = dsty;
-      dest_rect.x2 = dstx + width;
-      dest_rect.y2 = dsty + height;
-
-      for (i = 0; i < nbox; i++) {
-         drm_clip_rect_t rect;
-	 int box_w, box_h;
-	 GLint px, py;
-	 GLuint stipple[32];  
-
-         if (!intel_intersect_cliprects(&rect, &dest_rect, &box[i]))
-            continue;
-
-	 /* Now go back to GL coordinates to figure out what subset of
-	  * the bitmap we are uploading for this cliprect:
-	  */
-	 box_w = rect.x2 - rect.x1;
-	 box_h = rect.y2 - rect.y1;
-	 srcx = rect.x1 - orig_screen_x1;
-	 srcy = orig_screen_y2 - rect.y2;
-
-
-#define DY 32
-#define DX 32
-
-	 /* Then, finally, chop it all into chunks that can be
-	  * digested by hardware:
-	  */
-	 for (py = 0; py < box_h; py += DY) { 
-	    for (px = 0; px < box_w; px += DX) { 
-	       int h = MIN2(DY, box_h - py);
-	       int w = MIN2(DX, box_w - px); 
-	       GLuint sz = align(align(w,8) * h, 64)/8;
-	       GLenum logic_op = ctx->Color.ColorLogicOpEnabled ?
-		  ctx->Color.LogicOp : GL_COPY;
-
-	       assert(sz <= sizeof(stipple));
-	       memset(stipple, 0, sz);
-
-	       /* May need to adjust this when padding has been introduced in
-		* sz above:
-		*/
-	       if (get_bitmap_rect(width, height, unpack, 
-				   bitmap,
-				   srcx + px, srcy + py, w, h,
-				   (GLubyte *)stipple,
-				   8,
-				   GL_TRUE) == 0)
-		  continue;
-
-	       /* 
-		*/
-	       intelEmitImmediateColorExpandBlit( intel,
-						  dst->cpp,
-						  (GLubyte *)stipple, 
-						  sz,
-						  color.ui,
-						  dst->pitch,
-						  dst->buffer,
-						  0,
-						  dst->tiled,
-						  rect.x1 + px,
-						  rect.y2 - (py + h),
-						  w, h,
-						  logic_op);
-	    } 
-	 } 
-      }
-      intel->need_flush = GL_TRUE;
-   out:
-      intel_batchbuffer_flush(intel->batch);
-   }
-   UNLOCK_HARDWARE(intel);
-
-
-   if (unpack->BufferObj->Name) {
-      /* done with PBO so unmap it now */
-      ctx->Driver.UnmapBuffer(ctx, GL_PIXEL_UNPACK_BUFFER_EXT,
-                              unpack->BufferObj);
-   }
-
-   return GL_TRUE;
-}
-
-
-
-
-
-/* There are a large number of possible ways to implement bitmap on
- * this hardware, most of them have some sort of drawback.  Here are a
- * few that spring to mind:
- * 
- * Blit:
- *    - XY_MONO_SRC_BLT_CMD
- *         - use XY_SETUP_CLIP_BLT for cliprect clipping.
- *    - XY_TEXT_BLT
- *    - XY_TEXT_IMMEDIATE_BLT
- *         - blit per cliprect, subject to maximum immediate data size.
- *    - XY_COLOR_BLT 
- *         - per pixel or run of pixels
- *    - XY_PIXEL_BLT
- *         - good for sparse bitmaps
- *
- * 3D engine:
- *    - Point per pixel
- *    - Translate bitmap to an alpha texture and render as a quad
- *    - Chop bitmap up into 32x32 squares and render w/polygon stipple.
- */
-void
-intelBitmap(GLcontext * ctx,
-	    GLint x, GLint y,
-	    GLsizei width, GLsizei height,
-	    const struct gl_pixelstore_attrib *unpack,
-	    const GLubyte * pixels)
-{
-   if (do_blit_bitmap(ctx, x, y, width, height,
-                          unpack, pixels))
-      return;
-
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      _mesa_printf("%s: fallback to swrast\n", __FUNCTION__);
-
-   _swrast_Bitmap(ctx, x, y, width, height, unpack, pixels);
-}
+../intel/intel_pixel_bitmap.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c
index 58dc49505fe..ee433605904 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c
@@ -1,343 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "enums.h"
-#include "image.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "state.h"
-#include "swrast/swrast.h"
-
-#include "intel_screen.h"
-#include "intel_context.h"
-#include "intel_ioctl.h"
-#include "intel_batchbuffer.h"
-#include "intel_blit.h"
-#include "intel_regions.h"
-
-
-static struct intel_region *
-copypix_src_region(struct intel_context *intel, GLenum type)
-{
-   switch (type) {
-   case GL_COLOR:
-      return intel_readbuf_region(intel);
-   case GL_DEPTH:
-      /* Don't think this is really possible execpt at 16bpp, when we have no stencil.
-       */
-      if (intel->depth_region && intel->depth_region->cpp == 2)
-         return intel->depth_region;
-   case GL_STENCIL:
-      /* Don't think this is really possible. 
-       */
-      break;
-   case GL_DEPTH_STENCIL_EXT:
-      /* Does it matter whether it is stencil/depth or depth/stencil?
-       */
-      return intel->depth_region;
-   default:
-      break;
-   }
-
-   return NULL;
-}
-
-
-
-
-/**
- * Check if any fragment operations are in effect which might effect
- * glDraw/CopyPixels.
- */
-GLboolean
-intel_check_blit_fragment_ops(GLcontext * ctx)
-{
-   if (ctx->NewState)
-      _mesa_update_state(ctx);
-
-   return !(ctx->_ImageTransferState ||
-	    ctx->RenderMode != GL_RENDER ||
-            ctx->Color.AlphaEnabled ||
-            ctx->Depth.Test ||
-            ctx->Fog.Enabled ||
-            ctx->Stencil.Enabled ||
-            !ctx->Color.ColorMask[0] ||
-            !ctx->Color.ColorMask[1] ||
-            !ctx->Color.ColorMask[2] ||
-            !ctx->Color.ColorMask[3] ||	/* can do this! */
-            ctx->Texture._EnabledUnits ||
-	    ctx->FragmentProgram._Enabled ||
-	    ctx->Color.BlendEnabled);
-}
-
-/* Doesn't work for overlapping regions.  Could do a double copy or
- * just fallback.
- */
-static GLboolean
-do_texture_copypixels(GLcontext * ctx,
-                      GLint srcx, GLint srcy,
-                      GLsizei width, GLsizei height,
-                      GLint dstx, GLint dsty, GLenum type)
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_region *dst = intel_drawbuf_region(intel);
-   struct intel_region *src = copypix_src_region(intel, type);
-   GLenum src_format;
-   GLenum src_type;
-
-   DBG("%s %d,%d %dx%d --> %d,%d\n", __FUNCTION__, 
-       srcx, srcy, width, height, dstx, dsty);
-
-   if (!src || !dst || type != GL_COLOR ||
-       ctx->_ImageTransferState ||
-       ctx->Pixel.ZoomX != 1.0F || ctx->Pixel.ZoomY != 1.0F ||
-       ctx->RenderMode != GL_RENDER ||
-       ctx->Texture._EnabledUnits ||
-       ctx->FragmentProgram._Enabled ||
-       src != dst )
-       return GL_FALSE;
-   
-   /* Can't handle overlapping regions.  Don't have sufficient control
-    * over rasterization to pull it off in-place.  Punt on these for
-    * now.
-    * 
-    * XXX: do a copy to a temporary. 
-    */
-   if (src->buffer == dst->buffer) {
-      drm_clip_rect_t srcbox;
-      drm_clip_rect_t dstbox;
-      drm_clip_rect_t tmp;
-
-      srcbox.x1 = srcx;
-      srcbox.y1 = srcy;
-      srcbox.x2 = srcx + width - 1;
-      srcbox.y2 = srcy + height - 1;
-
-      dstbox.x1 = dstx;
-      dstbox.y1 = dsty;
-      dstbox.x2 = dstx + width - 1;
-      dstbox.y2 = dsty + height - 1;
-
-      DBG("src %d,%d %d,%d\n", srcbox.x1, srcbox.y1, srcbox.x2, srcbox.y2);
-      DBG("dst %d,%d %d,%d (%dx%d) (%f,%f)\n", dstbox.x1, dstbox.y1, dstbox.x2, dstbox.y2,
-	  width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY);
-
-      if (intel_intersect_cliprects(&tmp, &srcbox, &dstbox)) {
-         DBG("%s: regions overlap\n", __FUNCTION__);
-         return GL_FALSE;
-      }
-   }
-
-   intelFlush(&intel->ctx);
-
-   intel->vtbl.install_meta_state(intel);
-
-   /* Is this true?  Also will need to turn depth testing on according
-    * to state:
-    */
-   intel->vtbl.meta_no_stencil_write(intel);
-   intel->vtbl.meta_no_depth_write(intel);
-
-   /* Set the 3d engine to draw into the destination region:
-    */
-   intel->vtbl.meta_draw_region(intel, dst, intel->depth_region);
-
-   intel->vtbl.meta_import_pixel_state(intel);
-
-   if (src->cpp == 2) {
-      src_format = GL_RGB;
-      src_type = GL_UNSIGNED_SHORT_5_6_5;
-   }
-   else {
-      src_format = GL_BGRA;
-      src_type = GL_UNSIGNED_BYTE;
-   }
-
-   /* Set the frontbuffer up as a large rectangular texture.
-    */
-   intel->vtbl.meta_frame_buffer_texture( intel, srcx - dstx, srcy - dsty );
-
-   intel->vtbl.meta_texture_blend_replace(intel);
-   
-   if (intel->driDrawable->numClipRects)
-      intel->vtbl.meta_draw_quad( intel,
-				  dstx, dstx + width,
-				  dsty, dsty + height,
-				  ctx->Current.RasterPos[ 2 ],
-				  0, 0, 0, 0, 0.0, 0.0, 0.0, 0.0 );
-   
-   intel->vtbl.leave_meta_state( intel );
-   
-   DBG("%s: success\n", __FUNCTION__);
-   return GL_TRUE;
-}
-
-/**
- * CopyPixels with the blitter.  Don't support zooming, pixel transfer, etc.
- */
-static GLboolean
-do_blit_copypixels(GLcontext * ctx,
-                   GLint srcx, GLint srcy,
-                   GLsizei width, GLsizei height,
-                   GLint dstx, GLint dsty, GLenum type)
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_region *dst = intel_drawbuf_region(intel);
-   struct intel_region *src = copypix_src_region(intel, type);
-
-   /* Copypixels can be more than a straight copy.  Ensure all the
-    * extra operations are disabled:
-    */
-   if (!intel_check_blit_fragment_ops(ctx) ||
-       ctx->Pixel.ZoomX != 1.0F || ctx->Pixel.ZoomY != 1.0F)
-      return GL_FALSE;
-
-   if (!src || !dst)
-      return GL_FALSE;
-
-
-
-   intelFlush(&intel->ctx);
-
-/*    intel->vtbl.render_start(intel); */
-/*    intel->vtbl.emit_state(intel); */
-
-   LOCK_HARDWARE(intel);
-
-   if (intel->driDrawable->numClipRects) {
-      __DRIdrawablePrivate *dPriv = intel->driDrawable;
-      drm_clip_rect_t *box = dPriv->pClipRects;
-      drm_clip_rect_t dest_rect;
-      GLint nbox = dPriv->numClipRects;
-      GLint delta_x = 0;
-      GLint delta_y = 0;
-      GLuint i;
-
-      /* Do scissoring in GL coordinates:
-       */
-      if (ctx->Scissor.Enabled)
-      {
-	 GLint x = ctx->Scissor.X;
-	 GLint y = ctx->Scissor.Y;
-	 GLuint w = ctx->Scissor.Width;
-	 GLuint h = ctx->Scissor.Height;
-	 GLint dx = dstx - srcx;
-         GLint dy = dsty - srcy;
-
-         if (!_mesa_clip_to_region(x, y, x+w-1, y+h-1, &dstx, &dsty, &width, &height))
-            goto out;
-	 
-         srcx = dstx - dx;
-         srcy = dsty - dy;
-      }
-
-      /* Convert from GL to hardware coordinates:
-       */
-      dsty = dPriv->h - dsty - height;  
-      srcy = dPriv->h - srcy - height;  
-      dstx += dPriv->x;
-      dsty += dPriv->y;
-      srcx += dPriv->x;
-      srcy += dPriv->y;
-
-      /* Clip against the source region.  This is the only source
-       * clipping we do.  Dst is clipped with cliprects below.
-       */
-      {
-         delta_x = srcx - dstx;
-         delta_y = srcy - dsty;
-
-         if (!_mesa_clip_to_region(0, 0, src->pitch, src->height,
-                                   &srcx, &srcy, &width, &height))
-            goto out;
-
-         dstx = srcx - delta_x;
-         dsty = srcy - delta_y;
-      }
-
-      dest_rect.x1 = dstx;
-      dest_rect.y1 = dsty;
-      dest_rect.x2 = dstx + width;
-      dest_rect.y2 = dsty + height;
-
-/*       intel->vtbl.emit_flush(intel, 0); */
-
-      /* Could do slightly more clipping: Eg, take the intersection of
-       * the existing set of cliprects and those cliprects translated
-       * by delta_x, delta_y:
-       * 
-       * This code will not overwrite other windows, but will
-       * introduce garbage when copying from obscured window regions.
-       */
-      for (i = 0; i < nbox; i++) {
-         drm_clip_rect_t rect;
-
-         if (!intel_intersect_cliprects(&rect, &dest_rect, &box[i]))
-            continue;
-
-
-         intelEmitCopyBlit(intel, 
-			   dst->cpp, 
-			   src->pitch, src->buffer, 0, src->tiled,
-			   dst->pitch, dst->buffer, 0, dst->tiled,
-			   rect.x1 + delta_x, 
-			   rect.y1 + delta_y,       /* srcx, srcy */
-                           rect.x1, rect.y1,    /* dstx, dsty */
-                           rect.x2 - rect.x1, rect.y2 - rect.y1,
-			   ctx->Color.ColorLogicOpEnabled ?
-			   ctx->Color.LogicOp : GL_COPY);
-      }
-
-      intel->need_flush = GL_TRUE;
-   out:
-      intel_batchbuffer_flush(intel->batch);
-   }
-   UNLOCK_HARDWARE(intel);
-   return GL_TRUE;
-}
-
-void
-intelCopyPixels(GLcontext * ctx,
-                GLint srcx, GLint srcy,
-                GLsizei width, GLsizei height,
-                GLint destx, GLint desty, GLenum type)
-{
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      fprintf(stderr, "%s\n", __FUNCTION__);
-
-   if (do_blit_copypixels(ctx, srcx, srcy, width, height, destx, desty, type))
-      return;
-
-   if (do_texture_copypixels(ctx, srcx, srcy, width, height, destx, desty, type))
-      return;
-   
-   if (INTEL_DEBUG & DEBUG_PIXEL)
-      _mesa_printf("fallback to _swrast_CopyPixels\n");
-
-   _swrast_CopyPixels(ctx, srcx, srcy, width, height, destx, desty, type);
-}
+../intel/intel_pixel_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
new file mode 120000
index 00000000000..8431a24edfc
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c
@@ -0,0 +1 @@
+../intel/intel_pixel_draw.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_reg.h b/src/mesa/drivers/dri/i965/intel_reg.h
deleted file mode 100644
index 3c448b3559a..00000000000
--- a/src/mesa/drivers/dri/i965/intel_reg.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#ifndef _INTEL_REG_H_
-#define _INTEL_REG_H_
-
-
-
-#define CMD_3D (0x3<<29)
-
-
-#define _3DPRIMITIVE         ((0x3<<29)|(0x1f<<24))
-#define PRIM_INDIRECT            (1<<23)
-#define PRIM_INLINE              (0<<23)
-#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
-#define PRIM_INDIRECT_ELTS       (1<<17)
-
-#define PRIM3D_TRILIST		(0x0<<18)
-#define PRIM3D_TRISTRIP 	(0x1<<18)
-#define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
-#define PRIM3D_TRIFAN		(0x3<<18)
-#define PRIM3D_POLY		(0x4<<18)
-#define PRIM3D_LINELIST 	(0x5<<18)
-#define PRIM3D_LINESTRIP	(0x6<<18)
-#define PRIM3D_RECTLIST 	(0x7<<18)
-#define PRIM3D_POINTLIST	(0x8<<18)
-#define PRIM3D_DIB		(0x9<<18)
-#define PRIM3D_MASK		(0x1f<<18)
-
-#define I915PACKCOLOR4444(r,g,b,a) \
-  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define I915PACKCOLOR1555(r,g,b,a) \
-  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
-    ((a) ? 0x8000 : 0))
-
-#define I915PACKCOLOR565(r,g,b) \
-  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define I915PACKCOLOR8888(r,g,b,a) \
-  ((a<<24) | (r<<16) | (g<<8) | b)
-
-
-
-
-#define BR00_BITBLT_CLIENT   0x40000000
-#define BR00_OP_COLOR_BLT    0x10000000
-#define BR00_OP_SRC_COPY_BLT 0x10C00000
-#define BR13_SOLID_PATTERN   0x80000000
-
-#define XY_COLOR_BLT_CMD		((2<<29)|(0x50<<22)|0x4)
-#define XY_COLOR_BLT_WRITE_ALPHA	(1<<21)
-#define XY_COLOR_BLT_WRITE_RGB		(1<<20)
-
-#define XY_SRC_COPY_BLT_CMD             ((2<<29)|(0x53<<22)|6)
-#define XY_SRC_COPY_BLT_WRITE_ALPHA     (1<<21)
-#define XY_SRC_COPY_BLT_WRITE_RGB       (1<<20)
-
-#define XY_SRC_TILED  (1<<15)
-#define XY_DST_TILED  (1<<11)
-
-#define FENCE_LINEAR 0
-#define FENCE_XMAJOR 1
-#define FENCE_YMAJOR 2
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/intel_regions.c b/src/mesa/drivers/dri/i965/intel_regions.c
index 835ecdd7257..89b2f15c10f 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_regions.c
+++ b/src/mesa/drivers/dri/i965/intel_regions.c
@@ -1,295 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-/* Provide additional functionality on top of bufmgr buffers:
- *   - 2d semantics and blit operations
- *   - refcounting of buffers for multiple images in a buffer.
- *   - refcounting of buffer mappings.
- *   - some logic for moving the buffers to the best memory pools for
- *     given operations.
- *
- * Most of this is to make it easier to implement the fixed-layout
- * mipmap tree required by intel hardware in the face of GL's
- * programming interface where each image can be specifed in random
- * order and it isn't clear what layout the tree should have until the
- * last moment.
- */
-
-#include "intel_context.h"
-#include "intel_regions.h"
-#include "intel_blit.h"
-#include "bufmgr.h"
-#include "imports.h"
-
-/* XXX: Thread safety?
- */
-GLubyte *intel_region_map(struct intel_context *intel, struct intel_region *region)
-{
-   DBG("%s\n", __FUNCTION__);
-   if (!region->map_refcount++) {
-      region->map = bmMapBuffer(intel, region->buffer, 0);
-      if (!region->map)
-	 region->map_refcount--;
-   }
-
-   return region->map;
-}
-
-void intel_region_unmap(struct intel_context *intel, 
-			struct intel_region *region)
-{
-   DBG("%s\n", __FUNCTION__);
-   if (!--region->map_refcount) {
-      bmUnmapBufferAUB(intel, region->buffer, 0, 0);
-      region->map = NULL;
-   }
-}
-
-struct intel_region *intel_region_alloc( struct intel_context *intel, 
-					 GLuint cpp,
-					 GLuint pitch, 
-					 GLuint height )
-{
-   struct intel_region *region = calloc(sizeof(*region), 1);
-
-   DBG("%s %dx%dx%d == 0x%x bytes\n", __FUNCTION__,
-       cpp, pitch, height, cpp*pitch*height);
-
-   region->cpp = cpp;
-   region->pitch = pitch;
-   region->height = height; 	/* needed? */
-   region->refcount = 1;
-
-   bmGenBuffers(intel, "tex", 1, &region->buffer, 6);
-   bmBufferData(intel, region->buffer, pitch * cpp * height, NULL, 0);
-
-   return region;
-}
-
-void intel_region_reference( struct intel_region **dst,
-			     struct intel_region *src)
-{
-   src->refcount++;
-   assert(*dst == NULL);
-   *dst = src;
-}
-
-void intel_region_release( struct intel_context *intel,
-			   struct intel_region **region )
-{
-   if (!*region)
-      return;
-
-   DBG("%s %d\n", __FUNCTION__, (*region)->refcount-1);
-   
-   if (--(*region)->refcount == 0) {
-      assert((*region)->map_refcount == 0);
-      bmDeleteBuffers(intel, 1, &(*region)->buffer);
-      free(*region);
-   }
-   *region = NULL;
-}
-
-
-struct intel_region *intel_region_create_static( struct intel_context *intel, 
-						 GLuint mem_type,
-						 GLuint offset,
-						 void *virtual,
-						 GLuint cpp,
-						 GLuint pitch, 
-						 GLuint height,
-						 GLuint size,
-						 GLboolean tiled )
-{
-   struct intel_region *region = calloc(sizeof(*region), 1);
-   GLint pool;
-
-   DBG("%s\n", __FUNCTION__);
-
-   region->cpp = cpp;
-   region->pitch = pitch;
-   region->height = height; 	/* needed? */
-   region->refcount = 1;
-   region->tiled = tiled;
-
-   /* Recipe for creating a static buffer - create a static pool with
-    * the right offset and size, generate a buffer and use a special
-    * call to bind it to all of the memory in that pool.
-    */
-   pool = bmInitPool(intel, offset, virtual, size, 
-		     (BM_MEM_AGP |
-		      BM_NO_UPLOAD | 
-		      BM_NO_EVICT | 
-		      BM_NO_MOVE));
-   if (pool < 0) {
-      _mesa_printf("bmInitPool failed for static region\n");
-      exit(1);
-   }
-
-   region->buffer = bmGenBufferStatic(intel, pool);
-
-   return region;
-}
-
-
-
-
-void _mesa_copy_rect( GLubyte *dst,
-		      GLuint cpp,
-		      GLuint dst_pitch,
-		      GLuint dst_x, 
-		      GLuint dst_y,
-		      GLuint width,
-		      GLuint height,
-		      const GLubyte *src,
-		      GLuint src_pitch,
-		      GLuint src_x,
-		      GLuint src_y )
-{
-   GLuint i;
-
-   dst_pitch *= cpp;
-   src_pitch *= cpp;
-   dst += dst_x * cpp;
-   src += src_x * cpp;
-   dst += dst_y * dst_pitch;
-   src += src_y * dst_pitch;
-   width *= cpp;
-
-   if (width == dst_pitch && 
-       width == src_pitch)
-      do_memcpy(dst, src, height * width);
-   else {
-      for (i = 0; i < height; i++) {
-	 do_memcpy(dst, src, width);
-	 dst += dst_pitch;
-	 src += src_pitch;
-      }
-   }
-}
-
-
-/* Upload data to a rectangular sub-region.  Lots of choices how to do this:
- *
- * - memcpy by span to current destination
- * - upload data as new buffer and blit
- *
- * Currently always memcpy.
- */
-GLboolean intel_region_data(struct intel_context *intel, 
-			    struct intel_region *dst,
-			    GLuint dst_offset,
-			    GLuint dstx, GLuint dsty,
-			    const void *src, GLuint src_pitch,
-			    GLuint srcx, GLuint srcy,
-			    GLuint width, GLuint height)
-{
-   DBG("%s\n", __FUNCTION__);
-
-   if (width == dst->pitch && 
-       width == src_pitch &&
-       dst_offset == 0 &&
-       height == dst->height &&
-       srcx == 0 &&
-       srcy == 0) 
-   {
-      return (bmBufferDataAUB(intel,
-			      dst->buffer,
-			      dst->cpp * width * dst->height,
-			      src, 0, 0, 0) == 0);
-   }
-   else {
-      GLubyte *map = intel_region_map(intel, dst);
-
-      if (map) {
-	 assert (dst_offset + dstx + width + 
-		 (dsty + height - 1) * dst->pitch * dst->cpp <= 
-		 dst->pitch * dst->cpp * dst->height);
-	 
-	 _mesa_copy_rect(map + dst_offset,
-			 dst->cpp,
-			 dst->pitch,
-			 dstx, dsty,
-			 width, height,
-			 src,
-			 src_pitch,
-			 srcx, srcy);      
-	 
-	 intel_region_unmap(intel, dst);
-	 return GL_TRUE;
-      }
-      else 
-	 return GL_FALSE;
-   }
-}
-			  
-/* Copy rectangular sub-regions. Need better logic about when to
- * push buffers into AGP - will currently do so whenever possible.
- */
-void intel_region_copy( struct intel_context *intel,
-			struct intel_region *dst,
-			GLuint dst_offset,
-			GLuint dstx, GLuint dsty,
-			struct intel_region *src,
-			GLuint src_offset,
-			GLuint srcx, GLuint srcy,
-			GLuint width, GLuint height )
-{
-   DBG("%s\n", __FUNCTION__);
-
-   assert(src->cpp == dst->cpp);
-
-   intelEmitCopyBlit(intel,
-		     dst->cpp,
-		     src->pitch, src->buffer, src_offset, src->tiled,
-		     dst->pitch, dst->buffer, dst_offset, dst->tiled,
-		     srcx, srcy,
-		     dstx, dsty,
-		     width, height,
-		     GL_COPY );
-}
-
-/* Fill a rectangular sub-region.  Need better logic about when to
- * push buffers into AGP - will currently do so whenever possible.
- */
-void intel_region_fill( struct intel_context *intel,
-			struct intel_region *dst,
-			GLuint dst_offset,
-			GLuint dstx, GLuint dsty,
-			GLuint width, GLuint height,
-			GLuint color )
-{
-   DBG("%s\n", __FUNCTION__);
-   
-   intelEmitFillBlit(intel,
-		     dst->cpp,
-		     dst->pitch, dst->buffer, dst_offset, dst->tiled,
-		     dstx, dsty,
-		     width, height,
-		     color );
-}
-
+../intel/intel_regions.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_regions.h b/src/mesa/drivers/dri/i965/intel_regions.h
deleted file mode 100644
index d2235f1275b..00000000000
--- a/src/mesa/drivers/dri/i965/intel_regions.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#ifndef INTEL_REGIONS_H
-#define INTEL_REGIONS_H
-
-#include "mtypes.h"
-#include "bufmgr.h"		/* for DBG! */
-struct intel_context;
-
-/* A layer on top of the bufmgr buffers that adds a few useful things:
- *
- * - Refcounting for local buffer references.
- * - Refcounting for buffer maps
- * - Buffer dimensions - pitch and height.
- * - Blitter commands for copying 2D regions between buffers.
- */
-struct intel_region {
-   struct buffer *buffer;
-   GLuint refcount;
-   GLuint cpp;
-   GLuint pitch;
-   GLuint height;
-   GLboolean tiled;
-   GLubyte *map;
-   GLuint map_refcount;
-};
-
-/* Allocate a refcounted region.  Pointers to regions should only be
- * copied by calling intel_reference_region().
- *
- * No support for dynamically allocating tiled regions at this point.
- */
-struct intel_region *intel_region_alloc( struct intel_context *intel,
-					 GLuint cpp,
-					 GLuint pitch, 
-					 GLuint height );
-
-void intel_region_reference( struct intel_region **dst, 
-			     struct intel_region *src );
-
-void intel_region_release(struct intel_context *intel,
-			  struct intel_region **ib );
-
-/* Static regions may be tiled.  The assumption is that the X server
- * has set up fence registers to define tiled zones in agp and these
- * buffers are within those zones.  Tiling regions without fence
- * registers is more work.
- */
-struct intel_region *intel_region_create_static( struct intel_context *intel,
-						 GLuint mem_type,
-						 GLuint offset,
-						 void *virtual,
-						 GLuint cpp,
-						 GLuint pitch,
-						 GLuint height,
-						 GLuint size,
-						 GLboolean tiled );
-
-/* Map/unmap regions.  This is refcounted also: 
- */
-GLubyte *intel_region_map(struct intel_context *intel, 
-		       struct intel_region *ib);
-
-void intel_region_unmap(struct intel_context *intel,
-			struct intel_region *ib);
-
-
-/* Upload data to a rectangular sub-region
- */
-GLboolean intel_region_data(struct intel_context *intel, 
-			    struct intel_region *dest,
-			    GLuint dest_offset,
-			    GLuint destx, GLuint desty,
-			    const void *src, GLuint src_stride,
-			    GLuint srcx, GLuint srcy,
-			    GLuint width, GLuint height);
-			  
-/* Copy rectangular sub-regions
- */
-void intel_region_copy( struct intel_context *intel,
-			struct intel_region *dest,
-			GLuint dest_offset,
-			GLuint destx, GLuint desty,
-			struct intel_region *src,
-			GLuint src_offset,
-			GLuint srcx, GLuint srcy,
-			GLuint width, GLuint height );
-
-/* Fill a rectangular sub-region
- */
-void intel_region_fill( struct intel_context *intel,
-			struct intel_region *dest,
-			GLuint dest_offset,
-			GLuint destx, GLuint desty,
-			GLuint width, GLuint height,
-			GLuint color );
-
-
-/***********************************************************************
- * Misc utilities: move to somewhere generic
- */
-void _mesa_copy_rect( GLubyte *dst,
-		      GLuint cpp,
-		      GLuint dst_pitch,
-		      GLuint dst_x, 
-		      GLuint dst_y,
-		      GLuint width,
-		      GLuint height,
-		      const GLubyte *src,
-		      GLuint src_pitch,
-		      GLuint src_x,
-		      GLuint src_y );
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index bc3dd30b7ed..f2db48272b9 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1,701 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "matrix.h"
-#include "renderbuffer.h"
-#include "simple_list.h"
-#include "utils.h"
-#include "vblank.h"
-#include "xmlpool.h"
-
-
-#include "intel_screen.h"
-
-#include "intel_context.h"
-#include "intel_tex.h"
-#include "intel_span.h"
-#include "intel_ioctl.h"
-
-#include "i830_dri.h"
-
-PUBLIC const char __driConfigOptions[] =
-DRI_CONF_BEGIN
-    DRI_CONF_SECTION_PERFORMANCE
-       DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) 
-       DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
-    DRI_CONF_SECTION_END
-    DRI_CONF_SECTION_QUALITY
-       DRI_CONF_FORCE_S3TC_ENABLE(false)
-       DRI_CONF_ALLOW_LARGE_TEXTURES(1)
-      DRI_CONF_SECTION_END
-DRI_CONF_END;
-const GLuint __driNConfigOptions = 4;
-
-#ifdef USE_NEW_INTERFACE
-static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
-#endif /*USE_NEW_INTERFACE*/
-
-/**
- * Map all the memory regions described by the screen.
- * \return GL_TRUE if success, GL_FALSE if error.
- */
-GLboolean
-intelMapScreenRegions(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-
-   if (intelScreen->front.handle) {
-      if (drmMap(sPriv->fd,
-                 intelScreen->front.handle,
-                 intelScreen->front.size,
-                 (drmAddress *)&intelScreen->front.map) != 0) {
-         _mesa_problem(NULL, "drmMap(frontbuffer) failed!");
-         return GL_FALSE;
-      }
-   } else {
-      /* Use the old static allocation method if the server isn't setting up
-       * a movable handle for us.  Add in the front buffer offset from
-       * framebuffer start, as our span routines (unlike other drivers) expect
-       * the renderbuffer address to point to the beginning of the
-       * renderbuffer.
-       */
-      intelScreen->front.map = (char *)sPriv->pFB;
-      if (intelScreen->front.map == NULL) {
-	 fprintf(stderr, "Failed to find framebuffer mapping\n");
-	 return GL_FALSE;
-      }
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->back.handle,
-              intelScreen->back.size,
-              (drmAddress *)&intelScreen->back.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->depth.handle,
-              intelScreen->depth.size,
-              (drmAddress *)&intelScreen->depth.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (drmMap(sPriv->fd,
-              intelScreen->tex.handle,
-              intelScreen->tex.size,
-              (drmAddress *)&intelScreen->tex.map) != 0) {
-      intelUnmapScreenRegions(intelScreen);
-      return GL_FALSE;
-   }
-
-   if (0)
-      printf("Mappings:  front: %p  back: %p  depth: %p  tex: %p\n",
-          intelScreen->front.map,
-          intelScreen->back.map,
-          intelScreen->depth.map,
-          intelScreen->tex.map);
-   return GL_TRUE;
-}
-
-
-void
-intelUnmapScreenRegions(intelScreenPrivate *intelScreen)
-{
-#define REALLY_UNMAP 1
-   /* If front.handle is present, we're doing the dynamic front buffer mapping,
-    * but if we've fallen back to static allocation then we shouldn't try to
-    * unmap here.
-    */
-   if (intelScreen->front.handle) {
-#if REALLY_UNMAP
-      if (drmUnmap(intelScreen->front.map, intelScreen->front.size) != 0)
-         printf("drmUnmap front failed!\n");
-#endif
-      intelScreen->front.map = NULL;
-   }
-   if (intelScreen->back.map) {
-#if REALLY_UNMAP
-      if (drmUnmap(intelScreen->back.map, intelScreen->back.size) != 0)
-         printf("drmUnmap back failed!\n");
-#endif
-      intelScreen->back.map = NULL;
-   }
-   if (intelScreen->depth.map) {
-#if REALLY_UNMAP
-      drmUnmap(intelScreen->depth.map, intelScreen->depth.size);
-      intelScreen->depth.map = NULL;
-#endif
-   }
-   if (intelScreen->tex.map) {
-#if REALLY_UNMAP
-      drmUnmap(intelScreen->tex.map, intelScreen->tex.size);
-      intelScreen->tex.map = NULL;
-#endif
-   }
-}
-
-
-static void
-intelPrintDRIInfo(intelScreenPrivate *intelScreen,
-                  __DRIscreenPrivate *sPriv,
-                  I830DRIPtr gDRIPriv)
-{
-   fprintf(stderr, "*** Front size:   0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->front.size, intelScreen->front.offset,
-           intelScreen->front.pitch);
-   fprintf(stderr, "*** Back size:    0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->back.size, intelScreen->back.offset,
-           intelScreen->back.pitch);
-   fprintf(stderr, "*** Depth size:   0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->depth.size, intelScreen->depth.offset,
-           intelScreen->depth.pitch);
-   fprintf(stderr, "*** Rotated size: 0x%x  offset: 0x%x  pitch: %d\n",
-           intelScreen->rotated.size, intelScreen->rotated.offset,
-           intelScreen->rotated.pitch);
-   fprintf(stderr, "*** Texture size: 0x%x  offset: 0x%x\n",
-           intelScreen->tex.size, intelScreen->tex.offset);
-   fprintf(stderr, "*** Memory : 0x%x\n", gDRIPriv->mem);
-}
-
-
-static void
-intelPrintSAREA(volatile drmI830Sarea *sarea)
-{
-   fprintf(stderr, "SAREA: sarea width %d  height %d\n", sarea->width, sarea->height);
-   fprintf(stderr, "SAREA: pitch: %d\n", sarea->pitch);
-   fprintf(stderr,
-           "SAREA: front offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->front_offset, sarea->front_size,
-           (unsigned) sarea->front_handle);
-   fprintf(stderr,
-           "SAREA: back  offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->back_offset, sarea->back_size,
-           (unsigned) sarea->back_handle);
-   fprintf(stderr, "SAREA: depth offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->depth_offset, sarea->depth_size,
-           (unsigned) sarea->depth_handle);
-   fprintf(stderr, "SAREA: tex   offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
-           sarea->tex_offset, sarea->tex_size,
-           (unsigned) sarea->tex_handle);
-   fprintf(stderr, "SAREA: rotation: %d\n", sarea->rotation);
-   fprintf(stderr,
-           "SAREA: rotated offset: 0x%08x  size: 0x%x\n",
-           sarea->rotated_offset, sarea->rotated_size);
-   fprintf(stderr, "SAREA: rotated pitch: %d\n", sarea->rotated_pitch);
-}
-
-
-/**
- * A number of the screen parameters are obtained/computed from
- * information in the SAREA.  This function updates those parameters.
- */
-void
-intelUpdateScreenFromSAREA(intelScreenPrivate *intelScreen,
-                           volatile drmI830Sarea *sarea)
-{
-   intelScreen->width = sarea->width;
-   intelScreen->height = sarea->height;
-
-   intelScreen->front.offset = sarea->front_offset;
-   intelScreen->front.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->front.handle = sarea->front_handle;
-   intelScreen->front.size = sarea->front_size;
-   intelScreen->front.tiled = sarea->front_tiled;
-
-   intelScreen->back.offset = sarea->back_offset;
-   intelScreen->back.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->back.handle = sarea->back_handle;
-   intelScreen->back.size = sarea->back_size;
-   intelScreen->back.tiled = sarea->back_tiled;
-
-   intelScreen->depth.offset = sarea->depth_offset;
-   intelScreen->depth.pitch = sarea->pitch * intelScreen->cpp;
-   intelScreen->depth.handle = sarea->depth_handle;
-   intelScreen->depth.size = sarea->depth_size;
-   intelScreen->depth.tiled = sarea->depth_tiled;
-
-   intelScreen->tex.offset = sarea->tex_offset;
-   intelScreen->logTextureGranularity = sarea->log_tex_granularity;
-   intelScreen->tex.handle = sarea->tex_handle;
-   intelScreen->tex.size = sarea->tex_size;
-
-   intelScreen->rotated.offset = sarea->rotated_offset;
-   intelScreen->rotated.pitch = sarea->rotated_pitch * intelScreen->cpp;
-   intelScreen->rotated.size = sarea->rotated_size;
-   intelScreen->rotated.tiled = sarea->rotated_tiled;
-   intelScreen->current_rotation = sarea->rotation;
-#if 0
-   matrix23Rotate(&intelScreen->rotMatrix,
-                  sarea->width, sarea->height, sarea->rotation);
-#endif
-   intelScreen->rotatedWidth = sarea->virtualX;
-   intelScreen->rotatedHeight = sarea->virtualY;
-
-   if (0)
-      intelPrintSAREA(sarea);
-}
-
-
-static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen;
-   I830DRIPtr         gDRIPriv = (I830DRIPtr)sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
-   volatile drmI830Sarea *sarea;
-
-   if (sPriv->devPrivSize != sizeof(I830DRIRec)) {
-      fprintf(stderr,"\nERROR!  sizeof(I830DRIRec) (%ld) does not match passed size from device driver (%d)\n", (unsigned long)sizeof(I830DRIRec), sPriv->devPrivSize);
-      return GL_FALSE;
-   }
-
-   /* Allocate the private area */
-   intelScreen = (intelScreenPrivate *)CALLOC(sizeof(intelScreenPrivate));
-   if (!intelScreen) {
-      fprintf(stderr,"\nERROR!  Allocating private area failed\n");
-      return GL_FALSE;
-   }
-   /* parse information in __driConfigOptions */
-   driParseOptionInfo (&intelScreen->optionCache,
-		       __driConfigOptions, __driNConfigOptions);
-
-   intelScreen->driScrnPriv = sPriv;
-   sPriv->private = (void *)intelScreen;
-   intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
-   sarea = (volatile drmI830Sarea *)
-         (((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
-
-   intelScreen->deviceID = gDRIPriv->deviceID;
-   intelScreen->mem = gDRIPriv->mem;
-   intelScreen->cpp = gDRIPriv->cpp;
-
-   switch (gDRIPriv->bitsPerPixel) {
-   case 15: intelScreen->fbFormat = DV_PF_555; break;
-   case 16: intelScreen->fbFormat = DV_PF_565; break;
-   case 32: intelScreen->fbFormat = DV_PF_8888; break;
-   }
-			 
-   intelUpdateScreenFromSAREA(intelScreen, sarea);
-
-   if (0)
-      intelPrintDRIInfo(intelScreen, sPriv, gDRIPriv);
-
-   if (!intelMapScreenRegions(sPriv)) {
-      fprintf(stderr,"\nERROR!  mapping regions\n");
-      _mesa_free(intelScreen);
-      sPriv->private = NULL;
-      return GL_FALSE;
-   }
-
-   intelScreen->drmMinor = sPriv->drmMinor;
-
-   /* Determine if IRQs are active? */
-   {
-      int ret;
-      drmI830GetParam gp;
-
-      gp.param = I830_PARAM_IRQ_ACTIVE;
-      gp.value = &intelScreen->irq_active;
-
-      ret = drmCommandWriteRead( sPriv->fd, DRM_I830_GETPARAM,
-				 &gp, sizeof(gp));
-      if (ret) {
-	 fprintf(stderr, "drmI830GetParam: %d\n", ret);
-	 return GL_FALSE;
-      }
-   }
-
-   /* Determine if batchbuffers are allowed */
-   {
-      int ret;
-      drmI830GetParam gp;
-
-      gp.param = I830_PARAM_ALLOW_BATCHBUFFER;
-      gp.value = &intelScreen->allow_batchbuffer;
-
-      ret = drmCommandWriteRead( sPriv->fd, DRM_I830_GETPARAM,
-				 &gp, sizeof(gp));
-      if (ret) {
-	 fprintf(stderr, "drmI830GetParam: (%d) %d\n", gp.param, ret);
-	 return GL_FALSE;
-      }
-   }
-
-   if (glx_enable_extension != NULL) {
-      (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
-      (*glx_enable_extension)( psc, "GLX_SGI_make_current_read" );
-      (*glx_enable_extension)( psc, "GLX_MESA_copy_sub_buffer" );
-   }
-   
-   return GL_TRUE;
-}
-
-
-static void intelDestroyScreen(__DRIscreenPrivate *sPriv)
-{
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-
-   intelUnmapScreenRegions(intelScreen);
-   FREE(intelScreen);
-   sPriv->private = NULL;
-}
-
-static GLboolean intelCreateBuffer( __DRIscreenPrivate *driScrnPriv,
-				    __DRIdrawablePrivate *driDrawPriv,
-				    const __GLcontextModes *mesaVis,
-				    GLboolean isPixmap )
-{
-   intelScreenPrivate *screen = (intelScreenPrivate *) driScrnPriv->private;
-
-   if (isPixmap) {
-      return GL_FALSE; /* not implemented */
-   } else {
-      GLboolean swStencil = (mesaVis->stencilBits > 0 && 
-			     mesaVis->depthBits != 24);
-
-      struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
-
-      {
-         driRenderbuffer *frontRb
-            = driNewRenderbuffer(GL_RGBA,
-                                 screen->front.map,
-                                 screen->cpp,
-                                 screen->front.offset, screen->front.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(frontRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
-      }
-
-      if (mesaVis->doubleBufferMode) {
-         driRenderbuffer *backRb
-            = driNewRenderbuffer(GL_RGBA,
-                                 screen->back.map,
-                                 screen->cpp,
-                                 screen->back.offset, screen->back.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(backRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
-      }
-
-      if (mesaVis->depthBits == 16) {
-         driRenderbuffer *depthRb
-            = driNewRenderbuffer(GL_DEPTH_COMPONENT16,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(depthRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
-      }
-      else if (mesaVis->depthBits == 24) {
-         driRenderbuffer *depthRb
-            = driNewRenderbuffer(GL_DEPTH_COMPONENT24,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(depthRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
-      }
-
-      if (mesaVis->stencilBits > 0 && !swStencil) {
-         driRenderbuffer *stencilRb
-            = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT,
-                                 screen->depth.map,
-                                 screen->cpp,
-                                 screen->depth.offset, screen->depth.pitch,
-                                 driDrawPriv);
-         intelSetSpanFunctions(stencilRb, mesaVis);
-         _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base);
-      }
-
-      _mesa_add_soft_renderbuffers(fb,
-                                   GL_FALSE, /* color */
-                                   GL_FALSE, /* depth */
-                                   swStencil,
-                                   mesaVis->accumRedBits > 0,
-                                   GL_FALSE, /* alpha */
-                                   GL_FALSE /* aux */);
-      driDrawPriv->driverPrivate = (void *) fb;
-
-      return (driDrawPriv->driverPrivate != NULL);
-   }
-}
-
-static void intelDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
-{
-   _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
-}
-
-
-/**
- * Get information about previous buffer swaps.
- */
-static int
-intelGetSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
-{
-   struct intel_context *intel;
-
-   if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
-	|| (dPriv->driContextPriv->driverPrivate == NULL)
-	|| (sInfo == NULL) ) {
-      return -1;
-   }
-
-   intel = dPriv->driContextPriv->driverPrivate;
-   sInfo->swap_count = intel->swap_count;
-   sInfo->swap_ust = intel->swap_ust;
-   sInfo->swap_missed_count = intel->swap_missed_count;
-
-   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
-       ? driCalculateSwapUsage( dPriv, 0, intel->swap_missed_ust )
-       : 0.0;
-
-   return 0;
-}
-
-
-/* There are probably better ways to do this, such as an
- * init-designated function to register chipids and createcontext
- * functions.
- */
-extern GLboolean i830CreateContext( const __GLcontextModes *mesaVis,
-				    __DRIcontextPrivate *driContextPriv,
-				    void *sharedContextPrivate);
-
-extern GLboolean i915CreateContext( const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate);
-
-extern GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate);
-
-
-
-
-static GLboolean intelCreateContext( const __GLcontextModes *mesaVis,
-				   __DRIcontextPrivate *driContextPriv,
-				   void *sharedContextPrivate)
-{
-#if 0
-   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
-   intelScreenPrivate *intelScreen = (intelScreenPrivate *)sPriv->private;
-   switch (intelScreen->deviceID) {
-   case PCI_CHIP_845_G:
-   case PCI_CHIP_I830_M:
-   case PCI_CHIP_I855_GM:
-   case PCI_CHIP_I865_G:
-      return i830CreateContext( mesaVis, driContextPriv, 
-				sharedContextPrivate );
-
-   case PCI_CHIP_I915_G:
-   case PCI_CHIP_I915_GM:
-   case PCI_CHIP_I945_G:
-   case PCI_CHIP_I945_GM:
-      return i915CreateContext( mesaVis, driContextPriv, 
-			       sharedContextPrivate );
- 
-   default:
-      fprintf(stderr, "Unrecognized deviceID %x\n", intelScreen->deviceID);
-      return GL_FALSE;
-   }
-#else
-   return brwCreateContext( mesaVis, driContextPriv, 
-			    sharedContextPrivate );
-#endif
-}
-
-
-static const struct __DriverAPIRec intelAPI = {
-   .InitDriver      = intelInitDriver,
-   .DestroyScreen   = intelDestroyScreen,
-   .CreateContext   = intelCreateContext,
-   .DestroyContext  = intelDestroyContext,
-   .CreateBuffer    = intelCreateBuffer,
-   .DestroyBuffer   = intelDestroyBuffer,
-   .SwapBuffers     = intelSwapBuffers,
-   .MakeCurrent     = intelMakeCurrent,
-   .UnbindContext   = intelUnbindContext,
-   .GetSwapInfo     = intelGetSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = intelCopySubBuffer
-};
-
-
-static __GLcontextModes *
-intelFillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
-{
-   __GLcontextModes * modes;
-   __GLcontextModes * m;
-   unsigned num_modes;
-   unsigned depth_buffer_factor;
-   unsigned back_buffer_factor;
-   GLenum fb_format;
-   GLenum fb_type;
-
-   /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
-    * support pageflipping at all.
-    */
-   static const GLenum back_buffer_modes[] = {
-      GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
-   };
-
-   uint8_t depth_bits_array[3];
-   uint8_t stencil_bits_array[3];
-
-
-   depth_bits_array[0] = 0;
-   depth_bits_array[1] = depth_bits;
-   depth_bits_array[2] = depth_bits;
-
-   /* Just like with the accumulation buffer, always provide some modes
-    * with a stencil buffer.  It will be a sw fallback, but some apps won't
-    * care about that.
-    */
-   stencil_bits_array[0] = 0;
-   stencil_bits_array[1] = 0;
-   stencil_bits_array[2] = (stencil_bits == 0) ? 8 : stencil_bits;
-
-   depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
-   back_buffer_factor  = (have_back_buffer) ? 3 : 1;
-
-   num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
-    if ( pixel_bits == 16 ) {
-        fb_format = GL_RGB;
-        fb_type = GL_UNSIGNED_SHORT_5_6_5;
-    }
-    else {
-        fb_format = GL_BGRA;
-        fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
-    }
-
-   modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-   m = modes;
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-   }
-   if ( ! driFillInModes( & m, fb_format, fb_type,
-			  depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			  back_buffer_modes, back_buffer_factor,
-			  GLX_DIRECT_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-   }
-
-   /* Mark the visual as slow if there are "fake" stencil bits.
-    */
-   for ( m = modes ; m != NULL ; m = m->next ) {
-      if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
-	 m->visualRating = GLX_SLOW_CONFIG;
-      }
-   }
-
-   return modes;
-}
-
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
-{
-   __DRIscreenPrivate *psp;
-   static const __DRIversion ddx_expected = { 1, 6, 0 };
-   static const __DRIversion dri_expected = { 4, 0, 0 };
-   static const __DRIversion drm_expected = { 1, 3, 0 };
-
-   dri_interface = interface;
-
-   if ( ! driCheckDriDdxDrmVersions2( "i915",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
-      return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &intelAPI);
-   if ( psp != NULL ) {
-      I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
-      *driver_modes = intelFillInModes( dri_priv->cpp * 8,
-					(dri_priv->cpp == 2) ? 16 : 24,
-					(dri_priv->cpp == 2) ? 0  : 8,
-					GL_TRUE );
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      intelInitExtensions(NULL, GL_FALSE);
-   }
-
-   return (void *) psp;
-}
+../intel/intel_screen.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_span.c b/src/mesa/drivers/dri/i965/intel_span.c
index 60fbeccdc54..05e5e8e5833 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_span.c
+++ b/src/mesa/drivers/dri/i965/intel_span.c
@@ -1,283 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
-
-#include "intel_screen.h"
-#include "intel_regions.h"
-#include "intel_span.h"
-#include "intel_ioctl.h"
-#include "intel_tex.h"
-#include "intel_batchbuffer.h"
-#include "swrast/swrast.h"
-
-#undef DBG
-#define DBG 0
-
-#define LOCAL_VARS						\
-   struct intel_context *intel = intel_context(ctx);                    \
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *) drb->Base.Data +			\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch;			\
-   GLushort p;							\
-   (void) buf; (void) p
-
-#define LOCAL_DEPTH_VARS					\
-   struct intel_context *intel = intel_context(ctx);                    \
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *) drb->Base.Data +			\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch
-
-#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS 
-
-#define INIT_MONO_PIXEL(p,color)\
-	 p = INTEL_PACKCOLOR565(color[0],color[1],color[2])
-
-#define Y_FLIP(_y) (height - _y - 1)
-
-#define HW_LOCK()
-
-#define HW_UNLOCK()
-
-/* 16 bit, 565 rgb color spanline and pixel functions
- */
-#define WRITE_RGBA( _x, _y, r, g, b, a )				\
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = ( (((int)r & 0xf8) << 8) |	\
-		                             (((int)g & 0xfc) << 3) |	\
-		                             (((int)b & 0xf8) >> 3))
-#define WRITE_PIXEL( _x, _y, p )  \
-   *(GLushort *)(buf + _x*2 + _y*pitch) = p
-
-#define READ_RGBA( rgba, _x, _y )				\
-do {								\
-   GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch);		\
-   rgba[0] = (((p >> 11) & 0x1f) * 255) / 31;			\
-   rgba[1] = (((p >>  5) & 0x3f) * 255) / 63;			\
-   rgba[2] = (((p >>  0) & 0x1f) * 255) / 31;			\
-   rgba[3] = 255;						\
-} while(0)
-
-#define TAG(x) intel##x##_565
-#include "spantmp.h"
-
-/* 15 bit, 555 rgb color spanline and pixel functions
- */
-#define WRITE_RGBA( _x, _y, r, g, b, a )			\
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = (((r & 0xf8) << 7) |	\
-		                            ((g & 0xf8) << 3) |	\
-                         		    ((b & 0xf8) >> 3))
-
-#define WRITE_PIXEL( _x, _y, p )  \
-   *(GLushort *)(buf + _x*2 + _y*pitch)  = p
-
-#define READ_RGBA( rgba, _x, _y )				\
-do {								\
-   GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch);		\
-   rgba[0] = (p >> 7) & 0xf8;					\
-   rgba[1] = (p >> 3) & 0xf8;					\
-   rgba[2] = (p << 3) & 0xf8;					\
-   rgba[3] = 255;						\
-} while(0)
-
-#define TAG(x) intel##x##_555
-#include "spantmp.h"
-
-/* 16 bit depthbuffer functions.
- */
-#define WRITE_DEPTH( _x, _y, d ) \
-   *(GLushort *)(buf + (_x)*2 + (_y)*pitch)  = d;
-
-#define READ_DEPTH( d, _x, _y )	\
-   d = *(GLushort *)(buf + (_x)*2 + (_y)*pitch);	 
-
-
-#define TAG(x) intel##x##_z16
-#include "depthtmp.h"
-
-
-#undef LOCAL_VARS
-#define LOCAL_VARS						\
-   struct intel_context *intel = intel_context(ctx);			\
-   __DRIdrawablePrivate *dPriv = intel->driDrawable;		\
-   driRenderbuffer *drb = (driRenderbuffer *) rb;		\
-   GLuint pitch = drb->pitch;					\
-   GLuint height = dPriv->h;					\
-   char *buf = (char *)drb->Base.Data +				\
-			dPriv->x * drb->cpp +			\
-			dPriv->y * pitch;			\
-   GLuint p;							\
-   (void) buf; (void) p
-
-#undef INIT_MONO_PIXEL
-#define INIT_MONO_PIXEL(p,color)\
-	 p = INTEL_PACKCOLOR8888(color[0],color[1],color[2],color[3])
-
-/* 32 bit, 8888 argb color spanline and pixel functions
- */
-#define WRITE_RGBA(_x, _y, r, g, b, a)			\
-    *(GLuint *)(buf + _x*4 + _y*pitch) = ((r << 16) |	\
-					  (g << 8)  |	\
-					  (b << 0)  |	\
-					  (a << 24) )
-
-#define WRITE_PIXEL(_x, _y, p)			\
-    *(GLuint *)(buf + _x*4 + _y*pitch) = p
-
-
-#define READ_RGBA(rgba, _x, _y)					\
-    do {							\
-	GLuint p = *(GLuint *)(buf + _x*4 + _y*pitch);		\
-	rgba[0] = (p >> 16) & 0xff;				\
-	rgba[1] = (p >> 8)  & 0xff;				\
-	rgba[2] = (p >> 0)  & 0xff;				\
-	rgba[3] = (p >> 24) & 0xff;				\
-    } while (0)
-
-#define TAG(x) intel##x##_8888
-#include "spantmp.h"
-
-
-/* 24/8 bit interleaved depth/stencil functions
- */
-#define WRITE_DEPTH( _x, _y, d ) {			\
-   GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
-   tmp &= 0xff000000;					\
-   tmp |= (d) & 0xffffff;				\
-   *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = tmp;		\
-}
-
-#define READ_DEPTH( d, _x, _y )		\
-   d = *(GLuint *)(buf + (_x)*4 + (_y)*pitch) & 0xffffff;
-
-
-#define TAG(x) intel##x##_z24_s8
-#include "depthtmp.h"
-
-#define WRITE_STENCIL( _x, _y, d ) {			\
-   GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
-   tmp &= 0xffffff;					\
-   tmp |= ((d)<<24);					\
-   *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = tmp;		\
-}
-
-#define READ_STENCIL( d, _x, _y )			\
-   d = *(GLuint *)(buf + (_x)*4 + (_y)*pitch) >> 24;
-
-#define TAG(x) intel##x##_z24_s8
-#include "stenciltmp.h"
-
-
-/* Move locking out to get reasonable span performance.
- */
-void intelSpanRenderStart( GLcontext *ctx )
-{
-   struct intel_context *intel = intel_context(ctx);
-
-   if (intel->need_flush) {
-      LOCK_HARDWARE(intel);
-      intel->vtbl.emit_flush(intel, 0);
-      intel_batchbuffer_flush(intel->batch);
-      intel->need_flush = 0;
-      UNLOCK_HARDWARE(intel);
-      intelFinish(&intel->ctx);
-   }
-
-
-   LOCK_HARDWARE(intel);
-
-   /* Just map the framebuffer and all textures.  Bufmgr code will
-    * take care of waiting on the necessary fences:
-    */
-   intel_region_map(intel, intel->front_region);
-   intel_region_map(intel, intel->back_region);
-   intel_region_map(intel, intel->depth_region);
-}
-
-void intelSpanRenderFinish( GLcontext *ctx )
-{
-   struct intel_context *intel = intel_context( ctx );
-
-   _swrast_flush( ctx );
-
-   /* Now unmap the framebuffer:
-    */
-   intel_region_unmap(intel, intel->front_region);
-   intel_region_unmap(intel, intel->back_region);
-   intel_region_unmap(intel, intel->depth_region);
-
-   UNLOCK_HARDWARE( intel );
-}
-
-void intelInitSpanFuncs( GLcontext *ctx )
-{
-   struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
-   swdd->SpanRenderStart = intelSpanRenderStart;
-   swdd->SpanRenderFinish = intelSpanRenderFinish; 
-}
-
-
-/**
- * Plug in the Get/Put routines for the given driRenderbuffer.
- */
-void
-intelSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis)
-{
-   if (drb->Base.InternalFormat == GL_RGBA) {
-      if (vis->redBits == 5 && vis->greenBits == 5 && vis->blueBits == 5) {
-         intelInitPointers_555(&drb->Base);
-      }
-      else if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) {
-         intelInitPointers_565(&drb->Base);
-      }
-      else {
-         assert(vis->redBits == 8);
-         assert(vis->greenBits == 8);
-         assert(vis->blueBits == 8);
-         intelInitPointers_8888(&drb->Base);
-      }
-   }
-   else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
-      intelInitDepthPointers_z16(&drb->Base);
-   }
-   else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
-      intelInitDepthPointers_z24_s8(&drb->Base);
-   }
-   else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
-      intelInitStencilPointers_z24_s8(&drb->Base);
-   }
-}
+../intel/intel_span.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_state.c b/src/mesa/drivers/dri/i965/intel_state.c
index 2e442db6198..67ef5f78c1a 100644
--- a/src/mesa/drivers/dri/i965/intel_state.c
+++ b/src/mesa/drivers/dri/i965/intel_state.c
@@ -26,18 +26,43 @@
  **************************************************************************/
 
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "enums.h"
-#include "colormac.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/dd.h"
 
 #include "intel_screen.h"
 #include "intel_context.h"
 #include "intel_regions.h"
 #include "swrast/swrast.h"
 
+int intel_translate_shadow_compare_func( GLenum func )
+{
+   switch(func) {
+   case GL_NEVER: 
+       return COMPAREFUNC_ALWAYS; 
+   case GL_LESS: 
+       return COMPAREFUNC_LEQUAL; 
+   case GL_LEQUAL: 
+       return COMPAREFUNC_LESS;
+   case GL_GREATER: 
+       return COMPAREFUNC_GEQUAL; 
+   case GL_GEQUAL: 
+      return COMPAREFUNC_GREATER; 
+   case GL_NOTEQUAL: 
+      return COMPAREFUNC_EQUAL; 
+   case GL_EQUAL: 
+      return COMPAREFUNC_NOTEQUAL; 
+   case GL_ALWAYS: 
+       return COMPAREFUNC_NEVER; 
+   }
+
+   fprintf(stderr, "Unknown value in %s: %x\n", __FUNCTION__, func);
+   return COMPAREFUNC_NEVER; 
+}
+
 int intel_translate_compare_func( GLenum func )
 {
    switch(func) {
@@ -170,15 +195,16 @@ int intel_translate_logic_op( GLenum opcode )
 static void intelClearColor(GLcontext *ctx, const GLfloat color[4])
 {
    struct intel_context *intel = intel_context(ctx);
-   intelScreenPrivate *screen = intel->intelScreen;
 
    UNCLAMPED_FLOAT_TO_RGBA_CHAN(intel->clear_chan, color);
 
-   intel->ClearColor = INTEL_PACKCOLOR(screen->fbFormat,
-				       intel->clear_chan[0], 
-				       intel->clear_chan[1], 
-				       intel->clear_chan[2], 
-				       intel->clear_chan[3]);
+   intel->ClearColor8888 = INTEL_PACKCOLOR8888(intel->clear_chan[0],
+					       intel->clear_chan[1],
+					       intel->clear_chan[2],
+					       intel->clear_chan[3]);
+   intel->ClearColor565 = INTEL_PACKCOLOR565(intel->clear_chan[0],
+					     intel->clear_chan[1],
+					     intel->clear_chan[2]);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c
index 4523969bfa5..d77ce749a3e 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_tex.c
+++ b/src/mesa/drivers/dri/i965/intel_tex.c
@@ -1,315 +1 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "mtypes.h"
-#include "image.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texobj.h"
-#include "swrast/swrast.h"
-
-
-#include "intel_context.h"
-#include "intel_tex.h"
-#include "intel_mipmap_tree.h"
-
-
-static GLuint target_to_face( GLenum target )
-{
-   switch (target) {
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
-   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
-   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
-      return ((GLuint) target - 
-	      (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X);
-   default:
-      return 0;
-   }
-}
-
-static void intelTexImage1D( GLcontext *ctx, GLenum target, GLint level,
-			    GLint internalFormat,
-			    GLint width, GLint border,
-			    GLenum format, GLenum type, const GLvoid *pixels,
-			    const struct gl_pixelstore_attrib *packing,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-
-   _mesa_store_teximage1d( ctx, target, level, internalFormat,
-			   width, border, format, type,
-			   pixels, packing, texObj, texImage );
-
-   intelObj->dirty_images[0] |= (1 << level);
-   intelObj->dirty |= 1;
-}
-
-static void intelTexSubImage1D( GLcontext *ctx, 
-			       GLenum target,
-			       GLint level,	
-			       GLint xoffset,
-				GLsizei width,
-			       GLenum format, GLenum type,
-			       const GLvoid *pixels,
-			       const struct gl_pixelstore_attrib *packing,
-			       struct gl_texture_object *texObj,
-			       struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-
-   _mesa_store_texsubimage1d(ctx, target, level, xoffset, width, 
-			     format, type, pixels, packing, texObj,
-			     texImage);
-
-   intelObj->dirty_images[0] |= (1 << level);
-   intelObj->dirty |= 1;
-}
-
-
-/* Handles 2D, CUBE, RECT:
- */
-static void intelTexImage2D( GLcontext *ctx, GLenum target, GLint level,
-			    GLint internalFormat,
-			    GLint width, GLint height, GLint border,
-			    GLenum format, GLenum type, const GLvoid *pixels,
-			    const struct gl_pixelstore_attrib *packing,
-			    struct gl_texture_object *texObj,
-			    struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-   GLuint face = target_to_face(target);
-
-   _mesa_store_teximage2d( ctx, target, level, internalFormat,
-			   width, height, border, format, type,
-			   pixels, packing, texObj, texImage );
-
-   intelObj->dirty_images[face] |= (1 << level);
-   intelObj->dirty |= 1 << face;
-}
-
-static void intelTexSubImage2D( GLcontext *ctx, 
-			       GLenum target,
-			       GLint level,	
-			       GLint xoffset, GLint yoffset,
-			       GLsizei width, GLsizei height,
-			       GLenum format, GLenum type,
-			       const GLvoid *pixels,
-			       const struct gl_pixelstore_attrib *packing,
-			       struct gl_texture_object *texObj,
-			       struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-   GLuint face = target_to_face(target);
-
-   _mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width, 
-			     height, format, type, pixels, packing, texObj,
-			     texImage);
-
-   intelObj->dirty_images[face] |= (1 << level);
-   intelObj->dirty |= 1 << face;
-}
-
-static void intelCompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level,
-                              GLint internalFormat,
-                              GLint width, GLint height, GLint border,
-                              GLsizei imageSize, const GLvoid *data,
-                              struct gl_texture_object *texObj,
-                              struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-   GLuint face = target_to_face(target);
-
-   _mesa_store_compressed_teximage2d(ctx, target, level, internalFormat, width,
-				     height, border, imageSize, data, texObj, texImage);
-   
-   intelObj->dirty_images[face] |= (1 << level);
-   intelObj->dirty |= 1 << face;
-}
-
-
-static void intelCompressedTexSubImage2D( GLcontext *ctx, GLenum target, GLint level,
-                                 GLint xoffset, GLint yoffset,
-                                 GLsizei width, GLsizei height,
-                                 GLenum format,
-                                 GLsizei imageSize, const GLvoid *data,
-                                 struct gl_texture_object *texObj,
-                                 struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-   GLuint face = target_to_face(target);
-
-   _mesa_store_compressed_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
-					height, format, imageSize, data, texObj, texImage);
-   
-   intelObj->dirty_images[face] |= (1 << level);
-   intelObj->dirty |= 1 << face;
-}
-
-
-static void intelTexImage3D( GLcontext *ctx, GLenum target, GLint level,
-                            GLint internalFormat,
-                            GLint width, GLint height, GLint depth,
-                            GLint border,
-                            GLenum format, GLenum type, const GLvoid *pixels,
-                            const struct gl_pixelstore_attrib *packing,
-                            struct gl_texture_object *texObj,
-                            struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-
-   _mesa_store_teximage3d(ctx, target, level, internalFormat,
-			  width, height, depth, border,
-			  format, type, pixels,
-			  &ctx->Unpack, texObj, texImage);
-   
-   intelObj->dirty_images[0] |= (1 << level);
-   intelObj->dirty |= 1 << 0;
-}
-
-
-static void
-intelTexSubImage3D( GLcontext *ctx, GLenum target, GLint level,
-                   GLint xoffset, GLint yoffset, GLint zoffset,
-                   GLsizei width, GLsizei height, GLsizei depth,
-                   GLenum format, GLenum type,
-                   const GLvoid *pixels,
-                   const struct gl_pixelstore_attrib *packing,
-                   struct gl_texture_object *texObj,
-                   struct gl_texture_image *texImage )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-
-   _mesa_store_texsubimage3d(ctx, target, level, xoffset, yoffset, zoffset,
-                             width, height, depth,
-                             format, type, pixels, packing, texObj, texImage);
-
-   intelObj->dirty_images[0] |= (1 << level);
-   intelObj->dirty |= 1 << 0;
-}
-
-
-
-
-static struct gl_texture_object *intelNewTextureObject( GLcontext *ctx, 
-							GLuint name, 
-							GLenum target )
-{
-   struct intel_texture_object *obj = CALLOC_STRUCT(intel_texture_object);
-
-   _mesa_initialize_texture_object(&obj->base, name, target);
-
-   return &obj->base;
-}
-
-static GLboolean intelIsTextureResident(GLcontext *ctx,
-                                      struct gl_texture_object *texObj)
-{
-#if 0
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-   
-   return 
-      intelObj->mt && 
-      intelObj->mt->region && 
-      intel_is_region_resident(intel, intelObj->mt->region);
-#endif
-   return 1;
-}
-
-
-
-static void intelTexParameter( GLcontext *ctx, 
-			       GLenum target,
-			       struct gl_texture_object *texObj,
-			       GLenum pname, 
-			       const GLfloat *params )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
- 
-   switch (pname) {
-      /* Anything which can affect the calculation of firstLevel and
-       * lastLevel, as changes to these may invalidate the miptree.
-       */
-   case GL_TEXTURE_MIN_FILTER:
-   case GL_TEXTURE_MAG_FILTER:
-   case GL_TEXTURE_BASE_LEVEL:
-   case GL_TEXTURE_MAX_LEVEL:
-   case GL_TEXTURE_MIN_LOD:
-   case GL_TEXTURE_MAX_LOD:
-      intelObj->dirty |= 1;
-      break;
-
-   default:
-      break;
-   }
-}
-
-
-static void
-intel_delete_texture_object( GLcontext *ctx, struct gl_texture_object *texObj )
-{
-   struct intel_context *intel = intel_context(ctx);
-   struct intel_texture_object *intelObj = intel_texture_object(texObj);
-
-   if (intelObj->mt)
-      intel_miptree_destroy(intel, intelObj->mt);
-
-   _mesa_delete_texture_object( ctx, texObj );
-}
-
-void intelInitTextureFuncs( struct dd_function_table *functions )
-{
-   functions->NewTextureObject          = intelNewTextureObject;
-   functions->TexImage1D                = intelTexImage1D;
-   functions->TexImage2D                = intelTexImage2D;
-   functions->TexImage3D                = intelTexImage3D;
-   functions->TexSubImage1D             = intelTexSubImage1D;
-   functions->TexSubImage2D             = intelTexSubImage2D;
-   functions->TexSubImage3D             = intelTexSubImage3D;
-   functions->CopyTexImage1D            = _swrast_copy_teximage1d;
-   functions->CopyTexImage2D            = _swrast_copy_teximage2d;
-   functions->CopyTexSubImage1D         = _swrast_copy_texsubimage1d;
-   functions->CopyTexSubImage2D         = _swrast_copy_texsubimage2d;
-   functions->CopyTexSubImage3D         = _swrast_copy_texsubimage3d;
-   functions->DeleteTexture             = intel_delete_texture_object;
-   functions->UpdateTexturePalette      = NULL;
-   functions->IsTextureResident = intelIsTextureResident;
-   functions->TestProxyTexImage         = _mesa_test_proxy_teximage;
-   functions->CompressedTexImage2D      = intelCompressedTexImage2D;
-   functions->CompressedTexSubImage2D   = intelCompressedTexSubImage2D;
-   functions->TexParameter              = intelTexParameter;
-}
-
-
-
-
-
+../intel/intel_tex.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c b/src/mesa/drivers/dri/i965/intel_tex_copy.c
new file mode 120000
index 00000000000..87196c5d1ed
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_tex_copy.c
@@ -0,0 +1 @@
+../intel/intel_tex_copy.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_tex_format.c b/src/mesa/drivers/dri/i965/intel_tex_format.c
new file mode 120000
index 00000000000..3415f754705
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_tex_format.c
@@ -0,0 +1 @@
+../intel/intel_tex_format.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
new file mode 120000
index 00000000000..567abe4974e
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -0,0 +1 @@
+../intel/intel_tex_image.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
new file mode 120000
index 00000000000..b3a8a3d7ca7
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -0,0 +1 @@
+../intel/intel_tex_subimage.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c
index 44ee94614d5..41a75674c27 100644..120000
--- a/src/mesa/drivers/dri/i965/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c
@@ -1,256 +1 @@
-/**************************************************************************
- * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-#include "mtypes.h"
-#include "macros.h"
-
-#include "intel_context.h"
-#include "intel_mipmap_tree.h"
-#include "intel_tex.h"
-#include "bufmgr.h"
-
-/**
- * Compute which mipmap levels that really need to be sent to the hardware.
- * This depends on the base image size, GL_TEXTURE_MIN_LOD,
- * GL_TEXTURE_MAX_LOD, GL_TEXTURE_BASE_LEVEL, and GL_TEXTURE_MAX_LEVEL.
- */
-static void intel_calculate_first_last_level( struct intel_texture_object *intelObj )
-{
-   struct gl_texture_object *tObj = &intelObj->base;
-   const struct gl_texture_image * const baseImage =
-       tObj->Image[0][tObj->BaseLevel];
-
-   /* These must be signed values.  MinLod and MaxLod can be negative numbers,
-    * and having firstLevel and lastLevel as signed prevents the need for
-    * extra sign checks.
-    */
-   int   firstLevel;
-   int   lastLevel;
-
-   /* Yes, this looks overly complicated, but it's all needed.
-    */
-   switch (tObj->Target) {
-   case GL_TEXTURE_1D:
-   case GL_TEXTURE_2D:
-   case GL_TEXTURE_3D:
-   case GL_TEXTURE_CUBE_MAP:
-      if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
-         /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
-          */
-         firstLevel = lastLevel = tObj->BaseLevel;
-      }
-      else {
-	 /* Currently not taking min/max lod into account here, those
-	  * values are programmed as sampler state elsewhere and we
-	  * upload the same mipmap levels regardless.  Not sure if
-	  * this makes sense as it means it isn't possible for the app
-	  * to use min/max lod to reduce texture memory pressure:
-	  */
-	 firstLevel = tObj->BaseLevel;
-	 lastLevel = MIN2(tObj->BaseLevel + baseImage->MaxLog2, 
-			  tObj->MaxLevel);
-	 lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
-      }
-      break;
-   case GL_TEXTURE_RECTANGLE_NV:
-   case GL_TEXTURE_4D_SGIS:
-      firstLevel = lastLevel = 0;
-      break;
-   default:
-      return;
-   }
-
-   /* save these values */
-   intelObj->firstLevel = firstLevel;
-   intelObj->lastLevel = lastLevel;
-}
-
-static GLboolean copy_image_data_to_tree( struct intel_context *intel,
-					  struct intel_texture_object *intelObj,
-					  struct gl_texture_image *texImage,
-					  GLuint face,
-					  GLuint level)
-{
-   return intel_miptree_image_data(intel,
-				   intelObj->mt,
-				   face,
-				   level,
-				   texImage->Data,
-				   texImage->RowStride,
-				   (texImage->RowStride * 
-				    texImage->Height * 
-				    texImage->TexFormat->TexelBytes));
-}
-
-static void intel_texture_invalidate( struct intel_texture_object *intelObj )
-{
-   GLint nr_faces, face;
-   intelObj->dirty = ~0;
-
-   nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
-   for (face = 0; face < nr_faces; face++) 
-      intelObj->dirty_images[face] = ~0;
-}
-
-static void intel_texture_invalidate_cb( struct intel_context *intel,
-					 void *ptr )
-{
-   intel_texture_invalidate( (struct intel_texture_object *) ptr );
-}
-
-
-/*  
- */
-GLuint intel_finalize_mipmap_tree( struct intel_context *intel,
-				   struct gl_texture_object *tObj )
-{
-   struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   GLuint face, i;
-   GLuint nr_faces = 0;
-   struct gl_texture_image *firstImage;
-
-   if( tObj == intel->frame_buffer_texobj )
-      return GL_FALSE;
-   
-   /* We know/require this is true by now: 
-    */
-   assert(intelObj->base._Complete);
-
-   /* What levels must the tree include at a minimum?
-    */
-   if (intelObj->dirty) {
-      intel_calculate_first_last_level( intelObj );
-/*       intel_miptree_destroy(intel, intelObj->mt); */
-/*       intelObj->mt = NULL; */
-   }
-
-   firstImage = intelObj->base.Image[0][intelObj->firstLevel];
-
-   /* Fallback case:
-    */
-   if (firstImage->Border) {
-      if (intelObj->mt) {
-	 intel_miptree_destroy(intel, intelObj->mt);
-	 intelObj->mt = NULL;
-	 /* Set all images dirty:
-	  */
-	 intel_texture_invalidate(intelObj);
-      }
-      return GL_FALSE;
-   }
-
-
-
-   /* Check tree can hold all active levels.  Check tree matches
-    * target, imageFormat, etc.
-    */
-   if (intelObj->mt &&
-       (intelObj->mt->target != intelObj->base.Target ||
-	intelObj->mt->internal_format != firstImage->InternalFormat ||
-	intelObj->mt->first_level != intelObj->firstLevel ||
-	intelObj->mt->last_level != intelObj->lastLevel ||
-	intelObj->mt->width0 != firstImage->Width ||
-	intelObj->mt->height0 != firstImage->Height ||
-	intelObj->mt->depth0 != firstImage->Depth ||
-	intelObj->mt->cpp != firstImage->TexFormat->TexelBytes ||
-	intelObj->mt->compressed != firstImage->IsCompressed)) 
-   {
-      intel_miptree_destroy(intel, intelObj->mt);
-      intelObj->mt = NULL;
-      
-      /* Set all images dirty:
-       */
-      intel_texture_invalidate(intelObj);
-   }
-      
-
-   /* May need to create a new tree:
-    */
-   if (!intelObj->mt) {
-      intelObj->mt = intel_miptree_create(intel,
-					  intelObj->base.Target,
-					  firstImage->InternalFormat,
-					  intelObj->firstLevel,
-					  intelObj->lastLevel,
-					  firstImage->Width,
-					  firstImage->Height,
-					  firstImage->Depth,
-					  firstImage->TexFormat->TexelBytes,
-					  firstImage->IsCompressed);
-
-      /* Tell the buffer manager that we will manage the backing
-       * store, but we still want it to do fencing for us.
-       */
-      bmBufferSetInvalidateCB(intel, 
-			      intelObj->mt->region->buffer,
-			      intel_texture_invalidate_cb,
-			      intelObj,
-			      GL_FALSE);
-   }
-
-   /* Pull in any images not in the object's tree:
-    */
-   if (intelObj->dirty) {
-      nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
-      for (face = 0; face < nr_faces; face++) {
-	 if (intelObj->dirty_images[face]) {
-	    for (i = intelObj->firstLevel; i <= intelObj->lastLevel; i++) {
-	       struct gl_texture_image *texImage = intelObj->base.Image[face][i];
-
-	       /* Need to import images in main memory or held in other trees.
-		*/
-	       if (intelObj->dirty_images[face] & (1<<i) &&
-		   texImage) {
-
-		  if (INTEL_DEBUG & DEBUG_TEXTURE)
-		     _mesa_printf("copy data from image %d (%p) into object miptree\n",
-				  i,
-				  texImage->Data);
-
-		  if (!copy_image_data_to_tree(intel,
-					       intelObj,
-					       texImage,
-					       face,
-					       i))
-		     return GL_FALSE;
-
-	       }
-	    }
-	 }
-      }
-
-      /* Only clear the dirty flags if everything went ok:
-       */
-      for (face = 0; face < nr_faces; face++) {
-	 intelObj->dirty_images[face] = 0;
-      }
-
-      intelObj->dirty = 0;
-   }
-
-   return GL_TRUE;
-}
+../intel/intel_tex_validate.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/server/i830_common.h b/src/mesa/drivers/dri/i965/server/i830_common.h
deleted file mode 100644
index 49eb145f8bf..00000000000
--- a/src/mesa/drivers/dri/i965/server/i830_common.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/**************************************************************************
-
-Copyright 2001 VA Linux Systems Inc., Fremont, California.
-Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef _I830_COMMON_H_
-#define _I830_COMMON_H_
-
-
-#define I830_NR_TEX_REGIONS 255	/* maximum due to use of chars for next/prev */
-#define I830_LOG_MIN_TEX_REGION_SIZE 14
-
-
-/* Driver specific DRM command indices
- * NOTE: these are not OS specific, but they are driver specific
- */
-#define DRM_I830_INIT                     0x00
-#define DRM_I830_FLUSH                    0x01
-#define DRM_I830_FLIP                     0x02
-#define DRM_I830_BATCHBUFFER              0x03
-#define DRM_I830_IRQ_EMIT                 0x04
-#define DRM_I830_IRQ_WAIT                 0x05
-#define DRM_I830_GETPARAM                 0x06
-#define DRM_I830_SETPARAM                 0x07
-#define DRM_I830_ALLOC                    0x08
-#define DRM_I830_FREE                     0x09
-#define DRM_I830_INIT_HEAP                0x0a
-#define DRM_I830_CMDBUFFER                0x0b
-#define DRM_I830_DESTROY_HEAP             0x0c
-#define DRM_I830_MMIO		       	  0x10
-
-typedef struct {
-   enum {
-      I830_INIT_DMA = 0x01,
-      I830_CLEANUP_DMA = 0x02,
-      I830_RESUME_DMA = 0x03
-   } func;
-   unsigned int mmio_offset;
-   int sarea_priv_offset;
-   unsigned int ring_start;
-   unsigned int ring_end;
-   unsigned int ring_size;
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch;
-   unsigned int pitch_bits;
-   unsigned int back_pitch;
-   unsigned int depth_pitch;
-   unsigned int cpp;
-   unsigned int chipset;
-} drmI830Init;
-
-typedef struct {
-	drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
-        int last_upload;	/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
-        volatile int last_dispatch;	/* age of the most recently dispatched buffer */
-	int ctxOwner;		/* last context to upload state */
-	int texAge;
-        int pf_enabled;		/* is pageflipping allowed? */
-        int pf_active;               
-        int pf_current_page;	/* which buffer is being displayed? */
-        int perf_boxes;	        /* performance boxes to be displayed */   
-	int width, height;      /* screen size in pixels */
-
-	drm_handle_t front_handle;
-	int front_offset;
-	int front_size;
-
-	drm_handle_t back_handle;
-	int back_offset;
-	int back_size;
-
-	drm_handle_t depth_handle;
-	int depth_offset;
-	int depth_size;
-
-	drm_handle_t tex_handle;
-	int tex_offset;
-	int tex_size;
-	int log_tex_granularity;
-	int pitch;
-	int rotation;           /* 0, 90, 180 or 270 */
-	int rotated_offset;
-	int rotated_size;
-	int rotated_pitch;
-	int virtualX, virtualY;
-
-	unsigned int front_tiled;
-        unsigned int back_tiled;
-        unsigned int depth_tiled;
-        unsigned int rotated_tiled;
-        unsigned int rotated2_tiled;
-} drmI830Sarea;
-
-/* Flags for perf_boxes
- */
-#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
-#define I830_BOX_FLIP          0x2 /* populated by kernel */
-#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
-
-
-typedef struct {
-   	int start;		/* agp offset */
-	int used;		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830BatchBuffer;
-
-typedef struct {
-   	char *buf;		/* agp offset */
-	int sz; 		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830CmdBuffer;
- 
-typedef struct {
-	int *irq_seq;
-} drmI830IrqEmit;
-
-typedef struct {
-	int irq_seq;
-} drmI830IrqWait;
-
-typedef struct {
-	int param;
-	int *value;
-} drmI830GetParam;
-
-#define I830_PARAM_IRQ_ACTIVE     1
-#define I830_PARAM_ALLOW_BATCHBUFFER   2 
-
-typedef struct {
-	int param;
-	int value;
-} drmI830SetParam;
-
-#define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
-#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
-#define I830_SETPARAM_ALLOW_BATCHBUFFER         3
-
-
-/* A memory manager for regions of shared memory:
- */
-#define I830_MEM_REGION_AGP 1
-
-typedef struct {
-	int region;
-	int alignment;
-	int size;
-	int *region_offset;	/* offset from start of fb or agp */
-} drmI830MemAlloc;
-
-typedef struct {
-	int region;
-	int region_offset;
-} drmI830MemFree;
-
-typedef struct {
-	int region;
-	int size;
-	int start;	
-} drmI830MemInitHeap;
-
-typedef struct {
-	int region;
-} drmI830MemDestroyHeap;
-
-#define MMIO_READ  0
-#define MMIO_WRITE 1
-
-#define MMIO_REGS_IA_PRIMATIVES_COUNT           0
-#define MMIO_REGS_IA_VERTICES_COUNT             1
-#define MMIO_REGS_VS_INVOCATION_COUNT           2
-#define MMIO_REGS_GS_PRIMITIVES_COUNT           3
-#define MMIO_REGS_GS_INVOCATION_COUNT           4
-#define MMIO_REGS_CL_PRIMITIVES_COUNT           5
-#define MMIO_REGS_CL_INVOCATION_COUNT           6
-#define MMIO_REGS_PS_INVOCATION_COUNT           7
-#define MMIO_REGS_PS_DEPTH_COUNT                8
-
-typedef struct {
-        unsigned int read_write:1;
-        unsigned int reg:31;
-        void __user *data;
-} drmI830MMIO;
-
-#endif /* _I830_DRM_H_ */
diff --git a/src/mesa/drivers/dri/i965/server/intel_dri.c b/src/mesa/drivers/dri/i965/server/intel_dri.c
index 169fdbece30..effdd26448a 100644..120000
--- a/src/mesa/drivers/dri/i965/server/intel_dri.c
+++ b/src/mesa/drivers/dri/i965/server/intel_dri.c
@@ -1,1282 +1 @@
-/**
- * \file server/intel_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- * 
- * Copyright (C) 2006 Dave Airlie (airlied@linux.ie)
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sub license, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial portions
- of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
- ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-
-#include "intel.h"
-#include "i830_dri.h"
-
-#include "memops.h"
-#include "pciaccess.h"
-
-static size_t drm_page_size;
-static int nextTile = 0;
-#define xf86DrvMsg(...) do {} while(0)
-
-static const int pitches[] = {
-  128 * 8,
-  128 * 16,
-  128 * 32,
-  128 * 64,
-  0
-};
-
-static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea);
-
-static unsigned long
-GetBestTileAlignment(unsigned long size)
-{
-   unsigned long i;
-
-   for (i = KB(512); i < size; i <<= 1)
-      ;
-
-   if (i > MB(64))
-      i = MB(64);
-
-   return i;
-}
-
-static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-  for (i = 0; i < 8; i++) {
-    OUTREG(FENCE + i * 4, pI830->Fence[i]);
-    //    if (I810_DEBUG & DEBUG_VERBOSE_VGA)
-    fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]);
-  }
-}
-
-/* Tiled memory is good... really, really good...
- *
- * Need to make it less likely that we miss out on this - probably
- * need to move the frontbuffer away from the 'guarenteed' alignment
- * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.
- */
-static void
-SetFence(const DRIDriverContext *ctx, I830Rec *pI830,
-	 int nr, unsigned int start, unsigned int pitch,
-         unsigned int size)
-{
-   unsigned int val;
-   unsigned int fence_mask = 0;
-   unsigned int fence_pitch;
-
-   if (nr < 0 || nr > 7) {
-      fprintf(stderr,
-		 "SetFence: fence %d out of range\n",nr);
-      return;
-   }
-
-   pI830->Fence[nr] = 0;
-
-   if (IS_I9XX(pI830))
-   	fence_mask = ~I915G_FENCE_START_MASK;
-   else
-   	fence_mask = ~I830_FENCE_START_MASK;
-
-   if (start & fence_mask) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not %s aligned\n",
-		 nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k");
-      return;
-   }
-
-   if (start % size) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n",
-		 nr, start, size / 1024);
-      return;
-   }
-
-   if (pitch & 127) {
-      fprintf(stderr,
-		 "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n",
-		 nr, pitch);
-      return;
-   }
-
-   val = (start | FENCE_X_MAJOR | FENCE_VALID);
-
-   if (IS_I9XX(pI830)) {
-   	switch (size) {
-	   case MB(1):
-      		val |= I915G_FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= I915G_FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= I915G_FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= I915G_FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= I915G_FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= I915G_FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= I915G_FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-    } else {
-   	switch (size) {
-	   case KB(512):
-      		val |= FENCE_SIZE_512K;
-      		break;
-	   case MB(1):
-      		val |= FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-   }
-
-   if (IS_I9XX(pI830))
-	fence_pitch = pitch / 512;
-   else
-	fence_pitch = pitch / 128;
-
-   switch (fence_pitch) {
-   case 1:
-      val |= FENCE_PITCH_1;
-      break;
-   case 2:
-      val |= FENCE_PITCH_2;
-      break;
-   case 4:
-      val |= FENCE_PITCH_4;
-      break;
-   case 8:
-      val |= FENCE_PITCH_8;
-      break;
-   case 16:
-      val |= FENCE_PITCH_16;
-      break;
-   case 32:
-      val |= FENCE_PITCH_32;
-      break;
-   case 64:
-      val |= FENCE_PITCH_64;
-      break;
-   default:
-      fprintf(stderr,
-		 "SetFence: %d: illegal pitch (%d)\n", nr, pitch);
-      return;
-   }
-
-   pI830->Fence[nr] = val;
-}
-
-static Bool
-MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem)
-{
-   int pitch, ntiles, i;
-
-   pitch = pMem->Pitch * ctx->cpp;
-   /*
-    * Simply try to break the region up into at most four pieces of size
-    * equal to the alignment.
-    */
-   ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
-   if (ntiles >= 4) {
-      return FALSE;
-   }
-
-   for (i = 0; i < ntiles; i++, nextTile++) {
-     SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment,
-	       pitch, pMem->Alignment);
-   }
-   return TRUE;
-}
-
-static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-
-  /* Clear out */
-  for (i = 0; i < 8; i++)
-    pI830->Fence[i] = 0;
-  
-  nextTile = 0;
-
-  if (pI830->BackBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the back buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the back buffer.\n");
-      pI830->allowPageFlip = FALSE;
-    }
-  }
-  
-  if (pI830->DepthBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the depth buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the depth buffer.\n");
-    }
-  }
-
-  return;
-}
-
-static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  struct pci_device host_bridge;
-  uint32_t gmch_ctrl;
-  int memsize = 0;
-  int range;
-
-  memset(&host_bridge, 0, sizeof(host_bridge));
-
-  pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL);
-  
-  /* We need to reduce the stolen size, by the GTT and the popup.
-   * The GTT varying according the the FbMapSize and the popup is 4KB */
-  range = (ctx->shared.fbSize / (1024*1024)) + 4;
-
-   if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I855_GMCH_GMS_STOLEN_1M:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_4M:
-	 memsize = MB(4) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_8M:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_16M:
-	 memsize = MB(16) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_32M:
-	 memsize = MB(32) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_48M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(48) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_64M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(64) - KB(range);
-	 break;
-      }
-   } else {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I830_GMCH_GMS_STOLEN_512:
-	 memsize = KB(512) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_1024:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_8192:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I830_GMCH_GMS_LOCAL:
-	 memsize = 0;
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Local memory found, but won't be used.\n");
-	 break;
-      }
-   }
-   if (memsize > 0) {
-     fprintf(stderr,
-		 "detected %d kB stolen memory.\n", memsize / 1024);
-   } else {
-     fprintf(stderr,
-		 "no video memory detected.\n");
-   }
-   return memsize;
-}
-
-static int AgpInit(const DRIDriverContext *ctx, I830Rec *info)
-{
-  unsigned long mode = 0x4;
-
-  if (drmAgpAcquire(ctx->drmFD) < 0) {
-    fprintf(stderr, "[gart] AGP not available\n");
-    return 0;
-  }
-  
-  if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-    fprintf(stderr, "[gart] AGP not enabled\n");
-    drmAgpRelease(ctx->drmFD);
-    return 0;
-  }
-  else
-    fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
-
-  return 1;
-}
-
-/*
- * Allocate memory from the given pool.  Grow the pool if needed and if
- * possible.
- */
-static unsigned long
-AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, 
-	      I830MemRange *result, I830MemPool *pool,
-	      long size, unsigned long alignment, int flags)
-{
-   long needed, start, end;
-
-   if (!result || !pool || !size)
-      return 0;
-
-   /* Calculate how much space is needed. */
-   if (alignment <= GTT_PAGE_SIZE)
-      needed = size;
-   else {
-	 start = ROUND_TO(pool->Free.Start, alignment);
-	 end = ROUND_TO(start + size, alignment);
-	 needed = end - pool->Free.Start;
-   }
-   if (needed > pool->Free.Size) {
-     return 0;
-   }
-
-   result->Start = ROUND_TO(pool->Free.Start, alignment);
-   pool->Free.Start += needed;
-   result->End = pool->Free.Start;
-
-   pool->Free.Size = pool->Free.End - pool->Free.Start;
-   result->Size = result->End - result->Start;
-   result->Pool = pool;
-   result->Alignment = alignment;
-   return needed;
-}
-
-static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange  *result)
-{
-   unsigned long start, end;
-   unsigned long newApStart, newApEnd;
-   int ret;
-   if (!result || !size)
-      return 0;
-   
-   if (!alignment)
-     alignment = 4;
-
-   start = ROUND_TO(pI830->MemoryAperture.Start, alignment);
-   end = ROUND_TO(start + size, alignment);
-   newApStart = end;
-   newApEnd = pI830->MemoryAperture.End;
-
-   ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key));
-   
-   if (ret)
-   {
-     fprintf(stderr,"drmAgpAlloc failed %d\n", ret);
-     return 0;
-   }
-   pI830->allocatedMemory += size;
-   pI830->MemoryAperture.Start = newApStart;
-   pI830->MemoryAperture.End = newApEnd;
-   pI830->MemoryAperture.Size = newApEnd - newApStart;
-   //   pI830->FreeMemory -= size;
-   result->Start = start;
-   result->End = start + size;
-   result->Size = size;
-   result->Offset = start;
-   result->Alignment = alignment;
-   result->Pool = NULL;
-  
-   return size;
-}
-
-unsigned long
-I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *result, I830MemPool *pool, long size, unsigned long alignment, int flags)
-{
-  int ret;
-
-  if (!result)
-    return 0;
-
-   /* Make sure these are initialised. */
-   result->Size = 0;
-   result->Key = -1;
-
-   if (!size) {
-      return 0;
-   }
-
-   if (pool->Free.Size < size)
-     return AllocFromAGP(ctx, pI830, size, alignment, result);
-   else
-   {
-     ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags);
-
-     if (ret==0)
-       return AllocFromAGP(ctx, pI830, size, alignment, result);
-     return ret;
-   }
-}
-
-static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem)
-{
-  if (!mem)
-    return FALSE;
-  
-  if (mem->Key == -1)
-    return TRUE;
-
-  return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset);
-}
-
-/* simple memory allocation routines needed */
-/* put ring buffer in low memory */
-/* need to allocate front, back, depth buffers aligned correctly,
-   allocate ring buffer, 
-*/
-
-/* */
-static Bool
-I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long size, ret;
-  unsigned long lines, lineSize, align;
-
-  /* allocate ring buffer */
-  memset(pI830->LpRing, 0, sizeof(I830RingBuffer));
-  pI830->LpRing->mem.Key = -1;
-
-  size = PRIMARY_RINGBUFFER_SIZE;
-  
-  ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0);
-  
-  if (ret != size)
-  {
-    fprintf(stderr,"unable to allocate ring buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1;
-
-  
-  /* allocate front buffer */
-  memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
-  pI830->FrontBuffer.Key = -1;
-  pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth;
-
-  align = KB(512);  
-
-  lineSize = ctx->shared.virtualWidth * ctx->cpp;
-  lines = (ctx->shared.virtualHeight + 15) / 16 * 16;
-  size = lineSize * lines;
-  size = ROUND_TO_PAGE(size);
-
-  align = GetBestTileAlignment(size);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate front buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
-  pI830->BackBuffer.Key = -1;
-  pI830->BackBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate back buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
-  pI830->DepthBuffer.Key = -1;
-  pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate depth buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
-  pI830->ContextMem.Key = -1;
-  size = KB(32);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate context buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
-  pI830->TexMem.Key = -1;
-
-  size = 32768 * 1024;
-  ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate texture memory %ld\n", ret);
-    return FALSE;
-  }
-
-  return TRUE;
-}
-
-static Bool
-I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  if (!BindAgpRange(ctx, &pI830->LpRing->mem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->FrontBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->BackBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->DepthBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->ContextMem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->TexMem))
-    return FALSE;
-
-  return TRUE;
-}
-
-static Bool
-I830CleanupDma(const DRIDriverContext *ctx)
-{
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_CLEANUP_DMA;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-     fprintf(stderr, "I830 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-   I830RingBuffer *ring = pI830->LpRing;
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_INIT_DMA;
-
-   info.ring_start = ring->mem.Start + pI830->LinearAddr;
-   info.ring_end = ring->mem.End + pI830->LinearAddr;
-   info.ring_size = ring->mem.Size;
-
-   info.mmio_offset = (unsigned int)ctx->MMIOStart;
-
-   info.sarea_priv_offset = sizeof(drm_sarea_t);
-
-   info.front_offset = pI830->FrontBuffer.Start;
-   info.back_offset = pI830->BackBuffer.Start;
-   info.depth_offset = pI830->DepthBuffer.Start;
-   info.w = ctx->shared.virtualWidth;
-   info.h = ctx->shared.virtualHeight;
-   info.pitch = ctx->shared.virtualWidth;
-   info.back_pitch = pI830->BackBuffer.Pitch;
-   info.depth_pitch = pI830->DepthBuffer.Pitch;
-   info.cpp = ctx->cpp;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-      fprintf(stderr,
-		 "I830 Dma Initialization Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static int I830CheckDRMVersion( const DRIDriverContext *ctx,
-				  I830Rec *pI830 )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-
-   if (version) {
-     int req_minor, req_patch;
-
-     req_minor = 4;
-     req_patch = 0;	
-
-     if (version->version_major != 1 ||
-	 version->version_minor < req_minor ||
-	 (version->version_minor == req_minor && 
-	  version->version_patchlevel < req_patch)) {
-       /* Incompatible drm version */
-       fprintf(stderr,
-	       "[dri] I830DRIScreenInit failed because of a version "
-	       "mismatch.\n"
-	       "[dri] i915.o kernel module version is %d.%d.%d "
-	       "but version 1.%d.%d or newer is needed.\n"
-	       "[dri] Disabling DRI.\n",
-	       version->version_major,
-	       version->version_minor,
-	       version->version_patchlevel,
-	       req_minor,
-	       req_patch);
-       drmFreeVersion(version);
-       return 0;
-     }
-     
-     pI830->drmMinor = version->version_minor;
-     drmFreeVersion(version);
-   }
-   return 1;
-}
-
-static void
-I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned int itemp;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-   OUTREG(LP_RING + RING_LEN, 0);
-   OUTREG(LP_RING + RING_TAIL, 0);
-   OUTREG(LP_RING + RING_HEAD, 0);
-
-   if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) !=
-       pI830->LpRing->mem.Start) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer start (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK;
-   OUTREG(LP_RING + RING_START, itemp);
-
-   if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) !=
-       pI830->LpRing->mem.Size - 4096) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Size - 4096,
-		 I830_RING_NR_PAGES);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES;
-   itemp |= (RING_NO_REPORT | RING_VALID);
-   OUTREG(LP_RING + RING_LEN, itemp);
-
-   pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-   pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
-   pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
-   if (pI830->LpRing->space < 0)
-      pI830->LpRing->space += pI830->LpRing->mem.Size;
-
-   SetFenceRegs(ctx, pI830);
-   
-   /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky
-      hacky hacky */
-   OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr);
-
-}
-
-static Bool
-I830SetParam(const DRIDriverContext *ctx, int param, int value)
-{
-   drmI830SetParam sp;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
-      fprintf(stderr, "I830 SetParam Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   fprintf(stderr,
-              "[drm] Mapping front buffer\n");
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
-                 sarea->front_size,
-                 DRM_FRAME_BUFFER,  /*DRM_AGP,*/
-                 0,
-                 &sarea->front_handle) < 0) {
-     fprintf(stderr,
-	     "[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   ctx->shared.hFrameBuffer = sarea->front_handle;
-   ctx->shared.fbSize = sarea->front_size;
-   fprintf(stderr, "[drm] Front Buffer = 0x%08x\n",
-	   sarea->front_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->back_offset),
-                 sarea->back_size, DRM_AGP, 0,
-                 &sarea->back_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(back_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Back Buffer = 0x%08x\n",
-              sarea->back_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)sarea->depth_offset,
-                 sarea->depth_size, DRM_AGP, 0,
-                 &sarea->depth_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n",
-              sarea->depth_handle);
-
-   if (drmAddMap(ctx->drmFD,
-		 (drm_handle_t)sarea->tex_offset,
-		 sarea->tex_size, DRM_AGP, 0,
-		 &sarea->tex_handle) < 0) {
-      fprintf(stderr,
-		 "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] textures = 0x%08x\n",
-	      sarea->tex_handle);
-
-   return TRUE;
-}
-
-
-static void
-I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-#if 1
-   if (sarea->front_handle) {
-      drmRmMap(ctx->drmFD, sarea->front_handle);
-      sarea->front_handle = 0;
-   }
-#endif
-   if (sarea->back_handle) {
-      drmRmMap(ctx->drmFD, sarea->back_handle);
-      sarea->back_handle = 0;
-   }
-   if (sarea->depth_handle) {
-      drmRmMap(ctx->drmFD, sarea->depth_handle);
-      sarea->depth_handle = 0;
-   }
-   if (sarea->tex_handle) {
-      drmRmMap(ctx->drmFD, sarea->tex_handle);
-      sarea->tex_handle = 0;
-   }
-}
-
-static void
-I830InitTextureHeap(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   /* Start up the simple memory manager for agp space */
-   drmI830MemInitHeap drmHeap;
-   drmHeap.region = I830_MEM_REGION_AGP;
-   drmHeap.start  = 0;
-   drmHeap.size   = sarea->tex_size;
-      
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT_HEAP,
-			  &drmHeap, sizeof(drmHeap))) {
-      fprintf(stderr,
-		    "[drm] Failed to initialized agp heap manager\n");
-   } else {
-      fprintf(stderr,
-		    "[drm] Initialized kernel agp heap manager, %d\n",
-		    sarea->tex_size);
-
-      I830SetParam(ctx, I830_SETPARAM_TEX_LRU_LOG_GRANULARITY, 
-		      sarea->log_tex_granularity);
-   }
-}
-
-static Bool
-I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  if (drmAddMap(ctx->drmFD,
-		(drm_handle_t)pI830->LpRing->mem.Start,
-		pI830->LpRing->mem.Size, DRM_AGP, 0,
-		&pI830->ring_map) < 0) {
-    fprintf(stderr,
-	    "[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
-    return FALSE;
-  }
-  fprintf(stderr, "[drm] ring buffer = 0x%08x\n",
-	  pI830->ring_map);
-
-  if (I830InitDma(ctx, pI830) == FALSE) {
-    return FALSE;
-  }
-  
-   /* init to zero to be safe */
-
-  I830DRIMapScreenRegions(ctx, pI830, sarea);
-  I830InitTextureHeap(ctx, pI830, sarea);
-
-   if (ctx->pciDevice != PCI_CHIP_845_G &&
-       ctx->pciDevice != PCI_CHIP_I830_M) {
-      I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
-   }
-
-   /* Okay now initialize the dma engine */
-   {
-      pI830->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					    ctx->pciBus,
-					    ctx->pciDevice,
-					    ctx->pciFunc);
-
-      if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) {
-	 fprintf(stderr,
-		    "[drm] failure adding irq handler\n");
-	 pI830->irq = 0;
-	 return FALSE;
-      }
-      else
-	 fprintf(stderr,
-		    "[drm] dma control initialized, using IRQ %d\n",
-		    pI830->irq);
-   }
-
-   fprintf(stderr, "[dri] visual configs initialized\n");
-
-   return TRUE;
-}
-
-static Bool
-I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  /* need to drmMap front and back buffers and zero them */
-  drmAddress map_addr;
-  int ret;
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->front_handle,
-	       sarea->front_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map front buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->front_size);
-  drmUnmap(map_addr, sarea->front_size);
-
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->back_handle,
-	       sarea->back_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map back buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->back_size);
-  drmUnmap(map_addr, sarea->back_size);
-
-  return TRUE;
-}
-
-static Bool
-I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830)
-		  
-{
-   I830DRIPtr pI830DRI;
-   drmI830Sarea *pSAREAPriv;
-   int err;
-      
-   drm_page_size = getpagesize();   
-
-   pI830->registerSize = ctx->MMIOSize;
-   /* This is a hack for now.  We have to have more than a 4k page here
-    * because of the size of the state.  However, the state should be
-    * in a per-context mapping.  This will be added in the Mesa 3.5 port
-    * of the I830 driver.
-    */
-   ctx->shared.SAREASize = SAREA_MAX;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("i915", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-     fprintf(stderr, "[drm] drmAddMap failed\n");
-     return 0;
-   }
-
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-   
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   
-   }
-   
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pI830->registerHandle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08x\n", pI830->registerHandle);
-
-
-   if (!I830CheckDRMVersion(ctx, pI830)) {
-     return FALSE;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the SAREA private data structure */
-   pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				 sizeof(drm_sarea_t));
-   memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
-   pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830);
-   pI830->StolenMemory.Start = 0;
-   pI830->StolenMemory.End = pI830->StolenMemory.Size;
-
-   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
-   pI830->MemoryAperture.End = KB(40000);
-   pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start;
-
-   pI830->StolenPool.Fixed = pI830->StolenMemory;
-   pI830->StolenPool.Total = pI830->StolenMemory;
-   pI830->StolenPool.Free = pI830->StolenPool.Total;
-   pI830->FreeMemory = pI830->StolenPool.Total.Size;
-
-   if (!AgpInit(ctx, pI830))
-     return FALSE;
-
-   if (I830AllocateMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   if (I830BindMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   pSAREAPriv->front_offset = pI830->FrontBuffer.Start;
-   pSAREAPriv->front_size = pI830->FrontBuffer.Size;
-   pSAREAPriv->width = ctx->shared.virtualWidth;
-   pSAREAPriv->height = ctx->shared.virtualHeight;
-   pSAREAPriv->pitch = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualX = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualY = ctx->shared.virtualHeight;
-   pSAREAPriv->back_offset = pI830->BackBuffer.Start;
-   pSAREAPriv->back_size = pI830->BackBuffer.Size;
-   pSAREAPriv->depth_offset = pI830->DepthBuffer.Start;
-   pSAREAPriv->depth_size = pI830->DepthBuffer.Size;
-   pSAREAPriv->tex_offset = pI830->TexMem.Start;
-   pSAREAPriv->tex_size = pI830->TexMem.Size;
-   pSAREAPriv->log_tex_granularity = pI830->TexGranularity;
-
-   ctx->driverClientMsg = malloc(sizeof(I830DRIRec));
-   ctx->driverClientMsgSize = sizeof(I830DRIRec);
-   pI830DRI = (I830DRIPtr)ctx->driverClientMsg;
-   pI830DRI->deviceID = pI830->Chipset;
-   pI830DRI->regsSize = I830_REG_SIZE;
-   pI830DRI->width = ctx->shared.virtualWidth;
-   pI830DRI->height = ctx->shared.virtualHeight;
-   pI830DRI->mem = ctx->shared.fbSize;
-   pI830DRI->cpp = ctx->cpp;
-   pI830DRI->backOffset = pI830->BackBuffer.Start;
-   pI830DRI->backPitch = pI830->BackBuffer.Pitch; 
-
-   pI830DRI->depthOffset = pI830->DepthBuffer.Start;
-   pI830DRI->depthPitch = pI830->DepthBuffer.Pitch; 
-
-   pI830DRI->fbOffset = pI830->FrontBuffer.Start;
-   pI830DRI->fbStride = pI830->FrontBuffer.Pitch;
-
-   pI830DRI->bitsPerPixel = ctx->bpp;
-   pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-   
-   err = I830DRIDoMappings(ctx, pI830, pSAREAPriv);
-   if (err == FALSE)
-       return FALSE;
-
-   I830SetupMemoryTiling(ctx, pI830);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   I830ClearScreen(ctx, pI830, pSAREAPriv);
-
-   I830SetRingRegs(ctx, pI830);
-
-   return TRUE;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int i830ValidateMode( const DRIDriverContext *ctx )
-{
-  return 1;
-}
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i830PostValidateMode( const DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = ctx->driverPrivate;
-
-  I830SetRingRegs(ctx, pI830);
-  return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls I810ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int i830InitFBDev( DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = calloc(1, sizeof(I830Rec));
-  int i;
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-      ctx->shared.Width = ctx->shared.virtualWidth;
-   }
-
-
-   for (i = 0; pitches[i] != 0; i++) {
-     if (pitches[i] >= ctx->shared.virtualWidth) {
-       ctx->shared.virtualWidth = pitches[i];
-       break;
-     }
-   }
-
-   ctx->driverPrivate = (void *)pI830;
-   
-   pI830->LpRing = calloc(1, sizeof(I830RingBuffer));
-   pI830->Chipset = ctx->chipset;
-   pI830->LinearAddr = ctx->FBStart;
-
-   if (!I830ScreenInit( ctx, pI830 ))
-      return 0;
-
-   
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void i830HaltFBDev( DRIDriverContext *ctx )
-{
-  drmI830Sarea *pSAREAPriv;
-  I830Rec *pI830 = ctx->driverPrivate;
-
-   if (pI830->irq) {
-       drmCtlUninstHandler(ctx->drmFD);
-       pI830->irq = 0;   }
-
-   I830CleanupDma(ctx);
-
-  pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				sizeof(drm_sarea_t));
-
-  I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv);
-  drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-  drmClose(ctx->drmFD);
-  
-  if (ctx->driverPrivate) {
-    free(ctx->driverPrivate);
-    ctx->driverPrivate = 0;
-  }
-}
-
-
-extern void i810NotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   i830ValidateMode,
-   i830PostValidateMode,
-   i830InitFBDev,
-   i830HaltFBDev,
-   NULL,//I830EngineShutdown,
-   NULL, //I830EngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   i810NotifyFocus, 
-#endif
-};
+../../intel/server/intel_dri.c
\ No newline at end of file
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
new file mode 100644
index 00000000000..9d9937289a8
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -0,0 +1,301 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_decode.h"
+#include "intel_reg.h"
+#include "intel_bufmgr.h"
+#include "intel_buffers.h"
+
+/* Relocations in kernel space:
+ *    - pass dma buffer seperately
+ *    - memory manager knows how to patch
+ *    - pass list of dependent buffers
+ *    - pass relocation list
+ *
+ * Either:
+ *    - get back an offset for buffer to fire
+ *    - memory manager knows how to fire buffer
+ *
+ * Really want the buffer to be AGP and pinned.
+ *
+ */
+
+/* Cliprect fence: The highest fence protecting a dma buffer
+ * containing explicit cliprect information.  Like the old drawable
+ * lock but irq-driven.  X server must wait for this fence to expire
+ * before changing cliprects [and then doing sw rendering?].  For
+ * other dma buffers, the scheduler will grab current cliprect info
+ * and mix into buffer.  X server must hold the lock while changing
+ * cliprects???  Make per-drawable.  Need cliprects in shared memory
+ * -- beats storing them with every cmd buffer in the queue.
+ *
+ * ==> X server must wait for this fence to expire before touching the
+ * framebuffer with new cliprects.
+ *
+ * ==> Cliprect-dependent buffers associated with a
+ * cliprect-timestamp.  All of the buffers associated with a timestamp
+ * must go to hardware before any buffer with a newer timestamp.
+ *
+ * ==> Dma should be queued per-drawable for correct X/GL
+ * synchronization.  Or can fences be used for this?
+ *
+ * Applies to: Blit operations, metaops, X server operations -- X
+ * server automatically waits on its own dma to complete before
+ * modifying cliprects ???
+ */
+
+void
+intel_batchbuffer_reset(struct intel_batchbuffer *batch)
+{
+   struct intel_context *intel = batch->intel;
+
+   if (batch->buf != NULL) {
+      dri_bo_unreference(batch->buf);
+      batch->buf = NULL;
+   }
+
+   if (!batch->buffer && intel->ttm == GL_TRUE)
+      batch->buffer = malloc (intel->maxBatchSize);
+
+   batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
+			     intel->maxBatchSize, 4096);
+   if (batch->buffer)
+      batch->map = batch->buffer;
+   else {
+      dri_bo_map(batch->buf, GL_TRUE);
+      batch->map = batch->buf->virtual;
+   }
+   batch->size = intel->maxBatchSize;
+   batch->ptr = batch->map;
+   batch->dirty_state = ~0;
+   batch->cliprect_mode = IGNORE_CLIPRECTS;
+}
+
+struct intel_batchbuffer *
+intel_batchbuffer_alloc(struct intel_context *intel)
+{
+   struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
+
+   batch->intel = intel;
+   intel_batchbuffer_reset(batch);
+
+   return batch;
+}
+
+void
+intel_batchbuffer_free(struct intel_batchbuffer *batch)
+{
+   if (batch->buffer)
+      free (batch->buffer);
+   else {
+      if (batch->map) {
+	 dri_bo_unmap(batch->buf);
+	 batch->map = NULL;
+      }
+   }
+   dri_bo_unreference(batch->buf);
+   batch->buf = NULL;
+   free(batch);
+}
+
+
+
+/* TODO: Push this whole function into bufmgr.
+ */
+static void
+do_flush_locked(struct intel_batchbuffer *batch,
+		GLuint used, GLboolean allow_unlock)
+{
+   struct intel_context *intel = batch->intel;
+   int ret = 0;
+   unsigned int num_cliprects = 0;
+   struct drm_clip_rect *cliprects = NULL;
+   int x_off = 0, y_off = 0;
+
+   if (batch->buffer)
+      dri_bo_subdata (batch->buf, 0, used, batch->buffer);
+   else
+      dri_bo_unmap(batch->buf);
+
+   batch->map = NULL;
+   batch->ptr = NULL;
+
+
+   if (batch->cliprect_mode == LOOP_CLIPRECTS) {
+      intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+   }
+   /* Dispatch the batchbuffer, if it has some effect (nonzero cliprects).
+    * Can't short-circuit like this once we have hardware contexts, but we
+    * should always be in DRI2 mode by then anyway.
+    */
+   if ((batch->cliprect_mode != LOOP_CLIPRECTS ||
+	num_cliprects != 0) && !intel->no_hw) {
+      dri_bo_exec(batch->buf, used, cliprects, num_cliprects,
+		  (x_off & 0xffff) | (y_off << 16));
+   }
+
+   if (batch->cliprect_mode == LOOP_CLIPRECTS && num_cliprects == 0) {
+      if (allow_unlock) {
+	 /* If we are not doing any actual user-visible rendering,
+	  * do a sched_yield to keep the app from pegging the cpu while
+	  * achieving nothing.
+	  */
+         UNLOCK_HARDWARE(intel);
+         sched_yield();
+         LOCK_HARDWARE(intel);
+      }
+   }
+
+   if (INTEL_DEBUG & DEBUG_BATCH) {
+      dri_bo_map(batch->buf, GL_FALSE);
+      intel_decode(batch->buf->virtual, used / 4, batch->buf->offset,
+		   intel->intelScreen->deviceID);
+      dri_bo_unmap(batch->buf);
+
+      if (intel->vtbl.debug_batch != NULL)
+	 intel->vtbl.debug_batch(intel);
+   }
+
+   if (ret != 0) {
+      UNLOCK_HARDWARE(intel);
+      exit(1);
+   }
+   intel->vtbl.new_batch(intel);
+}
+
+void
+_intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
+			 int line)
+{
+   struct intel_context *intel = batch->intel;
+   GLuint used = batch->ptr - batch->map;
+   GLboolean was_locked = intel->locked;
+
+   if (used == 0) {
+      batch->cliprect_mode = IGNORE_CLIPRECTS;
+      return;
+   }
+
+   if (INTEL_DEBUG & DEBUG_BATCH)
+      fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line,
+	      used);
+
+   /* Emit a flush if the bufmgr doesn't do it for us. */
+   if (!intel->ttm) {
+      *(GLuint *) (batch->ptr) = intel->vtbl.flush_cmd();
+      batch->ptr += 4;
+      used = batch->ptr - batch->map;
+   }
+
+   /* Round batchbuffer usage to 2 DWORDs. */
+
+   if ((used & 4) == 0) {
+      *(GLuint *) (batch->ptr) = 0; /* noop */
+      batch->ptr += 4;
+      used = batch->ptr - batch->map;
+   }
+
+   /* Mark the end of the buffer. */
+   *(GLuint *) (batch->ptr) = MI_BATCH_BUFFER_END; /* noop */
+   batch->ptr += 4;
+   used = batch->ptr - batch->map;
+
+   /* Workaround for recursive batchbuffer flushing: If the window is
+    * moved, we can get into a case where we try to flush during a
+    * flush.  What happens is that when we try to grab the lock for
+    * the first flush, we detect that the window moved which then
+    * causes another flush (from the intel_draw_buffer() call in
+    * intelUpdatePageFlipping()).  To work around this we reset the
+    * batchbuffer tail pointer before trying to get the lock.  This
+    * prevent the nested buffer flush, but a better fix would be to
+    * avoid that in the first place. */
+   batch->ptr = batch->map;
+
+   if (intel->vtbl.finish_batch)
+      intel->vtbl.finish_batch(intel);
+
+   /* TODO: Just pass the relocation list and dma buffer up to the
+    * kernel.
+    */
+   if (!was_locked)
+      LOCK_HARDWARE(intel);
+
+   do_flush_locked(batch, used, GL_FALSE);
+
+   if (!was_locked)
+      UNLOCK_HARDWARE(intel);
+
+   if (INTEL_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "waiting for idle\n");
+      dri_bo_map(batch->buf, GL_TRUE);
+      dri_bo_unmap(batch->buf);
+   }
+
+   /* Reset the buffer:
+    */
+   intel_batchbuffer_reset(batch);
+}
+
+
+/*  This is the only way buffers get added to the validate list.
+ */
+GLboolean
+intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
+                             dri_bo *buffer,
+                             uint32_t read_domains, uint32_t write_domain,
+			     uint32_t delta)
+{
+   int ret;
+
+   if (batch->ptr - batch->map > batch->buf->size)
+    _mesa_printf ("bad relocation ptr %p map %p offset %d size %d\n",
+		  batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
+   ret = dri_bo_emit_reloc(batch->buf, read_domains, write_domain,
+			   delta, batch->ptr - batch->map, buffer);
+
+   /*
+    * Using the old buffer offset, write in what the right data would be, in case
+    * the buffer doesn't move and we can short-circuit the relocation processing
+    * in the kernel
+    */
+   intel_batchbuffer_emit_dword (batch, buffer->offset + delta);
+
+   return GL_TRUE;
+}
+
+void
+intel_batchbuffer_data(struct intel_batchbuffer *batch,
+                       const void *data, GLuint bytes,
+		       enum cliprect_mode cliprect_mode)
+{
+   assert((bytes & 3) == 0);
+   intel_batchbuffer_require_space(batch, bytes, cliprect_mode);
+   __memcpy(batch->ptr, data, bytes);
+   batch->ptr += bytes;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.h b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
new file mode 100644
index 00000000000..51579df09e7
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
@@ -0,0 +1,184 @@
+#ifndef INTEL_BATCHBUFFER_H
+#define INTEL_BATCHBUFFER_H
+
+#include "main/mtypes.h"
+
+#include "intel_context.h"
+#include "intel_bufmgr.h"
+#include "intel_reg.h"
+
+#define BATCH_SZ 16384
+#define BATCH_RESERVED 16
+
+enum cliprect_mode {
+   /**
+    * Batchbuffer contents may be looped over per cliprect, but do not
+    * require it.
+    */
+   IGNORE_CLIPRECTS,
+   /**
+    * Batchbuffer contents require looping over per cliprect at batch submit
+    * time.
+    *
+    * This will be upgraded to NO_LOOP_CLIPRECTS when there's a single
+    * constant cliprect, as in DRI2 or FBO rendering.
+    */
+   LOOP_CLIPRECTS,
+   /**
+    * Batchbuffer contents contain drawing that should not be executed multiple
+    * times.
+    */
+   NO_LOOP_CLIPRECTS,
+   /**
+    * Batchbuffer contents contain drawing that already handles cliprects, such
+    * as 2D drawing to front/back/depth that doesn't respect DRAWING_RECTANGLE.
+    *
+    * Equivalent behavior to NO_LOOP_CLIPRECTS, but may not persist in batch
+    * outside of LOCK/UNLOCK.  This is upgraded to just NO_LOOP_CLIPRECTS when
+    * there's a constant cliprect, as in DRI2 or FBO rendering.
+    */
+   REFERENCES_CLIPRECTS
+};
+
+struct intel_batchbuffer
+{
+   struct intel_context *intel;
+
+   dri_bo *buf;
+
+   GLubyte *buffer;
+
+   GLubyte *map;
+   GLubyte *ptr;
+
+   enum cliprect_mode cliprect_mode;
+
+   GLuint size;
+
+   /** Tracking of BEGIN_BATCH()/OUT_BATCH()/ADVANCE_BATCH() debugging */
+   struct {
+      GLuint total;
+      GLubyte *start_ptr;
+   } emit;
+
+   GLuint dirty_state;
+};
+
+struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context
+                                                  *intel);
+
+void intel_batchbuffer_free(struct intel_batchbuffer *batch);
+
+
+void _intel_batchbuffer_flush(struct intel_batchbuffer *batch,
+			      const char *file, int line);
+
+#define intel_batchbuffer_flush(batch) \
+	_intel_batchbuffer_flush(batch, __FILE__, __LINE__)
+
+void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
+
+
+/* Unlike bmBufferData, this currently requires the buffer be mapped.
+ * Consider it a convenience function wrapping multple
+ * intel_buffer_dword() calls.
+ */
+void intel_batchbuffer_data(struct intel_batchbuffer *batch,
+                            const void *data, GLuint bytes,
+			    enum cliprect_mode cliprect_mode);
+
+void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
+                                     GLuint bytes);
+
+GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
+                                       dri_bo *buffer,
+				       uint32_t read_domains,
+				       uint32_t write_domain,
+				       uint32_t offset);
+
+/* Inline functions - might actually be better off with these
+ * non-inlined.  Certainly better off switching all command packets to
+ * be passed as structs rather than dwords, but that's a little bit of
+ * work...
+ */
+static INLINE GLint
+intel_batchbuffer_space(struct intel_batchbuffer *batch)
+{
+   return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map);
+}
+
+
+static INLINE void
+intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword)
+{
+   assert(batch->map);
+   assert(intel_batchbuffer_space(batch) >= 4);
+   *(GLuint *) (batch->ptr) = dword;
+   batch->ptr += 4;
+}
+
+static INLINE void
+intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
+                                GLuint sz,
+				enum cliprect_mode cliprect_mode)
+{
+   assert(sz < batch->size - 8);
+   if (intel_batchbuffer_space(batch) < sz)
+      intel_batchbuffer_flush(batch);
+
+   if ((cliprect_mode == LOOP_CLIPRECTS ||
+	cliprect_mode == REFERENCES_CLIPRECTS) &&
+       batch->intel->constant_cliprect)
+      cliprect_mode = NO_LOOP_CLIPRECTS;
+
+   if (cliprect_mode != IGNORE_CLIPRECTS) {
+      if (batch->cliprect_mode == IGNORE_CLIPRECTS) {
+	 batch->cliprect_mode = cliprect_mode;
+      } else {
+	 if (batch->cliprect_mode != cliprect_mode) {
+	    intel_batchbuffer_flush(batch);
+	    batch->cliprect_mode = cliprect_mode;
+	 }
+      }
+   }
+}
+
+/* Here are the crusty old macros, to be removed:
+ */
+#define BATCH_LOCALS
+
+#define BEGIN_BATCH(n, cliprect_mode) do {				\
+   intel_batchbuffer_require_space(intel->batch, (n)*4, cliprect_mode); \
+   assert(intel->batch->emit.start_ptr == NULL);			\
+   intel->batch->emit.total = (n) * 4;					\
+   intel->batch->emit.start_ptr = intel->batch->ptr;			\
+} while (0)
+
+#define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel->batch, d)
+
+#define OUT_RELOC(buf, read_domains, write_domain, delta) do {		\
+   assert((delta) >= 0);						\
+   intel_batchbuffer_emit_reloc(intel->batch, buf,			\
+				read_domains, write_domain, delta);	\
+} while (0)
+
+#define ADVANCE_BATCH() do {						\
+   unsigned int _n = intel->batch->ptr - intel->batch->emit.start_ptr;	\
+   assert(intel->batch->emit.start_ptr != NULL);			\
+   if (_n != intel->batch->emit.total) {				\
+      fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n",	\
+	      _n, intel->batch->emit.total);				\
+      abort();								\
+   }									\
+   intel->batch->emit.start_ptr = NULL;					\
+} while(0)
+
+
+static INLINE void
+intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
+{
+   intel_batchbuffer_require_space(batch, 4, IGNORE_CLIPRECTS);
+   intel_batchbuffer_emit_dword(batch, MI_FLUSH);
+}
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
new file mode 100644
index 00000000000..2f1639d4a4c
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -0,0 +1,649 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+
+#include <stdio.h>
+#include <errno.h>
+
+#include "main/mtypes.h"
+#include "main/context.h"
+#include "main/enums.h"
+
+#include "intel_blit.h"
+#include "intel_buffers.h"
+#include "intel_context.h"
+#include "intel_fbo.h"
+#include "intel_reg.h"
+#include "intel_regions.h"
+#include "intel_batchbuffer.h"
+#include "intel_chipset.h"
+
+#define FILE_DEBUG_FLAG DEBUG_BLIT
+
+/**
+ * Copy the back color buffer to the front color buffer. 
+ * Used for SwapBuffers().
+ */
+void
+intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
+                const drm_clip_rect_t * rect)
+{
+
+   struct intel_context *intel;
+   const intelScreenPrivate *intelScreen;
+
+   DBG("%s\n", __FUNCTION__);
+
+   assert(dPriv);
+
+   intel = intelScreenContext(dPriv->driScreenPriv->private);
+   if (!intel)
+      return;
+
+   intelScreen = intel->intelScreen;
+
+   /* The LOCK_HARDWARE is required for the cliprects.  Buffer offsets
+    * should work regardless.
+    */
+   LOCK_HARDWARE(intel);
+
+   if (dPriv && dPriv->numClipRects) {
+      struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+      struct intel_region *src, *dst;
+      int nbox = dPriv->numClipRects;
+      drm_clip_rect_t *pbox = dPriv->pClipRects;
+      int cpp;
+      int src_pitch, dst_pitch;
+      unsigned short src_x, src_y;
+      int BR13, CMD;
+      int i;
+      dri_bo *aper_array[3];
+
+      src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
+      dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
+
+      src_pitch = src->pitch * src->cpp;
+      dst_pitch = dst->pitch * dst->cpp;
+
+      cpp = src->cpp;
+
+      ASSERT(intel_fb);
+      ASSERT(intel_fb->Base.Name == 0);    /* Not a user-created FBO */
+      ASSERT(src);
+      ASSERT(dst);
+      ASSERT(src->cpp == dst->cpp);
+
+      if (cpp == 2) {
+	 BR13 = (0xCC << 16) | (1 << 24);
+	 CMD = XY_SRC_COPY_BLT_CMD;
+      }
+      else {
+	 BR13 = (0xCC << 16) | (1 << 24) | (1 << 25);
+	 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+      }
+
+#ifndef I915
+      if (src->tiling != I915_TILING_NONE) {
+	 CMD |= XY_SRC_TILED;
+	 src_pitch /= 4;
+      }
+      if (dst->tiling != I915_TILING_NONE) {
+	 CMD |= XY_DST_TILED;
+	 dst_pitch /= 4;
+      }
+#endif
+      /* do space/cliprects check before going any further */
+      intel_batchbuffer_require_space(intel->batch, 8 * 4,
+				      REFERENCES_CLIPRECTS);
+   again:
+      aper_array[0] = intel->batch->buf;
+      aper_array[1] = dst->buffer;
+      aper_array[2] = src->buffer;
+
+      if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
+	intel_batchbuffer_flush(intel->batch);
+	goto again;
+      }
+
+      for (i = 0; i < nbox; i++, pbox++) {
+	 drm_clip_rect_t box = *pbox;
+
+	 if (rect) {
+	    if (!intel_intersect_cliprects(&box, &box, rect))
+	       continue;
+	 }
+
+	 if (box.x1 >= box.x2 ||
+	     box.y1 >= box.y2)
+	    continue;
+
+	 assert(box.x1 < box.x2);
+	 assert(box.y1 < box.y2);
+	 src_x = box.x1 - dPriv->x + dPriv->backX;
+	 src_y = box.y1 - dPriv->y + dPriv->backY;
+
+	 BEGIN_BATCH(8, REFERENCES_CLIPRECTS);
+	 OUT_BATCH(CMD);
+	 OUT_BATCH(BR13 | dst_pitch);
+	 OUT_BATCH((box.y1 << 16) | box.x1);
+	 OUT_BATCH((box.y2 << 16) | box.x2);
+
+	 OUT_RELOC(dst->buffer,
+		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+		   0);
+	 OUT_BATCH((src_y << 16) | src_x);
+	 OUT_BATCH(src_pitch);
+	 OUT_RELOC(src->buffer,
+		   I915_GEM_DOMAIN_RENDER, 0,
+		   0);
+	 ADVANCE_BATCH();
+      }
+
+      /* Flush the rendering and the batch so that the results all land on the
+       * screen in a timely fashion.
+       */
+      intel_batchbuffer_emit_mi_flush(intel->batch);
+      intel_batchbuffer_flush(intel->batch);
+   }
+
+   UNLOCK_HARDWARE(intel);
+}
+
+
+
+
+void
+intelEmitFillBlit(struct intel_context *intel,
+		  GLuint cpp,
+		  GLshort dst_pitch,
+		  dri_bo *dst_buffer,
+		  GLuint dst_offset,
+		  uint32_t dst_tiling,
+		  GLshort x, GLshort y,
+		  GLshort w, GLshort h,
+		  GLuint color)
+{
+   GLuint BR13, CMD;
+   BATCH_LOCALS;
+
+   dst_pitch *= cpp;
+
+   switch (cpp) {
+   case 1:
+   case 2:
+   case 3:
+      BR13 = (0xF0 << 16) | (1 << 24);
+      CMD = XY_COLOR_BLT_CMD;
+      break;
+   case 4:
+      BR13 = (0xF0 << 16) | (1 << 24) | (1 << 25);
+      CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+      break;
+   default:
+      return;
+   }
+#ifndef I915
+   if (dst_tiling != I915_TILING_NONE) {
+      CMD |= XY_DST_TILED;
+      dst_pitch /= 4;
+   }
+#endif
+
+   DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
+       __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h);
+
+   assert(w > 0);
+   assert(h > 0);
+
+   BEGIN_BATCH(6, NO_LOOP_CLIPRECTS);
+   OUT_BATCH(CMD);
+   OUT_BATCH(BR13 | dst_pitch);
+   OUT_BATCH((y << 16) | x);
+   OUT_BATCH(((y + h) << 16) | (x + w));
+   OUT_RELOC(dst_buffer,
+	     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+	     dst_offset);
+   OUT_BATCH(color);
+   ADVANCE_BATCH();
+}
+
+static GLuint translate_raster_op(GLenum logicop)
+{
+   switch(logicop) {
+   case GL_CLEAR: return 0x00;
+   case GL_AND: return 0x88;
+   case GL_AND_REVERSE: return 0x44;
+   case GL_COPY: return 0xCC;
+   case GL_AND_INVERTED: return 0x22;
+   case GL_NOOP: return 0xAA;
+   case GL_XOR: return 0x66;
+   case GL_OR: return 0xEE;
+   case GL_NOR: return 0x11;
+   case GL_EQUIV: return 0x99;
+   case GL_INVERT: return 0x55;
+   case GL_OR_REVERSE: return 0xDD;
+   case GL_COPY_INVERTED: return 0x33;
+   case GL_OR_INVERTED: return 0xBB;
+   case GL_NAND: return 0x77;
+   case GL_SET: return 0xFF;
+   default: return 0;
+   }
+}
+
+
+/* Copy BitBlt
+ */
+void
+intelEmitCopyBlit(struct intel_context *intel,
+		  GLuint cpp,
+		  GLshort src_pitch,
+		  dri_bo *src_buffer,
+		  GLuint src_offset,
+		  uint32_t src_tiling,
+		  GLshort dst_pitch,
+		  dri_bo *dst_buffer,
+		  GLuint dst_offset,
+		  uint32_t dst_tiling,
+		  GLshort src_x, GLshort src_y,
+		  GLshort dst_x, GLshort dst_y,
+		  GLshort w, GLshort h,
+		  GLenum logic_op)
+{
+   GLuint CMD, BR13, pass = 0;
+   int dst_y2 = dst_y + h;
+   int dst_x2 = dst_x + w;
+   dri_bo *aper_array[3];
+   BATCH_LOCALS;
+
+   /* do space/cliprects check before going any further */
+   do {
+       aper_array[0] = intel->batch->buf;
+       aper_array[1] = dst_buffer;
+       aper_array[2] = src_buffer;
+
+       if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
+           intel_batchbuffer_flush(intel->batch);
+           pass++;
+       } else
+           break;
+   } while (pass < 2);
+
+   if (pass >= 2) {
+       GLboolean locked = GL_FALSE;       
+       if (!intel->locked) {
+           LOCK_HARDWARE(intel);
+           locked = GL_TRUE;
+       }
+
+       dri_bo_map(dst_buffer, GL_TRUE);
+       dri_bo_map(src_buffer, GL_FALSE);
+       _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
+                       cpp,
+                       dst_pitch,
+                       dst_x, dst_y, 
+                       w, h, 
+                       (GLubyte *)src_buffer->virtual + src_offset, 
+                       src_pitch,
+                       src_x, src_y);
+       
+       dri_bo_unmap(src_buffer);
+       dri_bo_unmap(dst_buffer);
+       
+       if (locked)
+           UNLOCK_HARDWARE(intel);
+
+       return;
+   }
+
+   intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
+   DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
+       __FUNCTION__,
+       src_buffer, src_pitch, src_offset, src_x, src_y,
+       dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
+
+   src_pitch *= cpp;
+   dst_pitch *= cpp;
+
+   BR13 = translate_raster_op(logic_op) << 16;
+
+   switch (cpp) {
+   case 1:
+   case 2:
+   case 3:
+      BR13 |= (1 << 24);
+      CMD = XY_SRC_COPY_BLT_CMD;
+      break;
+   case 4:
+      BR13 |= (1 << 24) | (1 << 25);
+      CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+      break;
+   default:
+      return;
+   }
+
+#ifndef I915
+   if (dst_tiling != I915_TILING_NONE) {
+      CMD |= XY_DST_TILED;
+      dst_pitch /= 4;
+   }
+   if (src_tiling != I915_TILING_NONE) {
+      CMD |= XY_SRC_TILED;
+      src_pitch /= 4;
+   }
+#endif
+
+   if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
+      return;
+   }
+
+   assert(dst_x < dst_x2);
+   assert(dst_y < dst_y2);
+
+   BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
+   OUT_BATCH(CMD);
+   OUT_BATCH(BR13 | (uint16_t)dst_pitch);
+   OUT_BATCH((dst_y << 16) | dst_x);
+   OUT_BATCH((dst_y2 << 16) | dst_x2);
+   OUT_RELOC(dst_buffer,
+	     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+	     dst_offset);
+   OUT_BATCH((src_y << 16) | src_x);
+   OUT_BATCH((uint16_t)src_pitch);
+   OUT_RELOC(src_buffer,
+	     I915_GEM_DOMAIN_RENDER, 0,
+	     src_offset);
+   ADVANCE_BATCH();
+
+   intel_batchbuffer_emit_mi_flush(intel->batch);
+}
+
+
+/**
+ * Use blitting to clear the renderbuffers named by 'flags'.
+ * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
+ * since that might include software renderbuffers or renderbuffers
+ * which we're clearing with triangles.
+ * \param mask  bitmask of BUFFER_BIT_* values indicating buffers to clear
+ */
+void
+intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   GLuint clear_depth;
+   GLbitfield skipBuffers = 0;
+   unsigned int num_cliprects;
+   struct drm_clip_rect *cliprects;
+   int x_off, y_off;
+   BATCH_LOCALS;
+
+   /*
+    * Compute values for clearing the buffers.
+    */
+   clear_depth = 0;
+   if (mask & BUFFER_BIT_DEPTH) {
+      clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
+   }
+   if (mask & BUFFER_BIT_STENCIL) {
+      clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
+   }
+
+   /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
+    * the loop below.
+    */
+   if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
+      skipBuffers = BUFFER_BIT_STENCIL;
+   }
+
+   /* XXX Move this flush/lock into the following conditional? */
+   intelFlush(&intel->ctx);
+   LOCK_HARDWARE(intel);
+
+   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+   if (num_cliprects) {
+      GLint cx, cy, cw, ch;
+      drm_clip_rect_t clear;
+      int i;
+
+      /* Get clear bounds after locking */
+      cx = fb->_Xmin;
+      cy = fb->_Ymin;
+      cw = fb->_Xmax - cx;
+      ch = fb->_Ymax - cy;
+
+      if (fb->Name == 0) {
+         /* clearing a window */
+
+         /* flip top to bottom */
+         clear.x1 = cx + x_off;
+         clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
+         clear.x2 = clear.x1 + cw;
+         clear.y2 = clear.y1 + ch;
+      }
+      else {
+         /* clearing FBO */
+         assert(num_cliprects == 1);
+         assert(cliprects == &intel->fboRect);
+         clear.x1 = cx;
+         clear.y1 = cy;
+         clear.x2 = clear.x1 + cw;
+         clear.y2 = clear.y1 + ch;
+         /* no change to mask */
+      }
+
+      for (i = 0; i < num_cliprects; i++) {
+         const drm_clip_rect_t *box = &cliprects[i];
+         drm_clip_rect_t b;
+         GLuint buf;
+         GLuint clearMask = mask;      /* use copy, since we modify it below */
+         GLboolean all = (cw == fb->Width && ch == fb->Height);
+
+         if (!all) {
+            intel_intersect_cliprects(&b, &clear, box);
+         }
+         else {
+            b = *box;
+         }
+
+         if (b.x1 >= b.x2 || b.y1 >= b.y2)
+            continue;
+
+         if (0)
+            _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
+                         b.x1, b.y1, b.x2, b.y2, mask);
+
+         /* Loop over all renderbuffers */
+         for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
+            const GLbitfield bufBit = 1 << buf;
+            if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
+               /* OK, clear this renderbuffer */
+               struct intel_region *irb_region =
+		  intel_get_rb_region(fb, buf);
+               dri_bo *write_buffer =
+                  intel_region_buffer(intel, irb_region,
+                                      all ? INTEL_WRITE_FULL :
+                                      INTEL_WRITE_PART);
+
+               GLuint clearVal;
+               GLint pitch, cpp;
+               GLuint BR13, CMD;
+
+               ASSERT(irb_region);
+
+               pitch = irb_region->pitch;
+               cpp = irb_region->cpp;
+
+               DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
+                   __FUNCTION__,
+                   irb_region->buffer, (pitch * cpp),
+                   irb_region->draw_offset,
+                   b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1);
+
+	       BR13 = 0xf0 << 16;
+	       CMD = XY_COLOR_BLT_CMD;
+
+               /* Setup the blit command */
+               if (cpp == 4) {
+                  BR13 |= (1 << 24) | (1 << 25);
+                  if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
+                     if (clearMask & BUFFER_BIT_DEPTH)
+                        CMD |= XY_BLT_WRITE_RGB;
+                     if (clearMask & BUFFER_BIT_STENCIL)
+                        CMD |= XY_BLT_WRITE_ALPHA;
+                  }
+                  else {
+                     /* clearing RGBA */
+                     CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+                  }
+               }
+               else {
+                  ASSERT(cpp == 2 || cpp == 0);
+                  BR13 |= (1 << 24);
+               }
+
+#ifndef I915
+	       if (irb_region->tiling != I915_TILING_NONE) {
+		  CMD |= XY_DST_TILED;
+		  pitch /= 4;
+	       }
+#endif
+	       BR13 |= (pitch * cpp);
+
+               if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
+                  clearVal = clear_depth;
+               }
+               else {
+                  clearVal = (cpp == 4)
+                     ? intel->ClearColor8888 : intel->ClearColor565;
+               }
+               /*
+                  _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
+                  buf, irb->Base.Name);
+                */
+	       intel_wait_flips(intel);
+
+               assert(b.x1 < b.x2);
+               assert(b.y1 < b.y2);
+
+               BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
+               OUT_BATCH(CMD);
+               OUT_BATCH(BR13);
+               OUT_BATCH((b.y1 << 16) | b.x1);
+               OUT_BATCH((b.y2 << 16) | b.x2);
+               OUT_RELOC(write_buffer,
+			 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                         irb_region->draw_offset);
+               OUT_BATCH(clearVal);
+               ADVANCE_BATCH();
+               clearMask &= ~bufBit;    /* turn off bit, for faster loop exit */
+            }
+         }
+      }
+      intel_batchbuffer_emit_mi_flush(intel->batch);
+   }
+
+   UNLOCK_HARDWARE(intel);
+}
+
+void
+intelEmitImmediateColorExpandBlit(struct intel_context *intel,
+				  GLuint cpp,
+				  GLubyte *src_bits, GLuint src_size,
+				  GLuint fg_color,
+				  GLshort dst_pitch,
+				  dri_bo *dst_buffer,
+				  GLuint dst_offset,
+				  uint32_t dst_tiling,
+				  GLshort x, GLshort y,
+				  GLshort w, GLshort h,
+				  GLenum logic_op)
+{
+   int dwords = ALIGN(src_size, 8) / 4;
+   uint32_t opcode, br13, blit_cmd;
+
+   assert( logic_op - GL_CLEAR >= 0 );
+   assert( logic_op - GL_CLEAR < 0x10 );
+
+   if (w < 0 || h < 0)
+      return;
+
+   dst_pitch *= cpp;
+
+   DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
+       __FUNCTION__,
+       dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
+
+   intel_batchbuffer_require_space( intel->batch,
+				    (8 * 4) +
+				    (3 * 4) +
+				    dwords * 4,
+				    REFERENCES_CLIPRECTS );
+
+   opcode = XY_SETUP_BLT_CMD;
+   if (cpp == 4)
+      opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
+#ifndef I915
+   if (dst_tiling != I915_TILING_NONE) {
+      opcode |= XY_DST_TILED;
+      dst_pitch /= 4;
+   }
+#endif
+
+   br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
+   if (cpp == 2)
+      br13 |= BR13_565;
+   else
+      br13 |= BR13_8888;
+
+   blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
+   if (dst_tiling != I915_TILING_NONE)
+      blit_cmd |= XY_DST_TILED;
+
+   BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS);
+   OUT_BATCH(opcode);
+   OUT_BATCH(br13);
+   OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
+   OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
+   OUT_RELOC(dst_buffer,
+	     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+	     dst_offset);
+   OUT_BATCH(0); /* bg */
+   OUT_BATCH(fg_color); /* fg */
+   OUT_BATCH(0); /* pattern base addr */
+
+   OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
+   OUT_BATCH((y << 16) | x);
+   OUT_BATCH(((y + h) << 16) | (x + w));
+   ADVANCE_BATCH();
+
+   intel_batchbuffer_data( intel->batch,
+			   src_bits,
+			   dwords * 4,
+			   REFERENCES_CLIPRECTS );
+
+   intel_batchbuffer_emit_mi_flush(intel->batch);
+}
diff --git a/src/mesa/drivers/dri/i965/intel_blit.h b/src/mesa/drivers/dri/intel/intel_blit.h
index e361545c8fa..52065b13ed7 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.h
+++ b/src/mesa/drivers/dri/intel/intel_blit.h
@@ -29,38 +29,35 @@
 #define INTEL_BLIT_H
 
 #include "intel_context.h"
-#include "intel_ioctl.h"
 
-struct buffer;
+extern void intelCopyBuffer(const __DRIdrawablePrivate * dpriv,
+                            const drm_clip_rect_t * rect);
 
-extern void intelCopyBuffer( const __DRIdrawablePrivate *dpriv,
-			     const drm_clip_rect_t *rect );
-extern void intelClearWithBlit(GLcontext *ctx, GLbitfield mask);
+extern void intelClearWithBlit(GLcontext * ctx, GLbitfield mask);
 
-extern void intelEmitCopyBlit( struct intel_context *intel,
-			       GLuint cpp,
-			       GLshort src_pitch,
-			       struct buffer *src_buffer,
-			       GLuint  src_offset,
-			       GLboolean src_tiled,
-			       GLshort dst_pitch,
-			       struct buffer *dst_buffer,
-			       GLuint  dst_offset,
-			       GLboolean dst_tiled,
-			       GLshort srcx, GLshort srcy,
-			       GLshort dstx, GLshort dsty,
-			       GLshort w, GLshort h,
-			       GLenum logic_op );
+extern void intelEmitCopyBlit(struct intel_context *intel,
+                              GLuint cpp,
+                              GLshort src_pitch,
+                              dri_bo *src_buffer,
+                              GLuint src_offset,
+			      uint32_t src_tiling,
+                              GLshort dst_pitch,
+                              dri_bo *dst_buffer,
+                              GLuint dst_offset,
+			      uint32_t dst_tiling,
+                              GLshort srcx, GLshort srcy,
+                              GLshort dstx, GLshort dsty,
+                              GLshort w, GLshort h,
+			      GLenum logicop );
 
-extern void intelEmitFillBlit( struct intel_context *intel,
-			       GLuint cpp,
-			       GLshort dst_pitch,
-			       struct buffer *dst_buffer,
-			       GLuint dst_offset,
-			       GLboolean dst_tiled,
-			       GLshort x, GLshort y, 
-			       GLshort w, GLshort h,
-			       GLuint color );
+extern void intelEmitFillBlit(struct intel_context *intel,
+                              GLuint cpp,
+                              GLshort dst_pitch,
+                              dri_bo *dst_buffer,
+                              GLuint dst_offset,
+			      uint32_t dst_tiling,
+                              GLshort x, GLshort y,
+                              GLshort w, GLshort h, GLuint color);
 
 void
 intelEmitImmediateColorExpandBlit(struct intel_context *intel,
@@ -68,11 +65,11 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 				  GLubyte *src_bits, GLuint src_size,
 				  GLuint fg_color,
 				  GLshort dst_pitch,
-				  struct buffer *dst_buffer,
+				  dri_bo *dst_buffer,
 				  GLuint dst_offset,
-				  GLboolean dst_tiled,
-				  GLshort dst_x, GLshort dst_y, 
+				  uint32_t dst_tiling,
+				  GLshort x, GLshort y,
 				  GLshort w, GLshort h,
-				  GLenum logic_op );
+				  GLenum logic_op);
 
 #endif
diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.c b/src/mesa/drivers/dri/intel/intel_buffer_objects.c
new file mode 100644
index 00000000000..60d7bb3770c
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.c
@@ -0,0 +1,284 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/bufferobj.h"
+
+#include "intel_context.h"
+#include "intel_buffer_objects.h"
+#include "intel_batchbuffer.h"
+#include "intel_regions.h"
+
+static GLboolean intel_bufferobj_unmap(GLcontext * ctx,
+				       GLenum target,
+				       struct gl_buffer_object *obj);
+
+/** Allocates a new dri_bo to store the data for the buffer object. */
+static void
+intel_bufferobj_alloc_buffer(struct intel_context *intel,
+			     struct intel_buffer_object *intel_obj)
+{
+   intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
+				    intel_obj->Base.Size, 64);
+}
+
+/**
+ * There is some duplication between mesa's bufferobjects and our
+ * bufmgr buffers.  Both have an integer handle and a hashtable to
+ * lookup an opaque structure.  It would be nice if the handles and
+ * internal structure where somehow shared.
+ */
+static struct gl_buffer_object *
+intel_bufferobj_alloc(GLcontext * ctx, GLuint name, GLenum target)
+{
+   struct intel_buffer_object *obj = CALLOC_STRUCT(intel_buffer_object);
+
+   _mesa_initialize_buffer_object(&obj->Base, name, target);
+
+   obj->buffer = NULL;
+
+   return &obj->Base;
+}
+
+/* Break the COW tie to the region.  The region gets to keep the data.
+ */
+void
+intel_bufferobj_release_region(struct intel_context *intel,
+                               struct intel_buffer_object *intel_obj)
+{
+   assert(intel_obj->region->buffer == intel_obj->buffer);
+   intel_obj->region->pbo = NULL;
+   intel_obj->region = NULL;
+
+   dri_bo_unreference(intel_obj->buffer);
+   intel_obj->buffer = NULL;
+}
+
+/* Break the COW tie to the region.  Both the pbo and the region end
+ * up with a copy of the data.
+ */
+void
+intel_bufferobj_cow(struct intel_context *intel,
+                    struct intel_buffer_object *intel_obj)
+{
+   assert(intel_obj->region);
+   intel_region_cow(intel, intel_obj->region);
+}
+
+
+/**
+ * Deallocate/free a vertex/pixel buffer object.
+ * Called via glDeleteBuffersARB().
+ */
+static void
+intel_bufferobj_free(GLcontext * ctx, struct gl_buffer_object *obj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   assert(intel_obj);
+
+   /* Buffer objects are automatically unmapped when deleting according
+    * to the spec.
+    */
+   if (obj->Pointer)
+      intel_bufferobj_unmap(ctx, 0, obj);
+
+   if (intel_obj->region) {
+      intel_bufferobj_release_region(intel, intel_obj);
+   }
+   else if (intel_obj->buffer) {
+      dri_bo_unreference(intel_obj->buffer);
+   }
+
+   _mesa_free(intel_obj);
+}
+
+
+
+/**
+ * Allocate space for and store data in a buffer object.  Any data that was
+ * previously stored in the buffer object is lost.  If data is NULL,
+ * memory will be allocated, but no copy will occur.
+ * Called via glBufferDataARB().
+ */
+static void
+intel_bufferobj_data(GLcontext * ctx,
+                     GLenum target,
+                     GLsizeiptrARB size,
+                     const GLvoid * data,
+                     GLenum usage, struct gl_buffer_object *obj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   intel_obj->Base.Size = size;
+   intel_obj->Base.Usage = usage;
+
+   /* Buffer objects are automatically unmapped when creating new data buffers
+    * according to the spec.
+    */
+   if (obj->Pointer)
+      intel_bufferobj_unmap(ctx, 0, obj);
+
+   if (intel_obj->region)
+      intel_bufferobj_release_region(intel, intel_obj);
+
+   if (intel_obj->buffer != NULL) {
+      dri_bo_unreference(intel_obj->buffer);
+      intel_obj->buffer = NULL;
+   }
+   if (size != 0) {
+      intel_bufferobj_alloc_buffer(intel, intel_obj);
+
+      if (data != NULL)
+	 dri_bo_subdata(intel_obj->buffer, 0, size, data);
+   }
+}
+
+
+/**
+ * Replace data in a subrange of buffer object.  If the data range
+ * specified by size + offset extends beyond the end of the buffer or
+ * if data is NULL, no copy is performed.
+ * Called via glBufferSubDataARB().
+ */
+static void
+intel_bufferobj_subdata(GLcontext * ctx,
+                        GLenum target,
+                        GLintptrARB offset,
+                        GLsizeiptrARB size,
+                        const GLvoid * data, struct gl_buffer_object *obj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   assert(intel_obj);
+
+   if (intel_obj->region)
+      intel_bufferobj_cow(intel, intel_obj);
+
+   dri_bo_subdata(intel_obj->buffer, offset, size, data);
+}
+
+
+/**
+ * Called via glGetBufferSubDataARB().
+ */
+static void
+intel_bufferobj_get_subdata(GLcontext * ctx,
+                            GLenum target,
+                            GLintptrARB offset,
+                            GLsizeiptrARB size,
+                            GLvoid * data, struct gl_buffer_object *obj)
+{
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   assert(intel_obj);
+   dri_bo_get_subdata(intel_obj->buffer, offset, size, data);
+}
+
+
+
+/**
+ * Called via glMapBufferARB().
+ */
+static void *
+intel_bufferobj_map(GLcontext * ctx,
+                    GLenum target,
+                    GLenum access, struct gl_buffer_object *obj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   /* XXX: Translate access to flags arg below:
+    */
+   assert(intel_obj);
+
+   if (intel_obj->region)
+      intel_bufferobj_cow(intel, intel_obj);
+
+   if (intel_obj->buffer == NULL) {
+      obj->Pointer = NULL;
+      return NULL;
+   }
+
+   dri_bo_map(intel_obj->buffer, GL_TRUE);
+   obj->Pointer = intel_obj->buffer->virtual;
+   return obj->Pointer;
+}
+
+
+/**
+ * Called via glMapBufferARB().
+ */
+static GLboolean
+intel_bufferobj_unmap(GLcontext * ctx,
+                      GLenum target, struct gl_buffer_object *obj)
+{
+   struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
+
+   assert(intel_obj);
+   if (intel_obj->buffer != NULL) {
+      assert(obj->Pointer);
+      dri_bo_unmap(intel_obj->buffer);
+      obj->Pointer = NULL;
+   }
+   return GL_TRUE;
+}
+
+dri_bo *
+intel_bufferobj_buffer(struct intel_context *intel,
+                       struct intel_buffer_object *intel_obj, GLuint flag)
+{
+   if (intel_obj->region) {
+      if (flag == INTEL_WRITE_PART)
+         intel_bufferobj_cow(intel, intel_obj);
+      else if (flag == INTEL_WRITE_FULL) {
+         intel_bufferobj_release_region(intel, intel_obj);
+	 intel_bufferobj_alloc_buffer(intel, intel_obj);
+      }
+   }
+
+   return intel_obj->buffer;
+}
+
+void
+intel_bufferobj_init(struct intel_context *intel)
+{
+   GLcontext *ctx = &intel->ctx;
+
+   ctx->Driver.NewBufferObject = intel_bufferobj_alloc;
+   ctx->Driver.DeleteBuffer = intel_bufferobj_free;
+   ctx->Driver.BufferData = intel_bufferobj_data;
+   ctx->Driver.BufferSubData = intel_bufferobj_subdata;
+   ctx->Driver.GetBufferSubData = intel_bufferobj_get_subdata;
+   ctx->Driver.MapBuffer = intel_bufferobj_map;
+   ctx->Driver.UnmapBuffer = intel_bufferobj_unmap;
+}
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.h b/src/mesa/drivers/dri/intel/intel_buffer_objects.h
index 4b38803e576..bf6dbd58f27 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.h
+++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.h
@@ -1,6 +1,6 @@
- /**************************************************************************
+/**************************************************************************
  * 
- * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
  * 
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -28,28 +28,36 @@
 #ifndef INTEL_BUFFEROBJ_H
 #define INTEL_BUFFEROBJ_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 struct intel_context;
+struct intel_region;
 struct gl_buffer_object;
 
 
 /**
  * Intel vertex/pixel buffer object, derived from Mesa's gl_buffer_object.
  */
-struct intel_buffer_object {
+struct intel_buffer_object
+{
    struct gl_buffer_object Base;
-   struct buffer *buffer;   /* the low-level buffer manager's buffer handle */
+   dri_bo *buffer;     /* the low-level buffer manager's buffer handle */
+
+   struct intel_region *region; /* Is there a zero-copy texture
+                                   associated with this (pixel)
+                                   buffer object? */
 };
 
 
 /* Get the bm buffer associated with a GL bufferobject:
  */
-struct buffer *intel_bufferobj_buffer( const struct intel_buffer_object *obj );
+dri_bo *intel_bufferobj_buffer(struct intel_context *intel,
+			       struct intel_buffer_object
+			       *obj, GLuint flag);
 
 /* Hook the bufferobject implementation into mesa: 
  */
-void intel_bufferobj_init( struct intel_context *intel );
+void intel_bufferobj_init(struct intel_context *intel);
 
 
 
@@ -58,13 +66,21 @@ void intel_bufferobj_init( struct intel_context *intel );
  * the Name == 0 test is the only way to identify them and avoid
  * casting them erroneously to our structs.
  */
-static inline struct intel_buffer_object *
-intel_buffer_object( struct gl_buffer_object *obj )
+static INLINE struct intel_buffer_object *
+intel_buffer_object(struct gl_buffer_object *obj)
 {
    if (obj->Name)
-      return (struct intel_buffer_object *)obj;
+      return (struct intel_buffer_object *) obj;
    else
       return NULL;
 }
 
+/* Helpers for zerocopy image uploads.  See also intel_regions.h:
+ */
+void intel_bufferobj_cow(struct intel_context *intel,
+                         struct intel_buffer_object *intel_obj);
+void intel_bufferobj_release_region(struct intel_context *intel,
+                                    struct intel_buffer_object *intel_obj);
+
+
 #endif
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
new file mode 100644
index 00000000000..f8f009c6a30
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -0,0 +1,1024 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_blit.h"
+#include "intel_buffers.h"
+#include "intel_chipset.h"
+#include "intel_depthstencil.h"
+#include "intel_fbo.h"
+#include "intel_regions.h"
+#include "intel_batchbuffer.h"
+#include "intel_reg.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+#include "swrast/swrast.h"
+#include "utils.h"
+#include "drirenderbuffer.h"
+#include "vblank.h"
+#include "i915_drm.h"
+
+/* This block can be removed when libdrm >= 2.3.1 is required */
+
+#ifndef DRM_IOCTL_I915_FLIP
+
+#define DRM_VBLANK_FLIP 0x8000000
+
+typedef struct drm_i915_flip {
+   int pipes;
+} drm_i915_flip_t;
+
+#undef DRM_IOCTL_I915_FLIP
+#define DRM_IOCTL_I915_FLIP DRM_IOW(DRM_COMMAND_BASE + DRM_I915_FLIP, \
+				    drm_i915_flip_t)
+
+#endif
+
+#define FILE_DEBUG_FLAG DEBUG_BLIT
+
+/**
+ * XXX move this into a new dri/common/cliprects.c file.
+ */
+GLboolean
+intel_intersect_cliprects(drm_clip_rect_t * dst,
+                          const drm_clip_rect_t * a,
+                          const drm_clip_rect_t * b)
+{
+   GLint bx = b->x1;
+   GLint by = b->y1;
+   GLint bw = b->x2 - bx;
+   GLint bh = b->y2 - by;
+
+   if (bx < a->x1)
+      bw -= a->x1 - bx, bx = a->x1;
+   if (by < a->y1)
+      bh -= a->y1 - by, by = a->y1;
+   if (bx + bw > a->x2)
+      bw = a->x2 - bx;
+   if (by + bh > a->y2)
+      bh = a->y2 - by;
+   if (bw <= 0)
+      return GL_FALSE;
+   if (bh <= 0)
+      return GL_FALSE;
+
+   dst->x1 = bx;
+   dst->y1 = by;
+   dst->x2 = bx + bw;
+   dst->y2 = by + bh;
+
+   return GL_TRUE;
+}
+
+/**
+ * Return pointer to current color drawing region, or NULL.
+ */
+struct intel_region *
+intel_drawbuf_region(struct intel_context *intel)
+{
+   struct intel_renderbuffer *irbColor =
+      intel_renderbuffer(intel->ctx.DrawBuffer->_ColorDrawBuffers[0]);
+   if (irbColor)
+      return irbColor->region;
+   else
+      return NULL;
+}
+
+/**
+ * Return pointer to current color reading region, or NULL.
+ */
+struct intel_region *
+intel_readbuf_region(struct intel_context *intel)
+{
+   struct intel_renderbuffer *irb
+      = intel_renderbuffer(intel->ctx.ReadBuffer->_ColorReadBuffer);
+   if (irb)
+      return irb->region;
+   else
+      return NULL;
+}
+
+void
+intel_get_cliprects(struct intel_context *intel,
+		    struct drm_clip_rect **cliprects,
+		    unsigned int *num_cliprects,
+		    int *x_off, int *y_off)
+{
+   __DRIdrawablePrivate *dPriv = intel->driDrawable;
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+
+   if (intel->constant_cliprect) {
+      /* FBO or DRI2 rendering, which can just use the fb's size. */
+      intel->fboRect.x1 = 0;
+      intel->fboRect.y1 = 0;
+      intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
+      intel->fboRect.y2 = intel->ctx.DrawBuffer->Height;
+
+      *cliprects = &intel->fboRect;
+      *num_cliprects = 1;
+      *x_off = 0;
+      *y_off = 0;
+   } else if (intel->front_cliprects ||
+       intel_fb->pf_active || dPriv->numBackClipRects == 0) {
+      /* use the front clip rects */
+      *cliprects = dPriv->pClipRects;
+      *num_cliprects = dPriv->numClipRects;
+      *x_off = dPriv->x;
+      *y_off = dPriv->y;
+   }
+   else {
+      /* use the back clip rects */
+      *num_cliprects = dPriv->numBackClipRects;
+      *cliprects = dPriv->pBackClipRects;
+      *x_off = dPriv->backX;
+      *y_off = dPriv->backY;
+   }
+}
+
+static void
+intelUpdatePageFlipping(struct intel_context *intel,
+			GLint areaA, GLint areaB)
+{
+   __DRIdrawablePrivate *dPriv = intel->driDrawable;
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+   GLboolean pf_active;
+   GLint pf_planes;
+
+   /* Update page flipping info */
+   pf_planes = 0;
+
+   if (areaA > 0)
+      pf_planes |= 1;
+
+   if (areaB > 0)
+      pf_planes |= 2;
+
+   intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
+				(intel_fb->pf_planes & 0x2)) & 0x3;
+
+   intel_fb->pf_num_pages = intel->intelScreen->third.handle ? 3 : 2;
+
+   pf_active = pf_planes && (pf_planes & intel->sarea->pf_active) == pf_planes;
+
+   if (INTEL_DEBUG & DEBUG_LOCK)
+      if (pf_active != intel_fb->pf_active)
+	 _mesa_printf("%s - Page flipping %sactive\n", __progname,
+		      pf_active ? "" : "in");
+
+   if (pf_active) {
+      /* Sync pages between planes if flipping on both at the same time */
+      if (pf_planes == 0x3 && pf_planes != intel_fb->pf_planes &&
+	  (intel->sarea->pf_current_page & 0x3) !=
+	  (((intel->sarea->pf_current_page) >> 2) & 0x3)) {
+	 drm_i915_flip_t flip;
+
+	 if (intel_fb->pf_current_page ==
+	     (intel->sarea->pf_current_page & 0x3)) {
+	    /* XXX: This is ugly, but emitting two flips 'in a row' can cause
+	     * lockups for unknown reasons.
+	     */
+	    intel->sarea->pf_current_page =
+	       intel->sarea->pf_current_page & 0x3;
+	    intel->sarea->pf_current_page |=
+	       ((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
+		intel_fb->pf_num_pages) << 2;
+
+	    flip.pipes = 0x2;
+	 } else {
+	    intel->sarea->pf_current_page =
+	       intel->sarea->pf_current_page & (0x3 << 2);
+	    intel->sarea->pf_current_page |=
+	       (intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
+	       intel_fb->pf_num_pages;
+
+	    flip.pipes = 0x1;
+	 }
+
+	 drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
+      }
+
+      intel_fb->pf_planes = pf_planes;
+   }
+
+   intel_fb->pf_active = pf_active;
+   intel_flip_renderbuffers(intel_fb);
+   intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
+}
+
+/**
+ * This will be called whenever the currently bound window is moved/resized.
+ * XXX: actually, it seems to NOT be called when the window is only moved (BP).
+ */
+void
+intelWindowMoved(struct intel_context *intel)
+{
+   GLcontext *ctx = &intel->ctx;
+   __DRIdrawablePrivate *dPriv = intel->driDrawable;
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+
+   if (!intel->intelScreen->driScrnPriv->dri2.enabled &&
+       intel->intelScreen->driScrnPriv->ddx_version.minor >= 7) {
+      volatile struct drm_i915_sarea *sarea = intel->sarea;
+      drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
+				   .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
+      drm_clip_rect_t planeA_rect = { .x1 = sarea->planeA_x, .y1 = sarea->planeA_y,
+				     .x2 = sarea->planeA_x + sarea->planeA_w,
+				     .y2 = sarea->planeA_y + sarea->planeA_h };
+      drm_clip_rect_t planeB_rect = { .x1 = sarea->planeB_x, .y1 = sarea->planeB_y,
+				     .x2 = sarea->planeB_x + sarea->planeB_w,
+				     .y2 = sarea->planeB_y + sarea->planeB_h };
+      GLint areaA = driIntersectArea( drw_rect, planeA_rect );
+      GLint areaB = driIntersectArea( drw_rect, planeB_rect );
+      GLuint flags = dPriv->vblFlags;
+
+      intelUpdatePageFlipping(intel, areaA, areaB);
+
+      /* Update vblank info
+       */
+      if (areaB > areaA || (areaA == areaB && areaB > 0)) {
+	 flags = dPriv->vblFlags | VBLANK_FLAG_SECONDARY;
+      } else {
+	 flags = dPriv->vblFlags & ~VBLANK_FLAG_SECONDARY;
+      }
+
+      /* Check to see if we changed pipes */
+      if (flags != dPriv->vblFlags && dPriv->vblFlags &&
+	  !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ)) {
+	 int64_t count;
+	 drmVBlank vbl;
+	 int i;
+
+	 /*
+	  * Deal with page flipping
+	  */
+	 vbl.request.type = DRM_VBLANK_ABSOLUTE;
+
+	 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
+	    vbl.request.type |= DRM_VBLANK_SECONDARY;
+	 }
+
+	 for (i = 0; i < intel_fb->pf_num_pages; i++) {
+	    if (!intel_fb->color_rb[i] ||
+		(intel_fb->vbl_waited - intel_fb->color_rb[i]->vbl_pending) <=
+		(1<<23))
+	       continue;
+
+	    vbl.request.sequence = intel_fb->color_rb[i]->vbl_pending;
+	    drmWaitVBlank(intel->driFd, &vbl);
+	 }
+
+	 /*
+	  * Update msc_base from old pipe
+	  */
+	 driDrawableGetMSC32(dPriv->driScreenPriv, dPriv, &count);
+	 dPriv->msc_base = count;
+	 /*
+	  * Then get new vblank_base and vblSeq values
+	  */
+	 dPriv->vblFlags = flags;
+	 driGetCurrentVBlank(dPriv);
+	 dPriv->vblank_base = dPriv->vblSeq;
+
+	 intel_fb->vbl_waited = dPriv->vblSeq;
+
+	 for (i = 0; i < intel_fb->pf_num_pages; i++) {
+	    if (intel_fb->color_rb[i])
+	       intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_waited;
+	 }
+      }
+   } else {
+      dPriv->vblFlags &= ~VBLANK_FLAG_SECONDARY;
+   }
+
+   /* Update Mesa's notion of window size */
+   driUpdateFramebufferSize(ctx, dPriv);
+   intel_fb->Base.Initialized = GL_TRUE; /* XXX remove someday */
+
+   /* Update hardware scissor */
+   if (ctx->Driver.Scissor != NULL) {
+      ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
+			  ctx->Scissor.Width, ctx->Scissor.Height);
+   }
+
+   /* Re-calculate viewport related state */
+   if (ctx->Driver.DepthRange != NULL)
+      ctx->Driver.DepthRange( ctx, ctx->Viewport.Near, ctx->Viewport.Far );
+}
+
+
+
+/* A true meta version of this would be very simple and additionally
+ * machine independent.  Maybe we'll get there one day.
+ */
+static void
+intelClearWithTris(struct intel_context *intel, GLbitfield mask)
+{
+   GLcontext *ctx = &intel->ctx;
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   GLuint buf;
+
+   intel->vtbl.install_meta_state(intel);
+
+   /* Back and stencil cliprects are the same.  Try and do both
+    * buffers at once:
+    */
+   if (mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
+      struct intel_region *backRegion =
+	 intel_get_rb_region(fb, BUFFER_BACK_LEFT);
+      struct intel_region *depthRegion =
+	 intel_get_rb_region(fb, BUFFER_DEPTH);
+
+      intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
+
+      if (mask & BUFFER_BIT_BACK_LEFT)
+	 intel->vtbl.meta_color_mask(intel, GL_TRUE);
+      else
+	 intel->vtbl.meta_color_mask(intel, GL_FALSE);
+
+      if (mask & BUFFER_BIT_STENCIL)
+	 intel->vtbl.meta_stencil_replace(intel,
+					  intel->ctx.Stencil.WriteMask[0],
+					  intel->ctx.Stencil.Clear);
+      else
+	 intel->vtbl.meta_no_stencil_write(intel);
+
+      if (mask & BUFFER_BIT_DEPTH)
+	 intel->vtbl.meta_depth_replace(intel);
+      else
+	 intel->vtbl.meta_no_depth_write(intel);
+
+      intel->vtbl.meta_draw_quad(intel,
+				 fb->_Xmin,
+				 fb->_Xmax,
+				 fb->_Ymin,
+				 fb->_Ymax,
+				 intel->ctx.Depth.Clear,
+				 intel->ClearColor8888,
+				 0, 0, 0, 0);   /* texcoords */
+
+      mask &= ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
+   }
+
+   /* clear the remaining (color) renderbuffers */
+   for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
+      const GLuint bufBit = 1 << buf;
+      if (mask & bufBit) {
+	 struct intel_renderbuffer *irbColor =
+	    intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
+
+	 ASSERT(irbColor);
+
+	 intel->vtbl.meta_no_depth_write(intel);
+	 intel->vtbl.meta_no_stencil_write(intel);
+	 intel->vtbl.meta_color_mask(intel, GL_TRUE);
+	 intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
+
+	 intel->vtbl.meta_draw_quad(intel,
+				    fb->_Xmin,
+				    fb->_Xmax,
+				    fb->_Ymin,
+				    fb->_Ymax,
+				    0, intel->ClearColor8888,
+				    0, 0, 0, 0);   /* texcoords */
+
+	 mask &= ~bufBit;
+      }
+   }
+
+   intel->vtbl.leave_meta_state(intel);
+}
+
+static const char *buffer_names[] = {
+   [BUFFER_FRONT_LEFT] = "front",
+   [BUFFER_BACK_LEFT] = "back",
+   [BUFFER_FRONT_RIGHT] = "front right",
+   [BUFFER_BACK_RIGHT] = "back right",
+   [BUFFER_AUX0] = "aux0",
+   [BUFFER_AUX1] = "aux1",
+   [BUFFER_AUX2] = "aux2",
+   [BUFFER_AUX3] = "aux3",
+   [BUFFER_DEPTH] = "depth",
+   [BUFFER_STENCIL] = "stencil",
+   [BUFFER_ACCUM] = "accum",
+   [BUFFER_COLOR0] = "color0",
+   [BUFFER_COLOR1] = "color1",
+   [BUFFER_COLOR2] = "color2",
+   [BUFFER_COLOR3] = "color3",
+   [BUFFER_COLOR4] = "color4",
+   [BUFFER_COLOR5] = "color5",
+   [BUFFER_COLOR6] = "color6",
+   [BUFFER_COLOR7] = "color7",
+};
+
+/**
+ * Called by ctx->Driver.Clear.
+ */
+static void
+intelClear(GLcontext *ctx, GLbitfield mask)
+{
+   struct intel_context *intel = intel_context(ctx);
+   const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+   GLbitfield tri_mask = 0;
+   GLbitfield blit_mask = 0;
+   GLbitfield swrast_mask = 0;
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   GLuint i;
+
+   if (0)
+      fprintf(stderr, "%s\n", __FUNCTION__);
+
+   /* HW color buffers (front, back, aux, generic FBO, etc) */
+   if (colorMask == ~0) {
+      /* clear all R,G,B,A */
+      /* XXX FBO: need to check if colorbuffers are software RBOs! */
+      blit_mask |= (mask & BUFFER_BITS_COLOR);
+   }
+   else {
+      /* glColorMask in effect */
+      tri_mask |= (mask & BUFFER_BITS_COLOR);
+   }
+
+   /* HW stencil */
+   if (mask & BUFFER_BIT_STENCIL) {
+      const struct intel_region *stencilRegion
+         = intel_get_rb_region(fb, BUFFER_STENCIL);
+      if (stencilRegion) {
+         /* have hw stencil */
+         if (IS_965(intel->intelScreen->deviceID) ||
+	     (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
+	    /* We have to use the 3D engine if we're clearing a partial mask
+	     * of the stencil buffer, or if we're on a 965 which has a tiled
+	     * depth/stencil buffer in a layout we can't blit to.
+	     */
+            tri_mask |= BUFFER_BIT_STENCIL;
+         }
+         else {
+            /* clearing all stencil bits, use blitting */
+            blit_mask |= BUFFER_BIT_STENCIL;
+         }
+      }
+   }
+
+   /* HW depth */
+   if (mask & BUFFER_BIT_DEPTH) {
+      /* clear depth with whatever method is used for stencil (see above) */
+      if (IS_965(intel->intelScreen->deviceID) ||
+	  tri_mask & BUFFER_BIT_STENCIL)
+         tri_mask |= BUFFER_BIT_DEPTH;
+      else
+         blit_mask |= BUFFER_BIT_DEPTH;
+   }
+
+   /* SW fallback clearing */
+   swrast_mask = mask & ~tri_mask & ~blit_mask;
+
+   for (i = 0; i < BUFFER_COUNT; i++) {
+      GLuint bufBit = 1 << i;
+      if ((blit_mask | tri_mask) & bufBit) {
+         if (!fb->Attachment[i].Renderbuffer->ClassID) {
+            blit_mask &= ~bufBit;
+            tri_mask &= ~bufBit;
+            swrast_mask |= bufBit;
+         }
+      }
+   }
+
+   if (blit_mask) {
+      if (INTEL_DEBUG & DEBUG_BLIT) {
+	 DBG("blit clear:");
+	 for (i = 0; i < BUFFER_COUNT; i++) {
+	    if (blit_mask & (1 << i))
+	       DBG(" %s", buffer_names[i]);
+	 }
+	 DBG("\n");
+      }
+      intelClearWithBlit(ctx, blit_mask);
+   }
+
+   if (tri_mask) {
+      if (INTEL_DEBUG & DEBUG_BLIT) {
+	 DBG("tri clear:");
+	 for (i = 0; i < BUFFER_COUNT; i++) {
+	    if (tri_mask & (1 << i))
+	       DBG(" %s", buffer_names[i]);
+	 }
+	 DBG("\n");
+      }
+      intelClearWithTris(intel, tri_mask);
+   }
+
+   if (swrast_mask) {
+      if (INTEL_DEBUG & DEBUG_BLIT) {
+	 DBG("swrast clear:");
+	 for (i = 0; i < BUFFER_COUNT; i++) {
+	    if (swrast_mask & (1 << i))
+	       DBG(" %s", buffer_names[i]);
+	 }
+	 DBG("\n");
+      }
+      _swrast_Clear(ctx, swrast_mask);
+   }
+}
+
+
+/* Emit wait for pending flips */
+void
+intel_wait_flips(struct intel_context *intel)
+{
+   struct intel_framebuffer *intel_fb =
+      (struct intel_framebuffer *) intel->ctx.DrawBuffer;
+   struct intel_renderbuffer *intel_rb =
+      intel_get_renderbuffer(&intel_fb->Base,
+			     intel_fb->Base._ColorDrawBufferIndexes[0] ==
+			     BUFFER_FRONT_LEFT ? BUFFER_FRONT_LEFT :
+			     BUFFER_BACK_LEFT);
+
+   if (intel->intelScreen->driScrnPriv->dri2.enabled)
+      return;
+
+   if (intel_fb->Base.Name == 0 && intel_rb &&
+       intel_rb->pf_pending == intel_fb->pf_seq) {
+      GLint pf_planes = intel_fb->pf_planes;
+      BATCH_LOCALS;
+
+      /* Wait for pending flips to take effect */
+      BEGIN_BATCH(2, NO_LOOP_CLIPRECTS);
+      OUT_BATCH(pf_planes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
+		: 0);
+      OUT_BATCH(pf_planes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
+		: 0);
+      ADVANCE_BATCH();
+
+      intel_rb->pf_pending--;
+   }
+}
+
+
+/* Flip the front & back buffers
+ */
+static GLboolean
+intelPageFlip(const __DRIdrawablePrivate * dPriv)
+{
+   struct intel_context *intel;
+   int ret;
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+
+   if (INTEL_DEBUG & DEBUG_IOCTL)
+      fprintf(stderr, "%s\n", __FUNCTION__);
+
+   assert(dPriv);
+   assert(dPriv->driContextPriv);
+   assert(dPriv->driContextPriv->driverPrivate);
+
+   intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
+
+   if (intel->intelScreen->drmMinor < 9)
+      return GL_FALSE;
+
+   intelFlush(&intel->ctx);
+
+   ret = 0;
+
+   LOCK_HARDWARE(intel);
+
+   if (dPriv->numClipRects && intel_fb->pf_active) {
+      drm_i915_flip_t flip;
+
+      flip.pipes = intel_fb->pf_planes;
+
+      ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
+   }
+
+   UNLOCK_HARDWARE(intel);
+
+   if (ret || !intel_fb->pf_active)
+      return GL_FALSE;
+
+   if (!dPriv->numClipRects) {
+      usleep(10000);	/* throttle invisible client 10ms */
+   }
+
+   intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
+				(intel_fb->pf_planes & 0x2)) & 0x3;
+
+   if (dPriv->numClipRects != 0) {
+      intel_get_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT)->pf_pending =
+      intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->pf_pending =
+	 ++intel_fb->pf_seq;
+   }
+
+   intel_flip_renderbuffers(intel_fb);
+   intel_draw_buffer(&intel->ctx, &intel_fb->Base);
+
+   return GL_TRUE;
+}
+
+static GLboolean
+intelScheduleSwap(__DRIdrawablePrivate * dPriv, GLboolean *missed_target)
+{
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+   unsigned int interval;
+   struct intel_context *intel =
+      intelScreenContext(dPriv->driScreenPriv->private);
+   const intelScreenPrivate *intelScreen = intel->intelScreen;
+   unsigned int target;
+   drm_i915_vblank_swap_t swap;
+   GLboolean ret;
+
+   if (!dPriv->vblFlags ||
+       (dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) ||
+       intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6))
+      return GL_FALSE;
+
+   interval = driGetVBlankInterval(dPriv);
+
+   swap.seqtype = DRM_VBLANK_ABSOLUTE;
+
+   if (dPriv->vblFlags & VBLANK_FLAG_SYNC) {
+      swap.seqtype |= DRM_VBLANK_NEXTONMISS;
+   } else if (interval == 0)
+      return GL_FALSE;
+
+   swap.drawable = dPriv->hHWDrawable;
+   target = swap.sequence = dPriv->vblSeq + interval;
+
+   if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
+      swap.seqtype |= DRM_VBLANK_SECONDARY;
+   }
+
+   LOCK_HARDWARE(intel);
+
+   intel_batchbuffer_flush(intel->batch);
+
+   if ( intel_fb->pf_active ) {
+      swap.seqtype |= DRM_VBLANK_FLIP;
+
+      intel_fb->pf_current_page = (((intel->sarea->pf_current_page >>
+				     (intel_fb->pf_planes & 0x2)) & 0x3) + 1) %
+				  intel_fb->pf_num_pages;
+   }
+
+   if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
+			    sizeof(swap))) {
+      dPriv->vblSeq = swap.sequence;
+      swap.sequence -= target;
+      *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23);
+
+      intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->vbl_pending =
+	 intel_get_renderbuffer(&intel_fb->Base,
+				BUFFER_FRONT_LEFT)->vbl_pending =
+	 dPriv->vblSeq;
+
+      if (swap.seqtype & DRM_VBLANK_FLIP) {
+	 intel_flip_renderbuffers(intel_fb);
+	 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
+      }
+
+      ret = GL_TRUE;
+   } else {
+      if (swap.seqtype & DRM_VBLANK_FLIP) {
+	 intel_fb->pf_current_page = ((intel->sarea->pf_current_page >>
+					(intel_fb->pf_planes & 0x2)) & 0x3) %
+				     intel_fb->pf_num_pages;
+      }
+
+      ret = GL_FALSE;
+   }
+
+   UNLOCK_HARDWARE(intel);
+
+   return ret;
+}
+  
+void
+intelSwapBuffers(__DRIdrawablePrivate * dPriv)
+{
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
+
+   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
+      GET_CURRENT_CONTEXT(ctx);
+      struct intel_context *intel;
+
+      if (ctx == NULL)
+	 return;
+
+      intel = intel_context(ctx);
+
+      if (ctx->Visual.doubleBufferMode) {
+	 GLboolean missed_target;
+	 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+	 int64_t ust;
+         
+	 _mesa_notifySwapBuffers(ctx);  /* flush pending rendering comands */
+
+         if (!intelScheduleSwap(dPriv, &missed_target)) {
+	    driWaitForVBlank(dPriv, &missed_target);
+
+	    /*
+	     * Update each buffer's vbl_pending so we don't get too out of
+	     * sync
+	     */
+	    intel_get_renderbuffer(&intel_fb->Base,
+				   BUFFER_BACK_LEFT)->vbl_pending = 
+		    intel_get_renderbuffer(&intel_fb->Base,
+					   BUFFER_FRONT_LEFT)->vbl_pending =
+		    dPriv->vblSeq;
+	    if (!intelPageFlip(dPriv)) {
+	       intelCopyBuffer(dPriv, NULL);
+	    }
+	 }
+
+	 intel_fb->swap_count++;
+	 (*psp->systemTime->getUST) (&ust);
+	 if (missed_target) {
+	    intel_fb->swap_missed_count++;
+	    intel_fb->swap_missed_ust = ust - intel_fb->swap_ust;
+	 }
+
+	 intel_fb->swap_ust = ust;
+      }
+      drmCommandNone(intel->driFd, DRM_I915_GEM_THROTTLE);
+
+   }
+   else {
+      /* XXX this shouldn't be an error but we can't handle it for now */
+      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
+   }
+}
+
+void
+intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h)
+{
+   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
+      struct intel_context *intel =
+         (struct intel_context *) dPriv->driContextPriv->driverPrivate;
+      GLcontext *ctx = &intel->ctx;
+
+      if (ctx->Visual.doubleBufferMode) {
+         drm_clip_rect_t rect;
+         rect.x1 = x + dPriv->x;
+         rect.y1 = (dPriv->h - y - h) + dPriv->y;
+         rect.x2 = rect.x1 + w;
+         rect.y2 = rect.y1 + h;
+         _mesa_notifySwapBuffers(ctx);  /* flush pending rendering comands */
+         intelCopyBuffer(dPriv, &rect);
+      }
+   }
+   else {
+      /* XXX this shouldn't be an error but we can't handle it for now */
+      fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
+   }
+}
+
+
+/**
+ * Update the hardware state for drawing into a window or framebuffer object.
+ *
+ * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
+ * places within the driver.
+ *
+ * Basically, this needs to be called any time the current framebuffer
+ * changes, the renderbuffers change, or we need to draw into different
+ * color buffers.
+ */
+void
+intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_region *colorRegions[MAX_DRAW_BUFFERS], *depthRegion = NULL;
+   struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
+
+   if (!fb) {
+      /* this can happen during the initial context initialization */
+      return;
+   }
+
+   /* Do this here, note core Mesa, since this function is called from
+    * many places within the driver.
+    */
+   if (ctx->NewState & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
+      /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
+      _mesa_update_framebuffer(ctx);
+      /* this updates the DrawBuffer's Width/Height if it's a FBO */
+      _mesa_update_draw_buffer_bounds(ctx);
+   }
+
+   if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
+      /* this may occur when we're called by glBindFrameBuffer() during
+       * the process of someone setting up renderbuffers, etc.
+       */
+      /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
+      return;
+   }
+
+   if (fb->Name)
+      intel_validate_paired_depth_stencil(ctx, fb);
+
+   /*
+    * How many color buffers are we drawing into?
+    */
+   if (fb->_NumColorDrawBuffers == 0) {
+      /* writing to 0  */
+      colorRegions[0] = NULL;
+      intel->constant_cliprect = GL_TRUE;
+   } else if (fb->_NumColorDrawBuffers > 1) {
+       int i;
+       struct intel_renderbuffer *irb;
+
+       for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
+           irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
+           colorRegions[i] = irb ? irb->region : NULL;
+       }
+       intel->constant_cliprect = GL_TRUE;
+   }
+   else {
+      /* Get the intel_renderbuffer for the single colorbuffer we're drawing
+       * into, and set up cliprects if it's .
+       */
+      if (fb->Name == 0) {
+	 intel->constant_cliprect = intel->driScreen->dri2.enabled;
+	 /* drawing to window system buffer */
+	 if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
+	    if (!intel->constant_cliprect && !intel->front_cliprects)
+	       intel_batchbuffer_flush(intel->batch);
+	    intel->front_cliprects = GL_TRUE;
+	    colorRegions[0] = intel_get_rb_region(fb, BUFFER_FRONT_LEFT);
+	 }
+	 else {
+	    if (!intel->constant_cliprect && intel->front_cliprects)
+	       intel_batchbuffer_flush(intel->batch);
+	    intel->front_cliprects = GL_FALSE;
+	    colorRegions[0]= intel_get_rb_region(fb, BUFFER_BACK_LEFT);
+	 }
+      }
+      else {
+	 /* drawing to user-created FBO */
+	 struct intel_renderbuffer *irb;
+	 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]);
+	 colorRegions[0] = (irb && irb->region) ? irb->region : NULL;
+	 intel->constant_cliprect = GL_TRUE;
+      }
+   }
+
+   /* Update culling direction which changes depending on the
+    * orientation of the buffer:
+    */
+   if (ctx->Driver.FrontFace)
+      ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace);
+   else
+      ctx->NewState |= _NEW_POLYGON;
+
+   if (!colorRegions[0]) {
+      FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE);
+   }
+   else {
+      FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE);
+   }
+
+   /***
+    *** Get depth buffer region and check if we need a software fallback.
+    *** Note that the depth buffer is usually a DEPTH_STENCIL buffer.
+    ***/
+   if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) {
+      irbDepth = intel_renderbuffer(fb->_DepthBuffer->Wrapped);
+      if (irbDepth && irbDepth->region) {
+         FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_FALSE);
+         depthRegion = irbDepth->region;
+      }
+      else {
+         FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_TRUE);
+         depthRegion = NULL;
+      }
+   }
+   else {
+      /* not using depth buffer */
+      FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_FALSE);
+      depthRegion = NULL;
+   }
+
+   /***
+    *** Stencil buffer
+    *** This can only be hardware accelerated if we're using a
+    *** combined DEPTH_STENCIL buffer (for now anyway).
+    ***/
+   if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) {
+      irbStencil = intel_renderbuffer(fb->_StencilBuffer->Wrapped);
+      if (irbStencil && irbStencil->region) {
+         ASSERT(irbStencil->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+         FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
+         /* need to re-compute stencil hw state */
+	 if (ctx->Driver.Enable != NULL)
+	    ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
+	 else
+	    ctx->NewState |= _NEW_STENCIL;
+         if (!depthRegion)
+            depthRegion = irbStencil->region;
+      }
+      else {
+         FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_TRUE);
+      }
+   }
+   else {
+      /* XXX FBO: instead of FALSE, pass ctx->Stencil.Enabled ??? */
+      FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
+      /* need to re-compute stencil hw state */
+      if (ctx->Driver.Enable != NULL)
+	 ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
+      else
+	 ctx->NewState |= _NEW_STENCIL;
+   }
+
+   /*
+    * Update depth test state
+    */
+   if (ctx->Driver.Enable) {
+      if (ctx->Depth.Test && fb->Visual.depthBits > 0) {
+	 ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_TRUE);
+      } else {
+	 ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_FALSE);
+      }
+   } else {
+      ctx->NewState |= _NEW_DEPTH;
+   }
+
+   intel->vtbl.set_draw_region(intel, colorRegions, depthRegion, 
+	fb->_NumColorDrawBuffers);
+
+   /* update viewport since it depends on window size */
+   if (ctx->Driver.Viewport) {
+      ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y,
+			   ctx->Viewport.Width, ctx->Viewport.Height);
+   } else {
+      ctx->NewState |= _NEW_VIEWPORT;
+   }
+
+   /* Set state we know depends on drawable parameters:
+    */
+   if (ctx->Driver.Scissor)
+      ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
+			  ctx->Scissor.Width, ctx->Scissor.Height);
+   intel->NewGLState |= _NEW_SCISSOR;
+
+   if (ctx->Driver.DepthRange)
+      ctx->Driver.DepthRange(ctx,
+			     ctx->Viewport.Near,
+			     ctx->Viewport.Far);
+}
+
+
+static void
+intelDrawBuffer(GLcontext * ctx, GLenum mode)
+{
+   intel_draw_buffer(ctx, ctx->DrawBuffer);
+}
+
+
+static void
+intelReadBuffer(GLcontext * ctx, GLenum mode)
+{
+   if (ctx->ReadBuffer == ctx->DrawBuffer) {
+      /* This will update FBO completeness status.
+       * A framebuffer will be incomplete if the GL_READ_BUFFER setting
+       * refers to a missing renderbuffer.  Calling glReadBuffer can set
+       * that straight and can make the drawing buffer complete.
+       */
+      intel_draw_buffer(ctx, ctx->DrawBuffer);
+   }
+   /* Generally, functions which read pixels (glReadPixels, glCopyPixels, etc)
+    * reference ctx->ReadBuffer and do appropriate state checks.
+    */
+}
+
+
+void
+intelInitBufferFuncs(struct dd_function_table *functions)
+{
+   functions->Clear = intelClear;
+   functions->DrawBuffer = intelDrawBuffer;
+   functions->ReadBuffer = intelReadBuffer;
+}
diff --git a/src/mesa/drivers/dri/i915/intel_span.h b/src/mesa/drivers/dri/intel/intel_buffers.h
index 2d4f8589d0f..e5afb37dd1a 100644
--- a/src/mesa/drivers/dri/i915/intel_span.h
+++ b/src/mesa/drivers/dri/intel/intel_buffers.h
@@ -1,6 +1,7 @@
+
 /**************************************************************************
  * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
  * 
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -25,17 +26,38 @@
  * 
  **************************************************************************/
 
-#ifndef _INTEL_SPAN_H
-#define _INTEL_SPAN_H
+#ifndef INTEL_BUFFERS_H
+#define INTEL_BUFFERS_H
+
+#include "dri_util.h"
+#include "drm.h"
+
+struct intel_context;
+struct intel_framebuffer;
+
+
+extern GLboolean
+intel_intersect_cliprects(drm_clip_rect_t * dest,
+                          const drm_clip_rect_t * a,
+                          const drm_clip_rect_t * b);
+
+extern struct intel_region *intel_readbuf_region(struct intel_context *intel);
+
+extern struct intel_region *intel_drawbuf_region(struct intel_context *intel);
+
+extern void intel_wait_flips(struct intel_context *intel);
+
+extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);
 
-#include "drirenderbuffer.h"
+extern void intelWindowMoved(struct intel_context *intel);
 
-extern void intelInitSpanFuncs( GLcontext *ctx );
+extern void intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb);
 
-extern void intelSpanRenderFinish( GLcontext *ctx );
-extern void intelSpanRenderStart( GLcontext *ctx );
+extern void intelInitBufferFuncs(struct dd_function_table *functions);
 
-extern void
-intelSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis);
+void intel_get_cliprects(struct intel_context *intel,
+			 struct drm_clip_rect **cliprects,
+			 unsigned int *num_cliprects,
+			 int *x_off, int *y_off);
 
-#endif
+#endif /* INTEL_BUFFERS_H */
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
new file mode 100644
index 00000000000..d1b4941601e
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright © 2007 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+#define PCI_CHIP_I810			0x7121
+#define PCI_CHIP_I810_DC100		0x7123
+#define PCI_CHIP_I810_E			0x7125
+#define PCI_CHIP_I815			0x1132
+
+#define PCI_CHIP_I830_M			0x3577
+#define PCI_CHIP_845_G			0x2562
+#define PCI_CHIP_I855_GM		0x3582
+#define PCI_CHIP_I865_G			0x2572
+
+#define PCI_CHIP_I915_G			0x2582
+#define PCI_CHIP_E7221_G		0x258A
+#define PCI_CHIP_I915_GM		0x2592
+#define PCI_CHIP_I945_G			0x2772
+#define PCI_CHIP_I945_GM		0x27A2
+#define PCI_CHIP_I945_GME		0x27AE
+
+#define PCI_CHIP_Q35_G			0x29B2
+#define PCI_CHIP_G33_G			0x29C2
+#define PCI_CHIP_Q33_G			0x29D2
+
+#define PCI_CHIP_I965_G			0x29A2
+#define PCI_CHIP_I965_Q			0x2992
+#define PCI_CHIP_I965_G_1		0x2982
+#define PCI_CHIP_I946_GZ		0x2972
+#define PCI_CHIP_I965_GM                0x2A02
+#define PCI_CHIP_I965_GME               0x2A12
+
+#define PCI_CHIP_GM45_GM                0x2A42
+
+#define PCI_CHIP_IGD_E_G                0x2E02
+#define PCI_CHIP_Q45_G                  0x2E12
+#define PCI_CHIP_G45_G                  0x2E22
+#define PCI_CHIP_G41_G                  0x2E32
+
+#define IS_MOBILE(devid)	(devid == PCI_CHIP_I855_GM || \
+				 devid == PCI_CHIP_I915_GM || \
+				 devid == PCI_CHIP_I945_GM || \
+				 devid == PCI_CHIP_I945_GME || \
+				 devid == PCI_CHIP_I965_GM || \
+				 devid == PCI_CHIP_I965_GME || \
+				 devid == PCI_CHIP_GM45_GM)
+
+#define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G || \
+                                 devid == PCI_CHIP_Q45_G || \
+                                 devid == PCI_CHIP_G45_G || \
+                                 devid == PCI_CHIP_G41_G)
+#define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
+#define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))
+
+#define IS_915(devid)		(devid == PCI_CHIP_I915_G || \
+				 devid == PCI_CHIP_E7221_G || \
+				 devid == PCI_CHIP_I915_GM)
+
+#define IS_945(devid)		(devid == PCI_CHIP_I945_G || \
+				 devid == PCI_CHIP_I945_GM || \
+				 devid == PCI_CHIP_I945_GME || \
+				 devid == PCI_CHIP_G33_G || \
+				 devid == PCI_CHIP_Q33_G || \
+				 devid == PCI_CHIP_Q35_G)
+
+#define IS_965(devid)		(devid == PCI_CHIP_I965_G || \
+				 devid == PCI_CHIP_I965_Q || \
+				 devid == PCI_CHIP_I965_G_1 || \
+				 devid == PCI_CHIP_I965_GM || \
+				 devid == PCI_CHIP_I965_GME || \
+				 devid == PCI_CHIP_I946_GZ || \
+				 IS_G4X(devid))
+
+#define IS_9XX(devid)		(IS_915(devid) || \
+				 IS_945(devid) || \
+				 IS_965(devid))
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
new file mode 100644
index 00000000000..6c625b428c0
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -0,0 +1,1022 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/matrix.h"
+#include "main/simple_list.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/imports.h"
+#include "main/points.h"
+
+#include "swrast/swrast.h"
+#include "swrast_setup/swrast_setup.h"
+#include "tnl/tnl.h"
+
+#include "tnl/t_pipeline.h"
+#include "tnl/t_vertex.h"
+
+#include "drivers/common/driverfuncs.h"
+
+#include "intel_screen.h"
+
+#include "i830_dri.h"
+
+#include "intel_chipset.h"
+#include "intel_buffers.h"
+#include "intel_tex.h"
+#include "intel_batchbuffer.h"
+#include "intel_blit.h"
+#include "intel_pixel.h"
+#include "intel_regions.h"
+#include "intel_buffer_objects.h"
+#include "intel_fbo.h"
+#include "intel_decode.h"
+#include "intel_bufmgr.h"
+
+#include "drirenderbuffer.h"
+#include "vblank.h"
+#include "utils.h"
+#include "xmlpool.h"            /* for symbolic values of enum-type options */
+#ifndef INTEL_DEBUG
+int INTEL_DEBUG = (0);
+#endif
+
+#define need_GL_ARB_multisample
+#define need_GL_ARB_occlusion_query
+#define need_GL_ARB_point_parameters
+#define need_GL_ARB_shader_objects
+#define need_GL_ARB_texture_compression
+#define need_GL_ARB_vertex_buffer_object
+#define need_GL_ARB_vertex_program
+#define need_GL_ARB_vertex_shader
+#define need_GL_ARB_window_pos
+#define need_GL_EXT_blend_color
+#define need_GL_EXT_blend_equation_separate
+#define need_GL_EXT_blend_func_separate
+#define need_GL_EXT_blend_minmax
+#define need_GL_EXT_cull_vertex
+#define need_GL_EXT_fog_coord
+#define need_GL_EXT_framebuffer_object
+#define need_GL_EXT_multi_draw_arrays
+#define need_GL_EXT_point_parameters
+#define need_GL_EXT_secondary_color
+#define need_GL_ATI_separate_stencil
+#define need_GL_NV_point_sprite
+#define need_GL_NV_vertex_program
+#define need_GL_VERSION_2_0
+#define need_GL_VERSION_2_1
+
+#include "extension_helper.h"
+
+#define DRIVER_DATE                     "20080716"
+#define DRIVER_DATE_GEM                 "GEM " DRIVER_DATE
+
+static const GLubyte *
+intelGetString(GLcontext * ctx, GLenum name)
+{
+   const struct intel_context *const intel = intel_context(ctx);
+   const char *chipset;
+   static char buffer[128];
+
+   switch (name) {
+   case GL_VENDOR:
+      return (GLubyte *) "Tungsten Graphics, Inc";
+      break;
+
+   case GL_RENDERER:
+      switch (intel->intelScreen->deviceID) {
+      case PCI_CHIP_845_G:
+         chipset = "Intel(R) 845G";
+         break;
+      case PCI_CHIP_I830_M:
+         chipset = "Intel(R) 830M";
+         break;
+      case PCI_CHIP_I855_GM:
+         chipset = "Intel(R) 852GM/855GM";
+         break;
+      case PCI_CHIP_I865_G:
+         chipset = "Intel(R) 865G";
+         break;
+      case PCI_CHIP_I915_G:
+         chipset = "Intel(R) 915G";
+         break;
+      case PCI_CHIP_E7221_G:
+	 chipset = "Intel (R) E7221G (i915)";
+	 break;
+      case PCI_CHIP_I915_GM:
+         chipset = "Intel(R) 915GM";
+         break;
+      case PCI_CHIP_I945_G:
+         chipset = "Intel(R) 945G";
+         break;
+      case PCI_CHIP_I945_GM:
+         chipset = "Intel(R) 945GM";
+         break;
+      case PCI_CHIP_I945_GME:
+         chipset = "Intel(R) 945GME";
+         break;
+      case PCI_CHIP_G33_G:
+	 chipset = "Intel(R) G33";
+	 break;
+      case PCI_CHIP_Q35_G:
+	 chipset = "Intel(R) Q35";
+	 break;
+      case PCI_CHIP_Q33_G:
+	 chipset = "Intel(R) Q33";
+	 break;
+      case PCI_CHIP_I965_Q:
+	 chipset = "Intel(R) 965Q";
+	 break;
+      case PCI_CHIP_I965_G:
+      case PCI_CHIP_I965_G_1:
+	 chipset = "Intel(R) 965G";
+	 break;
+      case PCI_CHIP_I946_GZ:
+	 chipset = "Intel(R) 946GZ";
+	 break;
+      case PCI_CHIP_I965_GM:
+	 chipset = "Intel(R) 965GM";
+	 break;
+      case PCI_CHIP_I965_GME:
+	 chipset = "Intel(R) 965GME/GLE";
+	 break;
+      case PCI_CHIP_GM45_GM:
+	 chipset = "Mobile Intel® GM45 Express Chipset";
+	 break; 
+      case PCI_CHIP_IGD_E_G:
+	 chipset = "Intel(R) Integrated Graphics Device";
+	 break;
+      case PCI_CHIP_G45_G:
+         chipset = "Intel(R) G45/G43";
+         break;
+      case PCI_CHIP_Q45_G:
+         chipset = "Intel(R) Q45/Q43";
+         break;
+      case PCI_CHIP_G41_G:
+         chipset = "Intel(R) G41";
+         break;
+      default:
+         chipset = "Unknown Intel Chipset";
+         break;
+      }
+
+      (void) driGetRendererString(buffer, chipset, 
+				  (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
+				  0);
+      return (GLubyte *) buffer;
+
+   default:
+      return NULL;
+   }
+}
+
+void
+intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
+{
+   struct intel_framebuffer *intel_fb = drawable->driverPrivate;
+   struct intel_renderbuffer *rb;
+   struct intel_region *region, *depth_region;
+   struct intel_context *intel = context->driverPrivate;
+   __DRIbuffer *buffers;
+   __DRIscreen *screen;
+   int i, count;
+   unsigned int attachments[10];
+   uint32_t name;
+   const char *region_name;
+
+   if (INTEL_DEBUG & DEBUG_DRI)
+      fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
+
+   screen = intel->intelScreen->driScrnPriv;
+
+   i = 0;
+   if (intel_fb->color_rb[0])
+      attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
+   if (intel_fb->color_rb[1])
+      attachments[i++] = __DRI_BUFFER_BACK_LEFT;
+   if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH))
+      attachments[i++] = __DRI_BUFFER_DEPTH;
+   if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL))
+      attachments[i++] = __DRI_BUFFER_STENCIL;
+
+   buffers = (*screen->dri2.loader->getBuffers)(drawable,
+						&drawable->w,
+						&drawable->h,
+						attachments, i,
+						&count,
+						drawable->loaderPrivate);
+
+   if (buffers == NULL)
+      return;
+
+   drawable->x = 0;
+   drawable->y = 0;
+   drawable->backX = 0;
+   drawable->backY = 0;
+   drawable->numClipRects = 1;
+   drawable->pClipRects[0].x1 = 0;
+   drawable->pClipRects[0].y1 = 0;
+   drawable->pClipRects[0].x2 = drawable->w;
+   drawable->pClipRects[0].y2 = drawable->h;
+   drawable->numBackClipRects = 1;
+   drawable->pBackClipRects[0].x1 = 0;
+   drawable->pBackClipRects[0].y1 = 0;
+   drawable->pBackClipRects[0].x2 = drawable->w;
+   drawable->pBackClipRects[0].y2 = drawable->h;
+
+   depth_region = NULL;
+   for (i = 0; i < count; i++) {
+       switch (buffers[i].attachment) {
+       case __DRI_BUFFER_FRONT_LEFT:
+	   rb = intel_fb->color_rb[0];
+	   region_name = "dri2 front buffer";
+	   break;
+
+       case __DRI_BUFFER_BACK_LEFT:
+	   rb = intel_fb->color_rb[1];
+	   region_name = "dri2 back buffer";
+	   break;
+
+       case __DRI_BUFFER_DEPTH:
+	   rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
+	   region_name = "dri2 depth buffer";
+	   break;
+
+       case __DRI_BUFFER_STENCIL:
+	   rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
+	   region_name = "dri2 stencil buffer";
+	   break;
+
+       case __DRI_BUFFER_ACCUM:
+       default:
+	   fprintf(stderr,
+		   "unhandled buffer attach event, attacment type %d\n",
+		   buffers[i].attachment);
+	   return;
+       }
+
+       if (rb->region) {
+	  dri_bo_flink(rb->region->buffer, &name);
+	  if (name == buffers[i].name)
+	     continue;
+       }
+
+       if (INTEL_DEBUG & DEBUG_DRI)
+	  fprintf(stderr,
+		  "attaching buffer %d, at %d, cpp %d, pitch %d\n",
+		  buffers[i].name, buffers[i].attachment,
+		  buffers[i].cpp, buffers[i].pitch);
+       
+       if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) {
+	  if (INTEL_DEBUG & DEBUG_DRI)
+	     fprintf(stderr, "(reusing depth buffer as stencil)\n");
+	  intel_region_reference(&region, depth_region);
+       }
+       else
+          region = intel_region_alloc_for_handle(intel, buffers[i].cpp,
+						 drawable->w,
+						 drawable->h,
+						 buffers[i].pitch / buffers[i].cpp,
+						 buffers[i].name,
+						 region_name);
+
+       if (buffers[i].attachment == __DRI_BUFFER_DEPTH)
+	  depth_region = region;
+
+       intel_renderbuffer_set_region(rb, region);
+       intel_region_release(&region);
+   }
+
+   driUpdateFramebufferSize(&intel->ctx, drawable);
+}
+
+void
+intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
+{
+    struct intel_context *intel = intel_context(ctx);
+    __DRIcontext *driContext = intel->driContext;
+    void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
+			 GLsizei w, GLsizei h);
+
+    if (!driContext->driScreenPriv->dri2.enabled)
+	return;
+
+    intel_update_renderbuffers(driContext, driContext->driDrawablePriv);
+    if (driContext->driDrawablePriv != driContext->driReadablePriv)
+	intel_update_renderbuffers(driContext, driContext->driReadablePriv);
+
+    old_viewport = ctx->Driver.Viewport;
+    ctx->Driver.Viewport = NULL;
+    intel->driDrawable = driContext->driDrawablePriv;
+    intelWindowMoved(intel);
+    intel_draw_buffer(ctx, intel->ctx.DrawBuffer);
+    ctx->Driver.Viewport = old_viewport;
+}
+
+/**
+ * Extension strings exported by the intel driver.
+ *
+ * Extensions supported by all chips supported by i830_dri, i915_dri, or
+ * i965_dri.
+ */
+static const struct dri_extension card_extensions[] = {
+   { "GL_ARB_multisample",                GL_ARB_multisample_functions },
+   { "GL_ARB_multitexture",               NULL },
+   { "GL_ARB_point_parameters",           GL_ARB_point_parameters_functions },
+   { "GL_ARB_texture_border_clamp",       NULL },
+   { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
+   { "GL_ARB_texture_cube_map",           NULL },
+   { "GL_ARB_texture_env_add",            NULL },
+   { "GL_ARB_texture_env_combine",        NULL },
+   { "GL_ARB_texture_env_crossbar",       NULL },
+   { "GL_ARB_texture_env_dot3",           NULL },
+   { "GL_ARB_texture_mirrored_repeat",    NULL },
+   { "GL_ARB_texture_rectangle",          NULL },
+   { "GL_ARB_vertex_buffer_object",       GL_ARB_vertex_buffer_object_functions },
+   { "GL_ARB_vertex_program",             GL_ARB_vertex_program_functions },
+   { "GL_ARB_window_pos",                 GL_ARB_window_pos_functions },
+   { "GL_EXT_blend_color",                GL_EXT_blend_color_functions },
+   { "GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions },
+   { "GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions },
+   { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
+   { "GL_EXT_blend_logic_op",             NULL },
+   { "GL_EXT_blend_subtract",             NULL },
+   { "GL_EXT_cull_vertex",                GL_EXT_cull_vertex_functions },
+   { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
+   { "GL_EXT_multi_draw_arrays",          GL_EXT_multi_draw_arrays_functions },
+   { "GL_EXT_packed_depth_stencil",       NULL },
+   { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
+   { "GL_EXT_stencil_wrap",               NULL },
+   { "GL_EXT_texture_edge_clamp",         NULL },
+   { "GL_EXT_texture_env_combine",        NULL },
+   { "GL_EXT_texture_env_dot3",           NULL },
+   { "GL_EXT_texture_filter_anisotropic", NULL },
+   { "GL_EXT_texture_lod_bias",           NULL },
+   { "GL_3DFX_texture_compression_FXT1",  NULL },
+   { "GL_APPLE_client_storage",           NULL },
+   { "GL_MESA_pack_invert",               NULL },
+   { "GL_MESA_ycbcr_texture",             NULL },
+   { "GL_NV_blend_square",                NULL },
+   { "GL_NV_point_sprite",                GL_NV_point_sprite_functions },
+   { "GL_NV_vertex_program",              GL_NV_vertex_program_functions },
+   { "GL_NV_vertex_program1_1",           NULL },
+   { "GL_SGIS_generate_mipmap",           NULL },
+   { NULL, NULL }
+};
+
+static const struct dri_extension brw_extensions[] = {
+   { "GL_ARB_depth_texture",              NULL },
+   { "GL_ARB_draw_buffers",               NULL },
+   { "GL_ARB_fragment_program",           NULL },
+   { "GL_ARB_fragment_program_shadow",    NULL },
+   { "GL_ARB_fragment_shader",            NULL },
+   { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions },
+   { "GL_ARB_point_sprite", 		  NULL },
+   { "GL_ARB_shader_objects",             GL_ARB_shader_objects_functions },
+   { "GL_ARB_shading_language_100",       GL_VERSION_2_0_functions },
+#if 0
+   /* Support for GLSL 1.20 is currently broken in core Mesa.
+    */
+   { "GL_ARB_shading_language_120",       GL_VERSION_2_1_functions },
+#endif
+   { "GL_ARB_shadow",                     NULL },
+   { "GL_ARB_texture_non_power_of_two",   NULL },
+   { "GL_ARB_vertex_shader",              GL_ARB_vertex_shader_functions },
+   { "GL_EXT_shadow_funcs",               NULL },
+   { "GL_EXT_texture_sRGB",		  NULL },
+   { "GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions },
+   { NULL,                                NULL }
+};
+
+static const struct dri_extension arb_oq_extensions[] = {
+   { NULL, NULL }
+};
+
+static const struct dri_extension ttm_extensions[] = {
+   { "GL_ARB_pixel_buffer_object",        NULL },
+   { "GL_EXT_framebuffer_object",         GL_EXT_framebuffer_object_functions },
+   { NULL, NULL }
+};
+
+/**
+ * Initializes potential list of extensions if ctx == NULL, or actually enables
+ * extensions for a context.
+ */
+void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging)
+{
+   struct intel_context *intel = ctx?intel_context(ctx):NULL;
+
+   /* Disable imaging extension until convolution is working in teximage paths.
+    */
+   enable_imaging = GL_FALSE;
+
+   driInitExtensions(ctx, card_extensions, enable_imaging);
+
+   if (intel == NULL || intel->ttm)
+      driInitExtensions(ctx, ttm_extensions, GL_FALSE);
+
+   if (intel == NULL || IS_965(intel->intelScreen->deviceID))
+      driInitExtensions(ctx, brw_extensions, GL_FALSE);
+}
+
+static const struct dri_debug_control debug_control[] = {
+   { "tex",   DEBUG_TEXTURE},
+   { "state", DEBUG_STATE},
+   { "ioctl", DEBUG_IOCTL},
+   { "blit",  DEBUG_BLIT},
+   { "mip",   DEBUG_MIPTREE},
+   { "fall",  DEBUG_FALLBACKS},
+   { "verb",  DEBUG_VERBOSE},
+   { "bat",   DEBUG_BATCH},
+   { "pix",   DEBUG_PIXEL},
+   { "buf",   DEBUG_BUFMGR},
+   { "reg",   DEBUG_REGION},
+   { "fbo",   DEBUG_FBO},
+   { "lock",  DEBUG_LOCK},
+   { "sync",  DEBUG_SYNC},
+   { "prim",  DEBUG_PRIMS },
+   { "vert",  DEBUG_VERTS },
+   { "dri",   DEBUG_DRI },
+   { "dma",   DEBUG_DMA },
+   { "san",   DEBUG_SANITY },
+   { "sleep", DEBUG_SLEEP },
+   { "stats", DEBUG_STATS },
+   { "tile",  DEBUG_TILE },
+   { "sing",  DEBUG_SINGLE_THREAD },
+   { "thre",  DEBUG_SINGLE_THREAD },
+   { "wm",    DEBUG_WM },
+   { "urb",   DEBUG_URB },
+   { "vs",    DEBUG_VS },
+   { NULL,    0 }
+};
+
+
+static void
+intelInvalidateState(GLcontext * ctx, GLuint new_state)
+{
+    struct intel_context *intel = intel_context(ctx);
+
+   _swrast_InvalidateState(ctx, new_state);
+   _swsetup_InvalidateState(ctx, new_state);
+   _vbo_InvalidateState(ctx, new_state);
+   _tnl_InvalidateState(ctx, new_state);
+   _tnl_invalidate_vertex_state(ctx, new_state);
+
+   intel->NewGLState |= new_state;
+
+   if (intel->vtbl.invalidate_state)
+      intel->vtbl.invalidate_state( intel, new_state );
+}
+
+
+void
+intelFlush(GLcontext * ctx)
+{
+   struct intel_context *intel = intel_context(ctx);
+
+   if (intel->Fallback)
+      _swrast_flush(ctx);
+
+   if (!IS_965(intel->intelScreen->deviceID))
+      INTEL_FIREVERTICES(intel);
+
+   /* Emit a flush so that any frontbuffer rendering that might have occurred
+    * lands onscreen in a timely manner, even if the X Server doesn't trigger
+    * a flush for us.
+    */
+   intel_batchbuffer_emit_mi_flush(intel->batch);
+
+   if (intel->batch->map != intel->batch->ptr)
+      intel_batchbuffer_flush(intel->batch);
+}
+
+void
+intelFinish(GLcontext * ctx)
+{
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   int i;
+
+   intelFlush(ctx);
+
+   for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
+       struct intel_renderbuffer *irb;
+
+       irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
+
+       if (irb->region)
+	  dri_bo_wait_rendering(irb->region->buffer);
+   }
+   if (fb->_DepthBuffer) {
+      /* XXX: Wait on buffer idle */
+   }
+}
+
+void
+intelInitDriverFunctions(struct dd_function_table *functions)
+{
+   _mesa_init_driver_functions(functions);
+
+   functions->Flush = intelFlush;
+   functions->Finish = intelFinish;
+   functions->GetString = intelGetString;
+   functions->UpdateState = intelInvalidateState;
+
+   functions->CopyColorTable = _swrast_CopyColorTable;
+   functions->CopyColorSubTable = _swrast_CopyColorSubTable;
+   functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
+   functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
+
+   intelInitTextureFuncs(functions);
+   intelInitStateFuncs(functions);
+   intelInitBufferFuncs(functions);
+   intelInitPixelFuncs(functions);
+}
+
+
+GLboolean
+intelInitContext(struct intel_context *intel,
+                 const __GLcontextModes * mesaVis,
+                 __DRIcontextPrivate * driContextPriv,
+                 void *sharedContextPrivate,
+                 struct dd_function_table *functions)
+{
+   GLcontext *ctx = &intel->ctx;
+   GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
+   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
+   int fthrottle_mode;
+
+   if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
+                                 functions, (void *) intel)) {
+      _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   driContextPriv->driverPrivate = intel;
+   intel->intelScreen = intelScreen;
+   intel->driScreen = sPriv;
+   intel->sarea = intelScreen->sarea;
+   intel->driContext = driContextPriv;
+
+   /* Dri stuff */
+   intel->hHWContext = driContextPriv->hHWContext;
+   intel->driFd = sPriv->fd;
+   intel->driHwLock = sPriv->lock;
+
+   driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
+                       intel->driScreen->myNum,
+		       IS_965(intelScreen->deviceID) ? "i965" : "i915");
+   if (intelScreen->deviceID == PCI_CHIP_I865_G)
+      intel->maxBatchSize = 4096;
+   else
+      intel->maxBatchSize = BATCH_SZ;
+
+   intel->bufmgr = intelScreen->bufmgr;
+   intel->ttm = intelScreen->ttm;
+   if (intel->ttm) {
+      int bo_reuse_mode;
+
+      bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
+      switch (bo_reuse_mode) {
+      case DRI_CONF_BO_REUSE_DISABLED:
+	 break;
+      case DRI_CONF_BO_REUSE_ALL:
+	 intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+	 break;
+      }
+   }
+
+   ctx->Const.MaxTextureMaxAnisotropy = 2.0;
+
+   /* This doesn't yet catch all non-conformant rendering, but it's a
+    * start.
+    */
+   if (getenv("INTEL_STRICT_CONFORMANCE")) {
+      intel->strict_conformance = 1;
+   }
+
+   if (intel->strict_conformance) {
+      ctx->Const.MinLineWidth = 1.0;
+      ctx->Const.MinLineWidthAA = 1.0;
+      ctx->Const.MaxLineWidth = 1.0;
+      ctx->Const.MaxLineWidthAA = 1.0;
+      ctx->Const.LineWidthGranularity = 1.0;
+   }
+   else {
+      ctx->Const.MinLineWidth = 1.0;
+      ctx->Const.MinLineWidthAA = 1.0;
+      ctx->Const.MaxLineWidth = 5.0;
+      ctx->Const.MaxLineWidthAA = 5.0;
+      ctx->Const.LineWidthGranularity = 0.5;
+   }
+
+   ctx->Const.MinPointSize = 1.0;
+   ctx->Const.MinPointSizeAA = 1.0;
+   ctx->Const.MaxPointSize = 255.0;
+   ctx->Const.MaxPointSizeAA = 3.0;
+   ctx->Const.PointSizeGranularity = 1.0;
+
+   /* reinitialize the context point state.
+    * It depend on constants in __GLcontextRec::Const
+    */
+   _mesa_init_point(ctx);
+
+   ctx->Const.MaxColorAttachments = 4;  /* XXX FBO: review this */
+
+   /* Initialize the software rasterizer and helper modules. */
+   _swrast_CreateContext(ctx);
+   _vbo_CreateContext(ctx);
+   _tnl_CreateContext(ctx);
+   _swsetup_CreateContext(ctx);
+ 
+   /* Configure swrast to match hardware characteristics: */
+   _swrast_allow_pixel_fog(ctx, GL_FALSE);
+   _swrast_allow_vertex_fog(ctx, GL_TRUE);
+
+   intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
+   intel->hw_stipple = 1;
+
+   /* XXX FBO: this doesn't seem to be used anywhere */
+   switch (mesaVis->depthBits) {
+   case 0:                     /* what to do in this case? */
+   case 16:
+      intel->polygon_offset_scale = 1.0;
+      break;
+   case 24:
+      intel->polygon_offset_scale = 2.0;     /* req'd to pass glean */
+      break;
+   default:
+      assert(0);
+      break;
+   }
+
+   if (IS_965(intelScreen->deviceID))
+      intel->polygon_offset_scale /= 0xffff;
+
+   intel->RenderIndex = ~0;
+
+   fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
+   intel->irqsEmitted = 0;
+
+   intel->do_irqs = (intel->intelScreen->irq_active &&
+                     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
+
+   intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
+
+   _math_matrix_ctr(&intel->ViewportMatrix);
+
+   if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
+      _mesa_printf("IRQs not active.  Exiting\n");
+      exit(1);
+   }
+
+   intelInitExtensions(ctx, GL_FALSE);
+
+   INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
+   if (INTEL_DEBUG & DEBUG_BUFMGR)
+      dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE);
+
+   if (!sPriv->dri2.enabled)
+      intel_recreate_static_regions(intel);
+
+   intel->batch = intel_batchbuffer_alloc(intel);
+
+   intel_bufferobj_init(intel);
+   intel_fbo_init(intel);
+
+   if (intel->ctx.Mesa_DXTn) {
+      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+      _mesa_enable_extension(ctx, "GL_S3_s3tc");
+   }
+   else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
+      _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+   }
+
+   intel->prim.primitive = ~0;
+
+   /* Force all software fallbacks */
+   if (driQueryOptionb(&intel->optionCache, "no_rast")) {
+      fprintf(stderr, "disabling 3D rasterization\n");
+      intel->no_rast = 1;
+   }
+
+   /* Disable all hardware rendering (skip emitting batches and fences/waits
+    * to the kernel)
+    */
+   intel->no_hw = getenv("INTEL_NO_HW") != NULL;
+
+   return GL_TRUE;
+}
+
+void
+intelDestroyContext(__DRIcontextPrivate * driContextPriv)
+{
+   struct intel_context *intel =
+      (struct intel_context *) driContextPriv->driverPrivate;
+
+   assert(intel);               /* should never be null */
+   if (intel) {
+      GLboolean release_texture_heaps;
+
+      INTEL_FIREVERTICES(intel);
+
+      intel->vtbl.destroy(intel);
+
+      release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
+      _swsetup_DestroyContext(&intel->ctx);
+      _tnl_DestroyContext(&intel->ctx);
+      _vbo_DestroyContext(&intel->ctx);
+
+      _swrast_DestroyContext(&intel->ctx);
+      intel->Fallback = 0;      /* don't call _swrast_Flush later */
+
+      intel_batchbuffer_free(intel->batch);
+      intel->batch = NULL;
+
+      free(intel->prim.vb);
+      intel->prim.vb = NULL;
+      dri_bo_unreference(intel->prim.vb_bo);
+      intel->prim.vb_bo = NULL;
+
+      if (release_texture_heaps) {
+         /* This share group is about to go away, free our private
+          * texture object data.
+          */
+         if (INTEL_DEBUG & DEBUG_TEXTURE)
+            fprintf(stderr, "do something to free texture heaps\n");
+      }
+
+      intel_region_release(&intel->front_region);
+      intel_region_release(&intel->back_region);
+      intel_region_release(&intel->third_region);
+      intel_region_release(&intel->depth_region);
+
+      driDestroyOptionCache(&intel->optionCache);
+
+      /* free the Mesa context */
+      _mesa_free_context_data(&intel->ctx);
+   }
+}
+
+GLboolean
+intelUnbindContext(__DRIcontextPrivate * driContextPriv)
+{
+   return GL_TRUE;
+}
+
+GLboolean
+intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
+                 __DRIdrawablePrivate * driDrawPriv,
+                 __DRIdrawablePrivate * driReadPriv)
+{
+   __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv;
+
+   if (driContextPriv) {
+      struct intel_context *intel =
+         (struct intel_context *) driContextPriv->driverPrivate;
+      struct intel_framebuffer *intel_fb =
+	 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
+      GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
+ 
+      if (driContextPriv->driScreenPriv->dri2.enabled) {     
+          intel_update_renderbuffers(driContextPriv, driDrawPriv);
+          if (driDrawPriv != driReadPriv)
+              intel_update_renderbuffers(driContextPriv, driReadPriv);
+      } else {
+          /* XXX FBO temporary fix-ups! */
+          /* if the renderbuffers don't have regions, init them from the context */
+         struct intel_renderbuffer *irbDepth
+            = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
+         struct intel_renderbuffer *irbStencil
+            = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
+
+         if (intel_fb->color_rb[0]) {
+	    intel_renderbuffer_set_region(intel_fb->color_rb[0],
+					  intel->front_region);
+         }
+         if (intel_fb->color_rb[1]) {
+	    intel_renderbuffer_set_region(intel_fb->color_rb[1],
+					  intel->back_region);
+         }
+#if 0
+         if (intel_fb->color_rb[2]) {
+	    intel_renderbuffer_set_region(intel_fb->color_rb[2],
+					  intel->third_region);
+         }
+#endif
+         if (irbDepth) {
+	    intel_renderbuffer_set_region(irbDepth, intel->depth_region);
+         }
+         if (irbStencil) {
+	    intel_renderbuffer_set_region(irbStencil, intel->depth_region);
+         }
+      }
+
+      /* set GLframebuffer size to match window, if needed */
+      driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
+
+      if (driReadPriv != driDrawPriv) {
+	 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
+      }
+
+      _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
+
+      /* The drawbuffer won't always be updated by _mesa_make_current: 
+       */
+      if (intel->ctx.DrawBuffer == &intel_fb->Base) {
+
+	 if (intel->driReadDrawable != driReadPriv)
+	    intel->driReadDrawable = driReadPriv;
+
+	 if (intel->driDrawable != driDrawPriv) {
+	    if (driDrawPriv->swap_interval == (unsigned)-1) {
+	       int i;
+
+	       driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
+		  ? driGetDefaultVBlankFlags(&intel->optionCache)
+		 : VBLANK_FLAG_NO_IRQ;
+
+	       (*psp->systemTime->getUST) (&intel_fb->swap_ust);
+	       driDrawableInitVBlank(driDrawPriv);
+	       intel_fb->vbl_waited = driDrawPriv->vblSeq;
+
+	       for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {
+		  if (intel_fb->color_rb[i])
+		     intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
+	       }
+	    }
+	    intel->driDrawable = driDrawPriv;
+	    intelWindowMoved(intel);
+	 }
+
+	 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
+      }
+   }
+   else {
+      _mesa_make_current(NULL, NULL, NULL);
+   }
+
+   return GL_TRUE;
+}
+
+static void
+intelContendedLock(struct intel_context *intel, GLuint flags)
+{
+   __DRIdrawablePrivate *dPriv = intel->driDrawable;
+   __DRIscreenPrivate *sPriv = intel->driScreen;
+   volatile struct drm_i915_sarea *sarea = intel->sarea;
+   int me = intel->hHWContext;
+
+   drmGetLock(intel->driFd, intel->hHWContext, flags);
+   intel->locked = 1;
+
+   if (INTEL_DEBUG & DEBUG_LOCK)
+      _mesa_printf("%s - got contended lock\n", __progname);
+
+   /* If the window moved, may need to set a new cliprect now.
+    *
+    * NOTE: This releases and regains the hw lock, so all state
+    * checking must be done *after* this call:
+    */
+   if (dPriv)
+       DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
+
+   if (sarea && sarea->ctxOwner != me) {
+      if (INTEL_DEBUG & DEBUG_BUFMGR) {
+	 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n",
+		 sarea->ctxOwner, me);
+      }
+      sarea->ctxOwner = me;
+   }
+
+   /* If the last consumer of the texture memory wasn't us, notify the fake
+    * bufmgr and record the new owner.  We should have the memory shared
+    * between contexts of a single fake bufmgr, but this will at least make
+    * things correct for now.
+    */
+   if (!intel->ttm && sarea->texAge != intel->hHWContext) {
+      sarea->texAge = intel->hHWContext;
+      intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
+      if (INTEL_DEBUG & DEBUG_BATCH)
+	 intel_decode_context_reset();
+      if (INTEL_DEBUG & DEBUG_BUFMGR)
+	 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
+		 sarea->ctxOwner, intel->hHWContext);
+   }
+
+   /* Drawable changed?
+    */
+   if (dPriv && intel->lastStamp != dPriv->lastStamp) {
+       intelWindowMoved(intel);
+       intel->lastStamp = dPriv->lastStamp;
+   }
+}
+
+
+_glthread_DECLARE_STATIC_MUTEX(lockMutex);
+
+/* Lock the hardware and validate our state.  
+ */
+void LOCK_HARDWARE( struct intel_context *intel )
+{
+    __DRIdrawable *dPriv = intel->driDrawable;
+    __DRIscreen *sPriv = intel->driScreen;
+    char __ret = 0;
+    struct intel_framebuffer *intel_fb = NULL;
+    struct intel_renderbuffer *intel_rb = NULL;
+
+    _glthread_LOCK_MUTEX(lockMutex);
+    assert(!intel->locked);
+    intel->locked = 1;
+
+    if (intel->driDrawable) {
+       intel_fb = intel->driDrawable->driverPrivate;
+
+       if (intel_fb)
+	  intel_rb =
+	     intel_get_renderbuffer(&intel_fb->Base,
+				    intel_fb->Base._ColorDrawBufferIndexes[0]);
+    }
+
+    if (intel_rb && dPriv->vblFlags &&
+	!(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
+	(intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
+	drmVBlank vbl;
+
+	vbl.request.type = DRM_VBLANK_ABSOLUTE;
+
+	if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
+	    vbl.request.type |= DRM_VBLANK_SECONDARY;
+	}
+
+	vbl.request.sequence = intel_rb->vbl_pending;
+	drmWaitVBlank(intel->driFd, &vbl);
+	intel_fb->vbl_waited = vbl.reply.sequence;
+    }
+
+    if (!sPriv->dri2.enabled) {
+	DRM_CAS(intel->driHwLock, intel->hHWContext,
+		(DRM_LOCK_HELD|intel->hHWContext), __ret);
+
+	if (__ret)
+	    intelContendedLock( intel, 0 );
+    }
+
+
+    if (INTEL_DEBUG & DEBUG_LOCK)
+      _mesa_printf("%s - locked\n", __progname);
+}
+
+
+/* Unlock the hardware using the global current context 
+ */
+void UNLOCK_HARDWARE( struct intel_context *intel )
+{
+    __DRIscreen *sPriv = intel->driScreen;
+
+   intel->vtbl.note_unlock( intel );
+   intel->locked = 0;
+
+   if (!sPriv->dri2.enabled)
+      DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
+
+   _glthread_UNLOCK_MUTEX(lockMutex);
+
+   if (INTEL_DEBUG & DEBUG_LOCK)
+      _mesa_printf("%s - unlocked\n", __progname);
+
+   /**
+    * Nothing should be left in batch outside of LOCK/UNLOCK which references
+    * cliprects.
+    */
+   if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS)
+      intel_batchbuffer_flush(intel->batch);
+}
+
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
new file mode 100644
index 00000000000..ee43ed7e833
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -0,0 +1,515 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTELCONTEXT_INC
+#define INTELCONTEXT_INC
+
+
+
+#include "main/mtypes.h"
+#include "main/mm.h"
+#include "texmem.h"
+#include "drm.h"
+#include "intel_bufmgr.h"
+
+#include "intel_screen.h"
+#include "intel_tex_obj.h"
+#include "i915_drm.h"
+#include "tnl/t_vertex.h"
+
+#define TAG(x) intel##x
+#include "tnl_dd/t_dd_vertex.h"
+#undef TAG
+
+#define DV_PF_555  (1<<8)
+#define DV_PF_565  (2<<8)
+#define DV_PF_8888 (3<<8)
+
+struct intel_region;
+struct intel_context;
+
+typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
+                                intelVertex *, intelVertex *);
+typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
+                                 intelVertex *);
+typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
+
+#define INTEL_FALLBACK_DRAW_BUFFER	 0x1
+#define INTEL_FALLBACK_READ_BUFFER	 0x2
+#define INTEL_FALLBACK_DEPTH_BUFFER      0x4
+#define INTEL_FALLBACK_STENCIL_BUFFER    0x8
+#define INTEL_FALLBACK_USER		 0x10
+#define INTEL_FALLBACK_RENDERMODE	 0x20
+#define INTEL_FALLBACK_TEXTURE   	 0x40
+
+extern void intelFallback(struct intel_context *intel, GLuint bit,
+                          GLboolean mode);
+#define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
+
+
+#define INTEL_WRITE_PART  0x1
+#define INTEL_WRITE_FULL  0x2
+#define INTEL_READ        0x4
+
+#define INTEL_MAX_FIXUP 64
+
+struct intel_context
+{
+   GLcontext ctx;               /* the parent class */
+
+   struct
+   {
+      void (*destroy) (struct intel_context * intel);
+      void (*emit_state) (struct intel_context * intel);
+      void (*finish_batch) (struct intel_context * intel);
+      void (*new_batch) (struct intel_context * intel);
+      void (*emit_invarient_state) (struct intel_context * intel);
+      void (*note_fence) (struct intel_context *intel, GLuint fence);
+      void (*note_unlock) (struct intel_context *intel);
+      void (*update_texture_state) (struct intel_context * intel);
+
+      void (*render_start) (struct intel_context * intel);
+      void (*render_prevalidate) (struct intel_context * intel);
+      void (*set_draw_region) (struct intel_context * intel,
+                               struct intel_region * draw_regions[],
+                               struct intel_region * depth_region,
+			       GLuint num_regions);
+
+      GLuint (*flush_cmd) (void);
+      void (*emit_flush) (struct intel_context *intel, GLuint unused);
+
+      void (*reduced_primitive_state) (struct intel_context * intel,
+                                       GLenum rprim);
+
+      GLboolean (*check_vertex_size) (struct intel_context * intel,
+				      GLuint expected);
+      void (*invalidate_state) (struct intel_context *intel,
+				GLuint new_state);
+
+
+      /* Metaops: 
+       */
+      void (*install_meta_state) (struct intel_context * intel);
+      void (*leave_meta_state) (struct intel_context * intel);
+
+      void (*meta_draw_region) (struct intel_context * intel,
+                                struct intel_region * draw_region,
+                                struct intel_region * depth_region);
+
+      void (*meta_draw_quad)(struct intel_context *intel,
+			     GLfloat x0, GLfloat x1,
+			     GLfloat y0, GLfloat y1,
+			     GLfloat z,
+			     GLuint color, /* ARGB32 */
+			     GLfloat s0, GLfloat s1,
+			     GLfloat t0, GLfloat t1);
+
+      void (*meta_color_mask) (struct intel_context * intel, GLboolean);
+
+      void (*meta_stencil_replace) (struct intel_context * intel,
+                                    GLuint mask, GLuint clear);
+
+      void (*meta_depth_replace) (struct intel_context * intel);
+
+      void (*meta_texture_blend_replace) (struct intel_context * intel);
+
+      void (*meta_no_stencil_write) (struct intel_context * intel);
+      void (*meta_no_depth_write) (struct intel_context * intel);
+      void (*meta_no_texture) (struct intel_context * intel);
+
+      void (*meta_import_pixel_state) (struct intel_context * intel);
+      void (*meta_frame_buffer_texture) (struct intel_context *intel,
+					 GLint xoff, GLint yoff);
+
+      GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
+					dri_bo * buffer,
+					GLuint offset,
+					GLuint pitch,
+					GLuint height,
+					GLenum format, GLenum type);
+
+      void (*assert_not_dirty) (struct intel_context *intel);
+
+      void (*debug_batch)(struct intel_context *intel);
+   } vtbl;
+
+   GLint refcount;
+   GLuint Fallback;
+   GLuint NewGLState;
+
+   dri_bufmgr *bufmgr;
+   unsigned int maxBatchSize;
+
+   struct intel_region *front_region;
+   struct intel_region *back_region;
+   struct intel_region *third_region;
+   struct intel_region *depth_region;
+
+   /**
+    * This value indicates that the kernel memory manager is being used
+    * instead of the fake client-side memory manager.
+    */
+   GLboolean ttm;
+
+   struct intel_batchbuffer *batch;
+   GLboolean no_batch_wrap;
+   unsigned batch_id;
+
+   struct
+   {
+      GLuint id;
+      uint32_t primitive;	/**< Current hardware primitive type */
+      void (*flush) (struct intel_context *);
+      GLubyte *start_ptr; /**< for i8xx */
+      dri_bo *vb_bo;
+      uint8_t *vb;
+      unsigned int start_offset; /**< Byte offset of primitive sequence */
+      unsigned int current_offset; /**< Byte offset of next vertex */
+      unsigned int count;	/**< Number of vertices in current primitive */
+   } prim;
+
+   GLuint stats_wm;
+   GLboolean locked;
+   char *prevLockFile;
+   int prevLockLine;
+
+   GLubyte clear_chan[4];
+   GLuint ClearColor565;
+   GLuint ClearColor8888;
+
+   /* Offsets of fields within the current vertex:
+    */
+   GLuint coloroffset;
+   GLuint specoffset;
+   GLuint wpos_offset;
+   GLuint wpos_size;
+
+   struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
+   GLuint vertex_attr_count;
+
+   GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
+
+   GLboolean hw_stencil;
+   GLboolean hw_stipple;
+   GLboolean depth_buffer_is_float;
+   GLboolean no_rast;
+   GLboolean strict_conformance;
+
+   /* State for intelvb.c and inteltris.c.
+    */
+   GLuint RenderIndex;
+   GLmatrix ViewportMatrix;
+   GLenum render_primitive;
+   GLenum reduced_primitive;
+   GLuint vertex_size;
+   GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
+
+   /* Fallback rasterization functions 
+    */
+   intel_point_func draw_point;
+   intel_line_func draw_line;
+   intel_tri_func draw_tri;
+
+   /* These refer to the current drawing buffer:
+    */
+   struct gl_texture_object *frame_buffer_texobj;
+   /**
+    * Set to true if a single constant cliprect should be used in the
+    * batchbuffer.  Otherwise, cliprects must be calculated at batchbuffer
+    * flush time while the lock is held.
+    */
+   GLboolean constant_cliprect;
+   /**
+    * In !constant_cliprect mode, set to true if the front cliprects should be
+    * used instead of back.
+    */
+   GLboolean front_cliprects;
+   drm_clip_rect_t fboRect;     /**< cliprect for FBO rendering */
+
+   int perf_boxes;
+
+   GLuint do_usleeps;
+   int do_irqs;
+   GLuint irqsEmitted;
+
+   GLboolean scissor;
+   drm_clip_rect_t draw_rect;
+   drm_clip_rect_t scissor_rect;
+
+   drm_context_t hHWContext;
+   drmLock *driHwLock;
+   int driFd;
+
+   __DRIcontextPrivate *driContext;
+   __DRIdrawablePrivate *driDrawable;
+   __DRIdrawablePrivate *driReadDrawable;
+   __DRIscreenPrivate *driScreen;
+   intelScreenPrivate *intelScreen;
+   volatile struct drm_i915_sarea *sarea;
+
+   GLuint lastStamp;
+
+   GLboolean no_hw;
+
+   /**
+    * Configuration cache
+    */
+   driOptionCache optionCache;
+
+   int64_t swap_ust;
+   int64_t swap_missed_ust;
+
+   GLuint swap_count;
+   GLuint swap_missed_count;
+};
+
+/* These are functions now:
+ */
+void LOCK_HARDWARE( struct intel_context *intel );
+void UNLOCK_HARDWARE( struct intel_context *intel );
+
+extern char *__progname;
+
+
+#define SUBPIXEL_X 0.125
+#define SUBPIXEL_Y 0.125
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+#define ALIGN(value, alignment)  ((value + alignment - 1) & ~(alignment - 1))
+
+#define INTEL_FIREVERTICES(intel)		\
+do {						\
+   if ((intel)->prim.flush)			\
+      (intel)->prim.flush(intel);		\
+} while (0)
+
+/* ================================================================
+ * Color packing:
+ */
+
+#define INTEL_PACKCOLOR4444(r,g,b,a) \
+  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
+
+#define INTEL_PACKCOLOR1555(r,g,b,a) \
+  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
+    ((a) ? 0x8000 : 0))
+
+#define INTEL_PACKCOLOR565(r,g,b) \
+  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
+
+#define INTEL_PACKCOLOR8888(r,g,b,a) \
+  ((a<<24) | (r<<16) | (g<<8) | b)
+
+#define INTEL_PACKCOLOR(format, r,  g,  b, a)		\
+(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) :	\
+ (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) :	\
+  (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) :	\
+   0)))
+
+/* ================================================================
+ * From linux kernel i386 header files, copes with odd sizes better
+ * than COPY_DWORDS would:
+ * XXX Put this in src/mesa/main/imports.h ???
+ */
+#if defined(i386) || defined(__i386__)
+static INLINE void * __memcpy(void * to, const void * from, size_t n)
+{
+   int d0, d1, d2;
+   __asm__ __volatile__(
+      "rep ; movsl\n\t"
+      "testb $2,%b4\n\t"
+      "je 1f\n\t"
+      "movsw\n"
+      "1:\ttestb $1,%b4\n\t"
+      "je 2f\n\t"
+      "movsb\n"
+      "2:"
+      : "=&c" (d0), "=&D" (d1), "=&S" (d2)
+      :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
+      : "memory");
+   return (to);
+}
+#else
+#define __memcpy(a,b,c) memcpy(a,b,c)
+#endif
+
+
+/* ================================================================
+ * Debugging:
+ */
+extern int INTEL_DEBUG;
+
+#define DEBUG_TEXTURE	0x1
+#define DEBUG_STATE	0x2
+#define DEBUG_IOCTL	0x4
+#define DEBUG_BLIT	0x8
+#define DEBUG_MIPTREE   0x10
+#define DEBUG_FALLBACKS	0x20
+#define DEBUG_VERBOSE	0x40
+#define DEBUG_BATCH     0x80
+#define DEBUG_PIXEL     0x100
+#define DEBUG_BUFMGR    0x200
+#define DEBUG_REGION    0x400
+#define DEBUG_FBO       0x800
+#define DEBUG_LOCK      0x1000
+#define DEBUG_SYNC	0x2000
+#define DEBUG_PRIMS	0x4000
+#define DEBUG_VERTS	0x8000
+#define DEBUG_DRI       0x10000
+#define DEBUG_DMA       0x20000
+#define DEBUG_SANITY    0x40000
+#define DEBUG_SLEEP     0x80000
+#define DEBUG_STATS     0x100000
+#define DEBUG_TILE      0x200000
+#define DEBUG_SINGLE_THREAD   0x400000
+#define DEBUG_WM        0x800000
+#define DEBUG_URB       0x1000000
+#define DEBUG_VS        0x2000000
+
+#define DBG(...) do {						\
+	if (INTEL_DEBUG & FILE_DEBUG_FLAG)			\
+		_mesa_printf(__VA_ARGS__);			\
+} while(0)
+
+#define PCI_CHIP_845_G			0x2562
+#define PCI_CHIP_I830_M			0x3577
+#define PCI_CHIP_I855_GM		0x3582
+#define PCI_CHIP_I865_G			0x2572
+#define PCI_CHIP_I915_G			0x2582
+#define PCI_CHIP_I915_GM		0x2592
+#define PCI_CHIP_I945_G			0x2772
+#define PCI_CHIP_I945_GM		0x27A2
+#define PCI_CHIP_I945_GME		0x27AE
+#define PCI_CHIP_G33_G			0x29C2
+#define PCI_CHIP_Q35_G			0x29B2
+#define PCI_CHIP_Q33_G			0x29D2
+
+
+/* ================================================================
+ * intel_context.c:
+ */
+
+extern GLboolean intelInitContext(struct intel_context *intel,
+                                  const __GLcontextModes * mesaVis,
+                                  __DRIcontextPrivate * driContextPriv,
+                                  void *sharedContextPrivate,
+                                  struct dd_function_table *functions);
+
+extern void intelGetLock(struct intel_context *intel, GLuint flags);
+
+extern void intelFinish(GLcontext * ctx);
+extern void intelFlush(GLcontext * ctx);
+
+extern void intelInitDriverFunctions(struct dd_function_table *functions);
+extern void intelInitExtensions(GLcontext *ctx, GLboolean enable_imaging);
+
+
+/* ================================================================
+ * intel_state.c:
+ */
+extern void intelInitStateFuncs(struct dd_function_table *functions);
+
+#define COMPAREFUNC_ALWAYS		0
+#define COMPAREFUNC_NEVER		0x1
+#define COMPAREFUNC_LESS		0x2
+#define COMPAREFUNC_EQUAL		0x3
+#define COMPAREFUNC_LEQUAL		0x4
+#define COMPAREFUNC_GREATER		0x5
+#define COMPAREFUNC_NOTEQUAL		0x6
+#define COMPAREFUNC_GEQUAL		0x7
+
+#define STENCILOP_KEEP			0
+#define STENCILOP_ZERO			0x1
+#define STENCILOP_REPLACE		0x2
+#define STENCILOP_INCRSAT		0x3
+#define STENCILOP_DECRSAT		0x4
+#define STENCILOP_INCR			0x5
+#define STENCILOP_DECR			0x6
+#define STENCILOP_INVERT		0x7
+
+#define LOGICOP_CLEAR			0
+#define LOGICOP_NOR			0x1
+#define LOGICOP_AND_INV 		0x2
+#define LOGICOP_COPY_INV		0x3
+#define LOGICOP_AND_RVRSE		0x4
+#define LOGICOP_INV			0x5
+#define LOGICOP_XOR			0x6
+#define LOGICOP_NAND			0x7
+#define LOGICOP_AND			0x8
+#define LOGICOP_EQUIV			0x9
+#define LOGICOP_NOOP			0xa
+#define LOGICOP_OR_INV			0xb
+#define LOGICOP_COPY			0xc
+#define LOGICOP_OR_RVRSE		0xd
+#define LOGICOP_OR			0xe
+#define LOGICOP_SET			0xf
+
+#define BLENDFACT_ZERO			0x01
+#define BLENDFACT_ONE			0x02
+#define BLENDFACT_SRC_COLR		0x03
+#define BLENDFACT_INV_SRC_COLR 		0x04
+#define BLENDFACT_SRC_ALPHA		0x05
+#define BLENDFACT_INV_SRC_ALPHA 	0x06
+#define BLENDFACT_DST_ALPHA		0x07
+#define BLENDFACT_INV_DST_ALPHA 	0x08
+#define BLENDFACT_DST_COLR		0x09
+#define BLENDFACT_INV_DST_COLR		0x0a
+#define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
+#define BLENDFACT_CONST_COLOR		0x0c
+#define BLENDFACT_INV_CONST_COLOR	0x0d
+#define BLENDFACT_CONST_ALPHA		0x0e
+#define BLENDFACT_INV_CONST_ALPHA	0x0f
+#define BLENDFACT_MASK          	0x0f
+
+enum {
+   DRI_CONF_BO_REUSE_DISABLED,
+   DRI_CONF_BO_REUSE_ALL
+};
+
+extern int intel_translate_shadow_compare_func(GLenum func);
+extern int intel_translate_compare_func(GLenum func);
+extern int intel_translate_stencil_op(GLenum op);
+extern int intel_translate_blend_factor(GLenum factor);
+extern int intel_translate_logic_op(GLenum opcode);
+
+void intel_viewport(GLcontext * ctx, GLint x, GLint y,
+		    GLsizei width, GLsizei height);
+
+void intel_update_renderbuffers(__DRIcontext *context,
+				__DRIdrawable *drawable);
+
+/*======================================================================
+ * Inline conversion functions.  
+ * These are better-typed than the macros used previously:
+ */
+static INLINE struct intel_context *
+intel_context(GLcontext * ctx)
+{
+   return (struct intel_context *) ctx;
+}
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c
new file mode 100644
index 00000000000..0b8a287f6fe
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_decode.c
@@ -0,0 +1,1281 @@
+/* -*- c-basic-offset: 4 -*- */
+/*
+ * Copyright © 2007 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+/** @file intel_decode.c
+ * This file contains code to print out batchbuffer contents in a
+ * human-readable format.
+ *
+ * The current version only supports i915 packets, and only pretty-prints a
+ * subset of them.  The intention is for it to make just a best attempt to
+ * decode, but never crash in the process.
+ */
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <inttypes.h>
+
+#include "intel_decode.h"
+#include "intel_chipset.h"
+
+#define BUFFER_FAIL(_count, _len, _name) do {			\
+    fprintf(out, "Buffer size too small in %s (%d < %d)\n",	\
+	    (_name), (_count), (_len));				\
+    (*failures)++;						\
+    return count;						\
+} while (0)
+
+static FILE *out;
+static uint32_t saved_s2 = 0, saved_s4 = 0;
+static char saved_s2_set = 0, saved_s4_set = 0;
+
+static float
+int_as_float(uint32_t intval)
+{
+    union intfloat {
+	uint32_t i;
+	float f;
+    } uval;
+
+    uval.i = intval;
+    return uval.f;
+}
+
+static void
+instr_out(uint32_t *data, uint32_t hw_offset, unsigned int index,
+	  char *fmt, ...)
+{
+    va_list va;
+
+    fprintf(out, "0x%08x: 0x%08x:%s ", hw_offset + index * 4, data[index],
+	    index == 0 ? "" : "  ");
+    va_start(va, fmt);
+    vfprintf(out, fmt, va);
+    va_end(va);
+}
+
+
+static int
+decode_mi(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    unsigned int opcode;
+
+    struct {
+	uint32_t opcode;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_mi[] = {
+	{ 0x08, 1, 1, "MI_ARB_ON_OFF" },
+	{ 0x0a, 1, 1, "MI_BATCH_BUFFER_END" },
+	{ 0x31, 2, 2, "MI_BATCH_BUFFER_START" },
+	{ 0x14, 3, 3, "MI_DISPLAY_BUFFER_INFO" },
+	{ 0x04, 1, 1, "MI_FLUSH" },
+	{ 0x22, 3, 3, "MI_LOAD_REGISTER_IMM" },
+	{ 0x13, 2, 2, "MI_LOAD_SCAN_LINES_EXCL" },
+	{ 0x12, 2, 2, "MI_LOAD_SCAN_LINES_INCL" },
+	{ 0x00, 1, 1, "MI_NOOP" },
+	{ 0x11, 2, 2, "MI_OVERLAY_FLIP" },
+	{ 0x07, 1, 1, "MI_REPORT_HEAD" },
+	{ 0x18, 2, 2, "MI_SET_CONTEXT" },
+	{ 0x20, 3, 4, "MI_STORE_DATA_IMM" },
+	{ 0x21, 3, 4, "MI_STORE_DATA_INDEX" },
+	{ 0x24, 3, 3, "MI_STORE_REGISTER_MEM" },
+	{ 0x02, 1, 1, "MI_USER_INTERRUPT" },
+	{ 0x03, 1, 1, "MI_WAIT_FOR_EVENT" },
+    };
+
+
+    for (opcode = 0; opcode < sizeof(opcodes_mi) / sizeof(opcodes_mi[0]);
+	 opcode++) {
+	if ((data[0] & 0x1f800000) >> 23 == opcodes_mi[opcode].opcode) {
+	    unsigned int len = 1, i;
+
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_mi[opcode].name);
+	    if (opcodes_mi[opcode].max_len > 1) {
+		len = (data[0] & 0x000000ff) + 2;
+		if (len < opcodes_mi[opcode].min_len ||
+		    len > opcodes_mi[opcode].max_len)
+		{
+		    fprintf(out, "Bad length in %s\n",
+			    opcodes_mi[opcode].name);
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, opcodes_mi[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "MI UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static int
+decode_2d(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    unsigned int opcode, len;
+    char *format = NULL;
+
+    struct {
+	uint32_t opcode;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_2d[] = {
+	{ 0x40, 5, 5, "COLOR_BLT" },
+	{ 0x43, 6, 6, "SRC_COPY_BLT" },
+	{ 0x01, 8, 8, "XY_SETUP_BLT" },
+	{ 0x11, 9, 9, "XY_SETUP_MONO_PATTERN_SL_BLT" },
+	{ 0x03, 3, 3, "XY_SETUP_CLIP_BLT" },
+	{ 0x24, 2, 2, "XY_PIXEL_BLT" },
+	{ 0x25, 3, 3, "XY_SCANLINES_BLT" },
+	{ 0x26, 4, 4, "Y_TEXT_BLT" },
+	{ 0x31, 5, 134, "XY_TEXT_IMMEDIATE_BLT" },
+	{ 0x50, 6, 6, "XY_COLOR_BLT" },
+	{ 0x51, 6, 6, "XY_PAT_BLT" },
+	{ 0x76, 8, 8, "XY_PAT_CHROMA_BLT" },
+	{ 0x72, 7, 135, "XY_PAT_BLT_IMMEDIATE" },
+	{ 0x77, 9, 137, "XY_PAT_CHROMA_BLT_IMMEDIATE" },
+	{ 0x52, 9, 9, "XY_MONO_PAT_BLT" },
+	{ 0x59, 7, 7, "XY_MONO_PAT_FIXED_BLT" },
+	{ 0x53, 8, 8, "XY_SRC_COPY_BLT" },
+	{ 0x54, 8, 8, "XY_MONO_SRC_COPY_BLT" },
+	{ 0x71, 9, 137, "XY_MONO_SRC_COPY_IMMEDIATE_BLT" },
+	{ 0x55, 9, 9, "XY_FULL_BLT" },
+	{ 0x55, 9, 137, "XY_FULL_IMMEDIATE_PATTERN_BLT" },
+	{ 0x56, 9, 9, "XY_FULL_MONO_SRC_BLT" },
+	{ 0x75, 10, 138, "XY_FULL_MONO_SRC_IMMEDIATE_PATTERN_BLT" },
+	{ 0x57, 12, 12, "XY_FULL_MONO_PATTERN_BLT" },
+	{ 0x58, 12, 12, "XY_FULL_MONO_PATTERN_MONO_SRC_BLT" },
+    };
+
+    switch ((data[0] & 0x1fc00000) >> 22) {
+    case 0x50:
+	instr_out(data, hw_offset, 0,
+		  "XY_COLOR_BLT (rgb %sabled, alpha %sabled, dst tile %d)\n",
+		  (data[0] & (1 << 20)) ? "en" : "dis",
+		  (data[0] & (1 << 21)) ? "en" : "dis",
+		  (data[0] >> 11) & 1);
+
+	len = (data[0] & 0x000000ff) + 2;
+	if (len != 6)
+	    fprintf(out, "Bad count in XY_COLOR_BLT\n");
+	if (count < 6)
+	    BUFFER_FAIL(count, len, "XY_COLOR_BLT");
+
+	switch ((data[1] >> 24) & 0x3) {
+	case 0:
+	    format="8";
+	    break;
+	case 1:
+	    format="565";
+	    break;
+	case 2:
+	    format="1555";
+	    break;
+	case 3:
+	    format="8888";
+	    break;
+	}
+
+	instr_out(data, hw_offset, 1, "format %s, pitch %d, "
+		  "clipping %sabled\n", format,
+		  (short)(data[1] & 0xffff),
+		  data[1] & (1 << 30) ? "en" : "dis");
+	instr_out(data, hw_offset, 2, "(%d,%d)\n",
+		  data[2] & 0xffff, data[2] >> 16);
+	instr_out(data, hw_offset, 3, "(%d,%d)\n",
+		  data[3] & 0xffff, data[3] >> 16);
+	instr_out(data, hw_offset, 4, "offset 0x%08x\n", data[4]);
+	instr_out(data, hw_offset, 5, "color\n");
+	return len;
+    case 0x53:
+	instr_out(data, hw_offset, 0,
+		  "XY_SRC_COPY_BLT (rgb %sabled, alpha %sabled, "
+		  "src tile %d, dst tile %d)\n",
+		  (data[0] & (1 << 20)) ? "en" : "dis",
+		  (data[0] & (1 << 21)) ? "en" : "dis",
+		  (data[0] >> 15) & 1,
+		  (data[0] >> 11) & 1);
+
+	len = (data[0] & 0x000000ff) + 2;
+	if (len != 8)
+	    fprintf(out, "Bad count in XY_SRC_COPY_BLT\n");
+	if (count < 8)
+	    BUFFER_FAIL(count, len, "XY_SRC_COPY_BLT");
+
+	switch ((data[1] >> 24) & 0x3) {
+	case 0:
+	    format="8";
+	    break;
+	case 1:
+	    format="565";
+	    break;
+	case 2:
+	    format="1555";
+	    break;
+	case 3:
+	    format="8888";
+	    break;
+	}
+
+	instr_out(data, hw_offset, 1, "format %s, dst pitch %d, "
+		  "clipping %sabled\n", format,
+		  (short)(data[1] & 0xffff),
+		  data[1] & (1 << 30) ? "en" : "dis");
+	instr_out(data, hw_offset, 2, "dst (%d,%d)\n",
+		  data[2] & 0xffff, data[2] >> 16);
+	instr_out(data, hw_offset, 3, "dst (%d,%d)\n",
+		  data[3] & 0xffff, data[3] >> 16);
+	instr_out(data, hw_offset, 4, "dst offset 0x%08x\n", data[4]);
+	instr_out(data, hw_offset, 5, "src (%d,%d)\n",
+		  data[5] & 0xffff, data[5] >> 16);
+	instr_out(data, hw_offset, 6, "src pitch %d\n",
+		  (short)(data[6] & 0xffff));
+	instr_out(data, hw_offset, 7, "src offset 0x%08x\n", data[7]);
+	return len;
+    }
+
+    for (opcode = 0; opcode < sizeof(opcodes_2d) / sizeof(opcodes_2d[0]);
+	 opcode++) {
+	if ((data[0] & 0x1fc00000) >> 22 == opcodes_2d[opcode].opcode) {
+	    unsigned int i;
+
+	    len = 1;
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_2d[opcode].name);
+	    if (opcodes_2d[opcode].max_len > 1) {
+		len = (data[0] & 0x000000ff) + 2;
+		if (len < opcodes_2d[opcode].min_len ||
+		    len > opcodes_2d[opcode].max_len)
+		{
+		    fprintf(out, "Bad count in %s\n", opcodes_2d[opcode].name);
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, opcodes_2d[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "2D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static int
+decode_3d_1c(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    switch ((data[0] & 0x00f80000) >> 19) {
+    case 0x11:
+	instr_out(data, hw_offset, 0, "3DSTATE_DEPTH_SUBRECTANGLE_DISALBE\n");
+	return 1;
+    case 0x10:
+	instr_out(data, hw_offset, 0, "3DSTATE_SCISSOR_ENABLE\n");
+	return 1;
+    case 0x01:
+	instr_out(data, hw_offset, 0, "3DSTATE_MAP_COORD_SET_I830\n");
+	return 1;
+    case 0x0a:
+	instr_out(data, hw_offset, 0, "3DSTATE_MAP_CUBE_I830\n");
+	return 1;
+    case 0x05:
+	instr_out(data, hw_offset, 0, "3DSTATE_MAP_TEX_STREAM_I830\n");
+	return 1;
+    }
+
+    instr_out(data, hw_offset, 0, "3D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static int
+decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i830)
+{
+    unsigned int len, i, c, opcode, word, map, sampler, instr;
+
+    struct {
+	uint32_t opcode;
+	int i830_only;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_3d_1d[] = {
+	{ 0x8e, 0, 3, 3, "3DSTATE_BUFFER_INFO" },
+	{ 0x86, 0, 4, 4, "3DSTATE_CHROMA_KEY" },
+	{ 0x9c, 0, 1, 1, "3DSTATE_CLEAR_PARAMETERS" },
+	{ 0x88, 0, 2, 2, "3DSTATE_CONSTANT_BLEND_COLOR" },
+	{ 0x99, 0, 2, 2, "3DSTATE_DEFAULT_DIFFUSE" },
+	{ 0x9a, 0, 2, 2, "3DSTATE_DEFAULT_SPECULAR" },
+	{ 0x98, 0, 2, 2, "3DSTATE_DEFAULT_Z" },
+	{ 0x97, 0, 2, 2, "3DSTATE_DEPTH_OFFSET_SCALE" },
+	{ 0x85, 0, 2, 2, "3DSTATE_DEST_BUFFER_VARIABLES" },
+	{ 0x80, 0, 5, 5, "3DSTATE_DRAWING_RECTANGLE" },
+	{ 0x8e, 0, 3, 3, "3DSTATE_BUFFER_INFO" },
+	{ 0x9d, 0, 65, 65, "3DSTATE_FILTER_COEFFICIENTS_4X4" },
+	{ 0x9e, 0, 4, 4, "3DSTATE_MONO_FILTER" },
+	{ 0x89, 0, 4, 4, "3DSTATE_FOG_MODE" },
+	{ 0x8f, 0, 2, 16, "3DSTATE_MAP_PALLETE_LOAD_32" },
+	{ 0x81, 0, 3, 3, "3DSTATE_SCISSOR_RECTANGLE" },
+	{ 0x83, 0, 2, 2, "3DSTATE_SPAN_STIPPLE" },
+	{ 0x8c, 1, 2, 2, "3DSTATE_MAP_COORD_TRANSFORM_I830" },
+	{ 0x8b, 1, 2, 2, "3DSTATE_MAP_VERTEX_TRANSFORM_I830" },
+	{ 0x8d, 1, 3, 3, "3DSTATE_W_STATE_I830" },
+	{ 0x01, 1, 2, 2, "3DSTATE_COLOR_FACTOR_I830" },
+	{ 0x02, 1, 2, 2, "3DSTATE_MAP_COORD_SETBIND_I830" },
+    };
+
+    switch ((data[0] & 0x00ff0000) >> 16) {
+    case 0x07:
+	/* This instruction is unusual.  A 0 length means just 1 DWORD instead of
+	 * 2.  The 0 length is specified in one place to be unsupported, but
+	 * stated to be required in another, and 0 length LOAD_INDIRECTs appear
+	 * to cause no harm at least.
+	 */
+	instr_out(data, hw_offset, 0, "3DSTATE_LOAD_INDIRECT\n");
+	len = (data[0] & 0x000000ff) + 1;
+	i = 1;
+	if (data[0] & (0x01 << 8)) {
+	    if (i + 2 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "SIS.0\n");
+	    instr_out(data, hw_offset, i++, "SIS.1\n");
+	}
+	if (data[0] & (0x02 << 8)) {
+	    if (i + 1 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "DIS.0\n");
+	}
+	if (data[0] & (0x04 << 8)) {
+	    if (i + 2 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "SSB.0\n");
+	    instr_out(data, hw_offset, i++, "SSB.1\n");
+	}
+	if (data[0] & (0x08 << 8)) {
+	    if (i + 2 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "MSB.0\n");
+	    instr_out(data, hw_offset, i++, "MSB.1\n");
+	}
+	if (data[0] & (0x10 << 8)) {
+	    if (i + 2 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "PSP.0\n");
+	    instr_out(data, hw_offset, i++, "PSP.1\n");
+	}
+	if (data[0] & (0x20 << 8)) {
+	    if (i + 2 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_LOAD_INDIRECT");
+	    instr_out(data, hw_offset, i++, "PSC.0\n");
+	    instr_out(data, hw_offset, i++, "PSC.1\n");
+	}
+	if (len != i) {
+	    fprintf(out, "Bad count in 3DSTATE_LOAD_INDIRECT\n");
+	    (*failures)++;
+	    return len;
+	}
+	return len;
+    case 0x04:
+	instr_out(data, hw_offset, 0, "3DSTATE_LOAD_STATE_IMMEDIATE_1\n");
+	len = (data[0] & 0x0000000f) + 2;
+	i = 1;
+	for (word = 0; word <= 7; word++) {
+	    if (data[0] & (1 << (4 + word))) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, "3DSTATE_LOAD_STATE_IMMEDIATE_1");
+
+		/* save vertex state for decode */
+		if (word == 2) {
+		    saved_s2_set = 1;
+		    saved_s2 = data[i];
+		}
+		if (word == 4) {
+		    saved_s4_set = 1;
+		    saved_s4 = data[i];
+		}
+
+		instr_out(data, hw_offset, i++, "S%d\n", word);
+	    }
+	}
+	if (len != i) {
+	    fprintf(out, "Bad count in 3DSTATE_LOAD_INDIRECT\n");
+	    (*failures)++;
+	}
+	return len;
+    case 0x00:
+	instr_out(data, hw_offset, 0, "3DSTATE_MAP_STATE\n");
+	len = (data[0] & 0x0000003f) + 2;
+
+	i = 1;
+	for (map = 0; map <= 15; map++) {
+	    if (data[1] & (1 << map)) {
+		if (i + 3 >= count)
+		    BUFFER_FAIL(count, len, "3DSTATE_MAP_STATE");
+		instr_out(data, hw_offset, i++, "map %d MS2\n", map);
+		instr_out(data, hw_offset, i++, "map %d MS3\n", map);
+		instr_out(data, hw_offset, i++, "map %d MS4\n", map);
+	    }
+	}
+	if (len != i) {
+	    fprintf(out, "Bad count in 3DSTATE_MAP_STATE\n");
+	    (*failures)++;
+	    return len;
+	}
+	return len;
+    case 0x06:
+	instr_out(data, hw_offset, 0, "3DSTATE_PIXEL_SHADER_CONSTANTS\n");
+	len = (data[0] & 0x000000ff) + 2;
+
+	i = 1;
+	for (c = 0; c <= 31; c++) {
+	    if (data[1] & (1 << c)) {
+		if (i + 4 >= count)
+		    BUFFER_FAIL(count, len, "3DSTATE_PIXEL_SHADER_CONSTANTS");
+		instr_out(data, hw_offset, i, "C%d.X = %f\n",
+			  c, int_as_float(data[i]));
+		i++;
+		instr_out(data, hw_offset, i, "C%d.Y = %f\n",
+			  c, int_as_float(data[i]));
+		i++;
+		instr_out(data, hw_offset, i, "C%d.Z = %f\n",
+			  c, int_as_float(data[i]));
+		i++;
+		instr_out(data, hw_offset, i, "C%d.W = %f\n",
+			  c, int_as_float(data[i]));
+		i++;
+	    }
+	}
+	if (len != i) {
+	    fprintf(out, "Bad count in 3DSTATE_MAP_STATE\n");
+	    (*failures)++;
+	}
+	return len;
+    case 0x05:
+	instr_out(data, hw_offset, 0, "3DSTATE_PIXEL_SHADER_PROGRAM\n");
+	len = (data[0] & 0x000000ff) + 2;
+	if ((len - 1) % 3 != 0 || len > 370) {
+	    fprintf(out, "Bad count in 3DSTATE_PIXEL_SHADER_PROGRAM\n");
+	    (*failures)++;
+	}
+	i = 1;
+	for (instr = 0; instr < (len - 1) / 3; instr++) {
+	    if (i + 3 >= count)
+		BUFFER_FAIL(count, len, "3DSTATE_MAP_STATE");
+	    instr_out(data, hw_offset, i++, "PS%03x\n", instr);
+	    instr_out(data, hw_offset, i++, "PS%03x\n", instr);
+	    instr_out(data, hw_offset, i++, "PS%03x\n", instr);
+	}
+	return len;
+    case 0x01:
+	if (i830)
+	    break;
+	instr_out(data, hw_offset, 0, "3DSTATE_SAMPLER_STATE\n");
+	len = (data[0] & 0x0000003f) + 2;
+	i = 1;
+	for (sampler = 0; sampler <= 15; sampler++) {
+	    if (data[1] & (1 << sampler)) {
+		if (i + 3 >= count)
+		    BUFFER_FAIL(count, len, "3DSTATE_SAMPLER_STATE");
+		instr_out(data, hw_offset, i++, "sampler %d SS2\n",
+			  sampler);
+		instr_out(data, hw_offset, i++, "sampler %d SS3\n",
+			  sampler);
+		instr_out(data, hw_offset, i++, "sampler %d SS4\n",
+			  sampler);
+	    }
+	}
+	if (len != i) {
+	    fprintf(out, "Bad count in 3DSTATE_SAMPLER_STATE\n");
+	    (*failures)++;
+	}
+	return len;
+    }
+
+    for (opcode = 0; opcode < sizeof(opcodes_3d_1d) / sizeof(opcodes_3d_1d[0]);
+	 opcode++)
+    {
+	if (opcodes_3d_1d[opcode].i830_only && !i830)
+	    continue;
+
+	if (((data[0] & 0x00ff0000) >> 16) == opcodes_3d_1d[opcode].opcode) {
+	    len = 1;
+
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_3d_1d[opcode].name);
+	    if (opcodes_3d_1d[opcode].max_len > 1) {
+		len = (data[0] & 0x0000ffff) + 2;
+		if (len < opcodes_3d_1d[opcode].min_len ||
+		    len > opcodes_3d_1d[opcode].max_len)
+		{
+		    fprintf(out, "Bad count in %s\n",
+			    opcodes_3d_1d[opcode].name);
+		    (*failures)++;
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len,  opcodes_3d_1d[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "3D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static int
+decode_3d_primitive(uint32_t *data, int count, uint32_t hw_offset,
+		    int *failures)
+{
+    char immediate = (data[0] & (1 << 23)) == 0;
+    unsigned int len, i;
+    char *primtype;
+
+    switch ((data[0] >> 18) & 0xf) {
+    case 0x0: primtype = "TRILIST"; break;
+    case 0x1: primtype = "TRISTRIP"; break;
+    case 0x2: primtype = "TRISTRIP_REVERSE"; break;
+    case 0x3: primtype = "TRIFAN"; break;
+    case 0x4: primtype = "POLYGON"; break;
+    case 0x5: primtype = "LINELIST"; break;
+    case 0x6: primtype = "LINESTRIP"; break;
+    case 0x7: primtype = "RECTLIST"; break;
+    case 0x8: primtype = "POINTLIST"; break;
+    case 0x9: primtype = "DIB"; break;
+    case 0xa: primtype = "CLEAR_RECT"; break;
+    default: primtype = "unknown"; break;
+    }
+
+    /* XXX: 3DPRIM_DIB not supported */
+    if (immediate) {
+	len = (data[0] & 0x0003ffff) + 2;
+	instr_out(data, hw_offset, 0, "3DPRIMITIVE inline %s\n", primtype);
+	if (count < len)
+	    BUFFER_FAIL(count, len,  "3DPRIMITIVE inline");
+	if (!saved_s2_set || !saved_s4_set) {
+	    fprintf(out, "unknown vertex format\n");
+	    for (i = 1; i < len; i++) {
+		instr_out(data, hw_offset, i,
+			  "           vertex data (%f float)\n",
+			  int_as_float(data[i]));
+	    }
+	} else {
+	    unsigned int vertex = 0;
+	    for (i = 1; i < len;) {
+		unsigned int tc;
+
+#define VERTEX_OUT(fmt, ...) do {					\
+    if (i < len)							\
+	instr_out(data, hw_offset, i, " V%d."fmt"\n", vertex, __VA_ARGS__); \
+    else								\
+	fprintf(out, " missing data in V%d\n", vertex);			\
+    i++;								\
+} while (0)
+
+		VERTEX_OUT("X = %f", int_as_float(data[i]));
+		VERTEX_OUT("Y = %f", int_as_float(data[i]));
+	        switch (saved_s4 >> 6 & 0x7) {
+		case 0x1:
+		    VERTEX_OUT("Z = %f", int_as_float(data[i]));
+		    break;
+		case 0x2:
+		    VERTEX_OUT("Z = %f", int_as_float(data[i]));
+		    VERTEX_OUT("W = %f", int_as_float(data[i]));
+		    break;
+		case 0x3:
+		    break;
+		case 0x4:
+		    VERTEX_OUT("W = %f", int_as_float(data[i]));
+		    break;
+		default:
+		    fprintf(out, "bad S4 position mask\n");
+		}
+
+		if (saved_s4 & (1 << 10)) {
+		    VERTEX_OUT("color = (A=0x%02x, R=0x%02x, G=0x%02x, "
+			       "B=0x%02x)",
+			       data[i] >> 24,
+			       (data[i] >> 16) & 0xff,
+			       (data[i] >> 8) & 0xff,
+			       data[i] & 0xff);
+		}
+		if (saved_s4 & (1 << 11)) {
+		    VERTEX_OUT("spec = (A=0x%02x, R=0x%02x, G=0x%02x, "
+			       "B=0x%02x)",
+			       data[i] >> 24,
+			       (data[i] >> 16) & 0xff,
+			       (data[i] >> 8) & 0xff,
+			       data[i] & 0xff);
+		}
+		if (saved_s4 & (1 << 12))
+		    VERTEX_OUT("width = 0x%08x)", data[i]);
+
+		for (tc = 0; tc <= 7; tc++) {
+		    switch ((saved_s2 >> (tc * 4)) & 0xf) {
+		    case 0x0:
+			VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i]));
+			break;
+		    case 0x1:
+			VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.Z = %f", tc, int_as_float(data[i]));
+			break;
+		    case 0x2:
+			VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.Z = %f", tc, int_as_float(data[i]));
+			VERTEX_OUT("T%d.W = %f", tc, int_as_float(data[i]));
+			break;
+		    case 0x3:
+			VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i]));
+			break;
+		    case 0x4:
+			VERTEX_OUT("T%d.XY = 0x%08x half-float", tc, data[i]);
+			break;
+		    case 0x5:
+			VERTEX_OUT("T%d.XY = 0x%08x half-float", tc, data[i]);
+			VERTEX_OUT("T%d.ZW = 0x%08x half-float", tc, data[i]);
+			break;
+		    case 0xf:
+			break;
+		    default:
+			fprintf(out, "bad S2.T%d format\n", tc);
+		    }
+		}
+		vertex++;
+	    }
+	}
+    } else {
+	/* indirect vertices */
+	len = data[0] & 0x0000ffff; /* index count */
+	if (data[0] & (1 << 17)) {
+	    /* random vertex access */
+	    if (count < (len + 1) / 2 + 1) {
+		BUFFER_FAIL(count, (len + 1) / 2 + 1,
+			    "3DPRIMITIVE random indirect");
+	    }
+	    instr_out(data, hw_offset, 0,
+		      "3DPRIMITIVE random indirect %s (%d)\n", primtype, len);
+	    if (len == 0) {
+		/* vertex indices continue until 0xffff is found */
+		for (i = 1; i < count; i++) {
+		    if ((data[i] & 0xffff) == 0xffff) {
+			instr_out(data, hw_offset, i,
+				  "            indices: (terminator)\n");
+			return i;
+		    } else if ((data[i] >> 16) == 0xffff) {
+			instr_out(data, hw_offset, i,
+				  "            indices: 0x%04x, "
+				  "(terminator)\n",
+				  data[i] & 0xffff);
+			return i;
+		    } else {
+			instr_out(data, hw_offset, i,
+				  "            indices: 0x%04x, 0x%04x\n",
+				  data[i] & 0xffff, data[i] >> 16);
+		    }
+		}
+		fprintf(out,
+			"3DPRIMITIVE: no terminator found in index buffer\n");
+		(*failures)++;
+		return count;
+	    } else {
+		/* fixed size vertex index buffer */
+		for (i = 0; i < len; i += 2) {
+		    if (i * 2 == len - 1) {
+			instr_out(data, hw_offset, i,
+				  "            indices: 0x%04x\n",
+				  data[i] & 0xffff);
+		    } else {
+			instr_out(data, hw_offset, i,
+				  "            indices: 0x%04x, 0x%04x\n",
+				  data[i] & 0xffff, data[i] >> 16);
+		    }
+		}
+	    }
+	    return (len + 1) / 2 + 1;
+	} else {
+	    /* sequential vertex access */
+	    if (count < 2)
+		BUFFER_FAIL(count, 2, "3DPRIMITIVE seq indirect");
+	    instr_out(data, hw_offset, 0,
+		      "3DPRIMITIVE sequential indirect %s, %d starting from "
+		      "%d\n", primtype, len, data[1] & 0xffff);
+	    instr_out(data, hw_offset, 1, "           start\n");
+	    return 2;
+	}
+    }
+
+    return len;
+}
+
+static int
+decode_3d(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    unsigned int opcode;
+
+    struct {
+	uint32_t opcode;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_3d[] = {
+	{ 0x06, 1, 1, "3DSTATE_ANTI_ALIASING" },
+	{ 0x08, 1, 1, "3DSTATE_BACKFACE_STENCIL_OPS" },
+	{ 0x09, 1, 1, "3DSTATE_BACKFACE_STENCIL_MASKS" },
+	{ 0x16, 1, 1, "3DSTATE_COORD_SET_BINDINGS" },
+	{ 0x15, 1, 1, "3DSTATE_FOG_COLOR" },
+	{ 0x0b, 1, 1, "3DSTATE_INDEPENDENT_ALPHA_BLEND" },
+	{ 0x0d, 1, 1, "3DSTATE_MODES_4" },
+	{ 0x0c, 1, 1, "3DSTATE_MODES_5" },
+	{ 0x07, 1, 1, "3DSTATE_RASTERIZATION_RULES" },
+    };
+
+    switch ((data[0] & 0x1f000000) >> 24) {
+    case 0x1f:
+	return decode_3d_primitive(data, count, hw_offset, failures);
+    case 0x1d:
+	return decode_3d_1d(data, count, hw_offset, failures, 0);
+    case 0x1c:
+	return decode_3d_1c(data, count, hw_offset, failures);
+    }
+
+    for (opcode = 0; opcode < sizeof(opcodes_3d) / sizeof(opcodes_3d[0]);
+	 opcode++) {
+	if ((data[0] & 0x1f000000) >> 24 == opcodes_3d[opcode].opcode) {
+	    unsigned int len = 1, i;
+
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_3d[opcode].name);
+	    if (opcodes_3d[opcode].max_len > 1) {
+		len = (data[0] & 0xff) + 2;
+		if (len < opcodes_3d[opcode].min_len ||
+		    len > opcodes_3d[opcode].max_len)
+		{
+		    fprintf(out, "Bad count in %s\n", opcodes_3d[opcode].name);
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, opcodes_3d[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "3D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static const char *
+get_965_surfacetype(unsigned int surfacetype)
+{
+    switch (surfacetype) {
+    case 0: return "1D";
+    case 1: return "2D";
+    case 2: return "3D";
+    case 3: return "CUBE";
+    case 4: return "BUFFER";
+    case 7: return "NULL";
+    default: return "unknown";
+    }
+}
+
+static const char *
+get_965_depthformat(unsigned int depthformat)
+{
+    switch (depthformat) {
+    case 0: return "s8_z24float";
+    case 1: return "z32float";
+    case 2: return "z24s8";
+    case 5: return "z16";
+    default: return "unknown";
+    }
+}
+
+static const char *
+get_965_element_component(uint32_t data, int component)
+{
+    uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7;
+
+    switch (component_control) {
+    case 0:
+	return "nostore";
+    case 1:
+	switch (component) {
+	case 0: return "X";
+	case 1: return "Y";
+	case 2: return "Z";
+	case 3: return "W";
+	default: return "fail";
+	}
+    case 2:
+	return "0.0";
+    case 3:
+	return "1.0";
+    case 4:
+	return "0x1";
+    case 5:
+	return "VID";
+    default:
+	return "fail";
+    }
+}
+
+static const char *
+get_965_prim_type(uint32_t data)
+{
+    uint32_t primtype = (data >> 10) & 0x1f;
+
+    switch (primtype) {
+    case 0x01: return "point list";
+    case 0x02: return "line list";
+    case 0x03: return "line strip";
+    case 0x04: return "tri list";
+    case 0x05: return "tri strip";
+    case 0x06: return "tri fan";
+    case 0x07: return "quad list";
+    case 0x08: return "quad strip";
+    case 0x09: return "line list adj";
+    case 0x0a: return "line strip adj";
+    case 0x0b: return "tri list adj";
+    case 0x0c: return "tri strip adj";
+    case 0x0d: return "tri strip reverse";
+    case 0x0e: return "polygon";
+    case 0x0f: return "rect list";
+    case 0x10: return "line loop";
+    case 0x11: return "point list bf";
+    case 0x12: return "line strip cont";
+    case 0x13: return "line strip bf";
+    case 0x14: return "line strip cont bf";
+    case 0x15: return "tri fan no stipple";
+    default: return "fail";
+    }
+}
+
+static int
+decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    unsigned int opcode, len;
+    int i;
+
+    struct {
+	uint32_t opcode;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_3d[] = {
+	{ 0x6000, 3, 3, "URB_FENCE" },
+	{ 0x6001, 2, 2, "CS_URB_STATE" },
+	{ 0x6002, 2, 2, "CONSTANT_BUFFER" },
+	{ 0x6101, 6, 6, "STATE_BASE_ADDRESS" },
+	{ 0x6102, 2, 2 , "STATE_SIP" },
+	{ 0x6104, 1, 1, "3DSTATE_PIPELINE_SELECT" },
+	{ 0x680b, 1, 1, "3DSTATE_VF_STATISTICS" },
+	{ 0x6904, 1, 1, "3DSTATE_PIPELINE_SELECT" },
+	{ 0x7800, 7, 7, "3DSTATE_PIPELINED_POINTERS" },
+	{ 0x7801, 6, 6, "3DSTATE_BINDING_TABLE_POINTERS" },
+	{ 0x780b, 1, 1, "3DSTATE_VF_STATISTICS" },
+	{ 0x7808, 5, 257, "3DSTATE_VERTEX_BUFFERS" },
+	{ 0x7809, 3, 256, "3DSTATE_VERTEX_ELEMENTS" },
+	{ 0x780a, 3, 3, "3DSTATE_INDEX_BUFFER" },
+	{ 0x7900, 4, 4, "3DSTATE_DRAWING_RECTANGLE" },
+	{ 0x7901, 5, 5, "3DSTATE_CONSTANT_COLOR" },
+	{ 0x7905, 5, 7, "3DSTATE_DEPTH_BUFFER" },
+	{ 0x7906, 2, 2, "3DSTATE_POLY_STIPPLE_OFFSET" },
+	{ 0x7907, 33, 33, "3DSTATE_POLY_STIPPLE_PATTERN" },
+	{ 0x7908, 3, 3, "3DSTATE_LINE_STIPPLE" },
+	{ 0x7909, 2, 2, "3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP" },
+	{ 0x790a, 3, 3, "3DSTATE_AA_LINE_PARAMETERS" },
+	{ 0x7b00, 6, 6, "3DPRIMITIVE" },
+    };
+
+    len = (data[0] & 0x0000ffff) + 2;
+
+    switch ((data[0] & 0xffff0000) >> 16) {
+    case 0x6101:
+	if (len != 6)
+	    fprintf(out, "Bad count in STATE_BASE_ADDRESS\n");
+	if (count < 6)
+	    BUFFER_FAIL(count, len, "STATE_BASE_ADDRESS");
+
+	instr_out(data, hw_offset, 0,
+		  "STATE_BASE_ADDRESS\n");
+
+	if (data[1] & 1) {
+	    instr_out(data, hw_offset, 1, "General state at 0x%08x\n",
+		      data[1] & ~1);
+	} else
+	    instr_out(data, hw_offset, 1, "General state not updated\n");
+
+	if (data[2] & 1) {
+	    instr_out(data, hw_offset, 2, "Surface state at 0x%08x\n",
+		      data[2] & ~1);
+	} else
+	    instr_out(data, hw_offset, 2, "Surface state not updated\n");
+
+	if (data[3] & 1) {
+	    instr_out(data, hw_offset, 3, "Indirect state at 0x%08x\n",
+		      data[3] & ~1);
+	} else
+	    instr_out(data, hw_offset, 3, "Indirect state not updated\n");
+
+	if (data[4] & 1) {
+	    instr_out(data, hw_offset, 4, "General state upper bound 0x%08x\n",
+		      data[4] & ~1);
+	} else
+	    instr_out(data, hw_offset, 4, "General state not updated\n");
+
+	if (data[5] & 1) {
+	    instr_out(data, hw_offset, 5, "Indirect state upper bound 0x%08x\n",
+		      data[5] & ~1);
+	} else
+	    instr_out(data, hw_offset, 5, "Indirect state not updated\n");
+
+	return len;
+    case 0x7800:
+	if (len != 7)
+	    fprintf(out, "Bad count in 3DSTATE_PIPELINED_POINTERS\n");
+	if (count < 7)
+	    BUFFER_FAIL(count, len, "3DSTATE_PIPELINED_POINTERS");
+
+	instr_out(data, hw_offset, 0,
+		  "3DSTATE_PIPELINED_POINTERS\n");
+	instr_out(data, hw_offset, 1, "VS state\n");
+	instr_out(data, hw_offset, 2, "GS state\n");
+	instr_out(data, hw_offset, 3, "Clip state\n");
+	instr_out(data, hw_offset, 4, "SF state\n");
+	instr_out(data, hw_offset, 5, "WM state\n");
+	instr_out(data, hw_offset, 6, "CC state\n");
+	return len;
+    case 0x7801:
+	if (len != 6)
+	    fprintf(out, "Bad count in 3DSTATE_BINDING_TABLE_POINTERS\n");
+	if (count < 6)
+	    BUFFER_FAIL(count, len, "3DSTATE_BINDING_TABLE_POINTERS");
+
+	instr_out(data, hw_offset, 0,
+		  "3DSTATE_BINDING_TABLE_POINTERS\n");
+	instr_out(data, hw_offset, 1, "VS binding table\n");
+	instr_out(data, hw_offset, 2, "GS binding table\n");
+	instr_out(data, hw_offset, 3, "Clip binding table\n");
+	instr_out(data, hw_offset, 4, "SF binding table\n");
+	instr_out(data, hw_offset, 5, "WM binding table\n");
+
+	return len;
+
+    case 0x7808:
+	len = (data[0] & 0xff) + 2;
+	if ((len - 1) % 4 != 0)
+	    fprintf(out, "Bad count in 3DSTATE_VERTEX_BUFFERS\n");
+	if (count < len)
+	    BUFFER_FAIL(count, len, "3DSTATE_VERTEX_BUFFERS");
+	instr_out(data, hw_offset, 0, "3DSTATE_VERTEX_BUFFERS\n");
+
+	for (i = 1; i < len;) {
+	    instr_out(data, hw_offset, i, "buffer %d: %s, pitch %db\n",
+		      data[i] >> 27,
+		      data[i] & (1 << 26) ? "random" : "sequential",
+		      data[i] & 0x07ff);
+	    i++;
+	    instr_out(data, hw_offset, i++, "buffer address\n");
+	    instr_out(data, hw_offset, i++, "max index\n");
+	    instr_out(data, hw_offset, i++, "mbz\n");
+	}
+	return len;
+
+    case 0x7809:
+	len = (data[0] & 0xff) + 2;
+	if ((len + 1) % 2 != 0)
+	    fprintf(out, "Bad count in 3DSTATE_VERTEX_ELEMENTS\n");
+	if (count < len)
+	    BUFFER_FAIL(count, len, "3DSTATE_VERTEX_ELEMENTS");
+	instr_out(data, hw_offset, 0, "3DSTATE_VERTEX_ELEMENTS\n");
+
+	for (i = 1; i < len;) {
+	    instr_out(data, hw_offset, i, "buffer %d: %svalid, type 0x%04x, "
+		      "src offset 0x%04xd bytes\n",
+		      data[i] >> 27,
+		      data[i] & (1 << 26) ? "" : "in",
+		      (data[i] >> 16) & 0x1ff,
+		      data[i] & 0x07ff);
+	    i++;
+	    instr_out(data, hw_offset, i, "(%s, %s, %s, %s), "
+		      "dst offset 0x%02x bytes\n",
+		      get_965_element_component(data[i], 0),
+		      get_965_element_component(data[i], 1),
+		      get_965_element_component(data[i], 2),
+		      get_965_element_component(data[i], 3),
+		      (data[i] & 0xff) * 4);
+	    i++;
+	}
+	return len;
+
+    case 0x780a:
+	len = (data[0] & 0xff) + 2;
+	if (len != 3)
+	    fprintf(out, "Bad count in 3DSTATE_INDEX_BUFFER\n");
+	if (count < len)
+	    BUFFER_FAIL(count, len, "3DSTATE_INDEX_BUFFER");
+	instr_out(data, hw_offset, 0, "3DSTATE_INDEX_BUFFER\n");
+	instr_out(data, hw_offset, 1, "beginning buffer address\n");
+	instr_out(data, hw_offset, 2, "ending buffer address\n");
+	return len;
+
+    case 0x7900:
+	if (len != 4)
+	    fprintf(out, "Bad count in 3DSTATE_DRAWING_RECTANGLE\n");
+	if (count < 4)
+	    BUFFER_FAIL(count, len, "3DSTATE_DRAWING_RECTANGLE");
+
+	instr_out(data, hw_offset, 0,
+		  "3DSTATE_DRAWING_RECTANGLE\n");
+	instr_out(data, hw_offset, 1, "top left: %d,%d\n",
+		  data[1] & 0xffff,
+		  (data[1] >> 16) & 0xffff);
+	instr_out(data, hw_offset, 2, "bottom right: %d,%d\n",
+		  data[2] & 0xffff,
+		  (data[2] >> 16) & 0xffff);
+	instr_out(data, hw_offset, 3, "origin: %d,%d\n",
+		  (int)data[3] & 0xffff,
+		  ((int)data[3] >> 16) & 0xffff);
+
+	return len;
+
+    case 0x7905:
+	if (len != 5 && len != 6)
+	    fprintf(out, "Bad count in 3DSTATE_DEPTH_BUFFER\n");
+	if (count < len)
+	    BUFFER_FAIL(count, len, "3DSTATE_DEPTH_BUFFER");
+
+	instr_out(data, hw_offset, 0,
+		  "3DSTATE_DEPTH_BUFFER\n");
+	instr_out(data, hw_offset, 1, "%s, %s, pitch = %d bytes, %stiled\n",
+		  get_965_surfacetype(data[1] >> 29),
+		  get_965_depthformat((data[1] >> 18) & 0x7),
+		  (data[1] & 0x0001ffff) + 1,
+		  data[1] & (1 << 27) ? "" : "not ");
+	instr_out(data, hw_offset, 2, "depth offset\n");
+	instr_out(data, hw_offset, 3, "%dx%d\n",
+		  ((data[3] & 0x0007ffc0) >> 6) + 1,
+		  ((data[3] & 0xfff80000) >> 19) + 1);
+	instr_out(data, hw_offset, 4, "volume depth\n");
+	if (len == 6)
+	    instr_out(data, hw_offset, 5, "\n");
+
+	return len;
+
+    case 0x7b00:
+	len = (data[0] & 0xff) + 2;
+	if (len != 6)
+	    fprintf(out, "Bad count in 3DPRIMITIVE\n");
+	if (count < len)
+	    BUFFER_FAIL(count, len, "3DPRIMITIVE");
+
+	instr_out(data, hw_offset, 0,
+		  "3DPRIMITIVE: %s %s\n",
+		  get_965_prim_type(data[0]),
+		  (data[0] & (1 << 15)) ? "random" : "sequential");
+	instr_out(data, hw_offset, 1, "primitive count\n");
+	instr_out(data, hw_offset, 2, "start vertex\n");
+	instr_out(data, hw_offset, 3, "instance count\n");
+	instr_out(data, hw_offset, 4, "start instance\n");
+	instr_out(data, hw_offset, 5, "index bias\n");
+	return len;
+    }
+
+    for (opcode = 0; opcode < sizeof(opcodes_3d) / sizeof(opcodes_3d[0]);
+	 opcode++) {
+	if ((data[0] & 0xffff0000) >> 16 == opcodes_3d[opcode].opcode) {
+	    unsigned int i;
+	    len = 1;
+
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_3d[opcode].name);
+	    if (opcodes_3d[opcode].max_len > 1) {
+		len = (data[0] & 0xff) + 2;
+		if (len < opcodes_3d[opcode].min_len ||
+		    len > opcodes_3d[opcode].max_len)
+		{
+		    fprintf(out, "Bad count in %s\n", opcodes_3d[opcode].name);
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, opcodes_3d[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "3D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+static int
+decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+{
+    unsigned int opcode;
+
+    struct {
+	uint32_t opcode;
+	int min_len;
+	int max_len;
+	char *name;
+    } opcodes_3d[] = {
+	{ 0x02, 1, 1, "3DSTATE_MODES_3" },
+	{ 0x03, 1, 1, "3DSTATE_ENABLES_1"},
+	{ 0x04, 1, 1, "3DSTATE_ENABLES_2"},
+	{ 0x05, 1, 1, "3DSTATE_VFT0"},
+	{ 0x06, 1, 1, "3DSTATE_AA"},
+	{ 0x07, 1, 1, "3DSTATE_RASTERIZATION_RULES" },
+	{ 0x08, 1, 1, "3DSTATE_MODES_1" },
+	{ 0x09, 1, 1, "3DSTATE_STENCIL_TEST" },
+	{ 0x0a, 1, 1, "3DSTATE_VFT1"},
+	{ 0x0b, 1, 1, "3DSTATE_INDPT_ALPHA_BLEND" },
+	{ 0x0c, 1, 1, "3DSTATE_MODES_5" },
+	{ 0x0d, 1, 1, "3DSTATE_MAP_BLEND_OP" },
+	{ 0x0e, 1, 1, "3DSTATE_MAP_BLEND_ARG" },
+	{ 0x0f, 1, 1, "3DSTATE_MODES_2" },
+	{ 0x15, 1, 1, "3DSTATE_FOG_COLOR" },
+	{ 0x16, 1, 1, "3DSTATE_MODES_4" },
+    };
+
+    switch ((data[0] & 0x1f000000) >> 24) {
+    case 0x1f:
+	return decode_3d_primitive(data, count, hw_offset, failures);
+    case 0x1d:
+	return decode_3d_1d(data, count, hw_offset, failures, 1);
+    case 0x1c:
+	return decode_3d_1c(data, count, hw_offset, failures);
+    }
+
+    for (opcode = 0; opcode < sizeof(opcodes_3d) / sizeof(opcodes_3d[0]);
+	 opcode++) {
+	if ((data[0] & 0x1f000000) >> 24 == opcodes_3d[opcode].opcode) {
+	    unsigned int len = 1, i;
+
+	    instr_out(data, hw_offset, 0, "%s\n", opcodes_3d[opcode].name);
+	    if (opcodes_3d[opcode].max_len > 1) {
+		len = (data[0] & 0xff) + 2;
+		if (len < opcodes_3d[opcode].min_len ||
+		    len > opcodes_3d[opcode].max_len)
+		{
+		    fprintf(out, "Bad count in %s\n", opcodes_3d[opcode].name);
+		}
+	    }
+
+	    for (i = 1; i < len; i++) {
+		if (i >= count)
+		    BUFFER_FAIL(count, len, opcodes_3d[opcode].name);
+		instr_out(data, hw_offset, i, "dword %d\n", i);
+	    }
+	    return len;
+	}
+    }
+
+    instr_out(data, hw_offset, 0, "3D UNKNOWN\n");
+    (*failures)++;
+    return 1;
+}
+
+/**
+ * Decodes an i830-i915 batch buffer, writing the output to stdout.
+ *
+ * \param data batch buffer contents
+ * \param count number of DWORDs to decode in the batch buffer
+ * \param hw_offset hardware address for the buffer
+ */
+int
+intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid)
+{
+    int index = 0;
+    int failures = 0;
+
+    out = stderr;
+
+    while (index < count) {
+	switch ((data[index] & 0xe0000000) >> 29) {
+	case 0x0:
+	    index += decode_mi(data + index, count - index,
+			       hw_offset + index * 4, &failures);
+	    break;
+	case 0x2:
+	    index += decode_2d(data + index, count - index,
+			       hw_offset + index * 4, &failures);
+	    break;
+	case 0x3:
+	    if (IS_965(devid)) {
+		index += decode_3d_965(data + index, count - index,
+				       hw_offset + index * 4, &failures);
+	    } else if (IS_9XX(devid)) {
+		index += decode_3d(data + index, count - index,
+				   hw_offset + index * 4, &failures);
+	    } else {
+		index += decode_3d_i830(data + index, count - index,
+					hw_offset + index * 4, &failures);
+	    }
+	    break;
+	default:
+	    instr_out(data, hw_offset, index, "UNKNOWN\n");
+	    failures++;
+	    index++;
+	    break;
+	}
+	fflush(out);
+    }
+
+    return failures;
+}
+
+void intel_decode_context_reset(void)
+{
+    saved_s2_set = 0;
+    saved_s4_set = 1;
+}
+
diff --git a/src/mesa/drivers/dri/intel/intel_decode.h b/src/mesa/drivers/dri/intel/intel_decode.h
new file mode 100644
index 00000000000..c50644a46b5
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_decode.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright © 2007 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *
+ */
+
+int intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid);
+void intel_decode_context_reset(void);
diff --git a/src/mesa/drivers/dri/intel/intel_depthstencil.c b/src/mesa/drivers/dri/intel/intel_depthstencil.c
new file mode 100644
index 00000000000..c2b4d7728b4
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_depthstencil.c
@@ -0,0 +1,252 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/depthstencil.h"
+#include "main/fbobject.h"
+#include "main/framebuffer.h"
+#include "main/hash.h"
+#include "main/mtypes.h"
+#include "main/renderbuffer.h"
+
+#include "intel_context.h"
+#include "intel_fbo.h"
+#include "intel_depthstencil.h"
+#include "intel_regions.h"
+#include "intel_span.h"
+
+/**
+ * The GL_EXT_framebuffer_object allows the user to create their own
+ * framebuffer objects consisting of color renderbuffers (0 or more),
+ * depth renderbuffers (0 or 1) and stencil renderbuffers (0 or 1).
+ *
+ * The spec considers depth and stencil renderbuffers to be totally independent
+ * buffers.  In reality, most graphics hardware today uses a combined
+ * depth+stencil buffer (one 32-bit pixel = 24 bits of Z + 8 bits of stencil).
+ *
+ * This causes difficulty because the user may create some number of depth
+ * renderbuffers and some number of stencil renderbuffers and bind them
+ * together in framebuffers in any combination.
+ *
+ * This code manages all that.
+ *
+ * 1. Depth renderbuffers are always allocated in hardware as 32bpp
+ *    GL_DEPTH24_STENCIL8 buffers.
+ *
+ * 2. Stencil renderbuffers are initially allocated in software as 8bpp
+ *    GL_STENCIL_INDEX8 buffers.
+ *
+ * 3. Depth and Stencil renderbuffers use the PairedStencil and PairedDepth
+ *    fields (respectively) to indicate if the buffer's currently paired
+ *    with another stencil or depth buffer (respectively).
+ *
+ * 4. When a depth and stencil buffer are initially both attached to the
+ *    current framebuffer, we merge the stencil buffer values into the
+ *    depth buffer (really a depth+stencil buffer).  The then hardware uses
+ *    the combined buffer.
+ *
+ * 5. Whenever a depth or stencil buffer is reallocated (with
+ *    glRenderbufferStorage) we undo the pairing and copy the stencil values
+ *    from the combined depth/stencil buffer back to the stencil-only buffer.
+ *
+ * 6. We also undo the pairing when we find a change in buffer bindings.
+ *
+ * 7. If a framebuffer is only using a depth renderbuffer (no stencil), we
+ *    just use the combined depth/stencil buffer and ignore the stencil values.
+ *
+ * 8. If a framebuffer is only using a stencil renderbuffer (no depth) we have
+ *    to promote the 8bpp software stencil buffer to a 32bpp hardware
+ *    depth+stencil buffer.
+ *
+ */
+
+/**
+ * Undo the pairing/interleaving between depth and stencil buffers.
+ * irb should be a depth/stencil or stencil renderbuffer.
+ */
+void
+intel_unpair_depth_stencil(GLcontext *ctx, struct intel_renderbuffer *irb)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct gl_renderbuffer *rb = &irb->Base;
+
+   if (irb->PairedStencil) {
+      /* irb is a depth/stencil buffer */
+      struct gl_renderbuffer *stencilRb;
+      struct intel_renderbuffer *stencilIrb;
+
+      ASSERT(rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+
+      stencilRb = _mesa_lookup_renderbuffer(ctx, irb->PairedStencil);
+      stencilIrb = intel_renderbuffer(stencilRb);
+      if (stencilIrb) {
+         /* need to extract stencil values from the depth buffer */
+	 ASSERT(stencilIrb->PairedDepth == rb->Name);
+	 intel_renderbuffer_map(intel, rb);
+	 intel_renderbuffer_map(intel, stencilRb);
+	 _mesa_extract_stencil(ctx, rb, stencilRb);
+	 intel_renderbuffer_unmap(intel, stencilRb);
+	 intel_renderbuffer_unmap(intel, rb);
+         stencilIrb->PairedDepth = 0;
+      }
+      irb->PairedStencil = 0;
+   }
+   else if (irb->PairedDepth) {
+      /* irb is a stencil buffer */
+      struct gl_renderbuffer *depthRb;
+      struct intel_renderbuffer *depthIrb;
+
+      ASSERT(rb->_ActualFormat == GL_STENCIL_INDEX8_EXT ||
+             rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+
+      depthRb = _mesa_lookup_renderbuffer(ctx, irb->PairedDepth);
+      depthIrb = intel_renderbuffer(depthRb);
+      if (depthIrb) {
+         /* need to extract stencil values from the depth buffer */
+	 ASSERT(depthIrb->PairedStencil == rb->Name);
+	 intel_renderbuffer_map(intel, rb);
+	 intel_renderbuffer_map(intel, depthRb);
+	 _mesa_extract_stencil(ctx, depthRb, rb);
+	 intel_renderbuffer_unmap(intel, depthRb);
+	 intel_renderbuffer_unmap(intel, rb);
+         depthIrb->PairedStencil = 0;
+      }
+      irb->PairedDepth = 0;
+   }
+   else {
+      _mesa_problem(ctx, "Problem in undo_depth_stencil_pairing");
+   }
+
+   ASSERT(irb->PairedStencil == 0);
+   ASSERT(irb->PairedDepth == 0);
+}
+
+
+/**
+ * Examine the depth and stencil renderbuffers which are attached to the
+ * framebuffer.  If both depth and stencil are attached, make sure that the
+ * renderbuffers are 'paired' (combined).  If only depth or only stencil is
+ * attached, undo any previous pairing.
+ *
+ * Must be called if NewState & _NEW_BUFFER (when renderbuffer attachments
+ * change, for example).
+ */
+void
+intel_validate_paired_depth_stencil(GLcontext * ctx,
+                                    struct gl_framebuffer *fb)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_renderbuffer *depthRb, *stencilRb;
+
+   depthRb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
+   stencilRb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
+
+   if (depthRb && stencilRb) {
+      if (depthRb == stencilRb) {
+         /* Using a user-created combined depth/stencil buffer.
+          * Nothing to do.
+          */
+         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_STENCIL_EXT);
+         ASSERT(depthRb->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+      }
+      else {
+         /* Separate depth/stencil buffers, need to interleave now */
+         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_COMPONENT);
+         ASSERT(stencilRb->Base._BaseFormat == GL_STENCIL_INDEX);
+         /* may need to interleave depth/stencil now */
+         if (depthRb->PairedStencil == stencilRb->Base.Name) {
+            /* OK, the depth and stencil buffers are already interleaved */
+            ASSERT(stencilRb->PairedDepth == depthRb->Base.Name);
+         }
+         else {
+            /* need to setup new pairing/interleaving */
+            if (depthRb->PairedStencil) {
+               intel_unpair_depth_stencil(ctx, depthRb);
+            }
+            if (stencilRb->PairedDepth) {
+               intel_unpair_depth_stencil(ctx, stencilRb);
+            }
+
+            ASSERT(depthRb->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+            ASSERT(stencilRb->Base._ActualFormat == GL_STENCIL_INDEX8_EXT ||
+                   stencilRb->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+
+            /* establish new pairing: interleave stencil into depth buffer */
+	    intel_renderbuffer_map(intel, &depthRb->Base);
+	    intel_renderbuffer_map(intel, &stencilRb->Base);
+            _mesa_insert_stencil(ctx, &depthRb->Base, &stencilRb->Base);
+	    intel_renderbuffer_unmap(intel, &stencilRb->Base);
+	    intel_renderbuffer_unmap(intel, &depthRb->Base);
+            depthRb->PairedStencil = stencilRb->Base.Name;
+            stencilRb->PairedDepth = depthRb->Base.Name;
+         }
+
+      }
+   }
+   else if (depthRb) {
+      /* Depth buffer but no stencil buffer.
+       * We'll use a GL_DEPTH24_STENCIL8 buffer and ignore the stencil bits.
+       */
+      /* can't assert this until storage is allocated:
+         ASSERT(depthRb->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+       */
+      /* intel_undo any previous pairing */
+      if (depthRb->PairedStencil) {
+         intel_unpair_depth_stencil(ctx, depthRb);
+      }
+   }
+   else if (stencilRb) {
+      /* Stencil buffer but no depth buffer.
+       * Since h/w doesn't typically support just 8bpp stencil w/out Z,
+       * we'll use a GL_DEPTH24_STENCIL8 buffer and ignore the depth bits.
+       */
+      /* undo any previous pairing */
+      if (stencilRb->PairedDepth) {
+         intel_unpair_depth_stencil(ctx, stencilRb);
+      }
+      if (stencilRb->Base._ActualFormat == GL_STENCIL_INDEX8_EXT) {
+         /* promote buffer to GL_DEPTH24_STENCIL8 for hw rendering */
+         _mesa_promote_stencil(ctx, &stencilRb->Base);
+         ASSERT(stencilRb->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
+      }
+   }
+
+   /* Finally, update the fb->_DepthBuffer and fb->_StencilBuffer fields */
+   _mesa_update_depth_buffer(ctx, fb, BUFFER_DEPTH);
+   if (depthRb && depthRb->PairedStencil)
+      _mesa_update_stencil_buffer(ctx, fb, BUFFER_DEPTH);
+   else
+      _mesa_update_stencil_buffer(ctx, fb, BUFFER_STENCIL);
+
+
+   /* The hardware should use fb->Attachment[BUFFER_DEPTH].Renderbuffer
+    * first, if present, then fb->Attachment[BUFFER_STENCIL].Renderbuffer
+    * if present.
+    */
+}
diff --git a/src/mesa/drivers/dri/intel/intel_depthstencil.h b/src/mesa/drivers/dri/intel/intel_depthstencil.h
new file mode 100644
index 00000000000..740eb0d9895
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_depthstencil.h
@@ -0,0 +1,15 @@
+
+#ifndef INTEL_DEPTH_STENCIL_H
+#define INTEL_DEPTH_STENCIL_H
+
+#include "intel_fbo.h"
+
+extern void
+intel_unpair_depth_stencil(GLcontext * ctx, struct intel_renderbuffer *irb);
+
+extern void
+intel_validate_paired_depth_stencil(GLcontext * ctx,
+                                    struct gl_framebuffer *fb);
+
+
+#endif /* INTEL_DEPTH_STENCIL_H */
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
new file mode 100644
index 00000000000..7453b96dc5d
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -0,0 +1,716 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/fbobject.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
+#include "main/context.h"
+#include "main/texformat.h"
+#include "main/texrender.h"
+
+#include "intel_context.h"
+#include "intel_buffers.h"
+#include "intel_depthstencil.h"
+#include "intel_fbo.h"
+#include "intel_mipmap_tree.h"
+#include "intel_regions.h"
+#include "intel_span.h"
+
+
+#define FILE_DEBUG_FLAG DEBUG_FBO
+
+#define INTEL_RB_CLASS 0x12345678
+
+
+/* XXX FBO: move this to intel_context.h (inlined) */
+/**
+ * Return a gl_renderbuffer ptr casted to intel_renderbuffer.
+ * NULL will be returned if the rb isn't really an intel_renderbuffer.
+ * This is determiend by checking the ClassID.
+ */
+struct intel_renderbuffer *
+intel_renderbuffer(struct gl_renderbuffer *rb)
+{
+   struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
+   if (irb && irb->Base.ClassID == INTEL_RB_CLASS) {
+      /*_mesa_warning(NULL, "Returning non-intel Rb\n");*/
+      return irb;
+   }
+   else
+      return NULL;
+}
+
+
+struct intel_renderbuffer *
+intel_get_renderbuffer(struct gl_framebuffer *fb, int attIndex)
+{
+   if (attIndex >= 0)
+      return intel_renderbuffer(fb->Attachment[attIndex].Renderbuffer);
+   else
+      return NULL;
+}
+
+
+void
+intel_flip_renderbuffers(struct intel_framebuffer *intel_fb)
+{
+   int current_page = intel_fb->pf_current_page;
+   int next_page = (current_page + 1) % intel_fb->pf_num_pages;
+   struct gl_renderbuffer *tmp_rb;
+
+   /* Exchange renderbuffers if necessary but make sure their reference counts
+    * are preserved.
+    */
+   if (intel_fb->color_rb[current_page] &&
+       intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer !=
+       &intel_fb->color_rb[current_page]->Base) {
+      tmp_rb = NULL;
+      _mesa_reference_renderbuffer(&tmp_rb,
+	 intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer);
+      tmp_rb = &intel_fb->color_rb[current_page]->Base;
+      _mesa_reference_renderbuffer(
+	 &intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer, tmp_rb);
+      _mesa_reference_renderbuffer(&tmp_rb, NULL);
+   }
+
+   if (intel_fb->color_rb[next_page] &&
+       intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer !=
+       &intel_fb->color_rb[next_page]->Base) {
+      tmp_rb = NULL;
+      _mesa_reference_renderbuffer(&tmp_rb,
+	 intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer);
+      tmp_rb = &intel_fb->color_rb[next_page]->Base;
+      _mesa_reference_renderbuffer(
+	 &intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer, tmp_rb);
+      _mesa_reference_renderbuffer(&tmp_rb, NULL);
+   }
+}
+
+
+struct intel_region *
+intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex)
+{
+   struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, attIndex);
+
+   if (irb)
+      return irb->region;
+   else
+      return NULL;
+}
+
+
+
+/**
+ * Create a new framebuffer object.
+ */
+static struct gl_framebuffer *
+intel_new_framebuffer(GLcontext * ctx, GLuint name)
+{
+   /* Only drawable state in intel_framebuffer at this time, just use Mesa's
+    * class
+    */
+   return _mesa_new_framebuffer(ctx, name);
+}
+
+
+static void
+intel_delete_renderbuffer(struct gl_renderbuffer *rb)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+
+   ASSERT(irb);
+
+   if (irb->PairedStencil || irb->PairedDepth) {
+      intel_unpair_depth_stencil(ctx, irb);
+   }
+
+   if (irb->span_cache != NULL)
+      _mesa_free(irb->span_cache);
+
+   if (intel && irb->region) {
+      intel_region_release(&irb->region);
+   }
+
+   _mesa_free(irb);
+}
+
+
+
+/**
+ * Return a pointer to a specific pixel in a renderbuffer.
+ */
+static void *
+intel_get_pointer(GLcontext * ctx, struct gl_renderbuffer *rb,
+                  GLint x, GLint y)
+{
+   /* By returning NULL we force all software rendering to go through
+    * the span routines.
+    */
+   return NULL;
+}
+
+
+
+/**
+ * Called via glRenderbufferStorageEXT() to set the format and allocate
+ * storage for a user-created renderbuffer.
+ */
+static GLboolean
+intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+                                 GLenum internalFormat,
+                                 GLuint width, GLuint height)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+   GLboolean softwareBuffer = GL_FALSE;
+   int cpp;
+
+   ASSERT(rb->Name != 0);
+
+   switch (internalFormat) {
+   case GL_R3_G3_B2:
+   case GL_RGB4:
+   case GL_RGB5:
+      rb->_ActualFormat = GL_RGB5;
+      rb->DataType = GL_UNSIGNED_BYTE;
+      rb->RedBits = 5;
+      rb->GreenBits = 6;
+      rb->BlueBits = 5;
+      cpp = 2;
+      break;
+   case GL_RGB:
+   case GL_RGB8:
+   case GL_RGB10:
+   case GL_RGB12:
+   case GL_RGB16:
+      rb->_ActualFormat = GL_RGB8;
+      rb->DataType = GL_UNSIGNED_BYTE;
+      rb->RedBits = 8;
+      rb->GreenBits = 8;
+      rb->BlueBits = 8;
+      rb->AlphaBits = 0;
+      cpp = 4;
+      break;
+   case GL_RGBA:
+   case GL_RGBA2:
+   case GL_RGBA4:
+   case GL_RGB5_A1:
+   case GL_RGBA8:
+   case GL_RGB10_A2:
+   case GL_RGBA12:
+   case GL_RGBA16:
+      rb->_ActualFormat = GL_RGBA8;
+      rb->DataType = GL_UNSIGNED_BYTE;
+      rb->RedBits = 8;
+      rb->GreenBits = 8;
+      rb->BlueBits = 8;
+      rb->AlphaBits = 8;
+      cpp = 4;
+      break;
+   case GL_STENCIL_INDEX:
+   case GL_STENCIL_INDEX1_EXT:
+   case GL_STENCIL_INDEX4_EXT:
+   case GL_STENCIL_INDEX8_EXT:
+   case GL_STENCIL_INDEX16_EXT:
+      /* alloc a depth+stencil buffer */
+      rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
+      rb->StencilBits = 8;
+      cpp = 4;
+      break;
+   case GL_DEPTH_COMPONENT16:
+      rb->_ActualFormat = GL_DEPTH_COMPONENT16;
+      rb->DataType = GL_UNSIGNED_SHORT;
+      rb->DepthBits = 16;
+      cpp = 2;
+      break;
+   case GL_DEPTH_COMPONENT:
+   case GL_DEPTH_COMPONENT24:
+   case GL_DEPTH_COMPONENT32:
+      rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
+      rb->DepthBits = 24;
+      cpp = 4;
+      break;
+   case GL_DEPTH_STENCIL_EXT:
+   case GL_DEPTH24_STENCIL8_EXT:
+      rb->_ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
+      rb->DepthBits = 24;
+      rb->StencilBits = 8;
+      cpp = 4;
+      break;
+   default:
+      _mesa_problem(ctx,
+                    "Unexpected format in intel_alloc_renderbuffer_storage");
+      return GL_FALSE;
+   }
+
+   intelFlush(ctx);
+
+   /* free old region */
+   if (irb->region) {
+      intel_region_release(&irb->region);
+   }
+
+   /* allocate new memory region/renderbuffer */
+   if (softwareBuffer) {
+      return _mesa_soft_renderbuffer_storage(ctx, rb, internalFormat,
+                                             width, height);
+   }
+   else {
+      /* Choose a pitch to match hardware requirements:
+       */
+      GLuint pitch = ((cpp * width + 63) & ~63) / cpp;
+
+      /* alloc hardware renderbuffer */
+      DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width,
+	  height, pitch);
+
+      irb->region = intel_region_alloc(intel, cpp, width, height, pitch);
+      if (!irb->region)
+         return GL_FALSE;       /* out of memory? */
+
+      ASSERT(irb->region->buffer);
+
+      rb->Width = width;
+      rb->Height = height;
+
+      return GL_TRUE;
+   }
+}
+
+
+
+/**
+ * Called for each hardware renderbuffer when a _window_ is resized.
+ * Just update fields.
+ * Not used for user-created renderbuffers!
+ */
+static GLboolean
+intel_alloc_window_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+                           GLenum internalFormat, GLuint width, GLuint height)
+{
+   ASSERT(rb->Name == 0);
+   rb->Width = width;
+   rb->Height = height;
+   rb->_ActualFormat = internalFormat;
+
+   return GL_TRUE;
+}
+
+static void
+intel_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb,
+		     GLuint width, GLuint height)
+{
+   struct intel_framebuffer *intel_fb = (struct intel_framebuffer*)fb;
+   int i;
+
+   _mesa_resize_framebuffer(ctx, fb, width, height);
+
+   fb->Initialized = GL_TRUE; /* XXX remove someday */
+
+   if (fb->Name != 0) {
+      return;
+   }
+
+   /* Make sure all window system renderbuffers are up to date */
+   for (i = 0; i < 3; i++) {
+      struct gl_renderbuffer *rb = &intel_fb->color_rb[i]->Base;
+
+      /* only resize if size is changing */
+      if (rb && (rb->Width != width || rb->Height != height)) {
+	 rb->AllocStorage(ctx, rb, rb->InternalFormat, width, height);
+      }
+   }
+}
+
+static GLboolean
+intel_nop_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+                        GLenum internalFormat, GLuint width, GLuint height)
+{
+   _mesa_problem(ctx, "intel_op_alloc_storage should never be called.");
+   return GL_FALSE;
+}
+
+
+void
+intel_renderbuffer_set_region(struct intel_renderbuffer *rb,
+			      struct intel_region *region)
+{
+   struct intel_region *old;
+
+   old = rb->region;
+   rb->region = NULL;
+   intel_region_reference(&rb->region, region);
+   intel_region_release(&old);
+
+   rb->pfPitch = region->pitch;
+}
+
+/**
+ * Create a new intel_renderbuffer which corresponds to an on-screen window,
+ * not a user-created renderbuffer.
+ */
+struct intel_renderbuffer *
+intel_create_renderbuffer(GLenum intFormat)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct intel_renderbuffer *irb;
+   const GLuint name = 0;
+
+   irb = CALLOC_STRUCT(intel_renderbuffer);
+   if (!irb) {
+      _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
+      return NULL;
+   }
+
+   _mesa_init_renderbuffer(&irb->Base, name);
+   irb->Base.ClassID = INTEL_RB_CLASS;
+
+   switch (intFormat) {
+   case GL_RGB5:
+      irb->Base._ActualFormat = GL_RGB5;
+      irb->Base._BaseFormat = GL_RGBA;
+      irb->Base.RedBits = 5;
+      irb->Base.GreenBits = 6;
+      irb->Base.BlueBits = 5;
+      irb->Base.DataType = GL_UNSIGNED_BYTE;
+      break;
+   case GL_RGBA8:
+      irb->Base._ActualFormat = GL_RGBA8;
+      irb->Base._BaseFormat = GL_RGBA;
+      irb->Base.RedBits = 8;
+      irb->Base.GreenBits = 8;
+      irb->Base.BlueBits = 8;
+      irb->Base.AlphaBits = 8;
+      irb->Base.DataType = GL_UNSIGNED_BYTE;
+      break;
+   case GL_STENCIL_INDEX8_EXT:
+      irb->Base._ActualFormat = GL_STENCIL_INDEX8_EXT;
+      irb->Base._BaseFormat = GL_STENCIL_INDEX;
+      irb->Base.StencilBits = 8;
+      irb->Base.DataType = GL_UNSIGNED_BYTE;
+      break;
+   case GL_DEPTH_COMPONENT16:
+      irb->Base._ActualFormat = GL_DEPTH_COMPONENT16;
+      irb->Base._BaseFormat = GL_DEPTH_COMPONENT;
+      irb->Base.DepthBits = 16;
+      irb->Base.DataType = GL_UNSIGNED_SHORT;
+      break;
+   case GL_DEPTH_COMPONENT24:
+      irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      irb->Base._BaseFormat = GL_DEPTH_COMPONENT;
+      irb->Base.DepthBits = 24;
+      irb->Base.DataType = GL_UNSIGNED_INT;
+      break;
+   case GL_DEPTH24_STENCIL8_EXT:
+      irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      irb->Base._BaseFormat = GL_DEPTH_STENCIL_EXT;
+      irb->Base.DepthBits = 24;
+      irb->Base.StencilBits = 8;
+      irb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT;
+      break;
+   default:
+      _mesa_problem(NULL,
+                    "Unexpected intFormat in intel_create_renderbuffer");
+      return NULL;
+   }
+
+   irb->Base.InternalFormat = intFormat;
+
+   /* intel-specific methods */
+   irb->Base.Delete = intel_delete_renderbuffer;
+   irb->Base.AllocStorage = intel_alloc_window_storage;
+   irb->Base.GetPointer = intel_get_pointer;
+
+   return irb;
+}
+
+
+/**
+ * Create a new renderbuffer object.
+ * Typically called via glBindRenderbufferEXT().
+ */
+static struct gl_renderbuffer *
+intel_new_renderbuffer(GLcontext * ctx, GLuint name)
+{
+   /*struct intel_context *intel = intel_context(ctx); */
+   struct intel_renderbuffer *irb;
+
+   irb = CALLOC_STRUCT(intel_renderbuffer);
+   if (!irb) {
+      _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
+      return NULL;
+   }
+
+   _mesa_init_renderbuffer(&irb->Base, name);
+   irb->Base.ClassID = INTEL_RB_CLASS;
+
+   /* intel-specific methods */
+   irb->Base.Delete = intel_delete_renderbuffer;
+   irb->Base.AllocStorage = intel_alloc_renderbuffer_storage;
+   irb->Base.GetPointer = intel_get_pointer;
+   /* span routines set in alloc_storage function */
+
+   return &irb->Base;
+}
+
+
+/**
+ * Called via glBindFramebufferEXT().
+ */
+static void
+intel_bind_framebuffer(GLcontext * ctx, GLenum target,
+                       struct gl_framebuffer *fb, struct gl_framebuffer *fbread)
+{
+   if (target == GL_FRAMEBUFFER_EXT || target == GL_DRAW_FRAMEBUFFER_EXT) {
+      intel_draw_buffer(ctx, fb);
+      /* Integer depth range depends on depth buffer bits */
+      if (ctx->Driver.DepthRange != NULL)
+	 ctx->Driver.DepthRange(ctx, ctx->Viewport.Near, ctx->Viewport.Far);
+   }
+   else {
+      /* don't need to do anything if target == GL_READ_FRAMEBUFFER_EXT */
+   }
+}
+
+
+/**
+ * Called via glFramebufferRenderbufferEXT().
+ */
+static void
+intel_framebuffer_renderbuffer(GLcontext * ctx,
+                               struct gl_framebuffer *fb,
+                               GLenum attachment, struct gl_renderbuffer *rb)
+{
+   DBG("Intel FramebufferRenderbuffer %u %u\n", fb->Name, rb ? rb->Name : 0);
+
+   intelFlush(ctx);
+
+   _mesa_framebuffer_renderbuffer(ctx, fb, attachment, rb);
+   intel_draw_buffer(ctx, fb);
+}
+
+static GLboolean
+intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb, 
+		     struct gl_texture_image *texImage)
+{
+   if (texImage->TexFormat == &_mesa_texformat_argb8888) {
+      irb->Base._ActualFormat = GL_RGBA8;
+      irb->Base._BaseFormat = GL_RGBA;
+      DBG("Render to RGBA8 texture OK\n");
+   }
+   else if (texImage->TexFormat == &_mesa_texformat_rgb565) {
+      irb->Base._ActualFormat = GL_RGB5;
+      irb->Base._BaseFormat = GL_RGB;
+      DBG("Render to RGB5 texture OK\n");
+   }
+   else if (texImage->TexFormat == &_mesa_texformat_z16) {
+      irb->Base._ActualFormat = GL_DEPTH_COMPONENT16;
+      irb->Base._BaseFormat = GL_DEPTH_COMPONENT;
+      DBG("Render to DEPTH16 texture OK\n");
+   } else if (texImage->TexFormat == &_mesa_texformat_s8_z24) {
+      irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
+      irb->Base._BaseFormat = GL_DEPTH_STENCIL_EXT;
+      DBG("Render to DEPTH_STENCIL texture OK\n");
+   }
+   else {
+      DBG("Render to texture BAD FORMAT %d\n",
+	  texImage->TexFormat->MesaFormat);
+      return GL_FALSE;
+   }
+
+   irb->Base.InternalFormat = irb->Base._ActualFormat;
+   irb->Base.Width = texImage->Width;
+   irb->Base.Height = texImage->Height;
+   irb->Base.DataType = GL_UNSIGNED_BYTE;       /* FBO XXX fix */
+   irb->Base.RedBits = texImage->TexFormat->RedBits;
+   irb->Base.GreenBits = texImage->TexFormat->GreenBits;
+   irb->Base.BlueBits = texImage->TexFormat->BlueBits;
+   irb->Base.AlphaBits = texImage->TexFormat->AlphaBits;
+   irb->Base.DepthBits = texImage->TexFormat->DepthBits;
+
+   irb->Base.Delete = intel_delete_renderbuffer;
+   irb->Base.AllocStorage = intel_nop_alloc_storage;
+
+   irb->RenderToTexture = GL_TRUE;
+
+   return GL_TRUE;
+}
+
+/**
+ * When glFramebufferTexture[123]D is called this function sets up the
+ * gl_renderbuffer wrapper around the texture image.
+ * This will have the region info needed for hardware rendering.
+ */
+static struct intel_renderbuffer *
+intel_wrap_texture(GLcontext * ctx, struct gl_texture_image *texImage)
+{
+   const GLuint name = ~0;      /* not significant, but distinct for debugging */
+   struct intel_renderbuffer *irb;
+
+   /* make an intel_renderbuffer to wrap the texture image */
+   irb = CALLOC_STRUCT(intel_renderbuffer);
+   if (!irb) {
+      _mesa_error(ctx, GL_OUT_OF_MEMORY, "glFramebufferTexture");
+      return NULL;
+   }
+
+   _mesa_init_renderbuffer(&irb->Base, name);
+   irb->Base.ClassID = INTEL_RB_CLASS;
+
+   if (!intel_update_wrapper(ctx, irb, texImage)) {
+      _mesa_free(irb);
+      return NULL;
+   }
+
+   return irb;
+}
+
+
+/**
+ * Called by glFramebufferTexture[123]DEXT() (and other places) to
+ * prepare for rendering into texture memory.  This might be called
+ * many times to choose different texture levels, cube faces, etc
+ * before intel_finish_render_texture() is ever called.
+ */
+static void
+intel_render_texture(GLcontext * ctx,
+                     struct gl_framebuffer *fb,
+                     struct gl_renderbuffer_attachment *att)
+{
+   struct gl_texture_image *newImage
+      = att->Texture->Image[att->CubeMapFace][att->TextureLevel];
+   struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
+   struct intel_texture_image *intel_image;
+   GLuint imageOffset;
+
+   (void) fb;
+
+   ASSERT(newImage);
+
+   if (newImage->Border != 0) {
+      /* Fallback on drawing to a texture with a border, which won't have a
+       * miptree.
+       */
+       _mesa_reference_renderbuffer(&att->Renderbuffer, NULL);
+       _mesa_render_texture(ctx, fb, att);
+       return;
+   } else if (!irb) {
+      irb = intel_wrap_texture(ctx, newImage);
+      if (irb) {
+         /* bind the wrapper to the attachment point */
+         _mesa_reference_renderbuffer(&att->Renderbuffer, &irb->Base);
+      }
+      else {
+         /* fallback to software rendering */
+         _mesa_render_texture(ctx, fb, att);
+         return;
+      }
+   } if (!intel_update_wrapper(ctx, irb, newImage)) {
+       _mesa_reference_renderbuffer(&att->Renderbuffer, NULL);
+       _mesa_render_texture(ctx, fb, att);
+       return;
+   }
+
+   DBG("Begin render texture tid %x tex=%u w=%d h=%d refcount=%d\n",
+       _glthread_GetID(),
+       att->Texture->Name, newImage->Width, newImage->Height,
+       irb->Base.RefCount);
+
+   /* point the renderbufer's region to the texture image region */
+   intel_image = intel_texture_image(newImage);
+   if (irb->region != intel_image->mt->region) {
+      if (irb->region)
+	 intel_region_release(&irb->region);
+      intel_region_reference(&irb->region, intel_image->mt->region);
+   }
+
+   /* compute offset of the particular 2D image within the texture region */
+   imageOffset = intel_miptree_image_offset(intel_image->mt,
+                                            att->CubeMapFace,
+                                            att->TextureLevel);
+
+   if (att->Texture->Target == GL_TEXTURE_3D) {
+      const GLuint *offsets = intel_miptree_depth_offsets(intel_image->mt,
+                                                          att->TextureLevel);
+      imageOffset += offsets[att->Zoffset];
+   }
+
+   /* store that offset in the region */
+   intel_image->mt->region->draw_offset = imageOffset;
+
+   /* update drawing region, etc */
+   intel_draw_buffer(ctx, fb);
+}
+
+
+/**
+ * Called by Mesa when rendering to a texture is done.
+ */
+static void
+intel_finish_render_texture(GLcontext * ctx,
+                            struct gl_renderbuffer_attachment *att)
+{
+   struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
+
+   DBG("End render texture (tid %x) tex %u\n", _glthread_GetID(), att->Texture->Name);
+
+   if (irb) {
+      /* just release the region */
+      intel_region_release(&irb->region);
+   }
+   else if (att->Renderbuffer) {
+      /* software fallback */
+      _mesa_finish_render_texture(ctx, att);
+      /* XXX FBO: Need to unmap the buffer (or in intelSpanRenderStart???) */
+   }
+}
+
+
+/**
+ * Do one-time context initializations related to GL_EXT_framebuffer_object.
+ * Hook in device driver functions.
+ */
+void
+intel_fbo_init(struct intel_context *intel)
+{
+   intel->ctx.Driver.NewFramebuffer = intel_new_framebuffer;
+   intel->ctx.Driver.NewRenderbuffer = intel_new_renderbuffer;
+   intel->ctx.Driver.BindFramebuffer = intel_bind_framebuffer;
+   intel->ctx.Driver.FramebufferRenderbuffer = intel_framebuffer_renderbuffer;
+   intel->ctx.Driver.RenderTexture = intel_render_texture;
+   intel->ctx.Driver.FinishRenderTexture = intel_finish_render_texture;
+   intel->ctx.Driver.ResizeBuffers = intel_resize_buffers;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
new file mode 100644
index 00000000000..9d15582d78c
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -0,0 +1,115 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTEL_FBO_H
+#define INTEL_FBO_H
+
+#include "intel_screen.h"
+
+struct intel_context;
+
+/**
+ * Intel framebuffer, derived from gl_framebuffer.
+ */
+struct intel_framebuffer
+{
+   struct gl_framebuffer Base;
+
+   struct intel_renderbuffer *color_rb[3];
+
+   /* Drawable page flipping state */
+   GLboolean pf_active;
+   GLuint pf_seq;
+   GLint pf_planes;
+   GLint pf_current_page;
+   GLint pf_num_pages;
+
+   /* VBI
+    */
+   GLuint vbl_waited;
+
+   int64_t swap_ust;
+   int64_t swap_missed_ust;
+
+   GLuint swap_count;
+   GLuint swap_missed_count;
+};
+
+
+/**
+ * Intel renderbuffer, derived from gl_renderbuffer.
+ * Note: The PairedDepth and PairedStencil fields use renderbuffer IDs,
+ * not pointers because in some circumstances a deleted renderbuffer could
+ * result in a dangling pointer here.
+ */
+struct intel_renderbuffer
+{
+   struct gl_renderbuffer Base;
+   struct intel_region *region;
+   GLuint pfPitch;              /* possibly paged flipped pitch */
+   GLboolean RenderToTexture;   /* RTT? */
+
+   GLuint PairedDepth;   /**< only used if this is a depth renderbuffer */
+   GLuint PairedStencil; /**< only used if this is a stencil renderbuffer */
+
+   GLuint pf_pending;  /**< sequence number of pending flip */
+
+   GLuint vbl_pending;   /**< vblank sequence number of pending flip */
+
+   uint8_t *span_cache;
+   unsigned long span_cache_offset;
+};
+
+extern struct intel_renderbuffer *intel_renderbuffer(struct gl_renderbuffer
+                                                     *rb);
+
+extern void
+intel_renderbuffer_set_region(struct intel_renderbuffer *irb,
+			      struct intel_region *region);
+
+extern struct intel_renderbuffer *
+intel_create_renderbuffer(GLenum intFormat);
+
+extern void intel_fbo_init(struct intel_context *intel);
+
+
+/* XXX make inline or macro */
+extern struct intel_renderbuffer *intel_get_renderbuffer(struct gl_framebuffer
+                                                         *fb,
+                                                         int attIndex);
+
+extern void intel_flip_renderbuffers(struct intel_framebuffer *intel_fb);
+
+
+/* XXX make inline or macro */
+extern struct intel_region *intel_get_rb_region(struct gl_framebuffer *fb,
+                                                GLuint attIndex);
+
+
+
+
+#endif /* INTEL_FBO_H */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
new file mode 100644
index 00000000000..bf1c3f03f0e
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -0,0 +1,492 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "intel_context.h"
+#include "intel_mipmap_tree.h"
+#include "intel_regions.h"
+#include "intel_chipset.h"
+#include "main/enums.h"
+
+#define FILE_DEBUG_FLAG DEBUG_MIPTREE
+
+static GLenum
+target_to_target(GLenum target)
+{
+   switch (target) {
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
+      return GL_TEXTURE_CUBE_MAP_ARB;
+   default:
+      return target;
+   }
+}
+
+static struct intel_mipmap_tree *
+intel_miptree_create_internal(struct intel_context *intel,
+			      GLenum target,
+			      GLenum internal_format,
+			      GLuint first_level,
+			      GLuint last_level,
+			      GLuint width0,
+			      GLuint height0,
+			      GLuint depth0, GLuint cpp, GLuint compress_byte)
+{
+   GLboolean ok;
+   struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
+
+   DBG("%s target %s format %s level %d..%d\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(target),
+       _mesa_lookup_enum_by_nr(internal_format), first_level, last_level);
+
+   mt->target = target_to_target(target);
+   mt->internal_format = internal_format;
+   mt->first_level = first_level;
+   mt->last_level = last_level;
+   mt->width0 = width0;
+   mt->height0 = height0;
+   mt->depth0 = depth0;
+   mt->cpp = compress_byte ? compress_byte : cpp;
+   mt->compressed = compress_byte ? 1 : 0;
+   mt->refcount = 1; 
+   mt->pitch = 0;
+
+#ifdef I915
+   if (IS_945(intel->intelScreen->deviceID))
+      ok = i945_miptree_layout(intel, mt);
+   else
+      ok = i915_miptree_layout(intel, mt);
+#else
+   ok = brw_miptree_layout(intel, mt);
+#endif
+
+   if (!ok) {
+      free(mt);
+      return NULL;
+   }
+
+   return mt;
+}
+
+struct intel_mipmap_tree *
+intel_miptree_create(struct intel_context *intel,
+		     GLenum target,
+		     GLenum internal_format,
+		     GLuint first_level,
+		     GLuint last_level,
+		     GLuint width0,
+		     GLuint height0,
+		     GLuint depth0, GLuint cpp, GLuint compress_byte)
+{
+   struct intel_mipmap_tree *mt;
+
+   mt = intel_miptree_create_internal(intel, target, internal_format,
+				      first_level, last_level, width0,
+				      height0, depth0, cpp, compress_byte);
+   /*
+    * pitch == 0 || height == 0  indicates the null texture
+    */
+   if (!mt || !mt->pitch || !mt->total_height)
+      return NULL;
+
+   mt->region = intel_region_alloc(intel,
+				   mt->cpp,
+				   mt->pitch,
+				   mt->total_height,
+				   mt->pitch);
+
+   if (!mt->region) {
+       free(mt);
+       return NULL;
+   }
+
+   return mt;
+}
+
+struct intel_mipmap_tree *
+intel_miptree_create_for_region(struct intel_context *intel,
+				GLenum target,
+				GLenum internal_format,
+				GLuint first_level,
+				GLuint last_level,
+				struct intel_region *region,
+				GLuint depth0,
+				GLuint compress_byte)
+{
+   struct intel_mipmap_tree *mt;
+
+   mt = intel_miptree_create_internal(intel, target, internal_format,
+				      first_level, last_level,
+				      region->width, region->height, 1,
+				      region->cpp, compress_byte);
+   if (!mt)
+      return mt;
+#if 0
+   if (mt->pitch != region->pitch) {
+      fprintf(stderr,
+	      "region pitch (%d) doesn't match mipmap tree pitch (%d)\n",
+	      region->pitch, mt->pitch);
+      free(mt);
+      return NULL;
+   }
+#else
+   /* The mipmap tree pitch is aligned to 64 bytes to make sure render
+    * to texture works, but we don't need that for texturing from a
+    * pixmap.  Just override it here. */
+   mt->pitch = region->pitch;
+#endif
+
+   intel_region_reference(&mt->region, region);
+
+   return mt;
+ }
+
+/**
+ * intel_miptree_pitch_align:
+ *
+ * @intel: intel context pointer
+ *
+ * @mt: the miptree to compute pitch alignment for
+ *
+ * @pitch: the natural pitch value
+ *
+ * Given @pitch, compute a larger value which accounts for
+ * any necessary alignment required by the device
+ */
+
+int intel_miptree_pitch_align (struct intel_context *intel,
+			       struct intel_mipmap_tree *mt,
+			       int pitch)
+{
+#ifdef I915
+   GLcontext *ctx = &intel->ctx;
+#endif
+
+   if (!mt->compressed) {
+      int pitch_align;
+
+      if (intel->ttm) {
+	 /* XXX: Align pitch to multiple of 64 bytes for now to allow
+	  * render-to-texture to work in all cases. This should probably be
+	  * replaced at some point by some scheme to only do this when really
+	  * necessary.
+	  */
+	 pitch_align = 64;
+      } else {
+	 pitch_align = 4;
+      }
+
+      pitch = ALIGN(pitch * mt->cpp, pitch_align);
+
+#ifdef I915
+      /* XXX: At least the i915 seems very upset when the pitch is a multiple
+       * of 1024 and sometimes 512 bytes - performance can drop by several
+       * times. Go to the next multiple of the required alignment for now.
+       */
+      if (!(pitch & 511) && 
+	 (pitch + pitch_align) < (1 << ctx->Const.MaxTextureLevels))
+	 pitch += pitch_align;
+#endif
+
+      pitch /= mt->cpp;
+   }
+   return pitch;
+}
+
+void
+intel_miptree_reference(struct intel_mipmap_tree **dst,
+                        struct intel_mipmap_tree *src)
+{
+   src->refcount++;
+   *dst = src;
+   DBG("%s %p refcount now %d\n", __FUNCTION__, src, src->refcount);
+}
+
+void
+intel_miptree_release(struct intel_context *intel,
+                      struct intel_mipmap_tree **mt)
+{
+   if (!*mt)
+      return;
+
+   DBG("%s %p refcount will be %d\n", __FUNCTION__, *mt, (*mt)->refcount - 1);
+   if (--(*mt)->refcount <= 0) {
+      GLuint i;
+
+      DBG("%s deleting %p\n", __FUNCTION__, *mt);
+
+      intel_region_release(&((*mt)->region));
+
+      for (i = 0; i < MAX_TEXTURE_LEVELS; i++)
+         if ((*mt)->level[i].image_offset)
+            free((*mt)->level[i].image_offset);
+
+      free(*mt);
+   }
+   *mt = NULL;
+}
+
+
+
+
+/* Can the image be pulled into a unified mipmap tree.  This mirrors
+ * the completeness test in a lot of ways.
+ *
+ * Not sure whether I want to pass gl_texture_image here.
+ */
+GLboolean
+intel_miptree_match_image(struct intel_mipmap_tree *mt,
+                          struct gl_texture_image *image,
+                          GLuint face, GLuint level)
+{
+   /* Images with borders are never pulled into mipmap trees. 
+    */
+   if (image->Border ||
+       ((image->_BaseFormat == GL_DEPTH_COMPONENT) &&
+        ((image->TexObject->WrapS == GL_CLAMP_TO_BORDER) ||
+         (image->TexObject->WrapT == GL_CLAMP_TO_BORDER)))) 
+      return GL_FALSE;
+
+   if (image->InternalFormat != mt->internal_format ||
+       image->IsCompressed != mt->compressed)
+      return GL_FALSE;
+
+   if (!image->IsCompressed &&
+       !mt->compressed &&
+       image->TexFormat->TexelBytes != mt->cpp)
+      return GL_FALSE;
+
+   /* Test image dimensions against the base level image adjusted for
+    * minification.  This will also catch images not present in the
+    * tree, changed targets, etc.
+    */
+   if (image->Width != mt->level[level].width ||
+       image->Height != mt->level[level].height ||
+       image->Depth != mt->level[level].depth)
+      return GL_FALSE;
+
+   return GL_TRUE;
+}
+
+
+void
+intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
+			     GLuint level,
+			     GLuint nr_images,
+			     GLuint x, GLuint y,
+			     GLuint w, GLuint h, GLuint d)
+{
+   mt->level[level].width = w;
+   mt->level[level].height = h;
+   mt->level[level].depth = d;
+   mt->level[level].level_offset = (x + y * mt->pitch) * mt->cpp;
+   mt->level[level].nr_images = nr_images;
+
+   DBG("%s level %d size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
+       level, w, h, d, x, y, mt->level[level].level_offset);
+
+   /* Not sure when this would happen, but anyway: 
+    */
+   if (mt->level[level].image_offset) {
+      free(mt->level[level].image_offset);
+      mt->level[level].image_offset = NULL;
+   }
+
+   assert(nr_images);
+
+   mt->level[level].image_offset = malloc(nr_images * sizeof(GLuint));
+   mt->level[level].image_offset[0] = 0;
+}
+
+
+
+void
+intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
+			       GLuint level, GLuint img,
+			       GLuint x, GLuint y)
+{
+   if (img == 0 && level == 0)
+      assert(x == 0 && y == 0);
+
+   assert(img < mt->level[level].nr_images);
+
+   mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp;
+
+   DBG("%s level %d img %d pos %d,%d image_offset %x\n",
+       __FUNCTION__, level, img, x, y, mt->level[level].image_offset[img]);
+}
+
+
+/* Although we use the image_offset[] array to store relative offsets
+ * to cube faces, Mesa doesn't know anything about this and expects
+ * each cube face to be treated as a separate image.
+ *
+ * These functions present that view to mesa:
+ */
+const GLuint *
+intel_miptree_depth_offsets(struct intel_mipmap_tree *mt, GLuint level)
+{
+   static const GLuint zero = 0;
+
+   if (mt->target != GL_TEXTURE_3D || mt->level[level].nr_images == 1)
+      return &zero;
+   else
+      return mt->level[level].image_offset;
+}
+
+
+GLuint
+intel_miptree_image_offset(struct intel_mipmap_tree *mt,
+			   GLuint face, GLuint level)
+{
+   if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
+      return (mt->level[level].level_offset +
+	      mt->level[level].image_offset[face]);
+   else
+      return mt->level[level].level_offset;
+}
+
+
+
+/**
+ * Map a teximage in a mipmap tree.
+ * \param row_stride  returns row stride in bytes
+ * \param image_stride  returns image stride in bytes (for 3D textures).
+ * \param image_offsets pointer to array of pixel offsets from the returned
+ *	  pointer to each depth image
+ * \return address of mapping
+ */
+GLubyte *
+intel_miptree_image_map(struct intel_context * intel,
+                        struct intel_mipmap_tree * mt,
+                        GLuint face,
+                        GLuint level,
+                        GLuint * row_stride, GLuint * image_offsets)
+{
+   DBG("%s \n", __FUNCTION__);
+
+   if (row_stride)
+      *row_stride = mt->pitch * mt->cpp;
+
+   if (mt->target == GL_TEXTURE_3D) {
+      int i;
+
+      for (i = 0; i < mt->level[level].depth; i++)
+	 image_offsets[i] = mt->level[level].image_offset[i] / mt->cpp;
+   } else {
+      assert(mt->level[level].depth == 1);
+      assert(mt->target == GL_TEXTURE_CUBE_MAP ||
+	     mt->level[level].image_offset[0] == 0);
+      image_offsets[0] = 0;
+   }
+
+   return (intel_region_map(intel, mt->region) +
+           intel_miptree_image_offset(mt, face, level));
+}
+
+void
+intel_miptree_image_unmap(struct intel_context *intel,
+                          struct intel_mipmap_tree *mt)
+{
+   DBG("%s\n", __FUNCTION__);
+   intel_region_unmap(intel, mt->region);
+}
+
+
+
+/* Upload data for a particular image.
+ */
+void
+intel_miptree_image_data(struct intel_context *intel,
+			 struct intel_mipmap_tree *dst,
+			 GLuint face,
+			 GLuint level,
+			 void *src,
+			 GLuint src_row_pitch,
+			 GLuint src_image_pitch)
+{
+   GLuint depth = dst->level[level].depth;
+   GLuint dst_offset = intel_miptree_image_offset(dst, face, level);
+   const GLuint *dst_depth_offset = intel_miptree_depth_offsets(dst, level);
+   GLuint i;
+   GLuint height = 0;
+
+   DBG("%s: %d/%d\n", __FUNCTION__, face, level);
+   for (i = 0; i < depth; i++) {
+      height = dst->level[level].height;
+      if(dst->compressed)
+	 height = (height + 3) / 4;
+      intel_region_data(intel,
+			dst->region,
+			dst_offset + dst_depth_offset[i], /* dst_offset */
+			0, 0,                             /* dstx, dsty */
+			src,
+			src_row_pitch,
+			0, 0,                             /* source x, y */
+			dst->level[level].width, height); /* width, height */
+
+      src += src_image_pitch * dst->cpp;
+   }
+}
+
+extern GLuint intel_compressed_alignment(GLenum);
+/* Copy mipmap image between trees
+ */
+void
+intel_miptree_image_copy(struct intel_context *intel,
+                         struct intel_mipmap_tree *dst,
+                         GLuint face, GLuint level,
+                         struct intel_mipmap_tree *src)
+{
+   GLuint width = src->level[level].width;
+   GLuint height = src->level[level].height;
+   GLuint depth = src->level[level].depth;
+   GLuint dst_offset = intel_miptree_image_offset(dst, face, level);
+   GLuint src_offset = intel_miptree_image_offset(src, face, level);
+   const GLuint *dst_depth_offset = intel_miptree_depth_offsets(dst, level);
+   const GLuint *src_depth_offset = intel_miptree_depth_offsets(src, level);
+   GLuint i;
+
+   if (dst->compressed) {
+       GLuint alignment = intel_compressed_alignment(dst->internal_format);
+       height = (height + 3) / 4;
+       width = ((width + alignment - 1) & ~(alignment - 1));
+   }
+
+   for (i = 0; i < depth; i++) {
+      intel_region_copy(intel,
+                        dst->region, dst_offset + dst_depth_offset[i],
+                        0,
+                        0,
+                        src->region, src_offset + src_depth_offset[i],
+                        0, 0, width, height);
+   }
+
+}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
new file mode 100644
index 00000000000..c9537dbb9a4
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -0,0 +1,226 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTEL_MIPMAP_TREE_H
+#define INTEL_MIPMAP_TREE_H
+
+#include "intel_regions.h"
+
+/* A layer on top of the intel_regions code which adds:
+ *
+ * - Code to size and layout a region to hold a set of mipmaps.
+ * - Query to determine if a new image fits in an existing tree.
+ * - More refcounting 
+ *     - maybe able to remove refcounting from intel_region?
+ * - ?
+ *
+ * The fixed mipmap layout of intel hardware where one offset
+ * specifies the position of all images in a mipmap hierachy
+ * complicates the implementation of GL texture image commands,
+ * compared to hardware where each image is specified with an
+ * independent offset.
+ *
+ * In an ideal world, each texture object would be associated with a
+ * single bufmgr buffer or 2d intel_region, and all the images within
+ * the texture object would slot into the tree as they arrive.  The
+ * reality can be a little messier, as images can arrive from the user
+ * with sizes that don't fit in the existing tree, or in an order
+ * where the tree layout cannot be guessed immediately.  
+ * 
+ * This structure encodes an idealized mipmap tree.  The GL image
+ * commands build these where possible, otherwise store the images in
+ * temporary system buffers.
+ */
+
+
+/**
+ * Describes the location of each texture image within a texture region.
+ */
+struct intel_mipmap_level
+{
+   /**
+    * Byte offset to the base of this level.
+    *
+    * This is used for mipmap levels of 1D/2D/3D textures.  However, CUBE
+    * layouts spread images around the whole tree, so the level offset is
+    * always zero in that case.
+    */
+   GLuint level_offset;
+   GLuint width;
+   GLuint height;
+   /** Depth of the mipmap at this level: 1 for 1D/2D/CUBE, n for 3D. */
+   GLuint depth;
+   /** Number of images at this level: 1 for 1D/2D, 6 for CUBE, depth for 3D */
+   GLuint nr_images;
+
+   /**
+    * Byte offset from level_offset to the image for each cube face or depth
+    * level.
+    *
+    * Pretty much have to accept that hardware formats
+    * are going to be so diverse that there is no unified way to
+    * compute the offsets of depth/cube images within a mipmap level,
+    * so have to store them as a lookup table.
+    */
+   GLuint *image_offset;
+};
+
+struct intel_mipmap_tree
+{
+   /* Effectively the key:
+    */
+   GLenum target;
+   GLenum internal_format;
+
+   GLuint first_level;
+   GLuint last_level;
+
+   GLuint width0, height0, depth0; /**< Level zero image dimensions */
+   GLuint cpp;
+   GLboolean compressed;
+
+   /* Derived from the above:
+    */
+   GLuint pitch;
+   GLuint depth_pitch;          /* per-image on i945? */
+   GLuint total_height;
+
+   /* Includes image offset tables:
+    */
+   struct intel_mipmap_level level[MAX_TEXTURE_LEVELS];
+
+   /* The data is held here:
+    */
+   struct intel_region *region;
+
+   /* These are also refcounted:
+    */
+   GLuint refcount;
+};
+
+
+
+struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
+                                               GLenum target,
+                                               GLenum internal_format,
+                                               GLuint first_level,
+                                               GLuint last_level,
+                                               GLuint width0,
+                                               GLuint height0,
+                                               GLuint depth0,
+                                               GLuint cpp,
+                                               GLuint compress_byte);
+
+struct intel_mipmap_tree *
+intel_miptree_create_for_region(struct intel_context *intel,
+				GLenum target,
+				GLenum internal_format,
+				GLuint first_level,
+				GLuint last_level,
+				struct intel_region *region,
+				GLuint depth0,
+				GLuint compress_byte);
+
+int intel_miptree_pitch_align (struct intel_context *intel,
+			       struct intel_mipmap_tree *mt,
+			       int pitch);
+
+void intel_miptree_reference(struct intel_mipmap_tree **dst,
+                             struct intel_mipmap_tree *src);
+
+void intel_miptree_release(struct intel_context *intel,
+                           struct intel_mipmap_tree **mt);
+
+/* Check if an image fits an existing mipmap tree layout
+ */
+GLboolean intel_miptree_match_image(struct intel_mipmap_tree *mt,
+                                    struct gl_texture_image *image,
+                                    GLuint face, GLuint level);
+
+/* Return a pointer to an image within a tree.  Return image stride as
+ * well.
+ */
+GLubyte *intel_miptree_image_map(struct intel_context *intel,
+                                 struct intel_mipmap_tree *mt,
+                                 GLuint face,
+                                 GLuint level,
+                                 GLuint * row_stride, GLuint * image_stride);
+
+void intel_miptree_image_unmap(struct intel_context *intel,
+                               struct intel_mipmap_tree *mt);
+
+
+/* Return the linear offset of an image relative to the start of the
+ * tree:
+ */
+GLuint intel_miptree_image_offset(struct intel_mipmap_tree *mt,
+                                  GLuint face, GLuint level);
+
+/* Return pointers to each 2d slice within an image.  Indexed by depth
+ * value.
+ */
+const GLuint *intel_miptree_depth_offsets(struct intel_mipmap_tree *mt,
+                                          GLuint level);
+
+
+void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
+                                  GLuint level,
+                                  GLuint nr_images,
+                                  GLuint x, GLuint y,
+                                  GLuint w, GLuint h, GLuint d);
+
+void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
+                                    GLuint level,
+                                    GLuint img, GLuint x, GLuint y);
+
+
+/* Upload an image into a tree
+ */
+void intel_miptree_image_data(struct intel_context *intel,
+                              struct intel_mipmap_tree *dst,
+                              GLuint face,
+                              GLuint level,
+                              void *src,
+                              GLuint src_row_pitch, GLuint src_image_pitch);
+
+/* Copy an image between two trees
+ */
+void intel_miptree_image_copy(struct intel_context *intel,
+                              struct intel_mipmap_tree *dst,
+                              GLuint face, GLuint level,
+                              struct intel_mipmap_tree *src);
+
+/* i915_mipmap_tree.c:
+ */
+GLboolean i915_miptree_layout(struct intel_context *intel,
+			      struct intel_mipmap_tree *mt);
+GLboolean i945_miptree_layout(struct intel_context *intel,
+			      struct intel_mipmap_tree *mt);
+GLboolean brw_miptree_layout(struct intel_context *intel,
+			     struct intel_mipmap_tree *mt);
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c
new file mode 100644
index 00000000000..5702ad9bb57
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_pixel.c
@@ -0,0 +1,183 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portionsalloc
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/enums.h"
+#include "main/state.h"
+#include "swrast/swrast.h"
+
+#include "intel_context.h"
+#include "intel_pixel.h"
+#include "intel_regions.h"
+
+#define FILE_DEBUG_FLAG DEBUG_PIXEL
+
+static GLenum
+effective_func(GLenum func, GLboolean src_alpha_is_one)
+{
+   if (src_alpha_is_one) {
+      if (func == GL_SRC_ALPHA)
+	 return GL_ONE;
+      if (func == GL_ONE_MINUS_SRC_ALPHA)
+	 return GL_ZERO;
+   }
+
+   return func;
+}
+
+/**
+ * Check if any fragment operations are in effect which might effect
+ * glDraw/CopyPixels.
+ */
+GLboolean
+intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one)
+{
+   if (ctx->NewState)
+      _mesa_update_state(ctx);
+
+   if (ctx->FragmentProgram._Enabled) {
+      DBG("fallback due to fragment program\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Color.BlendEnabled &&
+       (effective_func(ctx->Color.BlendSrcRGB, src_alpha_is_one) != GL_ONE ||
+	effective_func(ctx->Color.BlendDstRGB, src_alpha_is_one) != GL_ZERO ||
+	ctx->Color.BlendEquationRGB != GL_FUNC_ADD ||
+	effective_func(ctx->Color.BlendSrcA, src_alpha_is_one) != GL_ONE ||
+	effective_func(ctx->Color.BlendDstA, src_alpha_is_one) != GL_ZERO ||
+	ctx->Color.BlendEquationA != GL_FUNC_ADD)) {
+      DBG("fallback due to blend\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Texture._EnabledUnits) {
+      DBG("fallback due to texturing\n");
+      return GL_FALSE;
+   }
+
+   if (!(ctx->Color.ColorMask[0] &&
+	 ctx->Color.ColorMask[1] &&
+	 ctx->Color.ColorMask[2] &&
+	 ctx->Color.ColorMask[3])) {
+      DBG("fallback due to color masking\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Color.AlphaEnabled) {
+      DBG("fallback due to alpha\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Depth.Test) {
+      DBG("fallback due to depth test\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Fog.Enabled) {
+      DBG("fallback due to fog\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->_ImageTransferState) {
+      DBG("fallback due to image transfer\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->Stencil.Enabled) {
+      DBG("fallback due to image stencil\n");
+      return GL_FALSE;
+   }
+
+   if (ctx->RenderMode != GL_RENDER) {
+      DBG("fallback due to render mode\n");
+      return GL_FALSE;
+   }
+
+   return GL_TRUE;
+}
+
+
+GLboolean
+intel_check_meta_tex_fragment_ops(GLcontext * ctx)
+{
+   if (ctx->NewState)
+      _mesa_update_state(ctx);
+
+   /* Some of _ImageTransferState (scale, bias) could be done with
+    * fragment programs on i915.
+    */
+   return !(ctx->_ImageTransferState || ctx->Fog.Enabled ||     /* not done yet */
+            ctx->Texture._EnabledUnits || ctx->FragmentProgram._Enabled);
+}
+
+/* The intel_region struct doesn't really do enough to capture the
+ * format of the pixels in the region.  For now this code assumes that
+ * the region is a display surface and hence is either ARGB8888 or
+ * RGB565.
+ * XXX FBO: If we'd pass in the intel_renderbuffer instead of region, we'd
+ * know the buffer's pixel format.
+ *
+ * \param format  as given to glDraw/ReadPixels
+ * \param type  as given to glDraw/ReadPixels
+ */
+GLboolean
+intel_check_blit_format(struct intel_region * region,
+                        GLenum format, GLenum type)
+{
+   if (region->cpp == 4 &&
+       (type == GL_UNSIGNED_INT_8_8_8_8_REV ||
+        type == GL_UNSIGNED_BYTE) && format == GL_BGRA) {
+      return GL_TRUE;
+   }
+
+   if (region->cpp == 2 &&
+       type == GL_UNSIGNED_SHORT_5_6_5_REV && format == GL_BGR) {
+      return GL_TRUE;
+   }
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      fprintf(stderr, "%s: bad format for blit (cpp %d, type %s format %s)\n",
+              __FUNCTION__, region->cpp,
+              _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format));
+
+   return GL_FALSE;
+}
+
+
+void
+intelInitPixelFuncs(struct dd_function_table *functions)
+{
+   functions->Accum = _swrast_Accum;
+   if (!getenv("INTEL_NO_BLIT")) {
+      functions->Bitmap = intelBitmap;
+      functions->CopyPixels = intelCopyPixels;
+      functions->DrawPixels = intelDrawPixels;
+#ifdef I915
+      functions->ReadPixels = intelReadPixels;
+#endif
+   }
+}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel.h b/src/mesa/drivers/dri/intel/intel_pixel.h
new file mode 100644
index 00000000000..6fa6effe835
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_pixel.h
@@ -0,0 +1,70 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTEL_PIXEL_H
+#define INTEL_PIXEL_H
+
+#include "main/mtypes.h"
+
+void intelInitPixelFuncs(struct dd_function_table *functions);
+
+GLboolean intel_check_blit_fragment_ops(GLcontext * ctx,
+					GLboolean src_alpha_is_one);
+
+GLboolean intel_check_meta_tex_fragment_ops(GLcontext * ctx);
+
+GLboolean intel_check_blit_format(struct intel_region *region,
+                                  GLenum format, GLenum type);
+
+
+void intelReadPixels(GLcontext * ctx,
+                     GLint x, GLint y,
+                     GLsizei width, GLsizei height,
+                     GLenum format, GLenum type,
+                     const struct gl_pixelstore_attrib *pack,
+                     GLvoid * pixels);
+
+void intelDrawPixels(GLcontext * ctx,
+                     GLint x, GLint y,
+                     GLsizei width, GLsizei height,
+                     GLenum format,
+                     GLenum type,
+                     const struct gl_pixelstore_attrib *unpack,
+                     const GLvoid * pixels);
+
+void intelCopyPixels(GLcontext * ctx,
+                     GLint srcx, GLint srcy,
+                     GLsizei width, GLsizei height,
+                     GLint destx, GLint desty, GLenum type);
+
+void intelBitmap(GLcontext * ctx,
+		 GLint x, GLint y,
+		 GLsizei width, GLsizei height,
+		 const struct gl_pixelstore_attrib *unpack,
+		 const GLubyte * pixels);
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
new file mode 100644
index 00000000000..e3ce1494e5d
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -0,0 +1,358 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portionsalloc
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/colormac.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/bufferobj.h"
+#include "swrast/swrast.h"
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_blit.h"
+#include "intel_regions.h"
+#include "intel_buffer_objects.h"
+#include "intel_buffers.h"
+#include "intel_pixel.h"
+#include "intel_reg.h"
+
+
+#define FILE_DEBUG_FLAG DEBUG_PIXEL
+
+
+/* Unlike the other intel_pixel_* functions, the expectation here is
+ * that the incoming data is not in a PBO.  With the XY_TEXT blit
+ * method, there's no benefit haveing it in a PBO, but we could
+ * implement a path based on XY_MONO_SRC_COPY_BLIT which might benefit
+ * PBO bitmaps.  I think they are probably pretty rare though - I
+ * wonder if Xgl uses them?
+ */
+static const GLubyte *map_pbo( GLcontext *ctx,
+			       GLsizei width, GLsizei height,
+			       const struct gl_pixelstore_attrib *unpack,
+			       const GLubyte *bitmap )
+{
+   GLubyte *buf;
+
+   if (!_mesa_validate_pbo_access(2, unpack, width, height, 1,
+				  GL_COLOR_INDEX, GL_BITMAP,
+				  (GLvoid *) bitmap)) {
+      _mesa_error(ctx, GL_INVALID_OPERATION,"glBitmap(invalid PBO access)");
+      return NULL;
+   }
+
+   buf = (GLubyte *) ctx->Driver.MapBuffer(ctx, GL_PIXEL_UNPACK_BUFFER_EXT,
+					   GL_READ_ONLY_ARB,
+					   unpack->BufferObj);
+   if (!buf) {
+      _mesa_error(ctx, GL_INVALID_OPERATION, "glBitmap(PBO is mapped)");
+      return NULL;
+   }
+
+   return ADD_POINTERS(buf, bitmap);
+}
+
+static GLboolean test_bit( const GLubyte *src,
+			    GLuint bit )
+{
+   return (src[bit/8] & (1<<(bit % 8))) ? 1 : 0;
+}
+
+static void set_bit( GLubyte *dest,
+			  GLuint bit )
+{
+   dest[bit/8] |= 1 << (bit % 8);
+}
+
+/* Extract a rectangle's worth of data from the bitmap.  Called
+ * per-cliprect.
+ */
+static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
+			      const struct gl_pixelstore_attrib *unpack,
+			      const GLubyte *bitmap,
+			      GLuint x, GLuint y, 
+			      GLuint w, GLuint h,
+			      GLubyte *dest,
+			      GLuint row_align,
+			      GLboolean invert)
+{
+   GLuint src_offset = (x + unpack->SkipPixels) & 0x7;
+   GLuint mask = unpack->LsbFirst ? 0 : 7;
+   GLuint bit = 0;
+   GLint row, col;
+   GLint first, last;
+   GLint incr;
+   GLuint count = 0;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n",
+		   __FUNCTION__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask);
+
+   if (invert) {
+      first = h-1;
+      last = 0;
+      incr = -1;
+   }
+   else {
+      first = 0;
+      last = h-1;
+      incr = 1;
+   }
+
+   /* Require that dest be pre-zero'd.
+    */
+   for (row = first; row != (last+incr); row += incr) {
+      const GLubyte *rowsrc = _mesa_image_address2d(unpack, bitmap, 
+						    width, height, 
+						    GL_COLOR_INDEX, GL_BITMAP, 
+						    y + row, x);
+
+      for (col = 0; col < w; col++, bit++) {
+	 if (test_bit(rowsrc, (col + src_offset) ^ mask)) {
+	    set_bit(dest, bit ^ 7);
+	    count++;
+	 }
+      }
+
+      if (row_align)
+	 bit = ALIGN(bit, row_align);
+   }
+
+   return count;
+}
+
+
+
+
+/*
+ * Render a bitmap.
+ */
+static GLboolean
+do_blit_bitmap( GLcontext *ctx, 
+		GLint dstx, GLint dsty,
+		GLsizei width, GLsizei height,
+		const struct gl_pixelstore_attrib *unpack,
+		const GLubyte *bitmap )
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_region *dst = intel_drawbuf_region(intel);
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   GLfloat tmpColor[4];
+   GLubyte ubcolor[4];
+   GLuint color8888, color565;
+   unsigned int num_cliprects;
+   drm_clip_rect_t *cliprects;
+   int x_off, y_off;
+
+   if (!dst)
+       return GL_FALSE;
+
+   if (unpack->BufferObj->Name) {
+      bitmap = map_pbo(ctx, width, height, unpack, bitmap);
+      if (bitmap == NULL)
+	 return GL_TRUE;	/* even though this is an error, we're done */
+   }
+
+   COPY_4V(tmpColor, ctx->Current.RasterColor);
+
+   if (NEED_SECONDARY_COLOR(ctx)) {
+       ADD_3V(tmpColor, tmpColor, ctx->Current.RasterSecondaryColor);
+   }
+
+   UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[0], tmpColor[0]);
+   UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[1], tmpColor[1]);
+   UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[2], tmpColor[2]);
+   UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);
+
+   color8888 = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1], ubcolor[2], ubcolor[3]);
+   color565 = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
+
+   if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
+      return GL_FALSE;
+
+   LOCK_HARDWARE(intel);
+
+   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+   if (num_cliprects != 0) {
+      drm_clip_rect_t dest_rect;
+      GLint srcx = 0, srcy = 0;
+      GLuint i;
+      GLint orig_dstx = dstx;
+      GLint orig_dsty = dsty;
+
+      /* Clip to buffer bounds and scissor. */
+      if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
+				fb->_Xmax, fb->_Ymax,
+				&dstx, &dsty, &width, &height))
+            goto out;
+
+      /* Convert from GL to hardware coordinates.  Transform original points
+       * along with it so that we can look at cliprects in hw coordinates and
+       * map back to points in the source space.
+       */
+      if (fb->Name == 0) {
+	 /* bitmap to a system framebuffer */
+	 dstx = x_off + dstx;
+	 dsty = y_off + (fb->Height - dsty - height);
+	 orig_dstx = x_off + orig_dstx;
+	 orig_dsty = y_off + (fb->Height - orig_dsty - height);
+      } else {
+	 /* bitmap to a user framebuffer object */
+	 dstx = x_off + dstx;
+	 dsty = y_off + dsty;
+	 orig_dstx = x_off + orig_dstx;
+	 orig_dsty = y_off + orig_dsty;
+      }
+
+      dest_rect.x1 = dstx;
+      dest_rect.y1 = dsty;
+      dest_rect.x2 = dstx + width;
+      dest_rect.y2 = dsty + height;
+
+      for (i = 0; i < num_cliprects; i++) {
+         drm_clip_rect_t rect;
+	 int box_w, box_h;
+	 GLint px, py;
+	 GLuint stipple[32];  
+
+         if (!intel_intersect_cliprects(&rect, &dest_rect, &cliprects[i]))
+            continue;
+
+	 /* Now go back to GL coordinates to figure out what subset of
+	  * the bitmap we are uploading for this cliprect:
+	  */
+	 box_w = rect.x2 - rect.x1;
+	 box_h = rect.y2 - rect.y1;
+	 srcx = rect.x1 - orig_dstx;
+	 srcy = rect.y1 - orig_dsty;
+
+#define DY 32
+#define DX 32
+
+	 /* Then, finally, chop it all into chunks that can be
+	  * digested by hardware:
+	  */
+	 for (py = 0; py < box_h; py += DY) { 
+	    for (px = 0; px < box_w; px += DX) { 
+	       int h = MIN2(DY, box_h - py);
+	       int w = MIN2(DX, box_w - px); 
+	       GLuint sz = ALIGN(ALIGN(w,8) * h, 64)/8;
+	       GLenum logic_op = ctx->Color.ColorLogicOpEnabled ?
+		  ctx->Color.LogicOp : GL_COPY;
+
+	       assert(sz <= sizeof(stipple));
+	       memset(stipple, 0, sz);
+
+	       /* May need to adjust this when padding has been introduced in
+		* sz above:
+		*/
+	       if (get_bitmap_rect(width, height, unpack, 
+				   bitmap,
+				   srcx + px, srcy + py, w, h,
+				   (GLubyte *)stipple,
+				   8,
+				   fb->Name == 0 ? GL_TRUE : GL_FALSE) == 0)
+		  continue;
+
+	       /* 
+		*/
+	       intelEmitImmediateColorExpandBlit( intel,
+						  dst->cpp,
+						  (GLubyte *)stipple, 
+						  sz,
+						  (dst->cpp == 2) ? color565 : color8888,
+						  dst->pitch,
+						  dst->buffer,
+						  0,
+						  dst->tiling,
+						  rect.x1 + px,
+						  rect.y2 - (py + h),
+						  w, h,
+						  logic_op);
+	    } 
+	 } 
+      }
+   }
+out:
+   UNLOCK_HARDWARE(intel);
+
+   if (INTEL_DEBUG & DEBUG_SYNC)
+      intel_batchbuffer_flush(intel->batch);
+
+   if (unpack->BufferObj->Name) {
+      /* done with PBO so unmap it now */
+      ctx->Driver.UnmapBuffer(ctx, GL_PIXEL_UNPACK_BUFFER_EXT,
+                              unpack->BufferObj);
+   }
+
+   return GL_TRUE;
+}
+
+
+
+
+
+/* There are a large number of possible ways to implement bitmap on
+ * this hardware, most of them have some sort of drawback.  Here are a
+ * few that spring to mind:
+ * 
+ * Blit:
+ *    - XY_MONO_SRC_BLT_CMD
+ *         - use XY_SETUP_CLIP_BLT for cliprect clipping.
+ *    - XY_TEXT_BLT
+ *    - XY_TEXT_IMMEDIATE_BLT
+ *         - blit per cliprect, subject to maximum immediate data size.
+ *    - XY_COLOR_BLT 
+ *         - per pixel or run of pixels
+ *    - XY_PIXEL_BLT
+ *         - good for sparse bitmaps
+ *
+ * 3D engine:
+ *    - Point per pixel
+ *    - Translate bitmap to an alpha texture and render as a quad
+ *    - Chop bitmap up into 32x32 squares and render w/polygon stipple.
+ */
+void
+intelBitmap(GLcontext * ctx,
+	    GLint x, GLint y,
+	    GLsizei width, GLsizei height,
+	    const struct gl_pixelstore_attrib *unpack,
+	    const GLubyte * pixels)
+{
+   if (do_blit_bitmap(ctx, x, y, width, height,
+                          unpack, pixels))
+      return;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s: fallback to swrast\n", __FUNCTION__);
+
+   _swrast_Bitmap(ctx, x, y, width, height, unpack, pixels);
+}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
new file mode 100644
index 00000000000..61d1296c26c
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -0,0 +1,394 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/state.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "swrast/swrast.h"
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_buffers.h"
+#include "intel_blit.h"
+#include "intel_regions.h"
+#include "intel_pixel.h"
+
+#define FILE_DEBUG_FLAG DEBUG_PIXEL
+
+static struct intel_region *
+copypix_src_region(struct intel_context *intel, GLenum type)
+{
+   switch (type) {
+   case GL_COLOR:
+      return intel_readbuf_region(intel);
+   case GL_DEPTH:
+      /* Don't think this is really possible execpt at 16bpp, when we have no stencil.
+       */
+      if (intel->depth_region && intel->depth_region->cpp == 2)
+         return intel->depth_region;
+   case GL_STENCIL:
+      /* Don't think this is really possible. 
+       */
+      break;
+   case GL_DEPTH_STENCIL_EXT:
+      /* Does it matter whether it is stencil/depth or depth/stencil?
+       */
+      return intel->depth_region;
+   default:
+      break;
+   }
+
+   return NULL;
+}
+
+
+/**
+ * Check if any fragment operations are in effect which might effect
+ * glCopyPixels.  Differs from intel_check_blit_fragment_ops in that
+ * we allow Scissor.
+ */
+static GLboolean
+intel_check_copypixel_blit_fragment_ops(GLcontext * ctx)
+{
+   if (ctx->NewState)
+      _mesa_update_state(ctx);
+
+   /* Could do logicop with the blitter: 
+    */
+   return !(ctx->_ImageTransferState ||
+            ctx->Color.AlphaEnabled ||
+            ctx->Depth.Test ||
+            ctx->Fog.Enabled ||
+            ctx->Stencil.Enabled ||
+            !ctx->Color.ColorMask[0] ||
+            !ctx->Color.ColorMask[1] ||
+            !ctx->Color.ColorMask[2] ||
+            !ctx->Color.ColorMask[3] ||
+            ctx->Texture._EnabledUnits ||
+	    ctx->FragmentProgram._Enabled ||
+	    ctx->Color.BlendEnabled);
+}
+
+#ifdef I915
+/* Doesn't work for overlapping regions.  Could do a double copy or
+ * just fallback.
+ */
+static GLboolean
+do_texture_copypixels(GLcontext * ctx,
+                      GLint srcx, GLint srcy,
+                      GLsizei width, GLsizei height,
+                      GLint dstx, GLint dsty, GLenum type)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_region *dst = intel_drawbuf_region(intel);
+   struct intel_region *src = copypix_src_region(intel, type);
+   GLenum src_format;
+   GLenum src_type;
+
+   DBG("%s %d,%d %dx%d --> %d,%d\n", __FUNCTION__, 
+       srcx, srcy, width, height, dstx, dsty);
+
+   if (!src || !dst || type != GL_COLOR)
+      return GL_FALSE;
+
+   /* Can't handle overlapping regions.  Don't have sufficient control
+    * over rasterization to pull it off in-place.  Punt on these for
+    * now.
+    * 
+    * XXX: do a copy to a temporary. 
+    */
+   if (src->buffer == dst->buffer) {
+      drm_clip_rect_t srcbox;
+      drm_clip_rect_t dstbox;
+      drm_clip_rect_t tmp;
+
+      srcbox.x1 = srcx;
+      srcbox.y1 = srcy;
+      srcbox.x2 = srcx + width;
+      srcbox.y2 = srcy + height;
+
+      if (ctx->Pixel.ZoomX > 0) {
+	 dstbox.x1 = dstx;
+	 dstbox.x2 = dstx + width * ctx->Pixel.ZoomX;
+      } else {
+	 dstbox.x1 = dstx + width * ctx->Pixel.ZoomX;
+	 dstbox.x2 = dstx;
+      }
+      if (ctx->Pixel.ZoomY > 0) {
+	 dstbox.y1 = dsty;
+	 dstbox.y2 = dsty + height * ctx->Pixel.ZoomY;
+      } else {
+	 dstbox.y1 = dsty + height * ctx->Pixel.ZoomY;
+	 dstbox.y2 = dsty;
+      }
+
+      DBG("src %d,%d %d,%d\n", srcbox.x1, srcbox.y1, srcbox.x2, srcbox.y2);
+      DBG("dst %d,%d %d,%d (%dx%d) (%f,%f)\n", dstbox.x1, dstbox.y1, dstbox.x2, dstbox.y2,
+	  width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY);
+
+      if (intel_intersect_cliprects(&tmp, &srcbox, &dstbox)) {
+         DBG("%s: regions overlap\n", __FUNCTION__);
+         return GL_FALSE;
+      }
+   }
+
+   intelFlush(&intel->ctx);
+
+   intel->vtbl.install_meta_state(intel);
+
+   /* Is this true?  Also will need to turn depth testing on according
+    * to state:
+    */
+   intel->vtbl.meta_no_stencil_write(intel);
+   intel->vtbl.meta_no_depth_write(intel);
+
+   /* Set the 3d engine to draw into the destination region:
+    */
+   intel->vtbl.meta_draw_region(intel, dst, intel->depth_region);
+
+   intel->vtbl.meta_import_pixel_state(intel);
+
+   if (src->cpp == 2) {
+      src_format = GL_RGB;
+      src_type = GL_UNSIGNED_SHORT_5_6_5;
+   }
+   else {
+      src_format = GL_BGRA;
+      src_type = GL_UNSIGNED_BYTE;
+   }
+
+   /* Set the frontbuffer up as a large rectangular texture.
+    */
+   if (!intel->vtbl.meta_tex_rect_source(intel, src->buffer, 0,
+                                         src->pitch,
+                                         src->height, src_format, src_type)) {
+      intel->vtbl.leave_meta_state(intel);
+      return GL_FALSE;
+   }
+
+
+   intel->vtbl.meta_texture_blend_replace(intel);
+
+   LOCK_HARDWARE(intel);
+
+   if (intel->driDrawable->numClipRects) {
+      __DRIdrawablePrivate *dPriv = intel->driDrawable;
+
+
+      srcy = dPriv->h - srcy - height;  /* convert from gl to hardware coords */
+
+      srcx += dPriv->x;
+      srcy += dPriv->y;
+
+      /* Clip against the source region.  This is the only source
+       * clipping we do.  XXX: Just set the texcord wrap mode to clamp
+       * or similar.
+       *
+       */
+      if (0) {
+         GLint orig_x = srcx;
+         GLint orig_y = srcy;
+
+         if (!_mesa_clip_to_region(0, 0, src->pitch, src->height,
+                                   &srcx, &srcy, &width, &height))
+            goto out;
+
+         dstx += srcx - orig_x;
+         dsty += (srcy - orig_y) * ctx->Pixel.ZoomY;
+      }
+
+      /* Just use the regular cliprect mechanism...  Does this need to
+       * even hold the lock???
+       */
+      intel->vtbl.meta_draw_quad(intel,
+				 dstx,
+				 dstx + width * ctx->Pixel.ZoomX,
+				 dPriv->h - (dsty + height * ctx->Pixel.ZoomY),
+				 dPriv->h - (dsty), 0, /* XXX: what z value? */
+				 0x00ff00ff,
+				 srcx, srcx + width, srcy, srcy + height);
+
+    out:
+      intel->vtbl.leave_meta_state(intel);
+      intel_batchbuffer_emit_mi_flush(intel->batch);
+   }
+   UNLOCK_HARDWARE(intel);
+
+   DBG("%s: success\n", __FUNCTION__);
+   return GL_TRUE;
+}
+#endif /* I915 */
+
+
+/**
+ * CopyPixels with the blitter.  Don't support zooming, pixel transfer, etc.
+ */
+static GLboolean
+do_blit_copypixels(GLcontext * ctx,
+                   GLint srcx, GLint srcy,
+                   GLsizei width, GLsizei height,
+                   GLint dstx, GLint dsty, GLenum type)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_region *dst = intel_drawbuf_region(intel);
+   struct intel_region *src = copypix_src_region(intel, type);
+   struct gl_framebuffer *fb = ctx->DrawBuffer;
+   struct gl_framebuffer *read_fb = ctx->ReadBuffer;
+   unsigned int num_cliprects;
+   drm_clip_rect_t *cliprects;
+   int x_off, y_off;
+
+   /* Copypixels can be more than a straight copy.  Ensure all the
+    * extra operations are disabled:
+    */
+   if (!intel_check_copypixel_blit_fragment_ops(ctx) ||
+       ctx->Pixel.ZoomX != 1.0F || ctx->Pixel.ZoomY != 1.0F)
+      return GL_FALSE;
+
+   if (!src || !dst)
+      return GL_FALSE;
+
+
+
+   intelFlush(&intel->ctx);
+
+   LOCK_HARDWARE(intel);
+
+   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+   if (num_cliprects != 0) {
+      GLint delta_x;
+      GLint delta_y;
+      GLint orig_dstx;
+      GLint orig_dsty;
+      GLint orig_srcx;
+      GLint orig_srcy;
+      GLuint i;
+
+      /* XXX: We fail to handle different inversion between read and draw framebuffer. */
+
+      /* Clip to destination buffer. */
+      orig_dstx = dstx;
+      orig_dsty = dsty;
+      if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
+				fb->_Xmax, fb->_Ymax,
+				&dstx, &dsty, &width, &height))
+	 goto out;
+      /* Adjust src coords for our post-clipped destination origin */
+      srcx += dstx - orig_dstx;
+      srcy += dsty - orig_dsty;
+
+      /* Clip to source buffer. */
+      orig_srcx = srcx;
+      orig_srcy = srcy;
+      if (!_mesa_clip_to_region(read_fb->_Xmin, read_fb->_Ymin,
+				read_fb->_Xmax, read_fb->_Ymax,
+				&srcx, &srcy, &width, &height))
+	 goto out;
+      /* Adjust dst coords for our post-clipped source origin */
+      dstx += srcx - orig_srcx;
+      dsty += srcy - orig_srcy;
+
+      /* Convert from GL to hardware coordinates:
+       */
+      if (fb->Name == 0) {
+	 /* copypixels to a system framebuffer */
+	 dstx = x_off + dstx;
+	 dsty = y_off + (fb->Height - dsty - height);
+      } else {
+	 /* copypixels to a user framebuffer object */
+	 dstx = x_off + dstx;
+	 dsty = y_off + dsty;
+      }
+
+      /* Flip source Y if it's a system framebuffer. */
+      if (read_fb->Name == 0) {
+	 srcx = intel->driReadDrawable->x + srcx;
+	 srcy = intel->driReadDrawable->y + (fb->Height - srcy - height);
+      }
+
+      delta_x = srcx - dstx;
+      delta_y = srcy - dsty;
+      /* Could do slightly more clipping: Eg, take the intersection of
+       * the destination cliprects and the read drawable cliprects
+       *
+       * This code will not overwrite other windows, but will
+       * introduce garbage when copying from obscured window regions.
+       */
+      for (i = 0; i < num_cliprects; i++) {
+	 GLint clip_x = dstx;
+	 GLint clip_y = dsty;
+	 GLint clip_w = width;
+	 GLint clip_h = height;
+
+         if (!_mesa_clip_to_region(cliprects[i].x1, cliprects[i].y1,
+				   cliprects[i].x2, cliprects[i].y2,
+				   &clip_x, &clip_y, &clip_w, &clip_h))
+            continue;
+
+         intelEmitCopyBlit(intel, dst->cpp,
+			   src->pitch, src->buffer, 0, src->tiling,
+			   dst->pitch, dst->buffer, 0, dst->tiling,
+			   clip_x + delta_x, clip_y + delta_y, /* srcx, srcy */
+			   clip_x, clip_y, /* dstx, dsty */
+			   clip_w, clip_h,
+			   ctx->Color.ColorLogicOpEnabled ?
+			   ctx->Color.LogicOp : GL_COPY);
+      }
+   }
+out:
+   UNLOCK_HARDWARE(intel);
+
+   DBG("%s: success\n", __FUNCTION__);
+   return GL_TRUE;
+}
+
+
+void
+intelCopyPixels(GLcontext * ctx,
+                GLint srcx, GLint srcy,
+                GLsizei width, GLsizei height,
+                GLint destx, GLint desty, GLenum type)
+{
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      fprintf(stderr, "%s\n", __FUNCTION__);
+
+   if (do_blit_copypixels(ctx, srcx, srcy, width, height, destx, desty, type))
+      return;
+
+#ifdef I915
+   if (do_texture_copypixels(ctx, srcx, srcy, width, height, destx, desty, type))
+      return;
+#endif
+
+   DBG("fallback to _swrast_CopyPixels\n");
+
+   _swrast_CopyPixels(ctx, srcx, srcy, width, height, destx, desty, type);
+}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
new file mode 100644
index 00000000000..8ebbc95a1d0
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
@@ -0,0 +1,430 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portionsalloc
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/bufferobj.h"
+#include "main/teximage.h"
+#include "main/texenv.h"
+#include "main/texobj.h"
+#include "main/texstate.h"
+#include "main/texparam.h"
+#include "main/matrix.h"
+#include "main/varray.h"
+#include "main/attrib.h"
+#include "main/enable.h"
+#include "main/buffers.h"
+#include "main/fbobject.h"
+#include "main/renderbuffer.h"
+#include "main/depth.h"
+#include "main/hash.h"
+#include "main/blend.h"
+#include "glapi/dispatch.h"
+#include "swrast/swrast.h"
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_blit.h"
+#include "intel_buffers.h"
+#include "intel_regions.h"
+#include "intel_pixel.h"
+#include "intel_buffer_objects.h"
+#include "intel_fbo.h"
+
+static GLboolean
+intel_texture_drawpixels(GLcontext * ctx,
+			 GLint x, GLint y,
+			 GLsizei width, GLsizei height,
+			 GLenum format,
+			 GLenum type,
+			 const struct gl_pixelstore_attrib *unpack,
+			 const GLvoid *pixels)
+{
+   GLuint texname;
+   GLfloat vertices[4][4];
+   GLfloat texcoords[4][2];
+
+   /* We're going to mess with texturing with no regard to existing texture
+    * state, so if there is some set up we have to bail.
+    */
+   if (ctx->Texture._EnabledUnits != 0) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels() fallback: texturing enabled\n");
+      return GL_FALSE;
+   }
+
+   /* Can't do textured DrawPixels with a fragment program, unless we were
+    * to generate a new program that sampled our texture and put the results
+    * in the fragment color before the user's program started.
+    */
+   if (ctx->FragmentProgram.Enabled) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels() fallback: fragment program enabled\n");
+      return GL_FALSE;
+   }
+
+   /* We don't have a way to generate fragments with stencil values which *
+    * will set the resulting stencil value.
+    */
+   if (format == GL_STENCIL_INDEX)
+      return GL_FALSE;
+
+   /* Check that we can load in a texture this big. */
+   if (width > (1 << (ctx->Const.MaxTextureLevels - 1)) ||
+       height > (1 << (ctx->Const.MaxTextureLevels - 1))) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels() fallback: bitmap too large (%dx%d)\n",
+		 width, height);
+      return GL_FALSE;
+   }
+
+   /* To do DEPTH_COMPONENT, we would need to change our setup to not draw to
+    * the color buffer, and sample the texture values into the fragment depth
+    * in a program.
+    */
+   if (format == GL_DEPTH_COMPONENT) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr,
+		 "glDrawPixels() fallback: format == GL_DEPTH_COMPONENT\n");
+      return GL_FALSE;
+   }
+
+   _mesa_PushAttrib(GL_ENABLE_BIT | GL_TRANSFORM_BIT | GL_TEXTURE_BIT |
+		    GL_CURRENT_BIT);
+   _mesa_PushClientAttrib(GL_CLIENT_VERTEX_ARRAY_BIT);
+
+   /* XXX: pixel store stuff */
+   _mesa_Disable(GL_POLYGON_STIPPLE);
+
+   _mesa_ActiveTextureARB(GL_TEXTURE0_ARB);
+   _mesa_Enable(GL_TEXTURE_2D);
+   _mesa_GenTextures(1, &texname);
+   _mesa_BindTexture(GL_TEXTURE_2D, texname);
+   _mesa_TexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
+   _mesa_TexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_NEAREST);
+   _mesa_TexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
+   /*
+   _mesa_TexEnvf(GL_TEXTURE_ENV, GL_COMBINE_RGB, GL_REPLACE);
+   _mesa_TexEnvf(GL_TEXTURE_ENV, GL_COMBINE_ALPHA, GL_REPLACE);
+   */
+   _mesa_TexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, width, height, 0, format,
+		    type, pixels);
+
+   _mesa_MatrixMode(GL_PROJECTION);
+   _mesa_PushMatrix();
+   _mesa_LoadIdentity();
+   _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1);
+
+   _mesa_MatrixMode(GL_MODELVIEW);
+   _mesa_PushMatrix();
+   _mesa_LoadIdentity();
+
+   /* Create the vertex buffer based on the current raster pos.  The x and y
+    * we're handed are ctx->Current.RasterPos[0,1] rounded to integers.
+    * We also apply the depth.  However, the W component is already multiplied
+    * into ctx->Current.RasterPos[0,1,2] and we can ignore it at this point.
+    */
+   vertices[0][0] = x;
+   vertices[0][1] = y;
+   vertices[0][2] = ctx->Current.RasterPos[2];
+   vertices[0][3] = 1.0;
+   vertices[1][0] = x + width * ctx->Pixel.ZoomX;
+   vertices[1][1] = y;
+   vertices[1][2] = ctx->Current.RasterPos[2];
+   vertices[1][3] = 1.0;
+   vertices[2][0] = x + width * ctx->Pixel.ZoomX;
+   vertices[2][1] = y + height * ctx->Pixel.ZoomY;
+   vertices[2][2] = ctx->Current.RasterPos[2];
+   vertices[2][3] = 1.0;
+   vertices[3][0] = x;
+   vertices[3][1] = y + height * ctx->Pixel.ZoomY;
+   vertices[3][2] = ctx->Current.RasterPos[2];
+   vertices[3][3] = 1.0;
+
+   texcoords[0][0] = 0.0;
+   texcoords[0][1] = 0.0;
+   texcoords[1][0] = 1.0;
+   texcoords[1][1] = 0.0;
+   texcoords[2][0] = 1.0;
+   texcoords[2][1] = 1.0;
+   texcoords[3][0] = 0.0;
+   texcoords[3][1] = 1.0;
+
+   _mesa_VertexPointer(4, GL_FLOAT, 4 * sizeof(GLfloat), &vertices);
+   _mesa_TexCoordPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), &texcoords);
+   _mesa_Enable(GL_VERTEX_ARRAY);
+   _mesa_Enable(GL_TEXTURE_COORD_ARRAY);
+   CALL_DrawArrays(ctx->Exec, (GL_TRIANGLE_FAN, 0, 4));
+
+   _mesa_MatrixMode(GL_PROJECTION);
+   _mesa_PopMatrix();
+   _mesa_MatrixMode(GL_MODELVIEW);
+   _mesa_PopMatrix();
+   _mesa_PopClientAttrib();
+   _mesa_PopAttrib();
+
+   _mesa_DeleteTextures(1, &texname);
+
+   return GL_TRUE;
+}
+
+static GLboolean
+intel_stencil_drawpixels(GLcontext * ctx,
+			 GLint x, GLint y,
+			 GLsizei width, GLsizei height,
+			 GLenum format,
+			 GLenum type,
+			 const struct gl_pixelstore_attrib *unpack,
+			 const GLvoid *pixels)
+{
+   GLuint texname, rb_name, fb_name, old_fb_name;
+   GLfloat vertices[4][2];
+   GLfloat texcoords[4][2];
+   struct intel_renderbuffer *irb;
+   struct intel_renderbuffer *depth_irb;
+   struct gl_renderbuffer *rb;
+   struct gl_pixelstore_attrib old_unpack;
+   GLstencil *stencil_pixels;
+   int row;
+
+   if (format != GL_STENCIL_INDEX)
+      return GL_FALSE;
+
+   /* If there's nothing to write, we're done. */
+   if (ctx->Stencil.WriteMask[0] == 0)
+      return GL_TRUE;
+
+   /* Can't do a per-bit writemask while treating stencil as rgba data. */
+   if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+		 "stencil mask enabled\n");
+      return GL_FALSE;
+   }
+
+   /* We use FBOs for our wrapping of the depthbuffer into a color
+    * destination.
+    */
+   if (!ctx->Extensions.EXT_framebuffer_object)
+      return GL_FALSE;
+
+   /* We're going to mess with texturing with no regard to existing texture
+    * state, so if there is some set up we have to bail.
+    */
+   if (ctx->Texture._EnabledUnits != 0) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+		 "texturing enabled\n");
+      return GL_FALSE;
+   }
+
+   /* Can't do textured DrawPixels with a fragment program, unless we were
+    * to generate a new program that sampled our texture and put the results
+    * in the fragment color before the user's program started.
+    */
+   if (ctx->FragmentProgram.Enabled) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+		 "fragment program enabled\n");
+      return GL_FALSE;
+   }
+
+   /* Check that we can load in a texture this big. */
+   if (width > (1 << (ctx->Const.MaxTextureLevels - 1)) ||
+       height > (1 << (ctx->Const.MaxTextureLevels - 1))) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+		 "bitmap too large (%dx%d)\n",
+		 width, height);
+      return GL_FALSE;
+   }
+
+   _mesa_PushAttrib(GL_ENABLE_BIT | GL_TRANSFORM_BIT | GL_TEXTURE_BIT |
+		    GL_CURRENT_BIT | GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);
+   _mesa_PushClientAttrib(GL_CLIENT_VERTEX_ARRAY_BIT);
+   old_fb_name = ctx->DrawBuffer->Name;
+
+   _mesa_Disable(GL_POLYGON_STIPPLE);
+   _mesa_Disable(GL_DEPTH_TEST);
+   _mesa_Disable(GL_STENCIL_TEST);
+
+   /* Unpack the supplied stencil values into a ubyte buffer. */
+   assert(sizeof(GLstencil) == sizeof(GLubyte));
+   stencil_pixels = _mesa_malloc(width * height * sizeof(GLstencil));
+   for (row = 0; row < height; row++) {
+      GLvoid *source = _mesa_image_address2d(unpack, pixels,
+					     width, height,
+					     GL_COLOR_INDEX, type,
+					     row, 0);
+      _mesa_unpack_stencil_span(ctx, width, GL_UNSIGNED_BYTE,
+				stencil_pixels +
+				row * width * sizeof(GLstencil),
+				type, source, unpack, ctx->_ImageTransferState);
+   }
+
+   /* Take the current depth/stencil renderbuffer, and make a new one wrapping
+    * it which will be treated as GL_RGBA8 so we can render to it as a color
+    * buffer.
+    */
+   depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
+   irb = intel_create_renderbuffer(GL_RGBA8);
+   rb = &irb->Base;
+   irb->Base.Width = depth_irb->Base.Width;
+   irb->Base.Height = depth_irb->Base.Height;
+   intel_renderbuffer_set_region(irb, depth_irb->region);
+
+   /* Create a name for our renderbuffer, which lets us use other mesa
+    * rb functions for convenience.
+    */
+   _mesa_GenRenderbuffersEXT(1, &rb_name);
+   irb->Base.RefCount++;
+   _mesa_HashInsert(ctx->Shared->RenderBuffers, rb_name, &irb->Base);
+
+   /* Bind the new renderbuffer to the color attachment point. */
+   _mesa_GenFramebuffersEXT(1, &fb_name);
+   _mesa_BindFramebufferEXT(GL_FRAMEBUFFER_EXT, fb_name);
+   _mesa_FramebufferRenderbufferEXT(GL_FRAMEBUFFER_EXT,
+				    GL_COLOR_ATTACHMENT0_EXT,
+				    GL_RENDERBUFFER_EXT,
+				    rb_name);
+   /* Choose to render to the color attachment. */
+   _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0_EXT);
+
+   _mesa_DepthMask(GL_FALSE);
+   _mesa_ColorMask(GL_FALSE, GL_FALSE, GL_FALSE, GL_TRUE);
+
+   _mesa_ActiveTextureARB(GL_TEXTURE0_ARB);
+   _mesa_Enable(GL_TEXTURE_2D);
+   _mesa_GenTextures(1, &texname);
+   _mesa_BindTexture(GL_TEXTURE_2D, texname);
+   _mesa_TexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
+   _mesa_TexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_NEAREST);
+   _mesa_TexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
+   old_unpack = ctx->Unpack;
+   ctx->Unpack = ctx->DefaultPacking;
+   _mesa_TexImage2D(GL_TEXTURE_2D, 0, GL_INTENSITY, width, height, 0,
+		    GL_RED, GL_UNSIGNED_BYTE, stencil_pixels);
+   ctx->Unpack = old_unpack;
+   _mesa_free(stencil_pixels);
+
+   _mesa_MatrixMode(GL_PROJECTION);
+   _mesa_PushMatrix();
+   _mesa_LoadIdentity();
+   _mesa_Ortho(0, ctx->DrawBuffer->Width, 0, ctx->DrawBuffer->Height, 1, -1);
+
+   _mesa_MatrixMode(GL_MODELVIEW);
+   _mesa_PushMatrix();
+   _mesa_LoadIdentity();
+
+   vertices[0][0] = x;
+   vertices[0][1] = y;
+   vertices[1][0] = x + width * ctx->Pixel.ZoomX;
+   vertices[1][1] = y;
+   vertices[2][0] = x + width * ctx->Pixel.ZoomX;
+   vertices[2][1] = y + height * ctx->Pixel.ZoomY;
+   vertices[3][0] = x;
+   vertices[3][1] = y + height * ctx->Pixel.ZoomY;
+
+   texcoords[0][0] = 0.0;
+   texcoords[0][1] = 0.0;
+   texcoords[1][0] = 1.0;
+   texcoords[1][1] = 0.0;
+   texcoords[2][0] = 1.0;
+   texcoords[2][1] = 1.0;
+   texcoords[3][0] = 0.0;
+   texcoords[3][1] = 1.0;
+
+   _mesa_VertexPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), &vertices);
+   _mesa_TexCoordPointer(2, GL_FLOAT, 2 * sizeof(GLfloat), &texcoords);
+   _mesa_Enable(GL_VERTEX_ARRAY);
+   _mesa_Enable(GL_TEXTURE_COORD_ARRAY);
+   CALL_DrawArrays(ctx->Exec, (GL_TRIANGLE_FAN, 0, 4));
+
+   _mesa_BindFramebufferEXT(GL_FRAMEBUFFER_EXT, old_fb_name);
+
+   _mesa_MatrixMode(GL_PROJECTION);
+   _mesa_PopMatrix();
+   _mesa_MatrixMode(GL_MODELVIEW);
+   _mesa_PopMatrix();
+   _mesa_PopClientAttrib();
+   _mesa_PopAttrib();
+
+   _mesa_DeleteTextures(1, &texname);
+   _mesa_DeleteFramebuffersEXT(1, &fb_name);
+   _mesa_DeleteRenderbuffersEXT(1, &rb_name);
+
+   return GL_TRUE;
+}
+
+void
+intelDrawPixels(GLcontext * ctx,
+                GLint x, GLint y,
+                GLsizei width, GLsizei height,
+                GLenum format,
+                GLenum type,
+                const struct gl_pixelstore_attrib *unpack,
+                const GLvoid * pixels)
+{
+   if (intel_texture_drawpixels(ctx, x, y, width, height, format, type,
+				unpack, pixels))
+      return;
+
+   if (intel_stencil_drawpixels(ctx, x, y, width, height, format, type,
+				unpack, pixels))
+      return;
+
+   if (INTEL_DEBUG & DEBUG_PIXEL)
+      _mesa_printf("%s: fallback to swrast\n", __FUNCTION__);
+
+   if (ctx->FragmentProgram._Current == ctx->FragmentProgram._TexEnvProgram) {
+      /*
+       * We don't want the i915 texenv program to be applied to DrawPixels.
+       * This is really just a performance optimization (mesa will other-
+       * wise happily run the fragment program on each pixel in the image).
+       */
+      struct gl_fragment_program *fpSave = ctx->FragmentProgram._Current;
+   /* can't just set current frag prog to 0 here as on buffer resize
+      we'll get new state checks which will segfault. Remains a hack. */
+      ctx->FragmentProgram._Current = NULL;
+      ctx->FragmentProgram._UseTexEnvProgram = GL_FALSE;
+      ctx->FragmentProgram._Active = GL_FALSE;
+      _swrast_DrawPixels( ctx, x, y, width, height, format, type,
+                          unpack, pixels );
+      ctx->FragmentProgram._Current = fpSave;
+      ctx->FragmentProgram._UseTexEnvProgram = GL_TRUE;
+      ctx->FragmentProgram._Active = GL_TRUE;
+      _swrast_InvalidateState(ctx, _NEW_PROGRAM);
+   }
+   else {
+      _swrast_DrawPixels( ctx, x, y, width, height, format, type,
+                          unpack, pixels );
+   }
+}
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
new file mode 100644
index 00000000000..57ac8f0cc14
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -0,0 +1,232 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#define CMD_MI				(0x0 << 29)
+#define CMD_2D				(0x2 << 29)
+#define CMD_3D				(0x3 << 29)
+
+#define MI_NOOP				(CMD_MI | 0)
+
+#define MI_BATCH_BUFFER_END		(CMD_MI | 0xA << 23)
+
+#define MI_FLUSH			(CMD_MI | (4 << 23))
+#define FLUSH_MAP_CACHE				(1 << 0)
+#define INHIBIT_FLUSH_RENDER_CACHE		(1 << 2)
+
+/* Stalls command execution waiting for the given events to have occurred. */
+#define MI_WAIT_FOR_EVENT               (CMD_MI | (0x3 << 23))
+#define MI_WAIT_FOR_PLANE_B_FLIP        (1<<6)
+#define MI_WAIT_FOR_PLANE_A_FLIP        (1<<2)
+
+/* p189 */
+#define _3DSTATE_LOAD_STATE_IMMEDIATE_1   (CMD_3D | (0x1d<<24) | (0x04<<16))
+#define I1_LOAD_S(n)                      (1<<(4+n))
+
+#define _3DSTATE_DRAWRECT_INFO		(CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
+#define _3DSTATE_DRAWRECT_INFO_I965	(CMD_3D | (3 << 27) | (1 << 24) | 0x2)
+
+/** @{
+ *
+ * PIPE_CONTROL operation, a combination MI_FLUSH and register write with
+ * additional flushing control.
+ */
+#define _3DSTATE_PIPE_CONTROL		(CMD_3D | (3 << 27) | (2 << 24) | 2)
+#define PIPE_CONTROL_NO_WRITE		(0 << 14)
+#define PIPE_CONTROL_WRITE_IMMEDIATE	(1 << 14)
+#define PIPE_CONTROL_WRITE_DEPTH_COUNT	(2 << 14)
+#define PIPE_CONTROL_WRITE_TIMESTAMP	(3 << 14)
+#define PIPE_CONTROL_DEPTH_STALL	(1 << 13)
+#define PIPE_CONTROL_WRITE_FLUSH	(1 << 12)
+#define PIPE_CONTROL_INSTRUCTION_FLUSH	(1 << 11)
+#define PIPE_CONTROL_INTERRUPT_ENABLE	(1 << 8)
+#define PIPE_CONTROL_PPGTT_WRITE	(0 << 2)
+#define PIPE_CONTROL_GLOBAL_GTT_WRITE	(1 << 2)
+
+/** @} */
+
+/** @{
+ * 915 definitions
+ */
+#define S0_VB_OFFSET_MASK		0xffffffc0
+#define S0_AUTO_CACHE_INV_DISABLE	(1<<0)
+/** @} */
+
+/** @{
+ * 830 definitions
+ */
+#define S0_VB_OFFSET_MASK_830		0xffffff80
+#define S0_VB_PITCH_SHIFT_830		1
+#define S0_VB_ENABLE_830		(1<<0)
+/** @} */
+
+#define S1_VERTEX_WIDTH_SHIFT          24
+#define S1_VERTEX_WIDTH_MASK           (0x3f<<24)
+#define S1_VERTEX_PITCH_SHIFT          16
+#define S1_VERTEX_PITCH_MASK           (0x3f<<16)
+
+#define TEXCOORDFMT_2D                 0x0
+#define TEXCOORDFMT_3D                 0x1
+#define TEXCOORDFMT_4D                 0x2
+#define TEXCOORDFMT_1D                 0x3
+#define TEXCOORDFMT_2D_16              0x4
+#define TEXCOORDFMT_4D_16              0x5
+#define TEXCOORDFMT_NOT_PRESENT        0xf
+#define S2_TEXCOORD_FMT0_MASK            0xf
+#define S2_TEXCOORD_FMT1_SHIFT           4
+#define S2_TEXCOORD_FMT(unit, type)    ((type)<<(unit*4))
+#define S2_TEXCOORD_NONE               (~0)
+#define S2_TEX_COUNT_SHIFT_830		12
+#define S2_VERTEX_1_WIDTH_SHIFT_830	0
+#define S2_VERTEX_0_WIDTH_SHIFT_830	6
+/* S3 not interesting */
+
+#define S4_POINT_WIDTH_SHIFT           23
+#define S4_POINT_WIDTH_MASK            (0x1ff<<23)
+#define S4_LINE_WIDTH_SHIFT            19
+#define S4_LINE_WIDTH_ONE              (0x2<<19)
+#define S4_LINE_WIDTH_MASK             (0xf<<19)
+#define S4_FLATSHADE_ALPHA             (1<<18)
+#define S4_FLATSHADE_FOG               (1<<17)
+#define S4_FLATSHADE_SPECULAR          (1<<16)
+#define S4_FLATSHADE_COLOR             (1<<15)
+#define S4_CULLMODE_BOTH	       (0<<13)
+#define S4_CULLMODE_NONE	       (1<<13)
+#define S4_CULLMODE_CW		       (2<<13)
+#define S4_CULLMODE_CCW		       (3<<13)
+#define S4_CULLMODE_MASK	       (3<<13)
+#define S4_VFMT_POINT_WIDTH            (1<<12)
+#define S4_VFMT_SPEC_FOG               (1<<11)
+#define S4_VFMT_COLOR                  (1<<10)
+#define S4_VFMT_DEPTH_OFFSET           (1<<9)
+#define S4_VFMT_XYZ     	       (1<<6)
+#define S4_VFMT_XYZW     	       (2<<6)
+#define S4_VFMT_XY     		       (3<<6)
+#define S4_VFMT_XYW     	       (4<<6)
+#define S4_VFMT_XYZW_MASK              (7<<6)
+#define S4_FORCE_DEFAULT_DIFFUSE       (1<<5)
+#define S4_FORCE_DEFAULT_SPECULAR      (1<<4)
+#define S4_LOCAL_DEPTH_OFFSET_ENABLE   (1<<3)
+#define S4_VFMT_FOG_PARAM              (1<<2)
+#define S4_SPRITE_POINT_ENABLE         (1<<1)
+#define S4_LINE_ANTIALIAS_ENABLE       (1<<0)
+
+#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH   | 	\
+		      S4_VFMT_SPEC_FOG      |	\
+		      S4_VFMT_COLOR         |	\
+		      S4_VFMT_DEPTH_OFFSET  |	\
+		      S4_VFMT_XYZW_MASK     |	\
+		      S4_VFMT_FOG_PARAM)
+
+
+#define S5_WRITEDISABLE_ALPHA          (1<<31)
+#define S5_WRITEDISABLE_RED            (1<<30)
+#define S5_WRITEDISABLE_GREEN          (1<<29)
+#define S5_WRITEDISABLE_BLUE           (1<<28)
+#define S5_WRITEDISABLE_MASK           (0xf<<28)
+#define S5_FORCE_DEFAULT_POINT_SIZE    (1<<27)
+#define S5_LAST_PIXEL_ENABLE           (1<<26)
+#define S5_GLOBAL_DEPTH_OFFSET_ENABLE  (1<<25)
+#define S5_FOG_ENABLE                  (1<<24)
+#define S5_STENCIL_REF_SHIFT           16
+#define S5_STENCIL_REF_MASK            (0xff<<16)
+#define S5_STENCIL_TEST_FUNC_SHIFT     13
+#define S5_STENCIL_TEST_FUNC_MASK      (0x7<<13)
+#define S5_STENCIL_FAIL_SHIFT          10
+#define S5_STENCIL_FAIL_MASK           (0x7<<10)
+#define S5_STENCIL_PASS_Z_FAIL_SHIFT   7
+#define S5_STENCIL_PASS_Z_FAIL_MASK    (0x7<<7)
+#define S5_STENCIL_PASS_Z_PASS_SHIFT   4
+#define S5_STENCIL_PASS_Z_PASS_MASK    (0x7<<4)
+#define S5_STENCIL_WRITE_ENABLE        (1<<3)
+#define S5_STENCIL_TEST_ENABLE         (1<<2)
+#define S5_COLOR_DITHER_ENABLE         (1<<1)
+#define S5_LOGICOP_ENABLE              (1<<0)
+
+
+#define S6_ALPHA_TEST_ENABLE           (1<<31)
+#define S6_ALPHA_TEST_FUNC_SHIFT       28
+#define S6_ALPHA_TEST_FUNC_MASK        (0x7<<28)
+#define S6_ALPHA_REF_SHIFT             20
+#define S6_ALPHA_REF_MASK              (0xff<<20)
+#define S6_DEPTH_TEST_ENABLE           (1<<19)
+#define S6_DEPTH_TEST_FUNC_SHIFT       16
+#define S6_DEPTH_TEST_FUNC_MASK        (0x7<<16)
+#define S6_CBUF_BLEND_ENABLE           (1<<15)
+#define S6_CBUF_BLEND_FUNC_SHIFT       12
+#define S6_CBUF_BLEND_FUNC_MASK        (0x7<<12)
+#define S6_CBUF_SRC_BLEND_FACT_SHIFT   8
+#define S6_CBUF_SRC_BLEND_FACT_MASK    (0xf<<8)
+#define S6_CBUF_DST_BLEND_FACT_SHIFT   4
+#define S6_CBUF_DST_BLEND_FACT_MASK    (0xf<<4)
+#define S6_DEPTH_WRITE_ENABLE          (1<<3)
+#define S6_COLOR_WRITE_ENABLE          (1<<2)
+#define S6_TRISTRIP_PV_SHIFT           0
+#define S6_TRISTRIP_PV_MASK            (0x3<<0)
+
+#define S7_DEPTH_OFFSET_CONST_MASK     ~0
+
+/* Primitive dispatch on 830-945 */
+#define _3DPRIMITIVE			(CMD_3D | (0x1f << 24))
+#define PRIM_INDIRECT            (1<<23)
+#define PRIM_INLINE              (0<<23)
+#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
+#define PRIM_INDIRECT_ELTS       (1<<17)
+
+#define PRIM3D_TRILIST		(0x0<<18)
+#define PRIM3D_TRISTRIP 	(0x1<<18)
+#define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
+#define PRIM3D_TRIFAN		(0x3<<18)
+#define PRIM3D_POLY		(0x4<<18)
+#define PRIM3D_LINELIST 	(0x5<<18)
+#define PRIM3D_LINESTRIP	(0x6<<18)
+#define PRIM3D_RECTLIST 	(0x7<<18)
+#define PRIM3D_POINTLIST	(0x8<<18)
+#define PRIM3D_DIB		(0x9<<18)
+#define PRIM3D_MASK		(0x1f<<18)
+
+#define XY_SETUP_BLT_CMD		(CMD_2D | (0x01 << 22) | 6)
+
+#define XY_COLOR_BLT_CMD		(CMD_2D | (0x50 << 22) | 4)
+
+#define XY_SRC_COPY_BLT_CMD             (CMD_2D | (0x53 << 22) | 6)
+
+#define XY_TEXT_IMMEDIATE_BLIT_CMD	(CMD_2D | (0x31 << 22))
+# define XY_TEXT_BYTE_PACKED		(1 << 16)
+
+/* BR00 */
+#define XY_BLT_WRITE_ALPHA	(1 << 21)
+#define XY_BLT_WRITE_RGB	(1 << 20)
+#define XY_SRC_TILED		(1 << 15)
+#define XY_DST_TILED		(1 << 11)
+
+/* BR13 */
+#define BR13_565		(0x1 << 24)
+#define BR13_8888		(0x3 << 24)
+
+#define FENCE_LINEAR 0
+#define FENCE_XMAJOR 1
+#define FENCE_YMAJOR 2
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
new file mode 100644
index 00000000000..8dbcc3050ee
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -0,0 +1,569 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+/* Provide additional functionality on top of bufmgr buffers:
+ *   - 2d semantics and blit operations
+ *   - refcounting of buffers for multiple images in a buffer.
+ *   - refcounting of buffer mappings.
+ *   - some logic for moving the buffers to the best memory pools for
+ *     given operations.
+ *
+ * Most of this is to make it easier to implement the fixed-layout
+ * mipmap tree required by intel hardware in the face of GL's
+ * programming interface where each image can be specifed in random
+ * order and it isn't clear what layout the tree should have until the
+ * last moment.
+ */
+
+#include <sys/ioctl.h>
+#include <errno.h>
+
+#include "intel_context.h"
+#include "intel_regions.h"
+#include "intel_blit.h"
+#include "intel_buffer_objects.h"
+#include "intel_bufmgr.h"
+#include "intel_batchbuffer.h"
+#include "intel_chipset.h"
+
+#define FILE_DEBUG_FLAG DEBUG_REGION
+
+/* XXX: Thread safety?
+ */
+GLubyte *
+intel_region_map(struct intel_context *intel, struct intel_region *region)
+{
+   DBG("%s\n", __FUNCTION__);
+   if (!region->map_refcount++) {
+      if (region->pbo)
+         intel_region_cow(intel, region);
+
+      dri_bo_map(region->buffer, GL_TRUE);
+      region->map = region->buffer->virtual;
+   }
+
+   return region->map;
+}
+
+void
+intel_region_unmap(struct intel_context *intel, struct intel_region *region)
+{
+   DBG("%s\n", __FUNCTION__);
+   if (!--region->map_refcount) {
+      dri_bo_unmap(region->buffer);
+      region->map = NULL;
+   }
+}
+
+static struct intel_region *
+intel_region_alloc_internal(struct intel_context *intel,
+			    GLuint cpp,
+			    GLuint width, GLuint height, GLuint pitch,
+			    dri_bo *buffer)
+{
+   struct intel_region *region;
+
+   DBG("%s\n", __FUNCTION__);
+
+   if (buffer == NULL)
+      return NULL;
+
+   region = calloc(sizeof(*region), 1);
+   region->cpp = cpp;
+   region->width = width;
+   region->height = height;
+   region->pitch = pitch;
+   region->refcount = 1;
+   region->buffer = buffer;
+
+   /* Default to no tiling */
+   region->tiling = I915_TILING_NONE;
+   region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+
+   return region;
+}
+
+struct intel_region *
+intel_region_alloc(struct intel_context *intel,
+                   GLuint cpp, GLuint width, GLuint height, GLuint pitch)
+{
+   dri_bo *buffer;
+
+   buffer = dri_bo_alloc(intel->bufmgr, "region",
+			 pitch * cpp * height, 64);
+
+   return intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer);
+}
+
+struct intel_region *
+intel_region_alloc_for_handle(struct intel_context *intel,
+			      GLuint cpp,
+			      GLuint width, GLuint height, GLuint pitch,
+			      GLuint handle, const char *name)
+{
+   struct intel_region *region;
+   dri_bo *buffer;
+   int ret;
+
+   buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
+
+   region = intel_region_alloc_internal(intel, cpp,
+					width, height, pitch, buffer);
+   if (region == NULL)
+      return region;
+
+   ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+			   &region->bit_6_swizzle);
+   if (ret != 0) {
+      fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+	      handle, name, strerror(-ret));
+      intel_region_release(&region);
+      return NULL;
+   }
+
+   return region;
+}
+
+void
+intel_region_reference(struct intel_region **dst, struct intel_region *src)
+{
+   if (src)
+      DBG("%s %d\n", __FUNCTION__, src->refcount);
+
+   assert(*dst == NULL);
+   if (src) {
+      src->refcount++;
+      *dst = src;
+   }
+}
+
+void
+intel_region_release(struct intel_region **region_handle)
+{
+   struct intel_region *region = *region_handle;
+
+   if (region == NULL)
+      return;
+
+   DBG("%s %d\n", __FUNCTION__, region->refcount - 1);
+
+   ASSERT(region->refcount > 0);
+   region->refcount--;
+
+   if (region->refcount == 0) {
+      assert(region->map_refcount == 0);
+
+      if (region->pbo)
+	 region->pbo->region = NULL;
+      region->pbo = NULL;
+      dri_bo_unreference(region->buffer);
+
+      if (region->classic_map != NULL) {
+	 drmUnmap(region->classic_map,
+			region->pitch * region->cpp * region->height);
+      }
+
+      free(region);
+   }
+   *region_handle = NULL;
+}
+
+/*
+ * XXX Move this into core Mesa?
+ */
+void
+_mesa_copy_rect(GLubyte * dst,
+                GLuint cpp,
+                GLuint dst_pitch,
+                GLuint dst_x,
+                GLuint dst_y,
+                GLuint width,
+                GLuint height,
+                const GLubyte * src,
+                GLuint src_pitch, GLuint src_x, GLuint src_y)
+{
+   GLuint i;
+
+   dst_pitch *= cpp;
+   src_pitch *= cpp;
+   dst += dst_x * cpp;
+   src += src_x * cpp;
+   dst += dst_y * dst_pitch;
+   src += src_y * dst_pitch;
+   width *= cpp;
+
+   if (width == dst_pitch && width == src_pitch)
+      memcpy(dst, src, height * width);
+   else {
+      for (i = 0; i < height; i++) {
+         memcpy(dst, src, width);
+         dst += dst_pitch;
+         src += src_pitch;
+      }
+   }
+}
+
+
+/* Upload data to a rectangular sub-region.  Lots of choices how to do this:
+ *
+ * - memcpy by span to current destination
+ * - upload data as new buffer and blit
+ *
+ * Currently always memcpy.
+ */
+void
+intel_region_data(struct intel_context *intel,
+                  struct intel_region *dst,
+                  GLuint dst_offset,
+                  GLuint dstx, GLuint dsty,
+                  const void *src, GLuint src_pitch,
+                  GLuint srcx, GLuint srcy, GLuint width, GLuint height)
+{
+   GLboolean locked = GL_FALSE;
+
+   DBG("%s\n", __FUNCTION__);
+
+   if (intel == NULL)
+      return;
+
+   if (dst->pbo) {
+      if (dstx == 0 &&
+          dsty == 0 && width == dst->pitch && height == dst->height)
+         intel_region_release_pbo(intel, dst);
+      else
+         intel_region_cow(intel, dst);
+   }
+
+   if (!intel->locked) {
+      LOCK_HARDWARE(intel);
+      locked = GL_TRUE;
+   }
+
+   _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
+                   dst->cpp,
+                   dst->pitch,
+                   dstx, dsty, width, height, src, src_pitch, srcx, srcy);
+
+   intel_region_unmap(intel, dst);
+
+   if (locked)
+      UNLOCK_HARDWARE(intel);
+
+}
+
+/* Copy rectangular sub-regions. Need better logic about when to
+ * push buffers into AGP - will currently do so whenever possible.
+ */
+void
+intel_region_copy(struct intel_context *intel,
+                  struct intel_region *dst,
+                  GLuint dst_offset,
+                  GLuint dstx, GLuint dsty,
+                  struct intel_region *src,
+                  GLuint src_offset,
+                  GLuint srcx, GLuint srcy, GLuint width, GLuint height)
+{
+   DBG("%s\n", __FUNCTION__);
+
+   if (intel == NULL)
+      return;
+
+   if (dst->pbo) {
+      if (dstx == 0 &&
+          dsty == 0 && width == dst->pitch && height == dst->height)
+         intel_region_release_pbo(intel, dst);
+      else
+         intel_region_cow(intel, dst);
+   }
+
+   assert(src->cpp == dst->cpp);
+
+   intelEmitCopyBlit(intel,
+                     dst->cpp,
+                     src->pitch, src->buffer, src_offset, src->tiling,
+                     dst->pitch, dst->buffer, dst_offset, dst->tiling,
+                     srcx, srcy, dstx, dsty, width, height,
+		     GL_COPY);
+}
+
+/* Fill a rectangular sub-region.  Need better logic about when to
+ * push buffers into AGP - will currently do so whenever possible.
+ */
+void
+intel_region_fill(struct intel_context *intel,
+                  struct intel_region *dst,
+                  GLuint dst_offset,
+                  GLuint dstx, GLuint dsty,
+                  GLuint width, GLuint height, GLuint color)
+{
+   DBG("%s\n", __FUNCTION__);
+
+   if (intel == NULL)
+      return;   
+
+   if (dst->pbo) {
+      if (dstx == 0 &&
+          dsty == 0 && width == dst->pitch && height == dst->height)
+         intel_region_release_pbo(intel, dst);
+      else
+         intel_region_cow(intel, dst);
+   }
+
+   intelEmitFillBlit(intel,
+                     dst->cpp,
+                     dst->pitch, dst->buffer, dst_offset, dst->tiling,
+                     dstx, dsty, width, height, color);
+}
+
+/* Attach to a pbo, discarding our data.  Effectively zero-copy upload
+ * the pbo's data.
+ */
+void
+intel_region_attach_pbo(struct intel_context *intel,
+                        struct intel_region *region,
+                        struct intel_buffer_object *pbo)
+{
+   if (region->pbo == pbo)
+      return;
+
+   /* If there is already a pbo attached, break the cow tie now.
+    * Don't call intel_region_release_pbo() as that would
+    * unnecessarily allocate a new buffer we would have to immediately
+    * discard.
+    */
+   if (region->pbo) {
+      region->pbo->region = NULL;
+      region->pbo = NULL;
+   }
+
+   if (region->buffer) {
+      dri_bo_unreference(region->buffer);
+      region->buffer = NULL;
+   }
+
+   region->pbo = pbo;
+   region->pbo->region = region;
+   dri_bo_reference(pbo->buffer);
+   region->buffer = pbo->buffer;
+}
+
+
+/* Break the COW tie to the pbo and allocate a new buffer.
+ * The pbo gets to keep the data.
+ */
+void
+intel_region_release_pbo(struct intel_context *intel,
+                         struct intel_region *region)
+{
+   assert(region->buffer == region->pbo->buffer);
+   region->pbo->region = NULL;
+   region->pbo = NULL;
+   dri_bo_unreference(region->buffer);
+   region->buffer = NULL;
+
+   region->buffer = dri_bo_alloc(intel->bufmgr, "region",
+				 region->pitch * region->cpp * region->height,
+				 64);
+}
+
+/* Break the COW tie to the pbo.  Both the pbo and the region end up
+ * with a copy of the data.
+ */
+void
+intel_region_cow(struct intel_context *intel, struct intel_region *region)
+{
+   struct intel_buffer_object *pbo = region->pbo;
+   GLboolean was_locked = intel->locked;
+
+   if (intel == NULL)
+      return;
+
+   intel_region_release_pbo(intel, region);
+
+   assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
+
+   DBG("%s (%d bytes)\n", __FUNCTION__, pbo->Base.Size);
+
+   /* Now blit from the texture buffer to the new buffer: 
+    */
+
+   was_locked = intel->locked;
+   if (!was_locked)
+      LOCK_HARDWARE(intel);
+
+   intelEmitCopyBlit(intel,
+		     region->cpp,
+		     region->pitch, region->buffer, 0, region->tiling,
+		     region->pitch, pbo->buffer, 0, region->tiling,
+		     0, 0, 0, 0,
+		     region->pitch, region->height,
+		     GL_COPY);
+
+   if (!was_locked)
+      UNLOCK_HARDWARE(intel);
+}
+
+dri_bo *
+intel_region_buffer(struct intel_context *intel,
+                    struct intel_region *region, GLuint flag)
+{
+   if (region->pbo) {
+      if (flag == INTEL_WRITE_PART)
+         intel_region_cow(intel, region);
+      else if (flag == INTEL_WRITE_FULL)
+         intel_region_release_pbo(intel, region);
+   }
+
+   return region->buffer;
+}
+
+static struct intel_region *
+intel_recreate_static(struct intel_context *intel,
+		      const char *name,
+		      struct intel_region *region,
+		      intelRegion *region_desc)
+{
+   intelScreenPrivate *intelScreen = intel->intelScreen;
+   int ret;
+
+   if (region == NULL) {
+      region = calloc(sizeof(*region), 1);
+      region->refcount = 1;
+   }
+
+   if (intel->ctx.Visual.rgbBits == 24)
+      region->cpp = 4;
+   else
+      region->cpp = intel->ctx.Visual.rgbBits / 8;
+   region->pitch = intelScreen->pitch;
+   region->height = intelScreen->height;     /* needed? */
+
+   if (region->buffer != NULL) {
+      dri_bo_unreference(region->buffer);
+      region->buffer = NULL;
+   }
+
+   if (intel->ttm) {
+      assert(region_desc->bo_handle != -1);
+      region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
+						     name,
+						     region_desc->bo_handle);
+
+      ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+			      &region->bit_6_swizzle);
+      if (ret != 0) {
+	 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+		 region_desc->bo_handle, name, strerror(-ret));
+	 intel_region_release(&region);
+	 return NULL;
+      }
+   } else {
+      if (region->classic_map != NULL) {
+	 drmUnmap(region->classic_map,
+		  region->pitch * region->cpp * region->height);
+	 region->classic_map = NULL;
+      }
+      ret = drmMap(intel->driFd, region_desc->handle,
+		   region->pitch * region->cpp * region->height,
+		   &region->classic_map);
+      if (ret != 0) {
+	 fprintf(stderr, "Failed to drmMap %s buffer\n", name);
+	 free(region);
+	 return NULL;
+      }
+
+      region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+						  name,
+						  region_desc->offset,
+						  region->pitch * region->cpp *
+						  region->height,
+						  region->classic_map);
+
+      /* The sarea just gives us a boolean for whether it's tiled or not,
+       * instead of which tiling mode it is.  Guess.
+       */
+      if (region_desc->tiled) {
+	 if (IS_965(intel->intelScreen->deviceID) &&
+	     region_desc == &intelScreen->depth)
+	    region->tiling = I915_TILING_Y;
+	 else
+	    region->tiling = I915_TILING_X;
+      } else {
+	 region->tiling = I915_TILING_NONE;
+      }
+
+      region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+   }
+
+   assert(region->buffer != NULL);
+
+   return region;
+}
+
+/**
+ * Create intel_region structs to describe the static front, back, and depth
+ * buffers created by the xserver.
+ *
+ * Although FBO's mean we now no longer use these as render targets in
+ * all circumstances, they won't go away until the back and depth
+ * buffers become private, and the front buffer will remain even then.
+ *
+ * Note that these don't allocate video memory, just describe
+ * allocations alread made by the X server.
+ */
+void
+intel_recreate_static_regions(struct intel_context *intel)
+{
+   intelScreenPrivate *intelScreen = intel->intelScreen;
+
+   intel->front_region =
+      intel_recreate_static(intel, "front",
+			    intel->front_region,
+			    &intelScreen->front);
+
+   intel->back_region =
+      intel_recreate_static(intel, "back",
+			    intel->back_region,
+			    &intelScreen->back);
+
+#ifdef I915
+   if (intelScreen->third.handle) {
+      intel->third_region =
+	 intel_recreate_static(intel, "third",
+			       intel->third_region,
+			       &intelScreen->third);
+   }
+#endif /* I915 */
+
+   /* Still assumes front.cpp == depth.cpp.  We can kill this when we move to
+    * private buffers.
+    */
+   intel->depth_region =
+      intel_recreate_static(intel, "depth",
+			    intel->depth_region,
+			    &intelScreen->depth);
+}
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
new file mode 100644
index 00000000000..4b120ba4cee
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -0,0 +1,151 @@
+/**************************************************************************
+ * 
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTEL_REGIONS_H
+#define INTEL_REGIONS_H
+
+/** @file intel_regions.h
+ *
+ * Structure definitions and prototypes for intel_region handling, which is
+ * the basic structure for rectangular collections of pixels stored in a dri_bo.
+ */
+
+#include <xf86drm.h>
+
+#include "main/mtypes.h"
+#include "intel_bufmgr.h"
+
+struct intel_context;
+struct intel_buffer_object;
+
+/**
+ * A layer on top of the bufmgr buffers that adds a few useful things:
+ *
+ * - Refcounting for local buffer references.
+ * - Refcounting for buffer maps
+ * - Buffer dimensions - pitch and height.
+ * - Blitter commands for copying 2D regions between buffers. (really???)
+ */
+struct intel_region
+{
+   dri_bo *buffer;  /**< buffer manager's buffer */
+   GLuint refcount; /**< Reference count for region */
+   GLuint cpp;      /**< bytes per pixel */
+   GLuint width;    /**< in pixels */
+   GLuint height;   /**< in pixels */
+   GLuint pitch;    /**< in pixels */
+   GLubyte *map;    /**< only non-NULL when region is actually mapped */
+   GLuint map_refcount;  /**< Reference count for mapping */
+
+   GLuint draw_offset; /**< Offset of drawing address within the region */
+   uint32_t tiling; /**< Which tiling mode the region is in */
+   uint32_t bit_6_swizzle; /**< GEM flag for address swizzling requirement */
+   drmAddress classic_map; /**< drmMap of the region when not in GEM mode */
+   struct intel_buffer_object *pbo;     /* zero-copy uploads */
+};
+
+
+/* Allocate a refcounted region.  Pointers to regions should only be
+ * copied by calling intel_reference_region().
+ */
+struct intel_region *intel_region_alloc(struct intel_context *intel,
+                                        GLuint cpp, GLuint width,
+                                        GLuint height, GLuint pitch);
+
+struct intel_region *
+intel_region_alloc_for_handle(struct intel_context *intel,
+			      GLuint cpp,
+			      GLuint width, GLuint height, GLuint pitch,
+			      unsigned int handle, const char *name);
+
+void intel_region_reference(struct intel_region **dst,
+                            struct intel_region *src);
+
+void intel_region_release(struct intel_region **ib);
+
+void intel_recreate_static_regions(struct intel_context *intel);
+
+/* Map/unmap regions.  This is refcounted also: 
+ */
+GLubyte *intel_region_map(struct intel_context *intel,
+                          struct intel_region *ib);
+
+void intel_region_unmap(struct intel_context *intel, struct intel_region *ib);
+
+
+/* Upload data to a rectangular sub-region
+ */
+void intel_region_data(struct intel_context *intel,
+                       struct intel_region *dest,
+                       GLuint dest_offset,
+                       GLuint destx, GLuint desty,
+                       const void *src, GLuint src_stride,
+                       GLuint srcx, GLuint srcy, GLuint width, GLuint height);
+
+/* Copy rectangular sub-regions
+ */
+void intel_region_copy(struct intel_context *intel,
+                       struct intel_region *dest,
+                       GLuint dest_offset,
+                       GLuint destx, GLuint desty,
+                       struct intel_region *src,
+                       GLuint src_offset,
+                       GLuint srcx, GLuint srcy, GLuint width, GLuint height);
+
+/* Fill a rectangular sub-region
+ */
+void intel_region_fill(struct intel_context *intel,
+                       struct intel_region *dest,
+                       GLuint dest_offset,
+                       GLuint destx, GLuint desty,
+                       GLuint width, GLuint height, GLuint color);
+
+/* Helpers for zerocopy uploads, particularly texture image uploads:
+ */
+void intel_region_attach_pbo(struct intel_context *intel,
+                             struct intel_region *region,
+                             struct intel_buffer_object *pbo);
+void intel_region_release_pbo(struct intel_context *intel,
+                              struct intel_region *region);
+void intel_region_cow(struct intel_context *intel,
+                      struct intel_region *region);
+
+dri_bo *intel_region_buffer(struct intel_context *intel,
+			    struct intel_region *region,
+			    GLuint flag);
+
+void _mesa_copy_rect(GLubyte * dst,
+                GLuint cpp,
+                GLuint dst_pitch,
+                GLuint dst_x,
+                GLuint dst_y,
+                GLuint width,
+                GLuint height,
+                const GLubyte * src,
+                GLuint src_pitch, GLuint src_x, GLuint src_y);
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
new file mode 100644
index 00000000000..61b55b97b51
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -0,0 +1,750 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+#include "main/matrix.h"
+#include "main/renderbuffer.h"
+#include "main/simple_list.h"
+#include "utils.h"
+#include "vblank.h"
+#include "xmlpool.h"
+
+
+#include "intel_screen.h"
+
+#include "intel_buffers.h"
+#include "intel_tex.h"
+#include "intel_span.h"
+#include "intel_fbo.h"
+#include "intel_chipset.h"
+
+#include "i915_drm.h"
+#include "i830_dri.h"
+#include "intel_regions.h"
+#include "intel_batchbuffer.h"
+#include "intel_bufmgr.h"
+
+PUBLIC const char __driConfigOptions[] =
+   DRI_CONF_BEGIN
+   DRI_CONF_SECTION_PERFORMANCE
+      DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
+      DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
+      /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
+       * DRI_CONF_BO_REUSE_ALL
+       */
+      DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
+	 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
+	    DRI_CONF_ENUM(0, "Disable buffer object reuse")
+	    DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
+	 DRI_CONF_DESC_END
+      DRI_CONF_OPT_END
+   DRI_CONF_SECTION_END
+   DRI_CONF_SECTION_QUALITY
+      DRI_CONF_FORCE_S3TC_ENABLE(false)
+      DRI_CONF_ALLOW_LARGE_TEXTURES(2)
+   DRI_CONF_SECTION_END
+   DRI_CONF_SECTION_DEBUG
+     DRI_CONF_NO_RAST(false)
+   DRI_CONF_SECTION_END
+DRI_CONF_END;
+
+const GLuint __driNConfigOptions = 6;
+
+#ifdef USE_NEW_INTERFACE
+static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
+#endif /*USE_NEW_INTERFACE */
+
+/**
+ * Map all the memory regions described by the screen.
+ * \return GL_TRUE if success, GL_FALSE if error.
+ */
+GLboolean
+intelMapScreenRegions(__DRIscreenPrivate * sPriv)
+{
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
+
+   if (0)
+      _mesa_printf("TEX 0x%08x ", intelScreen->tex.handle);
+   if (intelScreen->tex.size != 0) {
+      if (drmMap(sPriv->fd,
+		 intelScreen->tex.handle,
+		 intelScreen->tex.size,
+		 (drmAddress *) & intelScreen->tex.map) != 0) {
+	 intelUnmapScreenRegions(intelScreen);
+	 return GL_FALSE;
+      }
+   }
+
+   return GL_TRUE;
+}
+
+void
+intelUnmapScreenRegions(intelScreenPrivate * intelScreen)
+{
+   if (intelScreen->tex.map) {
+      drmUnmap(intelScreen->tex.map, intelScreen->tex.size);
+      intelScreen->tex.map = NULL;
+   }
+}
+
+
+static void
+intelPrintDRIInfo(intelScreenPrivate * intelScreen,
+                  __DRIscreenPrivate * sPriv, I830DRIPtr gDRIPriv)
+{
+   fprintf(stderr, "*** Front size:   0x%x  offset: 0x%x  pitch: %d\n",
+           intelScreen->front.size, intelScreen->front.offset,
+           intelScreen->pitch);
+   fprintf(stderr, "*** Back size:    0x%x  offset: 0x%x  pitch: %d\n",
+           intelScreen->back.size, intelScreen->back.offset,
+           intelScreen->pitch);
+   fprintf(stderr, "*** Depth size:   0x%x  offset: 0x%x  pitch: %d\n",
+           intelScreen->depth.size, intelScreen->depth.offset,
+           intelScreen->pitch);
+   fprintf(stderr, "*** Texture size: 0x%x  offset: 0x%x\n",
+           intelScreen->tex.size, intelScreen->tex.offset);
+   fprintf(stderr, "*** Memory : 0x%x\n", gDRIPriv->mem);
+}
+
+
+static void
+intelPrintSAREA(const struct drm_i915_sarea * sarea)
+{
+   fprintf(stderr, "SAREA: sarea width %d  height %d\n", sarea->width,
+           sarea->height);
+   fprintf(stderr, "SAREA: pitch: %d\n", sarea->pitch);
+   fprintf(stderr,
+           "SAREA: front offset: 0x%08x  size: 0x%x  handle: 0x%x tiled: %d\n",
+           sarea->front_offset, sarea->front_size,
+           (unsigned) sarea->front_handle, sarea->front_tiled);
+   fprintf(stderr,
+           "SAREA: back  offset: 0x%08x  size: 0x%x  handle: 0x%x tiled: %d\n",
+           sarea->back_offset, sarea->back_size,
+           (unsigned) sarea->back_handle, sarea->back_tiled);
+   fprintf(stderr, "SAREA: depth offset: 0x%08x  size: 0x%x  handle: 0x%x tiled: %d\n",
+           sarea->depth_offset, sarea->depth_size,
+           (unsigned) sarea->depth_handle, sarea->depth_tiled);
+   fprintf(stderr, "SAREA: tex   offset: 0x%08x  size: 0x%x  handle: 0x%x\n",
+           sarea->tex_offset, sarea->tex_size, (unsigned) sarea->tex_handle);
+}
+
+
+/**
+ * A number of the screen parameters are obtained/computed from
+ * information in the SAREA.  This function updates those parameters.
+ */
+void
+intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
+                           struct drm_i915_sarea * sarea)
+{
+   intelScreen->width = sarea->width;
+   intelScreen->height = sarea->height;
+   intelScreen->pitch = sarea->pitch;
+
+   intelScreen->front.offset = sarea->front_offset;
+   intelScreen->front.handle = sarea->front_handle;
+   intelScreen->front.size = sarea->front_size;
+   intelScreen->front.tiled = sarea->front_tiled;
+
+   intelScreen->back.offset = sarea->back_offset;
+   intelScreen->back.handle = sarea->back_handle;
+   intelScreen->back.size = sarea->back_size;
+   intelScreen->back.tiled = sarea->back_tiled;
+
+   if (intelScreen->driScrnPriv->ddx_version.minor >= 8) {
+      intelScreen->third.offset = sarea->third_offset;
+      intelScreen->third.handle = sarea->third_handle;
+      intelScreen->third.size = sarea->third_size;
+      intelScreen->third.tiled = sarea->third_tiled;
+   }
+
+   intelScreen->depth.offset = sarea->depth_offset;
+   intelScreen->depth.handle = sarea->depth_handle;
+   intelScreen->depth.size = sarea->depth_size;
+   intelScreen->depth.tiled = sarea->depth_tiled;
+
+   if (intelScreen->driScrnPriv->ddx_version.minor >= 9) {
+      intelScreen->front.bo_handle = sarea->front_bo_handle;
+      intelScreen->back.bo_handle = sarea->back_bo_handle;
+      intelScreen->third.bo_handle = sarea->third_bo_handle;
+      intelScreen->depth.bo_handle = sarea->depth_bo_handle;
+   } else {
+      intelScreen->front.bo_handle = -1;
+      intelScreen->back.bo_handle = -1;
+      intelScreen->third.bo_handle = -1;
+      intelScreen->depth.bo_handle = -1;
+   }
+
+   intelScreen->tex.offset = sarea->tex_offset;
+   intelScreen->logTextureGranularity = sarea->log_tex_granularity;
+   intelScreen->tex.handle = sarea->tex_handle;
+   intelScreen->tex.size = sarea->tex_size;
+
+   if (0)
+      intelPrintSAREA(sarea);
+}
+
+static const __DRItexOffsetExtension intelTexOffsetExtension = {
+   { __DRI_TEX_OFFSET },
+   intelSetTexOffset,
+};
+
+static const __DRItexBufferExtension intelTexBufferExtension = {
+    { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
+   intelSetTexBuffer,
+};
+
+static const __DRIextension *intelScreenExtensions[] = {
+    &driReadDrawableExtension,
+    &driCopySubBufferExtension.base,
+    &driSwapControlExtension.base,
+    &driFrameTrackingExtension.base,
+    &driMediaStreamCounterExtension.base,
+    &intelTexOffsetExtension.base,
+    &intelTexBufferExtension.base,
+    NULL
+};
+
+static GLboolean
+intel_get_param(__DRIscreenPrivate *psp, int param, int *value)
+{
+   int ret;
+   struct drm_i915_getparam gp;
+
+   gp.param = param;
+   gp.value = value;
+
+   ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
+   if (ret) {
+      fprintf(stderr, "drm_i915_getparam: %d\n", ret);
+      return GL_FALSE;
+   }
+
+   return GL_TRUE;
+}
+
+static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
+{
+   intelScreenPrivate *intelScreen;
+   I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv;
+   struct drm_i915_sarea *sarea;
+
+   if (sPriv->devPrivSize != sizeof(I830DRIRec)) {
+      fprintf(stderr,
+              "\nERROR!  sizeof(I830DRIRec) does not match passed size from device driver\n");
+      return GL_FALSE;
+   }
+
+   /* Allocate the private area */
+   intelScreen = (intelScreenPrivate *) CALLOC(sizeof(intelScreenPrivate));
+   if (!intelScreen) {
+      fprintf(stderr, "\nERROR!  Allocating private area failed\n");
+      return GL_FALSE;
+   }
+   /* parse information in __driConfigOptions */
+   driParseOptionInfo(&intelScreen->optionCache,
+                      __driConfigOptions, __driNConfigOptions);
+
+   intelScreen->driScrnPriv = sPriv;
+   sPriv->private = (void *) intelScreen;
+   sarea = (struct drm_i915_sarea *)
+      (((GLubyte *) sPriv->pSAREA) + gDRIPriv->sarea_priv_offset);
+   intelScreen->sarea = sarea;
+
+   intelScreen->deviceID = gDRIPriv->deviceID;
+
+   intelUpdateScreenFromSAREA(intelScreen, sarea);
+
+   if (!intelMapScreenRegions(sPriv)) {
+      fprintf(stderr, "\nERROR!  mapping regions\n");
+      _mesa_free(intelScreen);
+      sPriv->private = NULL;
+      return GL_FALSE;
+   }
+
+   if (0)
+      intelPrintDRIInfo(intelScreen, sPriv, gDRIPriv);
+
+   intelScreen->drmMinor = sPriv->drm_version.minor;
+
+   /* Determine if IRQs are active? */
+   if (!intel_get_param(sPriv, I915_PARAM_IRQ_ACTIVE,
+			&intelScreen->irq_active))
+      return GL_FALSE;
+
+   sPriv->extensions = intelScreenExtensions;
+
+   return GL_TRUE;
+}
+
+
+static void
+intelDestroyScreen(__DRIscreenPrivate * sPriv)
+{
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
+
+   dri_bufmgr_destroy(intelScreen->bufmgr);
+   intelUnmapScreenRegions(intelScreen);
+
+   FREE(intelScreen);
+   sPriv->private = NULL;
+}
+
+
+/**
+ * This is called when we need to set up GL rendering to a new X window.
+ */
+static GLboolean
+intelCreateBuffer(__DRIscreenPrivate * driScrnPriv,
+                  __DRIdrawablePrivate * driDrawPriv,
+                  const __GLcontextModes * mesaVis, GLboolean isPixmap)
+{
+   intelScreenPrivate *screen = (intelScreenPrivate *) driScrnPriv->private;
+
+   if (isPixmap) {
+      return GL_FALSE;          /* not implemented */
+   }
+   else {
+      GLboolean swStencil = (mesaVis->stencilBits > 0 &&
+                             mesaVis->depthBits != 24);
+      GLenum rgbFormat = (mesaVis->redBits == 5 ? GL_RGB5 : GL_RGBA8);
+
+      struct intel_framebuffer *intel_fb = CALLOC_STRUCT(intel_framebuffer);
+
+      if (!intel_fb)
+	 return GL_FALSE;
+
+      _mesa_initialize_framebuffer(&intel_fb->Base, mesaVis);
+
+      /* setup the hardware-based renderbuffers */
+      intel_fb->color_rb[0] = intel_create_renderbuffer(rgbFormat);
+      _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT,
+			     &intel_fb->color_rb[0]->Base);
+
+      if (mesaVis->doubleBufferMode) {
+	 intel_fb->color_rb[1] = intel_create_renderbuffer(rgbFormat);
+
+         _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT,
+				&intel_fb->color_rb[1]->Base);
+
+	 if (screen->third.handle) {
+	    struct gl_renderbuffer *tmp_rb = NULL;
+
+	    intel_fb->color_rb[2] = intel_create_renderbuffer(rgbFormat);
+	    _mesa_reference_renderbuffer(&tmp_rb, &intel_fb->color_rb[2]->Base);
+	 }
+      }
+
+      if (mesaVis->depthBits == 24) {
+	 if (mesaVis->stencilBits == 8) {
+	    /* combined depth/stencil buffer */
+	    struct intel_renderbuffer *depthStencilRb
+	       = intel_create_renderbuffer(GL_DEPTH24_STENCIL8_EXT);
+	    /* note: bind RB to two attachment points */
+	    _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH,
+				   &depthStencilRb->Base);
+	    _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_STENCIL,
+				   &depthStencilRb->Base);
+	 } else {
+	    struct intel_renderbuffer *depthRb
+	       = intel_create_renderbuffer(GL_DEPTH_COMPONENT24);
+	    _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH,
+				   &depthRb->Base);
+	 }
+      }
+      else if (mesaVis->depthBits == 16) {
+         /* just 16-bit depth buffer, no hw stencil */
+         struct intel_renderbuffer *depthRb
+	    = intel_create_renderbuffer(GL_DEPTH_COMPONENT16);
+         _mesa_add_renderbuffer(&intel_fb->Base, BUFFER_DEPTH, &depthRb->Base);
+      }
+
+      /* now add any/all software-based renderbuffers we may need */
+      _mesa_add_soft_renderbuffers(&intel_fb->Base,
+                                   GL_FALSE, /* never sw color */
+                                   GL_FALSE, /* never sw depth */
+                                   swStencil, mesaVis->accumRedBits > 0,
+                                   GL_FALSE, /* never sw alpha */
+                                   GL_FALSE  /* never sw aux */ );
+      driDrawPriv->driverPrivate = (void *) intel_fb;
+
+      return GL_TRUE;
+   }
+}
+
+static void
+intelDestroyBuffer(__DRIdrawablePrivate * driDrawPriv)
+{
+   _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
+}
+
+
+/**
+ * Get information about previous buffer swaps.
+ */
+static int
+intelGetSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo)
+{
+   struct intel_framebuffer *intel_fb;
+
+   if ((dPriv == NULL) || (dPriv->driverPrivate == NULL)
+       || (sInfo == NULL)) {
+      return -1;
+   }
+
+   intel_fb = dPriv->driverPrivate;
+   sInfo->swap_count = intel_fb->swap_count;
+   sInfo->swap_ust = intel_fb->swap_ust;
+   sInfo->swap_missed_count = intel_fb->swap_missed_count;
+
+   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
+      ? driCalculateSwapUsage(dPriv, 0, intel_fb->swap_missed_ust)
+      : 0.0;
+
+   return 0;
+}
+
+
+/* There are probably better ways to do this, such as an
+ * init-designated function to register chipids and createcontext
+ * functions.
+ */
+extern GLboolean i830CreateContext(const __GLcontextModes * mesaVis,
+                                   __DRIcontextPrivate * driContextPriv,
+                                   void *sharedContextPrivate);
+
+extern GLboolean i915CreateContext(const __GLcontextModes * mesaVis,
+                                   __DRIcontextPrivate * driContextPriv,
+                                   void *sharedContextPrivate);
+extern GLboolean brwCreateContext(const __GLcontextModes * mesaVis,
+				  __DRIcontextPrivate * driContextPriv,
+				  void *sharedContextPrivate);
+
+static GLboolean
+intelCreateContext(const __GLcontextModes * mesaVis,
+                   __DRIcontextPrivate * driContextPriv,
+                   void *sharedContextPrivate)
+{
+   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
+   intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
+
+#ifdef I915
+   if (IS_9XX(intelScreen->deviceID)) {
+      if (!IS_965(intelScreen->deviceID)) {
+	 return i915CreateContext(mesaVis, driContextPriv,
+				  sharedContextPrivate);
+      }
+   } else {
+      intelScreen->no_vbo = GL_TRUE;
+      return i830CreateContext(mesaVis, driContextPriv, sharedContextPrivate);
+   }
+#else
+   if (IS_965(intelScreen->deviceID))
+      return brwCreateContext(mesaVis, driContextPriv, sharedContextPrivate);
+#endif
+   fprintf(stderr, "Unrecognized deviceID %x\n", intelScreen->deviceID);
+   return GL_FALSE;
+}
+
+
+static __DRIconfig **
+intelFillInModes(__DRIscreenPrivate *psp,
+		 unsigned pixel_bits, unsigned depth_bits,
+                 unsigned stencil_bits, GLboolean have_back_buffer)
+{
+   __DRIconfig **configs;
+   __GLcontextModes *m;
+   unsigned depth_buffer_factor;
+   unsigned back_buffer_factor;
+   GLenum fb_format;
+   GLenum fb_type;
+   int i;
+
+   /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
+    * support pageflipping at all.
+    */
+   static const GLenum back_buffer_modes[] = {
+      GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
+   };
+
+   uint8_t depth_bits_array[3];
+   uint8_t stencil_bits_array[3];
+
+   depth_bits_array[0] = 0;
+   depth_bits_array[1] = depth_bits;
+   depth_bits_array[2] = depth_bits;
+
+   /* Just like with the accumulation buffer, always provide some modes
+    * with a stencil buffer.  It will be a sw fallback, but some apps won't
+    * care about that.
+    */
+   stencil_bits_array[0] = 0;
+   stencil_bits_array[1] = 0;
+   if (depth_bits == 24)
+      stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
+
+   stencil_bits_array[2] = (stencil_bits == 0) ? 8 : stencil_bits;
+
+   depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
+   back_buffer_factor = (have_back_buffer) ? 3 : 1;
+
+   if (pixel_bits == 16) {
+      fb_format = GL_RGB;
+      fb_type = GL_UNSIGNED_SHORT_5_6_5;
+   }
+   else {
+      fb_format = GL_BGRA;
+      fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+   }
+
+   configs = driCreateConfigs(fb_format, fb_type,
+			      depth_bits_array, stencil_bits_array,
+			      depth_buffer_factor, back_buffer_modes,
+			      back_buffer_factor);
+   if (configs == NULL) {
+    fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+              __LINE__);
+      return NULL;
+   }
+
+   /* Mark the visual as slow if there are "fake" stencil bits.
+    */
+   for (i = 0; configs[i]; i++) {
+      m = &configs[i]->modes;
+      if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
+         m->visualRating = GLX_SLOW_CONFIG;
+      }
+   }
+
+   return configs;
+}
+
+static GLboolean
+intel_init_bufmgr(intelScreenPrivate *intelScreen)
+{
+   GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
+   int gem_kernel = 0;
+   GLboolean gem_supported;
+   struct drm_i915_getparam gp;
+   __DRIscreenPrivate *spriv = intelScreen->driScrnPriv;
+
+   intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
+
+   gp.param = I915_PARAM_HAS_GEM;
+   gp.value = &gem_kernel;
+
+   (void) drmCommandWriteRead(spriv->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
+
+   /* If we've got a new enough DDX that's initializing GEM and giving us
+    * object handles for the shared buffers, use that.
+    */
+   intelScreen->ttm = GL_FALSE;
+   if (intelScreen->driScrnPriv->dri2.enabled)
+       gem_supported = GL_TRUE;
+   else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
+	    gem_kernel &&
+	    intelScreen->front.bo_handle != -1)
+       gem_supported = GL_TRUE;
+   else
+       gem_supported = GL_FALSE;
+
+   if (!gem_disable && gem_supported) {
+      intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
+      if (intelScreen->bufmgr != NULL)
+	 intelScreen->ttm = GL_TRUE;
+   }
+   /* Otherwise, use the classic buffer manager. */
+   if (intelScreen->bufmgr == NULL) {
+      if (gem_disable) {
+	 fprintf(stderr, "GEM disabled.  Using classic.\n");
+      } else {
+	 fprintf(stderr, "Failed to initialize GEM.  "
+		 "Falling back to classic.\n");
+      }
+
+      if (intelScreen->tex.size == 0) {
+	 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+		 __func__, __LINE__);
+	 return GL_FALSE;
+      }
+
+      intelScreen->bufmgr =
+	 intel_bufmgr_fake_init(spriv->fd,
+				intelScreen->tex.offset,
+				intelScreen->tex.map,
+				intelScreen->tex.size,
+				(unsigned int * volatile)
+				&intelScreen->sarea->last_dispatch);
+   }
+
+   /* XXX bufmgr should be per-screen, not per-context */
+   intelScreen->ttm = intelScreen->ttm;
+
+   return GL_TRUE;
+}
+
+/**
+ * This is the driver specific part of the createNewScreen entry point.
+ * Called when using legacy DRI.
+ * 
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
+ */
+static const __DRIconfig **intelInitScreen(__DRIscreenPrivate *psp)
+{
+   intelScreenPrivate *intelScreen;
+#ifdef I915
+   static const __DRIversion ddx_expected = { 1, 5, 0 };
+#else
+   static const __DRIversion ddx_expected = { 1, 6, 0 };
+#endif
+   static const __DRIversion dri_expected = { 4, 0, 0 };
+   static const __DRIversion drm_expected = { 1, 5, 0 };
+   I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
+
+   if (!driCheckDriDdxDrmVersions2("i915",
+                                   &psp->dri_version, &dri_expected,
+                                   &psp->ddx_version, &ddx_expected,
+                                   &psp->drm_version, &drm_expected)) {
+      return NULL;
+   }
+
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   intelInitExtensions(NULL, GL_TRUE);
+	   
+   if (!intelInitDriver(psp))
+       return NULL;
+
+   psp->extensions = intelScreenExtensions;
+
+   intelScreen = psp->private;
+   if (!intel_init_bufmgr(intelScreen))
+       return GL_FALSE;
+
+   return (const __DRIconfig **)
+       intelFillInModes(psp, dri_priv->cpp * 8,
+			(dri_priv->cpp == 2) ? 16 : 24,
+			(dri_priv->cpp == 2) ? 0  : 8, 1);
+}
+
+struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen)
+{
+  /*
+   * This should probably change to have the screen allocate a dummy
+   * context at screen creation. For now just use the current context.
+   */
+
+  GET_CURRENT_CONTEXT(ctx);
+  if (ctx == NULL) {
+     _mesa_problem(NULL, "No current context in intelScreenContext\n");
+     return NULL;
+  }
+  return intel_context(ctx);
+}
+
+/**
+ * This is the driver specific part of the createNewScreen entry point.
+ * Called when using DRI2.
+ *
+ * \return the __GLcontextModes supported by this driver
+ */
+static const
+__DRIconfig **intelInitScreen2(__DRIscreenPrivate *psp)
+{
+   intelScreenPrivate *intelScreen;
+
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   intelInitExtensions(NULL, GL_TRUE);
+
+   /* Allocate the private area */
+   intelScreen = (intelScreenPrivate *) CALLOC(sizeof(intelScreenPrivate));
+   if (!intelScreen) {
+      fprintf(stderr, "\nERROR!  Allocating private area failed\n");
+      return GL_FALSE;
+   }
+   /* parse information in __driConfigOptions */
+   driParseOptionInfo(&intelScreen->optionCache,
+                      __driConfigOptions, __driNConfigOptions);
+
+   intelScreen->driScrnPriv = psp;
+   psp->private = (void *) intelScreen;
+
+   intelScreen->drmMinor = psp->drm_version.minor;
+
+   /* Determine chipset ID */
+   if (!intel_get_param(psp, I915_PARAM_CHIPSET_ID,
+			&intelScreen->deviceID))
+      return GL_FALSE;
+
+   if (!intel_init_bufmgr(intelScreen))
+       return GL_FALSE;
+
+   intelScreen->irq_active = 1;
+   psp->extensions = intelScreenExtensions;
+
+   return driConcatConfigs(intelFillInModes(psp, 16, 16, 0, 1),
+			   intelFillInModes(psp, 32, 24, 8, 1));
+}
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen		 = intelInitScreen,
+   .DestroyScreen	 = intelDestroyScreen,
+   .CreateContext	 = intelCreateContext,
+   .DestroyContext	 = intelDestroyContext,
+   .CreateBuffer	 = intelCreateBuffer,
+   .DestroyBuffer	 = intelDestroyBuffer,
+   .SwapBuffers		 = intelSwapBuffers,
+   .MakeCurrent		 = intelMakeCurrent,
+   .UnbindContext	 = intelUnbindContext,
+   .GetSwapInfo		 = intelGetSwapInfo,
+   .GetDrawableMSC	 = driDrawableGetMSC32,
+   .WaitForMSC		 = driWaitForMSC32,
+   .CopySubBuffer	 = intelCopySubBuffer,
+
+   .InitScreen2		 = intelInitScreen2,
+};
diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index bf9a716082d..91f0d6d1ae8 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -30,85 +30,87 @@
 
 #include <sys/time.h>
 #include "dri_util.h"
+#include "intel_bufmgr.h"
+#include "i915_drm.h"
 #include "xmlconfig.h"
-#include "i830_common.h"
 
 /* XXX: change name or eliminate to avoid conflict with "struct
  * intel_region"!!!
  */
-typedef struct {
+typedef struct
+{
    drm_handle_t handle;
-   drmSize size;        /* region size in bytes */
-   char *map;           /* memory map */
-   int offset;          /* from start of video mem, in bytes */
-   int pitch;           /* row stride, in pixels */
-   unsigned int tiled; 
+   drmSize size;                /* region size in bytes */
+   char *map;                   /* memory map */
+   int offset;                  /* from start of video mem, in bytes */
+   unsigned int bo_handle;	/* buffer object id if available, or -1 */
+   /**
+    * Flags if the region is tiled.
+    *
+    * Not included is Y versus X tiling.
+    */
+   GLboolean tiled;
 } intelRegion;
 
-typedef struct 
+typedef struct
 {
    intelRegion front;
    intelRegion back;
-   intelRegion rotated;
+   intelRegion third;
    intelRegion depth;
    intelRegion tex;
-   
+
    int deviceID;
    int width;
    int height;
-   int mem;         /* unused */
-
-   int cpp;         /* for front and back buffers */
-   int fbFormat;
+   int pitch;                   /* common row stride, in pixels */
 
    int logTextureGranularity;
-   
+
    __DRIscreenPrivate *driScrnPriv;
-   unsigned int sarea_priv_offset;
+
+   volatile struct drm_i915_sarea *sarea;
 
    int drmMinor;
 
    int irq_active;
-   int allow_batchbuffer;
 
-/*    struct matrix23 rotMatrix; */
+   GLboolean no_hw;
 
-   int current_rotation;  /* 0, 90, 180 or 270 */
-   int rotatedWidth, rotatedHeight;
+   GLboolean no_vbo;
+   int ttm;
+   dri_bufmgr *bufmgr;
 
    /**
-    * Configuration cache with default values for all contexts 
-    */
+   * Configuration cache with default values for all contexts
+   */
    driOptionCache optionCache;
 } intelScreenPrivate;
 
 
-extern GLboolean
-intelMapScreenRegions(__DRIscreenPrivate *sPriv);
 
-extern void
-intelUnmapScreenRegions(intelScreenPrivate *intelScreen);
+extern GLboolean intelMapScreenRegions(__DRIscreenPrivate * sPriv);
 
-extern void
-intelUpdateScreenFromSAREA(intelScreenPrivate *intelScreen,
-                           volatile drmI830Sarea *sarea);
+extern void intelUnmapScreenRegions(intelScreenPrivate * intelScreen);
 
 extern void
-intelDestroyContext(__DRIcontextPrivate *driContextPriv);
+intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
+                           struct drm_i915_sarea * sarea);
 
-extern GLboolean
-intelUnbindContext(__DRIcontextPrivate *driContextPriv);
+extern void intelDestroyContext(__DRIcontextPrivate * driContextPriv);
+
+extern GLboolean intelUnbindContext(__DRIcontextPrivate * driContextPriv);
 
 extern GLboolean
-intelMakeCurrent(__DRIcontextPrivate *driContextPriv,
-                 __DRIdrawablePrivate *driDrawPriv,
-                 __DRIdrawablePrivate *driReadPriv);
+intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
+                 __DRIdrawablePrivate * driDrawPriv,
+                 __DRIdrawablePrivate * driReadPriv);
+
+extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);
 
 extern void
-intelSwapBuffers(__DRIdrawablePrivate *dPriv);
+intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h);
 
-extern void 
-intelCopySubBuffer( __DRIdrawablePrivate *dPriv,
-		    int x, int y, int w, int h );
+extern struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen);
 
 #endif
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
new file mode 100644
index 00000000000..8f4e681ffea
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -0,0 +1,791 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+
+#include "intel_buffers.h"
+#include "intel_fbo.h"
+#include "intel_screen.h"
+#include "intel_span.h"
+#include "intel_regions.h"
+#include "intel_tex.h"
+
+#include "swrast/swrast.h"
+
+static void
+intel_set_span_functions(struct intel_context *intel,
+			 struct gl_renderbuffer *rb);
+
+#define SPAN_CACHE_SIZE		4096
+
+static void
+get_span_cache(struct intel_renderbuffer *irb, uint32_t offset)
+{
+   if (irb->span_cache == NULL) {
+      irb->span_cache = _mesa_malloc(SPAN_CACHE_SIZE);
+      irb->span_cache_offset = -1;
+   }
+
+   if ((offset & ~(SPAN_CACHE_SIZE - 1)) != irb->span_cache_offset) {
+      irb->span_cache_offset = offset & ~(SPAN_CACHE_SIZE - 1);
+      dri_bo_get_subdata(irb->region->buffer, irb->span_cache_offset,
+			 SPAN_CACHE_SIZE, irb->span_cache);
+   }
+}
+
+static void
+clear_span_cache(struct intel_renderbuffer *irb)
+{
+   irb->span_cache_offset = -1;
+}
+
+static uint32_t
+pread_32(struct intel_renderbuffer *irb, uint32_t offset)
+{
+   get_span_cache(irb, offset);
+
+   return *(uint32_t *)(irb->span_cache + (offset & (SPAN_CACHE_SIZE - 1)));
+}
+
+static uint32_t
+pread_xrgb8888(struct intel_renderbuffer *irb, uint32_t offset)
+{
+   get_span_cache(irb, offset);
+
+   return *(uint32_t *)(irb->span_cache + (offset & (SPAN_CACHE_SIZE - 1))) |
+      0xff000000;
+}
+
+static uint16_t
+pread_16(struct intel_renderbuffer *irb, uint32_t offset)
+{
+   get_span_cache(irb, offset);
+
+   return *(uint16_t *)(irb->span_cache + (offset & (SPAN_CACHE_SIZE - 1)));
+}
+
+static uint8_t
+pread_8(struct intel_renderbuffer *irb, uint32_t offset)
+{
+   get_span_cache(irb, offset);
+
+   return *(uint8_t *)(irb->span_cache + (offset & (SPAN_CACHE_SIZE - 1)));
+}
+
+static void
+pwrite_32(struct intel_renderbuffer *irb, uint32_t offset, uint32_t val)
+{
+   clear_span_cache(irb);
+
+   dri_bo_subdata(irb->region->buffer, offset, 4, &val);
+}
+
+static void
+pwrite_xrgb8888(struct intel_renderbuffer *irb, uint32_t offset, uint32_t val)
+{
+   clear_span_cache(irb);
+
+   dri_bo_subdata(irb->region->buffer, offset, 3, &val);
+}
+
+static void
+pwrite_16(struct intel_renderbuffer *irb, uint32_t offset, uint16_t val)
+{
+   clear_span_cache(irb);
+
+   dri_bo_subdata(irb->region->buffer, offset, 2, &val);
+}
+
+static void
+pwrite_8(struct intel_renderbuffer *irb, uint32_t offset, uint8_t val)
+{
+   clear_span_cache(irb);
+
+   dri_bo_subdata(irb->region->buffer, offset, 1, &val);
+}
+
+static uint32_t no_tile_swizzle(struct intel_renderbuffer *irb,
+				int x, int y)
+{
+	return (y * irb->region->pitch + x) * irb->region->cpp;
+}
+
+/*
+ * Deal with tiled surfaces
+ */
+
+static uint32_t x_tile_swizzle(struct intel_renderbuffer *irb,
+			       int x, int y)
+{
+	int	tile_stride;
+	int	xbyte;
+	int	x_tile_off, y_tile_off;
+	int	x_tile_number, y_tile_number;
+	int	tile_off, tile_base;
+	
+	tile_stride = (irb->pfPitch * irb->region->cpp) << 3;
+
+	xbyte = x * irb->region->cpp;
+
+	x_tile_off = xbyte & 0x1ff;
+	y_tile_off = y & 7;
+
+	x_tile_number = xbyte >> 9;
+	y_tile_number = y >> 3;
+
+	tile_off = (y_tile_off << 9) + x_tile_off;
+
+	switch (irb->region->bit_6_swizzle) {
+	case I915_BIT_6_SWIZZLE_NONE:
+	   break;
+	case I915_BIT_6_SWIZZLE_9:
+	   tile_off ^= ((tile_off >> 3) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_10:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 4) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_11:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 5) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_10_11:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 4) & 64) ^
+	      ((tile_off >> 5) & 64);
+	   break;
+	default:
+	   fprintf(stderr, "Unknown tile swizzling mode %d\n",
+		   irb->region->bit_6_swizzle);
+	   exit(1);
+	}
+
+	tile_base = (x_tile_number << 12) + y_tile_number * tile_stride;
+
+#if 0
+	printf("(%d,%d) -> %d + %d = %d (pitch = %d, tstride = %d)\n",
+	       x, y, tile_off, tile_base,
+	       tile_off + tile_base,
+	       irb->pfPitch, tile_stride);
+#endif
+
+	return tile_base + tile_off;
+}
+
+static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
+			       int x, int y)
+{
+	int	tile_stride;
+	int	xbyte;
+	int	x_tile_off, y_tile_off;
+	int	x_tile_number, y_tile_number;
+	int	tile_off, tile_base;
+	
+	tile_stride = (irb->pfPitch * irb->region->cpp) << 5;
+
+	xbyte = x * irb->region->cpp;
+
+	x_tile_off = xbyte & 0x7f;
+	y_tile_off = y & 0x1f;
+
+	x_tile_number = xbyte >> 7;
+	y_tile_number = y >> 5;
+
+	tile_off = ((x_tile_off & ~0xf) << 5) + (y_tile_off << 4) +
+	   (x_tile_off & 0xf);
+
+	switch (irb->region->bit_6_swizzle) {
+	case I915_BIT_6_SWIZZLE_NONE:
+	   break;
+	case I915_BIT_6_SWIZZLE_9:
+	   tile_off ^= ((tile_off >> 3) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_10:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 4) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_11:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 5) & 64);
+	   break;
+	case I915_BIT_6_SWIZZLE_9_10_11:
+	   tile_off ^= ((tile_off >> 3) & 64) ^ ((tile_off >> 4) & 64) ^
+	      ((tile_off >> 5) & 64);
+	   break;
+	default:
+	   fprintf(stderr, "Unknown tile swizzling mode %d\n",
+		   irb->region->bit_6_swizzle);
+	   exit(1);
+	}
+
+	tile_base = (x_tile_number << 12) + y_tile_number * tile_stride;
+
+	return tile_base + tile_off;
+}
+
+/*
+  break intelWriteRGBASpan_ARGB8888
+*/
+
+#undef DBG
+#define DBG 0
+
+#define LOCAL_VARS							\
+   struct intel_context *intel = intel_context(ctx);			\
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);		\
+   const GLint yScale = irb->RenderToTexture ? 1 : -1;			\
+   const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1;	\
+   unsigned int num_cliprects;						\
+   struct drm_clip_rect *cliprects;					\
+   int x_off, y_off;							\
+   GLuint p;								\
+   (void) p;								\
+   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+
+/* XXX FBO: this is identical to the macro in spantmp2.h except we get
+ * the cliprect info from the context, not the driDrawable.
+ * Move this into spantmp2.h someday.
+ */
+#define HW_CLIPLOOP()							\
+   do {									\
+      int _nc = num_cliprects;						\
+      while ( _nc-- ) {							\
+	 int minx = cliprects[_nc].x1 - x_off;				\
+	 int miny = cliprects[_nc].y1 - y_off;				\
+	 int maxx = cliprects[_nc].x2 - x_off;				\
+	 int maxy = cliprects[_nc].y2 - y_off;
+	
+#if 0
+      }}
+#endif
+
+#define Y_FLIP(_y) ((_y) * yScale + yBias)
+
+/* XXX with GEM, these need to tell the kernel */
+#define HW_LOCK()
+
+#define HW_UNLOCK()
+
+/* Convenience macros to avoid typing the swizzle argument over and over */
+#define NO_TILE(_X, _Y) no_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+#define X_TILE(_X, _Y) x_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+#define Y_TILE(_X, _Y) y_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+
+/* 16 bit, RGB565 color spanline and pixel functions
+ */
+#define SPANTMP_PIXEL_FMT GL_RGB
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
+
+#define TAG(x)    intel##x##_RGB565
+#define TAG2(x,y) intel##x##_RGB565##y
+#define GET_VALUE(X, Y) pread_16(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, NO_TILE(X, Y), V)
+#include "spantmp2.h"
+
+/* 32 bit, ARGB8888 color spanline and pixel functions
+ */
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel##x##_ARGB8888
+#define TAG2(x,y) intel##x##_ARGB8888##y
+#define GET_VALUE(X, Y) pread_32(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, NO_TILE(X, Y), V)
+#include "spantmp2.h"
+
+/* 32 bit, xRGB8888 color spanline and pixel functions
+ */
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel##x##_xRGB8888
+#define TAG2(x,y) intel##x##_xRGB8888##y
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, NO_TILE(X, Y), V)
+#include "spantmp2.h"
+
+/* 16 bit RGB565 color tile spanline and pixel functions
+ */
+
+#define SPANTMP_PIXEL_FMT GL_RGB
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
+
+#define TAG(x)    intel_XTile_##x##_RGB565
+#define TAG2(x,y) intel_XTile_##x##_RGB565##y
+#define GET_VALUE(X, Y) pread_16(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, X_TILE(X, Y), V)
+#include "spantmp2.h"
+
+#define SPANTMP_PIXEL_FMT GL_RGB
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
+
+#define TAG(x)    intel_YTile_##x##_RGB565
+#define TAG2(x,y) intel_YTile_##x##_RGB565##y
+#define GET_VALUE(X, Y) pread_16(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, Y_TILE(X, Y), V)
+#include "spantmp2.h"
+
+/* 32 bit ARGB888 color tile spanline and pixel functions
+ */
+
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel_XTile_##x##_ARGB8888
+#define TAG2(x,y) intel_XTile_##x##_ARGB8888##y
+#define GET_VALUE(X, Y) pread_32(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, X_TILE(X, Y), V)
+#include "spantmp2.h"
+
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel_YTile_##x##_ARGB8888
+#define TAG2(x,y) intel_YTile_##x##_ARGB8888##y
+#define GET_VALUE(X, Y) pread_32(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, Y_TILE(X, Y), V)
+#include "spantmp2.h"
+
+/* 32 bit xRGB888 color tile spanline and pixel functions
+ */
+
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel_XTile_##x##_xRGB8888
+#define TAG2(x,y) intel_XTile_##x##_xRGB8888##y
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, X_TILE(X, Y), V)
+#include "spantmp2.h"
+
+#define SPANTMP_PIXEL_FMT GL_BGRA
+#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
+
+#define TAG(x)    intel_YTile_##x##_xRGB8888
+#define TAG2(x,y) intel_YTile_##x##_xRGB8888##y
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, Y_TILE(X, Y), V)
+#include "spantmp2.h"
+
+#define LOCAL_DEPTH_VARS						\
+   struct intel_context *intel = intel_context(ctx);			\
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);		\
+   const GLint yScale = irb->RenderToTexture ? 1 : -1;			\
+   const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1; \
+   unsigned int num_cliprects;						\
+   struct drm_clip_rect *cliprects;					\
+   int x_off, y_off;							\
+   intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+
+
+#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
+
+/**
+ ** 16-bit depthbuffer functions.
+ **/
+#define VALUE_TYPE GLushort
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, NO_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, NO_TILE(_x, _y))
+#define TAG(x) intel##x##_z16
+#include "depthtmp.h"
+
+
+/**
+ ** 16-bit x tile depthbuffer functions.
+ **/
+#define VALUE_TYPE GLushort
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, X_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, X_TILE(_x, _y))
+#define TAG(x) intel_XTile_##x##_z16
+#include "depthtmp.h"
+
+/**
+ ** 16-bit y tile depthbuffer functions.
+ **/
+#define VALUE_TYPE GLushort
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, Y_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, Y_TILE(_x, _y))
+#define TAG(x) intel_YTile_##x##_z16
+#include "depthtmp.h"
+
+
+/**
+ ** 24/8-bit interleaved depth/stencil functions
+ ** Note: we're actually reading back combined depth+stencil values.
+ ** The wrappers in main/depthstencil.c are used to extract the depth
+ ** and stencil values.
+ **/
+#define VALUE_TYPE GLuint
+
+/* Change ZZZS -> SZZZ */
+#define WRITE_DEPTH(_x, _y, d)					\
+   pwrite_32(irb, NO_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
+
+/* Change SZZZ -> ZZZS */
+#define READ_DEPTH( d, _x, _y ) {				\
+   GLuint tmp = pread_32(irb, NO_TILE(_x, _y));			\
+   d = (tmp << 8) | (tmp >> 24);				\
+}
+
+#define TAG(x) intel##x##_z24_s8
+#include "depthtmp.h"
+
+
+/**
+ ** 24/8-bit x-tile interleaved depth/stencil functions
+ ** Note: we're actually reading back combined depth+stencil values.
+ ** The wrappers in main/depthstencil.c are used to extract the depth
+ ** and stencil values.
+ **/
+#define VALUE_TYPE GLuint
+
+/* Change ZZZS -> SZZZ */
+#define WRITE_DEPTH(_x, _y, d)					\
+   pwrite_32(irb, X_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
+
+/* Change SZZZ -> ZZZS */
+#define READ_DEPTH( d, _x, _y ) {				\
+   GLuint tmp = pread_32(irb, X_TILE(_x, _y));		\
+   d = (tmp << 8) | (tmp >> 24);				\
+}
+
+#define TAG(x) intel_XTile_##x##_z24_s8
+#include "depthtmp.h"
+
+/**
+ ** 24/8-bit y-tile interleaved depth/stencil functions
+ ** Note: we're actually reading back combined depth+stencil values.
+ ** The wrappers in main/depthstencil.c are used to extract the depth
+ ** and stencil values.
+ **/
+#define VALUE_TYPE GLuint
+
+/* Change ZZZS -> SZZZ */
+#define WRITE_DEPTH(_x, _y, d)					\
+   pwrite_32(irb, Y_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
+
+/* Change SZZZ -> ZZZS */
+#define READ_DEPTH( d, _x, _y ) {				\
+   GLuint tmp = pread_32(irb, Y_TILE(_x, _y));			\
+   d = (tmp << 8) | (tmp >> 24);				\
+}
+
+#define TAG(x) intel_YTile_##x##_z24_s8
+#include "depthtmp.h"
+
+
+/**
+ ** 8-bit stencil function (XXX FBO: This is obsolete)
+ **/
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, NO_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, NO_TILE(_x, _y) + 3);
+#define TAG(x) intel##x##_z24_s8
+#include "stenciltmp.h"
+
+/**
+ ** 8-bit x-tile stencil function (XXX FBO: This is obsolete)
+ **/
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, X_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, X_TILE(_x, _y) + 3);
+#define TAG(x) intel_XTile_##x##_z24_s8
+#include "stenciltmp.h"
+
+/**
+ ** 8-bit y-tile stencil function (XXX FBO: This is obsolete)
+ **/
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, Y_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, Y_TILE(_x, _y) + 3)
+#define TAG(x) intel_YTile_##x##_z24_s8
+#include "stenciltmp.h"
+
+void
+intel_renderbuffer_map(struct intel_context *intel, struct gl_renderbuffer *rb)
+{
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+
+   if (irb == NULL || irb->region == NULL)
+      return;
+
+   irb->pfPitch = irb->region->pitch;
+
+   intel_set_span_functions(intel, rb);
+}
+
+void
+intel_renderbuffer_unmap(struct intel_context *intel,
+			 struct gl_renderbuffer *rb)
+{
+   struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+
+   if (irb == NULL || irb->region == NULL)
+      return;
+
+   clear_span_cache(irb);
+   irb->pfPitch = 0;
+
+   rb->GetRow = NULL;
+   rb->PutRow = NULL;
+}
+
+/**
+ * Map or unmap all the renderbuffers which we may need during
+ * software rendering.
+ * XXX in the future, we could probably convey extra information to
+ * reduce the number of mappings needed.  I.e. if doing a glReadPixels
+ * from the depth buffer, we really only need one mapping.
+ *
+ * XXX Rewrite this function someday.
+ * We can probably just loop over all the renderbuffer attachments,
+ * map/unmap all of them, and not worry about the _ColorDrawBuffers
+ * _ColorReadBuffer, _DepthBuffer or _StencilBuffer fields.
+ */
+static void
+intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
+{
+   GLcontext *ctx = &intel->ctx;
+   GLuint i, j;
+
+   /* color draw buffers */
+   for (j = 0; j < ctx->DrawBuffer->_NumColorDrawBuffers; j++) {
+      if (map)
+	 intel_renderbuffer_map(intel, ctx->DrawBuffer->_ColorDrawBuffers[j]);
+      else
+	 intel_renderbuffer_unmap(intel, ctx->DrawBuffer->_ColorDrawBuffers[j]);
+   }
+
+   /* check for render to textures */
+   for (i = 0; i < BUFFER_COUNT; i++) {
+      struct gl_renderbuffer_attachment *att =
+         ctx->DrawBuffer->Attachment + i;
+      struct gl_texture_object *tex = att->Texture;
+      if (tex) {
+         /* render to texture */
+         ASSERT(att->Renderbuffer);
+         if (map)
+            intel_tex_map_images(intel, intel_texture_object(tex));
+         else
+            intel_tex_unmap_images(intel, intel_texture_object(tex));
+      }
+   }
+
+   /* color read buffers */
+   if (map)
+      intel_renderbuffer_map(intel, ctx->ReadBuffer->_ColorReadBuffer);
+   else
+      intel_renderbuffer_unmap(intel, ctx->ReadBuffer->_ColorReadBuffer);
+
+   /* depth buffer (Note wrapper!) */
+   if (ctx->DrawBuffer->_DepthBuffer) {
+      if (map)
+	 intel_renderbuffer_map(intel, ctx->DrawBuffer->_DepthBuffer->Wrapped);
+      else
+	 intel_renderbuffer_unmap(intel,
+				  ctx->DrawBuffer->_DepthBuffer->Wrapped);
+   }
+
+   /* stencil buffer (Note wrapper!) */
+   if (ctx->DrawBuffer->_StencilBuffer) {
+      if (map)
+	 intel_renderbuffer_map(intel,
+				ctx->DrawBuffer->_StencilBuffer->Wrapped);
+      else
+	 intel_renderbuffer_unmap(intel,
+				  ctx->DrawBuffer->_StencilBuffer->Wrapped);
+   }
+}
+
+
+
+/**
+ * Prepare for softare rendering.  Map current read/draw framebuffers'
+ * renderbuffes and all currently bound texture objects.
+ *
+ * Old note: Moved locking out to get reasonable span performance.
+ */
+void
+intelSpanRenderStart(GLcontext * ctx)
+{
+   struct intel_context *intel = intel_context(ctx);
+   GLuint i;
+
+   intelFlush(&intel->ctx);
+   LOCK_HARDWARE(intel);
+
+   for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
+      if (ctx->Texture.Unit[i]._ReallyEnabled) {
+         struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current;
+         intel_tex_map_images(intel, intel_texture_object(texObj));
+      }
+   }
+
+   intel_map_unmap_buffers(intel, GL_TRUE);
+}
+
+/**
+ * Called when done softare rendering.  Unmap the buffers we mapped in
+ * the above function.
+ */
+void
+intelSpanRenderFinish(GLcontext * ctx)
+{
+   struct intel_context *intel = intel_context(ctx);
+   GLuint i;
+
+   _swrast_flush(ctx);
+
+   for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) {
+      if (ctx->Texture.Unit[i]._ReallyEnabled) {
+         struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current;
+         intel_tex_unmap_images(intel, intel_texture_object(texObj));
+      }
+   }
+
+   intel_map_unmap_buffers(intel, GL_FALSE);
+
+   UNLOCK_HARDWARE(intel);
+}
+
+
+void
+intelInitSpanFuncs(GLcontext * ctx)
+{
+   struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
+   swdd->SpanRenderStart = intelSpanRenderStart;
+   swdd->SpanRenderFinish = intelSpanRenderFinish;
+}
+
+
+/**
+ * Plug in appropriate span read/write functions for the given renderbuffer.
+ * These are used for the software fallbacks.
+ */
+static void
+intel_set_span_functions(struct intel_context *intel,
+			 struct gl_renderbuffer *rb)
+{
+   struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
+   uint32_t tiling;
+
+   /* If in GEM mode, we need to do the tile address swizzling ourselves,
+    * instead of the fence registers handling it.
+    */
+   if (intel->ttm)
+      tiling = irb->region->tiling;
+   else
+      tiling = I915_TILING_NONE;
+
+   if (rb->_ActualFormat == GL_RGB5) {
+      /* 565 RGB */
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitPointers_RGB565(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitPointers_RGB565(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitPointers_RGB565(rb);
+	 break;
+      }
+   }
+   else if (rb->_ActualFormat == GL_RGB8) {
+      /* 8888 RGBx */
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitPointers_xRGB8888(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitPointers_xRGB8888(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitPointers_xRGB8888(rb);
+	 break;
+      }
+   }
+   else if (rb->_ActualFormat == GL_RGBA8) {
+      /* 8888 RGBA */
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitPointers_ARGB8888(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitPointers_ARGB8888(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitPointers_ARGB8888(rb);
+	 break;
+      }
+   }
+   else if (rb->_ActualFormat == GL_DEPTH_COMPONENT16) {
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitDepthPointers_z16(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitDepthPointers_z16(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitDepthPointers_z16(rb);
+	 break;
+      }
+   }
+   else if (rb->_ActualFormat == GL_DEPTH_COMPONENT24 ||        /* XXX FBO remove */
+            rb->_ActualFormat == GL_DEPTH24_STENCIL8_EXT) {
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitDepthPointers_z24_s8(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitDepthPointers_z24_s8(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitDepthPointers_z24_s8(rb);
+	 break;
+      }
+   }
+   else if (rb->_ActualFormat == GL_STENCIL_INDEX8_EXT) {
+      switch (tiling) {
+      case I915_TILING_NONE:
+      default:
+	 intelInitStencilPointers_z24_s8(rb);
+	 break;
+      case I915_TILING_X:
+	 intel_XTile_InitStencilPointers_z24_s8(rb);
+	 break;
+      case I915_TILING_Y:
+	 intel_YTile_InitStencilPointers_z24_s8(rb);
+	 break;
+      }
+   }
+   else {
+      _mesa_problem(NULL,
+                    "Unexpected _ActualFormat in intelSetSpanFunctions");
+   }
+}
diff --git a/src/mesa/drivers/dri/i965/intel_span.h b/src/mesa/drivers/dri/intel/intel_span.h
index 2d4f8589d0f..acbeb4abe1c 100644
--- a/src/mesa/drivers/dri/i965/intel_span.h
+++ b/src/mesa/drivers/dri/intel/intel_span.h
@@ -28,14 +28,13 @@
 #ifndef _INTEL_SPAN_H
 #define _INTEL_SPAN_H
 
-#include "drirenderbuffer.h"
+extern void intelInitSpanFuncs(GLcontext * ctx);
 
-extern void intelInitSpanFuncs( GLcontext *ctx );
-
-extern void intelSpanRenderFinish( GLcontext *ctx );
-extern void intelSpanRenderStart( GLcontext *ctx );
-
-extern void
-intelSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis);
+extern void intelSpanRenderFinish(GLcontext * ctx);
+extern void intelSpanRenderStart(GLcontext * ctx);
+void intel_renderbuffer_map(struct intel_context *intel,
+			    struct gl_renderbuffer *rb);
+void intel_renderbuffer_unmap(struct intel_context *intel,
+			      struct gl_renderbuffer *rb);
 
 #endif
diff --git a/src/mesa/drivers/dri/intel/intel_tex.c b/src/mesa/drivers/dri/intel/intel_tex.c
new file mode 100644
index 00000000000..82f8b870095
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex.c
@@ -0,0 +1,249 @@
+#include "swrast/swrast.h"
+#include "main/texobj.h"
+#include "main/teximage.h"
+#include "main/mipmap.h"
+#include "intel_context.h"
+#include "intel_mipmap_tree.h"
+#include "intel_tex.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+static GLboolean
+intelIsTextureResident(GLcontext * ctx, struct gl_texture_object *texObj)
+{
+#if 0
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_object *intelObj = intel_texture_object(texObj);
+
+   return
+      intelObj->mt &&
+      intelObj->mt->region &&
+      intel_is_region_resident(intel, intelObj->mt->region);
+#endif
+   return 1;
+}
+
+
+
+static struct gl_texture_image *
+intelNewTextureImage(GLcontext * ctx)
+{
+   DBG("%s\n", __FUNCTION__);
+   (void) ctx;
+   return (struct gl_texture_image *) CALLOC_STRUCT(intel_texture_image);
+}
+
+
+static struct gl_texture_object *
+intelNewTextureObject(GLcontext * ctx, GLuint name, GLenum target)
+{
+   struct intel_texture_object *obj = CALLOC_STRUCT(intel_texture_object);
+
+   DBG("%s\n", __FUNCTION__);
+   _mesa_initialize_texture_object(&obj->base, name, target);
+
+   return &obj->base;
+}
+
+static void 
+intelDeleteTextureObject(GLcontext *ctx,
+			 struct gl_texture_object *texObj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_object *intelObj = intel_texture_object(texObj);
+
+   if (intelObj->mt)
+      intel_miptree_release(intel, &intelObj->mt);
+
+   _mesa_delete_texture_object(ctx, texObj);
+}
+
+
+static void
+intelFreeTextureImageData(GLcontext * ctx, struct gl_texture_image *texImage)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_image *intelImage = intel_texture_image(texImage);
+
+   DBG("%s\n", __FUNCTION__);
+
+   if (intelImage->mt) {
+      intel_miptree_release(intel, &intelImage->mt);
+   }
+
+   if (texImage->Data) {
+      _mesa_free_texmemory(texImage->Data);
+      texImage->Data = NULL;
+   }
+}
+
+
+/* The system memcpy (at least on ubuntu 5.10) has problems copying
+ * to agp (writecombined) memory from a source which isn't 64-byte
+ * aligned - there is a 4x performance falloff.
+ *
+ * The x86 __memcpy is immune to this but is slightly slower
+ * (10%-ish) than the system memcpy.
+ *
+ * The sse_memcpy seems to have a slight cliff at 64/32 bytes, but
+ * isn't much faster than x86_memcpy for agp copies.
+ * 
+ * TODO: switch dynamically.
+ */
+static void *
+do_memcpy(void *dest, const void *src, size_t n)
+{
+   if ((((unsigned) src) & 63) || (((unsigned) dest) & 63)) {
+      return __memcpy(dest, src, n);
+   }
+   else
+      return memcpy(dest, src, n);
+}
+
+
+#if DO_DEBUG && !defined(__ia64__)
+
+#ifndef __x86_64__
+static unsigned
+fastrdtsc(void)
+{
+   unsigned eax;
+   __asm__ volatile ("\t"
+                     "pushl  %%ebx\n\t"
+                     "cpuid\n\t" ".byte 0x0f, 0x31\n\t"
+                     "popl %%ebx\n":"=a" (eax)
+                     :"0"(0)
+                     :"ecx", "edx", "cc");
+
+   return eax;
+}
+#else
+static unsigned
+fastrdtsc(void)
+{
+   unsigned eax;
+   __asm__ volatile ("\t" "cpuid\n\t" ".byte 0x0f, 0x31\n\t":"=a" (eax)
+                     :"0"(0)
+                     :"ecx", "edx", "ebx", "cc");
+
+   return eax;
+}
+#endif
+
+static unsigned
+time_diff(unsigned t, unsigned t2)
+{
+   return ((t < t2) ? t2 - t : 0xFFFFFFFFU - (t - t2 - 1));
+}
+
+
+static void *
+timed_memcpy(void *dest, const void *src, size_t n)
+{
+   void *ret;
+   unsigned t1, t2;
+   double rate;
+
+   if ((((unsigned) src) & 63) || (((unsigned) dest) & 63))
+      _mesa_printf("Warning - non-aligned texture copy!\n");
+
+   t1 = fastrdtsc();
+   ret = do_memcpy(dest, src, n);
+   t2 = fastrdtsc();
+
+   rate = time_diff(t1, t2);
+   rate /= (double) n;
+   _mesa_printf("timed_memcpy: %u %u --> %f clocks/byte\n", t1, t2, rate);
+   return ret;
+}
+#endif /* DO_DEBUG */
+
+/**
+ * Generate new mipmap data from BASE+1 to BASE+p (the minimally-sized mipmap
+ * level).
+ *
+ * The texture object's miptree must be mapped.
+ *
+ * It would be really nice if this was just called by Mesa whenever mipmaps
+ * needed to be regenerated, rather than us having to remember to do so in
+ * each texture image modification path.
+ *
+ * This function should also include an accelerated path.
+ */
+void
+intel_generate_mipmap(GLcontext *ctx, GLenum target,
+                      struct gl_texture_object *texObj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_object *intelObj = intel_texture_object(texObj);
+   GLuint nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
+   int face, i;
+
+   _mesa_generate_mipmap(ctx, target, texObj);
+
+   /* Update the level information in our private data in the new images, since
+    * it didn't get set as part of a normal TexImage path.
+    */
+   for (face = 0; face < nr_faces; face++) {
+      for (i = texObj->BaseLevel + 1; i < texObj->MaxLevel; i++) {
+         struct intel_texture_image *intelImage;
+
+	 intelImage = intel_texture_image(texObj->Image[face][i]);
+	 if (intelImage == NULL)
+	    break;
+
+	 intelImage->level = i;
+	 intelImage->face = face;
+	 /* Unreference the miptree to signal that the new Data is a bare
+	  * pointer from mesa.
+	  */
+	 intel_miptree_release(intel, &intelImage->mt);
+      }
+   }
+}
+
+static void intelGenerateMipmap(GLcontext *ctx, GLenum target, struct gl_texture_object *texObj)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_object *intelObj = intel_texture_object(texObj);
+
+   intel_tex_map_level_images(intel, intelObj, texObj->BaseLevel);
+   intel_generate_mipmap(ctx, target, texObj);
+   intel_tex_unmap_level_images(intel, intelObj, texObj->BaseLevel);
+}
+
+void
+intelInitTextureFuncs(struct dd_function_table *functions)
+{
+   functions->ChooseTextureFormat = intelChooseTextureFormat;
+   functions->TexImage1D = intelTexImage1D;
+   functions->TexImage2D = intelTexImage2D;
+   functions->TexImage3D = intelTexImage3D;
+   functions->TexSubImage1D = intelTexSubImage1D;
+   functions->TexSubImage2D = intelTexSubImage2D;
+   functions->TexSubImage3D = intelTexSubImage3D;
+   functions->CopyTexImage1D = intelCopyTexImage1D;
+   functions->CopyTexImage2D = intelCopyTexImage2D;
+   functions->CopyTexSubImage1D = intelCopyTexSubImage1D;
+   functions->CopyTexSubImage2D = intelCopyTexSubImage2D;
+   functions->GetTexImage = intelGetTexImage;
+   functions->GenerateMipmap = intelGenerateMipmap;
+
+   /* compressed texture functions */
+   functions->CompressedTexImage2D = intelCompressedTexImage2D;
+   functions->GetCompressedTexImage = intelGetCompressedTexImage;
+
+   functions->NewTextureObject = intelNewTextureObject;
+   functions->NewTextureImage = intelNewTextureImage;
+   functions->DeleteTexture = intelDeleteTextureObject;
+   functions->FreeTexImageData = intelFreeTextureImageData;
+   functions->UpdateTexturePalette = 0;
+   functions->IsTextureResident = intelIsTextureResident;
+
+#if DO_DEBUG && !defined(__ia64__)
+   if (INTEL_DEBUG & DEBUG_BUFMGR)
+      functions->TextureMemCpy = timed_memcpy;
+   else
+#endif
+      functions->TextureMemCpy = do_memcpy;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex.h
new file mode 100644
index 00000000000..6219c1c953b
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex.h
@@ -0,0 +1,164 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#ifndef INTELTEX_INC
+#define INTELTEX_INC
+
+#include "main/mtypes.h"
+#include "intel_context.h"
+#include "texmem.h"
+
+
+void intelInitTextureFuncs(struct dd_function_table *functions);
+
+const struct gl_texture_format *intelChooseTextureFormat(GLcontext * ctx,
+                                                         GLint internalFormat,
+                                                         GLenum format,
+                                                         GLenum type);
+
+
+void intelTexImage3D(GLcontext * ctx,
+                     GLenum target, GLint level,
+                     GLint internalFormat,
+                     GLint width, GLint height, GLint depth,
+                     GLint border,
+                     GLenum format, GLenum type, const void *pixels,
+                     const struct gl_pixelstore_attrib *packing,
+                     struct gl_texture_object *texObj,
+                     struct gl_texture_image *texImage);
+
+void intelTexSubImage3D(GLcontext * ctx,
+                        GLenum target,
+                        GLint level,
+                        GLint xoffset, GLint yoffset, GLint zoffset,
+                        GLsizei width, GLsizei height, GLsizei depth,
+                        GLenum format, GLenum type,
+                        const GLvoid * pixels,
+                        const struct gl_pixelstore_attrib *packing,
+                        struct gl_texture_object *texObj,
+                        struct gl_texture_image *texImage);
+
+void intelTexImage2D(GLcontext * ctx,
+                     GLenum target, GLint level,
+                     GLint internalFormat,
+                     GLint width, GLint height, GLint border,
+                     GLenum format, GLenum type, const void *pixels,
+                     const struct gl_pixelstore_attrib *packing,
+                     struct gl_texture_object *texObj,
+                     struct gl_texture_image *texImage);
+
+void intelTexSubImage2D(GLcontext * ctx,
+                        GLenum target,
+                        GLint level,
+                        GLint xoffset, GLint yoffset,
+                        GLsizei width, GLsizei height,
+                        GLenum format, GLenum type,
+                        const GLvoid * pixels,
+                        const struct gl_pixelstore_attrib *packing,
+                        struct gl_texture_object *texObj,
+                        struct gl_texture_image *texImage);
+
+void intelTexImage1D(GLcontext * ctx,
+                     GLenum target, GLint level,
+                     GLint internalFormat,
+                     GLint width, GLint border,
+                     GLenum format, GLenum type, const void *pixels,
+                     const struct gl_pixelstore_attrib *packing,
+                     struct gl_texture_object *texObj,
+                     struct gl_texture_image *texImage);
+
+void intelTexSubImage1D(GLcontext * ctx,
+                        GLenum target,
+                        GLint level,
+                        GLint xoffset,
+                        GLsizei width,
+                        GLenum format, GLenum type,
+                        const GLvoid * pixels,
+                        const struct gl_pixelstore_attrib *packing,
+                        struct gl_texture_object *texObj,
+                        struct gl_texture_image *texImage);
+
+void intelCopyTexImage1D(GLcontext * ctx, GLenum target, GLint level,
+                         GLenum internalFormat,
+                         GLint x, GLint y, GLsizei width, GLint border);
+
+void intelCopyTexImage2D(GLcontext * ctx, GLenum target, GLint level,
+                         GLenum internalFormat,
+                         GLint x, GLint y, GLsizei width, GLsizei height,
+                         GLint border);
+
+void intelCopyTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
+                            GLint xoffset, GLint x, GLint y, GLsizei width);
+
+void intelCopyTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
+                            GLint xoffset, GLint yoffset,
+                            GLint x, GLint y, GLsizei width, GLsizei height);
+
+void intelGetTexImage(GLcontext * ctx, GLenum target, GLint level,
+                      GLenum format, GLenum type, GLvoid * pixels,
+                      struct gl_texture_object *texObj,
+                      struct gl_texture_image *texImage);
+
+void intelCompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level,
+				GLint internalFormat,
+				GLint width, GLint height, GLint border,
+				GLsizei imageSize, const GLvoid *data,
+				struct gl_texture_object *texObj,
+				struct gl_texture_image *texImage );
+
+void intelGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
+				GLvoid *pixels,
+				struct gl_texture_object *texObj,
+				struct gl_texture_image *texImage);
+
+void intelSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
+		       unsigned long long offset, GLint depth, GLuint pitch);
+void intelSetTexBuffer(__DRIcontext *pDRICtx,
+		       GLint target, __DRIdrawable *pDraw);
+
+GLuint intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit);
+
+void intel_tex_map_level_images(struct intel_context *intel,
+				struct intel_texture_object *intelObj,
+				int level);
+
+void intel_tex_unmap_level_images(struct intel_context *intel,
+				  struct intel_texture_object *intelObj,
+				  int level);
+
+void intel_tex_map_images(struct intel_context *intel,
+                          struct intel_texture_object *intelObj);
+
+void intel_tex_unmap_images(struct intel_context *intel,
+                            struct intel_texture_object *intelObj);
+
+int intel_compressed_num_bytes(GLuint mesaFormat);
+
+void intel_generate_mipmap(GLcontext *ctx, GLenum target,
+			   struct gl_texture_object *texObj);
+
+#endif
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
new file mode 100644
index 00000000000..b893990d271
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -0,0 +1,306 @@
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/teximage.h"
+#include "main/mipmap.h"
+#include "swrast/swrast.h"
+
+#include "intel_screen.h"
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_buffers.h"
+#include "intel_mipmap_tree.h"
+#include "intel_regions.h"
+#include "intel_fbo.h"
+#include "intel_tex.h"
+#include "intel_blit.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+/**
+ * Get the intel_region which is the source for any glCopyTex[Sub]Image call.
+ *
+ * Do the best we can using the blitter.  A future project is to use
+ * the texture engine and fragment programs for these copies.
+ */
+static const struct intel_region *
+get_teximage_source(struct intel_context *intel, GLenum internalFormat)
+{
+   struct intel_renderbuffer *irb;
+
+   DBG("%s %s\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(internalFormat));
+
+   switch (internalFormat) {
+   case GL_DEPTH_COMPONENT:
+   case GL_DEPTH_COMPONENT16:
+      irb = intel_get_renderbuffer(intel->ctx.ReadBuffer, BUFFER_DEPTH);
+      if (irb && irb->region && irb->region->cpp == 2)
+         return irb->region;
+      return NULL;
+   case GL_DEPTH24_STENCIL8_EXT:
+   case GL_DEPTH_STENCIL_EXT:
+      irb = intel_get_renderbuffer(intel->ctx.ReadBuffer, BUFFER_DEPTH);
+      if (irb && irb->region && irb->region->cpp == 4)
+         return irb->region;
+      return NULL;
+   case GL_RGBA:
+   case GL_RGBA8:
+      return intel_readbuf_region(intel);
+   case GL_RGB:
+      if (intel->ctx.Visual.rgbBits == 16)
+         return intel_readbuf_region(intel);
+      return NULL;
+   default:
+      return NULL;
+   }
+}
+
+
+static GLboolean
+do_copy_texsubimage(struct intel_context *intel,
+		    GLenum target,
+                    struct intel_texture_image *intelImage,
+                    GLenum internalFormat,
+                    GLint dstx, GLint dsty,
+                    GLint x, GLint y, GLsizei width, GLsizei height)
+{
+   GLcontext *ctx = &intel->ctx;
+   struct gl_texture_object *texObj = intelImage->base.TexObject;
+   const struct intel_region *src =
+      get_teximage_source(intel, internalFormat);
+
+   if (!intelImage->mt || !src) {
+      if (INTEL_DEBUG & DEBUG_FALLBACKS)
+	 fprintf(stderr, "%s fail %p %p\n",
+		 __FUNCTION__, intelImage->mt, src);
+      return GL_FALSE;
+   }
+
+   intelFlush(ctx);
+   LOCK_HARDWARE(intel);
+   {
+      GLuint image_offset = intel_miptree_image_offset(intelImage->mt,
+                                                       intelImage->face,
+                                                       intelImage->level);
+      const GLint orig_x = x;
+      const GLint orig_y = y;
+      const struct gl_framebuffer *fb = ctx->DrawBuffer;
+
+      if (_mesa_clip_to_region(fb->_Xmin, fb->_Ymin, fb->_Xmax, fb->_Ymax,
+                               &x, &y, &width, &height)) {
+	 GLshort src_pitch;
+
+         /* Update dst for clipped src.  Need to also clip the source rect.
+          */
+         dstx += x - orig_x;
+         dsty += y - orig_y;
+
+	 /* image_offset may be non-page-aligned, but that's illegal for tiling.
+	  */
+	 assert(intelImage->mt->region->tiling == I915_TILING_NONE);
+
+         if (ctx->ReadBuffer->Name == 0) {
+            /* reading from a window, adjust x, y */
+            __DRIdrawablePrivate *dPriv = intel->driDrawable;
+	    y = dPriv->y + (dPriv->h - (y + height));
+            x += dPriv->x;
+
+	    /* Invert the data coming from the source rectangle due to GL
+	     * and hardware disagreeing on where y=0 is.
+	     *
+	     * It appears that our offsets and pitches get mangled
+	     * appropriately by the hardware, and we don't need to adjust them
+	     * on our own.
+	     */
+	    src_pitch = -src->pitch;
+         }
+         else {
+            /* reading from a FBO, y is already oriented the way we like */
+	    src_pitch = src->pitch;
+         }
+
+         intelEmitCopyBlit(intel,
+                           intelImage->mt->cpp,
+                           src_pitch,
+                           src->buffer,
+                           0,
+			   src->tiling,
+                           intelImage->mt->pitch,
+                           intelImage->mt->region->buffer,
+                           image_offset,
+			   intelImage->mt->region->tiling,
+                           x, y, dstx, dsty, width, height,
+			   GL_COPY);
+      }
+   }
+
+
+   UNLOCK_HARDWARE(intel);
+
+   /* GL_SGIS_generate_mipmap */
+   if (intelImage->level == texObj->BaseLevel && texObj->GenerateMipmap) {
+      ctx->Driver.GenerateMipmap(ctx, target, texObj);
+   }
+
+   return GL_TRUE;
+}
+
+
+
+
+
+void
+intelCopyTexImage1D(GLcontext * ctx, GLenum target, GLint level,
+                    GLenum internalFormat,
+                    GLint x, GLint y, GLsizei width, GLint border)
+{
+   struct gl_texture_unit *texUnit =
+      &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
+   struct gl_texture_object *texObj =
+      _mesa_select_tex_object(ctx, texUnit, target);
+   struct gl_texture_image *texImage =
+      _mesa_select_tex_image(ctx, texObj, target, level);
+
+   if (border)
+      goto fail;
+
+   /* Setup or redefine the texture object, mipmap tree and texture
+    * image.  Don't populate yet.  
+    */
+   ctx->Driver.TexImage1D(ctx, target, level, internalFormat,
+                          width, border,
+                          GL_RGBA, CHAN_TYPE, NULL,
+                          &ctx->DefaultPacking, texObj, texImage);
+
+   if (!do_copy_texsubimage(intel_context(ctx), target,
+                            intel_texture_image(texImage),
+                            internalFormat, 0, 0, x, y, width, 1))
+      goto fail;
+
+   return;
+
+ fail:
+   _swrast_copy_teximage1d(ctx, target, level, internalFormat, x, y,
+                           width, border);
+}
+
+void
+intelCopyTexImage2D(GLcontext * ctx, GLenum target, GLint level,
+                    GLenum internalFormat,
+                    GLint x, GLint y, GLsizei width, GLsizei height,
+                    GLint border)
+{
+   struct gl_texture_unit *texUnit =
+      &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
+   struct gl_texture_object *texObj =
+      _mesa_select_tex_object(ctx, texUnit, target);
+   struct gl_texture_image *texImage =
+      _mesa_select_tex_image(ctx, texObj, target, level);
+
+   if (border)
+      goto fail;
+
+   /* Setup or redefine the texture object, mipmap tree and texture
+    * image.  Don't populate yet.  
+    */
+   ctx->Driver.TexImage2D(ctx, target, level, internalFormat,
+                          width, height, border,
+                          GL_RGBA, CHAN_TYPE, NULL,
+                          &ctx->DefaultPacking, texObj, texImage);
+
+
+   if (!do_copy_texsubimage(intel_context(ctx), target,
+                            intel_texture_image(texImage),
+                            internalFormat, 0, 0, x, y, width, height))
+      goto fail;
+
+   return;
+
+ fail:
+   _swrast_copy_teximage2d(ctx, target, level, internalFormat, x, y,
+                           width, height, border);
+}
+
+
+void
+intelCopyTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
+                       GLint xoffset, GLint x, GLint y, GLsizei width)
+{
+   struct gl_texture_unit *texUnit =
+      &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
+   struct gl_texture_object *texObj =
+      _mesa_select_tex_object(ctx, texUnit, target);
+   struct gl_texture_image *texImage =
+      _mesa_select_tex_image(ctx, texObj, target, level);
+   GLenum internalFormat = texImage->InternalFormat;
+
+   /* XXX need to check <border> as in above function? */
+
+   /* Need to check texture is compatible with source format. 
+    */
+
+   if (!do_copy_texsubimage(intel_context(ctx), target,
+                            intel_texture_image(texImage),
+                            internalFormat, xoffset, 0, x, y, width, 1)) {
+      _swrast_copy_texsubimage1d(ctx, target, level, xoffset, x, y, width);
+   }
+}
+
+
+
+void
+intelCopyTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
+                       GLint xoffset, GLint yoffset,
+                       GLint x, GLint y, GLsizei width, GLsizei height)
+{
+   struct gl_texture_unit *texUnit =
+      &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
+   struct gl_texture_object *texObj =
+      _mesa_select_tex_object(ctx, texUnit, target);
+   struct gl_texture_image *texImage =
+      _mesa_select_tex_image(ctx, texObj, target, level);
+   GLenum internalFormat = texImage->InternalFormat;
+
+
+   /* Need to check texture is compatible with source format. 
+    */
+
+   if (!do_copy_texsubimage(intel_context(ctx), target,
+                            intel_texture_image(texImage),
+                            internalFormat,
+                            xoffset, yoffset, x, y, width, height)) {
+
+      DBG("%s - fallback to swrast\n", __FUNCTION__);
+
+      _swrast_copy_texsubimage2d(ctx, target, level,
+                                 xoffset, yoffset, x, y, width, height);
+   }
+}
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
new file mode 100644
index 00000000000..2be060dd3e3
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -0,0 +1,193 @@
+#include "intel_context.h"
+#include "intel_tex.h"
+#include "main/texformat.h"
+#include "main/enums.h"
+
+/* It works out that this function is fine for all the supported
+ * hardware.  However, there is still a need to map the formats onto
+ * hardware descriptors.
+ */
+/* Note that the i915 can actually support many more formats than
+ * these if we take the step of simply swizzling the colors
+ * immediately after sampling...
+ */
+const struct gl_texture_format *
+intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
+                         GLenum format, GLenum type)
+{
+   struct intel_context *intel = intel_context(ctx);
+   const GLboolean do32bpt = (intel->ctx.Visual.rgbBits == 32);
+
+   switch (internalFormat) {
+   case 4:
+   case GL_RGBA:
+   case GL_COMPRESSED_RGBA:
+      if (format == GL_BGRA) {
+         if (type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) {
+            return &_mesa_texformat_argb8888;
+         }
+         else if (type == GL_UNSIGNED_SHORT_4_4_4_4_REV) {
+            return &_mesa_texformat_argb4444;
+         }
+         else if (type == GL_UNSIGNED_SHORT_1_5_5_5_REV) {
+            return &_mesa_texformat_argb1555;
+         }
+      }
+      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444;
+
+   case 3:
+   case GL_RGB:
+   case GL_COMPRESSED_RGB:
+      if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) {
+         return &_mesa_texformat_rgb565;
+      }
+      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_rgb565;
+
+   case GL_RGBA8:
+   case GL_RGB10_A2:
+   case GL_RGBA12:
+   case GL_RGBA16:
+      return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb4444;
+
+   case GL_RGBA4:
+   case GL_RGBA2:
+      return &_mesa_texformat_argb4444;
+
+   case GL_RGB5_A1:
+      return &_mesa_texformat_argb1555;
+
+   case GL_RGB8:
+   case GL_RGB10:
+   case GL_RGB12:
+   case GL_RGB16:
+      return &_mesa_texformat_argb8888;
+
+   case GL_RGB5:
+   case GL_RGB4:
+   case GL_R3_G3_B2:
+      return &_mesa_texformat_rgb565;
+
+   case GL_ALPHA:
+   case GL_ALPHA4:
+   case GL_ALPHA8:
+   case GL_ALPHA12:
+   case GL_ALPHA16:
+   case GL_COMPRESSED_ALPHA:
+      return &_mesa_texformat_a8;
+
+   case 1:
+   case GL_LUMINANCE:
+   case GL_LUMINANCE4:
+   case GL_LUMINANCE8:
+   case GL_LUMINANCE12:
+   case GL_LUMINANCE16:
+   case GL_COMPRESSED_LUMINANCE:
+      return &_mesa_texformat_l8;
+
+   case 2:
+   case GL_LUMINANCE_ALPHA:
+   case GL_LUMINANCE4_ALPHA4:
+   case GL_LUMINANCE6_ALPHA2:
+   case GL_LUMINANCE8_ALPHA8:
+   case GL_LUMINANCE12_ALPHA4:
+   case GL_LUMINANCE12_ALPHA12:
+   case GL_LUMINANCE16_ALPHA16:
+   case GL_COMPRESSED_LUMINANCE_ALPHA:
+      return &_mesa_texformat_al88;
+
+   case GL_INTENSITY:
+   case GL_INTENSITY4:
+   case GL_INTENSITY8:
+   case GL_INTENSITY12:
+   case GL_INTENSITY16:
+   case GL_COMPRESSED_INTENSITY:
+      return &_mesa_texformat_i8;
+
+   case GL_YCBCR_MESA:
+      if (type == GL_UNSIGNED_SHORT_8_8_MESA || type == GL_UNSIGNED_BYTE)
+         return &_mesa_texformat_ycbcr;
+      else
+         return &_mesa_texformat_ycbcr_rev;
+
+   case GL_COMPRESSED_RGB_FXT1_3DFX:
+      return &_mesa_texformat_rgb_fxt1;
+   case GL_COMPRESSED_RGBA_FXT1_3DFX:
+      return &_mesa_texformat_rgba_fxt1;
+
+   case GL_RGB_S3TC:
+   case GL_RGB4_S3TC:
+   case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
+      return &_mesa_texformat_rgb_dxt1;
+
+   case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
+      return &_mesa_texformat_rgba_dxt1;
+
+   case GL_RGBA_S3TC:
+   case GL_RGBA4_S3TC:
+   case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
+      return &_mesa_texformat_rgba_dxt3;
+
+   case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
+      return &_mesa_texformat_rgba_dxt5;
+
+   case GL_DEPTH_COMPONENT:
+   case GL_DEPTH_COMPONENT16:
+   case GL_DEPTH_COMPONENT24:
+   case GL_DEPTH_COMPONENT32:
+      return &_mesa_texformat_z16;
+
+   case GL_DEPTH_STENCIL_EXT:
+   case GL_DEPTH24_STENCIL8_EXT:
+      return &_mesa_texformat_s8_z24;
+
+#ifndef I915
+   case GL_SRGB_EXT:
+   case GL_SRGB8_EXT:
+   case GL_SRGB_ALPHA_EXT:
+   case GL_SRGB8_ALPHA8_EXT:
+   case GL_SLUMINANCE_EXT:
+   case GL_SLUMINANCE8_EXT:
+   case GL_SLUMINANCE_ALPHA_EXT:
+   case GL_SLUMINANCE8_ALPHA8_EXT:
+   case GL_COMPRESSED_SRGB_EXT:
+   case GL_COMPRESSED_SRGB_ALPHA_EXT:
+   case GL_COMPRESSED_SLUMINANCE_EXT:
+   case GL_COMPRESSED_SLUMINANCE_ALPHA_EXT:
+       return &_mesa_texformat_srgba8;
+   case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT:
+   case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT:
+   case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT:
+   case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT:
+     return &_mesa_texformat_srgb_dxt1;
+#endif
+
+   default:
+      fprintf(stderr, "unexpected texture format %s in %s\n",
+              _mesa_lookup_enum_by_nr(internalFormat), __FUNCTION__);
+      return NULL;
+   }
+
+   return NULL;                 /* never get here */
+}
+
+int intel_compressed_num_bytes(GLuint mesaFormat)
+{
+   int bytes = 0;
+   switch(mesaFormat) {
+     
+   case MESA_FORMAT_RGB_FXT1:
+   case MESA_FORMAT_RGBA_FXT1:
+   case MESA_FORMAT_RGB_DXT1:
+   case MESA_FORMAT_RGBA_DXT1:
+     bytes = 2;
+     break;
+     
+   case MESA_FORMAT_RGBA_DXT3:
+   case MESA_FORMAT_RGBA_DXT5:
+     bytes = 4;
+   default:
+     break;
+   }
+   
+   return bytes;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c
new file mode 100644
index 00000000000..2ac7dceb0fc
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex_image.c
@@ -0,0 +1,778 @@
+
+#include <stdlib.h>
+#include <stdio.h>
+
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/colortab.h"
+#include "main/convolve.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/texcompress.h"
+#include "main/texformat.h"
+#include "main/texobj.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+
+#include "intel_context.h"
+#include "intel_mipmap_tree.h"
+#include "intel_buffer_objects.h"
+#include "intel_batchbuffer.h"
+#include "intel_tex.h"
+#include "intel_blit.h"
+#include "intel_fbo.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+/* Functions to store texture images.  Where possible, mipmap_tree's
+ * will be created or further instantiated with image data, otherwise
+ * images will be stored in malloc'd memory.  A validation step is
+ * required to pull those images into a mipmap tree, or otherwise
+ * decide a fallback is required.
+ */
+
+
+static int
+logbase2(int n)
+{
+   GLint i = 1;
+   GLint log2 = 0;
+
+   while (n > i) {
+      i *= 2;
+      log2++;
+   }
+
+   return log2;
+}
+
+
+/* Otherwise, store it in memory if (Border != 0) or (any dimension ==
+ * 1).
+ *    
+ * Otherwise, if max_level >= level >= min_level, create tree with
+ * space for textures from min_level down to max_level.
+ *
+ * Otherwise, create tree with space for textures from (level
+ * 0)..(1x1).  Consider pruning this tree at a validation if the
+ * saving is worth it.
+ */
+static void
+guess_and_alloc_mipmap_tree(struct intel_context *intel,
+                            struct intel_texture_object *intelObj,
+                            struct intel_texture_image *intelImage)
+{
+   GLuint firstLevel;
+   GLuint lastLevel;
+   GLuint width = intelImage->base.Width;
+   GLuint height = intelImage->base.Height;
+   GLuint depth = intelImage->base.Depth;
+   GLuint l2width, l2height, l2depth;
+   GLuint i, comp_byte = 0;
+
+   DBG("%s\n", __FUNCTION__);
+
+   if (intelImage->base.Border ||
+       ((intelImage->base._BaseFormat == GL_DEPTH_COMPONENT) && 
+        ((intelObj->base.WrapS == GL_CLAMP_TO_BORDER) ||
+         (intelObj->base.WrapT == GL_CLAMP_TO_BORDER))))
+      return;
+
+   if (intelImage->level > intelObj->base.BaseLevel &&
+       (intelImage->base.Width == 1 ||
+        (intelObj->base.Target != GL_TEXTURE_1D &&
+         intelImage->base.Height == 1) ||
+        (intelObj->base.Target == GL_TEXTURE_3D &&
+         intelImage->base.Depth == 1)))
+      return;
+
+   /* If this image disrespects BaseLevel, allocate from level zero.
+    * Usually BaseLevel == 0, so it's unlikely to happen.
+    */
+   if (intelImage->level < intelObj->base.BaseLevel)
+      firstLevel = 0;
+   else
+      firstLevel = intelObj->base.BaseLevel;
+
+
+   /* Figure out image dimensions at start level. 
+    */
+   for (i = intelImage->level; i > firstLevel; i--) {
+      width <<= 1;
+      if (height != 1)
+         height <<= 1;
+      if (depth != 1)
+         depth <<= 1;
+   }
+
+   /* Guess a reasonable value for lastLevel.  This is probably going
+    * to be wrong fairly often and might mean that we have to look at
+    * resizable buffers, or require that buffers implement lazy
+    * pagetable arrangements.
+    */
+   if ((intelObj->base.MinFilter == GL_NEAREST ||
+        intelObj->base.MinFilter == GL_LINEAR) &&
+       intelImage->level == firstLevel) {
+      lastLevel = firstLevel;
+   }
+   else {
+      l2width = logbase2(width);
+      l2height = logbase2(height);
+      l2depth = logbase2(depth);
+      lastLevel = firstLevel + MAX2(MAX2(l2width, l2height), l2depth);
+   }
+
+   assert(!intelObj->mt);
+   if (intelImage->base.IsCompressed)
+      comp_byte = intel_compressed_num_bytes(intelImage->base.TexFormat->MesaFormat);
+   intelObj->mt = intel_miptree_create(intel,
+                                       intelObj->base.Target,
+                                       intelImage->base.InternalFormat,
+                                       firstLevel,
+                                       lastLevel,
+                                       width,
+                                       height,
+                                       depth,
+                                       intelImage->base.TexFormat->TexelBytes,
+                                       comp_byte);
+
+   DBG("%s - success\n", __FUNCTION__);
+}
+
+
+
+
+static GLuint
+target_to_face(GLenum target)
+{
+   switch (target) {
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_X_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_X_ARB:
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_Y_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y_ARB:
+   case GL_TEXTURE_CUBE_MAP_POSITIVE_Z_ARB:
+   case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z_ARB:
+      return ((GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X);
+   default:
+      return 0;
+   }
+}
+
+/* There are actually quite a few combinations this will work for,
+ * more than what I've listed here.
+ */
+static GLboolean
+check_pbo_format(GLint internalFormat,
+                 GLenum format, GLenum type,
+                 const struct gl_texture_format *mesa_format)
+{
+   switch (internalFormat) {
+   case 4:
+   case GL_RGBA:
+      return (format == GL_BGRA &&
+              (type == GL_UNSIGNED_BYTE ||
+               type == GL_UNSIGNED_INT_8_8_8_8_REV) &&
+              mesa_format == &_mesa_texformat_argb8888);
+   case 3:
+   case GL_RGB:
+      return (format == GL_RGB &&
+              type == GL_UNSIGNED_SHORT_5_6_5 &&
+              mesa_format == &_mesa_texformat_rgb565);
+   case GL_YCBCR_MESA:
+      return (type == GL_UNSIGNED_SHORT_8_8_MESA || type == GL_UNSIGNED_BYTE);
+   default:
+      return GL_FALSE;
+   }
+}
+
+
+/* XXX: Do this for TexSubImage also:
+ */
+static GLboolean
+try_pbo_upload(struct intel_context *intel,
+               struct intel_texture_image *intelImage,
+               const struct gl_pixelstore_attrib *unpack,
+               GLint internalFormat,
+               GLint width, GLint height,
+               GLenum format, GLenum type, const void *pixels)
+{
+   struct intel_buffer_object *pbo = intel_buffer_object(unpack->BufferObj);
+   GLuint src_offset, src_stride;
+   GLuint dst_offset, dst_stride;
+
+   if (!pbo ||
+       intel->ctx._ImageTransferState ||
+       unpack->SkipPixels || unpack->SkipRows) {
+      _mesa_printf("%s: failure 1\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   src_offset = (GLuint) pixels;
+
+   if (unpack->RowLength > 0)
+      src_stride = unpack->RowLength;
+   else
+      src_stride = width;
+
+   dst_offset = intel_miptree_image_offset(intelImage->mt,
+                                           intelImage->face,
+                                           intelImage->level);
+
+   dst_stride = intelImage->mt->pitch;
+
+   intelFlush(&intel->ctx);
+   LOCK_HARDWARE(intel);
+   {
+      dri_bo *src_buffer = intel_bufferobj_buffer(intel, pbo, INTEL_READ);
+      dri_bo *dst_buffer = intel_region_buffer(intel,
+					       intelImage->mt->region,
+					       INTEL_WRITE_FULL);
+
+
+      intelEmitCopyBlit(intel,
+                        intelImage->mt->cpp,
+                        src_stride, src_buffer, src_offset, GL_FALSE,
+                        dst_stride, dst_buffer, dst_offset, GL_FALSE,
+                        0, 0, 0, 0, width, height,
+			GL_COPY);
+   }
+   UNLOCK_HARDWARE(intel);
+
+   return GL_TRUE;
+}
+
+
+
+static GLboolean
+try_pbo_zcopy(struct intel_context *intel,
+              struct intel_texture_image *intelImage,
+              const struct gl_pixelstore_attrib *unpack,
+              GLint internalFormat,
+              GLint width, GLint height,
+              GLenum format, GLenum type, const void *pixels)
+{
+   struct intel_buffer_object *pbo = intel_buffer_object(unpack->BufferObj);
+   GLuint src_offset, src_stride;
+   GLuint dst_offset, dst_stride;
+
+   if (!pbo ||
+       intel->ctx._ImageTransferState ||
+       unpack->SkipPixels || unpack->SkipRows) {
+      _mesa_printf("%s: failure 1\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   src_offset = (GLuint) pixels;
+
+   if (unpack->RowLength > 0)
+      src_stride = unpack->RowLength;
+   else
+      src_stride = width;
+
+   dst_offset = intel_miptree_image_offset(intelImage->mt,
+                                           intelImage->face,
+                                           intelImage->level);
+
+   dst_stride = intelImage->mt->pitch;
+
+   if (src_stride != dst_stride || dst_offset != 0 || src_offset != 0) {
+      _mesa_printf("%s: failure 2\n", __FUNCTION__);
+      return GL_FALSE;
+   }
+
+   intel_region_attach_pbo(intel, intelImage->mt->region, pbo);
+
+   return GL_TRUE;
+}
+
+
+
+
+
+
+static void
+intelTexImage(GLcontext * ctx,
+              GLint dims,
+              GLenum target, GLint level,
+              GLint internalFormat,
+              GLint width, GLint height, GLint depth,
+              GLint border,
+              GLenum format, GLenum type, const void *pixels,
+              const struct gl_pixelstore_attrib *unpack,
+              struct gl_texture_object *texObj,
+              struct gl_texture_image *texImage, GLsizei imageSize, int compressed)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_object *intelObj = intel_texture_object(texObj);
+   struct intel_texture_image *intelImage = intel_texture_image(texImage);
+   GLint postConvWidth = width;
+   GLint postConvHeight = height;
+   GLint texelBytes, sizeInBytes;
+   GLuint dstRowStride, srcRowStride = texImage->RowStride;
+
+
+   DBG("%s target %s level %d %dx%dx%d border %d\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(target), level, width, height, depth, border);
+
+   intelFlush(ctx);
+
+   intelImage->face = target_to_face(target);
+   intelImage->level = level;
+
+   if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) {
+      _mesa_adjust_image_for_convolution(ctx, dims, &postConvWidth,
+                                         &postConvHeight);
+   }
+
+   /* choose the texture format */
+   texImage->TexFormat = intelChooseTextureFormat(ctx, internalFormat,
+                                                  format, type);
+
+   _mesa_set_fetch_functions(texImage, dims);
+
+   if (texImage->TexFormat->TexelBytes == 0) {
+      /* must be a compressed format */
+      texelBytes = 0;
+      texImage->IsCompressed = GL_TRUE;
+      texImage->CompressedSize =
+	 ctx->Driver.CompressedTextureSize(ctx, texImage->Width,
+					   texImage->Height, texImage->Depth,
+					   texImage->TexFormat->MesaFormat);
+   } else {
+      texelBytes = texImage->TexFormat->TexelBytes;
+      
+      /* Minimum pitch of 32 bytes */
+      if (postConvWidth * texelBytes < 32) {
+	 postConvWidth = 32 / texelBytes;
+	 texImage->RowStride = postConvWidth;
+      }
+
+      if (!intelImage->mt) {      
+	  assert(texImage->RowStride == postConvWidth);
+      }
+   }
+
+   /* Release the reference to a potentially orphaned buffer.   
+    * Release any old malloced memory.
+    */
+   if (intelImage->mt) {
+      intel_miptree_release(intel, &intelImage->mt);
+      assert(!texImage->Data);
+   }
+   else if (texImage->Data) {
+      _mesa_free_texmemory(texImage->Data);
+      texImage->Data = NULL;
+   }
+
+   /* If this is the only texture image in the tree, could call
+    * bmBufferData with NULL data to free the old block and avoid
+    * waiting on any outstanding fences.
+    */
+   if (intelObj->mt &&
+       intelObj->mt->first_level == level &&
+       intelObj->mt->last_level == level &&
+       intelObj->mt->target != GL_TEXTURE_CUBE_MAP_ARB &&
+       !intel_miptree_match_image(intelObj->mt, &intelImage->base,
+                                  intelImage->face, intelImage->level)) {
+
+      DBG("release it\n");
+      intel_miptree_release(intel, &intelObj->mt);
+      assert(!intelObj->mt);
+   }
+
+   if (!intelObj->mt) {
+      guess_and_alloc_mipmap_tree(intel, intelObj, intelImage);
+      if (!intelObj->mt) {
+	 DBG("guess_and_alloc_mipmap_tree: failed\n");
+      }
+   }
+
+   assert(!intelImage->mt);
+
+   if (intelObj->mt &&
+       intel_miptree_match_image(intelObj->mt, &intelImage->base,
+                                 intelImage->face, intelImage->level)) {
+
+      intel_miptree_reference(&intelImage->mt, intelObj->mt);
+      assert(intelImage->mt);
+   } else if (intelImage->base.Border == 0) {
+      int comp_byte = 0;
+
+      if (intelImage->base.IsCompressed) {
+	 comp_byte =
+	    intel_compressed_num_bytes(intelImage->base.TexFormat->MesaFormat);
+      }
+
+      /* Didn't fit in the object miptree, but it's suitable for inclusion in
+       * a miptree, so create one just for our level and store it in the image.
+       * It'll get moved into the object miptree at validate time.
+       */
+      intelImage->mt = intel_miptree_create(intel, target, internalFormat,
+					    level, level,
+					    width, height, depth,
+					    intelImage->base.TexFormat->TexelBytes,
+					    comp_byte);
+
+   }
+
+   /* PBO fastpaths:
+    */
+   if (dims <= 2 &&
+       intelImage->mt &&
+       intel_buffer_object(unpack->BufferObj) &&
+       check_pbo_format(internalFormat, format,
+                        type, intelImage->base.TexFormat)) {
+
+      DBG("trying pbo upload\n");
+
+      /* Attempt to texture directly from PBO data (zero copy upload).
+       *
+       * Currently disable as it can lead to worse as well as better
+       * performance (in particular when intel_region_cow() is
+       * required).
+       */
+      if (intelObj->mt == intelImage->mt &&
+          intelObj->mt->first_level == level &&
+          intelObj->mt->last_level == level) {
+
+         if (try_pbo_zcopy(intel, intelImage, unpack,
+                           internalFormat,
+                           width, height, format, type, pixels)) {
+
+            DBG("pbo zcopy upload succeeded\n");
+            return;
+         }
+      }
+
+
+      /* Otherwise, attempt to use the blitter for PBO image uploads.
+       */
+      if (try_pbo_upload(intel, intelImage, unpack,
+                         internalFormat,
+                         width, height, format, type, pixels)) {
+         DBG("pbo upload succeeded\n");
+         return;
+      }
+
+      DBG("pbo upload failed\n");
+   }
+
+
+
+   /* intelCopyTexImage calls this function with pixels == NULL, with
+    * the expectation that the mipmap tree will be set up but nothing
+    * more will be done.  This is where those calls return:
+    */
+   if (compressed) {
+      pixels = _mesa_validate_pbo_compressed_teximage(ctx, imageSize, pixels,
+						      unpack,
+						      "glCompressedTexImage");
+   } else {
+      pixels = _mesa_validate_pbo_teximage(ctx, dims, width, height, 1,
+					   format, type,
+					   pixels, unpack, "glTexImage");
+   }
+
+   LOCK_HARDWARE(intel);
+
+   if (intelImage->mt) {
+      texImage->Data = intel_miptree_image_map(intel,
+                                               intelImage->mt,
+                                               intelImage->face,
+                                               intelImage->level,
+                                               &dstRowStride,
+                                               intelImage->base.ImageOffsets);
+      texImage->RowStride = dstRowStride / intelImage->mt->cpp;
+   }
+   else {
+      /* Allocate regular memory and store the image there temporarily.   */
+      if (texImage->IsCompressed) {
+         sizeInBytes = texImage->CompressedSize;
+         dstRowStride =
+            _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, width);
+         assert(dims != 3);
+      }
+      else {
+         dstRowStride = postConvWidth * texelBytes;
+         sizeInBytes = depth * dstRowStride * postConvHeight;
+      }
+
+      texImage->Data = _mesa_alloc_texmemory(sizeInBytes);
+   }
+
+   DBG("Upload image %dx%dx%d row_len %d "
+       "pitch %d\n",
+       width, height, depth, width * texelBytes, dstRowStride);
+
+   /* Copy data.  Would like to know when it's ok for us to eg. use
+    * the blitter to copy.  Or, use the hardware to do the format
+    * conversion and copy:
+    */
+   if (pixels) {
+       if (compressed) {
+	   if (intelImage->mt) {
+	       struct intel_region *dst = intelImage->mt->region;
+	       _mesa_copy_rect(texImage->Data, dst->cpp, dst->pitch,
+			       0, 0,
+			       intelImage->mt->level[level].width,
+			       intelImage->mt->level[level].height/4,
+			       pixels,
+			       srcRowStride,
+			       0, 0);
+	   } else
+	       memcpy(texImage->Data, pixels, imageSize);
+       } else if (!texImage->TexFormat->StoreImage(ctx, dims, 
+						   texImage->_BaseFormat, 
+						   texImage->TexFormat, 
+						   texImage->Data, 0, 0, 0, /* dstX/Y/Zoffset */
+						   dstRowStride,
+						   texImage->ImageOffsets,
+						   width, height, depth,
+						   format, type, pixels, unpack)) {
+	   _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage");
+       }
+   }
+
+   /* GL_SGIS_generate_mipmap */
+   if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
+      intel_generate_mipmap(ctx, target, texObj);
+   }
+
+   _mesa_unmap_teximage_pbo(ctx, unpack);
+
+   if (intelImage->mt) {
+      intel_miptree_image_unmap(intel, intelImage->mt);
+      texImage->Data = NULL;
+   }
+
+   UNLOCK_HARDWARE(intel);
+}
+
+void
+intelTexImage3D(GLcontext * ctx,
+                GLenum target, GLint level,
+                GLint internalFormat,
+                GLint width, GLint height, GLint depth,
+                GLint border,
+                GLenum format, GLenum type, const void *pixels,
+                const struct gl_pixelstore_attrib *unpack,
+                struct gl_texture_object *texObj,
+                struct gl_texture_image *texImage)
+{
+   intelTexImage(ctx, 3, target, level,
+                 internalFormat, width, height, depth, border,
+                 format, type, pixels, unpack, texObj, texImage, 0, 0);
+}
+
+
+void
+intelTexImage2D(GLcontext * ctx,
+                GLenum target, GLint level,
+                GLint internalFormat,
+                GLint width, GLint height, GLint border,
+                GLenum format, GLenum type, const void *pixels,
+                const struct gl_pixelstore_attrib *unpack,
+                struct gl_texture_object *texObj,
+                struct gl_texture_image *texImage)
+{
+   intelTexImage(ctx, 2, target, level,
+                 internalFormat, width, height, 1, border,
+                 format, type, pixels, unpack, texObj, texImage, 0, 0);
+}
+
+void
+intelTexImage1D(GLcontext * ctx,
+                GLenum target, GLint level,
+                GLint internalFormat,
+                GLint width, GLint border,
+                GLenum format, GLenum type, const void *pixels,
+                const struct gl_pixelstore_attrib *unpack,
+                struct gl_texture_object *texObj,
+                struct gl_texture_image *texImage)
+{
+   intelTexImage(ctx, 1, target, level,
+                 internalFormat, width, 1, 1, border,
+                 format, type, pixels, unpack, texObj, texImage, 0, 0);
+}
+
+void intelCompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level,
+				GLint internalFormat,
+				GLint width, GLint height, GLint border,
+				GLsizei imageSize, const GLvoid *data,
+				struct gl_texture_object *texObj,
+				struct gl_texture_image *texImage )
+{
+   intelTexImage(ctx, 2, target, level,
+		 internalFormat, width, height, 1, border,
+		 0, 0, data, &ctx->Unpack, texObj, texImage, imageSize, 1);
+}
+
+/**
+ * Need to map texture image into memory before copying image data,
+ * then unmap it.
+ */
+static void
+intel_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
+		    GLenum format, GLenum type, GLvoid * pixels,
+		    struct gl_texture_object *texObj,
+		    struct gl_texture_image *texImage, int compressed)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_image *intelImage = intel_texture_image(texImage);
+
+   /* Map */
+   if (intelImage->mt) {
+      /* Image is stored in hardware format in a buffer managed by the
+       * kernel.  Need to explicitly map and unmap it.
+       */
+      intelImage->base.Data =
+         intel_miptree_image_map(intel,
+                                 intelImage->mt,
+                                 intelImage->face,
+                                 intelImage->level,
+                                 &intelImage->base.RowStride,
+                                 intelImage->base.ImageOffsets);
+      intelImage->base.RowStride /= intelImage->mt->cpp;
+   }
+   else {
+      /* Otherwise, the image should actually be stored in
+       * intelImage->base.Data.  This is pretty confusing for
+       * everybody, I'd much prefer to separate the two functions of
+       * texImage->Data - storage for texture images in main memory
+       * and access (ie mappings) of images.  In other words, we'd
+       * create a new texImage->Map field and leave Data simply for
+       * storage.
+       */
+      assert(intelImage->base.Data);
+   }
+
+
+   if (compressed) {
+      _mesa_get_compressed_teximage(ctx, target, level, pixels,
+				    texObj, texImage);
+   } else {
+      _mesa_get_teximage(ctx, target, level, format, type, pixels,
+			 texObj, texImage);
+   }
+     
+
+   /* Unmap */
+   if (intelImage->mt) {
+      intel_miptree_image_unmap(intel, intelImage->mt);
+      intelImage->base.Data = NULL;
+   }
+}
+
+void
+intelGetTexImage(GLcontext * ctx, GLenum target, GLint level,
+                 GLenum format, GLenum type, GLvoid * pixels,
+                 struct gl_texture_object *texObj,
+                 struct gl_texture_image *texImage)
+{
+   intel_get_tex_image(ctx, target, level, format, type, pixels,
+		       texObj, texImage, 0);
+
+
+}
+
+void
+intelGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
+			   GLvoid *pixels,
+			   struct gl_texture_object *texObj,
+			   struct gl_texture_image *texImage)
+{
+   intel_get_tex_image(ctx, target, level, 0, 0, pixels,
+		       texObj, texImage, 1);
+}
+
+void
+intelSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
+		  unsigned long long offset, GLint depth, GLuint pitch)
+{
+   struct intel_context *intel = pDRICtx->driverPrivate;
+   struct gl_texture_object *tObj = _mesa_lookup_texture(&intel->ctx, texname);
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+
+   if (!intelObj)
+      return;
+
+   if (intelObj->mt)
+      intel_miptree_release(intel, &intelObj->mt);
+
+   intelObj->imageOverride = GL_TRUE;
+   intelObj->depthOverride = depth;
+   intelObj->pitchOverride = pitch;
+
+   if (offset)
+      intelObj->textureOffset = offset;
+}
+
+void
+intelSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
+{
+   struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
+   struct intel_context *intel = pDRICtx->driverPrivate;
+   struct intel_texture_object *intelObj;
+   struct intel_texture_image *intelImage;
+   struct intel_mipmap_tree *mt;
+   struct intel_renderbuffer *rb;
+   struct gl_texture_unit *texUnit;
+   struct gl_texture_object *texObj;
+   struct gl_texture_image *texImage;
+   int level = 0, type, format, internalFormat;
+
+   texUnit = &intel->ctx.Texture.Unit[intel->ctx.Texture.CurrentUnit];
+   texObj = _mesa_select_tex_object(&intel->ctx, texUnit, target);
+   intelObj = intel_texture_object(texObj);
+
+   if (!intelObj)
+      return;
+
+   intel_update_renderbuffers(pDRICtx, dPriv);
+
+   rb = intel_fb->color_rb[0];
+   /* If the region isn't set, then intel_update_renderbuffers was unable
+    * to get the buffers for the drawable.
+    */
+   if (rb->region == NULL)
+      return;
+
+   type = GL_BGRA;
+   format = GL_UNSIGNED_BYTE;
+   internalFormat = (rb->region->cpp == 3 ? 3 : 4);
+
+   mt = intel_miptree_create_for_region(intel, target,
+					internalFormat,
+					0, 0, rb->region, 1, 0);
+   if (mt == NULL)
+       return;
+
+   _mesa_lock_texture(&intel->ctx, texObj);
+
+   if (intelObj->mt)
+      intel_miptree_release(intel, &intelObj->mt);
+
+   intelObj->mt = mt;
+   texImage = _mesa_get_tex_image(&intel->ctx, texObj, target, level);
+   _mesa_init_teximage_fields(&intel->ctx, target, texImage,
+			      rb->region->width, rb->region->height, 1,
+			      0, internalFormat);
+
+   intelImage = intel_texture_image(texImage);
+   intelImage->face = target_to_face(target);
+   intelImage->level = level;
+   texImage->TexFormat = intelChooseTextureFormat(&intel->ctx, internalFormat,
+                                                  type, format);
+   _mesa_set_fetch_functions(texImage, 2);
+   texImage->RowStride = rb->region->pitch;
+   intel_miptree_reference(&intelImage->mt, intelObj->mt);
+
+   if (!intel_miptree_match_image(intelObj->mt, &intelImage->base,
+				  intelImage->face, intelImage->level)) {
+	   fprintf(stderr, "miptree doesn't match image\n");
+   }
+
+   _mesa_unlock_texture(&intel->ctx, texObj);
+}
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index fcb5cc39068..e6f9a417790 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -32,15 +32,27 @@
 
 #include "intel_mipmap_tree.h"
 #include "intel_tex_layout.h"
-#include "macros.h"
+#include "intel_context.h"
+#include "main/macros.h"
 
-
-static int align(int value, int alignment)
+GLuint intel_compressed_alignment(GLenum internalFormat)
 {
-   return (value + alignment - 1) & ~(alignment - 1);
+    GLuint alignment = 4;
+
+    switch (internalFormat) {
+    case GL_COMPRESSED_RGB_FXT1_3DFX:
+    case GL_COMPRESSED_RGBA_FXT1_3DFX:
+        alignment = 8;
+        break;
+
+    default:
+        break;
+    }
+
+    return alignment;
 }
 
-void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
+void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tree *mt )
 {
    GLint align_h = 2, align_w = 4;
    GLuint level;
@@ -51,23 +63,36 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
 
    mt->pitch = mt->width0;
 
+   if (mt->compressed) {
+       align_w = intel_compressed_alignment(mt->internal_format);
+       mt->pitch = ALIGN(mt->width0, align_w);
+   }
+
    /* May need to adjust pitch to accomodate the placement of
     * the 2nd mipmap.  This occurs when the alignment
     * constraints of mipmap placement push the right edge of the
     * 2nd mipmap out past the width of its parent.
     */
    if (mt->first_level != mt->last_level) {
-      GLuint mip1_width = align(minify(mt->width0), align_w)
-			+ minify(minify(mt->width0));
+       GLuint mip1_width;
+
+       if (mt->compressed) {
+           mip1_width = ALIGN(minify(mt->width0), align_w)
+               + ALIGN(minify(minify(mt->width0)), align_w);
+       } else {
+           mip1_width = ALIGN(minify(mt->width0), align_w)
+               + minify(minify(mt->width0));
+       }
 
-      if (mip1_width > mt->width0)
-	 mt->pitch = mip1_width;
+       if (mip1_width > mt->pitch) {
+           mt->pitch = mip1_width;
+       }
    }
 
    /* Pitch must be a whole number of dwords, even though we
     * express it in texels.
     */
-   mt->pitch = align(mt->pitch * mt->cpp, 4) / mt->cpp;
+   mt->pitch = intel_miptree_pitch_align (intel, mt, mt->pitch);
    mt->total_height = 0;
 
    for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
@@ -79,7 +104,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
       if (mt->compressed)
 	 img_height = MAX2(1, height/4);
       else
-	 img_height = align(height, align_h);
+	 img_height = ALIGN(height, align_h);
 
 
       /* Because the images are packed better, the final offset
@@ -90,7 +115,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
       /* Layout_below: step right after second mipmap.
        */
       if (level == mt->first_level + 1) {
-	 x += align(width, align_w);
+	 x += ALIGN(width, align_w);
       }
       else {
 	 y += img_height;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.h b/src/mesa/drivers/dri/intel/intel_tex_layout.h
index 1e37f8f525f..dbc90e6f9b7 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.h
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.h
@@ -30,7 +30,7 @@
   *   Michel Dänzer <michel@tungstengraphics.com>
   */
 
-#include "macros.h"
+#include "main/macros.h"
 
 
 static GLuint minify( GLuint d )
@@ -38,4 +38,5 @@ static GLuint minify( GLuint d )
    return MAX2(1, d>>1);
 }
 
-extern void i945_miptree_layout_2d( struct intel_mipmap_tree *mt );
+extern void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tree *mt );
+extern GLuint intel_compressed_alignment(GLenum);
diff --git a/src/mesa/drivers/dri/i915/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex_obj.h
index 9b7e5502326..5a934615259 100644
--- a/src/mesa/drivers/dri/i915/intel_tex.h
+++ b/src/mesa/drivers/dri/intel/intel_tex_obj.h
@@ -25,21 +25,59 @@
  * 
  **************************************************************************/
 
-#ifndef INTELTEX_INC
-#define INTELTEX_INC
+#ifndef _INTEL_TEX_OBJ_H
+#define _INTEL_TEX_OBJ_H
 
-#include "mtypes.h"
-#include "intel_context.h"
-#include "texmem.h"
+struct intel_texture_object
+{
+   struct gl_texture_object base;       /* The "parent" object */
 
+   /* The mipmap tree must include at least these levels once
+    * validated:
+    */
+   GLuint firstLevel;
+   GLuint lastLevel;
 
-void intelInitTextureFuncs( struct dd_function_table *functions );
+   /* Offset for firstLevel image:
+    */
+   GLuint textureOffset;
 
-void intelDestroyTexObj( intelContextPtr intel, intelTextureObjectPtr t );
-int intelUploadTexImages( intelContextPtr intel, intelTextureObjectPtr t,
-			  GLuint face );
+   /* On validation any active images held in main memory or in other
+    * regions will be copied to this region and the old storage freed.
+    */
+   struct intel_mipmap_tree *mt;
 
-GLboolean 
-intel_driReinitTextureHeap( driTexHeap *heap,
-			    unsigned size );
-#endif
+   GLboolean imageOverride;
+   GLint depthOverride;
+   GLuint pitchOverride;
+};
+
+struct intel_texture_image
+{
+   struct gl_texture_image base;
+
+   /* These aren't stored in gl_texture_image 
+    */
+   GLuint level;
+   GLuint face;
+
+   /* If intelImage->mt != NULL, image data is stored here.
+    * Else if intelImage->base.Data != NULL, image is stored there.
+    * Else there is no image data.
+    */
+   struct intel_mipmap_tree *mt;
+};
+
+static INLINE struct intel_texture_object *
+intel_texture_object(struct gl_texture_object *obj)
+{
+   return (struct intel_texture_object *) obj;
+}
+
+static INLINE struct intel_texture_image *
+intel_texture_image(struct gl_texture_image *img)
+{
+   return (struct intel_texture_image *) img;
+}
+
+#endif /* _INTEL_TEX_OBJ_H */
diff --git a/src/mesa/drivers/dri/intel/intel_tex_subimage.c b/src/mesa/drivers/dri/intel/intel_tex_subimage.c
new file mode 100644
index 00000000000..b7523618868
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex_subimage.c
@@ -0,0 +1,186 @@
+
+/**************************************************************************
+ * 
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * 
+ **************************************************************************/
+
+#include "main/mtypes.h"
+#include "main/texobj.h"
+#include "main/texstore.h"
+#include "main/texcompress.h"
+#include "main/enums.h"
+
+#include "intel_context.h"
+#include "intel_tex.h"
+#include "intel_mipmap_tree.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+static void
+intelTexSubimage(GLcontext * ctx,
+                 GLint dims,
+                 GLenum target, GLint level,
+                 GLint xoffset, GLint yoffset, GLint zoffset,
+                 GLint width, GLint height, GLint depth,
+                 GLenum format, GLenum type, const void *pixels,
+                 const struct gl_pixelstore_attrib *packing,
+                 struct gl_texture_object *texObj,
+                 struct gl_texture_image *texImage)
+{
+   struct intel_context *intel = intel_context(ctx);
+   struct intel_texture_image *intelImage = intel_texture_image(texImage);
+   GLuint dstRowStride = 0;
+   
+   DBG("%s target %s level %d offset %d,%d %dx%d\n", __FUNCTION__,
+       _mesa_lookup_enum_by_nr(target),
+       level, xoffset, yoffset, width, height);
+
+   intelFlush(ctx);
+
+   pixels =
+      _mesa_validate_pbo_teximage(ctx, dims, width, height, depth, format,
+                                  type, pixels, packing, "glTexSubImage2D");
+   if (!pixels)
+      return;
+
+   LOCK_HARDWARE(intel);
+
+   /* Map buffer if necessary.  Need to lock to prevent other contexts
+    * from uploading the buffer under us.
+    */
+   if (intelImage->mt) 
+      texImage->Data = intel_miptree_image_map(intel,
+                                               intelImage->mt,
+                                               intelImage->face,
+                                               intelImage->level,
+                                               &dstRowStride,
+                                               texImage->ImageOffsets);
+   else {
+      if (texImage->IsCompressed) {
+         dstRowStride =
+            _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, width);
+         assert(dims != 3);
+      }
+      else {
+         dstRowStride = texImage->RowStride * texImage->TexFormat->TexelBytes;
+      }
+   }
+
+   assert(dstRowStride);
+
+   if (!texImage->TexFormat->StoreImage(ctx, dims, texImage->_BaseFormat,
+                                        texImage->TexFormat,
+                                        texImage->Data,
+                                        xoffset, yoffset, zoffset,
+                                        dstRowStride,
+                                        texImage->ImageOffsets,
+                                        width, height, depth,
+                                        format, type, pixels, packing)) {
+      _mesa_error(ctx, GL_OUT_OF_MEMORY, "intelTexSubImage");
+   }
+
+   /* GL_SGIS_generate_mipmap */
+   if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
+      intel_generate_mipmap(ctx, target, texObj);
+   }
+
+   _mesa_unmap_teximage_pbo(ctx, packing);
+
+   if (intelImage->mt) {
+      intel_miptree_image_unmap(intel, intelImage->mt);
+      texImage->Data = NULL;
+   }
+
+   UNLOCK_HARDWARE(intel);
+}
+
+
+
+
+
+void
+intelTexSubImage3D(GLcontext * ctx,
+                   GLenum target,
+                   GLint level,
+                   GLint xoffset, GLint yoffset, GLint zoffset,
+                   GLsizei width, GLsizei height, GLsizei depth,
+                   GLenum format, GLenum type,
+                   const GLvoid * pixels,
+                   const struct gl_pixelstore_attrib *packing,
+                   struct gl_texture_object *texObj,
+                   struct gl_texture_image *texImage)
+{
+
+   intelTexSubimage(ctx, 3,
+                    target, level,
+                    xoffset, yoffset, zoffset,
+                    width, height, depth,
+                    format, type, pixels, packing, texObj, texImage);
+
+}
+
+
+
+void
+intelTexSubImage2D(GLcontext * ctx,
+                   GLenum target,
+                   GLint level,
+                   GLint xoffset, GLint yoffset,
+                   GLsizei width, GLsizei height,
+                   GLenum format, GLenum type,
+                   const GLvoid * pixels,
+                   const struct gl_pixelstore_attrib *packing,
+                   struct gl_texture_object *texObj,
+                   struct gl_texture_image *texImage)
+{
+
+   intelTexSubimage(ctx, 2,
+                    target, level,
+                    xoffset, yoffset, 0,
+                    width, height, 1,
+                    format, type, pixels, packing, texObj, texImage);
+
+}
+
+
+void
+intelTexSubImage1D(GLcontext * ctx,
+                   GLenum target,
+                   GLint level,
+                   GLint xoffset,
+                   GLsizei width,
+                   GLenum format, GLenum type,
+                   const GLvoid * pixels,
+                   const struct gl_pixelstore_attrib *packing,
+                   struct gl_texture_object *texObj,
+                   struct gl_texture_image *texImage)
+{
+   intelTexSubimage(ctx, 1,
+                    target, level,
+                    xoffset, 0, 0,
+                    width, 1, 1,
+                    format, type, pixels, packing, texObj, texImage);
+
+}
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
new file mode 100644
index 00000000000..820683d42eb
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -0,0 +1,297 @@
+#include "main/mtypes.h"
+#include "main/macros.h"
+
+#include "intel_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_mipmap_tree.h"
+#include "intel_tex.h"
+
+#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+
+/**
+ * Compute which mipmap levels that really need to be sent to the hardware.
+ * This depends on the base image size, GL_TEXTURE_MIN_LOD,
+ * GL_TEXTURE_MAX_LOD, GL_TEXTURE_BASE_LEVEL, and GL_TEXTURE_MAX_LEVEL.
+ */
+static void
+intel_calculate_first_last_level(struct intel_texture_object *intelObj)
+{
+   struct gl_texture_object *tObj = &intelObj->base;
+   const struct gl_texture_image *const baseImage =
+      tObj->Image[0][tObj->BaseLevel];
+
+   /* These must be signed values.  MinLod and MaxLod can be negative numbers,
+    * and having firstLevel and lastLevel as signed prevents the need for
+    * extra sign checks.
+    */
+   int firstLevel;
+   int lastLevel;
+
+   /* Yes, this looks overly complicated, but it's all needed.
+    */
+   switch (tObj->Target) {
+   case GL_TEXTURE_1D:
+   case GL_TEXTURE_2D:
+   case GL_TEXTURE_3D:
+   case GL_TEXTURE_CUBE_MAP:
+      if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
+         /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
+          */
+         firstLevel = lastLevel = tObj->BaseLevel;
+      }
+      else {
+#ifdef I915
+         firstLevel = tObj->BaseLevel + (GLint) (tObj->MinLod + 0.5);
+         firstLevel = MAX2(firstLevel, tObj->BaseLevel);
+         firstLevel = MIN2(firstLevel, tObj->BaseLevel + baseImage->MaxLog2);
+         lastLevel = tObj->BaseLevel + (GLint) (tObj->MaxLod + 0.5);
+         lastLevel = MAX2(lastLevel, tObj->BaseLevel);
+         lastLevel = MIN2(lastLevel, tObj->BaseLevel + baseImage->MaxLog2);
+         lastLevel = MIN2(lastLevel, tObj->MaxLevel);
+         lastLevel = MAX2(firstLevel, lastLevel);       /* need at least one level */
+#else
+	 /* Currently not taking min/max lod into account here, those
+	  * values are programmed as sampler state elsewhere and we
+	  * upload the same mipmap levels regardless.  Not sure if
+	  * this makes sense as it means it isn't possible for the app
+	  * to use min/max lod to reduce texture memory pressure:
+	  */
+	 firstLevel = tObj->BaseLevel;
+	 lastLevel = MIN2(tObj->BaseLevel + baseImage->MaxLog2,
+			  tObj->MaxLevel);
+	 lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
+#endif
+      }
+      break;
+   case GL_TEXTURE_RECTANGLE_NV:
+   case GL_TEXTURE_4D_SGIS:
+      firstLevel = lastLevel = 0;
+      break;
+   default:
+      return;
+   }
+
+   /* save these values */
+   intelObj->firstLevel = firstLevel;
+   intelObj->lastLevel = lastLevel;
+}
+
+/**
+ * Copies the image's contents at its level into the object's miptree,
+ * and updates the image to point at the object's miptree.
+ */
+static void
+copy_image_data_to_tree(struct intel_context *intel,
+                        struct intel_texture_object *intelObj,
+                        struct intel_texture_image *intelImage)
+{
+   if (intelImage->mt) {
+      /* Copy potentially with the blitter:
+       */
+      intel_miptree_image_copy(intel,
+                               intelObj->mt,
+                               intelImage->face,
+                               intelImage->level, intelImage->mt);
+
+      intel_miptree_release(intel, &intelImage->mt);
+   }
+   else {
+      assert(intelImage->base.Data != NULL);
+
+      /* More straightforward upload.  
+       */
+      intel_miptree_image_data(intel,
+                               intelObj->mt,
+                               intelImage->face,
+                               intelImage->level,
+                               intelImage->base.Data,
+                               intelImage->base.RowStride,
+                               intelImage->base.RowStride *
+                               intelImage->base.Height);
+      _mesa_align_free(intelImage->base.Data);
+      intelImage->base.Data = NULL;
+   }
+
+   intel_miptree_reference(&intelImage->mt, intelObj->mt);
+}
+
+
+/*  
+ */
+GLuint
+intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
+{
+   struct gl_texture_object *tObj = intel->ctx.Texture.Unit[unit]._Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   int comp_byte = 0;
+   int cpp;
+   GLuint face, i;
+   GLuint nr_faces = 0;
+   struct intel_texture_image *firstImage;
+
+   /* We know/require this is true by now: 
+    */
+   assert(intelObj->base._Complete);
+
+   /* What levels must the tree include at a minimum?
+    */
+   intel_calculate_first_last_level(intelObj);
+   firstImage =
+      intel_texture_image(intelObj->base.Image[0][intelObj->firstLevel]);
+
+   /* Fallback case:
+    */
+   if (firstImage->base.Border) {
+      if (intelObj->mt) {
+         intel_miptree_release(intel, &intelObj->mt);
+      }
+      return GL_FALSE;
+   }
+
+
+   /* If both firstImage and intelObj have a tree which can contain
+    * all active images, favour firstImage.  Note that because of the
+    * completeness requirement, we know that the image dimensions
+    * will match.
+    */
+   if (firstImage->mt &&
+       firstImage->mt != intelObj->mt &&
+       firstImage->mt->first_level <= intelObj->firstLevel &&
+       firstImage->mt->last_level >= intelObj->lastLevel) {
+
+      if (intelObj->mt)
+         intel_miptree_release(intel, &intelObj->mt);
+
+      intel_miptree_reference(&intelObj->mt, firstImage->mt);
+   }
+
+   if (firstImage->base.IsCompressed) {
+      comp_byte = intel_compressed_num_bytes(firstImage->base.TexFormat->MesaFormat);
+      cpp = comp_byte;
+   }
+   else cpp = firstImage->base.TexFormat->TexelBytes;
+
+   /* Check tree can hold all active levels.  Check tree matches
+    * target, imageFormat, etc.
+    * 
+    * XXX: For some layouts (eg i945?), the test might have to be
+    * first_level == firstLevel, as the tree isn't valid except at the
+    * original start level.  Hope to get around this by
+    * programming minLod, maxLod, baseLevel into the hardware and
+    * leaving the tree alone.
+    */
+   if (intelObj->mt &&
+       (intelObj->mt->target != intelObj->base.Target ||
+	intelObj->mt->internal_format != firstImage->base.InternalFormat ||
+	intelObj->mt->first_level != intelObj->firstLevel ||
+	intelObj->mt->last_level != intelObj->lastLevel ||
+	intelObj->mt->width0 != firstImage->base.Width ||
+	intelObj->mt->height0 != firstImage->base.Height ||
+	intelObj->mt->depth0 != firstImage->base.Depth ||
+	intelObj->mt->cpp != cpp ||
+	intelObj->mt->compressed != firstImage->base.IsCompressed)) {
+      intel_miptree_release(intel, &intelObj->mt);
+   }
+
+
+   /* May need to create a new tree:
+    */
+   if (!intelObj->mt) {
+      intelObj->mt = intel_miptree_create(intel,
+                                          intelObj->base.Target,
+                                          firstImage->base.InternalFormat,
+                                          intelObj->firstLevel,
+                                          intelObj->lastLevel,
+                                          firstImage->base.Width,
+                                          firstImage->base.Height,
+                                          firstImage->base.Depth,
+                                          cpp,
+                                          comp_byte);
+   }
+
+   /* Pull in any images not in the object's tree:
+    */
+   nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
+   for (face = 0; face < nr_faces; face++) {
+      for (i = intelObj->firstLevel; i <= intelObj->lastLevel; i++) {
+         struct intel_texture_image *intelImage =
+            intel_texture_image(intelObj->base.Image[face][i]);
+
+         /* Need to import images in main memory or held in other trees.
+          */
+         if (intelObj->mt != intelImage->mt) {
+            copy_image_data_to_tree(intel, intelObj, intelImage);
+         }
+      }
+   }
+
+   return GL_TRUE;
+}
+
+void
+intel_tex_map_level_images(struct intel_context *intel,
+			   struct intel_texture_object *intelObj,
+			   int level)
+{
+   GLuint nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
+   GLuint face;
+
+   for (face = 0; face < nr_faces; face++) {
+      struct intel_texture_image *intelImage =
+	 intel_texture_image(intelObj->base.Image[face][level]);
+
+      if (intelImage->mt) {
+	 intelImage->base.Data =
+	    intel_miptree_image_map(intel,
+				    intelImage->mt,
+				    intelImage->face,
+				    intelImage->level,
+				    &intelImage->base.RowStride,
+				    intelImage->base.ImageOffsets);
+	 /* convert stride to texels, not bytes */
+	 intelImage->base.RowStride /= intelImage->mt->cpp;
+	 /* intelImage->base.ImageStride /= intelImage->mt->cpp; */
+      }
+   }
+}
+
+void
+intel_tex_unmap_level_images(struct intel_context *intel,
+			     struct intel_texture_object *intelObj,
+			     int level)
+{
+   GLuint nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
+   GLuint face;
+
+   for (face = 0; face < nr_faces; face++) {
+      struct intel_texture_image *intelImage =
+	 intel_texture_image(intelObj->base.Image[face][level]);
+
+      if (intelImage->mt) {
+	 intel_miptree_image_unmap(intel, intelImage->mt);
+	 intelImage->base.Data = NULL;
+      }
+   }
+}
+
+void
+intel_tex_map_images(struct intel_context *intel,
+                     struct intel_texture_object *intelObj)
+{
+   int i;
+
+   DBG("%s\n", __FUNCTION__);
+
+   for (i = intelObj->firstLevel; i <= intelObj->lastLevel; i++)
+      intel_tex_map_level_images(intel, intelObj, i);
+}
+
+void
+intel_tex_unmap_images(struct intel_context *intel,
+                       struct intel_texture_object *intelObj)
+{
+   int i;
+
+   for (i = intelObj->firstLevel; i <= intelObj->lastLevel; i++)
+      intel_tex_unmap_level_images(intel, intelObj, i);
+}
diff --git a/src/mesa/drivers/dri/i965/server/i830_dri.h b/src/mesa/drivers/dri/intel/server/i830_dri.h
index 68213f69f5d..def049e7a6b 100644
--- a/src/mesa/drivers/dri/i965/server/i830_dri.h
+++ b/src/mesa/drivers/dri/intel/server/i830_dri.h
@@ -1,14 +1,14 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.6 2003/09/28 20:15:59 alanh Exp $ */
 
 #ifndef _I830_DRI_H
 #define _I830_DRI_H
 
 #include "xf86drm.h"
-#include "i830_common.h"
 
 #define I830_MAX_DRAWABLES 256
 
 #define I830_MAJOR_VERSION 1
-#define I830_MINOR_VERSION 3
+#define I830_MINOR_VERSION 9
 #define I830_PATCHLEVEL 0
 
 #define I830_REG_SIZE 0x80000
@@ -23,7 +23,7 @@ typedef struct _I830DRIRec {
    drmSize unused3; /* depthbufferSize */
    drm_handle_t unused4; /* depthbuffer */
 
-   drmSize unused5; /* rotatedSize /*/
+   drmSize unused5; /* rotatedSize */
    drm_handle_t unused6; /* rotatedbuffer */
 
    drm_handle_t unused7; /* textures */
diff --git a/src/mesa/drivers/dri/i965/server/intel.h b/src/mesa/drivers/dri/intel/server/intel.h
index d7858a20c8d..6ea72499c1c 100644
--- a/src/mesa/drivers/dri/i965/server/intel.h
+++ b/src/mesa/drivers/dri/intel/server/intel.h
@@ -75,6 +75,9 @@
 
 #define I830_GMCH_CTRL		0x52
 
+#define I830_GMCH_MEM_MASK      0x1
+#define I830_GMCH_MEM_64M       0x1
+#define I830_GMCH_MEM_128M      0
 
 #define I830_GMCH_GMS_MASK			0x70
 #define I830_GMCH_GMS_DISABLED		0x00
@@ -141,7 +144,7 @@ typedef struct _I830Rec {
    unsigned char *MMIOBase;
    unsigned char *FbBase;
    int cpp;
-
+   uint32_t aper_size;
    unsigned int bios_version;
 
    /* These are set in PreInit and never changed. */
diff --git a/src/mesa/drivers/dri/intel/server/intel_dri.c b/src/mesa/drivers/dri/intel/server/intel_dri.c
new file mode 100644
index 00000000000..e49c4214ad4
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/server/intel_dri.c
@@ -0,0 +1,1306 @@
+/**
+ * \file server/intel_dri.c
+ * \brief File to perform the device-specific initialization tasks typically
+ * done in the X server.
+ *
+ * Here they are converted to run in the client (or perhaps a standalone
+ * process), and to work with the frame buffer device rather than the X
+ * server infrastructure.
+ * 
+ * Copyright (C) 2006 Dave Airlie (airlied@linux.ie)
+
+ Permission is hereby granted, free of charge, to any person obtaining a
+ copy of this software and associated documentation files (the
+ "Software"), to deal in the Software without restriction, including
+ without limitation the rights to use, copy, modify, merge, publish,
+ distribute, sub license, and/or sell copies of the Software, and to
+ permit persons to whom the Software is furnished to do so, subject to
+ the following conditions:
+ 
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial portions
+ of the Software.
+ 
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
+ ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include "driver.h"
+#include "drm.h"
+
+#include "intel.h"
+#include "i830_dri.h"
+
+#include "memops.h"
+#include "pciaccess.h"
+
+static size_t drm_page_size;
+static int nextTile = 0;
+#define xf86DrvMsg(...) do {} while(0)
+
+static const int pitches[] = {
+  128 * 8,
+  128 * 16,
+  128 * 32,
+  128 * 64,
+  0
+};
+
+static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea);
+
+static unsigned long
+GetBestTileAlignment(unsigned long size)
+{
+   unsigned long i;
+
+   for (i = KB(512); i < size; i <<= 1)
+      ;
+
+   if (i > MB(64))
+      i = MB(64);
+
+   return i;
+}
+
+static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  int i;
+  unsigned char *MMIO = ctx->MMIOAddress;
+
+  for (i = 0; i < 8; i++) {
+    OUTREG(FENCE + i * 4, pI830->Fence[i]);
+    //    if (I810_DEBUG & DEBUG_VERBOSE_VGA)
+    fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]);
+  }
+}
+
+/* Tiled memory is good... really, really good...
+ *
+ * Need to make it less likely that we miss out on this - probably
+ * need to move the frontbuffer away from the 'guarenteed' alignment
+ * of the first memory segment, or perhaps allocate a discontigous
+ * framebuffer to get more alignment 'sweet spots'.
+ */
+static void
+SetFence(const DRIDriverContext *ctx, I830Rec *pI830,
+	 int nr, unsigned int start, unsigned int pitch,
+         unsigned int size)
+{
+   unsigned int val;
+   unsigned int fence_mask = 0;
+   unsigned int fence_pitch;
+
+   if (nr < 0 || nr > 7) {
+      fprintf(stderr,
+		 "SetFence: fence %d out of range\n",nr);
+      return;
+   }
+
+   pI830->Fence[nr] = 0;
+
+   if (IS_I9XX(pI830))
+   	fence_mask = ~I915G_FENCE_START_MASK;
+   else
+   	fence_mask = ~I830_FENCE_START_MASK;
+
+   if (start & fence_mask) {
+      fprintf(stderr,
+		 "SetFence: %d: start (0x%08x) is not %s aligned\n",
+		 nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k");
+      return;
+   }
+
+   if (start % size) {
+      fprintf(stderr,
+		 "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n",
+		 nr, start, size / 1024);
+      return;
+   }
+
+   if (pitch & 127) {
+      fprintf(stderr,
+		 "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n",
+		 nr, pitch);
+      return;
+   }
+
+   val = (start | FENCE_X_MAJOR | FENCE_VALID);
+
+   if (IS_I9XX(pI830)) {
+   	switch (size) {
+	   case MB(1):
+      		val |= I915G_FENCE_SIZE_1M;
+      		break;
+   	   case MB(2):
+      		val |= I915G_FENCE_SIZE_2M;
+      		break;
+   	   case MB(4):
+      		val |= I915G_FENCE_SIZE_4M;
+      		break;
+   	   case MB(8):
+      		val |= I915G_FENCE_SIZE_8M;
+      		break;
+   	   case MB(16):
+      		val |= I915G_FENCE_SIZE_16M;
+      		break;
+   	   case MB(32):
+      		val |= I915G_FENCE_SIZE_32M;
+      		break;
+   	   case MB(64):
+      		val |= I915G_FENCE_SIZE_64M;
+      		break;
+   	   default:
+      		fprintf(stderr,
+		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
+      		return;
+   	}
+    } else {
+   	switch (size) {
+	   case KB(512):
+      		val |= FENCE_SIZE_512K;
+      		break;
+	   case MB(1):
+      		val |= FENCE_SIZE_1M;
+      		break;
+   	   case MB(2):
+      		val |= FENCE_SIZE_2M;
+      		break;
+   	   case MB(4):
+      		val |= FENCE_SIZE_4M;
+      		break;
+   	   case MB(8):
+      		val |= FENCE_SIZE_8M;
+      		break;
+   	   case MB(16):
+      		val |= FENCE_SIZE_16M;
+      		break;
+   	   case MB(32):
+      		val |= FENCE_SIZE_32M;
+      		break;
+   	   case MB(64):
+      		val |= FENCE_SIZE_64M;
+      		break;
+   	   default:
+      		fprintf(stderr,
+		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
+      		return;
+   	}
+   }
+
+   if (IS_I9XX(pI830))
+	fence_pitch = pitch / 512;
+   else
+	fence_pitch = pitch / 128;
+
+   switch (fence_pitch) {
+   case 1:
+      val |= FENCE_PITCH_1;
+      break;
+   case 2:
+      val |= FENCE_PITCH_2;
+      break;
+   case 4:
+      val |= FENCE_PITCH_4;
+      break;
+   case 8:
+      val |= FENCE_PITCH_8;
+      break;
+   case 16:
+      val |= FENCE_PITCH_16;
+      break;
+   case 32:
+      val |= FENCE_PITCH_32;
+      break;
+   case 64:
+      val |= FENCE_PITCH_64;
+      break;
+   default:
+      fprintf(stderr,
+		 "SetFence: %d: illegal pitch (%d)\n", nr, pitch);
+      return;
+   }
+
+   pI830->Fence[nr] = val;
+}
+
+static Bool
+MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem)
+{
+   int pitch, ntiles, i;
+
+   pitch = pMem->Pitch * ctx->cpp;
+   /*
+    * Simply try to break the region up into at most four pieces of size
+    * equal to the alignment.
+    */
+   ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
+   if (ntiles >= 4) {
+      return FALSE;
+   }
+
+   for (i = 0; i < ntiles; i++, nextTile++) {
+     SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment,
+	       pitch, pMem->Alignment);
+   }
+   return TRUE;
+}
+
+static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  int i;
+
+  /* Clear out */
+  for (i = 0; i < 8; i++)
+    pI830->Fence[i] = 0;
+  
+  nextTile = 0;
+
+  if (pI830->BackBuffer.Alignment >= KB(512)) {
+    if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) {
+      fprintf(stderr,
+		 "Activating tiled memory for the back buffer.\n");
+    } else {
+      fprintf(stderr,
+		 "MakeTiles failed for the back buffer.\n");
+      pI830->allowPageFlip = FALSE;
+    }
+  }
+  
+  if (pI830->DepthBuffer.Alignment >= KB(512)) {
+    if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) {
+      fprintf(stderr,
+		 "Activating tiled memory for the depth buffer.\n");
+    } else {
+      fprintf(stderr,
+		 "MakeTiles failed for the depth buffer.\n");
+    }
+  }
+
+  return;
+}
+
+static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  struct pci_device host_bridge, ig_dev;
+  uint32_t gmch_ctrl;
+  int memsize = 0;
+  int range;
+  uint32_t aper_size;
+  uint32_t membase2 = 0;
+      
+  memset(&host_bridge, 0, sizeof(host_bridge));
+  memset(&ig_dev, 0, sizeof(ig_dev));
+
+  ig_dev.dev = 2;
+
+  pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL);
+
+  if (IS_I830(pI830) || IS_845G(pI830)) {
+    if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
+      aper_size = 0x80000000;
+    } else {
+      aper_size = 0x40000000;
+    }
+  } else {
+    if (IS_I9XX(pI830)) {
+      int ret;
+      ret = pci_device_cfg_read_u32(&ig_dev, &membase2, 0x18);
+      if (membase2 & 0x08000000)
+	aper_size = 0x8000000;
+      else
+	aper_size = 0x10000000;
+
+      fprintf(stderr,"aper size is %08X %08x %d\n", aper_size, membase2, ret);
+    } else
+      aper_size = 0x8000000;
+  }
+
+  pI830->aper_size = aper_size;
+
+
+  /* We need to reduce the stolen size, by the GTT and the popup.
+   * The GTT varying according the the FbMapSize and the popup is 4KB */
+  range = (ctx->shared.fbSize / (1024*1024)) + 4;
+
+   if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
+      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+      case I855_GMCH_GMS_STOLEN_1M:
+	 memsize = MB(1) - KB(range);
+	 break;
+      case I855_GMCH_GMS_STOLEN_4M:
+	 memsize = MB(4) - KB(range);
+	 break;
+      case I855_GMCH_GMS_STOLEN_8M:
+	 memsize = MB(8) - KB(range);
+	 break;
+      case I855_GMCH_GMS_STOLEN_16M:
+	 memsize = MB(16) - KB(range);
+	 break;
+      case I855_GMCH_GMS_STOLEN_32M:
+	 memsize = MB(32) - KB(range);
+	 break;
+      case I915G_GMCH_GMS_STOLEN_48M:
+	 if (IS_I9XX(pI830))
+	    memsize = MB(48) - KB(range);
+	 break;
+      case I915G_GMCH_GMS_STOLEN_64M:
+	 if (IS_I9XX(pI830))
+	    memsize = MB(64) - KB(range);
+	 break;
+      }
+   } else {
+      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+      case I830_GMCH_GMS_STOLEN_512:
+	 memsize = KB(512) - KB(range);
+	 break;
+      case I830_GMCH_GMS_STOLEN_1024:
+	 memsize = MB(1) - KB(range);
+	 break;
+      case I830_GMCH_GMS_STOLEN_8192:
+	 memsize = MB(8) - KB(range);
+	 break;
+      case I830_GMCH_GMS_LOCAL:
+	 memsize = 0;
+	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		    "Local memory found, but won't be used.\n");
+	 break;
+      }
+   }
+   if (memsize > 0) {
+     fprintf(stderr,
+		 "detected %d kB stolen memory.\n", memsize / 1024);
+   } else {
+     fprintf(stderr,
+		 "no video memory detected.\n");
+   }
+   return memsize;
+}
+
+static int AgpInit(const DRIDriverContext *ctx, I830Rec *info)
+{
+  unsigned long mode = 0x4;
+
+  if (drmAgpAcquire(ctx->drmFD) < 0) {
+    fprintf(stderr, "[gart] AGP not available\n");
+    return 0;
+  }
+  
+  if (drmAgpEnable(ctx->drmFD, mode) < 0) {
+    fprintf(stderr, "[gart] AGP not enabled\n");
+    drmAgpRelease(ctx->drmFD);
+    return 0;
+  }
+  else
+    fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
+
+  return 1;
+}
+
+/*
+ * Allocate memory from the given pool.  Grow the pool if needed and if
+ * possible.
+ */
+static unsigned long
+AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, 
+	      I830MemRange *result, I830MemPool *pool,
+	      long size, unsigned long alignment, int flags)
+{
+   long needed, start, end;
+
+   if (!result || !pool || !size)
+      return 0;
+
+   /* Calculate how much space is needed. */
+   if (alignment <= GTT_PAGE_SIZE)
+      needed = size;
+   else {
+	 start = ROUND_TO(pool->Free.Start, alignment);
+	 end = ROUND_TO(start + size, alignment);
+	 needed = end - pool->Free.Start;
+   }
+   if (needed > pool->Free.Size) {
+     return 0;
+   }
+
+   result->Start = ROUND_TO(pool->Free.Start, alignment);
+   pool->Free.Start += needed;
+   result->End = pool->Free.Start;
+
+   pool->Free.Size = pool->Free.End - pool->Free.Start;
+   result->Size = result->End - result->Start;
+   result->Pool = pool;
+   result->Alignment = alignment;
+   return needed;
+}
+
+static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange  *result)
+{
+   unsigned long start, end;
+   unsigned long newApStart, newApEnd;
+   int ret;
+   if (!result || !size)
+      return 0;
+   
+   if (!alignment)
+     alignment = 4;
+
+   start = ROUND_TO(pI830->MemoryAperture.Start, alignment);
+   end = ROUND_TO(start + size, alignment);
+   newApStart = end;
+   newApEnd = pI830->MemoryAperture.End;
+
+   ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key));
+   
+   if (ret)
+   {
+     fprintf(stderr,"drmAgpAlloc failed %d\n", ret);
+     return 0;
+   }
+   pI830->allocatedMemory += size;
+   pI830->MemoryAperture.Start = newApStart;
+   pI830->MemoryAperture.End = newApEnd;
+   pI830->MemoryAperture.Size = newApEnd - newApStart;
+   //   pI830->FreeMemory -= size;
+   result->Start = start;
+   result->End = start + size;
+   result->Size = size;
+   result->Offset = start;
+   result->Alignment = alignment;
+   result->Pool = NULL;
+  
+   return size;
+}
+
+unsigned long
+I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830,
+                I830MemRange *result, I830MemPool *pool, long size,
+                unsigned long alignment, int flags)
+{
+   unsigned long ret;
+
+   if (!result)
+      return 0;
+
+   /* Make sure these are initialised. */
+   result->Size = 0;
+   result->Key = -1;
+
+   if (!size) {
+      return 0;
+   }
+
+   if (pool->Free.Size < size) {
+      ret = AllocFromAGP(ctx, pI830, size, alignment, result);
+   }
+   else {
+      ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags);
+      if (ret == 0)
+         ret = AllocFromAGP(ctx, pI830, size, alignment, result);
+   }
+   return ret;
+}
+
+static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem)
+{
+  if (!mem)
+    return FALSE;
+  
+  if (mem->Key == -1)
+    return TRUE;
+
+  return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset);
+}
+
+/* simple memory allocation routines needed */
+/* put ring buffer in low memory */
+/* need to allocate front, back, depth buffers aligned correctly,
+   allocate ring buffer, 
+*/
+
+/* */
+static Bool
+I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  unsigned long size, ret;
+  unsigned long lines, lineSize, align;
+
+  /* allocate ring buffer */
+  memset(pI830->LpRing, 0, sizeof(I830RingBuffer));
+  pI830->LpRing->mem.Key = -1;
+
+  size = PRIMARY_RINGBUFFER_SIZE;
+  
+  ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0);
+  
+  if (ret != size)
+  {
+    fprintf(stderr,"unable to allocate ring buffer %ld\n", ret);
+    return FALSE;
+  }
+
+  pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1;
+
+  
+  /* allocate front buffer */
+  memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
+  pI830->FrontBuffer.Key = -1;
+  pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth;
+
+  align = KB(512);  
+
+  lineSize = ctx->shared.virtualWidth * ctx->cpp;
+  lines = (ctx->shared.virtualHeight + 15) / 16 * 16;
+  size = lineSize * lines;
+  size = ROUND_TO_PAGE(size);
+
+  align = GetBestTileAlignment(size);
+
+  ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0);
+  if (ret < size)
+  {
+    fprintf(stderr,"unable to allocate front buffer %ld\n", ret);
+    return FALSE;
+  }
+
+  memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
+  pI830->BackBuffer.Key = -1;
+  pI830->BackBuffer.Pitch = ctx->shared.virtualWidth;
+
+  ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0);
+  if (ret < size)
+  {
+    fprintf(stderr,"unable to allocate back buffer %ld\n", ret);
+    return FALSE;
+  }
+  
+  memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
+  pI830->DepthBuffer.Key = -1;
+  pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth;
+
+  ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0);
+  if (ret < size)
+  {
+    fprintf(stderr,"unable to allocate depth buffer %ld\n", ret);
+    return FALSE;
+  }
+
+  memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
+  pI830->ContextMem.Key = -1;
+  size = KB(32);
+
+  ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0);
+  if (ret < size)
+  {
+    fprintf(stderr,"unable to allocate context buffer %ld\n", ret);
+    return FALSE;
+  }
+
+#if 0  
+  memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
+  pI830->TexMem.Key = -1;
+
+  size = 32768 * 1024;
+  ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem);
+  if (ret < size)
+  {
+    fprintf(stderr,"unable to allocate texture memory %ld\n", ret);
+    return FALSE;
+  }
+#endif
+
+  return TRUE;
+}
+
+static Bool
+I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  if (!BindAgpRange(ctx, &pI830->LpRing->mem))
+    return FALSE;
+  if (!BindAgpRange(ctx, &pI830->FrontBuffer))
+    return FALSE;
+  if (!BindAgpRange(ctx, &pI830->BackBuffer))
+    return FALSE;
+  if (!BindAgpRange(ctx, &pI830->DepthBuffer))
+    return FALSE;
+  if (!BindAgpRange(ctx, &pI830->ContextMem))
+    return FALSE;
+#if 0
+  if (!BindAgpRange(ctx, &pI830->TexMem))
+    return FALSE;
+#endif
+  return TRUE;
+}
+
+static void SetupDRIMM(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  unsigned long aperEnd = ROUND_DOWN_TO(pI830->aper_size, GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
+  unsigned long aperStart = ROUND_TO(pI830->aper_size - KB(32768), GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
+
+  fprintf(stderr, "aper size is %08X\n", ctx->shared.fbSize);
+  if (drmMMInit(ctx->drmFD, aperStart, aperEnd - aperStart, DRM_BO_MEM_TT)) {
+      fprintf(stderr,
+	      "DRM MM Initialization Failed\n");
+  } else {
+    fprintf(stderr,
+	    "DRM MM Initialized at offset 0x%lx length %d page\n", aperStart, aperEnd-aperStart);
+  }
+
+}
+
+static Bool
+I830CleanupDma(const DRIDriverContext *ctx)
+{
+   drmI830Init info;
+
+   memset(&info, 0, sizeof(drmI830Init));
+   info.func = I830_CLEANUP_DMA;
+
+   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
+		       &info, sizeof(drmI830Init))) {
+     fprintf(stderr, "I830 Dma Cleanup Failed\n");
+      return FALSE;
+   }
+
+   return TRUE;
+}
+
+static Bool
+I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+   I830RingBuffer *ring = pI830->LpRing;
+   drmI830Init info;
+
+   memset(&info, 0, sizeof(drmI830Init));
+   info.func = I830_INIT_DMA;
+
+   info.ring_start = ring->mem.Start + pI830->LinearAddr;
+   info.ring_end = ring->mem.End + pI830->LinearAddr;
+   info.ring_size = ring->mem.Size;
+
+   info.mmio_offset = (unsigned int)ctx->MMIOStart;
+
+   info.sarea_priv_offset = sizeof(drm_sarea_t);
+
+   info.front_offset = pI830->FrontBuffer.Start;
+   info.back_offset = pI830->BackBuffer.Start;
+   info.depth_offset = pI830->DepthBuffer.Start;
+   info.w = ctx->shared.virtualWidth;
+   info.h = ctx->shared.virtualHeight;
+   info.pitch = ctx->shared.virtualWidth;
+   info.back_pitch = pI830->BackBuffer.Pitch;
+   info.depth_pitch = pI830->DepthBuffer.Pitch;
+   info.cpp = ctx->cpp;
+
+   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
+		       &info, sizeof(drmI830Init))) {
+      fprintf(stderr,
+		 "I830 Dma Initialization Failed\n");
+      return FALSE;
+   }
+
+   return TRUE;
+}
+
+static int I830CheckDRMVersion( const DRIDriverContext *ctx,
+				  I830Rec *pI830 )
+{
+   drmVersionPtr  version;
+
+   version = drmGetVersion(ctx->drmFD);
+
+   if (version) {
+     int req_minor, req_patch;
+
+     req_minor = 4;
+     req_patch = 0;	
+
+     if (version->version_major != 1 ||
+	 version->version_minor < req_minor ||
+	 (version->version_minor == req_minor && 
+	  version->version_patchlevel < req_patch)) {
+       /* Incompatible drm version */
+       fprintf(stderr,
+	       "[dri] I830DRIScreenInit failed because of a version "
+	       "mismatch.\n"
+	       "[dri] i915.o kernel module version is %d.%d.%d "
+	       "but version 1.%d.%d or newer is needed.\n"
+	       "[dri] Disabling DRI.\n",
+	       version->version_major,
+	       version->version_minor,
+	       version->version_patchlevel,
+	       req_minor,
+	       req_patch);
+       drmFreeVersion(version);
+       return 0;
+     }
+     
+     pI830->drmMinor = version->version_minor;
+     drmFreeVersion(version);
+   }
+   return 1;
+}
+
+static void
+I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830)
+{
+  unsigned int itemp;
+  unsigned char *MMIO = ctx->MMIOAddress;
+
+   OUTREG(LP_RING + RING_LEN, 0);
+   OUTREG(LP_RING + RING_TAIL, 0);
+   OUTREG(LP_RING + RING_HEAD, 0);
+
+   if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) !=
+       pI830->LpRing->mem.Start) {
+      fprintf(stderr,
+		 "I830SetRingRegs: Ring buffer start (%lx) violates its "
+		 "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK);
+   }
+   /* Don't care about the old value.  Reserved bits must be zero anyway. */
+   itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK;
+   OUTREG(LP_RING + RING_START, itemp);
+
+   if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) !=
+       pI830->LpRing->mem.Size - 4096) {
+      fprintf(stderr,
+		 "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its "
+		 "mask (%x)\n", pI830->LpRing->mem.Size - 4096,
+		 I830_RING_NR_PAGES);
+   }
+   /* Don't care about the old value.  Reserved bits must be zero anyway. */
+   itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES;
+   itemp |= (RING_NO_REPORT | RING_VALID);
+   OUTREG(LP_RING + RING_LEN, itemp);
+
+   pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
+   pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
+   pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
+   if (pI830->LpRing->space < 0)
+      pI830->LpRing->space += pI830->LpRing->mem.Size;
+
+   SetFenceRegs(ctx, pI830);
+   
+   /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky
+      hacky hacky */
+   OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr);
+
+}
+
+static Bool
+I830SetParam(const DRIDriverContext *ctx, int param, int value)
+{
+   drmI830SetParam sp;
+
+   memset(&sp, 0, sizeof(sp));
+   sp.param = param;
+   sp.value = value;
+
+   if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
+      fprintf(stderr, "I830 SetParam Failed\n");
+      return FALSE;
+   }
+
+   return TRUE;
+}
+
+static Bool
+I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
+{
+   fprintf(stderr,
+              "[drm] Mapping front buffer\n");
+
+   if (drmAddMap(ctx->drmFD,
+                 (drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
+                 sarea->front_size,
+                 DRM_FRAME_BUFFER,  /*DRM_AGP,*/
+                 0,
+                 &sarea->front_handle) < 0) {
+     fprintf(stderr,
+	     "[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
+      return FALSE;
+   }
+   ctx->shared.hFrameBuffer = sarea->front_handle;
+   ctx->shared.fbSize = sarea->front_size;
+   fprintf(stderr, "[drm] Front Buffer = 0x%08x\n",
+	   sarea->front_handle);
+
+   if (drmAddMap(ctx->drmFD,
+                 (drm_handle_t)(sarea->back_offset),
+                 sarea->back_size, DRM_AGP, 0,
+                 &sarea->back_handle) < 0) {
+      fprintf(stderr,
+                 "[drm] drmAddMap(back_handle) failed. Disabling DRI\n");
+      return FALSE;
+   }
+   fprintf(stderr, "[drm] Back Buffer = 0x%08x\n",
+              sarea->back_handle);
+
+   if (drmAddMap(ctx->drmFD,
+                 (drm_handle_t)sarea->depth_offset,
+                 sarea->depth_size, DRM_AGP, 0,
+                 &sarea->depth_handle) < 0) {
+      fprintf(stderr,
+                 "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n");
+      return FALSE;
+   }
+   fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n",
+              sarea->depth_handle);
+
+#if 0
+   if (drmAddMap(ctx->drmFD,
+		 (drm_handle_t)sarea->tex_offset,
+		 sarea->tex_size, DRM_AGP, 0,
+		 &sarea->tex_handle) < 0) {
+      fprintf(stderr,
+		 "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
+      return FALSE;
+   }
+   fprintf(stderr, "[drm] textures = 0x%08x\n",
+	      sarea->tex_handle);
+#endif
+   return TRUE;
+}
+
+
+static void
+I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
+{
+#if 1
+   if (sarea->front_handle) {
+      drmRmMap(ctx->drmFD, sarea->front_handle);
+      sarea->front_handle = 0;
+   }
+#endif
+   if (sarea->back_handle) {
+      drmRmMap(ctx->drmFD, sarea->back_handle);
+      sarea->back_handle = 0;
+   }
+   if (sarea->depth_handle) {
+      drmRmMap(ctx->drmFD, sarea->depth_handle);
+      sarea->depth_handle = 0;
+   }
+   if (sarea->tex_handle) {
+      drmRmMap(ctx->drmFD, sarea->tex_handle);
+      sarea->tex_handle = 0;
+   }
+}
+
+static Bool
+I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
+{
+  if (drmAddMap(ctx->drmFD,
+		(drm_handle_t)pI830->LpRing->mem.Start,
+		pI830->LpRing->mem.Size, DRM_AGP, 0,
+		&pI830->ring_map) < 0) {
+    fprintf(stderr,
+	    "[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
+    return FALSE;
+  }
+  fprintf(stderr, "[drm] ring buffer = 0x%08x\n",
+	  pI830->ring_map);
+
+  if (I830InitDma(ctx, pI830) == FALSE) {
+    return FALSE;
+  }
+  
+   /* init to zero to be safe */
+
+  I830DRIMapScreenRegions(ctx, pI830, sarea);
+  SetupDRIMM(ctx, pI830);
+
+   if (ctx->pciDevice != PCI_CHIP_845_G &&
+       ctx->pciDevice != PCI_CHIP_I830_M) {
+      I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
+   }
+
+   /* Okay now initialize the dma engine */
+   {
+      pI830->irq = drmGetInterruptFromBusID(ctx->drmFD,
+					    ctx->pciBus,
+					    ctx->pciDevice,
+					    ctx->pciFunc);
+
+      if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) {
+	 fprintf(stderr,
+		    "[drm] failure adding irq handler\n");
+	 pI830->irq = 0;
+	 return FALSE;
+      }
+      else
+	 fprintf(stderr,
+		    "[drm] dma control initialized, using IRQ %d\n",
+		    pI830->irq);
+   }
+
+   fprintf(stderr, "[dri] visual configs initialized\n");
+
+   return TRUE;
+}
+
+static Bool
+I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
+{
+  /* need to drmMap front and back buffers and zero them */
+  drmAddress map_addr;
+  int ret;
+
+  ret = drmMap(ctx->drmFD,
+	       sarea->front_handle,
+	       sarea->front_size,
+	       &map_addr);
+
+  if (ret)
+  {
+    fprintf(stderr, "Unable to map front buffer\n");
+    return FALSE;
+  }
+
+  drimemsetio((char *)map_addr,
+	      0,
+	      sarea->front_size);
+  drmUnmap(map_addr, sarea->front_size);
+
+
+  ret = drmMap(ctx->drmFD,
+	       sarea->back_handle,
+	       sarea->back_size,
+	       &map_addr);
+
+  if (ret)
+  {
+    fprintf(stderr, "Unable to map back buffer\n");
+    return FALSE;
+  }
+
+  drimemsetio((char *)map_addr,
+	      0,
+	      sarea->back_size);
+  drmUnmap(map_addr, sarea->back_size);
+
+  return TRUE;
+}
+
+static Bool
+I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830)
+		  
+{
+   I830DRIPtr pI830DRI;
+   drmI830Sarea *pSAREAPriv;
+   int err;
+      
+   drm_page_size = getpagesize();   
+
+   pI830->registerSize = ctx->MMIOSize;
+   /* This is a hack for now.  We have to have more than a 4k page here
+    * because of the size of the state.  However, the state should be
+    * in a per-context mapping.  This will be added in the Mesa 3.5 port
+    * of the I830 driver.
+    */
+   ctx->shared.SAREASize = SAREA_MAX;
+
+   /* Note that drmOpen will try to load the kernel module, if needed. */
+   ctx->drmFD = drmOpen("i915", NULL );
+   if (ctx->drmFD < 0) {
+      fprintf(stderr, "[drm] drmOpen failed\n");
+      return 0;
+   }
+
+   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
+      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
+	      ctx->drmFD, ctx->pciBusID, strerror(-err));
+      return 0;
+   }
+
+   if (drmAddMap( ctx->drmFD,
+		  0,
+		  ctx->shared.SAREASize,
+		  DRM_SHM,
+		  DRM_CONTAINS_LOCK,
+		  &ctx->shared.hSAREA) < 0)
+   {
+     fprintf(stderr, "[drm] drmAddMap failed\n");
+     return 0;
+   }
+
+   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n",
+	   ctx->shared.SAREASize, ctx->shared.hSAREA);
+   
+   if (drmMap( ctx->drmFD,
+	       ctx->shared.hSAREA,
+	       ctx->shared.SAREASize,
+	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
+   {
+      fprintf(stderr, "[drm] drmMap failed\n");
+      return 0;
+   
+   }
+   
+   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
+   fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n",
+	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
+   
+
+   if (drmAddMap(ctx->drmFD, 
+		 ctx->MMIOStart,
+		 ctx->MMIOSize,
+		 DRM_REGISTERS, 
+		 DRM_READ_ONLY, 
+		 &pI830->registerHandle) < 0) {
+      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
+      return 0;
+   }
+   fprintf(stderr,
+	   "[drm] register handle = 0x%08x\n", pI830->registerHandle);
+
+
+   if (!I830CheckDRMVersion(ctx, pI830)) {
+     return FALSE;
+   }
+
+   /* Create a 'server' context so we can grab the lock for
+    * initialization ioctls.
+    */
+   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
+      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
+      return 0;
+   }
+
+   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
+
+   /* Initialize the SAREA private data structure */
+   pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
+				 sizeof(drm_sarea_t));
+   memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
+
+   pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830);
+   pI830->StolenMemory.Start = 0;
+   pI830->StolenMemory.End = pI830->StolenMemory.Size;
+
+   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
+   pI830->MemoryAperture.End = KB(40000);
+   pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start;
+
+   pI830->StolenPool.Fixed = pI830->StolenMemory;
+   pI830->StolenPool.Total = pI830->StolenMemory;
+   pI830->StolenPool.Free = pI830->StolenPool.Total;
+   pI830->FreeMemory = pI830->StolenPool.Total.Size;
+
+   if (!AgpInit(ctx, pI830))
+     return FALSE;
+
+   if (I830AllocateMemory(ctx, pI830) == FALSE)
+   {
+     return FALSE;
+   }
+
+   if (I830BindMemory(ctx, pI830) == FALSE)
+   {
+     return FALSE;
+   }
+
+   pSAREAPriv->rotated_offset = -1;
+   pSAREAPriv->rotated_size = 0;
+   pSAREAPriv->rotated_pitch = ctx->shared.virtualWidth;
+
+   pSAREAPriv->front_offset = pI830->FrontBuffer.Start;
+   pSAREAPriv->front_size = pI830->FrontBuffer.Size;
+   pSAREAPriv->width = ctx->shared.virtualWidth;
+   pSAREAPriv->height = ctx->shared.virtualHeight;
+   pSAREAPriv->pitch = ctx->shared.virtualWidth;
+   pSAREAPriv->virtualX = ctx->shared.virtualWidth;
+   pSAREAPriv->virtualY = ctx->shared.virtualHeight;
+   pSAREAPriv->back_offset = pI830->BackBuffer.Start;
+   pSAREAPriv->back_size = pI830->BackBuffer.Size;
+   pSAREAPriv->depth_offset = pI830->DepthBuffer.Start;
+   pSAREAPriv->depth_size = pI830->DepthBuffer.Size;
+#if 0
+   pSAREAPriv->tex_offset = pI830->TexMem.Start;
+   pSAREAPriv->tex_size = pI830->TexMem.Size;
+#endif
+   pSAREAPriv->log_tex_granularity = pI830->TexGranularity;
+
+   ctx->driverClientMsg = malloc(sizeof(I830DRIRec));
+   ctx->driverClientMsgSize = sizeof(I830DRIRec);
+   pI830DRI = (I830DRIPtr)ctx->driverClientMsg;
+   pI830DRI->deviceID = pI830->Chipset;
+   pI830DRI->regsSize = I830_REG_SIZE;
+   pI830DRI->width = ctx->shared.virtualWidth;
+   pI830DRI->height = ctx->shared.virtualHeight;
+   pI830DRI->mem = ctx->shared.fbSize;
+   pI830DRI->cpp = ctx->cpp;
+
+   pI830DRI->bitsPerPixel = ctx->bpp;
+   pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t);
+   
+   err = I830DRIDoMappings(ctx, pI830, pSAREAPriv);
+   if (err == FALSE)
+       return FALSE;
+
+   I830SetupMemoryTiling(ctx, pI830);
+
+   /* Quick hack to clear the front & back buffers.  Could also use
+    * the clear ioctl to do this, but would need to setup hw state
+    * first.
+    */
+   I830ClearScreen(ctx, pI830, pSAREAPriv);
+
+   I830SetRingRegs(ctx, pI830);
+
+   return TRUE;
+}
+
+
+/**
+ * \brief Validate the fbdev mode.
+ * 
+ * \param ctx display handle.
+ *
+ * \return one on success, or zero on failure.
+ *
+ * Saves some registers and returns 1.
+ *
+ * \sa radeonValidateMode().
+ */
+static int i830ValidateMode( const DRIDriverContext *ctx )
+{
+  return 1;
+}
+
+/**
+ * \brief Examine mode returned by fbdev.
+ * 
+ * \param ctx display handle.
+ *
+ * \return one on success, or zero on failure.
+ *
+ * Restores registers that fbdev has clobbered and returns 1.
+ *
+ * \sa i810ValidateMode().
+ */
+static int i830PostValidateMode( const DRIDriverContext *ctx )
+{
+  I830Rec *pI830 = ctx->driverPrivate;
+
+  I830SetRingRegs(ctx, pI830);
+  return 1;
+}
+
+
+/**
+ * \brief Initialize the framebuffer device mode
+ *
+ * \param ctx display handle.
+ *
+ * \return one on success, or zero on failure.
+ *
+ * Fills in \p info with some default values and some information from \p ctx
+ * and then calls I810ScreenInit() for the screen initialization.
+ * 
+ * Before exiting clears the framebuffer memory accessing it directly.
+ */
+static int i830InitFBDev( DRIDriverContext *ctx )
+{
+  I830Rec *pI830 = calloc(1, sizeof(I830Rec));
+  int i;
+
+   {
+      int  dummy = ctx->shared.virtualWidth;
+
+      switch (ctx->bpp / 8) {
+      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
+      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
+      case 3:
+      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
+      }
+
+      ctx->shared.virtualWidth = dummy;
+      ctx->shared.Width = ctx->shared.virtualWidth;
+   }
+
+
+   for (i = 0; pitches[i] != 0; i++) {
+     if (pitches[i] >= ctx->shared.virtualWidth) {
+       ctx->shared.virtualWidth = pitches[i];
+       break;
+     }
+   }
+
+   ctx->driverPrivate = (void *)pI830;
+   
+   pI830->LpRing = calloc(1, sizeof(I830RingBuffer));
+   pI830->Chipset = ctx->chipset;
+   pI830->LinearAddr = ctx->FBStart;
+
+   if (!I830ScreenInit( ctx, pI830 ))
+      return 0;
+
+   
+   return 1;
+}
+
+
+/**
+ * \brief The screen is being closed, so clean up any state and free any
+ * resources used by the DRI.
+ *
+ * \param ctx display handle.
+ *
+ * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
+ * private data.
+ */
+static void i830HaltFBDev( DRIDriverContext *ctx )
+{
+  drmI830Sarea *pSAREAPriv;
+  I830Rec *pI830 = ctx->driverPrivate;
+
+   if (pI830->irq) {
+       drmCtlUninstHandler(ctx->drmFD);
+       pI830->irq = 0;   }
+
+   I830CleanupDma(ctx);
+
+  pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
+				sizeof(drm_sarea_t));
+
+  I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv);
+  drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
+  drmClose(ctx->drmFD);
+  
+  if (ctx->driverPrivate) {
+    free(ctx->driverPrivate);
+    ctx->driverPrivate = 0;
+  }
+}
+
+
+extern void i810NotifyFocus( int );
+
+/**
+ * \brief Exported driver interface for Mini GLX.
+ *
+ * \sa DRIDriverRec.
+ */
+const struct DRIDriverRec __driDriver = {
+   i830ValidateMode,
+   i830PostValidateMode,
+   i830InitFBDev,
+   i830HaltFBDev,
+   NULL,//I830EngineShutdown,
+   NULL, //I830EngineRestore,  
+#ifndef _EMBEDDED
+   0,
+#else
+   i810NotifyFocus, 
+#endif
+};
diff --git a/src/mesa/drivers/dri/mach64/mach64_context.c b/src/mesa/drivers/dri/mach64/mach64_context.c
index 7f558e92bc6..99abd209b69 100644
--- a/src/mesa/drivers/dri/mach64/mach64_context.c
+++ b/src/mesa/drivers/dri/mach64/mach64_context.c
@@ -29,12 +29,12 @@
  *	Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
-#include "glheader.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -253,9 +253,6 @@ GLboolean mach64CreateContext( const __GLcontextModes *glVisual,
 
    mmesa->do_irqs = (mmesa->mach64Screen->irq && !getenv("MACH64_NO_IRQS"));
 
-   mmesa->vblank_flags = (mmesa->do_irqs)
-      ? driGetDefaultVBlankFlags(&mmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-
    driContextPriv->driverPrivate = (void *)mmesa;
 
    if (driQueryOptionb(&mmesa->optionCache, "no_rast")) {
@@ -330,10 +327,15 @@ mach64MakeCurrent( __DRIcontextPrivate *driContextPriv,
       }
 
       
-      driDrawableInitVBlank( driDrawPriv, newMach64Ctx->vblank_flags,
-			     &newMach64Ctx->vbl_seq );
-
       if ( newMach64Ctx->driDrawable != driDrawPriv ) {
+	 if (driDrawPriv->swap_interval == (unsigned)-1) {
+	    driDrawPriv->vblFlags = (newMach64Ctx->do_irqs)
+	       ? driGetDefaultVBlankFlags(&newMach64Ctx->optionCache)
+	       : VBLANK_FLAG_NO_IRQ;
+
+	    driDrawableInitVBlank( driDrawPriv );
+	 }
+
 	 newMach64Ctx->driDrawable = driDrawPriv;
 	 mach64CalcViewport( newMach64Ctx->glCtx );
       }
diff --git a/src/mesa/drivers/dri/mach64/mach64_context.h b/src/mesa/drivers/dri/mach64/mach64_context.h
index e925f18c114..55e0618ff80 100644
--- a/src/mesa/drivers/dri/mach64/mach64_context.h
+++ b/src/mesa/drivers/dri/mach64/mach64_context.h
@@ -36,7 +36,7 @@
 #include "drm.h"
 #include "mach64_drm.h"
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 #include "mach64_reg.h"
 
@@ -263,8 +263,6 @@ struct mach64_context {
 
    /* VBI
     */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
    GLuint do_irqs;
 
    /* Configuration cache
diff --git a/src/mesa/drivers/dri/mach64/mach64_dd.c b/src/mesa/drivers/dri/mach64/mach64_dd.c
index 7d225ebc888..e400e9a918d 100644
--- a/src/mesa/drivers/dri/mach64/mach64_dd.c
+++ b/src/mesa/drivers/dri/mach64/mach64_dd.c
@@ -35,9 +35,10 @@
 #include "mach64_vb.h"
 #include "mach64_dd.h"
 
-#include "context.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+
 #include "utils.h"
-#include "framebuffer.h"
 
 #define DRIVER_DATE	"20051019"
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_ioctl.c b/src/mesa/drivers/dri/mach64/mach64_ioctl.c
index 6bc2b58ce94..ef5c0625c31 100644
--- a/src/mesa/drivers/dri/mach64/mach64_ioctl.c
+++ b/src/mesa/drivers/dri/mach64/mach64_ioctl.c
@@ -35,8 +35,8 @@
 #include "mach64_ioctl.h"
 #include "mach64_tex.h"
 
-#include "imports.h"
-#include "macros.h"
+#include "main/imports.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 
@@ -279,7 +279,7 @@ static int mach64WaitForFrameCompletion( mach64ContextPtr mmesa )
 
 /* Copy the back color buffer to the front color buffer.
  */
-void mach64CopyBuffer( const __DRIdrawablePrivate *dPriv )
+void mach64CopyBuffer( __DRIdrawablePrivate *dPriv )
 {
    mach64ContextPtr mmesa;
    GLint nbox, i, ret;
@@ -320,7 +320,7 @@ void mach64CopyBuffer( const __DRIdrawablePrivate *dPriv )
 #endif
 
    UNLOCK_HARDWARE( mmesa );
-   driWaitForVBlank( dPriv, &mmesa->vbl_seq, mmesa->vblank_flags, &missed_target );
+   driWaitForVBlank( dPriv, &missed_target );
    LOCK_HARDWARE( mmesa );
 
    /* use front buffer cliprects */
diff --git a/src/mesa/drivers/dri/mach64/mach64_ioctl.h b/src/mesa/drivers/dri/mach64/mach64_ioctl.h
index 2153ab80d78..6ef9bc0bcaf 100644
--- a/src/mesa/drivers/dri/mach64/mach64_ioctl.h
+++ b/src/mesa/drivers/dri/mach64/mach64_ioctl.h
@@ -44,7 +44,7 @@ extern void mach64FlushVerticesLocked( mach64ContextPtr mmesa );
 extern void mach64FlushDMALocked( mach64ContextPtr mmesa );
 extern void mach64UploadHwStateLocked( mach64ContextPtr mmesa );
 
-static __inline void *mach64AllocDmaLow( mach64ContextPtr mmesa, int bytes )
+static INLINE void *mach64AllocDmaLow( mach64ContextPtr mmesa, int bytes )
 {
    CARD32 *head;
 
@@ -60,7 +60,7 @@ static __inline void *mach64AllocDmaLow( mach64ContextPtr mmesa, int bytes )
    return head;
 }
 
-static __inline void *mach64AllocDmaLocked( mach64ContextPtr mmesa, int bytes )
+static INLINE void *mach64AllocDmaLocked( mach64ContextPtr mmesa, int bytes )
 {
    CARD32 *head;
 
@@ -78,7 +78,7 @@ extern void mach64FireBlitLocked( mach64ContextPtr mmesa, void *buffer,
 				  GLint offset, GLint pitch, GLint format,
 				  GLint x, GLint y, GLint width, GLint height );
 
-extern void mach64CopyBuffer( const __DRIdrawablePrivate *dPriv );
+extern void mach64CopyBuffer( __DRIdrawablePrivate *dPriv );
 #if ENABLE_PERF_BOXES
 extern void mach64PerformanceCounters( mach64ContextPtr mmesa );
 extern void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa );
diff --git a/src/mesa/drivers/dri/mach64/mach64_lock.c b/src/mesa/drivers/dri/mach64/mach64_lock.c
index ea605fb0614..d018ba41748 100644
--- a/src/mesa/drivers/dri/mach64/mach64_lock.c
+++ b/src/mesa/drivers/dri/mach64/mach64_lock.c
@@ -70,7 +70,7 @@ void mach64GetLock( mach64ContextPtr mmesa, GLuint flags )
 
    if ( mmesa->lastStamp != dPriv->lastStamp ) {
       mmesa->lastStamp = dPriv->lastStamp;
-      if (mmesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT)
+      if (mmesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT)
          mach64SetCliprects( mmesa->glCtx, GL_BACK_LEFT );
       else
          mach64SetCliprects( mmesa->glCtx, GL_FRONT_LEFT );
diff --git a/src/mesa/drivers/dri/mach64/mach64_screen.c b/src/mesa/drivers/dri/mach64/mach64_screen.c
index 300a3deaaf9..6bfb4c32b15 100644
--- a/src/mesa/drivers/dri/mach64/mach64_screen.c
+++ b/src/mesa/drivers/dri/mach64/mach64_screen.c
@@ -35,10 +35,10 @@
 #include "mach64_vb.h"
 #include "mach64_span.h"
 
-#include "context.h"
-#include "imports.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/context.h"
+#include "main/imports.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "utils.h"
 #include "vblank.h"
@@ -69,79 +69,15 @@ static const GLuint __driNConfigOptions = 2;
 
 extern const struct dri_extension card_extensions[];
 
-static __GLcontextModes * fill_in_modes( __GLcontextModes * modes,
-					 unsigned pixel_bits, 
-					 unsigned depth_bits,
-					 unsigned stencil_bits,
-					 const GLenum * db_modes,
-					 unsigned num_db_modes,
-					 int visType )
+static const __DRIconfig **
+mach64FillInModes( __DRIscreenPrivate *psp,
+		   unsigned pixel_bits, unsigned depth_bits,
+		   unsigned stencil_bits, GLboolean have_back_buffer )
 {
-       static const uint8_t bits[2][4] = {
-	{          5,          6,          5,          0 },
-	{          8,          8,          8,          0 }
-    };
-
-    static const uint32_t masks[2][4] = {
-	{ 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 },
-	{ 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }
-    };
-
-    unsigned   i;
-    unsigned   j;
-    const unsigned index = ((pixel_bits + 15) / 16) - 1;
-
-    for ( i = 0 ; i < num_db_modes ; i++ ) {
-	for ( j = 0 ; j < 2 ; j++ ) {
-
-	    modes->redBits   = bits[index][0];
-	    modes->greenBits = bits[index][1];
-	    modes->blueBits  = bits[index][2];
-	    modes->alphaBits = bits[index][3];
-	    modes->redMask   = masks[index][0];
-	    modes->greenMask = masks[index][1];
-	    modes->blueMask  = masks[index][2];
-	    modes->alphaMask = masks[index][3];
-	    modes->rgbBits   = modes->redBits + modes->greenBits
-		+ modes->blueBits + modes->alphaBits;
-
-	    modes->accumRedBits   = 16 * j;
-	    modes->accumGreenBits = 16 * j;
-	    modes->accumBlueBits  = 16 * j;
-	    modes->accumAlphaBits = 0;
-	    modes->visualRating = (j == 0) ? GLX_NONE : GLX_SLOW_CONFIG;
-	    modes->drawableType = GLX_WINDOW_BIT | GLX_PIXMAP_BIT;
-	    modes->stencilBits = stencil_bits;
-	    modes->depthBits = depth_bits;
-
-	    modes->visualType = visType;
-	    modes->renderType = GLX_RGBA_BIT;
-	    modes->rgbMode = GL_TRUE;
-
-	    if ( db_modes[i] == GLX_NONE ) {
-
-		modes->doubleBufferMode = GL_FALSE;
-	    }
-	    else {
-		modes->doubleBufferMode = GL_TRUE;
-		modes->swapMethod = db_modes[i];
-	    }
-
-	    modes = modes->next;
-	}
-    }
-    
-    return modes;
-}
-
-
-static __GLcontextModes *
-mach64FillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
-{
-   __GLcontextModes * modes;
+    __DRIconfig **configs;
     __GLcontextModes * m;
-    unsigned num_modes;
+    GLenum fb_format;
+    GLenum fb_type;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     unsigned i;
@@ -155,49 +91,51 @@ mach64FillInModes( unsigned pixel_bits, unsigned depth_bits,
 	GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
     };
 
-    int depth_buffer_modes[2][2];
-
+    uint8_t depth_bits_array[2];
+    uint8_t stencil_bits_array[2];
 
-    depth_buffer_modes[0][0] = depth_bits;
-    depth_buffer_modes[1][0] = depth_bits;
+    depth_bits_array[0] = depth_bits;
+    depth_bits_array[1] = depth_bits;
     
     /* Just like with the accumulation buffer, always provide some modes
      * with a stencil buffer.  It will be a sw fallback, but some apps won't
      * care about that.
      */
-    depth_buffer_modes[0][1] = 0;
-    depth_buffer_modes[1][1] = (stencil_bits == 0) ? 8 : stencil_bits;
+    stencil_bits_array[0] = 0;
+    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
 
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    for ( i = 0 ; i < depth_buffer_factor ; i++ ) {
-	m = fill_in_modes( m, pixel_bits, 
-			   depth_buffer_modes[i][0], depth_buffer_modes[i][1],
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR );
+    if (pixel_bits == 16) {
+       fb_format = GL_RGB;
+       fb_type = GL_UNSIGNED_SHORT_5_6_5;
+    }
+    else {
+       fb_format = GL_BGRA;
+       fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    for ( i = 0 ; i < depth_buffer_factor ; i++ ) {
-	m = fill_in_modes( m, pixel_bits, 
-			   depth_buffer_modes[i][0], depth_buffer_modes[i][1],
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR );
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor, back_buffer_modes,
+			       back_buffer_factor);
+    if (configs == NULL) {
+       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n",
+	       __func__, __LINE__);
+       return NULL;
     }
 
     /* Mark the visual as slow if there are "fake" stencil bits.
      */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-       if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ){
-	    m->visualRating = GLX_SLOW_CONFIG;
-	}
+    for (i = 0; configs[i]; i++) {
+       m = &configs[i]->modes;
+       if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
+	  m->visualRating = GLX_SLOW_CONFIG;
+       }
     }
 
-    return modes;
+    return (const __DRIconfig **) configs;
 }
 
 
@@ -208,9 +146,7 @@ mach64CreateScreen( __DRIscreenPrivate *sPriv )
 {
    mach64ScreenPtr mach64Screen;
    ATIDRIPtr serverInfo = (ATIDRIPtr)sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
+   int i;
 
    if (sPriv->devPrivSize != sizeof(ATIDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(ATIDRIRec) does not match passed size from device driver\n");
@@ -319,15 +255,14 @@ mach64CreateScreen( __DRIscreenPrivate *sPriv )
 
    mach64Screen->driScreen = sPriv;
 
-   if ( glx_enable_extension != NULL ) {
-      if ( mach64Screen->irq != 0 ) {
-	 (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-	 (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-	 (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      }
-
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
+   i = 0;
+   mach64Screen->extensions[i++] = &driFrameTrackingExtension.base;
+   if ( mach64Screen->irq != 0 ) {
+      mach64Screen->extensions[i++] = &driSwapControlExtension.base;
+      mach64Screen->extensions[i++] = &driMediaStreamCounterExtension.base;
    }
+   mach64Screen->extensions[i++] = NULL;
+   sPriv->extensions = mach64Screen->extensions;
 
    return mach64Screen;
 }
@@ -475,9 +410,48 @@ mach64InitDriver( __DRIscreenPrivate *driScreen )
    return GL_TRUE;
 }
 
+/**
+ * This is the driver specific part of the createNewScreen entry point.
+ * 
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
+ */
+static const __DRIconfig **
+mach64InitScreen(__DRIscreenPrivate *psp)
+{
+   static const __DRIversion ddx_expected = { 6, 4, 0 };
+   static const __DRIversion dri_expected = { 4, 0, 0 };
+   static const __DRIversion drm_expected = { 2, 0, 0 };
+   ATIDRIPtr dri_priv = (ATIDRIPtr) psp->pDevPriv;
 
-static struct __DriverAPIRec mach64API = {
-   .InitDriver      = mach64InitDriver,
+   if ( ! driCheckDriDdxDrmVersions2( "Mach64",
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) ) {
+      return NULL;
+   }
+   
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+   if (!mach64InitDriver(psp))
+      return NULL;
+
+   return  mach64FillInModes( psp, dri_priv->cpp * 8, 16, 0, 1);
+}
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = mach64InitScreen,
    .DestroyScreen   = mach64DestroyScreen,
    .CreateContext   = mach64CreateContext,
    .DestroyContext  = mach64DestroyContext,
@@ -487,71 +461,9 @@ static struct __DriverAPIRec mach64API = {
    .MakeCurrent     = mach64MakeCurrent,
    .UnbindContext   = mach64UnbindContext,
    .GetSwapInfo     = NULL,
-   .GetMSC          = driGetMSC32,
+   .GetDrawableMSC  = driDrawableGetMSC32,
    .WaitForMSC      = driWaitForMSC32,
    .WaitForSBC      = NULL,
    .SwapBuffersMSC  = NULL
 };
 
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
-{
-   __DRIscreenPrivate *psp;
-   static const __DRIversion ddx_expected = { 6, 4, 0 };
-   static const __DRIversion dri_expected = { 4, 0, 0 };
-   static const __DRIversion drm_expected = { 2, 0, 0 };
-
-   dri_interface = interface;
-
-   if ( ! driCheckDriDdxDrmVersions2( "Mach64",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
-      return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &mach64API);
-   if ( psp != NULL ) {
-      ATIDRIPtr dri_priv = (ATIDRIPtr) psp->pDevPriv;
-      *driver_modes = mach64FillInModes( dri_priv->cpp * 8,
-					 16,
-					 0,
-					 1);
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
-
-   return (void *) psp;
-}
diff --git a/src/mesa/drivers/dri/mach64/mach64_screen.h b/src/mesa/drivers/dri/mach64/mach64_screen.h
index 7bf7dc474d1..be5e29a3e58 100644
--- a/src/mesa/drivers/dri/mach64/mach64_screen.h
+++ b/src/mesa/drivers/dri/mach64/mach64_screen.h
@@ -73,6 +73,8 @@ typedef struct {
    __DRIscreenPrivate *driScreen;
 
    driOptionCache optionCache;
+
+   const __DRIextension *extensions[4];
 } mach64ScreenRec, *mach64ScreenPtr;
 
 #endif /* __MACH64_SCREEN_H__ */
diff --git a/src/mesa/drivers/dri/mach64/mach64_span.c b/src/mesa/drivers/dri/mach64/mach64_span.c
index 5c2403f587f..91d46ce32eb 100644
--- a/src/mesa/drivers/dri/mach64/mach64_span.c
+++ b/src/mesa/drivers/dri/mach64/mach64_span.c
@@ -117,6 +117,8 @@
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )					\
    *(GLushort *)(buf + ((_x) + (_y) * drb->pitch) * 2) = d;
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_state.c b/src/mesa/drivers/dri/mach64/mach64_state.c
index 9ac51ee5b1d..3a023187ce7 100644
--- a/src/mesa/drivers/dri/mach64/mach64_state.c
+++ b/src/mesa/drivers/dri/mach64/mach64_state.c
@@ -36,9 +36,9 @@
 #include "mach64_vb.h"
 #include "mach64_tex.h"
 
-#include "context.h"
-#include "enums.h"
-#include "colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -726,24 +726,26 @@ static void mach64DDDrawBuffer( GLcontext *ctx, GLenum mode )
 
    FLUSH_BATCH( mmesa );
 
-   /*
-    * _DrawDestMask is easier to cope with than <mode>.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
+      FALLBACK( mmesa, MACH64_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       FALLBACK( mmesa, MACH64_FALLBACK_DRAW_BUFFER, GL_FALSE );
       mach64SetCliprects( ctx, GL_FRONT_LEFT );
       if (MACH64_DEBUG & DEBUG_VERBOSE_MSG)
 	 fprintf(stderr,"%s: BUFFER_BIT_FRONT_LEFT\n", __FUNCTION__);
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       FALLBACK( mmesa, MACH64_FALLBACK_DRAW_BUFFER, GL_FALSE );
       mach64SetCliprects( ctx, GL_BACK_LEFT );
       if (MACH64_DEBUG & DEBUG_VERBOSE_MSG)
 	 fprintf(stderr,"%s: BUFFER_BIT_BACK_LEFT\n", __FUNCTION__);
       break;
    default:
-      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( mmesa, MACH64_FALLBACK_DRAW_BUFFER, GL_TRUE );
       if (MACH64_DEBUG & DEBUG_VERBOSE_MSG)
 	 fprintf(stderr,"%s: fallback (mode=%d)\n", __FUNCTION__, mode);
diff --git a/src/mesa/drivers/dri/mach64/mach64_tex.c b/src/mesa/drivers/dri/mach64/mach64_tex.c
index c42588e064a..1f9d3c57ebe 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tex.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tex.c
@@ -36,15 +36,15 @@
 #include "mach64_tris.h"
 #include "mach64_tex.h"
 
-#include "context.h"
-#include "macros.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texobj.h"
-#include "imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+#include "main/imports.h"
 
 
 static void mach64SetTexWrap( mach64TexObjPtr t,
diff --git a/src/mesa/drivers/dri/mach64/mach64_tex.h b/src/mesa/drivers/dri/mach64/mach64_tex.h
index e67661b9706..8e0b23ed15b 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tex.h
+++ b/src/mesa/drivers/dri/mach64/mach64_tex.h
@@ -72,9 +72,9 @@ extern void mach64InitTextureFuncs( struct dd_function_table *functions );
 #define MACH64PACKCOLOR4444(r, g, b, a)					\
    ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
 
-static __inline__ GLuint mach64PackColor( GLuint cpp,
-					  GLubyte r, GLubyte g,
-					  GLubyte b, GLubyte a )
+static INLINE GLuint mach64PackColor( GLuint cpp,
+                                      GLubyte r, GLubyte g,
+                                      GLubyte b, GLubyte a )
 {
    switch ( cpp ) {
    case 2:
diff --git a/src/mesa/drivers/dri/mach64/mach64_texmem.c b/src/mesa/drivers/dri/mach64/mach64_texmem.c
index d65b2cda6ad..734e547952e 100644
--- a/src/mesa/drivers/dri/mach64/mach64_texmem.c
+++ b/src/mesa/drivers/dri/mach64/mach64_texmem.c
@@ -38,11 +38,11 @@
 #include "mach64_tris.h"
 #include "mach64_tex.h"
 
-#include "context.h"
-#include "macros.h"
-#include "simple_list.h"
-#include "texformat.h"
-#include "imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
+#include "main/imports.h"
 
 
 /* Destroy hardware state associated with texture `t'.
diff --git a/src/mesa/drivers/dri/mach64/mach64_texstate.c b/src/mesa/drivers/dri/mach64/mach64_texstate.c
index 80c84d67746..fd2369dd882 100644
--- a/src/mesa/drivers/dri/mach64/mach64_texstate.c
+++ b/src/mesa/drivers/dri/mach64/mach64_texstate.c
@@ -29,11 +29,11 @@
  *	José Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
 
 #include "mach64_context.h"
 #include "mach64_ioctl.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_tris.c b/src/mesa/drivers/dri/mach64/mach64_tris.c
index e4df01106d3..f2e8e2e3ae8 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tris.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tris.c
@@ -29,10 +29,10 @@
  *	José Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -113,7 +113,7 @@ do {									\
 #define COPY_VERTEX_OOA( vb, vertsize, v, n )	DO_COPY_VERTEX( vb, vertsize, v, n, 1 )
 
 
-static __inline void mach64_draw_quad( mach64ContextPtr mmesa,
+static INLINE void mach64_draw_quad( mach64ContextPtr mmesa,
 				       mach64VertexPtr v0,
 				       mach64VertexPtr v1,
 				       mach64VertexPtr v2,
@@ -419,7 +419,7 @@ static __inline void mach64_draw_quad( mach64ContextPtr mmesa,
 #endif
 }
 
-static __inline void mach64_draw_triangle( mach64ContextPtr mmesa,
+static INLINE void mach64_draw_triangle( mach64ContextPtr mmesa,
 					   mach64VertexPtr v0,
 					   mach64VertexPtr v1,
 					   mach64VertexPtr v2 )
@@ -666,7 +666,7 @@ static __inline void mach64_draw_triangle( mach64ContextPtr mmesa,
 #endif
 }
 
-static __inline void mach64_draw_line( mach64ContextPtr mmesa,
+static INLINE void mach64_draw_line( mach64ContextPtr mmesa,
 				     mach64VertexPtr v0,
 				     mach64VertexPtr v1 )
 {
@@ -955,7 +955,7 @@ static __inline void mach64_draw_line( mach64ContextPtr mmesa,
 #endif
 }
 
-static __inline void mach64_draw_point( mach64ContextPtr mmesa,
+static INLINE void mach64_draw_point( mach64ContextPtr mmesa,
 				      mach64VertexPtr v0 )
 {
 #if MACH64_NATIVE_VTXFMT
diff --git a/src/mesa/drivers/dri/mach64/mach64_tris.h b/src/mesa/drivers/dri/mach64/mach64_tris.h
index 4780765a18b..042df42f5bd 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tris.h
+++ b/src/mesa/drivers/dri/mach64/mach64_tris.h
@@ -31,7 +31,7 @@
 #ifndef __MACH64_TRIS_H__
 #define __MACH64_TRIS_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void mach64InitTriFuncs( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/mach64/mach64_vb.c b/src/mesa/drivers/dri/mach64/mach64_vb.c
index 8aab72a3f3f..e58812e9028 100644
--- a/src/mesa/drivers/dri/mach64/mach64_vb.c
+++ b/src/mesa/drivers/dri/mach64/mach64_vb.c
@@ -29,11 +29,11 @@
  *	José Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
diff --git a/src/mesa/drivers/dri/mach64/mach64_vb.h b/src/mesa/drivers/dri/mach64/mach64_vb.h
index 0d923abce0d..e0b366916b1 100644
--- a/src/mesa/drivers/dri/mach64/mach64_vb.h
+++ b/src/mesa/drivers/dri/mach64/mach64_vb.h
@@ -32,7 +32,7 @@
 #ifndef __MACH64_VB_H__
 #define __MACH64_VB_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 #include "mach64_context.h"
 
diff --git a/src/mesa/drivers/dri/mga/mga_texcombine.c b/src/mesa/drivers/dri/mga/mga_texcombine.c
index bbfa29be5fe..24083d9651b 100644
--- a/src/mesa/drivers/dri/mga/mga_texcombine.c
+++ b/src/mesa/drivers/dri/mga/mga_texcombine.c
@@ -23,7 +23,7 @@
  *    Ville Syrjala <syrjala@sci.fi>
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 
 #include "mgacontext.h"
 #include "mgatex.h"
diff --git a/src/mesa/drivers/dri/mga/mga_texstate.c b/src/mesa/drivers/dri/mga/mga_texstate.c
index c14ddc95c9a..d4c5b6fd97b 100644
--- a/src/mesa/drivers/dri/mga/mga_texstate.c
+++ b/src/mesa/drivers/dri/mga/mga_texstate.c
@@ -28,20 +28,20 @@
  */
 
 #include <stdlib.h>
-#include "mm.h"
+#include "main/mm.h"
 #include "mgacontext.h"
 #include "mgatex.h"
 #include "mgaregs.h"
 #include "mgatris.h"
 #include "mgaioctl.h"
 
-#include "context.h"
-#include "enums.h"
-#include "macros.h"
-#include "imports.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/macros.h"
+#include "main/imports.h"
 
-#include "simple_list.h"
-#include "texformat.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
 
 #define MGA_USE_TABLE_FOR_FORMAT
 #ifdef MGA_USE_TABLE_FOR_FORMAT
diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c
index d0cf06fea5a..86da3a2cacf 100644
--- a/src/mesa/drivers/dri/mga/mga_xmesa.c
+++ b/src/mesa/drivers/dri/mga/mga_xmesa.c
@@ -34,12 +34,12 @@
 #include "drm.h"
 #include "mga_drm.h"
 #include "mga_xmesa.h"
-#include "context.h"
-#include "matrix.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/context.h"
+#include "main/matrix.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -64,7 +64,7 @@
 #include "utils.h"
 #include "vblank.h"
 
-#include "extensions.h"
+#include "main/extensions.h"
 #include "drirenderbuffer.h"
 
 #include "GL/internal/dri_interface.h"
@@ -74,11 +74,13 @@
 #define need_GL_ARB_vertex_buffer_object
 #define need_GL_ARB_vertex_program
 #define need_GL_EXT_fog_coord
+#define need_GL_EXT_gpu_program_parameters
 #define need_GL_EXT_multi_draw_arrays
 #define need_GL_EXT_secondary_color
 #if 0
 #define need_GL_EXT_paletted_texture
 #endif
+#define need_GL_APPLE_vertex_array_object
 #define need_GL_NV_vertex_program
 #include "extension_helper.h"
 
@@ -109,19 +111,18 @@ static const GLuint __driNConfigOptions = 6;
 int MGA_DEBUG = 0;
 #endif
 
-static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
-
-static __GLcontextModes *
-mgaFillInModes( unsigned pixel_bits, unsigned depth_bits,
+static const __DRIconfig **
+mgaFillInModes( __DRIscreenPrivate *psp,
+		unsigned pixel_bits, unsigned depth_bits,
 		unsigned stencil_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
+    __DRIconfig **configs;
     __GLcontextModes * m;
-    unsigned num_modes;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     GLenum fb_format;
     GLenum fb_type;
+    int i;
 
     /* GLX_SWAP_COPY_OML is only supported because the MGA driver doesn't
      * support pageflipping at all.
@@ -149,8 +150,6 @@ mgaFillInModes( unsigned pixel_bits, unsigned depth_bits,
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 3 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -160,46 +159,41 @@ mgaFillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
-
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR ) ) {
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor,
+			       back_buffer_modes, back_buffer_factor);
+    if (configs == NULL) {
 	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
 		 __func__, __LINE__ );
 	return NULL;
     }
 
-    /* Mark the visual as slow if there are "fake" stencil bits.
-     */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
-	    m->visualRating = GLX_SLOW_CONFIG;
-	}
-    }
+   /* Mark the visual as slow if there are "fake" stencil bits.
+    */
+   for (i = 0; configs[i]; i++) {
+      m = &configs[i]->modes;
+      if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
+         m->visualRating = GLX_SLOW_CONFIG;
+      }
+   }
 
-    return modes;
+   return (const __DRIconfig **) configs;
 }
 
+const __DRIextension *mgaScreenExtensions[] = {
+    &driReadDrawableExtension,
+    &driSwapControlExtension.base,
+    &driFrameTrackingExtension.base,
+    &driMediaStreamCounterExtension.base,
+    NULL
+};
 
 static GLboolean
 mgaInitDriver(__DRIscreenPrivate *sPriv)
 {
    mgaScreenPrivate *mgaScreen;
    MGADRIPtr         serverInfo = (MGADRIPtr)sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-       (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
 
    if (sPriv->devPrivSize != sizeof(MGADRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(MGADRIRec) does not match passed size from device driver\n");
@@ -216,7 +210,7 @@ mgaInitDriver(__DRIscreenPrivate *sPriv)
    mgaScreen->sPriv = sPriv;
    sPriv->private = (void *)mgaScreen;
 
-   if (sPriv->drmMinor >= 1) {
+   if (sPriv->drm_version.minor >= 1) {
       int ret;
       drm_mga_getparam_t gp;
 
@@ -234,13 +228,7 @@ mgaInitDriver(__DRIscreenPrivate *sPriv)
       }
    }
 
-   if ( glx_enable_extension != NULL ) {
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
-      (*glx_enable_extension)( psc, "GLX_SGI_make_current_read" );
-      (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-      (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-   }
+   sPriv->extensions = mgaScreenExtensions;
 
    if (serverInfo->chipset != MGA_CARD_TYPE_G200 &&
        serverInfo->chipset != MGA_CARD_TYPE_G400) {
@@ -273,7 +261,7 @@ mgaInitDriver(__DRIscreenPrivate *sPriv)
     * there is a new, in-kernel mechanism for handling the wait.
     */
 
-   if (mgaScreen->sPriv->drmMinor < 2) {
+   if (mgaScreen->sPriv->drm_version.minor < 2) {
       mgaScreen->mmio.handle = serverInfo->registers.handle;
       mgaScreen->mmio.size = serverInfo->registers.size;
       if ( drmMap( sPriv->fd,
@@ -411,13 +399,15 @@ static const struct dri_extension card_extensions[] =
 #endif
    { "GL_EXT_secondary_color",        GL_EXT_secondary_color_functions },
    { "GL_EXT_stencil_wrap",           NULL },
+   { "GL_APPLE_vertex_array_object",  GL_APPLE_vertex_array_object_functions },
    { "GL_MESA_ycbcr_texture",         NULL },
    { "GL_SGIS_generate_mipmap",       NULL },
    { NULL,                            NULL }
 };
 
-static const struct dri_extension ARB_vp_extension[] = {
+static const struct dri_extension ARB_vp_extensions[] = {
    { "GL_ARB_vertex_program",         GL_ARB_vertex_program_functions },
+   { "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions },
    { NULL,                            NULL }
 };
 
@@ -622,7 +612,7 @@ mgaCreateContext( const __GLcontextModes *mesaVis,
    }
 
    if ( driQueryOptionb( &mmesa->optionCache, "arb_vertex_program" ) ) {
-      driInitSingleExtension( ctx, ARB_vp_extension );
+      driInitExtensions(ctx, ARB_vp_extensions, GL_FALSE);
    }
    
    if ( driQueryOptionb( &mmesa->optionCache, "nv_vertex_program" ) ) {
@@ -646,10 +636,7 @@ mgaCreateContext( const __GLcontextModes *mesaVis,
 				    debug_control );
 #endif
 
-   mmesa->vblank_flags = (mmesa->mgaScreen->irq == 0)
-       ? VBLANK_FLAG_NO_IRQ : driGetDefaultVBlankFlags(&mmesa->optionCache);
-
-   (*dri_interface->getUST)( & mmesa->swap_ust );
+   (*sPriv->systemTime->getUST)( & mmesa->swap_ust );
 
    if (driQueryOptionb(&mmesa->optionCache, "no_rast")) {
       fprintf(stderr, "disabling 3D acceleration\n");
@@ -878,8 +865,14 @@ mgaMakeCurrent(__DRIcontextPrivate *driContextPriv,
       mgaContextPtr mmesa = (mgaContextPtr) driContextPriv->driverPrivate;
 
       if (mmesa->driDrawable != driDrawPriv) {
-	 driDrawableInitVBlank( driDrawPriv, mmesa->vblank_flags,
-				&mmesa->vbl_seq );
+	 if (driDrawPriv->swap_interval == (unsigned)-1) {
+	    driDrawPriv->vblFlags = (mmesa->mgaScreen->irq == 0)
+	       ? VBLANK_FLAG_NO_IRQ
+	       : driGetDefaultVBlankFlags(&mmesa->optionCache);
+
+	    driDrawableInitVBlank( driDrawPriv );
+	 }
+
 	 mmesa->driDrawable = driDrawPriv;
 	 mmesa->dirty = ~0; 
 	 mmesa->dirty_cliprects = (MGA_FRONT|MGA_BACK); 
@@ -933,88 +926,51 @@ void mgaGetLock( mgaContextPtr mmesa, GLuint flags )
 }
 
 
-static const struct __DriverAPIRec mgaAPI = {
-   .InitDriver      = mgaInitDriver,
-   .DestroyScreen   = mgaDestroyScreen,
-   .CreateContext   = mgaCreateContext,
-   .DestroyContext  = mgaDestroyContext,
-   .CreateBuffer    = mgaCreateBuffer,
-   .DestroyBuffer   = mgaDestroyBuffer,
-   .SwapBuffers     = mgaSwapBuffers,
-   .MakeCurrent     = mgaMakeCurrent,
-   .UnbindContext   = mgaUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL
-};
-
-
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
+static const __DRIconfig **mgaInitScreen(__DRIscreen *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 1, 2, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 3, 0, 0 };
-
-   dri_interface = interface;
+   MGADRIPtr dri_priv = (MGADRIPtr) psp->pDevPriv;
 
    if ( ! driCheckDriDdxDrmVersions2( "MGA",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
 
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &mgaAPI);
-   if ( psp != NULL ) {
-      MGADRIPtr dri_priv = (MGADRIPtr) psp->pDevPriv;
-      *driver_modes = mgaFillInModes( dri_priv->cpp * 8,
-				      (dri_priv->cpp == 2) ? 16 : 24,
-				      (dri_priv->cpp == 2) ? 0  : 8,
-				      (dri_priv->backOffset != dri_priv->depthOffset) );
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-      driInitExtensions( NULL, g400_extensions, GL_FALSE );
-      driInitSingleExtension( NULL, ARB_vp_extension );
-      driInitExtensions( NULL, NV_vp_extensions, GL_FALSE );
 
-   }
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
 
-   return (void *) psp;
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+   driInitExtensions( NULL, g400_extensions, GL_FALSE );
+   driInitExtensions(NULL, ARB_vp_extensions, GL_FALSE);
+   driInitExtensions( NULL, NV_vp_extensions, GL_FALSE );
+
+   if (!mgaInitDriver(psp))
+       return NULL;
+
+   return mgaFillInModes( psp,
+			  dri_priv->cpp * 8,
+			  (dri_priv->cpp == 2) ? 16 : 24,
+			  (dri_priv->cpp == 2) ? 0  : 8,
+			  (dri_priv->backOffset != dri_priv->depthOffset) );
 }
 
 
@@ -1043,3 +999,20 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
 
    return 0;
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = mgaInitScreen,
+   .DestroyScreen   = mgaDestroyScreen,
+   .CreateContext   = mgaCreateContext,
+   .DestroyContext  = mgaDestroyContext,
+   .CreateBuffer    = mgaCreateBuffer,
+   .DestroyBuffer   = mgaDestroyBuffer,
+   .SwapBuffers     = mgaSwapBuffers,
+   .MakeCurrent     = mgaMakeCurrent,
+   .UnbindContext   = mgaUnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL
+};
diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.h b/src/mesa/drivers/dri/mga/mga_xmesa.h
index 7de7bb06e87..07c22bd5966 100644
--- a/src/mesa/drivers/dri/mga/mga_xmesa.h
+++ b/src/mesa/drivers/dri/mga/mga_xmesa.h
@@ -31,7 +31,7 @@
 #include <sys/time.h>
 #include "dri_util.h"
 #include "mga_drm.h"
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "mgaregs.h"
 #include "xmlconfig.h"
 
diff --git a/src/mesa/drivers/dri/mga/mgacontext.h b/src/mesa/drivers/dri/mga/mgacontext.h
index 6aa92355b8a..30640a29b35 100644
--- a/src/mesa/drivers/dri/mga/mgacontext.h
+++ b/src/mesa/drivers/dri/mga/mgacontext.h
@@ -32,12 +32,12 @@
 #include "drm.h"
 #include "mga_drm.h"
 #include "dri_util.h"
-#include "mtypes.h"
 #include "xf86drm.h"
-#include "mm.h"
-#include "colormac.h"
+#include "main/mtypes.h"
+#include "main/mm.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 #include "texmem.h"
-#include "macros.h"
 #include "xmlconfig.h"
 
 #define MGA_SET_FIELD(reg,mask,val)  reg = ((reg) & (mask)) | ((val) & ~(mask))
@@ -257,11 +257,6 @@ struct mga_context_t {
    drmBufPtr  vertex_dma_buffer;
    drmBufPtr  iload_buffer;
 
-   /* VBI
-    */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
-
    int64_t swap_ust;
    int64_t swap_missed_ust;
 
@@ -333,9 +328,9 @@ extern int MGA_DEBUG;
 #define DEBUG_VERBOSE_TEXTURE   0x08
 #define DEBUG_VERBOSE_FALLBACK	0x10
 
-static __inline__ GLuint mgaPackColor(GLuint cpp,
-				      GLubyte r, GLubyte g,
-				      GLubyte b, GLubyte a)
+static INLINE GLuint mgaPackColor(GLuint cpp,
+                                  GLubyte r, GLubyte g,
+                                  GLubyte b, GLubyte a)
 {
    switch (cpp) {
    case 2:
diff --git a/src/mesa/drivers/dri/mga/mgadd.c b/src/mesa/drivers/dri/mga/mgadd.c
index 04336b5ac75..3b1ea22b609 100644
--- a/src/mesa/drivers/dri/mga/mgadd.c
+++ b/src/mesa/drivers/dri/mga/mgadd.c
@@ -26,10 +26,10 @@
  */
 
 
-#include "mtypes.h"
-#include "framebuffer.h"
+#include "main/mtypes.h"
+#include "main/framebuffer.h"
+#include "main/mm.h"
 
-#include "mm.h"
 #include "mgacontext.h"
 #include "mgadd.h"
 #include "mgastate.h"
@@ -40,7 +40,7 @@
 #include "mga_xmesa.h"
 #include "utils.h"
 
-#define DRIVER_DATE	"20061030"
+#define DRIVER_DATE	"20071017"
 
 
 /***************************************
diff --git a/src/mesa/drivers/dri/mga/mgadd.h b/src/mesa/drivers/dri/mga/mgadd.h
index 6830ca67ad2..f92591df459 100644
--- a/src/mesa/drivers/dri/mga/mgadd.h
+++ b/src/mesa/drivers/dri/mga/mgadd.h
@@ -28,7 +28,7 @@
 #ifndef MGADD_INC
 #define MGADD_INC
 
-#include "context.h"
+#include "main/context.h"
 
 extern void mgaInitDriverFuncs( struct dd_function_table *functions );
 
diff --git a/src/mesa/drivers/dri/mga/mgaioctl.c b/src/mesa/drivers/dri/mga/mgaioctl.c
index f8587fc541e..4438bad9209 100644
--- a/src/mesa/drivers/dri/mga/mgaioctl.c
+++ b/src/mesa/drivers/dri/mga/mgaioctl.c
@@ -31,12 +31,12 @@
  */
 
 #include <errno.h>
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/dd.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "drm.h"
 #include "mga_drm.h"
 #include "mgacontext.h"
@@ -55,7 +55,7 @@ mgaSetFence( mgaContextPtr mmesa, uint32_t * fence )
 {
     int ret = ENOSYS;
 
-    if ( mmesa->driScreen->drmMinor >= 2 ) {
+    if ( mmesa->driScreen->drm_version.minor >= 2 ) {
 	ret = drmCommandWriteRead( mmesa->driScreen->fd, DRM_MGA_SET_FENCE,
 				   fence, sizeof( uint32_t ));
 	if (ret) {
@@ -73,7 +73,7 @@ mgaWaitFence( mgaContextPtr mmesa, uint32_t fence, uint32_t * curr_fence )
 {
     int ret = ENOSYS;
 
-    if ( mmesa->driScreen->drmMinor >= 2 ) {
+    if ( mmesa->driScreen->drm_version.minor >= 2 ) {
 	uint32_t temp = fence;
 	
 	ret = drmCommandWriteRead( mmesa->driScreen->fd,
@@ -409,7 +409,7 @@ static void mgaWaitForFrameCompletion( mgaContextPtr mmesa )
 /*
  * Copy the back buffer to the front buffer.
  */
-void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
+void mgaCopyBuffer( __DRIdrawablePrivate *dPriv )
 {
    mgaContextPtr mmesa;
    drm_clip_rect_t *pbox;
@@ -417,7 +417,7 @@ void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
    GLint ret;
    GLint i;
    GLboolean   missed_target;
-
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -428,11 +428,10 @@ void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
    FLUSH_BATCH( mmesa );
 
    mgaWaitForFrameCompletion( mmesa );
-   driWaitForVBlank( dPriv, & mmesa->vbl_seq, mmesa->vblank_flags,
-		     & missed_target );
+   driWaitForVBlank( dPriv, & missed_target );
    if ( missed_target ) {
       mmesa->swap_missed_count++;
-      (void) (*dri_interface->getUST)( & mmesa->swap_missed_ust );
+      (void) (*psp->systemTime->getUST)( & mmesa->swap_missed_ust );
    }
    LOCK_HARDWARE( mmesa );
 
@@ -470,7 +469,7 @@ void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
 
    mmesa->dirty |= MGA_UPLOAD_CLIPRECTS;
    mmesa->swap_count++;
-   (void) (*dri_interface->getUST)( & mmesa->swap_ust );
+   (void) (*psp->systemTime->getUST)( & mmesa->swap_ust );
 }
 
 
diff --git a/src/mesa/drivers/dri/mga/mgaioctl.h b/src/mesa/drivers/dri/mga/mgaioctl.h
index 9aa08c51585..dbc823de802 100644
--- a/src/mesa/drivers/dri/mga/mgaioctl.h
+++ b/src/mesa/drivers/dri/mga/mgaioctl.h
@@ -32,7 +32,7 @@
 #include "mgacontext.h"
 #include "mga_xmesa.h"
 
-void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv );
+void mgaCopyBuffer( __DRIdrawablePrivate *dPriv );
 void mgaWaitForVBlank( mgaContextPtr mmesa );
 
 void mgaGetILoadBufferLocked( mgaContextPtr mmesa );
@@ -61,7 +61,7 @@ void mgaInitIoctlFuncs( struct dd_function_table *functions );
 
 extern drmBufPtr mga_get_buffer_ioctl( mgaContextPtr mmesa );
 
-static __inline
+static INLINE
 GLuint *mgaAllocDmaLow( mgaContextPtr mmesa, int bytes )
 {
    GLuint *head;
diff --git a/src/mesa/drivers/dri/mga/mgapixel.c b/src/mesa/drivers/dri/mga/mgapixel.c
index f309aabbc8e..9f90047ba59 100644
--- a/src/mesa/drivers/dri/mga/mgapixel.c
+++ b/src/mesa/drivers/dri/mga/mgapixel.c
@@ -35,8 +35,8 @@
  * \author Gareth Hughes <gareth@valinux.com>
  */
 
-#include "mtypes.h"
-#include "macros.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "mgadd.h"
 #include "mgacontext.h"
 #include "mgaioctl.h"
@@ -44,7 +44,7 @@
 #include "mgastate.h"
 
 #include "swrast/swrast.h"
-#include "imports.h"
+#include "main/imports.h"
 
 #if 0
 #define IS_AGP_MEM( mmesa, p )						  \
diff --git a/src/mesa/drivers/dri/mga/mgapixel.h b/src/mesa/drivers/dri/mga/mgapixel.h
index b52c8670f3a..f5f300db56d 100644
--- a/src/mesa/drivers/dri/mga/mgapixel.h
+++ b/src/mesa/drivers/dri/mga/mgapixel.h
@@ -28,7 +28,7 @@
 #ifndef MGA_PIXELS_H
 #define MGA_PIXELS_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void mgaDDInitPixelFuncs( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/mga/mgarender.c b/src/mesa/drivers/dri/mga/mgarender.c
index c9e42a8040d..517c3b8f82c 100644
--- a/src/mesa/drivers/dri/mga/mgarender.c
+++ b/src/mesa/drivers/dri/mga/mgarender.c
@@ -38,11 +38,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * dma buffers.  Use strip/fan hardware primitives where possible.
  * Simulate missing primitives with indexed vertices.
  */
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
 #include "tnl/t_context.h"
 
@@ -143,7 +143,7 @@ static GLboolean mga_run_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/mga/mgaspan.c b/src/mesa/drivers/dri/mga/mgaspan.c
index 05dcbb85263..5b6d323ca98 100644
--- a/src/mesa/drivers/dri/mga/mgaspan.c
+++ b/src/mesa/drivers/dri/mga/mgaspan.c
@@ -25,7 +25,7 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "mgadd.h"
 #include "mgacontext.h"
 #include "mgaspan.h"
@@ -107,6 +107,8 @@
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d;
 
@@ -121,6 +123,8 @@
 
 /* 32 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = d;
 
@@ -134,6 +138,8 @@
 
 /* 24/8 bit interleaved depth/stencil functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) {			\
    GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch);	\
    tmp &= 0xff;						\
diff --git a/src/mesa/drivers/dri/mga/mgastate.c b/src/mesa/drivers/dri/mga/mgastate.c
index c20a76f29ef..7c830ec0974 100644
--- a/src/mesa/drivers/dri/mga/mgastate.c
+++ b/src/mesa/drivers/dri/mga/mgastate.c
@@ -26,11 +26,11 @@
  */
 
 
-#include "mtypes.h"
-#include "colormac.h"
-#include "dd.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/dd.h"
+#include "main/mm.h"
 
-#include "mm.h"
 #include "mgacontext.h"
 #include "mgadd.h"
 #include "mgastate.h"
@@ -778,8 +778,6 @@ void mgaUpdateRects( mgaContextPtr mmesa, GLuint buffers )
 {
    __DRIdrawablePrivate *const driDrawable = mmesa->driDrawable;
    __DRIdrawablePrivate *const driReadable = mmesa->driReadable;
-   drm_mga_sarea_t *sarea = mmesa->sarea;
-
 
    mmesa->dirty_cliprects = 0;	
 
@@ -790,9 +788,6 @@ void mgaUpdateRects( mgaContextPtr mmesa, GLuint buffers )
 
    mga_set_cliprects(mmesa);
 
-   sarea->req_drawable = driDrawable->draw;
-   sarea->req_draw_buffer = mmesa->draw_buffer;
-
    mgaUpdateClipping( mmesa->glCtx );
    mgaCalcViewport( mmesa->glCtx );
 }
@@ -804,20 +799,22 @@ static void mgaDDDrawBuffer(GLcontext *ctx, GLenum mode )
 
    FLUSH_BATCH( mmesa );
 
-   /*
-    * _DrawDestMask is easier to cope with than <mode>.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
+      FALLBACK( ctx, MGA_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       mmesa->setup.dstorg = mmesa->mgaScreen->frontOffset;
       mmesa->draw_buffer = MGA_FRONT;
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       mmesa->setup.dstorg = mmesa->mgaScreen->backOffset;
       mmesa->draw_buffer = MGA_BACK;
       break;
    default:
-      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( ctx, MGA_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
diff --git a/src/mesa/drivers/dri/mga/mgatex.c b/src/mesa/drivers/dri/mga/mgatex.c
index 31ea5046dff..2392622b902 100644
--- a/src/mesa/drivers/dri/mga/mgatex.c
+++ b/src/mesa/drivers/dri/mga/mgatex.c
@@ -25,24 +25,24 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mm.h"
+#include "main/glheader.h"
+#include "main/mm.h"
 #include "mgacontext.h"
 #include "mgatex.h"
 #include "mgaregs.h"
 #include "mgatris.h"
 #include "mgaioctl.h"
 
-#include "colormac.h"
-#include "context.h"
-#include "enums.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "macros.h"
-#include "texformat.h"
-#include "texstore.h"
-#include "teximage.h"
-#include "texobj.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
 
 #include "swrast/swrast.h"
 
diff --git a/src/mesa/drivers/dri/mga/mgatexmem.c b/src/mesa/drivers/dri/mga/mgatexmem.c
index 559813f5dec..9a2d62b53b7 100644
--- a/src/mesa/drivers/dri/mga/mgatexmem.c
+++ b/src/mesa/drivers/dri/mga/mgatexmem.c
@@ -25,17 +25,17 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "mgacontext.h"
 #include "mgatex.h"
 #include "mgaregs.h"
 #include "mgaioctl.h"
 #include "mga_xmesa.h"
 
-#include "imports.h"
-#include "simple_list.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
 
 /**
  * Destroy any device-dependent state associated with the texture.  This may
diff --git a/src/mesa/drivers/dri/mga/mgatris.c b/src/mesa/drivers/dri/mga/mgatris.c
index 0c8081cfb96..b93a21c3acf 100644
--- a/src/mesa/drivers/dri/mga/mgatris.c
+++ b/src/mesa/drivers/dri/mga/mgatris.c
@@ -25,15 +25,15 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
+#include "main/mm.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
 
-#include "mm.h"
 #include "mgacontext.h"
 #include "mgaioctl.h"
 #include "mgatris.h"
@@ -66,7 +66,7 @@ do {						\
 } while (0)
 #endif
 
-static void __inline__ mga_draw_triangle( mgaContextPtr mmesa,
+static void INLINE mga_draw_triangle( mgaContextPtr mmesa,
 					   mgaVertexPtr v0,
 					   mgaVertexPtr v1,
 					   mgaVertexPtr v2 )
@@ -81,7 +81,7 @@ static void __inline__ mga_draw_triangle( mgaContextPtr mmesa,
 }
 
 
-static void __inline__ mga_draw_quad( mgaContextPtr mmesa,
+static void INLINE mga_draw_quad( mgaContextPtr mmesa,
 				       mgaVertexPtr v0,
 				       mgaVertexPtr v1,
 				       mgaVertexPtr v2,
@@ -100,7 +100,7 @@ static void __inline__ mga_draw_quad( mgaContextPtr mmesa,
 }
 
 
-static __inline__ void mga_draw_point( mgaContextPtr mmesa,
+static INLINE void mga_draw_point( mgaContextPtr mmesa,
 					mgaVertexPtr tmp )
 {
    const GLfloat sz = 0.5 * CLAMP(mmesa->glCtx->Point.Size,
@@ -159,7 +159,7 @@ static __inline__ void mga_draw_point( mgaContextPtr mmesa,
 }
 
 
-static __inline__ void mga_draw_line( mgaContextPtr mmesa,
+static INLINE void mga_draw_line( mgaContextPtr mmesa,
 				      mgaVertexPtr v0,
 				      mgaVertexPtr v1 )
 {
diff --git a/src/mesa/drivers/dri/mga/mgatris.h b/src/mesa/drivers/dri/mga/mgatris.h
index a40fef8307d..43612b80a15 100644
--- a/src/mesa/drivers/dri/mga/mgatris.h
+++ b/src/mesa/drivers/dri/mga/mgatris.h
@@ -28,7 +28,7 @@
 #ifndef MGATRIS_INC
 #define MGATRIS_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void mgaDDInitTriFuncs( GLcontext *ctx );
 extern void mgaChooseRenderState( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/mga/mgavb.c b/src/mesa/drivers/dri/mga/mgavb.c
index 954fd53ae33..1c635b23a65 100644
--- a/src/mesa/drivers/dri/mga/mgavb.c
+++ b/src/mesa/drivers/dri/mga/mgavb.c
@@ -32,11 +32,11 @@
 #include "mgaioctl.h"
 #include "mga_xmesa.h"
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "tnl/t_context.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/mga/mgavb.h b/src/mesa/drivers/dri/mga/mgavb.h
index f6580e0db9f..8d24ab7b5fe 100644
--- a/src/mesa/drivers/dri/mga/mgavb.h
+++ b/src/mesa/drivers/dri/mga/mgavb.h
@@ -28,7 +28,7 @@
 #ifndef MGAVB_INC
 #define MGAVB_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "mgacontext.h"
 #include "swrast/swrast.h"
 
diff --git a/src/mesa/drivers/dri/nouveau/Makefile b/src/mesa/drivers/dri/nouveau/Makefile
deleted file mode 100644
index 20d2de5eefb..00000000000
--- a/src/mesa/drivers/dri/nouveau/Makefile
+++ /dev/null
@@ -1,53 +0,0 @@
-# src/mesa/drivers/dri/nouveau/Makefile
-
-TOP = ../../../../..
-include $(TOP)/configs/current
-
-LIBNAME = nouveau_dri.so
-
-MINIGLX_SOURCES = 
-
-DRIVER_SOURCES = \
-	nouveau_bufferobj.c      \
-	nouveau_buffers.c        \
-	nouveau_card.c           \
-	nouveau_context.c        \
-	nouveau_driver.c         \
-	nouveau_fifo.c           \
-	nouveau_lock.c           \
-	nouveau_object.c         \
-	nouveau_screen.c         \
-	nouveau_span.c           \
-	nouveau_state.c          \
-	nouveau_state_cache.c    \
-	nouveau_shader.c         \
-	nouveau_shader_0.c       \
-	nouveau_shader_1.c       \
-	nouveau_shader_2.c       \
-	nouveau_tex.c            \
-	nouveau_swtcl.c          \
-	nouveau_sync.c           \
-	nouveau_query.c          \
-	nv04_state.c             \
-	nv04_swtcl.c             \
-	nv10_state.c             \
-	nv10_swtcl.c             \
-	nv20_state.c             \
-	nv20_vertprog.c          \
-	nv30_state.c             \
-	nv30_fragprog.c          \
-	nv30_vertprog.c          \
-	nv40_fragprog.c          \
-	nv40_vertprog.c          \
-	nv50_state.c
-
-C_SOURCES = \
-	$(COMMON_SOURCES) \
-	$(DRIVER_SOURCES) 
-
-ASM_SOURCES = 
-
-
-include ../Makefile.template
-
-symlinks:
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c
deleted file mode 100644
index fc14060c049..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c
+++ /dev/null
@@ -1,616 +0,0 @@
-#include "bufferobj.h"
-#include "enums.h"
-
-#include "nouveau_bufferobj.h"
-#include "nouveau_buffers.h"
-#include "nouveau_context.h"
-#include "nouveau_drm.h"
-#include "nouveau_object.h"
-#include "nouveau_msg.h"
-
-#define NOUVEAU_MEM_FREE(mem) do {      \
-	nouveau_mem_free(ctx, (mem));   \
-	(mem) = NULL;                   \
-} while(0)
-
-#define DEBUG(fmt,args...) do {                \
-	if (NOUVEAU_DEBUG & DEBUG_BUFFEROBJ) { \
-		fprintf(stderr, "%s: "fmt, __func__, ##args);  \
-	}                                      \
-} while(0)
-
-static GLboolean
-nouveau_bo_download_from_screen(GLcontext *ctx,	GLuint offset, GLuint size,
-						struct gl_buffer_object *bo)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_mem *in_mem;
-
-	DEBUG("bo=%p, offset=%d, size=%d\n", bo, offset, size);
-
-	/* If there's a permanent backing store, blit directly into it */
-	if (nbo->cpu_mem) {
-		if (nbo->cpu_mem != nbo->gpu_mem) {
-			DEBUG("..cpu_mem\n");
-			nouveau_memformat_flat_emit(ctx, nbo->cpu_mem,
-						    nbo->gpu_mem,
-						    offset, offset, size);
-		}
-	} else {
-		DEBUG("..sys_mem\n");
-		in_mem = nouveau_mem_alloc(ctx, NOUVEAU_MEM_AGP, size, 0);
-		if (in_mem) {
-			DEBUG("....via GART\n");
-			/* otherwise, try blitting to faster memory and
-			 * copying from there
-			 */
-			nouveau_memformat_flat_emit(ctx, in_mem, nbo->gpu_mem,
-							 0, offset, size);
-			nouveau_notifier_wait_nop(ctx, nmesa->syncNotifier,
-						       NvSubMemFormat);
-			_mesa_memcpy(nbo->cpu_mem_sys + offset,
-					in_mem->map, size);
-			NOUVEAU_MEM_FREE(in_mem);
-		} else {
-			DEBUG("....direct VRAM copy\n");
-			/* worst case, copy directly from vram */
-			_mesa_memcpy(nbo->cpu_mem_sys + offset,
-				     nbo->gpu_mem + offset,
-				     size);
-		}
-	}
-
-	return GL_TRUE;
-}
-
-static GLboolean
-nouveau_bo_upload_to_screen(GLcontext *ctx, GLuint offset, GLuint size,
-					    struct gl_buffer_object *bo)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_mem *out_mem;
-
-	DEBUG("bo=%p, offset=%d, size=%d\n", bo, offset, size);
-
-	if (nbo->cpu_mem) {
-		if (nbo->cpu_mem != nbo->gpu_mem) {
-			DEBUG("..cpu_mem\n");
-			nouveau_memformat_flat_emit(ctx, nbo->gpu_mem,
-						    nbo->cpu_mem,
-						    offset, offset, size);
-		}
-	} else {
-		out_mem = nouveau_mem_alloc(ctx, NOUVEAU_MEM_AGP |
-						 NOUVEAU_MEM_MAPPED,
-						 size, 0);
-		if (out_mem) {
-			DEBUG("....via GART\n");
-			_mesa_memcpy(out_mem->map,
-					nbo->cpu_mem_sys + offset, size);
-			nouveau_memformat_flat_emit(ctx, nbo->gpu_mem, out_mem,
-						    offset, 0, size);
-			nouveau_notifier_wait_nop(ctx, nmesa->syncNotifier,
-						       NvSubMemFormat);
-			NOUVEAU_MEM_FREE(out_mem);
-		} else {
-			DEBUG("....direct VRAM copy\n");
-			_mesa_memcpy(nbo->gpu_mem->map + offset,
-				     nbo->cpu_mem_sys + offset,
-				     size);
-		}
-	}
-
-	return GL_TRUE;
-}
-
-GLboolean
-nouveau_bo_move_in(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-
-	DEBUG("bo=%p\n", bo);
-
-	if (bo->OnCard)
-		return GL_TRUE;
-	assert(nbo->gpu_mem_flags);
-
-	nbo->gpu_mem = nouveau_mem_alloc(ctx, nbo->gpu_mem_flags |
-					      NOUVEAU_MEM_MAPPED,
-					      bo->Size, 0);
-	assert(nbo->gpu_mem);
-
-	if (nbo->cpu_mem_flags) {
-		if ((nbo->cpu_mem_flags|NOUVEAU_MEM_MAPPED) != nbo->gpu_mem->type) {
-			DEBUG("..need cpu_mem buffer\n");
-
-			nbo->cpu_mem = nouveau_mem_alloc(ctx,
-							 nbo->cpu_mem_flags |
-							 NOUVEAU_MEM_MAPPED,
-							 bo->Size, 0);
-
-			if (nbo->cpu_mem) {
-				DEBUG("....alloc ok, kill sys_mem buffer\n");
-				_mesa_memcpy(nbo->cpu_mem->map,
-					     nbo->cpu_mem_sys, bo->Size);
-				FREE(nbo->cpu_mem_sys);
-			}
-		} else {
-			DEBUG("..cpu direct access to GPU buffer\n");
-			nbo->cpu_mem = nbo->gpu_mem;
-		}
-	}
-	nouveau_bo_upload_to_screen(ctx, 0, bo->Size, bo);
-
-	bo->OnCard = GL_TRUE;
-	return GL_TRUE;
-}
-
-GLboolean
-nouveau_bo_move_out(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	GLuint nr_dirty;
-
-	DEBUG("bo=%p\n", bo);
-	if (!bo->OnCard)
-		return GL_TRUE;
-
-	nr_dirty = nouveau_bo_download_dirty(ctx, bo);
-	if (nbo->cpu_mem) {
-		if (nr_dirty && nbo->cpu_mem != nbo->gpu_mem)
-			nouveau_notifier_wait_nop(ctx, nmesa->syncNotifier,
-						       NvSubMemFormat);
-		DEBUG("..destroy cpu_mem buffer\n");
-		nbo->cpu_mem_sys = malloc(bo->Size);
-		assert(nbo->cpu_mem_sys);
-		_mesa_memcpy(nbo->cpu_mem_sys, nbo->cpu_mem->map, bo->Size);
-		if (nbo->cpu_mem == nbo->gpu_mem)
-			nbo->cpu_mem = NULL;
-		else
-			NOUVEAU_MEM_FREE(nbo->cpu_mem);
-	}
-	NOUVEAU_MEM_FREE(nbo->gpu_mem);
-
-	bo->OnCard = GL_FALSE;
-	return GL_TRUE;
-}
-
-static void
-nouveau_bo_choose_storage_method(GLcontext *ctx, GLenum usage,
-						 struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	GLuint gpu_type = 0;
-	GLuint cpu_type = 0;
-
-	switch (usage) {
-	/* Client source, changes often, used by GL many times */
-	case GL_DYNAMIC_DRAW_ARB:
-		gpu_type = NOUVEAU_MEM_AGP | NOUVEAU_MEM_FB_ACCEPTABLE;
-		cpu_type = NOUVEAU_MEM_AGP;
-		break;
-	/* GL source, changes often, client reads many times */
-	case GL_DYNAMIC_READ_ARB:
-	/* Client source, specified once, used by GL many times */
-	case GL_STATIC_DRAW_ARB:
-	/* GL source, specified once, client reads many times */
-	case GL_STATIC_READ_ARB:
-	/* Client source, specified once, used by GL a few times */
-	case GL_STREAM_DRAW_ARB:
-	/* GL source, specified once, client reads a few times */
-	case GL_STREAM_READ_ARB:
-	/* GL source, changes often, used by GL many times*/
-	case GL_DYNAMIC_COPY_ARB:
-	/* GL source, specified once, used by GL many times */
-	case GL_STATIC_COPY_ARB:
-	/* GL source, specified once, used by GL a few times */
-	case GL_STREAM_COPY_ARB:
-		gpu_type = NOUVEAU_MEM_FB;
-		break;
-	default: 
-		assert(0);
-	}
-
-	nbo->gpu_mem_flags = gpu_type;
-	nbo->cpu_mem_flags = cpu_type;
-	nbo->usage	   = usage;
-}
-
-void
-nouveau_bo_init_storage(GLcontext *ctx,	GLuint valid_gpu_access,
-					GLsizeiptrARB size,
-					const GLvoid *data,
-					GLenum usage,
-					struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-
-	DEBUG("bo=%p\n", bo);
-
-	/* Free up previous buffers if we can't reuse them */
-	if (nbo->usage != usage ||
-			(nbo->gpu_mem && (nbo->gpu_mem->size != size))) {
-		if (nbo->cpu_mem_sys)
-			FREE(nbo->cpu_mem_sys);
-		if (nbo->cpu_mem) {
-			if (nbo->cpu_mem != nbo->gpu_mem)
-				NOUVEAU_MEM_FREE(nbo->cpu_mem);
-			else
-				nbo->cpu_mem = NULL;
-		}
-		if (nbo->gpu_mem)
-			NOUVEAU_MEM_FREE(nbo->gpu_mem);
-
-		bo->OnCard = GL_FALSE;
-		nbo->cpu_mem_sys = calloc(1, size);
-	}
-
-	nouveau_bo_choose_storage_method(ctx, usage, bo);
-	/* Force off flags that may not be ok for a given buffer */
-	nbo->gpu_mem_flags &= valid_gpu_access;
-
-	bo->Usage  = usage;
-	bo->Size   = size;
-
-	if (data) {
-		GLvoid *map = nouveau_bo_map(ctx, GL_WRITE_ONLY_ARB, bo);
-		_mesa_memcpy(map, data, size);
-		nouveau_bo_dirty_all(ctx, GL_FALSE, bo);
-		nouveau_bo_unmap(ctx, bo);
-	}
-}
-
-void *
-nouveau_bo_map(GLcontext *ctx, GLenum access, struct gl_buffer_object *bo)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-
-	DEBUG("bo=%p, access=%s\n", bo, _mesa_lookup_enum_by_nr(access));
-
-	if (bo->OnCard && 
-		(access == GL_READ_ONLY_ARB || access == GL_READ_WRITE_ARB)) {
-		GLuint nr_dirty;
-
-		DEBUG("..on card\n");
-		nr_dirty = nouveau_bo_download_dirty(ctx, bo);
-
-		/* nouveau_bo_download_dirty won't wait unless it needs to
-		 * free a temp buffer, which isn't the case if cpu_mem is
-		 * present.
-		 */
-		if (nr_dirty && nbo->cpu_mem && nbo->cpu_mem != nbo->gpu_mem)
-			nouveau_notifier_wait_nop(ctx, nmesa->syncNotifier,
-						       NvSubMemFormat);
-	}
-
-	if (nbo->cpu_mem) {
-		DEBUG("..access via cpu_mem\n");
-		return nbo->cpu_mem->map;
-	} else {
-		DEBUG("..access via cpu_mem_sys\n");
-		return nbo->cpu_mem_sys;
-	}
-}
-
-void
-nouveau_bo_unmap(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	DEBUG("unmap bo=%p\n", bo);
-}
-
-uint32_t
-nouveau_bo_gpu_ref(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-
-	assert(nbo->mapped == GL_FALSE);
-
-	DEBUG("gpu_ref\n");
-	
-	if (!bo->OnCard) {
-		nouveau_bo_move_in(ctx, bo);
-		bo->OnCard = GL_TRUE;
-	}
-	nouveau_bo_upload_dirty(ctx, bo);
-
-	return nouveau_mem_gpu_offset_get(ctx, nbo->gpu_mem);
-}
-
-void
-nouveau_bo_dirty_linear(GLcontext *ctx, GLboolean on_card,
-			uint32_t offset, uint32_t size,
-			struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_bufferobj_dirty *dirty;
-	uint32_t start = offset;
-	uint32_t end = offset + size;
-	int i;
-
-	if (nbo->cpu_mem == nbo->gpu_mem)
-		return;
-
-	dirty = on_card ? &nbo->gpu_dirty : &nbo->cpu_dirty;
-
-	DEBUG("on_card=%d, offset=%d, size=%d, bo=%p\n",
-			on_card, offset, size, bo);
-
-	for (i=0; i<dirty->nr_dirty; i++) {
-		nouveau_bufferobj_region *r = &dirty->dirty[i];
-
-		/* already dirty */
-		if (start >= r->start && end <= r->end) {
-			DEBUG("..already dirty\n");
-			return;
-		}
-
-		/* add to the end of a region */
-		if (start >= r->start && start <= r->end) {
-			if (end > r->end) {
-				DEBUG("..extend end of region\n");
-				r->end = end;
-				return;
-			}
-		}
-
-		/* add to the start of a region */
-		if (start < r->start && end >= r->end) {
-			DEBUG("..extend start of region\n");
-			r->start = start;
-			/* .. and to the end */
-			if (end > r->end) {
-				DEBUG("....and end\n");
-				r->end = end;
-			}
-			return;
-		}
-	}
-
-	/* new region */
-	DEBUG("..new dirty\n");
-	dirty->nr_dirty++;
-	dirty->dirty = realloc(dirty->dirty,
-			       sizeof(nouveau_bufferobj_region) *
-			       dirty->nr_dirty);
-	dirty->dirty[dirty->nr_dirty - 1].start = start;
-	dirty->dirty[dirty->nr_dirty - 1].end   = end;
-}
-
-void
-nouveau_bo_dirty_all(GLcontext *ctx, GLboolean on_card,
-		     struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_bufferobj_dirty *dirty;
-
-	dirty = on_card ? &nbo->gpu_dirty : &nbo->cpu_dirty;
-	
-	DEBUG("dirty all\n");
-	if (dirty->nr_dirty) {
-		FREE(dirty->dirty);
-		dirty->dirty    = NULL;
-		dirty->nr_dirty = 0;
-	}
-
-	nouveau_bo_dirty_linear(ctx, on_card, 0, bo->Size, bo);
-}
-
-GLuint
-nouveau_bo_upload_dirty(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_bufferobj_dirty *dirty = &nbo->cpu_dirty;
-	GLuint nr_dirty;
-	int i;
-
-	nr_dirty = dirty->nr_dirty;
-	if (!nr_dirty) {
-		DEBUG("clean\n");
-		return nr_dirty;
-	}
-
-	for (i=0; i<nr_dirty; i++) {
-		nouveau_bufferobj_region *r = &dirty->dirty[i];
-
-		DEBUG("dirty %d: o=0x%08x, s=0x%08x\n",
-				i, r->start, r->end - r->start);
-		nouveau_bo_upload_to_screen(ctx,
-					    r->start, r->end - r->start, bo);
-	}
-
-	FREE(dirty->dirty);
-	dirty->dirty    = NULL;
-	dirty->nr_dirty = 0;
-
-	return nr_dirty;
-}
-
-GLuint
-nouveau_bo_download_dirty(GLcontext *ctx, struct gl_buffer_object *bo)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)bo;
-	nouveau_bufferobj_dirty *dirty = &nbo->gpu_dirty;
-	GLuint nr_dirty;
-	int i;
-
-	nr_dirty = dirty->nr_dirty;
-	if (nr_dirty) {
-		DEBUG("clean\n");
-		return nr_dirty;
-	}
-	
-	for (i=0; i<nr_dirty; i++) {
-		nouveau_bufferobj_region *r = &dirty->dirty[i];
-
-		DEBUG("dirty %d: o=0x%08x, s=0x%08x\n",
-				i, r->start, r->end - r->start);
-		nouveau_bo_download_from_screen(ctx,
-						r->start,
-						r->end - r->start, bo);
-	}
-
-	FREE(dirty->dirty);
-	dirty->dirty    = NULL;
-	dirty->nr_dirty = 0;
-
-	return nr_dirty;
-}
-
-static void
-nouveauBindBuffer(GLcontext *ctx, GLenum target, struct gl_buffer_object *obj)
-{
-}
-
-static struct gl_buffer_object *
-nouveauNewBufferObject(GLcontext *ctx, GLuint buffer, GLenum target)
-{
-	nouveau_buffer_object *nbo;
-
-	nbo = CALLOC_STRUCT(nouveau_buffer_object_t);
-	if (nbo)
-		_mesa_initialize_buffer_object(&nbo->mesa, buffer, target);
-	DEBUG("bo=%p\n", nbo);
-
-	return nbo ? &nbo->mesa : NULL;
-}
-
-static void
-nouveauDeleteBuffer(GLcontext *ctx, struct gl_buffer_object *obj)
-{
-	nouveau_buffer_object *nbo = (nouveau_buffer_object *)obj;
-
-	if (nbo->gpu_dirty.nr_dirty)
-		FREE(nbo->gpu_dirty.dirty);
-	if (nbo->cpu_dirty.nr_dirty)
-		FREE(nbo->cpu_dirty.dirty);
-	if (nbo->cpu_mem) nouveau_mem_free(ctx, nbo->cpu_mem);
-	if (nbo->gpu_mem) nouveau_mem_free(ctx, nbo->gpu_mem);
-
-	_mesa_delete_buffer_object(ctx, obj);
-}
-
-static void
-nouveauBufferData(GLcontext *ctx, GLenum target, GLsizeiptrARB size,
-		  const GLvoid *data, GLenum usage,
-		  struct gl_buffer_object *obj)
-{
-	GLuint gpu_flags;
-
-	DEBUG("target=%s, size=%d, data=%p, usage=%s, obj=%p\n",
-			_mesa_lookup_enum_by_nr(target),
-			(GLuint)size, data,
-			_mesa_lookup_enum_by_nr(usage),
-			obj);
-
-	switch (target) {
-	case GL_ELEMENT_ARRAY_BUFFER_ARB:
-		gpu_flags = 0;
-		break;
-	default:
-		gpu_flags = NOUVEAU_BO_VRAM_OK | NOUVEAU_BO_GART_OK;
-		break;
-	}
-	nouveau_bo_init_storage(ctx, gpu_flags, size, data, usage, obj);
-}
-
-static void
-nouveauBufferSubData(GLcontext *ctx, GLenum target, GLintptrARB offset,
-		     GLsizeiptrARB size, const GLvoid *data,
-		     struct gl_buffer_object *obj)
-{
-	GLvoid *out;
-
-	DEBUG("target=%s, offset=0x%x, size=%d, data=%p, obj=%p\n",
-			_mesa_lookup_enum_by_nr(target),
-			(GLuint)offset, (GLuint)size, data, obj);
-
-	out = nouveau_bo_map(ctx, GL_WRITE_ONLY_ARB, obj);
-	_mesa_memcpy(out + offset, data, size);
-	nouveau_bo_dirty_linear(ctx, GL_FALSE, offset, size, obj);
-	nouveau_bo_unmap(ctx, obj);
-}
-
-static void
-nouveauGetBufferSubData(GLcontext *ctx, GLenum target, GLintptrARB offset,
-		     GLsizeiptrARB size, GLvoid *data,
-		     struct gl_buffer_object *obj)
-{
-	const GLvoid *in;
-
-	DEBUG("target=%s, offset=0x%x, size=%d, data=%p, obj=%p\n",
-			_mesa_lookup_enum_by_nr(target),
-			(GLuint)offset, (GLuint)size, data, obj);
-
-	in = nouveau_bo_map(ctx, GL_READ_ONLY_ARB, obj);
-	_mesa_memcpy(data, in + offset, size);
-	nouveau_bo_unmap(ctx, obj);
-}
-
-static void *
-nouveauMapBuffer(GLcontext *ctx, GLenum target, GLenum access,
-		 struct gl_buffer_object *obj)
-{
-	DEBUG("target=%s, access=%s, obj=%p\n",
-			_mesa_lookup_enum_by_nr(target),
-			_mesa_lookup_enum_by_nr(access),
-			obj
-			);
-
-	/* Already mapped.. */
-	if (obj->Pointer)
-		return NULL;
-
-	/* Have to pass READ_WRITE here, nouveau_bo_map will only ensure that
-	 * the cpu_mem buffer is up-to-date if we ask for read access.
-	 *
-	 * However, even if the client only asks for write access, we're still
-	 * forced to reupload the entire buffer.  So, we need the cpu_mem buffer
-	 * to have the correct data all the time.
-	 */
-	obj->Pointer = nouveau_bo_map(ctx, GL_READ_WRITE_ARB, obj);
-
-	/* The GL spec says that a client attempting to write to a bufferobj
-	 * mapped READ_ONLY object may have unpredictable results, possibly
-	 * even program termination.
-	 *
-	 * We're going to use this, and only mark the buffer as dirtied if
-	 * the client asks for write access.
-	 */
-	if (target != GL_READ_ONLY_ARB) {
-		/* We have no way of knowing what was modified by the client,
-		 * so the entire buffer gets dirtied. */
-		nouveau_bo_dirty_all(ctx, GL_FALSE, obj);
-	}
-
-	return obj->Pointer;
-}
-
-static GLboolean
-nouveauUnmapBuffer(GLcontext *ctx, GLenum target, struct gl_buffer_object *obj)
-{
-	DEBUG("target=%s, obj=%p\n", _mesa_lookup_enum_by_nr(target), obj);
-
-	assert(obj->Pointer);
-
-	nouveau_bo_unmap(ctx, obj);
-	obj->Pointer = NULL;
-	return GL_TRUE;
-}
-	  
-void
-nouveauInitBufferObjects(GLcontext *ctx)
-{
-	ctx->Driver.BindBuffer		= nouveauBindBuffer;
-	ctx->Driver.NewBufferObject	= nouveauNewBufferObject;
-	ctx->Driver.DeleteBuffer	= nouveauDeleteBuffer;
-	ctx->Driver.BufferData		= nouveauBufferData;
-	ctx->Driver.BufferSubData	= nouveauBufferSubData;
-	ctx->Driver.GetBufferSubData	= nouveauGetBufferSubData;
-	ctx->Driver.MapBuffer		= nouveauMapBuffer;
-	ctx->Driver.UnmapBuffer		= nouveauUnmapBuffer;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h b/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h
deleted file mode 100644
index 3439a35e7c8..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.h
+++ /dev/null
@@ -1,77 +0,0 @@
-#ifndef __NOUVEAU_BUFFEROBJ_H__
-#define __NOUVEAU_BUFFEROBJ_H__
-
-#include "mtypes.h"
-#include "nouveau_buffers.h"
-
-#define NOUVEAU_BO_VRAM_OK (NOUVEAU_MEM_FB | NOUVEAU_MEM_FB_ACCEPTABLE)
-#define NOUVEAU_BO_GART_OK  (NOUVEAU_MEM_AGP | NOUVEAU_MEM_AGP_ACCEPTABLE)
-
-typedef struct nouveau_bufferobj_region_t {
-	uint32_t start;
-	uint32_t end;
-} nouveau_bufferobj_region;
-
-typedef struct nouveau_bufferobj_dirty_t {
-	nouveau_bufferobj_region *dirty;
-	int nr_dirty;
-} nouveau_bufferobj_dirty;
-
-typedef struct nouveau_buffer_object_t {
-	/* Base class, must be first */
-	struct gl_buffer_object mesa;
-
-	GLboolean		mapped;
-	GLenum			usage;
-
-	/* Memory used for GPU access to the buffer*/
-	GLuint			gpu_mem_flags;
-	nouveau_mem *		gpu_mem;
-	nouveau_bufferobj_dirty	gpu_dirty;
-
-	/* Memory used for CPU access to the buffer */
-	GLuint			cpu_mem_flags;
-	nouveau_mem *		cpu_mem;
-	GLvoid *		cpu_mem_sys;
-	nouveau_bufferobj_dirty	cpu_dirty;
-} nouveau_buffer_object;
-
-extern void
-nouveau_bo_init_storage(GLcontext *ctx, GLuint valid_gpu_access,
-			GLsizeiptrARB size, const GLvoid *data, GLenum usage,
-			struct gl_buffer_object *bo);
-
-extern GLboolean
-nouveau_bo_move_in(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern GLboolean
-nouveau_bo_move_out(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern void *
-nouveau_bo_map(GLcontext *ctx, GLenum usage, struct gl_buffer_object *bo);
-
-extern void
-nouveau_bo_unmap(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern uint32_t
-nouveau_bo_gpu_ref(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern void
-nouveau_bo_dirty_linear(GLcontext *ctx, GLboolean on_card,
-			uint32_t offset, uint32_t size,
-			struct gl_buffer_object *bo);
-
-extern void
-nouveau_bo_dirty_all(GLcontext *ctx, GLboolean on_card,
-		     struct gl_buffer_object *bo);
-
-extern GLuint
-nouveau_bo_upload_dirty(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern GLuint
-nouveau_bo_download_dirty(GLcontext *ctx, struct gl_buffer_object *bo);
-
-extern void
-nouveauInitBufferObjects(GLcontext *ctx);
-
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_buffers.c b/src/mesa/drivers/dri/nouveau/nouveau_buffers.c
deleted file mode 100644
index d498f616c90..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_buffers.c
+++ /dev/null
@@ -1,436 +0,0 @@
-#include "utils.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
-#include "fbobject.h"
-
-#include "nouveau_context.h"
-#include "nouveau_buffers.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_msg.h"
-
-#define MAX_MEMFMT_LENGTH 32768
-
-/* Unstrided blit using NV_MEMORY_TO_MEMORY_FORMAT */
-GLboolean
-nouveau_memformat_flat_emit(GLcontext *ctx,
-      			    nouveau_mem *dst, nouveau_mem *src,
-			    GLuint dst_offset, GLuint src_offset,
-			    GLuint size)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   uint32_t src_handle, dst_handle;
-   GLuint count;
-
-   if (src_offset + size > src->size) {
-      MESSAGE("src out of nouveau_mem bounds\n");
-      return GL_FALSE;
-   }
-   if (dst_offset + size > dst->size) {
-      MESSAGE("dst out of nouveau_mem bounds\n");
-      return GL_FALSE;
-   }
-
-   src_handle = (src->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaTT;
-   dst_handle = (dst->type & NOUVEAU_MEM_FB) ? NvDmaFB : NvDmaTT;
-   src_offset += nouveau_mem_gpu_offset_get(ctx, src);
-   dst_offset += nouveau_mem_gpu_offset_get(ctx, dst);
-
-   BEGIN_RING_SIZE(NvSubMemFormat, NV_MEMORY_TO_MEMORY_FORMAT_OBJECT_IN, 2);
-   OUT_RING       (src_handle);
-   OUT_RING       (dst_handle);
-
-   count = (size / MAX_MEMFMT_LENGTH) + ((size % MAX_MEMFMT_LENGTH) ? 1 : 0);
-
-   while (count--) {
-      GLuint length = (size > MAX_MEMFMT_LENGTH) ? MAX_MEMFMT_LENGTH : size;
-
-      BEGIN_RING_SIZE(NvSubMemFormat, NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
-      OUT_RING       (src_offset);
-      OUT_RING       (dst_offset);
-      OUT_RING       (0); /* pitch in */
-      OUT_RING       (0); /* pitch out */
-      OUT_RING       (length); /* line length */
-      OUT_RING       (1); /* number of lines */
-      OUT_RING       ((1 << 8) /* dst_inc */ | (1 << 0) /* src_inc */);
-      OUT_RING       (0); /* buffer notify? */
-      FIRE_RING();
-
-      src_offset += length;
-      dst_offset += length;
-      size       -= length;
-   }
-
-   return GL_TRUE;
-}
-
-void
-nouveau_mem_free(GLcontext *ctx, nouveau_mem *mem)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   struct drm_nouveau_mem_free memf;
-
-   if (NOUVEAU_DEBUG & DEBUG_MEM)  {
-      fprintf(stderr, "%s: type=0x%x, offset=0x%x, size=0x%x\n",
-	    __func__, mem->type, (GLuint)mem->offset, (GLuint)mem->size);
-   }
-
-   if (mem->map)
-      drmUnmap(mem->map, mem->size);
-   memf.flags  = mem->type;
-   memf.offset = mem->offset;
-   drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_MEM_FREE, &memf, sizeof(memf));
-   FREE(mem);
-}
-
-nouveau_mem *
-nouveau_mem_alloc(GLcontext *ctx, int type, GLuint size, GLuint align)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   struct drm_nouveau_mem_alloc mema;
-   nouveau_mem *mem;
-   int ret;
-
-   if (NOUVEAU_DEBUG & DEBUG_MEM)  {
-      fprintf(stderr, "%s: requested: type=0x%x, size=0x%x, align=0x%x\n",
-	    __func__, type, (GLuint)size, align);
-   }
-
-   mem = CALLOC(sizeof(nouveau_mem));
-   if (!mem)
-      return NULL;
-
-   mema.flags     = type;
-   mema.size      = mem->size = size;
-   mema.alignment = align;
-   mem->map       = NULL;
-   ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_MEM_ALLOC,
-	 		     &mema, sizeof(mema));
-   if (ret) {
-      FREE(mem);
-      return NULL;
-   }
-   mem->offset = mema.offset;
-   mem->type   = mema.flags;
-
-   if (NOUVEAU_DEBUG & DEBUG_MEM)  {
-      fprintf(stderr, "%s: actual: type=0x%x, offset=0x%x, size=0x%x\n",
-	    __func__, mem->type, (GLuint)mem->offset, (GLuint)mem->size);
-   }
-
-   if (type & NOUVEAU_MEM_MAPPED)
-      ret = drmMap(nmesa->driFd, mema.map_handle, mem->size, &mem->map);
-   if (ret) {
-      mem->map = NULL;
-      nouveau_mem_free(ctx, mem);
-      mem = NULL;
-   }
-
-   return mem;
-}
-
-uint32_t
-nouveau_mem_gpu_offset_get(GLcontext *ctx, nouveau_mem *mem)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-   return mem->offset;
-}
-
-static GLboolean
-nouveau_renderbuffer_pixelformat(nouveau_renderbuffer *nrb,
-      				 GLenum internalFormat)
-{
-      nrb->mesa.InternalFormat	= internalFormat;
-
-   /*TODO: We probably want to extend this a bit, and maybe make
-    *      card-specific? 
-    */
-      switch (internalFormat) {
-      case GL_RGBA:
-      case GL_RGBA8:
-	 nrb->mesa._BaseFormat	= GL_RGBA;
-	 nrb->mesa._ActualFormat= GL_RGBA8;
-	 nrb->mesa.DataType	= GL_UNSIGNED_BYTE;
-	 nrb->mesa.RedBits	= 8;
-	 nrb->mesa.GreenBits	= 8;
-	 nrb->mesa.BlueBits	= 8;
-	 nrb->mesa.AlphaBits	= 8;
-	 nrb->cpp		= 4;
-	 break;
-      case GL_RGB:
-      case GL_RGB5:
-	 nrb->mesa._BaseFormat	= GL_RGB;
-	 nrb->mesa._ActualFormat= GL_RGB5;
-	 nrb->mesa.DataType	= GL_UNSIGNED_BYTE;
-	 nrb->mesa.RedBits	= 5;
-	 nrb->mesa.GreenBits	= 6;
-	 nrb->mesa.BlueBits	= 5;
-	 nrb->mesa.AlphaBits	= 0;
-	 nrb->cpp		= 2;
-	 break;
-      case GL_DEPTH_COMPONENT16:
-	 nrb->mesa._BaseFormat	= GL_DEPTH_COMPONENT;
-	 nrb->mesa._ActualFormat= GL_DEPTH_COMPONENT16;
-	 nrb->mesa.DataType	= GL_UNSIGNED_SHORT;
-	 nrb->mesa.DepthBits	= 16;
-	 nrb->cpp		= 2;
-	 break;
-      case GL_DEPTH_COMPONENT24:
-	 nrb->mesa._BaseFormat	= GL_DEPTH_COMPONENT;
-	 nrb->mesa._ActualFormat= GL_DEPTH24_STENCIL8_EXT;
-	 nrb->mesa.DataType	= GL_UNSIGNED_INT_24_8_EXT;
-	 nrb->mesa.DepthBits	= 24;
-	 nrb->cpp		= 4;
-	 break;
-      case GL_STENCIL_INDEX8_EXT:
-	 nrb->mesa._BaseFormat	= GL_STENCIL_INDEX;
-	 nrb->mesa._ActualFormat= GL_DEPTH24_STENCIL8_EXT;
-	 nrb->mesa.DataType	= GL_UNSIGNED_INT_24_8_EXT;
-	 nrb->mesa.StencilBits	= 8;
-	 nrb->cpp		= 4;
-	 break;
-      case GL_DEPTH24_STENCIL8_EXT:
-	 nrb->mesa._BaseFormat	= GL_DEPTH_STENCIL_EXT;
-	 nrb->mesa._ActualFormat= GL_DEPTH24_STENCIL8_EXT;
-	 nrb->mesa.DataType	= GL_UNSIGNED_INT_24_8_EXT;
-	 nrb->mesa.DepthBits	= 24;
-	 nrb->mesa.StencilBits  = 8;
-	 nrb->cpp		= 4;
-	 break;
-      default:
-	 return GL_FALSE;
-	 break;
-      }
-
-      return GL_TRUE;
-}
-
-static GLboolean
-nouveau_renderbuffer_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
-      			     GLenum internalFormat,
-			     GLuint width,
-			     GLuint height)
-{
-   nouveau_renderbuffer *nrb = (nouveau_renderbuffer*)rb;
-
-   if (!nouveau_renderbuffer_pixelformat(nrb, internalFormat)) {
-      fprintf(stderr, "%s: unknown internalFormat\n", __func__);
-      return GL_FALSE;
-   }
-
-   /* If this buffer isn't statically alloc'd, we may need to ask the
-    * drm for more memory */
-   if (!nrb->dPriv && (rb->Width != width || rb->Height != height)) {
-      GLuint pitch;
-
-      /* align pitches to 64 bytes */
-      pitch = ((width * nrb->cpp) + 63) & ~63;
-
-      if (nrb->mem)
-	 nouveau_mem_free(ctx, nrb->mem);
-      nrb->mem = nouveau_mem_alloc(ctx,
-	    			   NOUVEAU_MEM_FB | NOUVEAU_MEM_MAPPED,
-				   pitch*height,
-				   0);
-      if (!nrb->mem)
-	 return GL_FALSE;
-
-      /* update nouveau_renderbuffer info */
-      nrb->offset = nouveau_mem_gpu_offset_get(ctx, nrb->mem);
-      nrb->pitch  = pitch;
-   }
-
-   rb->Width = width;
-   rb->Height = height;
-   rb->InternalFormat = internalFormat;
-   return GL_TRUE;
-}
-
-static void
-nouveau_renderbuffer_delete(struct gl_renderbuffer *rb)
-{
-   GET_CURRENT_CONTEXT(ctx);
-   nouveau_renderbuffer *nrb = (nouveau_renderbuffer*)rb;
-
-   if (nrb->mem)
-      nouveau_mem_free(ctx, nrb->mem);
-   FREE(nrb);
-}
-
-nouveau_renderbuffer *
-nouveau_renderbuffer_new(GLenum internalFormat, GLvoid *map,
-      			 GLuint offset,  GLuint pitch,
-			 __DRIdrawablePrivate *dPriv)
-{
-   nouveau_renderbuffer *nrb;
-
-   nrb = CALLOC_STRUCT(nouveau_renderbuffer_t);
-   if (nrb) {
-      _mesa_init_renderbuffer(&nrb->mesa, 0);
-
-      nouveau_renderbuffer_pixelformat(nrb, internalFormat);
-
-      nrb->mesa.AllocStorage	= nouveau_renderbuffer_storage;
-      nrb->mesa.Delete		= nouveau_renderbuffer_delete;
-
-      nrb->dPriv  = dPriv;
-      nrb->offset = offset;
-      nrb->pitch  = pitch;
-      nrb->map    = map;
-   }
-
-   return nrb;
-}
-
-static void
-nouveau_cliprects_drawable_set(nouveauContextPtr nmesa,
-      			       nouveau_renderbuffer *nrb)
-{
-   __DRIdrawablePrivate *dPriv = nrb->dPriv;
-
-   nmesa->numClipRects	= dPriv->numClipRects;
-   nmesa->pClipRects	= dPriv->pClipRects;
-   nmesa->drawX		= dPriv->x;
-   nmesa->drawY		= dPriv->y;
-   nmesa->drawW		= dPriv->w;
-   nmesa->drawH		= dPriv->h;
-}
-
-static void
-nouveau_cliprects_renderbuffer_set(nouveauContextPtr nmesa,
-      				   nouveau_renderbuffer *nrb)
-{
-   nmesa->numClipRects	= 1;
-   nmesa->pClipRects	= &nmesa->osClipRect;
-   nmesa->osClipRect.x1	= 0;
-   nmesa->osClipRect.y1	= 0;
-   nmesa->osClipRect.x2	= nrb->mesa.Width;
-   nmesa->osClipRect.y2	= nrb->mesa.Height;
-   nmesa->drawX		= 0;
-   nmesa->drawY		= 0;
-   nmesa->drawW		= nrb->mesa.Width;
-   nmesa->drawH		= nrb->mesa.Height;
-}
-
-void
-nouveau_window_moved(GLcontext *ctx)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   nouveau_renderbuffer *nrb;
-
-   nrb = (nouveau_renderbuffer *)ctx->DrawBuffer->_ColorDrawBuffers[0][0];
-   if (!nrb)
-      return;
-
-   if (!nrb->dPriv)
-      nouveau_cliprects_renderbuffer_set(nmesa, nrb);
-   else
-      nouveau_cliprects_drawable_set(nmesa, nrb);
-
-   /* Viewport depends on window size/position, nouveauCalcViewport
-    * will take care of calling the hw-specific WindowMoved
-    */
-   ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y,
-	 		     ctx->Viewport.Width, ctx->Viewport.Height);
-   /* Scissor depends on window position */
-   ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-	 		    ctx->Scissor.Width, ctx->Scissor.Height);
-}
-
-GLboolean
-nouveau_build_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   nouveau_renderbuffer *color[MAX_DRAW_BUFFERS];
-   nouveau_renderbuffer *depth;
-
-   _mesa_update_framebuffer(ctx);
-   _mesa_update_draw_buffer_bounds(ctx);
-
-   color[0] = (nouveau_renderbuffer *)fb->_ColorDrawBuffers[0][0];
-   if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped)
-      depth = (nouveau_renderbuffer *)fb->_DepthBuffer->Wrapped;
-   else
-      depth = (nouveau_renderbuffer *)fb->_DepthBuffer;
-
-   if (!nmesa->hw_func.BindBuffers(nmesa, 1, color, depth))
-      return GL_FALSE;
-   nouveau_window_moved(ctx);
-
-   return GL_TRUE;
-}
-
-static void
-nouveauDrawBuffer(GLcontext *ctx, GLenum buffer)
-{
-   nouveau_build_framebuffer(ctx, ctx->DrawBuffer);
-}
-
-static struct gl_framebuffer *
-nouveauNewFramebuffer(GLcontext *ctx, GLuint name)
-{
-   return _mesa_new_framebuffer(ctx, name);
-}
-
-static struct gl_renderbuffer *
-nouveauNewRenderbuffer(GLcontext *ctx, GLuint name)
-{
-   nouveau_renderbuffer *nrb;
-
-   nrb = CALLOC_STRUCT(nouveau_renderbuffer_t);
-   if (nrb) {
-      _mesa_init_renderbuffer(&nrb->mesa, name);
-
-      nrb->mesa.AllocStorage	= nouveau_renderbuffer_storage;
-      nrb->mesa.Delete		= nouveau_renderbuffer_delete;
-   }
-   return &nrb->mesa;
-}
-
-static void
-nouveauBindFramebuffer(GLcontext *ctx, GLenum target,
-                       struct gl_framebuffer *fb, struct gl_framebuffer *fbread)
-{
-   if (target == GL_FRAMEBUFFER_EXT || target == GL_DRAW_FRAMEBUFFER_EXT) {
-      nouveau_build_framebuffer(ctx, fb);
-   }
-}
-
-static void
-nouveauFramebufferRenderbuffer(GLcontext *ctx,
-      			       struct gl_framebuffer *fb,
-      			       GLenum attachment,
-			       struct gl_renderbuffer *rb)
-{
-   _mesa_framebuffer_renderbuffer(ctx, fb, attachment, rb);
-   nouveau_build_framebuffer(ctx, fb);
-}
-
-static void
-nouveauRenderTexture(GLcontext *ctx,
-      		     struct gl_framebuffer *fb,
-      		     struct gl_renderbuffer_attachment *att)
-{
-}
-
-static void
-nouveauFinishRenderTexture(GLcontext *ctx,
-      			   struct gl_renderbuffer_attachment *att)
-{
-}
-
-void
-nouveauInitBufferFuncs(struct dd_function_table *func)
-{
-   func->DrawBuffer		 = nouveauDrawBuffer;
-
-   func->NewFramebuffer		 = nouveauNewFramebuffer;
-   func->NewRenderbuffer	 = nouveauNewRenderbuffer;
-   func->BindFramebuffer	 = nouveauBindFramebuffer;
-   func->FramebufferRenderbuffer = nouveauFramebufferRenderbuffer;
-   func->RenderTexture		 = nouveauRenderTexture;
-   func->FinishRenderTexture	 = nouveauFinishRenderTexture;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_buffers.h b/src/mesa/drivers/dri/nouveau/nouveau_buffers.h
deleted file mode 100644
index d86455184c2..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_buffers.h
+++ /dev/null
@@ -1,48 +0,0 @@
-#ifndef __NOUVEAU_BUFFERS_H__
-#define __NOUVEAU_BUFFERS_H__
-
-#include <stdint.h>
-#include "mtypes.h"
-#include "utils.h"
-#include "renderbuffer.h"
-
-typedef struct nouveau_mem_t {
-   int type;
-   uint64_t offset;
-   uint64_t size;
-   void*    map;
-} nouveau_mem;
-
-extern nouveau_mem *nouveau_mem_alloc(GLcontext *ctx, int type,
-      				      GLuint size, GLuint align);
-extern void nouveau_mem_free(GLcontext *ctx, nouveau_mem *mem);
-extern uint32_t nouveau_mem_gpu_offset_get(GLcontext *ctx, nouveau_mem *mem);
-
-extern GLboolean nouveau_memformat_flat_emit(GLcontext *ctx,
-      					     nouveau_mem *dst,
-					     nouveau_mem *src,
-					     GLuint dst_offset,
-					     GLuint src_offset,
-					     GLuint size);
-
-typedef struct nouveau_renderbuffer_t {
-   struct gl_renderbuffer mesa; /* must be first! */
-   __DRIdrawablePrivate  *dPriv;
-
-   nouveau_mem *mem;
-   void *	map;
-
-   int		cpp;
-   uint32_t	offset;
-   uint32_t	pitch;
-} nouveau_renderbuffer;
-
-extern nouveau_renderbuffer *nouveau_renderbuffer_new(GLenum internalFormat,
-      GLvoid *map, GLuint offset, GLuint pitch, __DRIdrawablePrivate *dPriv);
-extern void nouveau_window_moved(GLcontext *ctx);
-extern GLboolean nouveau_build_framebuffer(GLcontext *, struct gl_framebuffer *);
-extern nouveau_renderbuffer *nouveau_current_draw_buffer(GLcontext *ctx);
-
-extern void nouveauInitBufferFuncs(struct dd_function_table *func);
-
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card.c b/src/mesa/drivers/dri/nouveau/nouveau_card.c
deleted file mode 100644
index 91f12f0d704..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_card.c
+++ /dev/null
@@ -1,17 +0,0 @@
-
-#include "nouveau_card.h"
-#include "nouveau_reg.h"
-#include "nouveau_drm.h"
-#include "nouveau_card_list.h"
-
-
-nouveau_card* nouveau_card_lookup(uint32_t device_id)
-{
-	int i;
-	for(i=0;i<sizeof(nouveau_card_list)/sizeof(nouveau_card)-1;i++)
-		if (nouveau_card_list[i].id==(device_id&0xffff))
-			return &(nouveau_card_list[i]);
-	return NULL;
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card.h b/src/mesa/drivers/dri/nouveau/nouveau_card.h
deleted file mode 100644
index 8a4c5f2244e..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_card.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef __NOUVEAU_CARD_H__
-#define __NOUVEAU_CARD_H__
-
-#include "dri_util.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-
-typedef struct nouveau_card_t {
-	uint16_t id; /* last 4 digits of pci id, last digit is always 0 */
-	char* name; /* the user-friendly card name */
-	uint32_t class_3d; /* the object class this card uses for 3D */
-	uint32_t type; /* the major card family */
-	uint32_t flags;
-}
-nouveau_card;
-
-#define NV_HAS_LMA 0x00000001
-
-extern nouveau_card* nouveau_card_lookup(uint32_t device_id);
-
-#endif
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h b/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
deleted file mode 100644
index 8ec5c4a188a..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_card_list.h
+++ /dev/null
@@ -1,232 +0,0 @@
-static nouveau_card nouveau_card_list[]={
-{0x0008,  "EDGE 3D",                               0,                             NV_03, 0},
-{0x0009,  "EDGE 3D",                               0,                             NV_03, 0},
-{0x0010,  "Mutara V08",                            0,                             NV_03, 0},
-{0x0020,  "RIVA TNT",                              NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x0028,  "RIVA TNT2/TNT2 Pro",                    NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x0029,  "RIVA TNT2 Ultra",                       NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002A,  "Riva TnT2",                             NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002B,  "Riva TnT2",                             NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002C,  "Vanta/Vanta LT",                        NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002D,  "RIVA TNT2 Model 64/Model 64 Pro",       NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002E,  "Vanta",                                 NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002F,  "Vanta",                                 NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x0040,  "GeForce 6800 Ultra",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0041,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0042,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0043,  "NV40.3",                                NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0044,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0045,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0046,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0047,  "GeForce 6800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0048,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0049,  "NV40GL",                                NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x004D,  "Quadro FX 4000",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x004E,  "Quadro FX 4000",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0090,  "GeForce 7800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0091,  "GeForce 7800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0092,  "GeForce 7800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0093,  "GeForce 7800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0098,  "GeForce Go 7800",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0099,  "GE Force Go 7800 GTX",                  NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x009D,  "Quadro FX4500",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00A0,  "Aladdin TNT2",                          NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x00C0,  "GeForce 6800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00C1,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00C2,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00C3,  "Geforce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00C8,  "GeForce Go 6800",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00C9,  "GeForce Go 6800 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00CC,  "Quadro FX Go1400",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00CD,  "Quadro FX 3450/4000 SDI",               NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00CE,  "Quadro FX 1400",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F0,  "GeForce 6800/GeForce 6800 Ultra",       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F1,  "GeForce 6600/GeForce 6600 GT",          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F2,  "GeForce 6600/GeForce 6600 GT",          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F3,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F4,  "GeForce 6600 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F5,  "GeForce 7800 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F6,  "GeForce 6600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F8,  "Quadro FX 3400/4400",                   NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00F9,  "GeForce 6800 Ultra/GeForce 6800 GT",    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x00FA,  "GeForce PCX 5750",                      NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x00FB,  "GeForce PCX 5900",                      NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x00FC,  "Quadro FX 330/GeForce PCX 5300",        NV30_TCL_PRIMITIVE_3D|0x0600,  NV_30, 0},
-{0x00FD,  "Quadro FX 330/Quadro NVS280",           NV30_TCL_PRIMITIVE_3D|0x0600,  NV_30, 0},
-{0x00FE,  "Quadro FX 1300",                        NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x00FF,  "GeForce PCX 4300",                      NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0100,  "GeForce 256 SDR",                       NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
-{0x0101,  "GeForce 256 DDR",                       NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
-{0x0103,  "Quadro",                                NV10_TCL_PRIMITIVE_3D,         NV_10, 0},
-{0x0110,  "GeForce2 MX/MX 400",                    NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
-{0x0111,  "GeForce2 MX 100 DDR/200 DDR",           NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
-{0x0112,  "GeForce2 Go",                           NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
-{0x0113,  "Quadro2 MXR/EX/Go",                     NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
-{0x0140,  "GeForce 6600 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0141,  "GeForce 6600",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0142,  "GeForce 6600 PCIe",                     NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0144,  "GeForce Go 6600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0145,  "GeForce 6610 XL",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0146,  "Geforce Go 6600TE/6200TE",              NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0148,  "GeForce Go 6600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0149,  "GeForce Go 6600 GT",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x014A,  "Quadro NVS 440",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x014C,  "Quadro FX 550",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x014D,  "Quadro FX 550",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x014E,  "Quadro FX 540",                         NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x014F,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0150,  "GeForce2 GTS/Pro",                      NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
-{0x0151,  "GeForce2 Ti",                           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
-{0x0152,  "GeForce2 Ultra, Bladerunner",           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
-{0x0153,  "Quadro2 Pro",                           NV11_TCL_PRIMITIVE_3D,         NV_15, 0},
-{0x0161,  "GeForce 6200 TurboCache(TM)",           NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0162,  "GeForce 6200 SE TurboCache (TM)",       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0163,  "GeForce 6200 LE",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0164,  "GeForce Go 6200",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0165,  "Quadro NVS 285",                        NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0166,  "GeForce Go 6400",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0167,  "GeForce Go 6200 TurboCache",            NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0168,  "GeForce Go 6200 TurboCache",            NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0170,  "GeForce4 MX 460",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0171,  "GeForce4 MX 440",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0172,  "GeForce4 MX 420",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0173,  "GeForce4 MX 440-SE",                    NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0174,  "GeForce4 440 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0175,  "GeForce4 420 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0176,  "GeForce4 420 Go 32M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0177,  "GeForce4 460 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0178,  "Quadro4 550 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0179,  "GeForce4 420 Go 32M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x017A,  "Quadro4 200/400 NVS",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x017B,  "Quadro4 550 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x017C,  "Quadro4 500 GoGL",                      NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x017D,  "GeForce4 410 Go 16M",                   NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0181,  "GeForce4 MX 440 AGP 8x",                NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0182,  "GeForce4 MX 440SE AGP 8x",              NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0183,  "GeForce4 MX 420 AGP 8x",                NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0185,  "GeForce4 MX 4000 AGP 8x",               NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0186,  "GeForce4 448 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0187,  "GeForce4 488 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0188,  "Quadro4 580 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x018A,  "Quadro4 NVS AGP 8x",                    NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x018B,  "Quadro4 380 XGL",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x018C,  "Quadro NVS 50 PCI",                     NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x018D,  "GeForce4 448 Go",                       NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0191,  "GeForce 8800 GTX",                      NV30_TCL_PRIMITIVE_3D|0x5000,  NV_50, 0},
-{0x0193,  "GeForce 8800 GTS",                      NV30_TCL_PRIMITIVE_3D|0x5000,  NV_50, 0},
-{0x01A0,  "GeForce2 MX Integrated Graphics",       NV11_TCL_PRIMITIVE_3D,         NV_11, 0},
-{0x01D1,  "GeForce 7300 LE",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01D6,  "GeForce Go 7200",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01D7,  "Quadro NVS 110M / GeForce Go 7300",     NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01D8,  "GeForce Go 7400",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01DA,  "Quadro NVS 110M",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01DF,  "GeForce 7300 GS",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x01F0,  "GeForce4 MX - nForce GPU",              NV17_TCL_PRIMITIVE_3D,         NV_17, 0},
-{0x0200,  "GeForce3",                              NV20_TCL_PRIMITIVE_3D,         NV_20, 0},
-{0x0201,  "GeForce3 Ti 200",                       NV20_TCL_PRIMITIVE_3D,         NV_20, 0},
-{0x0202,  "GeForce3 Ti 500",                       NV20_TCL_PRIMITIVE_3D,         NV_20, 0},
-{0x0203,  "Quadro DCC",                            NV20_TCL_PRIMITIVE_3D,         NV_20, 0},
-{0x0211,  "GeForce 6800",                          NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0212,  "GeForce 6800 LE",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0215,  "GeForce 6800 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0218,  "GeForce 6800 XT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0221,  "GeForce 6200",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0240,  "GeForce 6150",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0242,  "GeForce 6100",                          NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0244,  "Geforce 6150 Go",                       NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0250,  "GeForce4 Ti 4600",                      NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0251,  "GeForce4 Ti 4400",                      NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0252,  "GeForce4 Ti",                           NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0253,  "GeForce4 Ti 4200",                      NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0258,  "Quadro4 900 XGL",                       NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0259,  "Quadro4 750 XGL",                       NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x025B,  "Quadro4 700 XGL",                       NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0280,  "GeForce4 Ti 4800",                      NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0281,  "GeForce4 Ti 4200 AGP 8x",               NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0282,  "GeForce4 Ti 4800 SE",                   NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0286,  "GeForce4 Ti 4200 Go AGP 8x",            NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0288,  "Quadro4 980 XGL",                       NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0289,  "Quadro4 780 XGL",                       NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x028C,  "Quadro4 700 GoGL",                      NV20_TCL_PRIMITIVE_3D|0x0500,  NV_25, 0},
-{0x0290,  "GeForce 7900 GTX",                      NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0291,  "GeForce 7900 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0292,  "GeForce 7900 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0298,  "GeForce Go 7900 GS",                    NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0299,  "GeForce Go 7900 GTX",                   NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029A,  "Quadro FX 2500M",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029B,  "Quadro FX 1500M",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029C,  "Quadro FX 5500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029D,  "Quadro FX 3500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029E,  "Quadro FX 1500",                        NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x029F,  "Quadro FX 4500 X2",                     NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x02A0,  "XGPU",                                  NV20_TCL_PRIMITIVE_3D,         NV_20, 0},
-{0x02E1,  "GeForce 7600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0300,  "GeForce FX",                            NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0301,  "GeForce FX 5800 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0302,  "GeForce FX 5800",                       NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0308,  "Quadro FX 2000",                        NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0309,  "Quadro FX 1000",                        NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0311,  "GeForce FX 5600 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0312,  "GeForce FX 5600",                       NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0313,  "NV31",                                  NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0314,  "GeForce FX 5600XT",                     NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0316,  "NV31M",                                 NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0317,  "NV31M Pro",                             NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031A,  "GeForce FX Go5600",                     NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031B,  "GeForce FX Go5650",                     NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031C,  "NVIDIA Quadro FX Go700",                NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031D,  "NV31GLM",                               NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031E,  "NV31GLM Pro",                           NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x031F,  "NV31GLM Pro",                           NV30_TCL_PRIMITIVE_3D|0x0300,  NV_30, 0},
-{0x0320,  "GeForce FX 5200",                       NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0321,  "GeForce FX 5200 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0322,  "GeForce FX 5200",                       NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0323,  "GeForce FX 5200LE",                     NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0324,  "GeForce FX Go5200",                     NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0325,  "GeForce FX Go5250",                     NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0326,  "GeForce FX 5500",                       NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0327,  "GeForce FX 5100",                       NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0328,  "GeForce FX Go5200 32M/64M",             NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0329,  "GeForce FX Go5200",                     NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x032A,  "Quadro NVS 280 PCI",                    NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x032B,  "Quadro FX 500/600 PCI",                 NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x032C,  "GeForce FX Go 5300",                    NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x032D,  "GeForce FX Go5100",                     NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x032F,  "NV34GL",                                NV30_TCL_PRIMITIVE_3D|0x0600,  NV_34, 0},
-{0x0330,  "GeForce FX 5900 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0331,  "GeForce FX 5900",                       NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0332,  "GeForce FX 5900XT",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0333,  "GeForce FX 5950 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0334,  "GeForce FX 5900ZT",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0338,  "Quadro FX 3000",                        NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x033F,  "Quadro FX 700",                         NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0341,  "GeForce FX 5700 Ultra",                 NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0342,  "GeForce FX 5700",                       NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0343,  "GeForce FX 5700LE",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0344,  "GeForce FX 5700VE",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0345,  "NV36.5",                                NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0347,  "GeForce FX Go5700",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0348,  "GeForce FX Go5700",                     NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0349,  "NV36M Pro",                             NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x034B,  "NV36MAP",                               NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x034C,  "Quadro FX Go1000",                      NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x034E,  "Quadro FX 1100",                        NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x034F,  "NV36GL",                                NV30_TCL_PRIMITIVE_3D|0x0400,  NV_30, 0},
-{0x0391,  "GeForce 7600 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0392,  "GeForce 7600 GS",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0393,  "GeForce 7300 GT",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x0398,  "GeForce Go 7600",                       NV30_TCL_PRIMITIVE_3D|0x4000,  NV_40, 0},
-{0x03D0,  "GeForce 6100 nForce 430",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x03D1,  "GeForce 6100 nForce 405",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x03D2,  "GeForce 6100 nForce 400",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x03D5,  "GeForce 6100 nForce 420",               NV30_TCL_PRIMITIVE_3D|0x4400,  NV_44, 0},
-{0x0008,  "NV1",                                   0,                             NV_03, 0},
-{0x0009,  "DAC64",                                 0,                             NV_03, 0},
-{0x0018,  "Riva128",                               0,                             NV_03, 0},
-{0x0019,  "Riva128ZX",                             0,                             NV_03, 0},
-{0x0020,  "TNT",                                   NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x0028,  "TNT2",                                  NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x0029,  "UTNT2",                                 NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x002C,  "VTNT2",                                 NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-{0x00A0,  "ITNT2",                                 NV04_DX5_TEXTURED_TRIANGLE,    NV_04, 0},
-};
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c
deleted file mode 100644
index 44392c0267c..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "glheader.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "framebuffer.h"
-
-#include "tnl/tnl.h"
-#include "tnl/t_pipeline.h"
-#include "tnl/t_vp_build.h"
-
-#include "drivers/common/driverfuncs.h"
-
-#include "nouveau_context.h"
-#include "nouveau_driver.h"
-//#include "nouveau_state.h"
-#include "nouveau_span.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_tex.h"
-#include "nouveau_msg.h"
-#include "nouveau_reg.h"
-#include "nouveau_lock.h"
-#include "nouveau_query.h"
-#include "nv04_swtcl.h"
-#include "nv10_swtcl.h"
-
-#include "vblank.h"
-#include "utils.h"
-#include "texmem.h"
-#include "xmlpool.h" /* for symbolic values of enum-type options */
-
-#ifndef NOUVEAU_DEBUG
-int NOUVEAU_DEBUG = 0;
-#endif
-
-static const struct dri_debug_control debug_control[] =
-{
-	{ "shaders"   , DEBUG_SHADERS    },
-	{ "mem"       , DEBUG_MEM        },
-	{ "bufferobj" , DEBUG_BUFFEROBJ  },
-	{ NULL        , 0                }
-};
-
-#define need_GL_ARB_vertex_program
-#define need_GL_ARB_occlusion_query
-#include "extension_helper.h"
-
-const struct dri_extension common_extensions[] =
-{
-	{ NULL,    0 }
-};
-
-const struct dri_extension nv10_extensions[] =
-{
-	{ NULL,    0 }
-};
-
-const struct dri_extension nv20_extensions[] =
-{
-	{ NULL,    0 }
-};
-
-const struct dri_extension nv30_extensions[] =
-{
-	{ "GL_ARB_fragment_program",	NULL                            },
-	{ NULL,    0 }
-};
-
-const struct dri_extension nv40_extensions[] =
-{
-   /* ARB_vp can be moved to nv20/30 once the shader backend has been
-    * written for those cards.
-    */
-	{ "GL_ARB_vertex_program",	GL_ARB_vertex_program_functions },
-	{ "GL_ARB_occlusion_query",	GL_ARB_occlusion_query_functions},
-	{ NULL, 0 }
-};
-
-const struct dri_extension nv50_extensions[] =
-{
-	{ NULL,    0 }
-};
-
-/* Create the device specific context.
- */
-GLboolean nouveauCreateContext( const __GLcontextModes *glVisual,
-		__DRIcontextPrivate *driContextPriv,
-		void *sharedContextPrivate )
-{
-	GLcontext *ctx, *shareCtx;
-	__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
-	struct dd_function_table functions;
-	nouveauContextPtr nmesa;
-	nouveauScreenPtr screen;
-
-	/* Allocate the context */
-	nmesa = (nouveauContextPtr) CALLOC( sizeof(*nmesa) );
-	if ( !nmesa )
-		return GL_FALSE;
-
-	nmesa->driContext = driContextPriv;
-	nmesa->driScreen = sPriv;
-	nmesa->driDrawable = NULL;
-	nmesa->hHWContext = driContextPriv->hHWContext;
-	nmesa->driHwLock = &sPriv->pSAREA->lock;
-	nmesa->driFd = sPriv->fd;
-
-	nmesa->screen = (nouveauScreenPtr)(sPriv->private);
-	screen=nmesa->screen;
-
-	/* Create the hardware context */
-	if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_FB_PHYSICAL,
-		 		&nmesa->vram_phys))
-	   return GL_FALSE;
-	if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_FB_SIZE,
-		 		&nmesa->vram_size))
-	   return GL_FALSE;
-	if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_AGP_PHYSICAL,
-		 		&nmesa->gart_phys))
-	   return GL_FALSE;
-	if (!nouveauDRMGetParam(nmesa, NOUVEAU_GETPARAM_AGP_SIZE,
-		 		&nmesa->gart_size))
-	   return GL_FALSE;
-	if (!nouveauFifoInit(nmesa))
-	   return GL_FALSE;
-	nouveauObjectInit(nmesa);
-
-
-	/* Init default driver functions then plug in our nouveau-specific functions
-	 * (the texture functions are especially important)
-	 */
-	_mesa_init_driver_functions( &functions );
-	nouveauDriverInitFunctions( &functions );
-	nouveauTexInitFunctions( &functions );
-
-	/* Allocate the Mesa context */
-	if (sharedContextPrivate)
-		shareCtx = ((nouveauContextPtr) sharedContextPrivate)->glCtx;
-	else 
-		shareCtx = NULL;
-	nmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
-			&functions, (void *) nmesa);
-	if (!nmesa->glCtx) {
-		FREE(nmesa);
-		return GL_FALSE;
-	}
-	driContextPriv->driverPrivate = nmesa;
-	ctx = nmesa->glCtx;
-
-	/* Parse configuration files */
-	driParseConfigFiles (&nmesa->optionCache, &screen->optionCache,
-			screen->driScreen->myNum, "nouveau");
-
-	nmesa->sarea = (struct drm_nouveau_sarea *)((char *)sPriv->pSAREA +
-			screen->sarea_priv_offset);
-
-	/* Enable any supported extensions */
-	driInitExtensions(ctx, common_extensions, GL_TRUE);
-	if (nmesa->screen->card->type >= NV_10)
-		driInitExtensions(ctx, nv10_extensions, GL_FALSE);
-	if (nmesa->screen->card->type >= NV_20)
-		driInitExtensions(ctx, nv20_extensions, GL_FALSE);
-	if (nmesa->screen->card->type >= NV_30)
-		driInitExtensions(ctx, nv30_extensions, GL_FALSE);
-	if (nmesa->screen->card->type >= NV_40)
-		driInitExtensions(ctx, nv40_extensions, GL_FALSE);
-	if (nmesa->screen->card->type >= NV_50)
-		driInitExtensions(ctx, nv50_extensions, GL_FALSE);
-
-	nmesa->current_primitive = -1;
-
-	nouveauShaderInitFuncs(ctx);
-	/* Install Mesa's fixed-function texenv shader support */
-	if (nmesa->screen->card->type >= NV_40)
-		ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
-
-	/* Initialize the swrast */
-	_swrast_CreateContext( ctx );
-	_vbo_CreateContext( ctx );
-	_tnl_CreateContext( ctx );
-	_swsetup_CreateContext( ctx );
-
-	_math_matrix_ctr(&nmesa->viewport);
-
-	nouveauDDInitStateFuncs( ctx );
-	nouveauSpanInitFunctions( ctx );
-	nouveauDDInitState( nmesa );
-	switch(nmesa->screen->card->type)
-	{
-		case NV_03:
-			//nv03TriInitFunctions( ctx );
-			break;
-		case NV_04:
-		case NV_05:
-			nv04TriInitFunctions( ctx );
-			break;
-		case NV_10:
-		case NV_11:
-		case NV_17:
-		case NV_20:
-		case NV_30:
-		case NV_40:
-		case NV_44:
-		case NV_50:
-		default:
-			nv10TriInitFunctions( ctx );
-			break;
-	}
-
-	nouveauInitBufferObjects(ctx);
-	if (!nouveauSyncInitFuncs(ctx))
-	   return GL_FALSE;
-	nouveauQueryInitFuncs(ctx);
-	nmesa->hw_func.InitCard(nmesa);
-        nouveauInitState(ctx);
-
-	driContextPriv->driverPrivate = (void *)nmesa;
-
-	NOUVEAU_DEBUG = driParseDebugString( getenv( "NOUVEAU_DEBUG" ),
-			debug_control );
-
-	if (driQueryOptionb(&nmesa->optionCache, "no_rast")) {
-		fprintf(stderr, "disabling 3D acceleration\n");
-		FALLBACK(nmesa, NOUVEAU_FALLBACK_DISABLE, 1);
-	}
-
-	return GL_TRUE;
-}
-
-/* Destroy the device specific context. */
-void nouveauDestroyContext( __DRIcontextPrivate *driContextPriv  )
-{
-	nouveauContextPtr nmesa = (nouveauContextPtr) driContextPriv->driverPrivate;
-
-	assert(nmesa);
-	if ( nmesa ) {
-		/* free the option cache */
-		driDestroyOptionCache (&nmesa->optionCache);
-
-		FREE( nmesa );
-	}
-
-}
-
-
-/* Force the context `c' to be the current context and associate with it
- * buffer `b'.
- */
-GLboolean nouveauMakeCurrent( __DRIcontextPrivate *driContextPriv,
-		__DRIdrawablePrivate *driDrawPriv,
-		__DRIdrawablePrivate *driReadPriv )
-{
-	if ( driContextPriv ) {
-		nouveauContextPtr nmesa = (nouveauContextPtr) driContextPriv->driverPrivate;
-		struct gl_framebuffer *draw_fb =
-			(struct gl_framebuffer*)driDrawPriv->driverPrivate;
-		struct gl_framebuffer *read_fb =
-			(struct gl_framebuffer*)driReadPriv->driverPrivate;
-
-		driDrawableInitVBlank(driDrawPriv, nmesa->vblank_flags, &nmesa->vblank_seq );
-		nmesa->driDrawable = driDrawPriv;
-
-		_mesa_resize_framebuffer(nmesa->glCtx, draw_fb,
-					 driDrawPriv->w, driDrawPriv->h);
-		if (draw_fb != read_fb) {
-			_mesa_resize_framebuffer(nmesa->glCtx, draw_fb,
-						 driReadPriv->w,
-						 driReadPriv->h);
-		}
-		_mesa_make_current(nmesa->glCtx, draw_fb, read_fb);
-
-		nouveau_build_framebuffer(nmesa->glCtx,
-		      			  driDrawPriv->driverPrivate);
-	} else {
-		_mesa_make_current( NULL, NULL, NULL );
-	}
-
-	return GL_TRUE;
-}
-
-
-/* Force the context `c' to be unbound from its buffer.
- */
-GLboolean nouveauUnbindContext( __DRIcontextPrivate *driContextPriv )
-{
-	return GL_TRUE;
-}
-
-static void nouveauDoSwapBuffers(nouveauContextPtr nmesa,
-				 __DRIdrawablePrivate *dPriv)
-{
-	struct gl_framebuffer *fb;
-	nouveau_renderbuffer *src, *dst;
-	drm_clip_rect_t *box;
-	int nbox, i;
-
-	fb = (struct gl_framebuffer *)dPriv->driverPrivate;
-	dst = (nouveau_renderbuffer*)
-		fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
-	src = (nouveau_renderbuffer*)
-		fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
-
-#ifdef ALLOW_MULTI_SUBCHANNEL
-	LOCK_HARDWARE(nmesa);
-	nbox = dPriv->numClipRects;
-	box  = dPriv->pClipRects;
-
-	if (nbox) {
-		BEGIN_RING_SIZE(NvSubCtxSurf2D,
-				NV10_CONTEXT_SURFACES_2D_FORMAT, 4);
-		if (src->mesa._ActualFormat == GL_RGBA8)
-			OUT_RING       (6); /* X8R8G8B8 */
-		else
-			OUT_RING       (4); /* R5G6B5 */
-		OUT_RING       ((dst->pitch << 16) | src->pitch);
-		OUT_RING       (src->offset);
-		OUT_RING       (dst->offset);
-	}
-
-	for (i=0; i<nbox; i++, box++) {
-		BEGIN_RING_SIZE(NvSubImageBlit, NV10_IMAGE_BLIT_SET_POINT, 3);
-		OUT_RING       (((box->y1 - dPriv->y) << 16) |
-				(box->x1 - dPriv->x));
-		OUT_RING       ((box->y1 << 16) | box->x1);
-		OUT_RING       (((box->y2 - box->y1) << 16) |
-				(box->x2 - box->x1));
-	}
-	FIRE_RING();
-
-	UNLOCK_HARDWARE(nmesa);
-#endif
-}
-
-void nouveauSwapBuffers(__DRIdrawablePrivate *dPriv)
-{
-	if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
-		nouveauContextPtr nmesa = dPriv->driContextPriv->driverPrivate;
-
-		if (nmesa->glCtx->Visual.doubleBufferMode) {
-			_mesa_notifySwapBuffers(nmesa->glCtx);
-			nouveauDoSwapBuffers(nmesa, dPriv);
-		}
-
-	}
-}
-
-void nouveauCopySubBuffer(__DRIdrawablePrivate *dPriv,
-			  int x, int y, int w, int h)
-{
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h
deleted file mode 100644
index db4d4cb6b71..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.h
+++ /dev/null
@@ -1,239 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NOUVEAU_CONTEXT_H__
-#define __NOUVEAU_CONTEXT_H__
-
-#include "dri_util.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-
-#include "mtypes.h"
-#include "tnl/t_vertex.h"
-
-#include "nouveau_screen.h"
-#include "nouveau_state_cache.h"
-#include "nouveau_buffers.h"
-#include "nouveau_shader.h"
-#include "nouveau_sync.h"
-
-#include "xmlconfig.h"
-
-typedef struct nouveau_fifo_t{
-	int channel;
-	uint32_t* buffer;
-	uint32_t* mmio;
-	uint32_t put_base;
-	uint32_t current;
-	uint32_t put;
-	uint32_t free;
-	uint32_t max;
-}
-nouveau_fifo;
-
-#define TAG(x) nouveau##x
-#include "tnl_dd/t_dd_vertex.h"
-#undef TAG
-
-/* Subpixel offsets for window coordinates (triangles): */
-#define SUBPIXEL_X  (0.0F)
-#define SUBPIXEL_Y  (0.125F)
-
-struct nouveau_context;
-
-typedef void (*nouveau_tri_func)( struct nouveau_context*, 
-		nouveauVertex *,
-		nouveauVertex *,
-		nouveauVertex * );
-
-typedef void (*nouveau_line_func)( struct nouveau_context*, 
-		nouveauVertex *,
-		nouveauVertex * );
-
-typedef void (*nouveau_point_func)( struct nouveau_context*,
-		nouveauVertex * );
-
-typedef struct nouveau_hw_func_t {
-	/* Initialise any card-specific non-GL related state */
-	GLboolean (*InitCard)(struct nouveau_context *);
-	/* Update buffer offset/pitch/format */
-	GLboolean (*BindBuffers)(struct nouveau_context *, int num_color,
-				 nouveau_renderbuffer **color,
-				 nouveau_renderbuffer *depth);
-	/* Update anything that depends on the window position/size */
-	void      (*WindowMoved)(struct nouveau_context *);
-} nouveau_hw_func;
-
-typedef struct nouveau_context {
-	/* Mesa context */
-	GLcontext *glCtx;
-
-	/* The per-context fifo */
-	nouveau_fifo fifo;
-
-	/* The read-only regs */
-	volatile unsigned char* mmio;
-
-	/* The per-channel notifier block */
-	volatile void *notifier_block;
-
-	/* Physical addresses of AGP/VRAM apertures */
-	uint64_t vram_phys;
-	uint64_t vram_size;
-	uint64_t gart_phys;
-	uint64_t gart_size;
-
-	/* Channel synchronisation */
-	struct drm_nouveau_notifier_alloc *syncNotifier;
-
-	/* ARB_occlusion_query / EXT_timer_query */
-	GLuint		  query_object_max;
-	GLboolean *	  query_alloc;
-	struct drm_nouveau_notifier_alloc *queryNotifier;
-
-	/* Additional hw-specific functions */
-	nouveau_hw_func hw_func;
-
-	/* FIXME : do we want to put all state into a separate struct ? */
-	/* State for tris */
-	GLuint color_offset;
-	GLuint specular_offset;
-
-	/* Vertex state */
-	GLuint vertex_size;
-	GLubyte *verts;
-	struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
-	GLuint vertex_attr_count;
-
-	/* Color buffer clear value */
-	uint32_t clear_color_value;
-
-	/* Depth/stencil clear value */
-	uint32_t clear_value;
-
-	/* Light state */
-	GLboolean lighting_enabled;
-	uint32_t enabled_lights;
-
-	/* Cached state */
-	nouveau_state_cache state_cache;
-
-	/* The drawing fallbacks */
-	GLuint Fallback;
-	nouveau_tri_func draw_tri;
-	nouveau_line_func draw_line;
-	nouveau_point_func draw_point;
-
-	/* Cliprects information */
-	GLuint numClipRects;
-	drm_clip_rect_t *pClipRects;
-	drm_clip_rect_t osClipRect;
-	GLuint drawX, drawY, drawW, drawH;
-
-	/* The rendering context information */
-	GLenum current_primitive; /* the current primitive enum */
-	DECLARE_RENDERINPUTS(render_inputs_bitset); /* the current render inputs */
-
-	/* Shader state */
-	nvsFunc VPfunc;
-	nvsFunc FPfunc;
-	nouveauShader *current_fragprog;
-	nouveauShader *current_vertprog;
-	nouveauShader *passthrough_vp;
-	nouveauShader *passthrough_fp;
-
-	nouveauScreenRec *screen;
-	struct drm_nouveau_sarea *sarea;
-
-	__DRIcontextPrivate  *driContext;    /* DRI context */
-	__DRIscreenPrivate   *driScreen;     /* DRI screen */
-	__DRIdrawablePrivate *driDrawable;   /* DRI drawable bound to this ctx */
-	GLint lastStamp;
-
-	drm_context_t hHWContext;
-	drm_hw_lock_t *driHwLock;
-	int driFd;
-
-	/* Configuration cache */
-	driOptionCache optionCache;
-
-	/* vblank stuff */
-	uint32_t vblank_flags;
-	uint32_t vblank_seq;
-
-	GLuint new_state;
-	GLuint new_render_state;
-	GLuint render_index;
-	GLmatrix viewport;
-	GLfloat depth_scale;
-
-}nouveauContextRec, *nouveauContextPtr;
-
-
-#define NOUVEAU_CONTEXT(ctx)		((nouveauContextPtr)(ctx->DriverCtx))
-
-/* Flags for software fallback cases: */
-#define NOUVEAU_FALLBACK_TEXTURE		0x0001
-#define NOUVEAU_FALLBACK_DRAW_BUFFER		0x0002
-#define NOUVEAU_FALLBACK_READ_BUFFER		0x0004
-#define NOUVEAU_FALLBACK_STENCIL		0x0008
-#define NOUVEAU_FALLBACK_RENDER_MODE		0x0010
-#define NOUVEAU_FALLBACK_LOGICOP		0x0020
-#define NOUVEAU_FALLBACK_SEP_SPECULAR		0x0040
-#define NOUVEAU_FALLBACK_BLEND_EQ		0x0080
-#define NOUVEAU_FALLBACK_BLEND_FUNC		0x0100
-#define NOUVEAU_FALLBACK_PROJTEX		0x0200
-#define NOUVEAU_FALLBACK_DISABLE		0x0400
-
-
-extern GLboolean nouveauCreateContext( const __GLcontextModes *glVisual,
-		__DRIcontextPrivate *driContextPriv,
-		void *sharedContextPrivate );
-
-extern void nouveauDestroyContext( __DRIcontextPrivate * );
-
-extern GLboolean nouveauMakeCurrent( __DRIcontextPrivate *driContextPriv,
-		__DRIdrawablePrivate *driDrawPriv,
-		__DRIdrawablePrivate *driReadPriv );
-
-extern GLboolean nouveauUnbindContext( __DRIcontextPrivate *driContextPriv );
-
-extern void nouveauSwapBuffers(__DRIdrawablePrivate *dPriv);
-
-extern void nouveauCopySubBuffer(__DRIdrawablePrivate *dPriv,
-				 int x, int y, int w, int h);
-
-/* Debugging utils: */
-extern int NOUVEAU_DEBUG;
-
-#define DEBUG_SHADERS	0x00000001
-#define DEBUG_MEM	0x00000002
-#define DEBUG_BUFFEROBJ 0x00000004
-
-#endif /* __NOUVEAU_CONTEXT_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_ctrlreg.h b/src/mesa/drivers/dri/nouveau/nouveau_ctrlreg.h
deleted file mode 100644
index c9b2d590077..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_ctrlreg.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin, Sylvain Munaut
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-
-#define NV03_STATUS                                        0x004006b0
-#define NV04_STATUS                                        0x00400700
-
-#define NV03_FIFO_REGS_SIZE                                0x10000
-#    define NV03_FIFO_REGS_DMAPUT                          0x00000040
-#    define NV03_FIFO_REGS_DMAGET                          0x00000044
-
-/* Fifo commands. These are not regs, neither masks */
-#define NV03_FIFO_CMD_JUMP                                 0x20000000
-#define NV03_FIFO_CMD_JUMP_OFFSET_MASK                     0x1ffffffc
-#define NV03_FIFO_CMD_REWIND                               (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
-
-
-#define NONINC_METHOD                                      0x40000000
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_dri.h b/src/mesa/drivers/dri/nouveau/nouveau_dri.h
deleted file mode 100644
index ce3c3fb9cc4..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_dri.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef _NOUVEAU_DRI_
-#define _NOUVEAU_DRI_
-
-#include "xf86drm.h"
-#include "drm.h"
-#include "nouveau_drm.h"
-
-typedef struct {
-	uint32_t device_id;	/**< \brief PCI device ID */
-	uint32_t width;		/**< \brief width in pixels of display */
-	uint32_t height;	/**< \brief height in scanlines of display */
-	uint32_t depth;		/**< \brief depth of display (8, 15, 16, 24) */
-	uint32_t bpp;		/**< \brief bit depth of display (8, 16, 24, 32) */
-
-	uint32_t bus_type;	/**< \brief ths bus type */
-	uint32_t bus_mode;	/**< \brief bus mode (used for AGP, maybe also for PCI-E ?) */
-
-	uint32_t front_offset;	/**< \brief front buffer offset */
-	uint32_t front_pitch;	/**< \brief front buffer pitch */
-	uint32_t back_offset;	/**< \brief private back buffer offset */
-	uint32_t back_pitch;	/**< \brief private back buffer pitch */
-	uint32_t depth_offset;	/**< \brief private depth buffer offset */
-	uint32_t depth_pitch;	/**< \brief private depth buffer pitch */
-
-} NOUVEAUDRIRec, *NOUVEAUDRIPtr;
-
-#endif
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.c b/src/mesa/drivers/dri/nouveau/nouveau_driver.c
deleted file mode 100644
index ddc9535624b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_driver.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-//#include "nouveau_state.h"
-#include "nouveau_lock.h"
-#include "nouveau_fifo.h"
-#include "nouveau_driver.h"
-#include "swrast/swrast.h"
-
-#include "context.h"
-#include "framebuffer.h"
-
-#include "utils.h"
-
-/* Wrapper for DRM_NOUVEAU_GETPARAM ioctl */
-GLboolean nouveauDRMGetParam(nouveauContextPtr nmesa,
-			     unsigned int      param,
-			     uint64_t*         value)
-{
-	struct drm_nouveau_getparam getp;
-
-	getp.param = param;
-	if (!value || drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_GETPARAM,
-					  &getp, sizeof(getp)))
-		return GL_FALSE;
-	*value = getp.value;
-	return GL_TRUE;
-}
-
-/* Wrapper for DRM_NOUVEAU_GETPARAM ioctl */
-GLboolean nouveauDRMSetParam(nouveauContextPtr nmesa,
-			     unsigned int      param,
-			     uint64_t          value)
-{
-	struct drm_nouveau_setparam setp;
-
-	setp.param = param;
-	setp.value = value;
-	if (drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_SETPARAM, &setp,
-				sizeof(setp)))
-		return GL_FALSE;
-	return GL_TRUE;
-}
-
-/* Return the width and height of the current color buffer */
-static void nouveauGetBufferSize( GLframebuffer *buffer,
-		GLuint *width, GLuint *height )
-{
-	GET_CURRENT_CONTEXT(ctx);
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	LOCK_HARDWARE( nmesa );
-	*width  = nmesa->driDrawable->w;
-	*height = nmesa->driDrawable->h;
-	UNLOCK_HARDWARE( nmesa );
-}
-
-/* glGetString */
-static const GLubyte *nouveauGetString( GLcontext *ctx, GLenum name )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	static char buffer[128];
-	const char * card_name = "Unknown";
-	GLuint agp_mode = 0;
-
-	switch ( name ) {
-		case GL_VENDOR:
-			return (GLubyte *)DRIVER_AUTHOR;
-
-		case GL_RENDERER:
-			card_name=nmesa->screen->card->name;
-
-			switch(nmesa->screen->bus_type)
-			{
-				case NV_PCI:
-				case NV_PCIE:
-				default:
-					agp_mode=0;
-					break;
-				case NV_AGP:
-					agp_mode=nmesa->screen->agp_mode;
-					break;
-			}
-			driGetRendererString( buffer, card_name, DRIVER_DATE,
-					agp_mode );
-			return (GLubyte *)buffer;
-		default:
-			return NULL;
-	}
-}
-
-/* glFlush */
-static void nouveauFlush( GLcontext *ctx )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	FIRE_RING();
-}
-
-/* glFinish */
-static void nouveauFinish( GLcontext *ctx )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveauFlush( ctx );
-	nouveauWaitForIdle( nmesa );
-}
-
-/* glClear */
-static void nouveauClear( GLcontext *ctx, GLbitfield mask )
-{
-	// XXX we really should do something here...
-}
-
-void nouveauDriverInitFunctions( struct dd_function_table *functions )
-{
-	functions->GetBufferSize	= nouveauGetBufferSize;
-	functions->ResizeBuffers	= _mesa_resize_framebuffer;
-	functions->GetString		= nouveauGetString;
-	functions->Flush		= nouveauFlush;
-	functions->Finish		= nouveauFinish;
-	functions->Clear		= nouveauClear;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.h b/src/mesa/drivers/dri/nouveau/nouveau_driver.h
deleted file mode 100644
index 6164012b5b7..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_driver.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NOUVEAU_DRIVER_H__
-#define __NOUVEAU_DRIVER_H__
-
-#define DRIVER_DATE	"20060219"
-#define DRIVER_AUTHOR	"Stephane Marchesin"
-
-extern void nouveauDriverInitFunctions( struct dd_function_table *functions );
-extern GLboolean nouveauDRMGetParam(nouveauContextPtr nmesa, unsigned int param,
-      				    uint64_t *value);
-extern GLboolean nouveauDRMSetParam(nouveauContextPtr nmesa, unsigned int param,
-      				    uint64_t value);
-
-#endif /* __NOUVEAU_DRIVER_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
deleted file mode 100644
index 5eb53aa46cb..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#include "vblank.h"
-#include <errno.h>
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
-#include "swrast/swrast.h"
-#include "nouveau_context.h"
-#include "nouveau_msg.h"
-#include "nouveau_fifo.h"
-#include "nouveau_lock.h"
-#include "nouveau_object.h"
-#include "nouveau_sync.h"
-
-#ifdef NOUVEAU_RING_DEBUG
-int nouveau_fifo_remaining=0;
-#endif
-
-
-#define RING_SKIPS 8
-
-void WAIT_RING(nouveauContextPtr nmesa,uint32_t size)
-{
-#ifdef NOUVEAU_RING_DEBUG
-	return;
-#endif
-	uint32_t fifo_get;
-	while(nmesa->fifo.free < size+1) {
-		fifo_get = NV_FIFO_READ_GET();
-
-		if(nmesa->fifo.put >= fifo_get) {
-			nmesa->fifo.free = nmesa->fifo.max - nmesa->fifo.current;
-			if(nmesa->fifo.free < size+1) {
-				OUT_RING(NV03_FIFO_CMD_JUMP | nmesa->fifo.put_base);
-				if(fifo_get <= RING_SKIPS) {
-					if(nmesa->fifo.put <= RING_SKIPS) /* corner case - will be idle */
-						NV_FIFO_WRITE_PUT(RING_SKIPS + 1);
-					do { fifo_get = NV_FIFO_READ_GET(); }
-					while(fifo_get <= RING_SKIPS);
-				}
-				NV_FIFO_WRITE_PUT(RING_SKIPS);
-				nmesa->fifo.current = nmesa->fifo.put = RING_SKIPS;
-				nmesa->fifo.free = fifo_get - (RING_SKIPS + 1);
-			}
-		} else 
-			nmesa->fifo.free = fifo_get - nmesa->fifo.current - 1;
-	}
-}
-
-/* 
- * Wait for the channel to be idle 
- */
-void nouveauWaitForIdleLocked(nouveauContextPtr nmesa)
-{
-	/* Wait for FIFO idle */
-	FIRE_RING();
-	while(RING_AHEAD()>0);
-
-	/* Wait on notifier to indicate all commands in the channel have
-	 * been completed.
-	 */
-	nouveau_notifier_wait_nop(nmesa->glCtx, nmesa->syncNotifier, NvSub3D);
-}
-
-void nouveauWaitForIdle(nouveauContextPtr nmesa)
-{
-	LOCK_HARDWARE(nmesa);
-	nouveauWaitForIdleLocked(nmesa);
-	UNLOCK_HARDWARE(nmesa);
-}
-
-// here we call the fifo initialization ioctl and fill in stuff accordingly
-GLboolean nouveauFifoInit(nouveauContextPtr nmesa)
-{
-	struct drm_nouveau_fifo_alloc fifo_init;
-	int i, ret;
-
-#ifdef NOUVEAU_RING_DEBUG
-	return GL_TRUE;
-#endif
-
-	fifo_init.fb_ctxdma_handle = NvDmaFB;
-	fifo_init.tt_ctxdma_handle = NvDmaTT;
-	ret=drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_FIFO_ALLOC, &fifo_init, sizeof(fifo_init));
-	if (ret) {
-		FATAL("Fifo initialization ioctl failed (returned %d)\n",ret);
-		return GL_FALSE;
-	}
-
-	ret = drmMap(nmesa->driFd, fifo_init.cmdbuf, fifo_init.cmdbuf_size, &nmesa->fifo.buffer);
-	if (ret) {
-		FATAL("Unable to map the fifo (returned %d)\n",ret);
-		return GL_FALSE;
-	}
-
-	ret = drmMap(nmesa->driFd, fifo_init.ctrl, fifo_init.ctrl_size, &nmesa->fifo.mmio);
-	if (ret) {
-		FATAL("Unable to map the control regs (returned %d)\n",ret);
-		return GL_FALSE;
-	}
-
-	ret = drmMap(nmesa->driFd, fifo_init.notifier,
-				   fifo_init.notifier_size,
-				   &nmesa->notifier_block);
-	if (ret) {
-		FATAL("Unable to map the notifier block (returned %d)\n",ret);
-		return GL_FALSE;
-	}
-
-	/* Setup our initial FIFO tracking params */
-	nmesa->fifo.channel  = fifo_init.channel;
-	nmesa->fifo.put_base = fifo_init.put_base;
-	nmesa->fifo.current  = 0;
-	nmesa->fifo.put      = 0;
-	nmesa->fifo.max      = (fifo_init.cmdbuf_size >> 2) - 1;
-	nmesa->fifo.free     = nmesa->fifo.max - nmesa->fifo.current;
-
-	for (i=0; i<RING_SKIPS; i++)
-	   OUT_RING(0);
-	nmesa->fifo.free -= RING_SKIPS;
-
-	MESSAGE("Fifo init ok. Using context %d\n", fifo_init.channel);
-	return GL_TRUE;
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
deleted file mode 100644
index 67f9cd4fc89..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NOUVEAU_FIFO_H__
-#define __NOUVEAU_FIFO_H__
-
-#include "nouveau_context.h"
-#include "nouveau_ctrlreg.h"
-#include "nouveau_state_cache.h"
-
-//#define NOUVEAU_RING_TRACE
-//#define NOUVEAU_RING_DEBUG
-//#define NOUVEAU_STATE_CACHE_DISABLE
-
-#ifndef NOUVEAU_RING_TRACE
-#define NOUVEAU_RING_TRACE 0
-#else
-#undef NOUVEAU_RING_TRACE
-#define NOUVEAU_RING_TRACE 1
-#endif
-
-#define NV_READ(reg) *(volatile uint32_t *)(nmesa->mmio + (reg))
-
-#define NV_FIFO_READ(reg) *(volatile uint32_t *)(nmesa->fifo.mmio + (reg/4))
-#define NV_FIFO_WRITE(reg,value) *(volatile uint32_t *)(nmesa->fifo.mmio + (reg/4)) = value;
-#define NV_FIFO_READ_GET() ((NV_FIFO_READ(NV03_FIFO_REGS_DMAGET) - nmesa->fifo.put_base) >> 2)
-#define NV_FIFO_WRITE_PUT(val) do { \
-	if (NOUVEAU_RING_TRACE) {\
-		printf("FIRE_RING : 0x%08x\n", nmesa->fifo.current << 2); \
-		fflush(stdout); \
-		sleep(1); \
-	} \
-	NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, ((val)<<2) + nmesa->fifo.put_base); \
-} while(0)
-
-/* 
- * Ring/fifo interface
- *
- * - Begin a ring section with BEGIN_RING_SIZE (if you know the full size in advance)
- * - Output stuff to the ring with either OUT_RINGp (outputs a raw mem chunk), OUT_RING (1 uint32_t) or OUT_RINGf (1 float)
- * - RING_AVAILABLE returns the available fifo (in uint32_ts)
- * - RING_AHEAD returns how much ahead of the last submission point we are
- * - FIRE_RING fires whatever we have that wasn't fired before
- * - WAIT_RING waits for size (in uint32_ts) to be available in the fifo
- */
-
-/* Enable for ring debugging.  Prints out writes to the ring buffer
- * but does not actually write to it.
- */
-#ifdef NOUVEAU_RING_DEBUG
-
-extern int nouveau_fifo_remaining;
-
-#define OUT_RINGp(ptr,sz) do {                                                  \
-uint32_t* p=(uint32_t*)(ptr);							\
-int i; printf("OUT_RINGp: (size 0x%x dwords)\n",sz); for(i=0;i<sz;i++) printf(" 0x%08x   %f\n", *(p+i), *((float*)(p+i))); 	\
-nouveau_fifo_remaining-=sz;							\
-}while(0)
-
-#define OUT_RING(n) do {                                                        \
-    printf("OUT_RINGn: 0x%08x (%s)\n", n, __func__);                            \
-    nouveau_fifo_remaining--;							\
-}while(0)
-
-#define OUT_RINGf(n) do {                                                       \
-    printf("OUT_RINGf: %.04f (%s)\n", n, __func__);                             \
-    nouveau_fifo_remaining--;							\
-}while(0)
-
-#define BEGIN_RING_SIZE(subchannel,tag,size) do {					\
-	if (nouveau_fifo_remaining!=0)							\
-		printf("RING ERROR : remaining %d\n",nouveau_fifo_remaining);		\
-	nouveau_state_cache_flush(nmesa);						\
-	if (nmesa->fifo.free <= (size))							\
-		WAIT_RING(nmesa,(size));						\
-	OUT_RING( ((size)<<18) | ((subchannel) << 13) | (tag));				\
-	nmesa->fifo.free -= ((size) + 1);                                               \
-	nouveau_fifo_remaining=size;							\
-}while(0)
-
-#else
-
-#define OUT_RINGp(ptr,sz) do{							\
-	if (NOUVEAU_RING_TRACE) { \
-		uint32_t* p=(uint32_t*)(ptr);							\
-		int i; printf("OUT_RINGp: (size 0x%x dwords) (%s)\n",sz, __func__); for(i=0;i<sz;i++) printf(" [0x%08x] 0x%08x   %f\n", (nmesa->fifo.current+i) << 2, *(p+i), *((float*)(p+i))); 	\
-	} \
-	memcpy(nmesa->fifo.buffer+nmesa->fifo.current,ptr,(sz)*4);		\
-	nmesa->fifo.current+=(sz);						\
-}while(0)
-
-#define OUT_RING(n) do {							\
-if (NOUVEAU_RING_TRACE) \
-    printf("OUT_RINGn: [0x%08x] 0x%08x (%s)\n", nmesa->fifo.current << 2, n, __func__);        \
-nmesa->fifo.buffer[nmesa->fifo.current++]=(n);					\
-}while(0)
-
-#define OUT_RINGf(n) do {							\
-if (NOUVEAU_RING_TRACE) \
-    printf("OUT_RINGf: [0x%08x] %.04f (%s)\n", nmesa->fifo.current << 2, n, __func__);        \
-*((float*)(nmesa->fifo.buffer+nmesa->fifo.current++))=(n);			\
-}while(0)
-
-#define BEGIN_RING_SIZE(subchannel,tag,size) do {					\
-	nouveau_state_cache_flush(nmesa);						\
-	if (nmesa->fifo.free <= (size))							\
-		WAIT_RING(nmesa,(size));						\
-	OUT_RING( ((size)<<18) | ((subchannel) << 13) | (tag));				\
-	nmesa->fifo.free -= ((size) + 1);                                               \
-}while(0)
-
-#endif
-
-extern void WAIT_RING(nouveauContextPtr nmesa,uint32_t size);
-extern void nouveau_state_cache_flush(nouveauContextPtr nmesa);
-extern void nouveau_state_cache_init(nouveauContextPtr nmesa);
-
-#ifdef NOUVEAU_STATE_CACHE_DISABLE
-#define BEGIN_RING_CACHE(subc,tag,size) BEGIN_RING_SIZE((subc), (tag), (size))
-#define OUT_RING_CACHE(n) OUT_RING((n))
-#define OUT_RING_CACHEf(n) OUT_RINGf((n))
-#define OUT_RING_CACHEp(ptr, sz) OUT_RINGp((ptr), (sz))
-#else
-#define BEGIN_RING_CACHE(subchannel,tag,size) do {					\
-	nmesa->state_cache.dirty=1;	 						\
-	nmesa->state_cache.current_pos=((tag)/4);					\
-}while(0)
-
-#define OUT_RING_CACHE(n) do {									\
-	if (nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value!=(n))	{	\
-		nmesa->state_cache.atoms[nmesa->state_cache.current_pos].dirty=1; 		\
-		nmesa->state_cache.hdirty[nmesa->state_cache.current_pos/NOUVEAU_STATE_CACHE_HIER_SIZE]=1; 		\
-		nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value=(n);		\
-	}											\
-	nmesa->state_cache.current_pos++;							\
-}while(0)
-
-#define OUT_RING_CACHEf(n) do {									\
-	if ((*(float*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))!=(n)){	\
-		nmesa->state_cache.atoms[nmesa->state_cache.current_pos].dirty=1;	 	\
-		nmesa->state_cache.hdirty[nmesa->state_cache.current_pos/NOUVEAU_STATE_CACHE_HIER_SIZE]=1; 		\
-		(*(float*)(&nmesa->state_cache.atoms[nmesa->state_cache.current_pos].value))=(n);\
-	}											\
-	nmesa->state_cache.current_pos++;							\
-}while(0)
-
-#define OUT_RING_CACHEp(ptr,sz) do {							\
-uint32_t* p=(uint32_t*)(ptr);								\
-int i; for(i=0;i<sz;i++) OUT_RING_CACHE(*(p+i)); 					\
-}while(0)
-#endif
-
-#define RING_AVAILABLE() (nmesa->fifo.free-1)
-
-#define RING_AHEAD() ((nmesa->fifo.put<=nmesa->fifo.current)?(nmesa->fifo.current-nmesa->fifo.put):nmesa->fifo.max-nmesa->fifo.put+nmesa->fifo.current)
-
-#define FIRE_RING() do {                             \
-	if (nmesa->fifo.current!=nmesa->fifo.put) {  \
-		nmesa->fifo.put=nmesa->fifo.current; \
-		NV_FIFO_WRITE_PUT(nmesa->fifo.put);  \
-	}                                            \
-}while(0)
-
-extern void nouveauWaitForIdle(nouveauContextPtr nmesa);
-extern void nouveauWaitForIdleLocked(nouveauContextPtr nmesa);
-extern GLboolean nouveauFifoInit(nouveauContextPtr nmesa);
-
-#endif /* __NOUVEAU_FIFO_H__ */
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_lock.c b/src/mesa/drivers/dri/nouveau/nouveau_lock.c
deleted file mode 100644
index aa86c9e7838..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_lock.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#include "nouveau_context.h"
-#include "nouveau_lock.h"
-
-#include "drirenderbuffer.h"
-#include "framebuffer.h"
-
-
-/* Update the hardware state.  This is called if another context has
- * grabbed the hardware lock, which includes the X server.  This
- * function also updates the driver's window state after the X server
- * moves, resizes or restacks a window -- the change will be reflected
- * in the drawable position and clip rects.  Since the X server grabs
- * the hardware lock when it changes the window state, this routine will
- * automatically be called after such a change.
- */
-void nouveauGetLock( nouveauContextPtr nmesa, GLuint flags )
-{
-   __DRIdrawablePrivate *dPriv = nmesa->driDrawable;
-   __DRIscreenPrivate *sPriv = nmesa->driScreen;
-   struct drm_nouveau_sarea *sarea = nmesa->sarea;
-
-   drmGetLock( nmesa->driFd, nmesa->hHWContext, flags );
-
-   /* The window might have moved, so we might need to get new clip
-    * rects.
-    *
-    * NOTE: This releases and regrabs the hw lock to allow the X server
-    * to respond to the DRI protocol request for new drawable info.
-    * Since the hardware state depends on having the latest drawable
-    * clip rects, all state checking must be done _after_ this call.
-    */
-   DRI_VALIDATE_DRAWABLE_INFO( sPriv, dPriv );
-
-   /* If timestamps don't match, the window has been changed */
-   if (nmesa->lastStamp != dPriv->lastStamp) {
-      struct gl_framebuffer *fb = (struct gl_framebuffer *)dPriv->driverPrivate;
-
-      /* _mesa_resize_framebuffer will take care of calling the renderbuffer's
-       * AllocStorage function if we need more memory to hold it */
-      if (fb->Width != dPriv->w || fb->Height != dPriv->h) {
-	 _mesa_resize_framebuffer(nmesa->glCtx, fb, dPriv->w, dPriv->h);
-	 /* resize buffers, will call nouveau_window_moved */
-	 nouveau_build_framebuffer(nmesa->glCtx, fb);
-      } else {
-	 nouveau_window_moved(nmesa->glCtx);
-      }
-
-      nmesa->lastStamp = dPriv->lastStamp;
-   }
-
-   nmesa->numClipRects = dPriv->numClipRects;
-   nmesa->pClipRects = dPriv->pClipRects;
-
-}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_lock.h b/src/mesa/drivers/dri/nouveau/nouveau_lock.h
deleted file mode 100644
index 38bb0014258..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_lock.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef __NOUVEAU_LOCK_H__
-#define __NOUVEAU_LOCK_H__
-
-#include "nouveau_context.h"
-
-extern void nouveauGetLock( nouveauContextPtr nmesa, GLuint flags );
-
-/*
- * !!! We may want to separate locks from locks with validation.  This
- * could be used to improve performance for those things commands that
- * do not do any drawing !!!
- */
-
-/* Lock the hardware and validate our state.
- */
-#define LOCK_HARDWARE( nmesa )						\
-   do {									\
-      char __ret = 0;							\
-      DEBUG_CHECK_LOCK();						\
-      DRM_CAS( nmesa->driHwLock, nmesa->hHWContext,			\
-	       (DRM_LOCK_HELD | nmesa->hHWContext), __ret );		\
-      if ( __ret )							\
-	 nouveauGetLock( nmesa, 0 );					\
-      DEBUG_LOCK();							\
-   } while (0)
-
-/* Unlock the hardware.
- */
-#define UNLOCK_HARDWARE( nmesa )					\
-   do {									\
-      DRM_UNLOCK( nmesa->driFd,						\
-		  nmesa->driHwLock,					\
-		  nmesa->hHWContext );					\
-      DEBUG_RESET();							\
-   } while (0)
-
-#define DEBUG_LOCK()
-#define DEBUG_RESET()
-#define DEBUG_CHECK_LOCK()
-
-
-#endif /* __NOUVEAU_LOCK_H__ */
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_msg.h b/src/mesa/drivers/dri/nouveau/nouveau_msg.h
deleted file mode 100644
index 5dea2189c72..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_msg.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
-Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
-Copyright 2006 Stephane Marchesin. All Rights Reserved
-
-The Weather Channel (TM) funded Tungsten Graphics to develop the
-initial release of the Radeon 8500 driver under the XFree86 license.
-This notice must be preserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- *   Keith Whitwell <keith@tungstengraphics.com>
- *   Nicolai Haehnle <prefect_@gmx.net>
- */
-
-
-#ifndef __NOUVEAU_MSG_H__
-#define __NOUVEAU_MSG_H__
-
-#define WARN_ONCE(a, ...) do {\
-	        static int warn##__LINE__=1;\
-	        if(warn##__LINE__){\
-			                fprintf(stderr, "*********************************WARN_ONCE*********************************\n");\
-			                fprintf(stderr, "File %s function %s line %d\n", __FILE__, __FUNCTION__, __LINE__);\
-			                fprintf(stderr,  a, ## __VA_ARGS__);\
-			                fprintf(stderr, "***************************************************************************\n");\
-			                warn##__LINE__=0;\
-			                } \
-	        }while(0)
-
-#define MESSAGE(a, ...) do{\
-	                fprintf(stderr, "************************************INFO***********************************\n");\
-	                fprintf(stderr, "File %s function %s line %d\n", __FILE__, __FUNCTION__, __LINE__); \
-	                fprintf(stderr,  a, ## __VA_ARGS__);\
-	                fprintf(stderr, "***************************************************************************\n");\
-	        }while(0)
-
-#define FATAL(a, ...) do{\
-	                fprintf(stderr, "***********************************FATAL***********************************\n");\
-	                fprintf(stderr, "File %s function %s line %d\n", __FILE__, __FUNCTION__, __LINE__); \
-	                fprintf(stderr,  a, ## __VA_ARGS__);\
-	                fprintf(stderr, "***************************************************************************\n");\
-	        }while(0)
-
-#endif /* __NOUVEAU_MSG_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_object.c b/src/mesa/drivers/dri/nouveau/nouveau_object.c
deleted file mode 100644
index a143488e8d5..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_object.c
+++ /dev/null
@@ -1,67 +0,0 @@
-
-#include "nouveau_fifo.h"
-#include "nouveau_object.h"
-#include "nouveau_reg.h"
-
-
-GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa,
-				     uint32_t handle, int class)
-{
-	struct drm_nouveau_grobj_alloc cto;
-	int ret;
-
-	cto.channel = nmesa->fifo.channel;
-	cto.handle  = handle;
-	cto.class   = class;
-	ret = drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_GROBJ_ALLOC,
-			      &cto, sizeof(cto));
-
-	return ret == 0;
-}
-
-void nouveauObjectOnSubchannel(nouveauContextPtr nmesa, int subchannel, int handle)
-{
-	BEGIN_RING_SIZE(subchannel, 0, 1);
-	OUT_RING(handle);
-}
-
-void nouveauObjectInit(nouveauContextPtr nmesa)
-{
-#ifdef NOUVEAU_RING_DEBUG
-	return;
-#endif
-
-	nouveauCreateContextObject(nmesa, Nv3D, nmesa->screen->card->class_3d);
-	if (nmesa->screen->card->type>=NV_10) {
-		nouveauCreateContextObject(nmesa, NvCtxSurf2D, NV10_CONTEXT_SURFACES_2D);
-	} else {
-		nouveauCreateContextObject(nmesa, NvCtxSurf2D, NV04_CONTEXT_SURFACES_2D);
-		nouveauCreateContextObject(nmesa, NvCtxSurf3D, NV04_CONTEXT_SURFACES_3D);
-	}
-	if (nmesa->screen->card->type>=NV_11) {
-		nouveauCreateContextObject(nmesa, NvImageBlit, NV10_IMAGE_BLIT);
-	} else {
-		nouveauCreateContextObject(nmesa, NvImageBlit, NV_IMAGE_BLIT);
-	}
-	nouveauCreateContextObject(nmesa, NvMemFormat, NV_MEMORY_TO_MEMORY_FORMAT);
-
-#ifdef ALLOW_MULTI_SUBCHANNEL
-	nouveauObjectOnSubchannel(nmesa, NvSubCtxSurf2D, NvCtxSurf2D);
-	BEGIN_RING_SIZE(NvSubCtxSurf2D, NV10_CONTEXT_SURFACES_2D_SET_DMA_IN_MEMORY0, 2);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-
-	nouveauObjectOnSubchannel(nmesa, NvSubImageBlit, NvImageBlit);
-	BEGIN_RING_SIZE(NvSubImageBlit, NV10_IMAGE_BLIT_SET_CONTEXT_SURFACES_2D, 1);
-	OUT_RING(NvCtxSurf2D);
-	BEGIN_RING_SIZE(NvSubImageBlit, NV10_IMAGE_BLIT_SET_OPERATION, 1);
-	OUT_RING(3); /* SRCCOPY */
-
-	nouveauObjectOnSubchannel(nmesa, NvSubMemFormat, NvMemFormat);
-#endif
-
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-}
-
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_object.h b/src/mesa/drivers/dri/nouveau/nouveau_object.h
deleted file mode 100644
index 8c72d014daa..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_object.h
+++ /dev/null
@@ -1,35 +0,0 @@
-#ifndef __NOUVEAU_OBJECT_H__
-#define __NOUVEAU_OBJECT_H__
-
-#include "nouveau_context.h"
-
-#define ALLOW_MULTI_SUBCHANNEL
-
-void nouveauObjectInit(nouveauContextPtr nmesa);
-
-enum DMAObjects {
-	Nv3D                    = 0x80000019,
-	NvCtxSurf2D		= 0x80000020,
-	NvImageBlit		= 0x80000021,
-	NvMemFormat		= 0x80000022,
-	NvCtxSurf3D		= 0x80000023,
-	NvDmaFB			= 0xD0FB0001,
-	NvDmaTT			= 0xD0AA0001,
-	NvSyncNotify		= 0xD0000001,
-	NvQueryNotify		= 0xD0000002
-};
-
-enum DMASubchannel {
-	NvSubCtxSurf2D	= 0,
-	NvSubImageBlit	= 1,
-	NvSubMemFormat	= 2,
-	NvSubCtxSurf3D	= 3,
-	NvSub3D		= 7,
-};
-
-extern void nouveauObjectOnSubchannel(nouveauContextPtr nmesa, int subchannel, int handle);
-
-extern GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa,
-      					    uint32_t handle, int class);
-
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_query.c b/src/mesa/drivers/dri/nouveau/nouveau_query.c
deleted file mode 100644
index 01541400690..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_query.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Copyright (C) 2007 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/* GL_ARB_occlusion_query support for NV20/30/40 */
-
-#include "mtypes.h"
-
-#include "nouveau_fifo.h"
-#include "nouveau_msg.h"
-#include "nouveau_object.h"
-#include "nouveau_reg.h"
-#include "nouveau_sync.h"
-#include "nouveau_query.h"
-
-static struct gl_query_object *
-nouveauNewQueryObject(GLcontext *ctx, GLuint id)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_query_object *nq;
-	int i;
-
-	for (i=0; i<nmesa->query_object_max; i++)
-		if (nmesa->query_alloc[i] == GL_FALSE)
-			break;
-	if (i==nmesa->query_object_max)
-		return NULL;
-
-	nq = CALLOC_STRUCT(nouveau_query_object_t);
-	if (nq) {
-		nq->notifier_id	= i;
-
-		nq->mesa.Id     = id;
-		nq->mesa.Result = 0;
-		nq->mesa.Active = GL_FALSE;
-		nq->mesa.Ready  = GL_TRUE;
-	}
-
-	return (struct gl_query_object *)nq;
-}
-
-static void
-nouveauBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_query_object *nq = (nouveau_query_object *)q;
-
-	nouveau_notifier_reset(ctx, nmesa->queryNotifier, nq->notifier_id);
-
-	switch (nmesa->screen->card->type) {
-	case NV_20:
-		BEGIN_RING_CACHE(NvSub3D, 0x17c8, 1);
-		OUT_RING_CACHE  (1);
-		BEGIN_RING_CACHE(NvSub3D, 0x17cc, 1);
-		OUT_RING_CACHE  (1);
-		break;
-	case NV_30:
-	case NV_40:
-	case NV_44:
-		/* I don't think this is OCC_QUERY enable, but it *is* needed to make
-		 * the SET_OBJECT7 notifier block work with STORE_RESULT.
-		 *
-		 * Also, this appears to reset the pixel pass counter */
-		BEGIN_RING_SIZE(NvSub3D,
-				 NV30_TCL_PRIMITIVE_3D_OCC_QUERY_OR_COLOR_BUFF_ENABLE,
-				 1);
-		OUT_RING        (1);
-		/* Probably OCC_QUERY_ENABLE */
-		BEGIN_RING_CACHE(NvSub3D, 0x17cc, 1);
-		OUT_RING_CACHE  (1);
-		break;
-	default:
-		WARN_ONCE("no support for this card\n");
-		break;
-	}
-}
-
-static void
-nouveauUpdateQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_query_object *nq = (nouveau_query_object *)q;
-	int status;
-
-	status = nouveau_notifier_status(ctx, nmesa->queryNotifier,
-					 nq->notifier_id);
-
-	q->Ready = (status == NV_NOTIFY_STATE_STATUS_COMPLETED);
-	if (q->Ready)
-		q->Result = nouveau_notifier_return_val(ctx,
-							nmesa->queryNotifier,
-							nq->notifier_id);
-}
-
-static void
-nouveauWaitQueryResult(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nouveau_query_object *nq = (nouveau_query_object *)q;
-
-	nouveau_notifier_wait_status(ctx, nmesa->queryNotifier, nq->notifier_id,
-				     NV_NOTIFY_STATE_STATUS_COMPLETED, 0);
-	nouveauUpdateQuery(ctx, target, q);
-}
-
-static void
-nouveauEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
-{
-	nouveau_query_object *nq = (nouveau_query_object *)q;
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	switch (nmesa->screen->card->type) {
-	case NV_20:
-		BEGIN_RING_SIZE(NvSub3D, 0x17d0, 1);
-		OUT_RING       (0x01000000 | nq->notifier_id*32);
-		break;
-	case NV_30:
-	case NV_40:
-	case NV_44:
-		BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STORE_RESULT, 1);
-		OUT_RING       (0x01000000 | nq->notifier_id*32);
-		break;
-	default:
-		WARN_ONCE("no support for this card\n");
-		break;
-	}
-	FIRE_RING();
-
-	/*XXX: wait for query to complete, mesa doesn't give the driver
-	 *     an interface to query the status of a query object so 
-	 *     this has to stall the channel.
-	 */
-	nouveauWaitQueryResult(ctx, target, q);
-
-	BEGIN_RING_CACHE(NvSub3D, 0x17cc, 1);
-	OUT_RING_CACHE  (0);
-}
-
-void
-nouveauQueryInitFuncs(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (nmesa->screen->card->type < NV_20)
-		return;
-
-	nmesa->query_object_max = (0x4000 / 32);
-	nmesa->queryNotifier =
-		nouveau_notifier_new(ctx, NvQueryNotify,
-					  nmesa->query_object_max);
-	nmesa->query_alloc = calloc(nmesa->query_object_max, sizeof(GLboolean));
-
-	switch (nmesa->screen->card->type) {
-	case NV_20:
-		BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SET_OBJECT8, 1);
-		OUT_RING_CACHE  (NvQueryNotify);
-		break;
-	case NV_30:
-	case NV_40:
-	case NV_44:
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT7, 1);
-		OUT_RING_CACHE  (NvQueryNotify);
-		break;
-	default:
-		break;
-	};
-
-	ctx->Driver.NewQueryObject	= nouveauNewQueryObject;
-	ctx->Driver.BeginQuery		= nouveauBeginQuery;
-	ctx->Driver.EndQuery		= nouveauEndQuery;
-#if 0
-	ctx->Driver.UpdateQuery		= nouveauUpdateQuery;
-	ctx->Driver.WaitQueryResult	= nouveauWaitQueryResult;
-#endif
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_reg.h b/src/mesa/drivers/dri/nouveau/nouveau_reg.h
deleted file mode 100644
index 8758b538c85..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_reg.h
+++ /dev/null
@@ -1,1505 +0,0 @@
-/*
-   Autogenerated file, do not edit !
-
-**************************************************************************
-
-   Copyright (C) 2006 :
-   Dmitry Baryshkov,
-   Laurent Carlier,
-   Matthieu Castet,
-   Dawid Gajownik,
-   Jeremy Kolb,
-   Stephane Loeuillet,
-   Patrice Mandin,
-   Stephane Marchesin,
-   Serge Martin,
-   Sylvain Munaut,
-   Ben Skeggs,
-   Erik Waling,
-   koala_br,
-   sturmflut.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************
-
-   Created from objects.c rev. 1.398
-*/
-
-#ifndef _NOUVEAU_REG_H
-#define _NOUVEAU_REG_H
-
-/****************************************** 
-Object NV01_CONTEXT_CLIP_RECTANGLE used on: NV03 NV04 NV10 NV15 NV20 NV40 G70
-*/
-#define			NV01_CONTEXT_CLIP_RECTANGLE				0x00000019
-#	define		NV01_CONTEXT_CLIP_RECTANGLE_SET_POINT			0x00000300	/* Parameters: x y */
-#	define		NV01_CONTEXT_CLIP_RECTANGLE_SET_SIZE			0x00000304	/* Parameters: width height */
-
-/****************************************** 
-Object NV_MEMORY_TO_MEMORY_FORMAT used on: NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV_MEMORY_TO_MEMORY_FORMAT				0x00000039
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_NOP				0x00000100
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY			0x00000104
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY			0x00000180
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_OBJECT_IN			0x00000184
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_OBJECT_OUT			0x00000188
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN			0x0000030c
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT			0x00000310
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_PITCH_IN			0x00000314
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT			0x00000318
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN		0x0000031c
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT			0x00000320
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_FORMAT			0x00000324	/* Parameters: src_inc dst_inc */
-#	define		NV_MEMORY_TO_MEMORY_FORMAT_BUF_NOTIFY			0x00000328
-
-/****************************************** 
-Object NV03_PRIMITIVE_RASTER_OP used on: NV03 NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV03_PRIMITIVE_RASTER_OP				0x00000043
-#	define		NV03_PRIMITIVE_RASTER_OP_NOTIFY				0x00000100
-#	define		NV03_PRIMITIVE_RASTER_OP_DMA_NOTIFY			0x00000180
-#	define		NV03_PRIMITIVE_RASTER_OP_LOGIC_OP			0x00000300	/* Parameters: logic_op */
-
-/****************************************** 
-Object NV04_GDI_RECTANGLE_TEXT used on: NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV04_GDI_RECTANGLE_TEXT					0x0000004a
-#	define		NV04_GDI_RECTANGLE_TEXT_SET_DMA_NOTIFY			0x00000180
-#	define		NV04_GDI_RECTANGLE_TEXT_PATTERN				0x00000188
-#	define		NV04_GDI_RECTANGLE_TEXT_ROP5				0x0000018c
-#	define		NV04_GDI_RECTANGLE_TEXT_SURFACE				0x00000198
-#	define		NV04_GDI_RECTANGLE_TEXT_OPERATION			0x000002fc
-#	define		NV04_GDI_RECTANGLE_TEXT_FORMAT				0x00000300
-#	define		NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL1_TL			0x000005f4	/* Parameters: left top */
-#	define		NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL1_BR			0x000005f8	/* Parameters: right bottom */
-#	define		NV04_GDI_RECTANGLE_TEXT_FILL_VALUE			0x000005fc
-#	define		NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL2_TL			0x00000600	/* Parameters: left top */
-#	define		NV04_GDI_RECTANGLE_TEXT_BLOCK_LEVEL2_BR			0x00000604	/* Parameters: right bottom */
-
-/****************************************** 
-Object NV04_SWIZZLED_SURFACE used on: NV04 NV10 NV15 
-*/
-#define			NV04_SWIZZLED_SURFACE					0x00000052
-#	define		NV04_SWIZZLED_SURFACE_DMA_NOTIFY			0x00000180
-#	define		NV04_SWIZZLED_SURFACE_DMA_IMAGE				0x00000184
-#	define		NV04_SWIZZLED_SURFACE_FORMAT				0x00000300	/* Parameters: log2(height) log2(width) color */
-#	define		NV04_SWIZZLED_SURFACE_OFFSET				0x00000304
-
-/****************************************** 
-Object NV04_CONTEXT_SURFACES_3D used on: NV04 
-*/
-#define			NV04_CONTEXT_SURFACES_3D				0x00000053
-#	define		NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY			0x00000180
-#	define		NV04_CONTEXT_SURFACES_3D_DMA_COLOR			0x00000184
-#	define		NV04_CONTEXT_SURFACES_3D_DMA_ZETA			0x00000188
-#	define		NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL		0x000002f8	/* Parameters: x width */
-#	define		NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL			0x000002fc	/* Parameters: y height */
-#	define		NV04_CONTEXT_SURFACES_3D_FORMAT				0x00000300	/* Parameters: color type width height */
-#	define		NV04_CONTEXT_SURFACES_3D_CLIP_SIZE			0x00000304	/* Parameters: width height */
-#	define		NV04_CONTEXT_SURFACES_3D_PITCH				0x00000308	/* Parameters: color zeta */
-#	define		NV04_CONTEXT_SURFACES_3D_OFFSET_COLOR			0x0000030c
-#	define		NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA			0x00000310
-
-/****************************************** 
-Object NV04_DX5_TEXTURED_TRIANGLE used on: NV04 
-*/
-#define			NV04_DX5_TEXTURED_TRIANGLE				0x00000054
-#	define		NV04_DX5_TEXTURED_TRIANGLE_NOP				0x00000100
-#	define		NV04_DX5_TEXTURED_TRIANGLE_NOTIFY			0x00000104
-#	define		NV04_DX5_TEXTURED_TRIANGLE_DMA_NOTIFY			0x00000180
-#	define		NV04_DX5_TEXTURED_TRIANGLE_DMA_1			0x00000184
-#	define		NV04_DX5_TEXTURED_TRIANGLE_DMA_2			0x00000188
-#	define		NV04_DX5_TEXTURED_TRIANGLE_SURFACE			0x0000018c
-#	define		NV04_DX5_TEXTURED_TRIANGLE_COLOR_KEY			0x00000300
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TEXTURE_OFFSET		0x00000304
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TEXTURE_FORMAT		0x00000308	/* Parameters: color mipmaps log(u) log(v) wrap_s wrap_t */
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TEXTURE_FILTER		0x0000030c	/* Parameters: magfilter minfilter lodbias */
-#	define		NV04_DX5_TEXTURED_TRIANGLE_BLEND			0x00000310	/* Parameters: texture benable dst src */
-#	define		NV04_DX5_TEXTURED_TRIANGLE_CONTROL			0x00000314	/* Parameters: alpharef alphafunc alphaenable zenable zwrite zfunc cullmode */
-#	define		NV04_DX5_TEXTURED_TRIANGLE_FOG_COLOR			0x00000318
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX( d)		(0x00000400 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SY( d)		(0x00000404 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SZ( d)		(0x00000408 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_INV_W( d)			(0x0000040c + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_COLOR( d)			(0x00000410 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_SPECULAR( d)			(0x00000414 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TEXTURE_S( d)		(0x00000418 + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_TEXTURE_T( d)		(0x0000041c + d * 0x0020)
-#	define		NV04_DX5_TEXTURED_TRIANGLE_DRAW				0x00000600	/* Parameters: v0 v1 v2 v3 v4 v5 */
-
-/****************************************** 
-Object NV04_DX6_MULTITEX_TRIANGLE used on: NV04 NV10 NV15 
-*/
-#define			NV04_DX6_MULTITEX_TRIANGLE				0x00000055
-#	define		NV04_DX6_MULTITEX_TRIANGLE_NOP				0x00000100
-#	define		NV04_DX6_MULTITEX_TRIANGLE_NOTIFY			0x00000104
-#	define		NV04_DX6_MULTITEX_TRIANGLE_DMA_NOTIFY			0x00000180
-#	define		NV04_DX6_MULTITEX_TRIANGLE_DMA_1			0x00000184
-#	define		NV04_DX6_MULTITEX_TRIANGLE_DMA_2			0x00000188
-#	define		NV04_DX6_MULTITEX_TRIANGLE_SURFACE			0x0000018c
-#	define		NV04_DX6_MULTITEX_TRIANGLE_OFFSET0			0x00000308
-#	define		NV04_DX6_MULTITEX_TRIANGLE_OFFSET1			0x0000030c
-#	define		NV04_DX6_MULTITEX_TRIANGLE_FORMAT0			0x00000310	/* Parameters: color mipmaps log(u) log(v) wrap_s wrap_t */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_FORMAT1			0x00000314	/* Parameters: color mipmaps log(u) log(v) wrap_s wrap_t */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_FILTER0			0x00000318	/* Parameters: magfilter minfilter lodbias */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_FILTER1			0x0000031c	/* Parameters: magfilter minfilter lodbias */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_ALPHA		0x00000320
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COMBINE_0_COLOR		0x00000324
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_ALPHA		0x0000032c
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COMBINE_1_COLOR		0x00000330
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COMBINE_FACTOR		0x00000334
-#	define		NV04_DX6_MULTITEX_TRIANGLE_BLEND			0x00000338	/* Parameters: benable dst src */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_CONTROL0			0x0000033c	/* Parameters: red_write green_write blue_write alpha_write alpha_write stencil_write alpharef alphafunc alphaenable zenable zwrite zfunc cullmode */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_CONTROL1			0x00000340	/* Parameters: stencil_enable stencil_mask_write stencil_mask_read stencilref stencilfunc */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_CONTROL2			0x00000344	/* Parameters: stencil_fail stencil_zfail stencil_zpass */
-#	define		NV04_DX6_MULTITEX_TRIANGLE_FOG_COLOR			0x00000348
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TLVERTEX_SX( d)		(0x00000400 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TLVERTEX_SY( d)		(0x00000404 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TLVERTEX_SZ( d)		(0x00000408 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_INV_W( d)			(0x0000040c + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_COLOR( d)			(0x00000410 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_SPECULAR( d)			(0x00000414 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TEXTURE0_S( d)		(0x00000418 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TEXTURE0_T( d)		(0x0000041c + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TEXTURE1_S( d)		(0x00000420 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_TEXTURE1_T( d)		(0x00000424 + d * 0x0028)
-#	define		NV04_DX6_MULTITEX_TRIANGLE_DRAW				0x00000540	/* Parameters: v0 v1 v2 v3 v4 v5 */
-
-/****************************************** 
-Object NV04_COLOR_KEY used on: NV04 NV10 NV15 NV20 NV40 
-*/
-#define			NV04_COLOR_KEY						0x00000057
-#	define		NV04_COLOR_KEY_SET_DMA_NOTIFY				0x00000180
-#	define		NV04_COLOR_KEY_FORMAT					0x00000300
-#	define		NV04_COLOR_KEY_VALUE					0x00000304
-
-/****************************************** 
-Object NV04_SOLID_LINE used on: NV04 
-*/
-#define			NV04_SOLID_LINE						0x0000005c
-#	define		NV04_SOLID_LINE_CLIP_RECTANGLE				0x00000184
-#	define		NV04_SOLID_LINE_PATTERN					0x00000188
-#	define		NV04_SOLID_LINE_ROP					0x0000018c
-#	define		NV04_SOLID_LINE_SURFACE					0x00000198
-#	define		NV04_SOLID_LINE_OPERATION				0x000002fc
-#	define		NV04_SOLID_LINE_COLOR_FORMAT				0x00000300
-#	define		NV04_SOLID_LINE_COLOR_VALUE				0x00000304
-#	define		NV04_SOLID_LINE_START					0x00000400	/* Parameters: x y */
-#	define		NV04_SOLID_LINE_END					0x00000400	/* Parameters: x y */
-
-/****************************************** 
-Object NV04_UNK005E used on: NV04 
-*/
-#define			NV04_UNK005E						0x0000005e
-#	define		NV04_UNK005E_SET_SURFACE				0x00000198
-#	define		NV04_UNK005E_UNK02fc					0x000002fc
-#	define		NV04_UNK005E_UNK0300					0x00000300
-#	define		NV04_UNK005E_COUNTER					0x00000304
-
-/****************************************** 
-Object NV05_SCALED_IMAGE_FROM_MEMORY used on: NV04 
-*/
-#define			NV05_SCALED_IMAGE_FROM_MEMORY				0x00000063
-#	define		NV05_SCALED_IMAGE_FROM_MEMORY_SURFACE			0x00000198
-#	define		NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION		0x000002fc
-#	define		NV05_SCALED_IMAGE_FROM_MEMORY_OPERATION			0x00000304
-
-/****************************************** 
-Object NV04_SCALED_IMAGE_FROM_MEMORY used on: NV04 
-*/
-#define			NV04_SCALED_IMAGE_FROM_MEMORY				0x00000077
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY		0x00000180
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE			0x00000184
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE			0x00000198
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT		0x00000300
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_OPERATION			0x00000304
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_POS			0x00000308	/* Parameters: x y */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE			0x0000030c	/* Parameters: width height */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_OUT_POS			0x00000310	/* Parameters: x y */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE			0x00000314	/* Parameters: width height */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_DU_DX			0x00000318	/* Parameters: int frac*0x100000 */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_DV_DY			0x0000031c	/* Parameters: int frac*0x100000 */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_SIZE			0x00000400	/* Parameters: width height */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_FORMAT			0x00000404	/* Parameters: pitch origin filter */
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_OFFSET			0x00000408
-#	define		NV04_SCALED_IMAGE_FROM_MEMORY_POINT			0x0000040c	/* Parameters: u_int u_frac*0x10 v_int v_frac*0x10 */
-
-/****************************************** 
-Object NV_IMAGE_FROM_CPU used on: NV04 
-*/
-#define			NV_IMAGE_FROM_CPU					0x00000061
-#	define		NV_IMAGE_FROM_CPU_DMA_NOTIFY				0x00000180
-#	define		NV_IMAGE_FROM_CPU_CLIP_RECTANGLE			0x00000188
-#	define		NV_IMAGE_FROM_CPU_PATTERN				0x0000018c
-#	define		NV_IMAGE_FROM_CPU_ROP					0x00000190
-#	define		NV_IMAGE_FROM_CPU_SURFACE				0x0000019c
-#	define		NV_IMAGE_FROM_CPU_OPERATION				0x000002fc
-#	define		NV_IMAGE_FROM_CPU_FORMAT				0x00000300
-
-/****************************************** 
-Object NV05_IMAGE_FROM_CPU used on: NV04 
-*/
-#define			NV05_IMAGE_FROM_CPU					0x00000065
-#	define		NV05_IMAGE_FROM_CPU_DMA_NOTIFY				0x00000180
-#	define		NV05_IMAGE_FROM_CPU_CLIP_RECTANGLE			0x00000188
-#	define		NV05_IMAGE_FROM_CPU_PATTERN				0x0000018c
-#	define		NV05_IMAGE_FROM_CPU_ROP					0x00000190
-#	define		NV05_IMAGE_FROM_CPU_SURFACE				0x0000019c
-#	define		NV05_IMAGE_FROM_CPU_OPERATION				0x000002fc
-#	define		NV05_IMAGE_FROM_CPU_FORMAT				0x00000300
-#	define		NV05_IMAGE_FROM_CPU_POINT				0x00000304	/* Parameters: x y */
-#	define		NV05_IMAGE_FROM_CPU_SIZE_OUT				0x00000308	/* Parameters: x y */
-#	define		NV05_IMAGE_FROM_CPU_SIZE_IN				0x0000030c	/* Parameters: x y */
-#	define		NV05_IMAGE_FROM_CPU_COLOR( d)				(0x00000400 + d * 0x0004)
-
-/****************************************** 
-Object NV_IMAGE_BLIT used on: NV04 NV10 NV15 NV20 NV40 
-*/
-#define			NV_IMAGE_BLIT						0x0000005f
-#	define		NV_IMAGE_BLIT_DMA_NOTIFY				0x00000180
-#	define		NV_IMAGE_BLIT_COLOR_KEY					0x00000184
-#	define		NV_IMAGE_BLIT_CLIP_RECTANGLE				0x00000188
-#	define		NV_IMAGE_BLIT_PATTERN					0x0000018c
-#	define		NV_IMAGE_BLIT_ROP5					0x00000190
-#	define		NV_IMAGE_BLIT_SURFACE					0x0000019c
-#	define		NV_IMAGE_BLIT_OPERATION					0x000002fc
-#	define		NV_IMAGE_BLIT_POINT_IN					0x00000300	/* Parameters: x y */
-#	define		NV_IMAGE_BLIT_POINT_OUT					0x00000304	/* Parameters: x y */
-#	define		NV_IMAGE_BLIT_SIZE					0x00000308	/* Parameters: width height */
-
-/****************************************** 
-Object NV10_TCL_PRIMITIVE_3D used on: NV10 
-*/
-#define			NV10_TCL_PRIMITIVE_3D					0x00000056
-
-/****************************************** 
-Object NV17_TCL_PRIMITIVE_3D used on: NV15 
-*/
-#define			NV17_TCL_PRIMITIVE_3D					0x00000099
-
-/****************************************** 
-Object NV11_TCL_PRIMITIVE_3D used on: NV15 
-*/
-#define			NV11_TCL_PRIMITIVE_3D					0x00000096
-#	define		NV10_TCL_PRIMITIVE_3D_NOP				0x00000100
-#	define		NV10_TCL_PRIMITIVE_3D_NOTIFY				0x00000104
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DMA_NOTIFY			0x00000180
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY0		0x00000184
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY1		0x00000188
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DISPLAY_LIST			0x0000018c
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY2		0x00000194
-#	define		NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY3		0x00000198
-#	define		NV17_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY4		0x000001ac
-#	define		NV17_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY5		0x000001b0
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ			0x00000200	/* Parameters: width x */
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_VERT			0x00000204	/* Parameters: height y */
-#	define		NV10_TCL_PRIMITIVE_3D_BUFFER_FORMAT			0x00000208	/* Parameters: type color */
-#	define		NV10_TCL_PRIMITIVE_3D_BUFFER_PITCH			0x0000020c	/* Parameters: depth/stencil buffer pitch color buffer pitch */
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_OFFSET			0x00000210
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_OFFSET			0x00000214
-#	define		NV10_TCL_PRIMITIVE_3D_TX_OFFSET(d)			(0x00000218 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_TX_FORMAT(d)			(0x00000220 + d * 0x0004)	/* Parameters: wrap_t wrap_s log2(height) log2(width) lod npot format cube_map */
-#	define		NV10_TCL_PRIMITIVE_3D_TX_ENABLE(d)			(0x00000228 + d * 0x0004)	/* Parameters: enable anisotropy */
-#	define		NV10_TCL_PRIMITIVE_3D_TX_NPOT_PITCH(d)			(0x00000230 + d * 0x0004)	/* Parameters: pitch */
-#	define		NV10_TCL_PRIMITIVE_3D_TX_NPOT_SIZE(d)			(0x00000240 + d * 0x0004)	/* Parameters: width height */
-#	define		NV10_TCL_PRIMITIVE_3D_TX_FILTER(d)			(0x00000248 + d * 0x0004)	/* Parameters: mag_filter min_filter */
-#	define		NV10_TCL_PRIMITIVE_3D_TX_PALETTE_OFFSET(d)		(0x00000250 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_TX_MATRIX_ENABLE(d)		(0x000003e0 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_TX_MATRIX(x,y)			(0x00000540 + y * 0x0010 + x * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_RC_IN_ALPHA(d)			(0x00000260 + d * 0x0004)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_IN_RGB(d)			(0x00000268 + d * 0x0004)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_OUT_ALPHA(d)			(0x00000278 + d * 0x0004)	/* Parameters: scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_OUT_RGB(d)			(0x00000280 + d * 0x0004)	/* Parameters: rc1_tx_units_enabled rc1_rc_enabled scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_COLOR0				0x00000270	/* Parameters: a r g b */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_COLOR1				0x00000274	/* Parameters: a r g b */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_FINAL0				0x00000288	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV10_TCL_PRIMITIVE_3D_RC_FINAL1				0x0000028c	/* Parameters: vare_mapping vare_component_usage vare_input varf_mapping varf_component_usage varf_input varg_mapping varg_component_usage varg_input color_sum_clamp */
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_MODEL			0x00000294	/* Parameters: local_viewer color_control */
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MATERIAL_ENABLE		0x00000298	/* Parameters: specular diffuse ambient emission */
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_MODE				0x0000029c
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_COORD_DIST			0x000002a0
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_ENABLE			0x000002a4
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_COLOR				0x000002a8	/* Parameters: a b g r */
-#	define		NV17_TCL_PRIMITIVE_3D_COLOR_MASK_ENABLE			0x000002bc
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(d)		(0x000002c0 + d * 0x0004)	/* Parameters: x2 x1 */
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(d)		(0x000002e0 + d * 0x0004)	/* Parameters: y2 y1 */
-#	define		NV10_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE			0x00000300
-#	define		NV10_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE			0x00000304
-#	define		NV10_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE			0x00000308
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE			0x0000030c
-#	define		NV10_TCL_PRIMITIVE_3D_DITHER_ENABLE			0x00000310
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHTING_ENABLE			0x00000314
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETERS_ENABLE		0x00000318
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_SMOOTH_ENABLE		0x0000031c
-#	define		NV10_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE		0x00000320
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE		0x00000324
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_WEIGHT_ENABLE		0x00000328
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_ENABLE			0x0000032c
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE	0x00000330
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE	0x00000334
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE	0x00000338
-#	define		NV10_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC			0x0000033c
-#	define		NV10_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF			0x00000340
-#	define		NV10_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC			0x00000344
-#	define		NV10_TCL_PRIMITIVE_3D_BLEND_FUNC_DST			0x00000348
-#	define		NV10_TCL_PRIMITIVE_3D_BLEND_COLOR			0x0000034c	/* Parameters: a r g b */
-#	define		NV10_TCL_PRIMITIVE_3D_BLEND_EQUATION			0x00000350
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_FUNC			0x00000354
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MASK			0x00000358	/* Parameters: a r g b */
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE		0x0000035c
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_MASK			0x00000360
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_FUNC_FUNC			0x00000364
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_FUNC_REF			0x00000368
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_FUNC_MASK			0x0000036c
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_OP_FAIL			0x00000370
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_OP_ZFAIL			0x00000374
-#	define		NV10_TCL_PRIMITIVE_3D_STENCIL_OP_ZPASS			0x00000378
-#	define		NV10_TCL_PRIMITIVE_3D_SHADE_MODEL			0x0000037c
-#	define		NV10_TCL_PRIMITIVE_3D_LINE_WIDTH			0x00000380
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR		0x00000384
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_UNITS		0x00000388
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT		0x0000038c
-#	define		NV10_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK			0x00000390
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR			0x00000394
-#	define		NV10_TCL_PRIMITIVE_3D_DEPTH_RANGE_FAR			0x00000398
-#	define		NV10_TCL_PRIMITIVE_3D_CULL_FACE				0x0000039c
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_FACE			0x000003a0
-#	define		NV10_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE			0x000003a4
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MATERIAL_R			0x000003a8
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MATERIAL_G			0x000003ac
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MATERIAL_B			0x000003b0
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_MATERIAL_A			0x000003b4
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_CONTROL			0x000003b8	/* Parameters: color_control */
-#	define		NV10_TCL_PRIMITIVE_3D_ENABLED_LIGHTS			0x000003bc	/* Parameters: light 7 light 6 light 5 light 4 light 3 light 2 light 1 light 0 */
-#	define		NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE( d)		(0x000003c0 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_VIEW_MATRIX_ENABLE		0x000003e8	/* Parameters: projection modelview0 modelview1 */
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_SIZE			0x000003ec
-#	define		NV10_TCL_PRIMITIVE_3D_MODELVIEW0_MATRIX( d)		(0x00000400 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_MODELVIEW1_MATRIX( d)		(0x00000440 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_INVERSE_MODELVIEW0_MATRIX( d)	(0x00000480 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_INVERSE_MODELVIEW1_MATRIX( d)	(0x000004c0 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_PROJECTION_MATRIX( d)		(0x00000500 + d * 0x0004)
-#	define		NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_A(d)			(0x00000600 + d * 0x0010)
-#	define		NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_B(d)			(0x00000604 + d * 0x0010)
-#	define		NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_C(d)			(0x00000608 + d * 0x0010)
-#	define		NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_D(d)			(0x0000060c + d * 0x0010)
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_EQUATION_CONSTANT		0x00000680
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_EQUATION_LINEAR		0x00000684
-#	define		NV10_TCL_PRIMITIVE_3D_FOG_EQUATION_QUADRATIC		0x00000688
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_A	0x000006a0
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_B	0x000006a4
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_C	0x000006a8
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_D	0x000006ac
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_E	0x000006b0
-#	define		NV10_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_F	0x000006b4
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R	0x000006c4
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G	0x000006c8
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B	0x000006cc
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_SCALE_X			0x000006e8
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_SCALE_Y			0x000006ec
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_SCALE_Z			0x000006f0
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_SCALE_W			0x000006f4
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_A			0x000006f8
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_B			0x000006fc
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_C			0x00000700
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_D			0x00000704
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_E			0x00000708
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_F			0x0000070c
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_G			0x00000710
-#	define		NV10_TCL_PRIMITIVE_3D_POINT_PARAMETER_H			0x00000714
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(d)	(0x00000800 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(d)	(0x00000804 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(d)	(0x00000808 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(d)	(0x0000080c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(d)	(0x00000810 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(d)	(0x00000814 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(d)	(0x00000818 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(d)	(0x0000081c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(d)	(0x00000820 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_X(d)		(0x00000828 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Y(d)		(0x0000082c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Z(d)		(0x00000830 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_X(d)		(0x00000834 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Y(d)		(0x00000838 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Z(d)		(0x0000083c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(d)		(0x00000840 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_EXPONENT(d)		(0x00000844 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_B(d)		(0x00000848 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(d)		(0x0000084c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Y(d)		(0x00000850 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Z(d)		(0x00000854 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_C(d)		(0x00000858 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(d)		(0x0000085c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_POSITION_Y(d)		(0x00000860 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_POSITION_Z(d)		(0x00000864 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(d)	(0x00000868 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(d)	(0x0000086c + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(d)	(0x00000870 + d * 0x0080)
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_3F_X			0x00000c00
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Y			0x00000c04
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Z			0x00000c08
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_4F_X			0x00000c18
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Y			0x00000c1c
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Z			0x00000c20
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_POS_4F_W			0x00000c24
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_X			0x00000c30
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Y			0x00000c34
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Z			0x00000c38
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_XY			0x00000c40	/* Parameters: y x */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_Z			0x00000c44	/* Parameters: z */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_4F_R			0x00000c50
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_4F_G			0x00000c54
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_4F_B			0x00000c58
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_4F_A			0x00000c5c
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_3F_R			0x00000c60
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_3F_G			0x00000c64
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_3F_B			0x00000c68
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL_4I			0x00000c6c	/* Parameters: a b g r */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_R			0x00000c80
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_G			0x00000c84
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_B			0x00000c88
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_COL2_3I			0x00000c8c	/* Parameters: a b g r */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_S			0x00000c90
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_T			0x00000c94
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_2I			0x00000c98	/* Parameters: t s */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_S			0x00000ca0
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_T			0x00000ca4
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_R			0x00000ca8
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_Q			0x00000cac
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_ST			0x00000cb0	/* Parameters: t s */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_RQ			0x00000cb4	/* Parameters: q r */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_S			0x00000cb8
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_T			0x00000cbc
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_2I			0x00000cc0	/* Parameters: t s */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_S			0x00000cc8
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_T			0x00000ccc
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_R			0x00000cd0
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_Q			0x00000cd4
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_ST			0x00000cd8	/* Parameters: t s */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_RQ			0x00000cdc	/* Parameters: q r */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_FOG_1F			0x00000ce0
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_WGH_1F			0x00000ce4
-#	define		NV10_TCL_PRIMITIVE_3D_EDGEFLAG_ENABLE			0x00000cec
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ATTR( d)			(0x00000d04 + d * 0x0008)	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_VALIDATE		0x00000cf0
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_POS		0x00000d00
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_POS		0x00000d04	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_COL		0x00000d08
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_COL		0x00000d0c	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_COL2		0x00000d10
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_COL2		0x00000d14	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_TX0		0x00000d18
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_TX0		0x00000d1c	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_TX1		0x00000d20
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_TX1		0x00000d24	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_NOR		0x00000d28
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_NOR		0x00000d2c	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_WGH		0x00000d30
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_WGH		0x00000d34	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_OFFSET_FOG		0x00000d38
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_FORMAT_FOG		0x00000d3c	/* Parameters: stride fields type */
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE		0x00000d40
-#	define		NV10_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP			0x00000d44
-#	define		NV17_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_PITCH		0x00000d5c	/* Parameters: pitch */
-#	define		NV17_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_OFFSET		0x00000d60
-#	define		NV17_TCL_PRIMITIVE_3D_LMA_DEPTH_FILL_VALUE		0x00000d68
-#	define		NV17_TCL_PRIMITIVE_3D_LMA_DEPTH_CLEAR_ENABLE		0x00000d6c
-#	define		NV10_TCL_PRIMITIVE_3D_BEGIN_END				0x00000dfc
-#	define		NV10_TCL_PRIMITIVE_3D_INDEX_DATA			0x00000e00	/* Parameters: index1 index0 */
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_BUFFER_BEGIN_END		0x000013fc
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_BUFFER_DRAW_ARRAYS		0x00001400	/* Parameters: count-1 first */
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_X			0x00001638
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_Y			0x0000163c
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_Z			0x00001640
-#	define		NV10_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_W			0x00001644
-#	define		NV17_TCL_PRIMITIVE_3D_LMA_DEPTH_ENABLE			0x00001658
-#	define		NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_DATA			0x00001800
-
-/****************************************** 
-Object NV10_IMAGE_FROM_CPU used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_IMAGE_FROM_CPU					0x0000008a
-#	define		NV10_IMAGE_FROM_CPU_SET_DMA_NOTIFY			0x00000180
-#	define		NV10_IMAGE_FROM_CPU_SET_CONTEXT_CLIP_RECTANGLE		0x00000188
-#	define		NV10_IMAGE_FROM_CPU_SET_IMAGE_PATTERN			0x0000018c
-#	define		NV10_IMAGE_FROM_CPU_SET_RASTER_OP			0x00000190
-#	define		NV10_IMAGE_FROM_CPU_SET_CONTEXT_SURFACES_2D		0x0000019c
-#	define		NV10_IMAGE_FROM_CPU_OPERATION				0x000002fc
-#	define		NV10_IMAGE_FROM_CPU_FORMAT				0x00000300
-#	define		NV10_IMAGE_FROM_CPU_POINT				0x00000304	/* Parameters: x y */
-#	define		NV10_IMAGE_FROM_CPU_SIZE_OUT				0x00000308	/* Parameters: width height */
-#	define		NV10_IMAGE_FROM_CPU_SIZE_IN				0x0000030c	/* Parameters: width height */
-#	define		NV10_IMAGE_FROM_CPU_HLINE				0x00000400
-
-/****************************************** 
-Object NV10_PRIMITIVE_2D used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_PRIMITIVE_2D					0x0000007b
-#	define		NV10_PRIMITIVE_2D_SET_DMA_NOTIFY			0x00000180
-#	define		NV10_PRIMITIVE_2D_SET_SURFACE				0x00000184
-#	define		NV10_PRIMITIVE_2D_SET_FORMAT				0x00000300
-#	define		NV10_PRIMITIVE_2D_SET_POINT				0x00000304	/* Parameters: x y */
-#	define		NV10_PRIMITIVE_2D_SET_SIZE				0x00000308	/* Parameters: width height */
-#	define		NV10_PRIMITIVE_2D_SET_CLIP_HORIZ			0x0000030c	/* Parameters: width x */
-#	define		NV10_PRIMITIVE_2D_SET_CLIP_VERT				0x00000310	/* Parameters: height y */
-#	define		NV10_PRIMITIVE_2D_SET_DATA( d)				(0x00000400 + d * 0x0004)
-
-/****************************************** 
-Object NV10_IMAGE_BLIT used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_IMAGE_BLIT						0x0000009f
-#	define		NV10_IMAGE_BLIT_NOP					0x00000100
-#	define		NV10_IMAGE_BLIT_NOTIFY					0x00000104
-#	define		NV10_IMAGE_BLIT_SET_DMA_NOTIFY				0x00000180
-#	define		NV10_IMAGE_BLIT_SET_CONTEXT_CLIP_RECTANGLE		0x00000188
-#	define		NV10_IMAGE_BLIT_SET_IMAGE_PATTERN			0x0000018c
-#	define		NV10_IMAGE_BLIT_SET_RASTER_OP				0x00000190
-#	define		NV10_IMAGE_BLIT_SET_CONTEXT_SURFACES_2D			0x0000019c
-#	define		NV10_IMAGE_BLIT_SET_OPERATION				0x000002fc
-#	define		NV10_IMAGE_BLIT_SET_POINT				0x00000300	/* Parameters: x y */
-#	define		NV10_IMAGE_BLIT_SET_PITCH				0x00000304	/* Parameters: skip */
-#	define		NV10_IMAGE_BLIT_SET_SIZE				0x00000308	/* Parameters: width height */
-
-/****************************************** 
-Object NV10_VIDEO_DISPLAY used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_VIDEO_DISPLAY					0x0000007c
-#	define		NV10_VIDEO_DISPLAY_COUNTER				0x00000050
-#	define		NV10_VIDEO_DISPLAY_SET_DMA_FROM_MEMORY			0x00000180
-#	define		NV10_VIDEO_DISPLAY_SET_DMA_IN_MEMORY0			0x00000184
-#	define		NV10_VIDEO_DISPLAY_SET_DMA_IN_MEMORY1			0x00000188
-#	define		NV10_VIDEO_DISPLAY_SET_OBJECT3				0x0000019c
-#	define		NV10_VIDEO_DISPLAY_SIZE					0x000002f8	/* Parameters: height width */
-#	define		NV10_VIDEO_DISPLAY_OFFSET				0x00000300
-
-/****************************************** 
-Object NV10_UNK0072 used on: NV10 NV15 NV20 NV40 G70
-*/
-#define			NV10_UNK0072						0x00000072
-#	define		NV10_UNK0072_COUNTER					0x00000050
-#	define		NV40_UNK0072_SET_OBJECT					0x00000060
-#	define		NV10_UNK0072_SET_DMA_NOTIFY				0x00000180
-
-/****************************************** 
-Object NV10_SCALED_IMAGE_FROM_MEMORY used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_SCALED_IMAGE_FROM_MEMORY				0x00000089
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_COUNTER			0x00000050
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_SET_DMA_IN_MEMORY		0x00000184
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_SET_RASTER_OP		0x0000018c
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_SET_IMAGE_PATTERN		0x00000188
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_SET_SURFACE		0x00000198
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_OPERATION			0x00000304
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_CLIP_POS			0x00000308	/* Parameters: x y */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE			0x0000030c	/* Parameters: width height */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_OUT_POS			0x00000310	/* Parameters: x y */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE			0x00000314	/* Parameters: width height */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_SIZE			0x00000400	/* Parameters: width height */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_FORMAT			0x00000404	/* Parameters: pitch */
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_OFFSET			0x00000408
-#	define		NV10_SCALED_IMAGE_FROM_MEMORY_POINT			0x0000040c	/* Parameters: u_int u_frac*0x10 v_int v_frac*0x10 */
-
-/****************************************** 
-Object NV10_CONTEXT_SURFACES_2D used on: NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV10_CONTEXT_SURFACES_2D				0x00000062
-#	define		NV10_CONTEXT_SURFACES_2D_SET_DMA_NOTIFY			0x00000180
-#	define		NV10_CONTEXT_SURFACES_2D_SET_DMA_IN_MEMORY0		0x00000184
-#	define		NV10_CONTEXT_SURFACES_2D_SET_DMA_IN_MEMORY1		0x00000188
-#	define		NV10_CONTEXT_SURFACES_2D_FORMAT				0x00000300	/* Parameters: color type width height */
-#	define		NV10_CONTEXT_SURFACES_2D_PITCH				0x00000304	/* Parameters: src dst */
-#	define		NV10_CONTEXT_SURFACES_2D_OFFSET_SRC			0x00000308
-#	define		NV10_CONTEXT_SURFACES_2D_OFFSET_DST			0x0000030c
-
-/****************************************** 
-Object NV04_CONTEXT_SURFACES_2D used on: NV04 NV10 NV15 
-*/
-#define			NV04_CONTEXT_SURFACES_2D				0x00000042
-#	define		NV04_CONTEXT_SURFACES_2D_NOTIFY				0x00000104
-#	define		NV04_CONTEXT_SURFACES_2D_SET_DMA_NOTIFY			0x00000180
-#	define		NV04_CONTEXT_SURFACES_2D_SET_DMA_IMAGE_SRC		0x00000184
-#	define		NV04_CONTEXT_SURFACES_2D_SET_DMA_IMAGE_DST		0x00000188
-#	define		NV04_CONTEXT_SURFACES_2D_FORMAT				0x00000300
-#	define		NV04_CONTEXT_SURFACES_2D_PITCH				0x00000304	/* Parameters: src dst */
-#	define		NV04_CONTEXT_SURFACES_2D_OFFSET_SRC			0x00000308
-#	define		NV04_CONTEXT_SURFACES_2D_OFFSET_DST			0x0000030c
-
-/****************************************** 
-Object NV04_IMAGE_PATTERN used on: NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV04_IMAGE_PATTERN					0x00000044
-#	define		NV04_IMAGE_PATTERN_COLOR_FORMAT				0x00000300
-#	define		NV04_IMAGE_PATTERN_MONO_FORMAT				0x00000304
-#	define		NV04_IMAGE_PATTERN_SELECT				0x0000030c
-#	define		NV04_IMAGE_PATTERN_MONOCHROME_SHAPE			0x00000308
-#	define		NV04_IMAGE_PATTERN_MONOCHROME_COLOR0			0x00000310
-#	define		NV04_IMAGE_PATTERN_MONOCHROME_COLOR1			0x00000314
-#	define		NV04_IMAGE_PATTERN_MONOCHROME_PATTERN0			0x00000318
-#	define		NV04_IMAGE_PATTERN_MONOCHROME_PATTERN1			0x0000031c
-
-/****************************************** 
-Object NV20_SWIZZLED_SURFACE used on: NV20 NV30 NV40 G70
-*/
-#define			NV20_SWIZZLED_SURFACE					0x0000009e
-#	define		NV20_SWIZZLED_SURFACE_SET_OBJECT0			0x00000180
-#	define		NV20_SWIZZLED_SURFACE_SET_OBJECT1			0x00000184
-#	define		NV20_SWIZZLED_SURFACE_FORMAT				0x00000300	/* Parameters: log2(height) log2(width) color */
-#	define		NV20_SWIZZLED_SURFACE_OFFSET				0x00000304
-
-/****************************************** 
-Object NV20_TCL_PRIMITIVE_3D used on: NV20 
-*/
-#define			NV20_TCL_PRIMITIVE_3D					0x00000097
-#	define		NV20_TCL_PRIMITIVE_3D_NOP				0x00000100
-#	define		NV20_TCL_PRIMITIVE_3D_NOTIFY				0x00000104
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT0			0x00000180
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT1			0x00000184
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT2			0x00000188
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT3			0x00000194
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT4			0x00000198
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT5			0x0000019c
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT6			0x000001a0
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT7			0x000001a4
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT8			0x000001a8
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT9			0x000001ac
-#	define		NV20_TCL_PRIMITIVE_3D_SET_OBJECT10			0x000001b0
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ			0x00000200	/* Parameters: width x */
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_VERT			0x00000204	/* Parameters: height y */
-#	define		NV20_TCL_PRIMITIVE_3D_BUFFER_FORMAT			0x00000208	/* Parameters: type color */
-#	define		NV20_TCL_PRIMITIVE_3D_BUFFER_PITCH			0x0000020c	/* Parameters: depth/stencil buffer pitch color buffer pitch */
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_OFFSET			0x00000210
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_OFFSET			0x00000214
-#	define		NV20_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_PITCH		0x0000022c	/* Parameters: pitch */
-#	define		NV20_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_OFFSET		0x00000230
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_CONTROL			0x00000294
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_CONTROL		0x00000298	/* Parameters: back_specular back_ambient back_diffuse back_emission front_specular front_ambient front_diffuse front_emission */
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_MODE				0x0000029c
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_COORD_DIST			0x000002a0
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_ENABLE			0x000002a4
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(d)		(0x000002c0 + d * 0x0004)	/* Parameters: x2 x1 */
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(d)		(0x000002e0 + d * 0x0004)	/* Parameters: y2 y1 */
-#	define		NV20_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE			0x00000300
-#	define		NV20_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE			0x00000304
-#	define		NV20_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE			0x00000308
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE			0x0000030c
-#	define		NV20_TCL_PRIMITIVE_3D_DITHER_ENABLE			0x00000310
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHTING_ENABLE			0x00000314
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_SMOOTH_ENABLE		0x0000031c
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETERS_ENABLE		0x00000318
-#	define		NV20_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE		0x00000320
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE		0x00000324
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_ENABLE			0x0000032c
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE	0x00000330
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE	0x00000334
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE	0x00000338
-#	define		NV20_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC			0x0000033c
-#	define		NV20_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF			0x00000340
-#	define		NV20_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC			0x00000344
-#	define		NV20_TCL_PRIMITIVE_3D_BLEND_FUNC_DST			0x00000348
-#	define		NV20_TCL_PRIMITIVE_3D_BLEND_COLOR			0x0000034c	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_BLEND_EQUATION			0x00000350
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_FUNC			0x00000354
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MASK			0x00000358	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE		0x0000035c
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_MASK			0x00000360
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_FUNC_FUNC			0x00000364
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_FUNC_REF			0x00000368
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_FUNC_MASK			0x0000036c
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_OP_FAIL			0x00000370
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_OP_ZFAIL			0x00000374
-#	define		NV20_TCL_PRIMITIVE_3D_STENCIL_OP_ZPASS			0x00000378
-#	define		NV20_TCL_PRIMITIVE_3D_SHADE_MODEL			0x0000037c
-#	define		NV20_TCL_PRIMITIVE_3D_LINE_WIDTH			0x00000380
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR		0x00000384
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_UNITS		0x00000388
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT		0x0000038c
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK			0x00000390
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR			0x00000394
-#	define		NV20_TCL_PRIMITIVE_3D_DEPTH_RANGE_FAR			0x00000398
-#	define		NV20_TCL_PRIMITIVE_3D_CULL_FACE				0x0000039c
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_FACE			0x000003a0
-#	define		NV20_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE			0x000003a4
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_R		0x000003a8
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_G		0x000003ac
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_B		0x000003b0
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_A		0x000003b4
-#	define		NV20_TCL_PRIMITIVE_3D_SEPARATE_SPECULAR_ENABLE		0x000003b8
-#	define		NV20_TCL_PRIMITIVE_3D_ENABLED_LIGHTS			0x000003bc	/* Parameters: light 7 light 6 light 5 light 4 light 3 light 2 light 1 light 0 */
-#	define		NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE(d)		(0x000003c0 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_TX_MATRIX_ENABLE(d)		(0x00000420 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_SIZE			0x0000043c
-#	define		NV20_TCL_PRIMITIVE_3D_MODELVIEW_MATRIX( d)		(0x00000480 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_INVERSE_MODELVIEW_MATRIX( d)	(0x00000580 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_PROJECTION_MATRIX( d)		(0x00000680 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_TX_MATRIX(x,y)			(0x000006c0 + y * 0x0010 + x * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_A(d)			(0x00000840 + d * 0x0010)
-#	define		NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_B(d)			(0x00000844 + d * 0x0010)
-#	define		NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_C(d)			(0x00000848 + d * 0x0010)
-#	define		NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_D(d)			(0x0000084c + d * 0x0010)
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_EQUATION_CONSTANT		0x000009c0
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_EQUATION_LINEAR		0x000009c4
-#	define		NV20_TCL_PRIMITIVE_3D_FOG_EQUATION_QUADRATIC		0x000009c8
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_A	0x000009e0
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_B	0x000009e4
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_C	0x000009e8
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_D	0x000009ec
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_E	0x000009f0
-#	define		NV20_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_F	0x000009f4
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_SPRITE			0x00000a1c	/* Parameters: coord_replace r_mode enable */
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_OX			0x00000a20
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_OY			0x00000a24
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_DEPTH_AVG_S		0x00000a28
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_UNKNOWN_A		0x00000a2c
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_A			0x00000a30
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_B			0x00000a34
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_C			0x00000a38
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_D			0x00000a3c
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_E			0x00000a40
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_F			0x00000a44
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_G			0x00000a48
-#	define		NV20_TCL_PRIMITIVE_3D_POINT_PARAMETER_H			0x00000a4c
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_PX_DIV2			0x00000af0
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_PY_DIV2			0x00000af4
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_DEPTH_HALF_S		0x00000af8
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_UNKNOWN_B		0x00000afc
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_INST0			0x00000b00
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_INST1			0x00000b04
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_INST2			0x00000b08
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_INST3			0x00000b0c
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_X			0x00000b80
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_Y			0x00000b84
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_Z			0x00000b88
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_W			0x00000b8c
-#	define		NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_ID		0x00001ea4
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R	0x00000a10
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G	0x00000a14
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B	0x00000a18
-#	define		NV20_TCL_PRIMITIVE_3D_TX_OFFSET(d)			(0x00001b00 + d * 0x0040)
-#	define		NV20_TCL_PRIMITIVE_3D_TX_FORMAT(d)			(0x00001b04 + d * 0x0040)	/* Parameters: log2(height) log2(width) lod format cube_map */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_WRAP(d)			(0x00001b08 + d * 0x0040)	/* Parameters: wrap_s wrap_t wrap_r */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_ENABLE(d)			(0x00001b0c + d * 0x0040)	/* Parameters: enable anisotropy */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_NPOT_PITCH(d)			(0x00001b10 + d * 0x0040)	/* Parameters: pitch */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_FILTER(d)			(0x00001b14 + d * 0x0040)	/* Parameters: mag_filter min_filter */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_NPOT_SIZE(d)			(0x00001b1c + d * 0x0040)	/* Parameters: width height */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_PALETTE_OFFSET(d)		(0x00001b20 + d * 0x0040)
-#	define		NV20_TCL_PRIMITIVE_3D_RC_ENABLE				0x00001e60	/* Parameters: number of rc enabled */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_SHADER_OP			0x00001e70	/* Parameters: op0 op1 op2 op3 */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_SHADER_CULL_MODE		0x000017f8	/* Parameters: cull0 cull1 cull2 cull3 */
-#	define		NV20_TCL_PRIMITIVE_3D_TX_SHADER_PREVIOUS		0x00001e78	/* Parameters: prev2 prev3 */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_COLOR0				0x00001e20	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_COLOR1				0x00001e24	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_FINAL0				0x00000288	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_FINAL1				0x0000028c	/* Parameters: vare_mapping vare_component_usage vare_input varf_mapping varf_component_usage varf_input varg_mapping varg_component_usage varg_input color_sum_clamp */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_IN_ALPHA(d)			(0x00000260 + d * 0x0004)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_IN_RGB(d)			(0x00000ac0 + d * 0x0004)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_CONSTANT_COLOR0(d)		(0x00000a60 + d * 0x0004)	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_CONSTANT_COLOR1(d)		(0x00000a80 + d * 0x0004)	/* Parameters: a r g b */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_OUT_ALPHA(d)			(0x00000aa0 + d * 0x0004)	/* Parameters: scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV20_TCL_PRIMITIVE_3D_RC_OUT_RGB(d)			(0x00001e40 + d * 0x0004)	/* Parameters: scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(d)		(0x0000105c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_POSITION_Y(d)		(0x00001060 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_POSITION_Z(d)		(0x00001064 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_X(d)		(0x00001028 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Y(d)		(0x0000102c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Z(d)		(0x00001030 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_X(d)		(0x00001034 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Y(d)		(0x00001038 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Z(d)		(0x0000103c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(d)	(0x00001000 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(d)	(0x00001004 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(d)	(0x00001008 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(d)	(0x0000100c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(d)	(0x00001010 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(d)	(0x00001014 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(d)	(0x00001018 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(d)	(0x0000101c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(d)	(0x00001020 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_BACK_SIDE_PRODUCT_AMBIENT(d)	(0x00000c00 + d * 0x0040)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_BACK_SIDE_PRODUCT_DIFFUSE(d)	(0x00000c0c + d * 0x0040)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_BACK_SIDE_PRODUCT_SPECULAR(d)	(0x00000c18 + d * 0x0040)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(d)	(0x00001068 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(d)	(0x0000106c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(d)	(0x00001070 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(d)		(0x00001040 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_EXPONENT(d)		(0x00001044 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_B(d)		(0x00001048 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(d)		(0x0000104c + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Y(d)		(0x00001050 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Z(d)		(0x00001054 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_C(d)		(0x00001058 + d * 0x0080)
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_A		0x00001e28
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_B		0x00001e2c
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_C		0x00001e30
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_D		0x00001e34
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_E		0x00001e38
-#	define		NV20_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_F		0x00001e3c
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE		0x0000147c
-#	define		NV20_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN(d)	(0x00001480 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_3F_X			0x00001500
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Y			0x00001504
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Z			0x00001508
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4F_X			0x00001518
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Y			0x0000151c
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Z			0x00001520
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4F_W			0x00001524
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4I_XY			0x00001528	/* Parameters: y x */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_POS_4I_ZW			0x0000152c	/* Parameters: w z */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_X			0x00001530
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Y			0x00001534
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Z			0x00001538
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_XY			0x00001540	/* Parameters: y x */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_Z			0x00001544	/* Parameters: z */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_4F_R			0x00001550
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_4F_G			0x00001554
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_4F_B			0x00001558
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_4F_A			0x0000155c
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_3F_R			0x00001560
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_3F_G			0x00001564
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_3F_B			0x00001568
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL_4I			0x0000156c	/* Parameters: a b g r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_R			0x00001580
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_G			0x00001584
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_B			0x00001588
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_COL2_3I			0x0000158c	/* Parameters: a b g r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_S			0x00001590
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_T			0x00001594
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_2I			0x00001598	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_S			0x000015a0
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_T			0x000015a4
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_R			0x000015a8
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_Q			0x000015ac
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_ST			0x000015b0	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_RQ			0x000015b4	/* Parameters: q r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_S			0x000015b8
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_T			0x000015bc
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_2I			0x000015c0	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_S			0x000015c8
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_T			0x000015cc
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_R			0x000015d0
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_Q			0x000015d4
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_ST			0x000015d8	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_RQ			0x000015dc	/* Parameters: q r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_S			0x000015e0
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_T			0x000015e4
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_2I			0x000015e8	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_S			0x000015f0
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_T			0x000015f4
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_R			0x000015f8
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_Q			0x000015fc
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_ST			0x00001600	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_RQ			0x00001604	/* Parameters: q r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_S			0x00001608
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_T			0x0000160c
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_2I			0x00001610	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_S			0x00001620
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_T			0x00001624
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_R			0x00001628
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_Q			0x0000162c
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_ST			0x00001630	/* Parameters: t s */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_RQ			0x00001634	/* Parameters: q r */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_FOG_1F			0x00001698
-#	define		NV20_TCL_PRIMITIVE_3D_EDGE_FLAG				0x000016bc
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR0_POS		0x00001720	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR1_WGH		0x00001724	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR2_NOR		0x00001728	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR3_COL		0x0000172c	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR4_COL2		0x00001730	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR5_FOG		0x00001734	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR6			0x00001738	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR7			0x0000173c	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR8_TX0		0x00001740	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR9_TX1		0x00001744	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR10_TX2		0x00001748	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR11_TX3		0x0000174c	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR12_TX4		0x00001750	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR13_TX5		0x00001754	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR14_TX6		0x00001758	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_POINTER_ATTR15_TX7		0x0000175c	/* Parameters: enabled? offset */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR( d)			(0x00001760 + d * 0x0004)
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR0_POS			0x00001760	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR1_WGH			0x00001764	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR2_NOR			0x00001768	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR3_COL			0x0000176c	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR4_COL2			0x00001770	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR5_FOG			0x00001774	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR6			0x00001778	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR7			0x0000177c	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR8_TX0			0x00001780	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR9_TX1			0x00001784	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR10_TX2			0x00001788	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR11_TX3			0x0000178c	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR12_TX4			0x00001790	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR13_TX5			0x00001794	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR14_TX6			0x00001798	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR15_TX7			0x0000179c	/* Parameters: stride fields type */
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R	0x000017a0
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G	0x000017a4
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B	0x000017a8
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_A		0x000017ac
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_R		0x000017b0
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_G		0x000017b4
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_B		0x000017b8
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE		0x000017bc
-#	define		NV20_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP			0x000017c0
-#	define		NV20_TCL_PRIMITIVE_3D_LIGHT_MODEL_TWO_SIDE_ENABLE	0x000017c4
-#	define		NV20_TCL_PRIMITIVE_3D_BEGIN_END				0x000017fc
-#	define		NV20_TCL_PRIMITIVE_3D_SCISSOR_X2_X1			0x00001c30	/* Parameters: x2 x1 */
-#	define		NV20_TCL_PRIMITIVE_3D_SCISSOR_Y2_Y1			0x00001c50	/* Parameters: y2 y1 */
-#	define		NV20_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH			0x00001d8c
-#	define		NV20_TCL_PRIMITIVE_3D_CLEAR_VALUE_ARGB			0x00001d90
-#	define		NV20_TCL_PRIMITIVE_3D_CLEAR_WHICH_BUFFERS		0x00001d94	/* Parameters: clear color a clear color b clear color g clear color r clear depth clear stencil */
-#	define		NV20_TCL_PRIMITIVE_3D_INDEX_DATA			0x00001800	/* Parameters: index1 index0 */
-#	define		NV20_TCL_PRIMITIVE_3D_VB_VERTEX_BATCH			0x00001810	/* Parameters: count_vertices offset_vertices */
-#	define		NV20_TCL_PRIMITIVE_3D_VERTEX_DATA			0x00001818
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_X			0x00001f00
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_Y			0x00001f04
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_Z			0x00001f08
-#	define		NV20_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_W			0x00001f0c
-
-/****************************************** 
-Object NV30_TCL_PRIMITIVE_3D used on: NV30 NV40 G70
-*/
-#define			NV30_TCL_PRIMITIVE_3D					0x00000097
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT0			0x00000180
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT1			0x00000184
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT2			0x00000188
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT3			0x0000018c
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT4			0x00000194
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT5			0x00000198
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT6			0x000001a4
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT7			0x000001a8
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT8			0x000001ac
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT9			0x000001b4
-#	define		NV30_TCL_PRIMITIVE_3D_SET_OBJECT10			0x000001b8
-#	define		NV30_TCL_PRIMITIVE_3D_SET_VB_SRC0_OBJECT		0x0000019c
-#	define		NV30_TCL_PRIMITIVE_3D_SET_VB_SRC1_OBJECT		0x000001a0
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER0_PITCH			0x0000020c	/* Parameters: depth/stencil buffer pitch color0 buffer pitch */
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR0_OFFSET			0x00000210
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_OFFSET			0x00000214
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR1_OFFSET			0x00000218
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER1_PITCH			0x0000021c	/* Parameters: color1 buffer pitch */
-#	define		NV30_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_PITCH		0x0000022c	/* Parameters: pitch */
-#	define		NV30_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_OFFSET		0x00000230
-#	define		NV30_TCL_PRIMITIVE_3D_TX_MATRIX_ENABLE(d)		(0x00000240 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER2_PITCH			0x00000280
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER3_PITCH			0x00000284
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER2_OFFSET			0x00000288
-#	define		NV30_TCL_PRIMITIVE_3D_BUFFER3_OFFSET			0x0000028c
-#	define		NV30_TCL_PRIMITIVE_3D_DITHER_ENABLE			0x00000300
-#	define		NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE			0x00000304
-#	define		NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC			0x00000308
-#	define		NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF			0x0000030c
-#	define		NV30_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE			0x00000310
-#	define		NV30_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC			0x00000314
-#	define		NV30_TCL_PRIMITIVE_3D_BLEND_FUNC_DST			0x00000318
-#	define		NV30_TCL_PRIMITIVE_3D_BLEND_COLOR			0x0000031c	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_BLEND_EQUATION			0x00000320
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MASK			0x00000324	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_ENABLE		0x00000328
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_MASK			0x0000032c
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_FUNC		0x00000330
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_REF		0x00000334
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_MASK		0x00000338
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_FAIL		0x0000033c
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_ZFAIL		0x00000340
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_ZPASS		0x00000344
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_ENABLE		0x00000348
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_MASK		0x0000034c
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_FUNC		0x00000350
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_REF		0x00000354
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_MASK		0x00000358
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_FAIL		0x0000035c
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_ZFAIL		0x00000360
-#	define		NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_ZPASS		0x00000364
-#	define		NV30_TCL_PRIMITIVE_3D_SHADE_MODEL			0x00000368
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_ENABLE			0x0000036c
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_COLOR				0x00000370
-#	define		NV40_TCL_PRIMITIVE_3D_COLOR_MASK_BUFFER123		0x00000370	/* Parameters: buffer3 b buffer3 g buffer3 r buffer3 a buffer2 b buffer2 g buffer2 r buffer2 a buffer1 b buffer1 g buffer1 r buffer1 a */
-#	define		NV30_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE			0x0000037c
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR			0x00000394
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_RANGE_FAR			0x00000398
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_R		0x000003a0
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_G		0x000003a4
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_B		0x000003a8
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_FRONT_A		0x000003b4
-#	define		NV30_TCL_PRIMITIVE_3D_LINE_WIDTH_SMOOTH			0x000003b8
-#	define		NV30_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE		0x000003bc
-#	define		NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE(d)		(0x00000400 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_MODELVIEW_MATRIX( d)		(0x00000480 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_INVERSE_MODELVIEW_MATRIX( d)	(0x00000580 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_PROJECTION_MATRIX( d)		(0x00000680 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_TX_MATRIX(x,y)			(0x000006c0 + y * 0x0010 + x * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_FP_ACTIVE_PROGRAM			0x000008e4
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_COORD_DIST			0x000008c8
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_MODE				0x000008cc
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_CONSTANT		0x000008d0
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_LINEAR		0x000008d4
-#	define		NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_QUADRATIC		0x000008d8
-#	define		NV30_TCL_PRIMITIVE_3D_RC_COLOR0				0x000008ec	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_COLOR1				0x000008f0	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_FINAL0				0x000008f4	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_FINAL1				0x000008f8	/* Parameters: vare_mapping vare_component_usage vare_input varf_mapping varf_component_usage varf_input varg_mapping varg_component_usage varg_input color_sum_clamp */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_ENABLE				0x000008fc	/* Parameters: number of rc enabled */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_IN_ALPHA(d)			(0x00000900 + d * 0x0020)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_IN_RGB(d)			(0x00000904 + d * 0x0020)	/* Parameters: vara_mapping vara_component_usage vara_input varb_mapping varb_component_usage varb_input varc_mapping varc_component_usage varc_input vard_mapping vard_component_usage vard_input */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_CONSTANT_COLOR0(d)		(0x00000908 + d * 0x0020)	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_CONSTANT_COLOR1(d)		(0x0000090c + d * 0x0020)	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_OUT_ALPHA(d)			(0x00000910 + d * 0x0020)	/* Parameters: scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV30_TCL_PRIMITIVE_3D_RC_OUT_RGB(d)			(0x00000914 + d * 0x0020)	/* Parameters: scale bias mux_sum ab_dot_product cd_dot_product sum_output ab_output cd_output */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_DIM0	0x00000200	/* Parameters: width x_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_DIM1	0x00000204	/* Parameters: height y_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_OFS0	0x000002c0	/* Parameters: width x_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_OFS1	0x000002c4	/* Parameters: height y_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_DIMS_0			0x00000a00	/* Parameters: width x_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_DIMS_1			0x00000a04	/* Parameters: height y_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R	0x00000a10
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G	0x00000a14
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B	0x00000a18
-#	define		NV30_TCL_PRIMITIVE_3D_SCISSOR_WIDTH_XPOS		0x000008c0	/* Parameters: width x_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_SCISSOR_HEIGHT_YPOS		0x000008c4	/* Parameters: height y_offset */
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_SPRITE			0x00001ee8	/* Parameters: coord_replace r_mode enable */
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_SIZE			0x00001ee0
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_A			0x00001ec0
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_B			0x00001ec4
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_C			0x00001ec8
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_D			0x00001ecc
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_E			0x00001ed0
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_F			0x00001ed4
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_G			0x00001ed8
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETER_H			0x00001edc
-#	define		NV30_TCL_PRIMITIVE_3D_POINT_PARAMETERS_ENABLE		0x00001ee4
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_OX			0x00000a20
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_OY			0x00000a24
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_NPF_DIV2		0x00000a28
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_UNK0_0x0		0x00000a2c
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_PX_DIV2		0x00000a30
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_PY_DIV2		0x00000a34
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_FMN_DIV2		0x00000a38
-#	define		NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_UNK1_0x0		0x00000a3c
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE	0x00000a60
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE	0x00000a64
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE	0x00000a68
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_FUNC			0x00000a6c
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE		0x00000a70
-#	define		NV30_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE			0x00000a74
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR		0x00000a78
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_UNITS		0x00000a7c
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_INST0			0x00000b80
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_INST1			0x00000b84
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_INST2			0x00000b88
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_INST3			0x00000b8c
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_R		0x000017b0
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_G		0x000017b4
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_B		0x000017b8
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_MATERIAL_BACK_A		0x000017c0
-#	define		NV30_TCL_PRIMITIVE_3D_OCC_QUERY_OR_COLOR_BUFF_ENABLE	0x000017c8
-#	define		NV30_TCL_PRIMITIVE_3D_STORE_RESULT			0x00001800
-#	define		NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_A(d)			(0x00000e00 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_B(d)			(0x00000e04 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_C(d)			(0x00000e08 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_D(d)			(0x00000e0c + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(d)	(0x00001000 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(d)	(0x00001004 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(d)	(0x00001008 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(d)	(0x0000100c + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(d)	(0x00001010 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(d)	(0x00001014 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(d)	(0x00001018 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(d)	(0x0000101c + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(d)	(0x00001020 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_X(d)		(0x00001028 + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Y(d)		(0x0000102c + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_HALF_VECTOR_Z(d)		(0x00001030 + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_X(d)		(0x00001034 + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Y(d)		(0x00001038 + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_DIRECTION_Z(d)		(0x0000103c + d * 0x0080)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(d)	(0x00001228 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(d)	(0x0000122c + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(d)	(0x00001230 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(d)		(0x00001200 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_EXPONENT(d)		(0x00001204 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_B(d)		(0x00001208 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(d)		(0x0000120c + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Y(d)		(0x00001210 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_Z(d)		(0x00001214 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_C(d)		(0x00001218 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(d)		(0x0000121c + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_POSITION_Y(d)		(0x00001220 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_POSITION_Z(d)		(0x00001224 + d * 0x0040)
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_A	0x00001400
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_B	0x00001404
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_C	0x00001408
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_D	0x0000140c
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_E	0x00001410
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_MATERIAL_SHININESS_F	0x00001414
-#	define		NV30_TCL_PRIMITIVE_3D_ENABLED_LIGHTS			0x00001420	/* Parameters: light 7 light 6 light 5 light 4 light 3 light 2 light 1 light 0 */
-#	define		NV30_TCL_PRIMITIVE_3D_UNK1D6C_OFFSET			0x00001d6c
-#	define		NV30_TCL_PRIMITIVE_3D_UNK1D70_VALUE			0x00001d70
-#	define		NV30_TCL_PRIMITIVE_3D_LINE_STIPPLE_ENABLE		0x00001db4
-#	define		NV30_TCL_PRIMITIVE_3D_LINE_STIPPLE_PATTERN		0x00001db8	/* Parameters: factor pattern */
-#	define		NV30_TCL_PRIMITIVE_3D_BEGIN_END				0x00001808
-#	define		NV30_TCL_PRIMITIVE_3D_CULL_FACE				0x00001830
-#	define		NV30_TCL_PRIMITIVE_3D_FRONT_FACE			0x00001834
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE		0x00001838
-#	define		NV30_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE			0x0000183c
-#	define		NV30_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH			0x00001d8c
-#	define		NV30_TCL_PRIMITIVE_3D_CLEAR_VALUE_ARGB			0x00001d90	/* Parameters: a r g b */
-#	define		NV30_TCL_PRIMITIVE_3D_CLEAR_WHICH_BUFFERS		0x00001d94
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_A		0x00001e20
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_B		0x00001e24
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_C		0x00001e28
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_D		0x00001e2c
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_E		0x00001e30
-#	define		NV30_TCL_PRIMITIVE_3D_BACK_MATERIAL_SHININESS_F		0x00001e34
-#	define		NV30_TCL_PRIMITIVE_3D_DO_VERTICES			0x00001dac
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_FROM_ID			0x00001e9c
-#	define		NV30_TCL_PRIMITIVE_3D_VP_PROGRAM_START_ID		0x00001ea0
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_ID		0x00001efc
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P0_X		0x00001f00
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P0_Y		0x00001f04
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P0_Z		0x00001f08
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P0_W		0x00001f0c
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P1_X		0x00001f10
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P1_Y		0x00001f14
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P1_Z		0x00001f18
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P1_W		0x00001f1c
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P2_X		0x00001f20
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P2_Y		0x00001f24
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P2_Z		0x00001f28
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P2_W		0x00001f2c
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P3_X		0x00001f30
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P3_Y		0x00001f34
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P3_Z		0x00001f38
-#	define		NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_P3_W		0x00001f3c
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_3X(d)			(0x00001500 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_3Y(d)			(0x00001504 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_3Z(d)			(0x00001508 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_3W(d)			(0x0000150c + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_4X(d)			(0x00001c00 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_4Y(d)			(0x00001c04 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_4Z(d)			(0x00001c08 + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VTX_ATTR_4W(d)			(0x00001c0c + d * 0x0010)
-#	define		NV30_TCL_PRIMITIVE_3D_VB_POINTER_ATTR(d)		(0x00001680 + d * 0x0004)	/* Parameters: source: offset */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_XY			0x00000a90	/* Parameters: y x */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_Z			0x00000a94	/* Parameters: z */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_S			0x000018c0
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_T			0x000018c4
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_S			0x000018c8
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_T			0x000018cc
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_S			0x000018d0
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_T			0x000018d4
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_S			0x000018d8
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_T			0x000018dc
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX0_2I			0x00001920	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX1_2I			0x00001924	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX2_2I			0x00001928	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX3_2I			0x0000192c	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_COL_4I			0x0000194c	/* Parameters: a b g r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_COL2_3I			0x00001950	/* Parameters: a b g r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_ST			0x000019c0	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_RQ			0x000019c4	/* Parameters: q r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_ST			0x000019c8	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_RQ			0x000019cc	/* Parameters: q r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_ST			0x000019d0	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_RQ			0x000019d4	/* Parameters: q r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_ST			0x000019d8	/* Parameters: t s */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_RQ			0x000019dc	/* Parameters: q r */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_FOG_1F			0x00001e54
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_UNK_0			0x00001718
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR( d)			(0x00001740 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR0_POS			0x00001740	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR1_WGH			0x00001744	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR2_NOR			0x00001748	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR3_COL			0x0000174c	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR4_COL2			0x00001750	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR5_FOG			0x00001754	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR6			0x00001758	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR7			0x0000175c	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR8_TX0			0x00001760	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR9_TX1			0x00001764	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR10_TX2			0x00001768	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR11_TX3			0x0000176c	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR12_TX4			0x00001770	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR13_TX5			0x00001774	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR14_TX6			0x00001778	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR15_TX7			0x0000177c	/* Parameters: stride fields type */
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R	0x000017a0
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G	0x000017a4
-#	define		NV30_TCL_PRIMITIVE_3D_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B	0x000017a8
-#	define		NV30_TCL_PRIMITIVE_3D_FP_ACTIVE_PROGRAM			0x000008e4
-#	define		NV30_TCL_PRIMITIVE_3D_TX_ADDRESS_UNIT(d)		(0x00001a00 + d * 0x0020)
-#	define		NV30_TCL_PRIMITIVE_3D_TX_FORMAT_UNIT(d)			(0x00001a04 + d * 0x0020)	/* Parameters: mipmap type format ncomp cubic */
-#	define		NV30_TCL_PRIMITIVE_3D_TX_WRAP_UNIT(d)			(0x00001a08 + d * 0x0020)	/* Parameters: wrap_s wrap_t wrap_r */
-#	define		NV30_TCL_PRIMITIVE_3D_TX_ENABLE_UNIT(d)			(0x00001a0c + d * 0x0020)	/* Parameters: nv40_enable nv30_enable anisotropy */
-#	define		NV30_TCL_PRIMITIVE_3D_TX_SWIZZLE_UNIT(d)		(0x00001a10 + d * 0x0020)
-#	define		NV30_TCL_PRIMITIVE_3D_TX_FILTER_UNIT(d)			(0x00001a14 + d * 0x0020)	/* Parameters: filter_min filter_mag */
-#	define		NV30_TCL_PRIMITIVE_3D_TX_XY_DIM_UNIT(d)			(0x00001a18 + d * 0x0020)	/* Parameters: width height */
-#	define		NV30_TCL_PRIMITIVE_3D_TX_UNK07_UNIT(d)			(0x00001a1c + d * 0x0020)
-#	define		NV30_TCL_PRIMITIVE_3D_TX_DEPTH_UNIT(d)			(0x00001840 + d * 0x0004)	/* Parameters: depth NPOT pitch */
-#	define		NV30_TCL_PRIMITIVE_3D_VB_VERTEX_BATCH			0x00001814	/* Parameters: count_vertices offset_vertices */
-#	define		NV30_TCL_PRIMITIVE_3D_VB_ELEMENT_U16			0x0000180c	/* Parameters: 1: 0: */
-#	define		NV30_TCL_PRIMITIVE_3D_VB_ELEMENT_U32			0x00001810
-#	define		NV30_TCL_PRIMITIVE_3D_VERTEX_DATA			0x00001818
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE		0x00000374
-#	define		NV30_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP			0x00000378
-#	define		NV30_TCL_PRIMITIVE_3D_SET_DISPLAY_LIST_MEM_OFFSET	0x0000181c
-#	define		NV30_TCL_PRIMITIVE_3D_EXECUTE_DISPLAY_LIST		0x00001824	/* Parameters: length start offset */
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT		0x00001828
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK			0x0000182c
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE		0x0000147c
-#	define		NV30_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN( d)	(0x00001480 + d * 0x0004)
-#	define		NV30_TCL_PRIMITIVE_3D_SET_CLIPPING_PLANES		0x00001478
-#	define		NV30_TCL_PRIMITIVE_3D_VP_IN_REG				0x00001ff0	/* Parameters: vertex pos weight normal primary color secondary color fogcoord texture coords 0 texture ccords 1 texture coords 2 texture coords 3 texture coords 4 texture coords 5 texture coords 6 texture coords 7 */
-#	define		NV30_TCL_PRIMITIVE_3D_VP_OUT_REG			0x00001ff4	/* Parameters: primary color secondary color backface primary color backface secondary color fogcoord pointsize clip plane 0 clip plane 1 clip plane 2 clip plane 3 clip plane 4 clip plane 5 texture coords 0 texture coords 1 texture coords 2 texture coords 3 texture coords 4 texture coords 5 texture coords 6 texture coords 7 */
-
-/****************************************** 
-Object NV30_CLEAR_BUFFER used on: NV30 NV40 G70
-*/
-#define			NV30_CLEAR_BUFFER					0x00000066
-#	define		NV30_CLEAR_BUFFER_SET_DMA_NOTIFY			0x00000180
-#	define		NV30_CLEAR_BUFFER_SET_IMAGE_PATTERN			0x00000188
-#	define		NV30_CLEAR_BUFFER_SET_RASTER_OP				0x0000018c
-#	define		NV30_CLEAR_BUFFER_SET_CONTEXT_SURFACE_2D		0x00000198
-#	define		NV30_CLEAR_BUFFER_UNK002fc				0x000002fc
-
-/****************************************** 
-Object NV50_TCL_PRIMITIVE_3D used on: 
-*/
-#define			NV50_TCL_PRIMITIVE_3D					0x00000097
-#	define		NV50_TCL_PRIMITIVE_3D_SET_OBJECT_0( d)			(0x00000180 + d * 0x0004)
-#	define		NV50_TCL_PRIMITIVE_3D_SET_OBJECT_1( d)			(0x000001c0 + d * 0x0004)
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_FOG_1F			0x00000314
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_2F_X			0x00000380
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_2F_Y			0x00000384
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_S			0x000003c0
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_2F_T			0x000003c4
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_S			0x000003c8
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_2F_T			0x000003cc
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_S			0x000003d0
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_2F_T			0x000003d4
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_S			0x000003d8
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_2F_T			0x000003dc
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_3F_X			0x00000400
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Y			0x00000404
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_3F_Z			0x00000408
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_X			0x00000420
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Y			0x00000424
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_NOR_3F_Z			0x00000428
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_3F_R			0x00000430
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_3F_G			0x00000434
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_3F_B			0x00000438
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_R			0x00000440
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_G			0x00000444
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL2_3F_B			0x00000448
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4F_X			0x00000500
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Y			0x00000504
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4F_Z			0x00000508
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4F_W			0x0000050c
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_4F_R			0x00000530
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_4F_G			0x00000534
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_4F_B			0x00000538
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_4F_A			0x0000053c
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_S			0x00000580
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_T			0x00000584
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_R			0x00000588
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4F_Q			0x0000058c
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_S			0x00000590
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_T			0x00000594
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_R			0x00000598
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4F_Q			0x0000059c
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_S			0x000005a0
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_T			0x000005a4
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_R			0x000005a8
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4F_Q			0x000005ac
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_S			0x000005b0
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_T			0x000005b4
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_R			0x000005b8
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4F_Q			0x000005bc
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_2I			0x000006a0	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_2I			0x000006a4	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_2I			0x000006a8	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_2I			0x000006ac	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4I_XY			0x00000700	/* Parameters: y x */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_POS_4I_ZW			0x00000704	/* Parameters: w z */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_ST			0x00000740	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX0_4I_RQ			0x00000744	/* Parameters: q r */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_ST			0x00000748	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX1_4I_RQ			0x0000074c	/* Parameters: q r */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_ST			0x00000750	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX2_4I_RQ			0x00000754	/* Parameters: q r */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_ST			0x00000758	/* Parameters: t s */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_TX3_4I_RQ			0x0000075c	/* Parameters: q r */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_XY			0x00000790	/* Parameters: y x */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_NOR_3I_Z			0x00000794	/* Parameters: z */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL_4I			0x0000088c	/* Parameters: a b g r */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_COL2_3I			0x00000890	/* Parameters: a b g r */
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK0_X			0x00000a00
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK0_Y			0x00000a04
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK0_Z			0x00000a08
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK1_X			0x00000a0c
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK1_Y			0x00000a10
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_UNK1_Z			0x00000a14
-#	define		NV50_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR			0x00000c08
-#	define		NV50_TCL_PRIMITIVE_3D_DEPTH_RANGE_FAR			0x00000c0c
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(d)		(0x00000d00 + d * 0x0008)	/* Parameters: x2 x1 */
-#	define		NV50_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(d)		(0x00000d04 + d * 0x0008)	/* Parameters: y2 y1 */
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_BUFFER_FIRST		0x00000d74
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_BUFFER_COUNT		0x00000d78
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_COLOR_R			0x00000d80
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_COLOR_G			0x00000d84
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_COLOR_B			0x00000d88
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_COLOR_A			0x00000d8c
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_DEPTH			0x00000d90
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_STENCIL			0x00000da0
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT		0x00000dac
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK			0x00000db0
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE		0x00000db4
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE	0x00000dc0
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE	0x00000dc4
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE	0x00000dc8
-#	define		NV50_TCL_PRIMITIVE_3D_SCISSOR_WIDTH_XPOS		0x00000e04	/* Parameters: w x */
-#	define		NV50_TCL_PRIMITIVE_3D_SCISSOR_HEIGHT_YPOS		0x00000e08	/* Parameters: h y */
-#	define		NV50_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_ID		0x00000f00
-#	define		NV50_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_X			0x00000f04
-#	define		NV50_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_Y			0x00000f08
-#	define		NV50_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_Z			0x00000f0c
-#	define		NV50_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_W			0x00000f10
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_REF		0x00000f54
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_MASK		0x00000f58
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_MASK		0x00000f5c
-#	define		NV50_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE			0x000012cc
-#	define		NV50_TCL_PRIMITIVE_3D_SHADE_MODEL			0x000012d4
-#	define		NV50_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE		0x000012e8
-#	define		NV50_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE			0x000012ec
-#	define		NV50_TCL_PRIMITIVE_3D_DEPTH_FUNC			0x0000130c
-#	define		NV50_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF			0x00001310
-#	define		NV50_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC			0x00001314
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_COLOR_R			0x0000131c
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_COLOR_G			0x00001320
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_COLOR_B			0x00001324
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_COLOR_A			0x00001328
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_EQUATION_RGB		0x00001340
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC_RGB		0x00001344
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_DST_RGB		0x00001348
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_EQUATION_ALPHA		0x0000134c
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC_ALPHA		0x00001350
-#	define		NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_DST_ALPHA		0x00001358
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_ENABLE		0x00001380
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_FAIL		0x00001384
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_ZFAIL		0x00001388
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_ZPASS		0x0000138c
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_FUNC		0x00001390
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_REF		0x00001394
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_MASK			0x00001398
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_MASK		0x0000139c
-#	define		NV50_TCL_PRIMITIVE_3D_LINE_WIDTH			0x000013b0
-#	define		NV50_TCL_PRIMITIVE_3D_POINT_SIZE			0x00001518
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR		0x0000156c
-#	define		NV50_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE		0x00001570
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_ENABLE		0x00001594
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_FAIL		0x00001598
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_ZFAIL		0x0000159c
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_ZPASS		0x000015a0
-#	define		NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_FUNC		0x000015a4
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_UNITS		0x000015bc
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_BEGIN			0x000015dc
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_END			0x000015e0
-#	define		NV50_TCL_PRIMITIVE_3D_VERTEX_DATA			0x00001640
-#	define		NV50_TCL_PRIMITIVE_3D_LINE_STIPPLE_ENABLE		0x0000166c
-#	define		NV50_TCL_PRIMITIVE_3D_LINE_STIPPLE_PATTERN		0x00001680	/* Parameters: pattern factor */
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE		0x0000168c
-#	define		NV50_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN( d)	(0x00001700 + d * 0x0004)
-#	define		NV50_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE			0x00001918
-#	define		NV50_TCL_PRIMITIVE_3D_FRONT_FACE			0x0000191c
-#	define		NV50_TCL_PRIMITIVE_3D_CULL_FACE				0x00001920
-#	define		NV50_TCL_PRIMITIVE_3D_LOGIC_OP_ENABLE			0x000019c4
-#	define		NV50_TCL_PRIMITIVE_3D_LOGIC_OP_OP			0x000019c8
-#	define		NV50_TCL_PRIMITIVE_3D_CLEAR_BUFFERS			0x000019d0	/* Parameters: color stencil depth */
-#	define		NV50_TCL_PRIMITIVE_3D_COLOR_MASK( d)			(0x00001a00 + d * 0x0004)	/* Parameters: a b g r */
-
-/****************************************** 
-Object NV_DMA_FROM_MEMORY used on: NV03 NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV_DMA_FROM_MEMORY					0x00000002
-
-/****************************************** 
-Object NV_DMA_TO_MEMORY used on: NV03 NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV_DMA_TO_MEMORY					0x00000003
-
-/****************************************** 
-Object NV_DMA_IN_MEMORY used on: NV03 NV04 NV10 NV15 NV20 NV30 NV40 G70
-*/
-#define			NV_DMA_IN_MEMORY					0x0000003d
-
-/****************************************** 
-Object NvType0046 used on: NV04 
-*/
-#define			NvType0046						0x00000046
-#	define		NvType0046_DMA_NOTIFY					0x00000180
-#	define		NvType0046_DMA_MEM_1					0x00000184
-#	define		NvType0046_DMA_MEM_2					0x00000188
-#	define		NvType0046_DMA_3					0x0000018c
-#	define		NvType0046_DMA_4					0x00000190
-#	define		NvType0046_OBJ_5					0x00000194
-#	define		NvType0046_OBJ_6					0x00000198
-#	define		NvType0046_PITCH1					0x00000304
-#	define		NvType0046_PITCH2					0x0000030c
-#	define		NvType0046_SIZE						0x00000340	/* Parameters: width height */
-#	define		NvType0046_WIDTH					0x00000344	/* Parameters: visible_width blank_width */
-#	define		NvType0046_HSYNC					0x00000348	/* Parameters: hsync_start hsync_len */
-#	define		NvType0046_HEIGHT					0x0000034c	/* Parameters: visible_height blank_height */
-#	define		NvType0046_VSYNC					0x00000350	/* Parameters: vsync_start vsync_len */
-#	define		NvType0046_FULL_SIZE					0x00000354	/* Parameters: full_width full_height */
-#	define		NvType0046_PIXEL_CLK					0x00000358
-#	define		NvType0046_FLAGS					0x0000035c	/* Parameters: doublescan -hsync -vsync depth */
-
-/****************************************** 
-Object NvType0047 used on: NV04 
-*/
-#define			NvType0047						0x00000047
-#	define		NvType0047_DMA_NOTIFY					0x00000180
-#	define		NvType0047_UNK19C					0x0000019c
-#	define		NvType0047_UNK1A0					0x000001a0
-
-/****************************************** 
-Object NvType0049 used on: NV04 
-*/
-#define			NvType0049						0x00000049
-#	define		NvType0049_DMA_NOTIFY					0x00000180
-#	define		NvType0049_DMA_MEM_1					0x00000184
-#	define		NvType0049_DMA_MEM_2					0x00000188
-
-/****************************************** 
-Object NvType004D used on: NV04 
-*/
-#define			NvType004D						0x0000004d
-#	define		NvType004D_DMA_NOTIFY					0x00000180
-#	define		NvType004D_DMA_MEM_1					0x00000184
-#	define		NvType004D_DMA_MEM_2					0x00000188
-#	define		NvType004D_DMA_MEM_3					0x0000018c
-#	define		NvType004D_DMA_MEM_4					0x00000190
-
-#endif /* _NOUVEAU_REG_H */
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
deleted file mode 100644
index 2cf6f979e40..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ /dev/null
@@ -1,382 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
-
-#include "nouveau_context.h"
-#include "nouveau_screen.h"
-#include "nouveau_object.h"
-#include "nouveau_span.h"
-
-#include "utils.h"
-#include "context.h"
-#include "vblank.h"
-#include "drirenderbuffer.h"
-
-#include "GL/internal/dri_interface.h"
-
-#include "xmlpool.h"
-
-PUBLIC const char __driConfigOptions[] =
-DRI_CONF_BEGIN
-    DRI_CONF_SECTION_DEBUG
-        DRI_CONF_NO_RAST(false)
-    DRI_CONF_SECTION_END
-DRI_CONF_END;
-static const GLuint __driNConfigOptions = 1;
-
-extern const struct dri_extension common_extensions[];
-extern const struct dri_extension nv10_extensions[];
-extern const struct dri_extension nv20_extensions[];
-extern const struct dri_extension nv30_extensions[];
-extern const struct dri_extension nv40_extensions[];
-extern const struct dri_extension nv50_extensions[];
-
-static nouveauScreenPtr nouveauCreateScreen(__DRIscreenPrivate *sPriv)
-{
-	nouveauScreenPtr screen;
-	NOUVEAUDRIPtr dri_priv=(NOUVEAUDRIPtr)sPriv->pDevPriv;
-
-	/* allocate screen */
-	screen = (nouveauScreenPtr) CALLOC( sizeof(*screen) );
-	if ( !screen ) {         
-		__driUtilMessage("%s: Could not allocate memory for screen structure",__FUNCTION__);
-		return NULL;
-	}
-	
-	screen->card=nouveau_card_lookup(dri_priv->device_id);
-	if (!screen->card) {
-		__driUtilMessage("%s: Unknown card type 0x%04x:0x%04x\n",
-			__func__, dri_priv->device_id >> 16, dri_priv->device_id & 0xFFFF);
-		FREE(screen);
-		return NULL;
-	}
-
-	/* parse information in __driConfigOptions */
-	driParseOptionInfo (&screen->optionCache,__driConfigOptions, __driNConfigOptions);
-
-	screen->fbFormat    = dri_priv->bpp / 8;
-	screen->frontOffset = dri_priv->front_offset;
-	screen->frontPitch  = dri_priv->front_pitch;
-	screen->backOffset  = dri_priv->back_offset;
-	screen->backPitch   = dri_priv->back_pitch;
-	screen->depthOffset = dri_priv->depth_offset;
-	screen->depthPitch  = dri_priv->depth_pitch;
-
-	screen->driScreen = sPriv;
-	return screen;
-}
-
-static void
-nouveauDestroyScreen(__DRIscreenPrivate *sPriv)
-{
-	nouveauScreenPtr screen = (nouveauScreenPtr)sPriv->private;
-
-	if (!screen) return;
-
-	/* free all option information */
-	driDestroyOptionInfo (&screen->optionCache);
-
-	FREE(screen);
-	sPriv->private = NULL;
-}
-
-static GLboolean nouveauInitDriver(__DRIscreenPrivate *sPriv)
-{
-	sPriv->private = (void *) nouveauCreateScreen( sPriv );
-	if ( !sPriv->private ) {
-		nouveauDestroyScreen( sPriv );
-		return GL_FALSE;
-	}
-
-	return GL_TRUE;
-}
-
-/**
- * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
- *
- * \todo This function (and its interface) will need to be updated to support
- * pbuffers.
- */
-static GLboolean
-nouveauCreateBuffer(__DRIscreenPrivate *driScrnPriv,
-                    __DRIdrawablePrivate *driDrawPriv,
-                    const __GLcontextModes *mesaVis,
-                    GLboolean isPixmap)
-{
-	nouveauScreenPtr screen = (nouveauScreenPtr) driScrnPriv->private;
-	nouveau_renderbuffer  *nrb;
-	struct gl_framebuffer *fb;
-	const GLboolean swAccum = mesaVis->accumRedBits > 0;
-	const GLboolean swStencil = mesaVis->stencilBits > 0 && mesaVis->depthBits != 24;
-	GLenum color_format = screen->fbFormat == 4 ? GL_RGBA8 : GL_RGB5;
-
-	if (isPixmap)
-		return GL_FALSE; /* not implemented */
-
-	fb = _mesa_create_framebuffer(mesaVis);
-	if (!fb)
-		return GL_FALSE;
-
-	/* Front buffer */
-	nrb = nouveau_renderbuffer_new(color_format,
-				       driScrnPriv->pFB + screen->frontOffset,
-				       screen->frontOffset,
-				       screen->frontPitch * screen->fbFormat,
-				       driDrawPriv);
-	nouveauSpanSetFunctions(nrb, mesaVis);
-	_mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &nrb->mesa);
-
-	if (0 /* unified buffers if we choose to support them.. */) {
-	} else {
-		if (mesaVis->doubleBufferMode) {
-			nrb = nouveau_renderbuffer_new(color_format, NULL,
-						       0, 0,
-						       NULL);
-			nouveauSpanSetFunctions(nrb, mesaVis);
-			_mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &nrb->mesa);
-		}
-
-		if (mesaVis->depthBits == 24 && mesaVis->stencilBits == 8) {
-			nrb = nouveau_renderbuffer_new(GL_DEPTH24_STENCIL8_EXT, NULL,
-						       0, 0,
-						       NULL);
-			nouveauSpanSetFunctions(nrb, mesaVis);
-			_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &nrb->mesa);
-			_mesa_add_renderbuffer(fb, BUFFER_STENCIL, &nrb->mesa);
-		} else if (mesaVis->depthBits == 24) {
-			nrb = nouveau_renderbuffer_new(GL_DEPTH_COMPONENT24, NULL,
-						       0, 0,
-						       NULL);
-			nouveauSpanSetFunctions(nrb, mesaVis);
-			_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &nrb->mesa);
-		} else if (mesaVis->depthBits == 16) {
-			nrb = nouveau_renderbuffer_new(GL_DEPTH_COMPONENT16, NULL,
-						       0, 0,
-						       NULL);
-			nouveauSpanSetFunctions(nrb, mesaVis);
-			_mesa_add_renderbuffer(fb, BUFFER_DEPTH, &nrb->mesa);
-		}
-	}
-
-	_mesa_add_soft_renderbuffers(fb,
-				     GL_FALSE, /* color */
-				     GL_FALSE, /* depth */
-				     swStencil,
-				     swAccum,
-				     GL_FALSE, /* alpha */
-				     GL_FALSE  /* aux */);
-
-	driDrawPriv->driverPrivate = (void *) fb;
-	return (driDrawPriv->driverPrivate != NULL);
-}
-
-
-static void
-nouveauDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
-{
-	_mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
-}
-
-static int
-nouveauGetSwapInfo(__DRIdrawablePrivate *dpriv, __DRIswapInfo *sInfo)
-{
-	return -1;
-}
-
-static const struct __DriverAPIRec nouveauAPI = {
-	.InitDriver      = nouveauInitDriver,
-	.DestroyScreen   = nouveauDestroyScreen,
-	.CreateContext   = nouveauCreateContext,
-	.DestroyContext  = nouveauDestroyContext,
-	.CreateBuffer    = nouveauCreateBuffer,
-	.DestroyBuffer   = nouveauDestroyBuffer,
-	.SwapBuffers     = nouveauSwapBuffers,
-	.MakeCurrent     = nouveauMakeCurrent,
-	.UnbindContext   = nouveauUnbindContext,
-	.GetSwapInfo     = nouveauGetSwapInfo,
-	.GetMSC          = driGetMSC32,
-	.WaitForMSC      = driWaitForMSC32,
-	.WaitForSBC      = NULL,
-	.SwapBuffersMSC  = NULL,
-	.CopySubBuffer   = nouveauCopySubBuffer
-};
-
-
-static __GLcontextModes *
-nouveauFillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
-{
-	__GLcontextModes * modes;
-	__GLcontextModes * m;
-	unsigned num_modes;
-	unsigned depth_buffer_factor;
-	unsigned back_buffer_factor;
-	int i;
-
-	static const struct {
-		GLenum format;
-		GLenum type;
-	} fb_format_array[] = {
-		{ GL_RGB , GL_UNSIGNED_SHORT_5_6_5     },
-		{ GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV },
-		{ GL_BGR , GL_UNSIGNED_INT_8_8_8_8_REV },
-	};
-
-	/* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
-	 * support pageflipping at all.
-	 */
-	static const GLenum back_buffer_modes[] = {
-		GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
-	};
-
-	uint8_t depth_bits_array[4]   = { 0, 16, 24, 24 };
-	uint8_t stencil_bits_array[4] = { 0,  0,  0,  8 };
-
-	depth_buffer_factor = 4;
-	back_buffer_factor  = (have_back_buffer) ? 3 : 1;
-
-	num_modes = ((pixel_bits==16) ? 1 : 2) *
-		depth_buffer_factor * back_buffer_factor * 4;
-	modes = (*dri_interface->createContextModes)(num_modes,
-						     sizeof(__GLcontextModes));
-	m = modes;
-
-	for (i=((pixel_bits==16)?0:1);i<((pixel_bits==16)?1:3);i++) {
-		if (!driFillInModes(&m, fb_format_array[i].format,
-					fb_format_array[i].type,
-					depth_bits_array,
-					stencil_bits_array,
-					depth_buffer_factor,
-					back_buffer_modes,
-					back_buffer_factor,
-					GLX_TRUE_COLOR)) {
-		fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-				__func__, __LINE__ );
-		return NULL;
-		}
-
-		if (!driFillInModes(&m, fb_format_array[i].format,
-					fb_format_array[i].type,
-					depth_bits_array,
-					stencil_bits_array,
-					depth_buffer_factor,
-					back_buffer_modes,
-					back_buffer_factor,
-					GLX_DIRECT_COLOR)) {
-		fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-				__func__, __LINE__ );
-		return NULL;
-		}
-	}
-
-	return modes;
-}
-
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-				     const __GLcontextModes * modes,
-				     const __DRIversion * ddx_version,
-				     const __DRIversion * dri_version,
-				     const __DRIversion * drm_version,
-				     const __DRIframebuffer * frame_buffer,
-				     drmAddress pSAREA, int fd, 
-				     int internal_api_version,
-				     const __DRIinterfaceMethods * interface,
-				     __GLcontextModes ** driver_modes)
-			     
-{
-	__DRIscreenPrivate *psp;
-	static const __DRIversion ddx_expected = { 1, 2, 0 };
-	static const __DRIversion dri_expected = { 4, 0, 0 };
-	static const __DRIversion drm_expected = { 0, 0, NOUVEAU_DRM_HEADER_PATCHLEVEL };
-#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 9
-#error nouveau_drm.h version doesn't match expected version
-#endif
-	dri_interface = interface;
-
-	if (!driCheckDriDdxDrmVersions2("nouveau",
-					dri_version, & dri_expected,
-					ddx_version, & ddx_expected,
-					drm_version, & drm_expected)) {
-		return NULL;
-	}
-
-	// temporary lock step versioning
-	if (drm_expected.patch!=drm_version->patch) {
-		__driUtilMessage("%s: wrong DRM version, expected %d, got %d\n",
-				__func__,
-				drm_expected.patch, drm_version->patch);
-		return NULL;
-	}
-
-	psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				       ddx_version, dri_version, drm_version,
-				       frame_buffer, pSAREA, fd,
-				       internal_api_version, &nouveauAPI);
-	if ( psp != NULL ) {
-		NOUVEAUDRIPtr dri_priv = (NOUVEAUDRIPtr)psp->pDevPriv;
-
-		*driver_modes = nouveauFillInModes(dri_priv->bpp,
-						   (dri_priv->bpp == 16) ? 16 : 24,
-						   (dri_priv->bpp == 16) ? 0  : 8,
-						   1
-						   );
-
-		/* Calling driInitExtensions here, with a NULL context pointer, does not actually
-		 * enable the extensions.  It just makes sure that all the dispatch offsets for all
-		 * the extensions that *might* be enables are known.  This is needed because the
-		 * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-		 * enable the extensions until we have a context pointer.
-		 * 
-		 * Hello chicken.  Hello egg.  How are you two today?
-		 */
-		driInitExtensions( NULL, common_extensions, GL_FALSE );
-		driInitExtensions( NULL,   nv10_extensions, GL_FALSE );
-		driInitExtensions( NULL,   nv10_extensions, GL_FALSE );
-		driInitExtensions( NULL,   nv30_extensions, GL_FALSE );
-		driInitExtensions( NULL,   nv40_extensions, GL_FALSE );
-		driInitExtensions( NULL,   nv50_extensions, GL_FALSE );
-	}
-
-	return (void *) psp;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.h b/src/mesa/drivers/dri/nouveau/nouveau_screen.h
deleted file mode 100644
index bbe5810128f..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef __NOUVEAU_SCREEN_H__
-#define __NOUVEAU_SCREEN_H__
-
-#include "xmlconfig.h"
-
-#include "nouveau_dri.h"
-#include "nouveau_card.h"
-
-typedef struct {
-	nouveau_card* card;
-	uint32_t bus_type;
-	uint32_t agp_mode;
-
-        GLint fbFormat;
-
-	GLuint frontOffset;
-	GLuint frontPitch;
-	GLuint backOffset;
-	GLuint backPitch;
-
-	GLuint depthOffset;
-	GLuint depthPitch;
-	GLuint spanOffset;
-
-	__DRIscreenPrivate *driScreen;
-	unsigned int sarea_priv_offset;
-
-	/* Configuration cache with default values for all contexts */
-	driOptionCache optionCache;
-
-} nouveauScreenRec, *nouveauScreenPtr;
-
-
-#endif /* __NOUVEAU_SCREEN_H__ */
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader.c b/src/mesa/drivers/dri/nouveau/nouveau_shader.c
deleted file mode 100644
index b6837c5de14..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader.c
+++ /dev/null
@@ -1,833 +0,0 @@
-/*
- * Copyright (C) 2006 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- *   Ben Skeggs <darktama@iinet.net.au>
- */
-
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-#include "extensions.h"
-
-#include "shader/program.h"
-#include "shader/prog_instruction.h"
-/*#include "shader/arbprogparse.h"*/
-#include "tnl/tnl.h"
-
-#include "nouveau_context.h"
-#include "nouveau_shader.h"
-
-/*****************************************************************************
- * Mesa entry points
- */
-static void
-nouveauBindProgram(GLcontext *ctx, GLenum target, struct gl_program *prog)
-{
-   NVSDBG("target=%s, prog=%p\n", _mesa_lookup_enum_by_nr(target), prog);
-}
-
-static struct gl_program *
-nouveauNewProgram(GLcontext *ctx, GLenum target, GLuint id)
-{
-   nouveauShader *nvs;
-
-   NVSDBG("target=%s, id=%d\n", _mesa_lookup_enum_by_nr(target), id);
-
-   nvs = CALLOC_STRUCT(_nouveauShader);
-   NVSDBG("prog=%p\n", nvs);
-   switch (target) {
-   case GL_VERTEX_PROGRAM_ARB:
-      return _mesa_init_vertex_program(ctx, &nvs->mesa.vp, target, id);
-   case GL_FRAGMENT_PROGRAM_ARB:
-      return _mesa_init_fragment_program(ctx, &nvs->mesa.fp, target, id);
-   default:
-      _mesa_problem(ctx, "Unsupported shader target");
-      break;
-   }
-
-   FREE(nvs);
-   return NULL;
-}
-
-static void
-nouveauDeleteProgram(GLcontext *ctx, struct gl_program *prog)
-{
-   nouveauShader *nvs = (nouveauShader *)prog;
-
-   NVSDBG("prog=%p\n", prog);
-
-   if (nvs->translated)
-      FREE(nvs->program);
-   _mesa_delete_program(ctx, prog);
-}
-
-static void
-nouveauProgramStringNotify(GLcontext *ctx, GLenum target,
-      			   struct gl_program *prog)
-{
-   nouveauShader *nvs = (nouveauShader *)prog;
-
-   NVSDBG("target=%s, prog=%p\n", _mesa_lookup_enum_by_nr(target), prog);
-
-   if (nvs->translated)
-      FREE(nvs->program);
-
-   nvs->error      = GL_FALSE;
-   nvs->translated = GL_FALSE;
-
-   _tnl_program_string(ctx, target, prog);
-}
-
-static GLboolean
-nouveauIsProgramNative(GLcontext * ctx, GLenum target, struct gl_program *prog)
-{
-   nouveauShader *nvs = (nouveauShader *)prog;
-
-   NVSDBG("target=%s, prog=%p\n", _mesa_lookup_enum_by_nr(target), prog);
-
-   return nvs->translated;
-}
-
-GLboolean
-nvsUpdateShader(GLcontext *ctx, nouveauShader *nvs)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   struct gl_program_parameter_list *plist;
-   int i;
-
-   NVSDBG("prog=%p\n", nvs);
-
-   /* Translate to HW format now if necessary */
-   if (!nvs->translated) {
-      /* Mesa ASM shader -> nouveauShader */
-      if (!nouveau_shader_pass0(ctx, nvs))
-	 return GL_FALSE;
-      /* Basic dead code elimination + register usage info */
-      if (!nouveau_shader_pass1(nvs))
-	 return GL_FALSE;
-      /* nouveauShader -> HW bytecode, HW register alloc */
-      if (!nouveau_shader_pass2(nvs))
-	 return GL_FALSE;
-      assert(nvs->translated);
-      assert(nvs->program);
-   }
-   
-   /* Update state parameters */
-   plist = nvs->mesa.vp.Base.Parameters;
-   _mesa_load_state_parameters(ctx, plist);
-   for (i=0; i<nvs->param_high; i++) {
-      if (!nvs->params[i].in_use)
-	 continue;
-
-      if (!nvs->on_hardware) {
-	 /* if we've been kicked off the hardware there's no guarantee our
-	  * consts are still there.. reupload them all
-	  */
-	 nvs->func->UpdateConst(ctx, nvs, i);
-      } else if (nvs->params[i].source_val) {
-	 /* update any changed state parameters */
-	 if (!TEST_EQ_4V(nvs->params[i].val, nvs->params[i].source_val))
-	    nvs->func->UpdateConst(ctx, nvs, i);
-      }
-   }
-
-   /* Upload program to hardware, this must come after state param update
-    * as >=NV30 fragprogs inline consts into the bytecode.
-    */
-   if (!nvs->on_hardware) {
-      nouveauShader **current;
-
-      if (nvs->mesa.vp.Base.Target == GL_VERTEX_PROGRAM_ARB)
-	 current = &nmesa->current_vertprog;
-      else
-	 current = &nmesa->current_fragprog;
-      if (*current) (*current)->on_hardware = 0;
-
-      nvs->func->UploadToHW(ctx, nvs);
-      nvs->on_hardware = 1;
-
-      *current = nvs;
-   }
-
-   return GL_TRUE;
-}
-
-nouveauShader *
-nvsBuildTextShader(GLcontext *ctx, GLenum target, const char *text)
-{
-   nouveauShader *nvs;
-
-   nvs = CALLOC_STRUCT(_nouveauShader);
-   if (!nvs)
-      return NULL;
-
-   if (target == GL_VERTEX_PROGRAM_ARB) {
-      _mesa_init_vertex_program(ctx, &nvs->mesa.vp, GL_VERTEX_PROGRAM_ARB, 0);
-      _mesa_parse_arb_vertex_program(ctx,
-	    			     GL_VERTEX_PROGRAM_ARB,
-				     text,
-				     strlen(text),
-				     &nvs->mesa.vp);
-   } else if (target == GL_FRAGMENT_PROGRAM_ARB) {
-      _mesa_init_fragment_program(ctx, &nvs->mesa.fp, GL_FRAGMENT_PROGRAM_ARB, 0);
-      _mesa_parse_arb_fragment_program(ctx,
-	    			       GL_FRAGMENT_PROGRAM_ARB,
-				       text,
-				       strlen(text),
-				       &nvs->mesa.fp);
-   }
-
-   nouveau_shader_pass0(ctx, nvs);
-   nouveau_shader_pass1(nvs);
-   nouveau_shader_pass2(nvs);
-
-   return nvs;
-}
-
-static void
-nvsBuildPassthroughVP(GLcontext *ctx)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-   const char *vp_text =
-      "!!ARBvp1.0\n"
-      "OPTION ARB_position_invariant;"
-      ""
-      "MOV result.color, vertex.color;\n"
-      "MOV result.texcoord[0], vertex.texcoord[0];\n"
-      "MOV result.texcoord[1], vertex.texcoord[1];\n"
-      "MOV result.texcoord[2], vertex.texcoord[2];\n"
-      "MOV result.texcoord[3], vertex.texcoord[3];\n"
-      "MOV result.texcoord[4], vertex.texcoord[4];\n"
-      "MOV result.texcoord[5], vertex.texcoord[5];\n"
-      "MOV result.texcoord[6], vertex.texcoord[6];\n"
-      "MOV result.texcoord[7], vertex.texcoord[7];\n"
-      "END";
-
-   nmesa->passthrough_vp = nvsBuildTextShader(ctx,
-	 				      GL_VERTEX_PROGRAM_ARB,
-					      vp_text);
-}
-
-static void
-nvsBuildPassthroughFP(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	const char *fp_text =
-		"!!ARBfp1.0\n"
-		"MOV result.color, fragment.color;\n"
-		"END";
-
-	nmesa->passthrough_fp = nvsBuildTextShader(ctx,
-						   GL_FRAGMENT_PROGRAM_ARB,
-						   fp_text);
-}
-
-void
-nouveauShaderInitFuncs(GLcontext * ctx)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-   switch (nmesa->screen->card->type) {
-   case NV_20:
-      NV20VPInitShaderFuncs(&nmesa->VPfunc);
-      break;
-   case NV_30:
-      NV30VPInitShaderFuncs(&nmesa->VPfunc);
-      NV30FPInitShaderFuncs(&nmesa->FPfunc);
-      break;
-   case NV_40:
-   case NV_44:
-      NV40VPInitShaderFuncs(&nmesa->VPfunc);
-      NV40FPInitShaderFuncs(&nmesa->FPfunc);
-      break;
-   case NV_50:
-   default:
-      return;
-   }
-
-   /* Build a vertex program that simply passes through all attribs.
-    * Needed to do swtcl on nv40
-    */
-   if (nmesa->screen->card->type >= NV_40)
-      nvsBuildPassthroughVP(ctx);
-
-   /* Needed on NV30, even when using swtcl, if you want to get colours */
-   if (nmesa->screen->card->type >= NV_30)
-      nvsBuildPassthroughFP(ctx);
-
-   ctx->Const.VertexProgram.MaxNativeInstructions    = nmesa->VPfunc.MaxInst;
-   ctx->Const.VertexProgram.MaxNativeAluInstructions = nmesa->VPfunc.MaxInst;
-   ctx->Const.VertexProgram.MaxNativeTexInstructions = nmesa->VPfunc.MaxInst;
-   ctx->Const.VertexProgram.MaxNativeTexIndirections =
-      ctx->Const.VertexProgram.MaxNativeTexInstructions;
-   ctx->Const.VertexProgram.MaxNativeAttribs         = nmesa->VPfunc.MaxAttrib;
-   ctx->Const.VertexProgram.MaxNativeTemps           = nmesa->VPfunc.MaxTemp;
-   ctx->Const.VertexProgram.MaxNativeAddressRegs     = nmesa->VPfunc.MaxAddress;
-   ctx->Const.VertexProgram.MaxNativeParameters      = nmesa->VPfunc.MaxConst;
-
-   if (nmesa->screen->card->type >= NV_30) {
-      ctx->Const.FragmentProgram.MaxNativeInstructions    = nmesa->FPfunc.MaxInst;
-      ctx->Const.FragmentProgram.MaxNativeAluInstructions = nmesa->FPfunc.MaxInst;
-      ctx->Const.FragmentProgram.MaxNativeTexInstructions = nmesa->FPfunc.MaxInst;
-      ctx->Const.FragmentProgram.MaxNativeTexIndirections =
-	 ctx->Const.FragmentProgram.MaxNativeTexInstructions;
-      ctx->Const.FragmentProgram.MaxNativeAttribs         = nmesa->FPfunc.MaxAttrib;
-      ctx->Const.FragmentProgram.MaxNativeTemps           = nmesa->FPfunc.MaxTemp;
-      ctx->Const.FragmentProgram.MaxNativeAddressRegs     = nmesa->FPfunc.MaxAddress;
-      ctx->Const.FragmentProgram.MaxNativeParameters      = nmesa->FPfunc.MaxConst;
-   }
-
-   ctx->Driver.NewProgram		= nouveauNewProgram;
-   ctx->Driver.BindProgram		= nouveauBindProgram;
-   ctx->Driver.DeleteProgram		= nouveauDeleteProgram;
-   ctx->Driver.ProgramStringNotify	= nouveauProgramStringNotify;
-   ctx->Driver.IsProgramNative		= nouveauIsProgramNative;
-}
-
-
-/*****************************************************************************
- * Disassembly support structs
- */
-#define CHECK_RANGE(idx, arr) ((idx)<sizeof(_##arr)/sizeof(const char *)) \
-	? _##arr[(idx)] : #arr"_OOB"
-
-#define NODS      (1<<0)
-#define BRANCH_TR (1<<1)
-#define BRANCH_EL (1<<2)
-#define BRANCH_EN (1<<3)
-#define BRANCH_RE (1<<4)
-#define BRANCH_ALL (BRANCH_TR|BRANCH_EL|BRANCH_EN)
-#define COUNT_INC (1<<4)
-#define COUNT_IND (1<<5)
-#define COUNT_NUM (1<<6)
-#define COUNT_ALL (COUNT_INC|COUNT_IND|COUNT_NUM)
-#define TI_UNIT   (1<<7)
-struct _opcode_info
-{
-   const char *name;
-   int numsrc;
-   int flags;
-};
-
-static struct _opcode_info ops[] = {
-   [NVS_OP_ABS] = {"ABS", 1, 0},
-   [NVS_OP_ADD] = {"ADD", 2, 0},
-   [NVS_OP_ARA] = {"ARA", 1, 0},
-   [NVS_OP_ARL] = {"ARL", 1, 0},
-   [NVS_OP_ARR] = {"ARR", 1, 0},
-   [NVS_OP_BRA] = {"BRA", 0, NODS | BRANCH_TR},
-   [NVS_OP_BRK] = {"BRK", 0, NODS},
-   [NVS_OP_CAL] = {"CAL", 0, NODS | BRANCH_TR},
-   [NVS_OP_CMP] = {"CMP", 2, 0},
-   [NVS_OP_COS] = {"COS", 1, 0},
-   [NVS_OP_DIV] = {"DIV", 2, 0},
-   [NVS_OP_DDX] = {"DDX", 1, 0},
-   [NVS_OP_DDY] = {"DDY", 1, 0},
-   [NVS_OP_DP2] = {"DP2", 2, 0},
-   [NVS_OP_DP2A] = {"DP2A", 3, 0},
-   [NVS_OP_DP3] = {"DP3", 2, 0},
-   [NVS_OP_DP4] = {"DP4", 2, 0},
-   [NVS_OP_DPH] = {"DPH", 2, 0},
-   [NVS_OP_DST] = {"DST", 2, 0},
-   [NVS_OP_EX2] = {"EX2", 1, 0},
-   [NVS_OP_EXP] = {"EXP", 1, 0},
-   [NVS_OP_FLR] = {"FLR", 1, 0},
-   [NVS_OP_FRC] = {"FRC", 1, 0},
-   [NVS_OP_IF] = {"IF", 0, NODS | BRANCH_EL | BRANCH_EN},
-   [NVS_OP_KIL] = {"KIL", 1, 0},
-   [NVS_OP_LG2] = {"LG2", 1, 0},
-   [NVS_OP_LIT] = {"LIT", 1, 0},
-   [NVS_OP_LOG] = {"LOG", 1, 0},
-   [NVS_OP_LOOP] = {"LOOP", 0, NODS | COUNT_ALL | BRANCH_EN},
-   [NVS_OP_LRP] = {"LRP", 3, 0},
-   [NVS_OP_MAD] = {"MAD", 3, 0},
-   [NVS_OP_MAX] = {"MAX", 2, 0},
-   [NVS_OP_MIN] = {"MIN", 2, 0},
-   [NVS_OP_MOV] = {"MOV", 1, 0},
-   [NVS_OP_MUL] = {"MUL", 2, 0},
-   [NVS_OP_NRM] = {"NRM", 1, 0},
-   [NVS_OP_PK2H] = {"PK2H", 1, 0},
-   [NVS_OP_PK2US] = {"PK2US", 1, 0},
-   [NVS_OP_PK4B] = {"PK4B", 1, 0},
-   [NVS_OP_PK4UB] = {"PK4UB", 1, 0},
-   [NVS_OP_POW] = {"POW", 2, 0},
-   [NVS_OP_POPA] = {"POPA", 0, 0},
-   [NVS_OP_PUSHA] = {"PUSHA", 1, NODS},
-   [NVS_OP_RCC] = {"RCC", 1, 0},
-   [NVS_OP_RCP] = {"RCP", 1, 0},
-   [NVS_OP_REP] = {"REP", 0, NODS | BRANCH_EN | COUNT_NUM},
-   [NVS_OP_RET] = {"RET", 0, NODS},
-   [NVS_OP_RFL] = {"RFL", 1, 0},
-   [NVS_OP_RSQ] = {"RSQ", 1, 0},
-   [NVS_OP_SCS] = {"SCS", 1, 0},
-   [NVS_OP_SEQ] = {"SEQ", 2, 0},
-   [NVS_OP_SFL] = {"SFL", 2, 0},
-   [NVS_OP_SGE] = {"SGE", 2, 0},
-   [NVS_OP_SGT] = {"SGT", 2, 0},
-   [NVS_OP_SIN] = {"SIN", 1, 0},
-   [NVS_OP_SLE] = {"SLE", 2, 0},
-   [NVS_OP_SLT] = {"SLT", 2, 0},
-   [NVS_OP_SNE] = {"SNE", 2, 0},
-   [NVS_OP_SSG] = {"SSG", 1, 0},
-   [NVS_OP_STR] = {"STR", 2, 0},
-   [NVS_OP_SUB] = {"SUB", 2, 0},
-   [NVS_OP_TEX] = {"TEX", 1, TI_UNIT},
-   [NVS_OP_TXB] = {"TXB", 1, TI_UNIT},
-   [NVS_OP_TXD] = {"TXD", 3, TI_UNIT},
-   [NVS_OP_TXL] = {"TXL", 1, TI_UNIT},
-   [NVS_OP_TXP] = {"TXP", 1, TI_UNIT},
-   [NVS_OP_UP2H] = {"UP2H", 1, 0},
-   [NVS_OP_UP2US] = {"UP2US", 1, 0},
-   [NVS_OP_UP4B] = {"UP4B", 1, 0},
-   [NVS_OP_UP4UB] = {"UP4UB", 1, 0},
-   [NVS_OP_X2D] = {"X2D", 3, 0},
-   [NVS_OP_XPD] = {"XPD", 2, 0},
-   [NVS_OP_NOP] = {"NOP", 0, NODS},
-};
-
-static struct _opcode_info *
-_get_op_info(int op)
-{
-   if (op >= (sizeof(ops) / sizeof(struct _opcode_info)))
-      return NULL;
-   if (ops[op].name == NULL)
-      return NULL;
-   return &ops[op];
-}
-
-static const char *_SFR_STRING[] = {
-   [NVS_FR_POSITION] = "position",
-   [NVS_FR_WEIGHT] = "weight",
-   [NVS_FR_NORMAL] = "normal",
-   [NVS_FR_COL0] = "color",
-   [NVS_FR_COL1] = "color.secondary",
-   [NVS_FR_BFC0] = "bfc",
-   [NVS_FR_BFC1] = "bfc.secondary",
-   [NVS_FR_FOGCOORD] = "fogcoord",
-   [NVS_FR_POINTSZ] = "pointsize",
-   [NVS_FR_TEXCOORD0] = "texcoord[0]",
-   [NVS_FR_TEXCOORD1] = "texcoord[1]",
-   [NVS_FR_TEXCOORD2] = "texcoord[2]",
-   [NVS_FR_TEXCOORD3] = "texcoord[3]",
-   [NVS_FR_TEXCOORD4] = "texcoord[4]",
-   [NVS_FR_TEXCOORD5] = "texcoord[5]",
-   [NVS_FR_TEXCOORD6] = "texcoord[6]",
-   [NVS_FR_TEXCOORD7] = "texcoord[7]",
-   [NVS_FR_FRAGDATA0] = "data[0]",
-   [NVS_FR_FRAGDATA1] = "data[1]",
-   [NVS_FR_FRAGDATA2] = "data[2]",
-   [NVS_FR_FRAGDATA3] = "data[3]",
-   [NVS_FR_CLIP0] = "clip_plane[0]",
-   [NVS_FR_CLIP1] = "clip_plane[1]",
-   [NVS_FR_CLIP2] = "clip_plane[2]",
-   [NVS_FR_CLIP3] = "clip_plane[3]",
-   [NVS_FR_CLIP4] = "clip_plane[4]",
-   [NVS_FR_CLIP5] = "clip_plane[5]",
-   [NVS_FR_CLIP6] = "clip_plane[6]",
-   [NVS_FR_FACING] = "facing",
-};
-
-#define SFR_STRING(idx) CHECK_RANGE((idx), SFR_STRING)
-
-static const char *_SWZ_STRING[] = {
-   [NVS_SWZ_X] = "x",
-   [NVS_SWZ_Y] = "y",
-   [NVS_SWZ_Z] = "z",
-   [NVS_SWZ_W] = "w"
-};
-
-#define SWZ_STRING(idx) CHECK_RANGE((idx), SWZ_STRING)
-
-static const char *_NVS_PREC_STRING[] = {
-   [NVS_PREC_FLOAT32] = "R",
-   [NVS_PREC_FLOAT16] = "H",
-   [NVS_PREC_FIXED12] = "X",
-   [NVS_PREC_UNKNOWN] = "?"
-};
-
-#define NVS_PREC_STRING(idx) CHECK_RANGE((idx), NVS_PREC_STRING)
-
-static const char *_NVS_COND_STRING[] = {
-   [NVS_COND_FL] = "FL",
-   [NVS_COND_LT] = "LT",
-   [NVS_COND_EQ] = "EQ",
-   [NVS_COND_LE] = "LE",
-   [NVS_COND_GT] = "GT",
-   [NVS_COND_NE] = "NE",
-   [NVS_COND_GE] = "GE",
-   [NVS_COND_TR] = "TR",
-   [NVS_COND_UNKNOWN] = "??"
-};
-
-#define NVS_COND_STRING(idx) CHECK_RANGE((idx), NVS_COND_STRING)
-
-/*****************************************************************************
- * ShaderFragment dumping
- */
-static void
-nvsDumpIndent(int lvl)
-{
-   while (lvl--)
-      printf("  ");
-}
-
-static void
-nvsDumpSwizzle(nvsSwzComp *swz)
-{
-   printf(".%s%s%s%s",
-	  SWZ_STRING(swz[0]),
-	  SWZ_STRING(swz[1]), SWZ_STRING(swz[2]), SWZ_STRING(swz[3])
-      );
-}
-
-static void
-nvsDumpReg(nvsInstruction * inst, nvsRegister * reg)
-{
-   if (reg->negate)
-      printf("-");
-   if (reg->abs)
-      printf("abs(");
-
-   switch (reg->file) {
-   case NVS_FILE_TEMP:
-      printf("R%d", reg->index);
-      nvsDumpSwizzle(reg->swizzle);
-      break;
-   case NVS_FILE_ATTRIB:
-      printf("attrib.%s", SFR_STRING(reg->index));
-      nvsDumpSwizzle(reg->swizzle);
-      break;
-   case NVS_FILE_ADDRESS:
-      printf("A%d", reg->index);
-      break;
-   case NVS_FILE_CONST:
-      if (reg->indexed)
-	 printf("const[A%d.%s + %d]",
-		reg->addr_reg, SWZ_STRING(reg->addr_comp), reg->index);
-      else
-	 printf("const[%d]", reg->index);
-      nvsDumpSwizzle(reg->swizzle);
-      break;
-   default:
-      printf("UNKNOWN_FILE");
-      break;
-   }
-
-   if (reg->abs)
-      printf(")");
-}
-
-static void
-nvsDumpInstruction(nvsInstruction * inst, int slot, int lvl)
-{
-   struct _opcode_info *opr = &ops[inst->op];
-   int i;
-
-   nvsDumpIndent(lvl);
-   printf("%s ", opr->name);
-
-   if (!opr->flags & NODS) {
-      switch (inst->dest.file) {
-      case NVS_FILE_RESULT:
-	 printf("result.%s", SFR_STRING(inst->dest.index));
-	 break;
-      case NVS_FILE_TEMP:
-	 printf("R%d", inst->dest.index);
-	 break;
-      case NVS_FILE_ADDRESS:
-	 printf("A%d", inst->dest.index);
-	 break;
-      default:
-	 printf("UNKNOWN_DST_FILE");
-	 break;
-      }
-
-      if (inst->mask != SMASK_ALL) {
-	 printf(".");
-	 if (inst->mask & SMASK_X)
-	    printf("x");
-	 if (inst->mask & SMASK_Y)
-	    printf("y");
-	 if (inst->mask & SMASK_Z)
-	    printf("z");
-	 if (inst->mask & SMASK_W)
-	    printf("w");
-      }
-
-      if (opr->numsrc)
-	 printf(", ");
-   }
-
-   for (i = 0; i < opr->numsrc; i++) {
-      nvsDumpReg(inst, &inst->src[i]);
-      if (i != opr->numsrc - 1)
-	 printf(", ");
-   }
-   if (opr->flags & TI_UNIT)
-      printf(", texture[%d]", inst->tex_unit);
-
-   printf("\n");
-}
-
-void
-nvsDumpFragmentList(nvsFragmentHeader *f, int lvl)
-{
-   while (f) {
-      switch (f->type) {
-      case NVS_INSTRUCTION:
-	 nvsDumpInstruction((nvsInstruction*)f, 0, lvl);
-	 break;
-      default:
-	 fprintf(stderr, "%s: Only NVS_INSTRUCTION fragments can be in"
-	                 "nvsFragmentList!\n", __func__);
-	 return;
-      }
-      f = f->next;
-   }
-}
-
-/*****************************************************************************
- * HW shader disassembly
- */
-static void
-nvsDisasmHWShaderOp(nvsFunc * shader, int merged)
-{
-   struct _opcode_info *opi;
-   nvsOpcode op;
-   nvsRegFile file;
-   nvsSwzComp swz[4];
-   int i;
-
-   op = shader->GetOpcode(shader, merged);
-   opi = _get_op_info(op);
-   if (!opi) {
-      printf("NO OPINFO!");
-      return;
-   }
-
-   printf("%s", opi->name);
-   if (shader->GetPrecision &&
-       (!(opi->flags & BRANCH_ALL)) && (!(opi->flags * NODS)) &&
-       (op != NVS_OP_NOP))
-      printf("%s", NVS_PREC_STRING(shader->GetPrecision(shader)));
-   if (shader->SupportsConditional && shader->SupportsConditional(shader)) {
-      if (shader->GetConditionUpdate(shader)) {
-	 printf("C%d", shader->GetCondRegID(shader));
-      }
-   }
-   if (shader->GetSaturate && shader->GetSaturate(shader))
-      printf("_SAT");
-
-   if (!(opi->flags & NODS)) {
-      int mask = shader->GetDestMask(shader, merged);
-
-      switch (shader->GetDestFile(shader, merged)) {
-      case NVS_FILE_ADDRESS:
-	 printf(" A%d", shader->GetDestID(shader, merged));
-	 break;
-      case NVS_FILE_TEMP:
-	 printf(" R%d", shader->GetDestID(shader, merged));
-	 break;
-      case NVS_FILE_RESULT:
-	 printf(" result.%s", (SFR_STRING(shader->GetDestID(shader, merged))));
-	 break;
-      default:
-	 printf(" BAD_RESULT_FILE");
-	 break;
-      }
-
-      if (mask != SMASK_ALL) {
-	 printf(".");
-	 if (mask & SMASK_X) printf("x");
-	 if (mask & SMASK_Y) printf("y");
-	 if (mask & SMASK_Z) printf("z");
-	 if (mask & SMASK_W) printf("w");
-      }
-   }
-
-   if (shader->SupportsConditional && shader->SupportsConditional(shader) &&
-       shader->GetConditionTest(shader)) {
-      shader->GetCondRegSwizzle(shader, swz);
-
-      printf(" (%s%d.%s%s%s%s)",
-	    NVS_COND_STRING(shader->GetCondition(shader)),
-	    shader->GetCondRegID(shader),
-	    SWZ_STRING(swz[NVS_SWZ_X]),
-	    SWZ_STRING(swz[NVS_SWZ_Y]),
-	    SWZ_STRING(swz[NVS_SWZ_Z]),
-	    SWZ_STRING(swz[NVS_SWZ_W])
-	    );
-   }
-
-   /* looping */
-   if (opi->flags & COUNT_ALL) {
-      printf(" { ");
-      if (opi->flags & COUNT_NUM) {
-	 printf("%d", shader->GetLoopCount(shader));
-      }
-      if (opi->flags & COUNT_IND) {
-	 printf(", %d", shader->GetLoopInitial(shader));
-      }
-      if (opi->flags & COUNT_INC) {
-	 printf(", %d", shader->GetLoopIncrement(shader));
-      }
-      printf(" }");
-   }
-
-   /* branching */
-   if (opi->flags & BRANCH_TR)
-      printf(" %d", shader->GetBranch(shader));
-   if (opi->flags & BRANCH_EL)
-      printf(" ELSE %d", shader->GetBranchElse(shader));
-   if (opi->flags & BRANCH_EN)
-      printf(" END %d", shader->GetBranchEnd(shader));
-
-   if (!(opi->flags & NODS) && opi->numsrc)
-      printf(",");
-   printf(" ");
-
-   for (i = 0; i < opi->numsrc; i++) {
-      if (shader->GetSourceAbs(shader, merged, i))
-	 printf("abs(");
-      if (shader->GetSourceNegate(shader, merged, i))
-	 printf("-");
-
-      file = shader->GetSourceFile(shader, merged, i);
-      switch (file) {
-      case NVS_FILE_TEMP:
-	 printf("R%d", shader->GetSourceID(shader, merged, i));
-	 break;
-      case NVS_FILE_CONST:
-	 if (shader->GetSourceIndexed(shader, merged, i)) {
-	    printf("c[A%d.%s + 0x%x]",
-		     shader->GetRelAddressRegID(shader),
-		     SWZ_STRING(shader->GetRelAddressSwizzle(shader)),
-		     shader->GetSourceID(shader, merged, i)
-		  );
-	 } else {
-	    float val[4];
-
-	    if (shader->GetSourceConstVal) {
-	       shader->GetSourceConstVal(shader, merged, i, val);
-	       printf("{ %.02f, %.02f, %.02f, %.02f }",
-		     val[0], val[1], val[2], val[3]);
-	    } else {
-	       printf("c[0x%x]", shader->GetSourceID(shader, merged, i));
-	    }
-	 }
-	 break;
-      case NVS_FILE_ATTRIB:
-	 if (shader->GetSourceIndexed(shader, merged, i)) {
-	    printf("attrib[A%d.%s + %d]",
-		     shader->GetRelAddressRegID(shader),
-		     SWZ_STRING(shader->GetRelAddressSwizzle(shader)),
-		     shader->GetSourceID(shader, merged, i)
-		  );
-	 }
-	 else {
-	    printf("attrib.%s",
-		     SFR_STRING(shader->GetSourceID(shader, merged, i))
-		  );
-	 }
-	 break;
-      case NVS_FILE_ADDRESS:
-	 printf("A%d", shader->GetRelAddressRegID(shader));
-	 break;
-      default:
-	 printf("UNKNOWN_SRC_FILE");
-	 break;
-      }
-
-      shader->GetSourceSwizzle(shader, merged, i, swz);
-      if (file != NVS_FILE_ADDRESS &&
-	  (swz[NVS_SWZ_X] != NVS_SWZ_X || swz[NVS_SWZ_Y] != NVS_SWZ_Y ||
-	   swz[NVS_SWZ_Z] != NVS_SWZ_Z || swz[NVS_SWZ_W] != NVS_SWZ_W)) {
-	 printf(".%s%s%s%s", SWZ_STRING(swz[NVS_SWZ_X]),
-	       		     SWZ_STRING(swz[NVS_SWZ_Y]),
-			     SWZ_STRING(swz[NVS_SWZ_Z]),
-			     SWZ_STRING(swz[NVS_SWZ_W]));
-      }
-
-      if (shader->GetSourceAbs(shader, merged, i))
-	 printf(")");
-      if (shader->GetSourceScale) {
-	 int scale = shader->GetSourceScale(shader, merged, i);
-	 if (scale > 1)
-	    printf("{scaled %dx}", scale);
-      }
-      if (i < (opi->numsrc - 1))
-	 printf(", ");
-   }
-
-   if (shader->IsLastInst(shader))
-      printf(" + END");
-}
-
-void
-nvsDisasmHWShader(nvsPtr nvs)
-{
-   nvsFunc *shader = nvs->func;
-   unsigned int iaddr = 0;
-
-   if (!nvs->program) {
-      fprintf(stderr, "No HW program present");
-      return;
-   }
-
-   shader->inst = nvs->program;
-   while (1) {
-      if (shader->inst >= (nvs->program + nvs->program_size)) {
-	 fprintf(stderr, "Reached end of program, but HW inst has no END");
-	 break;
-      }
-
-      printf("\t0x%08x:\n", shader->inst[0]);
-      printf("\t0x%08x:\n", shader->inst[1]);
-      printf("\t0x%08x:\n", shader->inst[2]);
-      printf("\t0x%08x:", shader->inst[3]);
-
-      printf("\n\t\tINST %d.0: ", iaddr);
-      nvsDisasmHWShaderOp(shader, 0);
-      if (shader->HasMergedInst(shader)) {
-	 printf("\n\t\tINST %d.1: ", iaddr);
-	 nvsDisasmHWShaderOp(shader, 1);
-      }
-      printf("\n");
-
-      if (shader->IsLastInst(shader))
-	 break;
-
-      shader->inst += shader->GetOffsetNext(shader);
-      iaddr++;
-   }
-
-   printf("\n");
-}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader.h b/src/mesa/drivers/dri/nouveau/nouveau_shader.h
deleted file mode 100644
index 7125a2ae821..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader.h
+++ /dev/null
@@ -1,454 +0,0 @@
-#ifndef __SHADER_COMMON_H__
-#define __SHADER_COMMON_H__
-
-#include "mtypes.h"
-#include "bufferobj.h"
-
-#define NVSDBG(fmt, args...) do {                             \
-	if (NOUVEAU_DEBUG & DEBUG_SHADERS) {                  \
-		fprintf(stderr, "%s: "fmt, __func__, ##args); \
-	}                                                     \
-} while(0)
-
-typedef struct _nvsFunc nvsFunc;
-
-#define NVS_MAX_TEMPS   32
-#define NVS_MAX_ATTRIBS 16
-#define NVS_MAX_CONSTS  256
-#define NVS_MAX_ADDRESS 2
-#define NVS_MAX_INSNS   4096
-
-typedef struct _nvs_fragment_header {
-   struct _nvs_fragment_header *parent;
-   struct _nvs_fragment_header *prev;
-   struct _nvs_fragment_header *next;
-   enum {
-      NVS_INSTRUCTION,
-      NVS_BRANCH,
-      NVS_LOOP,
-      NVS_SUBROUTINE
-   } type;
-} nvsFragmentHeader;
-
-typedef union {
-	struct {
-		GLboolean uses_kil;
-		GLuint    num_regs;
-	} NV30FP;
-	struct {
-		uint32_t vp_in_reg;
-		uint32_t vp_out_reg;
-		uint32_t clip_enables;
-	} NV30VP;
-} nvsCardPriv;
-
-typedef struct _nouveauShader {
-   union {
-      struct gl_vertex_program vp;
-      struct gl_fragment_program fp;
-   } mesa;
-   GLcontext *ctx;
-   nvsFunc *func;
-
-   /* State of the final program */
-   GLboolean error;
-   GLboolean translated;
-   GLboolean on_hardware;
-   unsigned int *program;
-   unsigned int program_size;
-   unsigned int program_alloc_size;
-   unsigned int program_start_id;
-   unsigned int program_current;
-   struct gl_buffer_object *program_buffer;
-   int		inst_count;
-
-   nvsCardPriv card_priv;
-   int		vp_attrib_map[NVS_MAX_ATTRIBS];
-
-   struct {
-      GLboolean in_use;
-
-      GLfloat  *source_val;	/* NULL if invariant */
-      float	val[4];
-      /* Hardware-specific tracking, currently only nv30_fragprog
-       * makes use of it.
-       */
-      int	*hw_index;
-      int        hw_index_cnt;
-   } params[NVS_MAX_CONSTS];
-   int param_high;
-
-   /* Pass-private data */
-   void *pass_rec;
-
-   nvsFragmentHeader *program_tree;
-} nouveauShader, *nvsPtr;
-
-typedef enum {
-   NVS_FILE_NONE,
-   NVS_FILE_TEMP,
-   NVS_FILE_ATTRIB,
-   NVS_FILE_CONST,
-   NVS_FILE_RESULT,
-   NVS_FILE_ADDRESS,
-   NVS_FILE_UNKNOWN
-} nvsRegFile;
-
-typedef enum {
-   NVS_OP_UNKNOWN = 0,
-   NVS_OP_NOP,
-   NVS_OP_ABS, NVS_OP_ADD, NVS_OP_ARA, NVS_OP_ARL, NVS_OP_ARR,
-   NVS_OP_BRA, NVS_OP_BRK,
-   NVS_OP_CAL, NVS_OP_CMP, NVS_OP_COS,
-   NVS_OP_DDX, NVS_OP_DDY, NVS_OP_DIV, NVS_OP_DP2, NVS_OP_DP2A, NVS_OP_DP3,
-   NVS_OP_DP4, NVS_OP_DPH, NVS_OP_DST,
-   NVS_OP_EX2, NVS_OP_EXP,
-   NVS_OP_FLR, NVS_OP_FRC,
-   NVS_OP_IF,
-   NVS_OP_KIL,
-   NVS_OP_LG2, NVS_OP_LIT, NVS_OP_LOG, NVS_OP_LOOP, NVS_OP_LRP,
-   NVS_OP_MAD, NVS_OP_MAX, NVS_OP_MIN, NVS_OP_MOV, NVS_OP_MUL,
-   NVS_OP_NRM,
-   NVS_OP_PK2H, NVS_OP_PK2US, NVS_OP_PK4B, NVS_OP_PK4UB, NVS_OP_POW,
-   NVS_OP_POPA, NVS_OP_PUSHA,
-   NVS_OP_RCC, NVS_OP_RCP, NVS_OP_REP, NVS_OP_RET, NVS_OP_RFL, NVS_OP_RSQ,
-   NVS_OP_SCS, NVS_OP_SEQ, NVS_OP_SFL, NVS_OP_SGE, NVS_OP_SGT, NVS_OP_SIN,
-   NVS_OP_SLE, NVS_OP_SLT, NVS_OP_SNE, NVS_OP_SSG, NVS_OP_STR, NVS_OP_SUB,
-   NVS_OP_SWZ,
-   NVS_OP_TEX, NVS_OP_TXB, NVS_OP_TXD, NVS_OP_TXL, NVS_OP_TXP,
-   NVS_OP_UP2H, NVS_OP_UP2US, NVS_OP_UP4B, NVS_OP_UP4UB,
-   NVS_OP_X2D, NVS_OP_XPD,
-   NVS_OP_EMUL
-} nvsOpcode;
-
-typedef enum {
-   NVS_PREC_FLOAT32,
-   NVS_PREC_FLOAT16,
-   NVS_PREC_FIXED12,
-   NVS_PREC_UNKNOWN
-} nvsPrecision;
-
-typedef enum {
-   NVS_SWZ_X = 0,
-   NVS_SWZ_Y = 1,
-   NVS_SWZ_Z = 2,
-   NVS_SWZ_W = 3
-} nvsSwzComp;
-
-typedef enum {
-   NVS_FR_POSITION	= 0,
-   NVS_FR_WEIGHT	= 1,
-   NVS_FR_NORMAL	= 2,
-   NVS_FR_COL0		= 3,
-   NVS_FR_COL1		= 4,
-   NVS_FR_FOGCOORD	= 5,
-   NVS_FR_TEXCOORD0	= 8,
-   NVS_FR_TEXCOORD1	= 9,
-   NVS_FR_TEXCOORD2	= 10,
-   NVS_FR_TEXCOORD3	= 11,
-   NVS_FR_TEXCOORD4	= 12,
-   NVS_FR_TEXCOORD5	= 13,
-   NVS_FR_TEXCOORD6	= 14,
-   NVS_FR_TEXCOORD7	= 15,
-   NVS_FR_BFC0		= 16,
-   NVS_FR_BFC1		= 17,
-   NVS_FR_POINTSZ	= 18,
-   NVS_FR_FRAGDATA0	= 19,
-   NVS_FR_FRAGDATA1	= 20,
-   NVS_FR_FRAGDATA2	= 21,
-   NVS_FR_FRAGDATA3	= 22,
-   NVS_FR_CLIP0		= 23,
-   NVS_FR_CLIP1		= 24,
-   NVS_FR_CLIP2		= 25,
-   NVS_FR_CLIP3		= 26,
-   NVS_FR_CLIP4		= 27,
-   NVS_FR_CLIP5		= 28,
-   NVS_FR_CLIP6		= 29,
-   NVS_FR_FACING	= 30,
-   NVS_FR_UNKNOWN
-} nvsFixedReg;
-
-typedef enum {
-   NVS_COND_FL, NVS_COND_LT, NVS_COND_EQ, NVS_COND_LE, NVS_COND_GT,
-   NVS_COND_NE, NVS_COND_GE, NVS_COND_TR, NVS_COND_UN,
-   NVS_COND_UNKNOWN
-} nvsCond;
-
-typedef struct {
-   nvsRegFile	file;
-   unsigned int		index;
-
-   unsigned int		indexed;
-   unsigned int		addr_reg;
-   nvsSwzComp		addr_comp;
-
-   nvsSwzComp		swizzle[4];
-   int			negate;
-   int			abs;
-} nvsRegister;
-
-static const nvsRegister nvr_unused = {
-   .file	= NVS_FILE_ATTRIB,
-   .index	= 0,
-   .indexed	= 0,
-   .addr_reg	= 0,
-   .addr_comp	= NVS_SWZ_X,
-   .swizzle	= {NVS_SWZ_X, NVS_SWZ_Y, NVS_SWZ_Z, NVS_SWZ_W},
-   .negate	= 0,
-   .abs		= 0,
-};
-
-typedef enum {
-   NVS_TEX_TARGET_1D,
-   NVS_TEX_TARGET_2D,
-   NVS_TEX_TARGET_3D,
-   NVS_TEX_TARGET_CUBE,
-   NVS_TEX_TARGET_RECT,
-   NVS_TEX_TARGET_UNKNOWN = 0
-} nvsTexTarget;
-
-typedef enum {
-	NVS_SCALE_1X	 = 0,
-	NVS_SCALE_2X	 = 1,
-	NVS_SCALE_4X	 = 2,
-	NVS_SCALE_8X	 = 3,
-	NVS_SCALE_INV_2X = 5,
-	NVS_SCALE_INV_4X = 6,
-	NVS_SCALE_INV_8X = 7,
-} nvsScale;
-
-/* Arith/TEX instructions */
-typedef struct nvs_instruction {
-   nvsFragmentHeader header;
-
-   nvsOpcode	op;
-   unsigned int saturate;
-
-   nvsRegister	dest;
-   unsigned int	mask;
-   nvsScale	dest_scale;
-
-   nvsRegister	src[3];
-
-   unsigned int tex_unit;
-   nvsTexTarget tex_target;
-
-   nvsCond	cond;
-   nvsSwzComp	cond_swizzle[4];
-   int		cond_reg;
-   int		cond_test;
-   int		cond_update;
-} nvsInstruction;
-
-/* BRA, CAL, IF */
-typedef struct nvs_branch {
-	nvsFragmentHeader  header;
-
-	nvsOpcode	op;
-
-	nvsCond		cond;
-	nvsSwzComp	cond_swizzle[4];
-	int		cond_test;
-
-	nvsFragmentHeader *target_head;
-	nvsFragmentHeader *target_tail;
-	nvsFragmentHeader *else_head;
-	nvsFragmentHeader *else_tail;
-} nvsBranch;
-
-/* LOOP+ENDLOOP */
-typedef struct {
-	nvsFragmentHeader  header;
-
-	int                count;
-	int                initial;
-	int                increment;
-
-	nvsFragmentHeader *insn_head;
-	nvsFragmentHeader *insn_tail;
-} nvsLoop;
-
-/* label+following instructions */
-typedef struct nvs_subroutine {
-	nvsFragmentHeader  header;
-
-	char *             label;
-	nvsFragmentHeader *insn_head;
-	nvsFragmentHeader *insn_tail;
-} nvsSubroutine;
-
-#define SMASK_X (1<<0)
-#define SMASK_Y (1<<1)
-#define SMASK_Z (1<<2)
-#define SMASK_W (1<<3)
-#define SMASK_ALL (SMASK_X|SMASK_Y|SMASK_Z|SMASK_W)
-
-#define SPOS_ADDRESS 3
-struct _op_xlat {
-	unsigned int	NV;
-	nvsOpcode	SOP;
-	int		srcpos[3];
-};
-#define MOD_OPCODE(t,hw,sop,s0,s1,s2) do { \
-	t[hw].NV = hw; \
-	t[hw].SOP = sop; \
-	t[hw].srcpos[0] = s0; \
-	t[hw].srcpos[1] = s1; \
-	t[hw].srcpos[2] = s2; \
-} while(0)
-
-extern unsigned int NVVP_TX_VOP_COUNT;
-extern unsigned int NVVP_TX_NVS_OP_COUNT;
-extern struct _op_xlat NVVP_TX_VOP[];
-extern struct _op_xlat NVVP_TX_SOP[];
-
-extern unsigned int NVFP_TX_AOP_COUNT;
-extern unsigned int NVFP_TX_BOP_COUNT;
-extern struct _op_xlat NVFP_TX_AOP[];
-extern struct _op_xlat NVFP_TX_BOP[];
-
-extern void NV20VPTXSwizzle(int hwswz, nvsSwzComp *swz);
-extern nvsSwzComp NV20VP_TX_SWIZZLE[4];
-
-#define SCAP_SRC_ABS	(1<<0)
-
-struct _nvsFunc {
-   nvsCardPriv *card_priv;
-
-   unsigned int	MaxInst;
-   unsigned int	MaxAttrib;
-   unsigned int	MaxTemp;
-   unsigned int	MaxAddress;
-   unsigned int	MaxConst;
-   unsigned int	caps;
-
-   unsigned int *inst;
-   void		(*UploadToHW)		(GLcontext *, nouveauShader *);
-   void		(*UpdateConst)		(GLcontext *, nouveauShader *, int);
-
-   struct _op_xlat*(*GetOPTXRec)	(nvsFunc *, int merged);
-   struct _op_xlat*(*GetOPTXFromSOP)	(nvsOpcode, int *id);
-
-   void		(*InitInstruction)	(nvsFunc *);
-   int		(*SupportsOpcode)	(nvsFunc *, nvsOpcode);
-   int		(*SupportsResultScale)	(nvsFunc *, nvsScale);
-   void		(*SetOpcode)		(nvsFunc *, unsigned int opcode,
-	 				 int slot);
-   void		(*SetCCUpdate)		(nvsFunc *);
-   void		(*SetCondition)		(nvsFunc *, int on, nvsCond, int reg,
-	 				 nvsSwzComp *swizzle);
-   void		(*SetResult)		(nvsFunc *, nvsRegister *,
-	 				 unsigned int mask, int slot);
-   void		(*SetResultScale)	(nvsFunc *, nvsScale);
-   void		(*SetSource)		(nvsFunc *, nvsRegister *, int pos);
-   void		(*SetTexImageUnit)	(nvsFunc *, int unit);
-   void		(*SetSaturate)		(nvsFunc *);
-   void		(*SetLastInst)		(nvsFunc *);
-
-   void		(*SetBranchTarget)	(nvsFunc *, int addr);
-   void		(*SetBranchElse)	(nvsFunc *, int addr);
-   void		(*SetBranchEnd)		(nvsFunc *, int addr);
-   void		(*SetLoopParams)	(nvsFunc *, int cnt, int init, int inc);
-
-   int		(*HasMergedInst)	(nvsFunc *);
-   int		(*IsLastInst)		(nvsFunc *);
-   int		(*GetOffsetNext)	(nvsFunc *);
-
-   int		(*GetOpcodeSlot)	(nvsFunc *, int merged);
-   unsigned int	(*GetOpcodeHW)		(nvsFunc *, int slot);
-   nvsOpcode	(*GetOpcode)		(nvsFunc *, int merged);
-
-   nvsPrecision	(*GetPrecision)		(nvsFunc *);
-   int		(*GetSaturate)		(nvsFunc *);
-
-   nvsRegFile	(*GetDestFile)		(nvsFunc *, int merged);
-   unsigned int	(*GetDestID)		(nvsFunc *, int merged);
-   unsigned int	(*GetDestMask)		(nvsFunc *, int merged);
-
-   unsigned int	(*GetSourceHW)		(nvsFunc *, int merged, int pos);
-   nvsRegFile	(*GetSourceFile)	(nvsFunc *, int merged, int pos);
-   int		(*GetSourceID)		(nvsFunc *, int merged, int pos);
-   int		(*GetTexImageUnit)	(nvsFunc *);
-   int		(*GetSourceNegate)	(nvsFunc *, int merged, int pos);
-   int		(*GetSourceAbs)		(nvsFunc *, int merged, int pos);
-   void		(*GetSourceSwizzle)	(nvsFunc *, int merged, int pos,
-	 				 nvsSwzComp *swz);
-   int		(*GetSourceIndexed)	(nvsFunc *, int merged, int pos);
-   void		(*GetSourceConstVal)	(nvsFunc *, int merged, int pos,
-	 				 float *val);
-   int		(*GetSourceScale)	(nvsFunc *, int merged, int pos);
-
-   int		(*GetRelAddressRegID)	(nvsFunc *);
-   nvsSwzComp	(*GetRelAddressSwizzle)	(nvsFunc *);
-
-   int		(*SupportsConditional)	(nvsFunc *);
-   int		(*GetConditionUpdate)	(nvsFunc *);
-   int		(*GetConditionTest)	(nvsFunc *);
-   nvsCond	(*GetCondition)		(nvsFunc *);
-   void		(*GetCondRegSwizzle)	(nvsFunc *, nvsSwzComp *swz);
-   int		(*GetCondRegID)		(nvsFunc *);
-   int		(*GetBranch)		(nvsFunc *);
-   int		(*GetBranchElse)	(nvsFunc *);
-   int		(*GetBranchEnd)		(nvsFunc *);
-
-   int		(*GetLoopCount)		(nvsFunc *);
-   int		(*GetLoopInitial)	(nvsFunc *);
-   int		(*GetLoopIncrement)	(nvsFunc *);
-};
-
-static inline nvsRegister
-nvsNegate(nvsRegister reg)
-{
-   reg.negate = !reg.negate;
-   return reg;
-}
-
-static inline nvsRegister
-nvsAbs(nvsRegister reg)
-{
-   reg.abs = 1;
-   return reg;
-}
-
-static inline nvsRegister
-nvsSwizzle(nvsRegister reg, nvsSwzComp x, nvsSwzComp y,
-      	   nvsSwzComp z, nvsSwzComp w)
-{
-   nvsSwzComp sc[4] = { x, y, z, w };
-   nvsSwzComp oc[4];
-   int i;
-
-   for (i=0;i<4;i++)
-      oc[i] = reg.swizzle[i];
-   for (i=0;i<4;i++)
-      reg.swizzle[i] = oc[sc[i]];
-   return reg;
-}
-
-#define nvsProgramError(nvs,fmt,args...) do {                           \
-	fprintf(stderr, "nvsProgramError (%s): "fmt, __func__, ##args); \
-	(nvs)->error = GL_TRUE;                                         \
-	(nvs)->translated = GL_FALSE;                                   \
-} while(0)
-
-extern GLboolean nvsUpdateShader(GLcontext *ctx, nouveauShader *nvs);
-extern void nvsDisasmHWShader(nvsPtr);
-extern void nvsDumpFragmentList(nvsFragmentHeader *f, int lvl);
-extern nouveauShader *nvsBuildTextShader(GLcontext *ctx, GLenum target,
-      					 const char *text);
-
-extern void NV20VPInitShaderFuncs(nvsFunc *);
-extern void NV30VPInitShaderFuncs(nvsFunc *);
-extern void NV40VPInitShaderFuncs(nvsFunc *);
-
-extern void NV30FPInitShaderFuncs(nvsFunc *);
-extern void NV40FPInitShaderFuncs(nvsFunc *);
-
-extern void nouveauShaderInitFuncs(GLcontext *ctx);
-
-extern GLboolean nouveau_shader_pass0(GLcontext *ctx, nouveauShader *nvs);
-extern GLboolean nouveau_shader_pass1(nvsPtr nvs);
-extern GLboolean nouveau_shader_pass2(nvsPtr nvs);
-
-#endif
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c b/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c
deleted file mode 100644
index 8c203cc664b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader_0.c
+++ /dev/null
@@ -1,1050 +0,0 @@
-/*
- * Copyright (C) 2006 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- *   Ben Skeggs <darktama@iinet.net.au>
- */
-
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
-#include "shader/prog_instruction.h"
-#include "shader/prog_parameter.h"
-#include "shader/prog_statevars.h"
-#include "shader/programopt.h"
-
-#include "nouveau_context.h"
-#include "nouveau_shader.h"
-#include "nouveau_msg.h"
-
-static nvsFixedReg _tx_mesa_vp_dst_reg[VERT_RESULT_MAX] = {
-   NVS_FR_POSITION, NVS_FR_COL0, NVS_FR_COL1, NVS_FR_FOGCOORD,
-   NVS_FR_TEXCOORD0, NVS_FR_TEXCOORD1, NVS_FR_TEXCOORD2, NVS_FR_TEXCOORD3,
-   NVS_FR_TEXCOORD4, NVS_FR_TEXCOORD5, NVS_FR_TEXCOORD6, NVS_FR_TEXCOORD7,
-   NVS_FR_POINTSZ, NVS_FR_BFC0, NVS_FR_BFC1, NVS_FR_UNKNOWN /* EDGE */
-};
-
-static nvsFixedReg _tx_mesa_fp_dst_reg[FRAG_RESULT_MAX] = {
-   NVS_FR_FRAGDATA0 /* COLR */, NVS_FR_FRAGDATA0 /* COLH */,
-   NVS_FR_UNKNOWN /* DEPR */
-};
-
-static nvsFixedReg _tx_mesa_fp_src_reg[FRAG_ATTRIB_MAX] = {
-   NVS_FR_POSITION, NVS_FR_COL0, NVS_FR_COL1, NVS_FR_FOGCOORD,
-   NVS_FR_TEXCOORD0, NVS_FR_TEXCOORD1, NVS_FR_TEXCOORD2, NVS_FR_TEXCOORD3,
-   NVS_FR_TEXCOORD4, NVS_FR_TEXCOORD5, NVS_FR_TEXCOORD6, NVS_FR_TEXCOORD7
-};
-
-static nvsSwzComp _tx_mesa_swizzle[4] = {
-   NVS_SWZ_X, NVS_SWZ_Y, NVS_SWZ_Z, NVS_SWZ_W
-};
-
-static nvsOpcode _tx_mesa_opcode[] = {
-   [OPCODE_ABS] = NVS_OP_ABS, [OPCODE_ADD] = NVS_OP_ADD,
-   [OPCODE_ARA] = NVS_OP_ARA, [OPCODE_ARL] = NVS_OP_ARL,
-   [OPCODE_ARL_NV] = NVS_OP_ARL, [OPCODE_ARR] = NVS_OP_ARR,
-   [OPCODE_CMP] = NVS_OP_CMP, [OPCODE_COS] = NVS_OP_COS,
-   [OPCODE_DDX] = NVS_OP_DDX, [OPCODE_DDY] = NVS_OP_DDY,
-   [OPCODE_DP3] = NVS_OP_DP3, [OPCODE_DP4] = NVS_OP_DP4,
-   [OPCODE_DPH] = NVS_OP_DPH, [OPCODE_DST] = NVS_OP_DST,
-   [OPCODE_EX2] = NVS_OP_EX2, [OPCODE_EXP] = NVS_OP_EXP,
-   [OPCODE_FLR] = NVS_OP_FLR, [OPCODE_FRC] = NVS_OP_FRC,
-   [OPCODE_KIL] = NVS_OP_EMUL, [OPCODE_KIL_NV] = NVS_OP_KIL,
-   [OPCODE_LG2] = NVS_OP_LG2, [OPCODE_LIT] = NVS_OP_LIT,
-   [OPCODE_LOG] = NVS_OP_LOG,
-   [OPCODE_LRP] = NVS_OP_LRP,
-   [OPCODE_MAD] = NVS_OP_MAD, [OPCODE_MAX] = NVS_OP_MAX,
-   [OPCODE_MIN] = NVS_OP_MIN, [OPCODE_MOV] = NVS_OP_MOV,
-   [OPCODE_MUL] = NVS_OP_MUL,
-   [OPCODE_PK2H] = NVS_OP_PK2H, [OPCODE_PK2US] = NVS_OP_PK2US,
-   [OPCODE_PK4B] = NVS_OP_PK4B, [OPCODE_PK4UB] = NVS_OP_PK4UB,
-   [OPCODE_POW] = NVS_OP_POW, [OPCODE_POPA] = NVS_OP_POPA,
-   [OPCODE_PUSHA] = NVS_OP_PUSHA,
-   [OPCODE_RCC] = NVS_OP_RCC, [OPCODE_RCP] = NVS_OP_RCP,
-   [OPCODE_RFL] = NVS_OP_RFL, [OPCODE_RSQ] = NVS_OP_RSQ,
-   [OPCODE_SCS] = NVS_OP_SCS, [OPCODE_SEQ] = NVS_OP_SEQ,
-   [OPCODE_SFL] = NVS_OP_SFL, [OPCODE_SGE] = NVS_OP_SGE,
-   [OPCODE_SGT] = NVS_OP_SGT, [OPCODE_SIN] = NVS_OP_SIN,
-   [OPCODE_SLE] = NVS_OP_SLE, [OPCODE_SLT] = NVS_OP_SLT,
-   [OPCODE_SNE] = NVS_OP_SNE, [OPCODE_SSG] = NVS_OP_SSG,
-   [OPCODE_STR] = NVS_OP_STR, [OPCODE_SUB] = NVS_OP_SUB,
-   [OPCODE_SWZ] = NVS_OP_MOV,
-   [OPCODE_TEX] = NVS_OP_TEX, [OPCODE_TXB] = NVS_OP_TXB,
-   [OPCODE_TXD] = NVS_OP_TXD,
-   [OPCODE_TXL] = NVS_OP_TXL, [OPCODE_TXP] = NVS_OP_TXP,
-   [OPCODE_TXP_NV] = NVS_OP_TXP,
-   [OPCODE_UP2H] = NVS_OP_UP2H, [OPCODE_UP2US] = NVS_OP_UP2US,
-   [OPCODE_UP4B] = NVS_OP_UP4B, [OPCODE_UP4UB] = NVS_OP_UP4UB,
-   [OPCODE_X2D] = NVS_OP_X2D,
-   [OPCODE_XPD] = NVS_OP_XPD
-};
-
-static nvsCond _tx_mesa_condmask[] = {
-   NVS_COND_TR, /* workaround mesa not filling a valid value */
-   NVS_COND_GT, NVS_COND_LT, NVS_COND_UN, NVS_COND_GE,
-   NVS_COND_LE, NVS_COND_NE, NVS_COND_NE, NVS_COND_TR, NVS_COND_FL
-};
-
-struct pass0_rec {
-   int nvs_ipos;
-   int next_temp;
-
-   int mesa_const_base;
-   int mesa_const_last;
-
-   int swzconst_done;
-   int swzconst_id;
-   nvsRegister const_half;
-};
-
-#define X NVS_SWZ_X
-#define Y NVS_SWZ_Y
-#define Z NVS_SWZ_Z
-#define W NVS_SWZ_W
-
-#define FILL_CONDITION_FLAGS(fragment) do {                                    \
-	(fragment)->cond =                                                     \
-	pass0_make_condmask(inst->DstReg.CondMask);                            \
-	if ((fragment)->cond != NVS_COND_TR)                                   \
-		(fragment)->cond_test = 1;                                     \
-	(fragment)->cond_reg = inst->CondDst;                                  \
-	pass0_make_swizzle((fragment)->cond_swizzle, inst->DstReg.CondSwizzle);\
-} while(0)
-
-#define ARITH(op,dest,mask,sat,s0,s1,s2) do {               \
-	nvsinst = pass0_emit(nvs, parent, fpos, (op),       \
-		   (dest), (mask), (sat), (s0), (s1), (s2));\
-	FILL_CONDITION_FLAGS(nvsinst);                      \
-} while(0)
-
-#define ARITHu(op,dest,mask,sat,s0,s1,s2) do {              \
-	nvsinst = pass0_emit(nvs, parent, fpos, (op),       \
-		   (dest), (mask), (sat), (s0), (s1), (s2));\
-} while(0)
-
-static void
-pass0_append_fragment(nvsFragmentHeader *parent,
-		      nvsFragmentHeader *fragment,
-		      int pos)
-{
-	nvsFragmentHeader **head, **tail;
-	assert(parent && fragment);
-
-	switch (parent->type) {
-	case NVS_BRANCH:
-		if (pos == 0) {
-			head = &((nvsBranch *)parent)->target_head;
-			tail = &((nvsBranch *)parent)->target_tail;
-		} else {
-			head = &((nvsBranch *)parent)->else_head;
-			tail = &((nvsBranch *)parent)->else_tail;
-		}
-		break;
-	case NVS_LOOP:
-		head = &((nvsLoop *)parent)->insn_head;
-		tail = &((nvsLoop *)parent)->insn_tail;
-		break;
-	case NVS_SUBROUTINE:
-		head = &((nvsSubroutine *)parent)->insn_head;
-		tail = &((nvsSubroutine *)parent)->insn_tail;
-		break;
-	default:
-		assert(0);
-		break;
-	}
-
-	fragment->parent = parent;
-	fragment->prev   = *tail;
-	fragment->next   = NULL;
-	if (!(*head))
-		*head = fragment;
-	else
-		(*tail)->next = fragment;
-	*tail = fragment;
-
-}
-
-static nvsSubroutine *
-pass0_create_subroutine(nouveauShader *nvs, const char *label)
-{
-	nvsSubroutine *sub;
-
-	sub = CALLOC_STRUCT(nvs_subroutine);
-	if (sub) {
-		sub->header.type = NVS_SUBROUTINE;
-		sub->label	 = strdup(label);
-		if (!nvs->program_tree)
-			nvs->program_tree = &sub->header;
-		else
-			pass0_append_fragment(nvs->program_tree,
-					      &sub->header, 0);
-	}
-
-	return sub;
-}
-
-static void
-pass0_make_reg(nouveauShader *nvs, nvsRegister *reg,
-	       nvsRegFile file, unsigned int index)
-{
-	struct pass0_rec *rec = nvs->pass_rec;
-
-	/* defaults */
-	*reg = nvr_unused;
-	/* -1 == quick-and-dirty temp alloc */
-	if (file == NVS_FILE_TEMP && index == -1) {
-		index = rec->next_temp++;
-		assert(index < NVS_MAX_TEMPS);
-	}
-	reg->file   = file;
-	reg->index  = index;
-}
-
-static void
-pass0_make_swizzle(nvsSwzComp *swz, unsigned int mesa)
-{
-	int i;
-
-	for (i=0;i<4;i++)
-		swz[i] = _tx_mesa_swizzle[GET_SWZ(mesa, i)];
-}
-
-static nvsOpcode
-pass0_make_opcode(enum prog_opcode op)
-{
-	if (op > MAX_OPCODE)
-		return NVS_OP_UNKNOWN;
-	return _tx_mesa_opcode[op];
-}
-
-static nvsCond
-pass0_make_condmask(GLuint mesa)
-{
-	if (mesa > COND_FL)
-		return NVS_COND_UNKNOWN;
-	return _tx_mesa_condmask[mesa];
-}
-
-static unsigned int
-pass0_make_mask(GLuint mesa_mask)
-{
-	unsigned int mask = 0;
-
-	if (mesa_mask & WRITEMASK_X) mask |= SMASK_X;
-	if (mesa_mask & WRITEMASK_Y) mask |= SMASK_Y;
-	if (mesa_mask & WRITEMASK_Z) mask |= SMASK_Z;
-	if (mesa_mask & WRITEMASK_W) mask |= SMASK_W;
-
-	return mask;
-}
-
-static GLboolean
-pass0_opcode_is_tex(enum prog_opcode op)
-{
-	switch (op) {
-	case OPCODE_TEX:
-	case OPCODE_TXB:
-	case OPCODE_TXD:
-	case OPCODE_TXL:
-	case OPCODE_TXP:
-		return GL_TRUE;
-	default:
-		break;
-	}
-
-	return GL_FALSE;
-}
-
-static nvsTexTarget
-pass0_make_tex_target(GLuint mesa)
-{
-	switch (mesa) {
-	case TEXTURE_1D_INDEX: return NVS_TEX_TARGET_1D;
-	case TEXTURE_2D_INDEX: return NVS_TEX_TARGET_2D;
-	case TEXTURE_3D_INDEX: return NVS_TEX_TARGET_3D;
-	case TEXTURE_CUBE_INDEX: return NVS_TEX_TARGET_CUBE;
-	case TEXTURE_RECT_INDEX: return NVS_TEX_TARGET_RECT;
-	default:
-		return NVS_TEX_TARGET_UNKNOWN;
-	}
-}
-
-static void
-pass0_make_dst_reg(nvsPtr nvs, nvsRegister *reg,
-      		   struct prog_dst_register *dst)
-{
-	struct gl_program *mesa = (struct gl_program*)&nvs->mesa.vp;
-	nvsFixedReg sfr;
-
-	switch (dst->File) {
-	case PROGRAM_OUTPUT:
-		if (mesa->Target == GL_VERTEX_PROGRAM_ARB) {
-			sfr = (dst->Index < VERT_RESULT_MAX) ?
-				_tx_mesa_vp_dst_reg[dst->Index] :
-				NVS_FR_UNKNOWN;
-		} else {
-			sfr = (dst->Index < FRAG_RESULT_MAX) ?
-				_tx_mesa_fp_dst_reg[dst->Index] :
-				NVS_FR_UNKNOWN;
-		}
-		pass0_make_reg(nvs, reg, NVS_FILE_RESULT, sfr);
-		break;
-	case PROGRAM_TEMPORARY:
-		pass0_make_reg(nvs, reg, NVS_FILE_TEMP, dst->Index);
-		break;
-	case PROGRAM_ADDRESS:
-		pass0_make_reg(nvs, reg, NVS_FILE_ADDRESS, dst->Index);
-		break;
-	default:
-		fprintf(stderr, "Unknown dest file %d\n", dst->File);
-		assert(0);
-	}
-}
-
-static void
-pass0_make_src_reg(nvsPtr nvs, nvsRegister *reg, struct prog_src_register *src)
-{
-	struct pass0_rec *rec = nvs->pass_rec;
-	struct gl_program *mesa = (struct gl_program *)&nvs->mesa.vp.Base;
-	int i;
-
-	*reg = nvr_unused;
-
-	switch (src->File) {
-	case PROGRAM_INPUT:
-		reg->file = NVS_FILE_ATTRIB;
-		if (mesa->Target == GL_VERTEX_PROGRAM_ARB) {
-			for (i=0; i<NVS_MAX_ATTRIBS; i++) {
-				if (nvs->vp_attrib_map[i] == src->Index) {
-					reg->index = i;
-					break;
-				}
-			}
-			if (i==NVS_MAX_ATTRIBS)
-				reg->index = NVS_FR_UNKNOWN;
-		} else {
-			reg->index = (src->Index < FRAG_ATTRIB_MAX) ?
-				_tx_mesa_fp_src_reg[src->Index] :
-				NVS_FR_UNKNOWN;
-		}
-		break;
-	case PROGRAM_STATE_VAR:
-	case PROGRAM_NAMED_PARAM:
-	case PROGRAM_CONSTANT:
-		reg->file    = NVS_FILE_CONST;
-		reg->index   = src->Index + rec->mesa_const_base;
-		reg->indexed = src->RelAddr;
-		if (reg->indexed) {
-			reg->addr_reg  = 0;
-			reg->addr_comp = NVS_SWZ_X;
-		}
-		break;
-	case PROGRAM_TEMPORARY:
-		reg->file  = NVS_FILE_TEMP;
-		reg->index = src->Index;
-		break;
-	default:
-		fprintf(stderr, "Unknown source type %d\n", src->File);
-		assert(0);
-	}
-
-	/* per-component negate handled elsewhere */
-	reg->negate = src->NegateBase != 0;
-	reg->abs    = src->Abs;
-	pass0_make_swizzle(reg->swizzle, src->Swizzle);
-}
-
-static nvsInstruction *
-pass0_emit(nouveauShader *nvs, nvsFragmentHeader *parent, int fpos,
-	   nvsOpcode op, nvsRegister dst,
-	   unsigned int mask, int saturate,
-	   nvsRegister src0, nvsRegister src1, nvsRegister src2)
-{
-	nvsInstruction *sif;
-
-	sif = CALLOC_STRUCT(nvs_instruction);
-	if (!sif)
-		return NULL;
-
-	/* Seems mesa doesn't explicitly 0 this.. */
-	if (nvs->mesa.vp.Base.Target == GL_VERTEX_PROGRAM_ARB)
-		saturate = 0;
-
-	sif->op		= op;
-	sif->saturate	= saturate;
-	sif->dest	= dst;
-	sif->mask	= mask;
-	sif->dest_scale	= NVS_SCALE_1X;
-	sif->src[0]	= src0;
-	sif->src[1]	= src1;
-	sif->src[2]	= src2;
-	sif->cond	= COND_TR;
-	sif->cond_reg	= 0;
-	sif->cond_test	= 0;
-	sif->cond_update= 0;
-	pass0_make_swizzle(sif->cond_swizzle, SWIZZLE_NOOP);
-	pass0_append_fragment(parent, &sif->header, fpos);
-
-	return sif;
-}
-
-static void
-pass0_fixup_swizzle(nvsPtr nvs, nvsFragmentHeader *parent, int fpos,
-		    struct prog_src_register *src,
-		    unsigned int sm1,
-		    unsigned int sm2)
-{
-	static const float sc[4] = { 1.0, 0.0, -1.0, 0.0 };
-	struct pass0_rec *rec = nvs->pass_rec;
-	int fixup_1, fixup_2;
-	nvsInstruction *nvsinst;
-	nvsRegister sr, dr = nvr_unused;
-	nvsRegister sm1const, sm2const;
-
-	if (!rec->swzconst_done) {
-		struct gl_program *prog = &nvs->mesa.vp.Base;
-                GLuint swizzle;
-		rec->swzconst_id = _mesa_add_unnamed_constant(prog->Parameters,
-							      sc, 4, &swizzle);
-                /* XXX what about swizzle? */
-		rec->swzconst_done = 1;
-		COPY_4V(nvs->params[rec->swzconst_id].val, sc);
-	}
-
-	fixup_1 = (sm1 != MAKE_SWIZZLE4(0,0,0,0) &&
-			sm2 != MAKE_SWIZZLE4(2,2,2,2));
-	fixup_2 = (sm2 != MAKE_SWIZZLE4(2,2,2,2));
-
-	if (src->File != PROGRAM_TEMPORARY && src->File != PROGRAM_INPUT) {
-		/* We can't use more than one const in an instruction,
-		 * so move the const into a temp, and swizzle from there.
-		 *
-		 * TODO: should just emit the swizzled const, instead of
-		 *       swizzling it in the shader.. would need to reswizzle
-		 *       any state params when they change however..
-		 */
-		pass0_make_reg(nvs, &dr, NVS_FILE_TEMP, -1);
-		pass0_make_src_reg(nvs, &sr, src);
-		ARITHu(NVS_OP_MOV, dr, SMASK_ALL, 0,
-				 sr, nvr_unused, nvr_unused);
-		pass0_make_reg(nvs, &sr, NVS_FILE_TEMP, dr.index);
-	} else {
-		if (fixup_1)
-			src->NegateBase = 0;
-		pass0_make_src_reg(nvs, &sr, src);
-		pass0_make_reg(nvs, &dr, NVS_FILE_TEMP, -1);
-	}
-
-	pass0_make_reg(nvs, &sm1const, NVS_FILE_CONST, rec->swzconst_id);
-	pass0_make_swizzle(sm1const.swizzle, sm1);
-	if (fixup_1 && fixup_2) {
-		/* Any combination with SWIZZLE_ONE */
-		pass0_make_reg(nvs, &sm2const,
-				    NVS_FILE_CONST, rec->swzconst_id);
-		pass0_make_swizzle(sm2const.swizzle, sm2);
-		ARITHu(NVS_OP_MAD, dr, SMASK_ALL, 0, sr, sm1const, sm2const);
-	} else {
-		/* SWIZZLE_ZERO || arbitrary negate */
-		ARITHu(NVS_OP_MUL, dr, SMASK_ALL, 0, sr, sm1const, nvr_unused);
-	}
-
-	src->File	= PROGRAM_TEMPORARY;
-	src->Index	= dr.index;
-	src->Swizzle	= SWIZZLE_NOOP;
-}
-
-#define SET_SWZ(fs, cp, c) fs = (fs & ~(0x7<<(cp*3))) | (c<<(cp*3))
-static void
-pass0_check_sources(nvsPtr nvs, nvsFragmentHeader *parent, int fpos,
-		    struct prog_instruction *inst)
-{
-	unsigned int insrc = -1, constsrc = -1;
-	int i;
-
-	for (i=0;i<_mesa_num_inst_src_regs(inst->Opcode);i++) {
-		struct prog_src_register *src = &inst->SrcReg[i];
-		unsigned int sm_1 = 0, sm_2 = 0;
-		nvsRegister sr, dr;
-		int do_mov = 0, c;
-
-		/* Build up swizzle masks as if we were going to use
-		 * "MAD new, src, const1, const2" to support arbitrary negation
-		 * and SWIZZLE_ZERO/SWIZZLE_ONE.
-		 */
-		for (c=0;c<4;c++) {
-			if (GET_SWZ(src->Swizzle, c) == SWIZZLE_ZERO) {
-				SET_SWZ(sm_1, c, SWIZZLE_Y); /* 0.0 */
-				SET_SWZ(sm_2, c, SWIZZLE_Y);
-				SET_SWZ(src->Swizzle, c, SWIZZLE_X);
-			} else if (GET_SWZ(src->Swizzle, c) == SWIZZLE_ONE) {
-				SET_SWZ(sm_1, c, SWIZZLE_Y);
-				if (src->NegateBase & (1<<c))
-					SET_SWZ(sm_2, c, SWIZZLE_Z); /* -1.0 */
-				else
-					SET_SWZ(sm_2, c, SWIZZLE_X); /* 1.0 */
-				SET_SWZ(src->Swizzle, c, SWIZZLE_X);
-			} else {
-				if (src->NegateBase & (1<<c))
-					SET_SWZ(sm_1, c, SWIZZLE_Z); /* -[xyzw] */
-				else
-					SET_SWZ(sm_1, c, SWIZZLE_X); /*[xyzw]*/
-				SET_SWZ(sm_2, c, SWIZZLE_Y);
-			}
-		}
-
-		/* Unless we're multiplying by 1.0 or -1.0 on all components,
-		 * and we're adding nothing to any component we have to
-		 * emulate the swizzle.
-		 */
-		if ((sm_1 != MAKE_SWIZZLE4(0,0,0,0) &&
-					sm_1 != MAKE_SWIZZLE4(2,2,2,2)) ||
-				sm_2 != MAKE_SWIZZLE4(1,1,1,1)) {
-			pass0_fixup_swizzle(nvs, parent, fpos, src, sm_1, sm_2);
-			/* The source is definitely in a temp now, so don't
-			 * bother checking  for multiple ATTRIB/CONST regs.
-			 */
-			continue;
-		}
-
-		/* HW can't use more than one ATTRIB or PARAM in a single
-		 * instruction */
-		switch (src->File) {
-		case PROGRAM_INPUT:
-			if (insrc != -1 && insrc != src->Index) 
-				do_mov = 1;
-			else insrc = src->Index;
-			break;
-		case PROGRAM_STATE_VAR:
-			if (constsrc != -1 && constsrc != src->Index)
-				do_mov = 1;
-			else constsrc = src->Index;
-			break;
-		default:
-			break;
-		}
-
-		/* Emit any extra ATTRIB/CONST to a temp, and modify the Mesa
-		 * instruction to point at the temp.
-		 */
-		if (do_mov) {
-			pass0_make_src_reg(nvs, &sr, src);
-			pass0_make_reg(nvs, &dr, NVS_FILE_TEMP, -1);
-			pass0_emit(nvs, parent, fpos, NVS_OP_MOV,
-					dr, SMASK_ALL, 0,
-					sr, nvr_unused, nvr_unused);
-
-			src->File	= PROGRAM_TEMPORARY;
-			src->Index	= dr.index;
-			src->Swizzle= SWIZZLE_NOOP;
-		}
-	}
-}
-
-static GLboolean
-pass0_emulate_instruction(nouveauShader *nvs,
-			  nvsFragmentHeader *parent, int fpos,
-			  struct prog_instruction *inst)
-{
-	nvsFunc *shader = nvs->func;
-	nvsRegister src[3], dest, temp;
-	nvsInstruction *nvsinst;
-	unsigned int mask = pass0_make_mask(inst->DstReg.WriteMask);
-	int i, sat;
-
-	sat = (inst->SaturateMode == SATURATE_ZERO_ONE);
-
-	/* Build all the "real" regs for the instruction */
-	for (i=0; i<_mesa_num_inst_src_regs(inst->Opcode); i++)
-		pass0_make_src_reg(nvs, &src[i], &inst->SrcReg[i]);
-	if (inst->Opcode != OPCODE_KIL)
-		pass0_make_dst_reg(nvs, &dest, &inst->DstReg);
-
-	switch (inst->Opcode) {
-	case OPCODE_ABS:
-		if (shader->caps & SCAP_SRC_ABS)
-			ARITH(NVS_OP_MOV, dest, mask, sat,
-					nvsAbs(src[0]), nvr_unused, nvr_unused);
-		else
-			ARITH(NVS_OP_MAX, dest, mask, sat,
-					src[0], nvsNegate(src[0]), nvr_unused);
-		break;
-	case OPCODE_CMP:
-		/*XXX: this will clobber CC0... */
-		ARITH (NVS_OP_MOV, dest, mask, sat,
-				src[2], nvr_unused, nvr_unused);
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_MOV, temp, SMASK_ALL, 0,
-				src[0], nvr_unused, nvr_unused);
-		nvsinst->cond_update = 1;
-		nvsinst->cond_reg    = 0;
-		ARITH (NVS_OP_MOV, dest, mask, sat,
-				src[1], nvr_unused, nvr_unused);
-		nvsinst->cond      = COND_LT;
-		nvsinst->cond_reg  = 0;
-		nvsinst->cond_test = 1;
-		break;
-	case OPCODE_DPH:
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_DP3, temp, SMASK_X, 0,
-				 src[0], src[1], nvr_unused);
-		ARITH (NVS_OP_ADD, dest, mask, sat,
-				 nvsSwizzle(temp, X, X, X, X),
-				 nvsSwizzle(src[1], W, W, W, W),
-				 nvr_unused);
-		break;
-	case OPCODE_KIL:
-		/* This is only in ARB shaders, so we don't have to worry
-		 * about clobbering a CC reg as they aren't supported anyway.
-		 *XXX: might have to worry with GLSL however...
-		 */
-		/* MOVC0 temp, src */
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_MOV, temp, SMASK_ALL, 0,
-				 src[0], nvr_unused, nvr_unused);
-		nvsinst->cond_update = 1;
-		nvsinst->cond_reg    = 0;
-		/* KIL_NV (LT0.xyzw) temp */
-		ARITHu(NVS_OP_KIL, nvr_unused, 0, 0,
-				 nvr_unused, nvr_unused, nvr_unused);
-		nvsinst->cond      = COND_LT;
-		nvsinst->cond_reg  = 0;
-		nvsinst->cond_test = 1;
-		pass0_make_swizzle(nvsinst->cond_swizzle, SWIZZLE_NOOP);
-		break;
-	case OPCODE_LRP:
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_MAD, temp, mask, 0,
-				 nvsNegate(src[0]), src[2], src[2]);
-		ARITH (NVS_OP_MAD, dest, mask, sat, src[0], src[1], temp);
-		break;
-	case OPCODE_POW:
-		if (shader->SupportsOpcode(shader, NVS_OP_LG2) &&
-				shader->SupportsOpcode(shader, NVS_OP_EX2)) {
-			pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-			/* LG2 temp.x, src0.c */
-			ARITHu(NVS_OP_LG2, temp, SMASK_X, 0,
-					 nvsSwizzle(src[0], X, X, X, X),
-					 nvr_unused, nvr_unused);
-			/* MUL temp.x, temp.x, src1.c */
-			ARITHu(NVS_OP_MUL, temp, SMASK_X, 0,
-					 nvsSwizzle(temp, X, X, X, X),
-					 nvsSwizzle(src[1], X, X, X, X),
-					 nvr_unused);
-			/* EX2 dest, temp.x */
-			ARITH (NVS_OP_EX2, dest, mask, sat,
-					 nvsSwizzle(temp, X, X, X, X),
-					 nvr_unused, nvr_unused);
-		} else {
-			/* can we use EXP/LOG instead of EX2/LG2?? */
-			fprintf(stderr, "Implement POW for NV20 vtxprog!\n");
-			return GL_FALSE;
-		}
-		break;
-	case OPCODE_RSQ:
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_LG2, temp, SMASK_X, 0,
-				 nvsAbs(nvsSwizzle(src[0], X, X, X, X)),
-				 nvr_unused, nvr_unused);
-		nvsinst->dest_scale = NVS_SCALE_INV_2X;
-		ARITH (NVS_OP_EX2, dest, mask, sat,
-				 nvsNegate(nvsSwizzle(temp, X, X, X, X)),
-				 nvr_unused, nvr_unused);
-		break;
-	case OPCODE_SCS:
-		if (mask & SMASK_X)
-			ARITH(NVS_OP_COS, dest, SMASK_X, sat,
-					nvsSwizzle(src[0], X, X, X, X),
-					nvr_unused, nvr_unused);
-		if (mask & SMASK_Y)
-			ARITH(NVS_OP_SIN, dest, SMASK_Y, sat,
-					nvsSwizzle(src[0], X, X, X, X),
-					nvr_unused, nvr_unused);
-		break;
-	case OPCODE_SUB:
-		ARITH(NVS_OP_ADD, dest, mask, sat,
-				src[0], nvsNegate(src[1]), nvr_unused);
-		break;
-	case OPCODE_XPD:
-		pass0_make_reg(nvs, &temp, NVS_FILE_TEMP, -1);
-		ARITHu(NVS_OP_MUL, temp, SMASK_ALL, 0,
-				 nvsSwizzle(src[0], Z, X, Y, Y),
-				 nvsSwizzle(src[1], Y, Z, X, X),
-				 nvr_unused);
-		ARITH (NVS_OP_MAD, dest, (mask & ~SMASK_W), sat,
-				 nvsSwizzle(src[0], Y, Z, X, X),
-				 nvsSwizzle(src[1], Z, X, Y, Y),
-				 nvsNegate(temp));
-		break;
-	default:
-		WARN_ONCE("hw doesn't support opcode \"%s\","
-			  "and no emulation found\n",
-			  _mesa_opcode_string(inst->Opcode));
-		return GL_FALSE;
-	}
-
-	return GL_TRUE;
-}
-
-static GLboolean
-pass0_translate_arith(nouveauShader *nvs, struct gl_program *prog,
-					  int ipos, int fpos,
-					  nvsFragmentHeader *parent)
-{
-	struct prog_instruction *inst = &prog->Instructions[ipos];
-	nvsFunc *shader = nvs->func;
-	nvsInstruction *nvsinst;
-	GLboolean ret;
-
-	/* Deal with multiple ATTRIB/PARAM in a single instruction */
-	pass0_check_sources(nvs, parent, fpos, inst);
-
-	/* Now it's safe to do the prog_instruction->nvsInstruction
-	 * conversion
-	 */
-	if (shader->SupportsOpcode(shader,
-				   pass0_make_opcode(inst->Opcode))) {
-		nvsRegister src[3], dest;
-		int i;
-
-		for (i=0; i<_mesa_num_inst_src_regs(inst->Opcode); i++)
-			pass0_make_src_reg(nvs, &src[i], &inst->SrcReg[i]);
-		pass0_make_dst_reg(nvs, &dest, &inst->DstReg);
-
-		ARITH(pass0_make_opcode(inst->Opcode), dest,
-				pass0_make_mask(inst->DstReg.WriteMask),
-				(inst->SaturateMode != SATURATE_OFF),
-				src[0], src[1], src[2]);
-		nvsinst->tex_unit   = inst->TexSrcUnit;
-		if (pass0_opcode_is_tex(inst->Opcode))
-			nvsinst->tex_target =
-				pass0_make_tex_target(inst->TexSrcTarget);
-		else
-			nvsinst->tex_target = NVS_TEX_TARGET_UNKNOWN;
-
-		ret = GL_TRUE;
-	} else
-		ret = pass0_emulate_instruction(nvs, parent, fpos, inst);
-
-	return ret;
-}
-
-static GLboolean
-pass0_translate_instructions(nouveauShader *nvs, int ipos, int fpos,
-						 nvsFragmentHeader *parent)
-{
-	struct gl_program *prog = (struct gl_program *)&nvs->mesa.vp;
-
-	while (1) {
-		struct prog_instruction *inst = &prog->Instructions[ipos];
-
-		switch (inst->Opcode) {
-		case OPCODE_END:
-			return GL_TRUE;
-		case OPCODE_BRA:
-		case OPCODE_CAL:
-		case OPCODE_RET:
-		//case OPCODE_LOOP:
-		//case OPCODE_ENDLOOP:
-		//case OPCODE_IF:
-		//case OPCODE_ELSE:
-		//case OPCODE_ENDIF:
-			WARN_ONCE("branch ops unimplemented\n");
-			return GL_FALSE;
-			break;
-		default:
-			if (!pass0_translate_arith(nvs, prog,
-						   ipos, fpos, parent))
-				return GL_FALSE;
-			break;
-		}
-
-		ipos++;
-	}
-
-	return GL_TRUE;
-}
-
-static void
-pass0_build_attrib_map(nouveauShader *nvs, struct gl_vertex_program *vp)
-{
-	GLuint inputs_read = vp->Base.InputsRead;
-	GLuint input_alloc = ~0xFFFF;
-	int i;
-
-	for (i=0; i<NVS_MAX_ATTRIBS; i++)
-		nvs->vp_attrib_map[i] = -1;
-
-	while (inputs_read) {
-		int in = ffs(inputs_read) - 1;
-		int hw;
-		inputs_read &= ~(1<<in);
-
-		if (vp->IsNVProgram) {
-			/* NVvp: must alias */
-			if (in >= VERT_ATTRIB_GENERIC0)
-				hw = in - VERT_ATTRIB_GENERIC0;
-			else
-				hw = in;
-		} else {
-			/* ARBvp: may alias (but we won't)
-			 * GL2.0: must not alias
-			 */
-			if (in >= VERT_ATTRIB_GENERIC0)
-				hw = ffs(~input_alloc) - 1;
-			else 
-				hw = in;
-			input_alloc |= (1<<hw);
-		}
-
-		nvs->vp_attrib_map[hw] = in;
-	}
-
-	if (NOUVEAU_DEBUG & DEBUG_SHADERS) {
-		printf("vtxprog attrib map:\n");
-		for (i=0; i<NVS_MAX_ATTRIBS; i++) {
-			printf(" hw:%d = attrib:%d\n",
-					i, nvs->vp_attrib_map[i]);
-		}
-	}
-}
-
-static void
-pass0_vp_insert_ff_clip_planes(GLcontext *ctx, nouveauShader *nvs)
-{
-	struct gl_program *prog = &nvs->mesa.vp.Base;
-	nvsFragmentHeader *parent = nvs->program_tree;
-	nvsInstruction *nvsinst;
-	GLuint fpos = 0;
-	nvsRegister opos, epos, eqn, mv[4];
-	gl_state_index tokens[STATE_LENGTH]
-           = { STATE_MODELVIEW_MATRIX, 0, 0, 0, 0 };
-	GLint id;
-	int i;
-
-	/* modelview transform */
-	pass0_make_reg(nvs, &opos, NVS_FILE_ATTRIB, NVS_FR_POSITION);
-	pass0_make_reg(nvs, &epos, NVS_FILE_TEMP  , -1);
-	for (i=0; i<4; i++) {
-		tokens[2] = tokens[3] = i;
-		id = _mesa_add_state_reference(prog->Parameters, tokens);
-		pass0_make_reg(nvs, &mv[i], NVS_FILE_CONST, id);
-	}
-	ARITHu(NVS_OP_DP4, epos, SMASK_X, 0, opos, mv[0], nvr_unused);
-	ARITHu(NVS_OP_DP4, epos, SMASK_Y, 0, opos, mv[1], nvr_unused);
-	ARITHu(NVS_OP_DP4, epos, SMASK_Z, 0, opos, mv[2], nvr_unused);
-	ARITHu(NVS_OP_DP4, epos, SMASK_W, 0, opos, mv[3], nvr_unused);
-
-	/* Emit code to emulate fixed-function glClipPlane */
-	for (i=0; i<6; i++) {
-		GLuint clipmask = SMASK_X;
-		nvsRegister clip;
-
-		if (!(ctx->Transform.ClipPlanesEnabled & (1<<i)))
-			continue;
-
-		/* Point a const at a user clipping plane */
-		tokens[0] = STATE_CLIPPLANE;
-		tokens[1] = i;
-		id = _mesa_add_state_reference(prog->Parameters, tokens);
-		pass0_make_reg(nvs, &eqn , NVS_FILE_CONST , id);
-		pass0_make_reg(nvs, &clip, NVS_FILE_RESULT, NVS_FR_CLIP0 + i);
-
-		/*XXX: something else needs to take care of modifying the
-		 *     instructions to write to the correct hw clip register.
-		 */
-		switch (i) {
-		case 0: case 3:	clipmask = SMASK_Y; break;
-		case 1: case 4: clipmask = SMASK_Z; break;
-		case 2: case 5: clipmask = SMASK_W; break;
-		}
-
-		/* Emit transform */
-		ARITHu(NVS_OP_DP4, clip, clipmask, 0, epos, eqn, nvr_unused);
-	}
-}
-
-static void
-pass0_rebase_mesa_consts(nouveauShader *nvs)
-{
-	struct pass0_rec *rec = nvs->pass_rec;
-	struct gl_program *prog = &nvs->mesa.vp.Base;
-	struct prog_instruction *inst = prog->Instructions;
-	int i;
-
-	/*XXX: not a good idea, params->hw_index is malloc'd */
-	memset(nvs->params, 0x00, sizeof(nvs->params));
-
-	/* When doing relative addressing on constants, the hardware needs us
-	 * to fill the "const id" field with a positive value.  Determine the
-	 * most negative index that is used so that all accesses to a
-	 * mesa-provided constant can be rebased to a positive index.
-	 */
-	while (inst->Opcode != OPCODE_END) {
-		for (i=0; i<_mesa_num_inst_src_regs(inst->Opcode); i++) {
-			struct prog_src_register *src = &inst->SrcReg[i];
-
-			switch (src->File) {
-			case PROGRAM_STATE_VAR:
-			case PROGRAM_CONSTANT:
-			case PROGRAM_NAMED_PARAM:
-				if (src->RelAddr && src->Index < 0) {
-					int base = src->Index * -1;
-					if (rec->mesa_const_base < base)
-						rec->mesa_const_base = base;
-				}
-				break;
-			default:
-				break;
-			}
-		}
-
-		inst++;
-	}
-}
-
-static GLboolean
-pass0_resolve_mesa_consts(nouveauShader *nvs)
-{
-	struct pass0_rec *rec = nvs->pass_rec;
-	struct gl_program *prog = &nvs->mesa.vp.Base;
-	struct gl_program_parameter_list *plist = prog->Parameters;
-	int i;
-
-	/* Init all const tracking/alloc info from the parameter list, rather
-	 * than doing it as we translate the program.  Otherwise:
-	 *   1) we can't get at the correct constant info when relative
-	 *      addressing is being used due to src->Index not pointing
-	 *      at the exact const;
-	 *   2) as we add extra consts to the program, mesa will call realloc()
-	 *      and we get invalid pointers to the const data.
-	 */
-	rec->mesa_const_last = plist->NumParameters + rec->mesa_const_base;
-	nvs->param_high = rec->mesa_const_last;
-	for (i=0; i<plist->NumParameters; i++) {
-		int hw = rec->mesa_const_base + i;
-
-		if (hw > NVS_MAX_CONSTS) {
-			nvsProgramError(nvs, "hw = %d > NVS_MAX_CONSTS!\n", hw);
-			return GL_FALSE;
-		}
-
-		switch (plist->Parameters[i].Type) {
-		case PROGRAM_NAMED_PARAM:
-		case PROGRAM_STATE_VAR:
-			nvs->params[hw].in_use     = GL_TRUE;
-			nvs->params[hw].source_val = plist->ParameterValues[i];
-			COPY_4V(nvs->params[hw].val, plist->ParameterValues[i]);
-			break;
-		case PROGRAM_CONSTANT:
-			nvs->params[hw].in_use     = GL_TRUE;
-			nvs->params[hw].source_val = NULL;
-			COPY_4V(nvs->params[hw].val, plist->ParameterValues[i]);
-			break;
-		default:
-			nvsProgramError(nvs, "hit bad type=%d on param %d\n",
-					plist->Parameters[i].Type, i);
-			return GL_FALSE;
-		}
-	}
-
-	return GL_TRUE;
-}
-
-GLboolean
-nouveau_shader_pass0(GLcontext *ctx, nouveauShader *nvs)
-{
-	nouveauContextPtr           nmesa = NOUVEAU_CONTEXT(ctx);
-	struct gl_program          *prog  = (struct gl_program*)nvs;
-	struct gl_vertex_program   *vp    = (struct gl_vertex_program *)prog;
-	struct gl_fragment_program *fp    = (struct gl_fragment_program *)prog;
-	struct pass0_rec *rec;
-	int ret = GL_FALSE;
-
-	NVSDBG("start: nvs=%p\n", nvs);
-
-	/* Previously detected an error, and haven't recieved new program
-	 * string, so fail immediately.
-	 */
-	if (nvs->error) {
-		NVSDBG("failed previous compile attempt, not retrying\n");
-		return GL_FALSE;
-	}
-
-	rec = CALLOC_STRUCT(pass0_rec);
-	if (!rec)
-		return GL_FALSE;
-
-	rec->next_temp = prog->NumTemporaries;
-	nvs->pass_rec  = rec;
-		
-	nvs->program_tree = (nvsFragmentHeader*)
-		pass0_create_subroutine(nvs, "program body");
-	if (!nvs->program_tree) {
-		FREE(rec);
-		return GL_FALSE;
-	}
-
-	switch (prog->Target) {
-	case GL_VERTEX_PROGRAM_ARB:
-		nvs->func = &nmesa->VPfunc;
-
-		if (vp->IsPositionInvariant)
-			_mesa_insert_mvp_code(ctx, vp);
-		pass0_rebase_mesa_consts(nvs);
-
-		if (!prog->String && ctx->Transform.ClipPlanesEnabled)
-			pass0_vp_insert_ff_clip_planes(ctx, nvs);
-
-		pass0_build_attrib_map(nvs, vp);
-		break;
-	case GL_FRAGMENT_PROGRAM_ARB:
-		nvs->func = &nmesa->FPfunc;
-
-		if (fp->FogOption != GL_NONE)
-			_mesa_append_fog_code(ctx, fp);
-		pass0_rebase_mesa_consts(nvs);
-		break;
-	default:
-		fprintf(stderr, "Unknown program type %d", prog->Target);
-		FREE(rec);
-		/* DESTROY TREE!! */
-		return GL_FALSE;
-	}
-	nvs->func->card_priv = &nvs->card_priv;
-
-	ret = pass0_translate_instructions(nvs, 0, 0, nvs->program_tree);
-	if (ret)
-		ret = pass0_resolve_mesa_consts(nvs);	
-	
-	/*XXX: if (!ret) DESTROY TREE!!! */
-
-	FREE(rec);
-	return ret;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader_1.c b/src/mesa/drivers/dri/nouveau/nouveau_shader_1.c
deleted file mode 100644
index 78c1401f7db..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader_1.c
+++ /dev/null
@@ -1,16 +0,0 @@
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
-#include "nouveau_context.h"
-#include "nouveau_shader.h"
-
-GLboolean
-nouveau_shader_pass1(nvsPtr nvs)
-{
-   NVSDBG("start: nvs=%p\n", nvs);
-
-   return GL_TRUE;
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_shader_2.c b/src/mesa/drivers/dri/nouveau/nouveau_shader_2.c
deleted file mode 100644
index cd27daca88b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_shader_2.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/*
- * Copyright (C) 2006 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-/*
- * Authors:
- *   Ben Skeggs <darktama@iinet.net.au>
- */
-
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-
-#include "shader/prog_parameter.h"
-#include "shader/prog_print.h"
-
-#include "nouveau_context.h"
-#include "nouveau_shader.h"
-#include "nouveau_msg.h"
-
-struct pass2_rec {
-	/* Map nvsRegister temp ID onto hw temp ID */
-	unsigned int temps[NVS_MAX_TEMPS];
-	/* Track free hw registers */
-	unsigned int hw_temps[NVS_MAX_TEMPS];
-};
-
-static int
-pass2_alloc_hw_temp(nvsPtr nvs)
-{
-	struct pass2_rec *rec = nvs->pass_rec;
-	int i;
-
-	for (i=0; i<nvs->func->MaxTemp; i++) {
-		/* This is a *horrible* hack.. R0 is both temp0 and result.color
-		 * in NV30/40 fragprogs, we can use R0 as a temp before result
-		 * is written however..
-		 */
-		if (nvs->mesa.vp.Base.Target == GL_FRAGMENT_PROGRAM_ARB && i==0)
-			continue;
-		if (rec->hw_temps[i] == 0) {
-			rec->hw_temps[i] = 1;
-			return i;
-		}
-	}
-
-	return -1;
-}
-
-static nvsRegister
-pass2_mangle_reg(nvsPtr nvs, nvsInstruction *inst, nvsRegister reg)
-{
-	struct pass2_rec *rec = nvs->pass_rec;
-
-	if (reg.file == NVS_FILE_TEMP) {
-		if (rec->temps[reg.index] == -1)
-			rec->temps[reg.index] = pass2_alloc_hw_temp(nvs);
-		reg.index = rec->temps[reg.index];
-	}
-
-	return reg;
-}
-
-static void
-pass2_add_instruction(nvsPtr nvs, nvsInstruction *inst, 
-		      struct _op_xlat *op, int slot)
-{
-	nvsSwzComp default_swz[4] = { NVS_SWZ_X, NVS_SWZ_Y,
-				      NVS_SWZ_Z, NVS_SWZ_W };
-	nvsFunc *shader = nvs->func;
-	nvsRegister reg;
-	int i;
-
-	shader->SetOpcode(shader, op->NV, slot);
-	if (inst->saturate	) shader->SetSaturate(shader);
-	if (inst->cond_update	) shader->SetCCUpdate(shader);
-	if (inst->cond_test	) shader->SetCondition(shader, 1, inst->cond,
-						       inst->cond_reg,
-						       inst->cond_swizzle);
-	else			  shader->SetCondition(shader, 0, NVS_COND_TR,
-						       0,
-						       default_swz);
-	switch (inst->op) {
-	case NVS_OP_TEX:
-	case NVS_OP_TXB:
-	case NVS_OP_TXL:
-	case NVS_OP_TXP:
-	case NVS_OP_TXD:
-		shader->SetTexImageUnit(shader, inst->tex_unit);
-		break;
-	default:
-		break;
-	}
-
-	for (i = 0; i < 3; i++) {
-		if (op->srcpos[i] != -1) {
-			reg = pass2_mangle_reg(nvs, inst, inst->src[i]);
-
-			shader->SetSource(shader, &reg, op->srcpos[i]);
-
-			if (reg.file == NVS_FILE_CONST &&
-					shader->GetSourceConstVal) {
-				int idx_slot =
-					nvs->params[reg.index].hw_index_cnt++;
-				nvs->params[reg.index].hw_index = realloc(
-						nvs->params[reg.index].hw_index,
-						sizeof(int) * idx_slot+1);
-				nvs->params[reg.index].hw_index[idx_slot] =
-					nvs->program_current + 4;
-			}
-		}
-	}
-
-	reg = pass2_mangle_reg(nvs, inst, inst->dest);
-	shader->SetResult(shader, &reg, inst->mask, slot);
-
-	if (inst->dest_scale != NVS_SCALE_1X) {
-		shader->SetResultScale(shader, inst->dest_scale);
-	}
-}
-
-static int
-pass2_assemble_instruction(nvsPtr nvs, nvsInstruction *inst, int last)
-{
-	nvsFunc *shader = nvs->func;
-	struct _op_xlat *op;
-	unsigned int hw_inst[8];
-	int slot;
-	int instsz;
-	int i;
-
-	shader->inst = hw_inst;
-
-	/* Assemble this instruction */
-	if (!(op = shader->GetOPTXFromSOP(inst->op, &slot)))
-		return 0;
-	shader->InitInstruction(shader);
-	pass2_add_instruction(nvs, inst, op, slot);
-	if (last)
-		shader->SetLastInst(shader);
-
-	instsz = shader->GetOffsetNext(nvs->func);
-	if (nvs->program_size + instsz >= nvs->program_alloc_size) {
-		nvs->program_alloc_size *= 2;
-		nvs->program = realloc(nvs->program,
-				       nvs->program_alloc_size *
-				       sizeof(uint32_t));
-	}
-
-	for (i=0; i<instsz; i++)
-		nvs->program[nvs->program_current++] = hw_inst[i];
-	nvs->program_size = nvs->program_current;
-	return 1;
-}
-
-static GLboolean
-pass2_translate(nvsPtr nvs, nvsFragmentHeader *f)
-{
-	nvsFunc *shader = nvs->func;
-	GLboolean last;
-
-	while (f) {
-		last = (f == ((nvsSubroutine*)nvs->program_tree)->insn_tail);
-
-		switch (f->type) {
-		case NVS_INSTRUCTION:
-			if (!pass2_assemble_instruction(nvs,
-							(nvsInstruction *)f,
-							last))
-				return GL_FALSE;
-			break;
-		default:
-			WARN_ONCE("Unimplemented fragment type\n");
-			return GL_FALSE;
-		}
-
-		f = f->next;
-	}
-
-	return GL_TRUE;
-}
-
-/* Translate program into hardware format */
-GLboolean
-nouveau_shader_pass2(nvsPtr nvs)
-{
-	struct pass2_rec *rec;
-	int i;
-
-	NVSDBG("start: nvs=%p\n", nvs);
-
-	rec = calloc(1, sizeof(struct pass2_rec));
-	for (i=0; i<NVS_MAX_TEMPS; i++)
-		rec->temps[i] = -1;
-	nvs->pass_rec = rec;
-
-	/* Start off with allocating 4 uint32_t's for each inst, will be grown
-	 * if necessary..
-	 */
-	nvs->program_alloc_size = nvs->mesa.vp.Base.NumInstructions * 4;
-	nvs->program = calloc(nvs->program_alloc_size, sizeof(uint32_t));
-	nvs->program_size    = 0;
-	nvs->program_current = 0;
-
-	if (!pass2_translate(nvs,
-			     ((nvsSubroutine*)nvs->program_tree)->insn_head)) {
-		free(nvs->program);
-		nvs->program = NULL;
-		return GL_FALSE;
-	}
-
-	/* Shrink allocated memory to only what we need */
-	nvs->program = realloc(nvs->program,
-			       nvs->program_size * sizeof(uint32_t));
-	nvs->program_alloc_size = nvs->program_size;
-
-	nvs->translated  = 1;
-	nvs->on_hardware = 0;
-
-	if (NOUVEAU_DEBUG & DEBUG_SHADERS) {
-		fflush(stdout); fflush(stderr);
-		fprintf(stderr, "-----------MESA PROGRAM target=%s, id=0x%x\n",
-				_mesa_lookup_enum_by_nr(
-					nvs->mesa.vp.Base.Target),
-				nvs->mesa.vp.Base.Id);
-		fflush(stdout); fflush(stderr);
-		_mesa_print_program(&nvs->mesa.vp.Base);
-		fflush(stdout); fflush(stderr);
-		fprintf(stderr, "^^^^^^^^^^^^^^^^MESA PROGRAM\n");
-		fflush(stdout); fflush(stderr);
-		fprintf(stderr, "----------------NV PROGRAM\n");
-		fflush(stdout); fflush(stderr);
-		nvsDisasmHWShader(nvs);
-		fflush(stdout); fflush(stderr);
-		fprintf(stderr, "^^^^^^^^^^^^^^^^NV PROGRAM\n");
-		fflush(stdout); fflush(stderr);
-	}
-
-	return GL_TRUE;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_span.c b/src/mesa/drivers/dri/nouveau/nouveau_span.c
deleted file mode 100644
index 6e3f9fadf4e..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_span.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#include "nouveau_context.h"
-#include "nouveau_span.h"
-#include "nouveau_fifo.h"
-#include "nouveau_lock.h"
-
-#include "swrast/swrast.h"
-
-#define HAVE_HW_DEPTH_SPANS	0
-#define HAVE_HW_DEPTH_PIXELS	0
-#define HAVE_HW_STENCIL_SPANS	0
-#define HAVE_HW_STENCIL_PIXELS	0
-
-static char *fake_span[1280*1024*4];
-
-#define HW_CLIPLOOP()							\
-   do {									\
-      int _nc = nmesa->numClipRects;					\
-      while ( _nc-- ) {							\
-	 int minx = nmesa->pClipRects[_nc].x1 - nmesa->drawX;		\
-	 int miny = nmesa->pClipRects[_nc].y1 - nmesa->drawY;		\
-	 int maxx = nmesa->pClipRects[_nc].x2 - nmesa->drawX;		\
-	 int maxy = nmesa->pClipRects[_nc].y2 - nmesa->drawY;
-
-#define LOCAL_VARS							\
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);			\
-   nouveau_renderbuffer *nrb = (nouveau_renderbuffer *)rb;		\
-   GLuint height = nrb->mesa.Height;					\
-   GLubyte *map = (GLubyte *)(nrb->map ? nrb->map : nrb->mem->map) +    \
-	 (nmesa->drawY * nrb->pitch) + (nmesa->drawX * nrb->cpp);       \
-   map = fake_span; \
-   GLuint p;								\
-   (void) p;
-
-#define Y_FLIP( _y )            (height - _y - 1)
-
-#define HW_LOCK()
-
-#define HW_UNLOCK()
-
-
-
-/* ================================================================
- * Color buffers
- */
-
-/* RGB565 */ 
-#define SPANTMP_PIXEL_FMT GL_RGB
-#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
-
-#define TAG(x)    nouveau##x##_RGB565
-#define TAG2(x,y) nouveau##x##_RGB565##y
-#define GET_PTR(X,Y) (map + (Y)*nrb->pitch + (X)*nrb->cpp)
-#include "spantmp2.h"
-
-
-/* ARGB8888 */
-#define SPANTMP_PIXEL_FMT GL_BGRA
-#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
-
-#define TAG(x)    nouveau##x##_ARGB8888
-#define TAG2(x,y) nouveau##x##_ARGB8888##y
-#define GET_PTR(X,Y) (map + (Y)*nrb->pitch + (X)*nrb->cpp)
-#include "spantmp2.h"
-
-static void
-nouveauSpanRenderStart( GLcontext *ctx )
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   FIRE_RING();
-   LOCK_HARDWARE(nmesa);
-   nouveauWaitForIdleLocked( nmesa );
-}
-
-static void
-nouveauSpanRenderFinish( GLcontext *ctx )
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   _swrast_flush( ctx );
-   nouveauWaitForIdleLocked( nmesa );
-   UNLOCK_HARDWARE( nmesa );
-}
-
-void nouveauSpanInitFunctions( GLcontext *ctx )
-{
-   struct swrast_device_driver *swdd = _swrast_GetDeviceDriverReference(ctx);
-   swdd->SpanRenderStart	= nouveauSpanRenderStart;
-   swdd->SpanRenderFinish	= nouveauSpanRenderFinish;
-}
-
-
-/**
- * Plug in the Get/Put routines for the given driRenderbuffer.
- */
-void
-nouveauSpanSetFunctions(nouveau_renderbuffer *nrb, const GLvisual *vis)
-{
-   if (nrb->mesa._ActualFormat == GL_RGBA8)
-      nouveauInitPointers_ARGB8888(&nrb->mesa);
-   else // if (nrb->mesa._ActualFormat == GL_RGB5)
-      nouveauInitPointers_RGB565(&nrb->mesa);
-}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_span.h b/src/mesa/drivers/dri/nouveau/nouveau_span.h
deleted file mode 100644
index bc39ecd17b5..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_span.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NOUVEAU_SPAN_H__
-#define __NOUVEAU_SPAN_H__
-
-#include "drirenderbuffer.h"
-#include "nouveau_buffers.h"
-
-extern void nouveauSpanInitFunctions( GLcontext *ctx );
-extern void nouveauSpanSetFunctions(nouveau_renderbuffer *nrb, const GLvisual *vis);
-
-#endif /* __NOUVEAU_SPAN_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c
deleted file mode 100644
index f618dcfc99b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Jeremy Kolb
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_state.h"
-#include "nouveau_swtcl.h"
-#include "nouveau_fifo.h"
-
-#include "swrast/swrast.h"
-#include "tnl/tnl.h"
-#include "swrast_setup/swrast_setup.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-static __inline__ GLuint nouveauPackColor(GLuint format,
-				       GLubyte r, GLubyte g,
-				       GLubyte b, GLubyte a)
-{
-   switch (format) {
-   case 2:
-      return PACK_COLOR_565( r, g, b );
-   case 4:
-      return PACK_COLOR_8888( r, g, b, a);
-   default:
-      fprintf(stderr, "unknown format %d\n", (int)format);
-      return 0;
-   }
-}
-
-static void nouveauCalcViewport(GLcontext *ctx)
-{
-    /* Calculate the Viewport Matrix */
-    
-    nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-    const GLfloat *v = ctx->Viewport._WindowMap.m;
-    GLfloat *m = nmesa->viewport.m;
-    GLfloat xoffset = nmesa->drawX, yoffset = nmesa->drawY + nmesa->drawH;
-  
-    nmesa->depth_scale = 1.0 / ctx->DrawBuffer->_DepthMaxF;
-
-    m[MAT_SX] =   v[MAT_SX];
-    m[MAT_TX] =   v[MAT_TX] + xoffset + SUBPIXEL_X;
-    m[MAT_SY] = - v[MAT_SY];
-    m[MAT_TY] = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
-    m[MAT_SZ] =   v[MAT_SZ] * nmesa->depth_scale;
-    m[MAT_TZ] =   v[MAT_TZ] * nmesa->depth_scale;
-
-    nmesa->hw_func.WindowMoved(nmesa);
-}
-
-static void nouveauViewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-    /* 
-     * Need to send (at least on an nv35 the following:
-     * cons = 4 (this may be bytes per pixel)
-     *
-     * The viewport:
-     * 445   0x0000bee0   {size: 0x0   channel: 0x1   cmd: 0x00009ee0} <-- VIEWPORT_SETUP/HEADER ?
-     * 446   0x00000000   {size: 0x0   channel: 0x0   cmd: 0x00000000} <-- x * cons
-     * 447   0x00000c80   {size: 0x0   channel: 0x0   cmd: 0x00000c80} <-- (height + x) * cons
-     * 448   0x00000000   {size: 0x0   channel: 0x0   cmd: 0x00000000} <-- y * cons
-     * 449   0x00000960   {size: 0x0   channel: 0x0   cmd: 0x00000960} <-- (width + y) * cons
-     * 44a   0x00082a00   {size: 0x2   channel: 0x1   cmd: 0x00000a00} <-- VIEWPORT_DIMS
-     * 44b   0x04000000  <-- (Width_from_glViewport << 16) | x
-     * 44c   0x03000000  <-- (Height_from_glViewport << 16) | (win_height - height - y)
-     *
-     */
-    
-    nouveauCalcViewport(ctx);
-}
-
-static void nouveauDepthRange(GLcontext *ctx, GLclampd near, GLclampd far)
-{
-    nouveauCalcViewport(ctx);
-}
-
-static void nouveauDDUpdateHWState(GLcontext *ctx)
-{
-    nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-    int new_state = nmesa->new_state;
-
-    if ( new_state || nmesa->new_render_state & _NEW_TEXTURE )
-    {
-        nmesa->new_state = 0;
-
-        /* Update the various parts of the context's state.
-        */
-        /*
-        if ( new_state & NOUVEAU_NEW_ALPHA )
-            nouveauUpdateAlphaMode( ctx );
-
-        if ( new_state & NOUVEAU_NEW_DEPTH )
-            nouveauUpdateZMode( ctx );
-
-        if ( new_state & NOUVEAU_NEW_FOG )
-            nouveauUpdateFogAttrib( ctx );
-
-        if ( new_state & NOUVEAU_NEW_CLIP )
-            nouveauUpdateClipping( ctx );
-
-        if ( new_state & NOUVEAU_NEW_CULL )
-            nouveauUpdateCull( ctx );
-
-        if ( new_state & NOUVEAU_NEW_MASKS )
-            nouveauUpdateMasks( ctx );
-
-        if ( new_state & NOUVEAU_NEW_WINDOW )
-            nouveauUpdateWindow( ctx );
-
-        if ( nmesa->new_render_state & _NEW_TEXTURE ) {
-            nouveauUpdateTextureState( ctx );
-        }*/
-    }
-}
-
-static void nouveauDDInvalidateState(GLcontext *ctx, GLuint new_state)
-{
-    _swrast_InvalidateState( ctx, new_state );
-    _swsetup_InvalidateState( ctx, new_state );
-    _vbo_InvalidateState( ctx, new_state );
-    _tnl_InvalidateState( ctx, new_state );
-    NOUVEAU_CONTEXT(ctx)->new_render_state |= new_state;
-}
-
-/* Initialize the context's hardware state. */
-void nouveauDDInitState(nouveauContextPtr nmesa)
-{
-    uint32_t type = nmesa->screen->card->type;
-    switch(type)
-    {
-        case NV_03:
-            /* Unimplemented */
-            break;
-        case NV_04:
-        case NV_05:
-            nv04InitStateFuncs(nmesa->glCtx, &nmesa->glCtx->Driver);
-            break;
-        case NV_10:
-        case NV_11:
-        case NV_17:
-            nv10InitStateFuncs(nmesa->glCtx, &nmesa->glCtx->Driver);
-            break;
-        case NV_20:
-            nv20InitStateFuncs(nmesa->glCtx, &nmesa->glCtx->Driver);
-            break;
-        case NV_30:
-        case NV_40:
-        case NV_44:
-            nv30InitStateFuncs(nmesa->glCtx, &nmesa->glCtx->Driver);
-            break;
-        case NV_50:
-            nv50InitStateFuncs(nmesa->glCtx, &nmesa->glCtx->Driver);
-            break;
-        default:
-            break;
-    }
-    nouveau_state_cache_init(nmesa);
-}
-
-/* Initialize the driver's state functions */
-void nouveauDDInitStateFuncs(GLcontext *ctx)
-{
-   ctx->Driver.UpdateState		= nouveauDDInvalidateState;
-
-   ctx->Driver.ClearIndex		= NULL;
-   ctx->Driver.ClearColor		= NULL; //nouveauDDClearColor;
-   ctx->Driver.ClearStencil		= NULL; //nouveauDDClearStencil;
-   ctx->Driver.DrawBuffer		= NULL; //nouveauDDDrawBuffer;
-   ctx->Driver.ReadBuffer		= NULL; //nouveauDDReadBuffer;
-
-   ctx->Driver.IndexMask		= NULL;
-   ctx->Driver.ColorMask		= NULL; //nouveauDDColorMask;
-   ctx->Driver.AlphaFunc		= NULL; //nouveauDDAlphaFunc;
-   ctx->Driver.BlendEquationSeparate	= NULL; //nouveauDDBlendEquationSeparate;
-   ctx->Driver.BlendFuncSeparate	= NULL; //nouveauDDBlendFuncSeparate;
-   ctx->Driver.ClearDepth		= NULL; //nouveauDDClearDepth;
-   ctx->Driver.CullFace			= NULL; //nouveauDDCullFace;
-   ctx->Driver.FrontFace		= NULL; //nouveauDDFrontFace;
-   ctx->Driver.DepthFunc		= NULL; //nouveauDDDepthFunc;
-   ctx->Driver.DepthMask		= NULL; //nouveauDDDepthMask;
-   ctx->Driver.Enable			= NULL; //nouveauDDEnable;
-   ctx->Driver.Fogfv			= NULL; //nouveauDDFogfv;
-   ctx->Driver.Hint			= NULL;
-   ctx->Driver.Lightfv			= NULL;
-   ctx->Driver.LightModelfv		= NULL; //nouveauDDLightModelfv;
-   ctx->Driver.LogicOpcode		= NULL; //nouveauDDLogicOpCode;
-   ctx->Driver.PolygonMode		= NULL;
-   ctx->Driver.PolygonStipple		= NULL; //nouveauDDPolygonStipple;
-   ctx->Driver.RenderMode		= NULL; //nouveauDDRenderMode;
-   ctx->Driver.Scissor			= NULL; //nouveauDDScissor;
-   ctx->Driver.ShadeModel		= NULL; //nouveauDDShadeModel;
-   ctx->Driver.StencilFuncSeparate	= NULL; //nouveauDDStencilFuncSeparate;
-   ctx->Driver.StencilMaskSeparate	= NULL; //nouveauDDStencilMaskSeparate;
-   ctx->Driver.StencilOpSeparate	= NULL; //nouveauDDStencilOpSeparate;
-
-   ctx->Driver.DepthRange               = nouveauDepthRange;
-   ctx->Driver.Viewport                 = nouveauViewport;
-
-   /* Pixel path fallbacks.
-    */
-   ctx->Driver.Accum = _swrast_Accum;
-   ctx->Driver.Bitmap = _swrast_Bitmap;
-   ctx->Driver.CopyPixels = _swrast_CopyPixels;
-   ctx->Driver.DrawPixels = _swrast_DrawPixels;
-   ctx->Driver.ReadPixels = _swrast_ReadPixels;
-
-   /* Swrast hooks for imaging extensions:
-    */
-   ctx->Driver.CopyColorTable = _swrast_CopyColorTable;
-   ctx->Driver.CopyColorSubTable = _swrast_CopyColorSubTable;
-   ctx->Driver.CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
-   ctx->Driver.CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
-}
-
-#define STATE_INIT(a) if (ctx->Driver.a) ctx->Driver.a
-
-void nouveauInitState(GLcontext *ctx)
-{
-    /*
-     * Mesa should do this for us:
-     */
-
-    STATE_INIT(AlphaFunc)( ctx, 
-            ctx->Color.AlphaFunc,
-            ctx->Color.AlphaRef);
-
-    STATE_INIT(BlendColor)( ctx,
-            ctx->Color.BlendColor );
-
-    STATE_INIT(BlendEquationSeparate)( ctx, 
-            ctx->Color.BlendEquationRGB,
-            ctx->Color.BlendEquationA);
-
-    STATE_INIT(BlendFuncSeparate)( ctx,
-            ctx->Color.BlendSrcRGB,
-            ctx->Color.BlendDstRGB,
-            ctx->Color.BlendSrcA,
-            ctx->Color.BlendDstA);
-
-    STATE_INIT(ClearColor)( ctx, ctx->Color.ClearColor);
-    STATE_INIT(ClearDepth)( ctx, ctx->Depth.Clear);
-    STATE_INIT(ClearStencil)( ctx, ctx->Stencil.Clear);
-
-    STATE_INIT(ColorMask)( ctx, 
-            ctx->Color.ColorMask[RCOMP],
-            ctx->Color.ColorMask[GCOMP],
-            ctx->Color.ColorMask[BCOMP],
-            ctx->Color.ColorMask[ACOMP]);
-
-    STATE_INIT(CullFace)( ctx, ctx->Polygon.CullFaceMode );
-    STATE_INIT(DepthFunc)( ctx, ctx->Depth.Func );
-    STATE_INIT(DepthMask)( ctx, ctx->Depth.Mask );
-
-    STATE_INIT(Enable)( ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled );
-    STATE_INIT(Enable)( ctx, GL_BLEND, ctx->Color.BlendEnabled );
-    STATE_INIT(Enable)( ctx, GL_COLOR_LOGIC_OP, ctx->Color.ColorLogicOpEnabled );
-    STATE_INIT(Enable)( ctx, GL_COLOR_SUM, ctx->Fog.ColorSumEnabled );
-    STATE_INIT(Enable)( ctx, GL_CULL_FACE, ctx->Polygon.CullFlag );
-    STATE_INIT(Enable)( ctx, GL_DEPTH_TEST, ctx->Depth.Test );
-    STATE_INIT(Enable)( ctx, GL_DITHER, ctx->Color.DitherFlag );
-    STATE_INIT(Enable)( ctx, GL_FOG, ctx->Fog.Enabled );
-    STATE_INIT(Enable)( ctx, GL_LIGHTING, ctx->Light.Enabled );
-    STATE_INIT(Enable)( ctx, GL_LINE_SMOOTH, ctx->Line.SmoothFlag );
-    STATE_INIT(Enable)( ctx, GL_LINE_STIPPLE, ctx->Line.StippleFlag );
-    STATE_INIT(Enable)( ctx, GL_POINT_SMOOTH, ctx->Point.SmoothFlag );
-    STATE_INIT(Enable)( ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
-    STATE_INIT(Enable)( ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
-    STATE_INIT(Enable)( ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
-    STATE_INIT(Enable)( ctx, GL_POLYGON_SMOOTH, ctx->Polygon.SmoothFlag );
-    STATE_INIT(Enable)( ctx, GL_POLYGON_STIPPLE, ctx->Polygon.StippleFlag );
-    STATE_INIT(Enable)( ctx, GL_SCISSOR_TEST, ctx->Scissor.Enabled );
-    STATE_INIT(Enable)( ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled );
-    STATE_INIT(Enable)( ctx, GL_TEXTURE_1D, GL_FALSE );
-    STATE_INIT(Enable)( ctx, GL_TEXTURE_2D, GL_FALSE );
-    STATE_INIT(Enable)( ctx, GL_TEXTURE_RECTANGLE_NV, GL_FALSE );
-    STATE_INIT(Enable)( ctx, GL_TEXTURE_3D, GL_FALSE );
-    STATE_INIT(Enable)( ctx, GL_TEXTURE_CUBE_MAP, GL_FALSE );
-
-    STATE_INIT(Fogfv)( ctx, GL_FOG_COLOR, ctx->Fog.Color );
-    STATE_INIT(Fogfv)( ctx, GL_FOG_MODE, 0 );
-    STATE_INIT(Fogfv)( ctx, GL_FOG_DENSITY, &ctx->Fog.Density );
-    STATE_INIT(Fogfv)( ctx, GL_FOG_START, &ctx->Fog.Start );
-    STATE_INIT(Fogfv)( ctx, GL_FOG_END, &ctx->Fog.End );
-
-    STATE_INIT(FrontFace)( ctx, ctx->Polygon.FrontFace );
-
-    {
-        GLfloat f = (GLfloat)ctx->Light.Model.ColorControl;
-        STATE_INIT(LightModelfv)( ctx, GL_LIGHT_MODEL_COLOR_CONTROL, &f );
-    }
-
-    STATE_INIT(LineStipple)( ctx, ctx->Line.StippleFactor, ctx->Line.StipplePattern );
-    STATE_INIT(LineWidth)( ctx, ctx->Line.Width );
-    STATE_INIT(LogicOpcode)( ctx, ctx->Color.LogicOp );
-    STATE_INIT(PointSize)( ctx, ctx->Point.Size );
-    STATE_INIT(PolygonMode)( ctx, GL_FRONT, ctx->Polygon.FrontMode );
-    STATE_INIT(PolygonMode)( ctx, GL_BACK, ctx->Polygon.BackMode );
-    STATE_INIT(PolygonOffset)( ctx,
-	    ctx->Polygon.OffsetFactor,
-	    ctx->Polygon.OffsetUnits );
-    STATE_INIT(PolygonStipple)( ctx, (const GLubyte *)ctx->PolygonStipple );
-    STATE_INIT(ShadeModel)( ctx, ctx->Light.ShadeModel );
-    STATE_INIT(StencilFuncSeparate)( ctx, GL_FRONT,
-            ctx->Stencil.Function[0],
-            ctx->Stencil.Ref[0],
-            ctx->Stencil.ValueMask[0] );
-    STATE_INIT(StencilFuncSeparate)( ctx, GL_BACK,
-            ctx->Stencil.Function[1],
-            ctx->Stencil.Ref[1],
-            ctx->Stencil.ValueMask[1] );
-    STATE_INIT(StencilMaskSeparate)( ctx, GL_FRONT, ctx->Stencil.WriteMask[0] );
-    STATE_INIT(StencilMaskSeparate)( ctx, GL_BACK, ctx->Stencil.WriteMask[1] );
-    STATE_INIT(StencilOpSeparate)( ctx, GL_FRONT,
-            ctx->Stencil.FailFunc[0],
-            ctx->Stencil.ZFailFunc[0],
-            ctx->Stencil.ZPassFunc[0]);
-    STATE_INIT(StencilOpSeparate)( ctx, GL_BACK,
-            ctx->Stencil.FailFunc[1],
-            ctx->Stencil.ZFailFunc[1],
-            ctx->Stencil.ZPassFunc[1]);
-}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.h b/src/mesa/drivers/dri/nouveau/nouveau_state.h
deleted file mode 100644
index dbac71760b6..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Jeremy Kolb
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#ifndef __NOUVEAU_STATE_H__
-#define __NOUVEAU_STATE_H__
-
-#include "nouveau_context.h"
-
-extern void nouveauDDInitState(nouveauContextPtr nmesa);
-extern void nouveauDDInitStateFuncs(GLcontext *ctx);
-
-extern void nv04InitStateFuncs(GLcontext *ctx, struct dd_function_table *func);
-extern void nv10InitStateFuncs(GLcontext *ctx, struct dd_function_table *func);
-extern void nv20InitStateFuncs(GLcontext *ctx, struct dd_function_table *func);
-extern void nv30InitStateFuncs(GLcontext *ctx, struct dd_function_table *func);
-extern void nv50InitStateFuncs(GLcontext *ctx, struct dd_function_table *func);
-
-extern void nouveauInitState(GLcontext *ctx);
-
-/*
-extern void nouveauDDUpdateState(GLcontext *ctx);
-extern void nouveauDDUpdateHWState(GLcontext *ctx);
-
-extern void nouveauEmitHwStateLocked(nouveauContextPtr nmesa);
-*/
-#endif
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state_cache.c b/src/mesa/drivers/dri/nouveau/nouveau_state_cache.c
deleted file mode 100644
index cb4b9d30270..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_state_cache.c
+++ /dev/null
@@ -1,69 +0,0 @@
-
-#include "nouveau_state_cache.h"
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-
-#define BEGIN_RING_NOFLUSH(subchannel,tag,size) do {					\
-	if (nmesa->fifo.free <= (size))							\
-		WAIT_RING(nmesa,(size));						\
-	OUT_RING( ((size)<<18) | ((subchannel) << 13) | (tag));				\
-	nmesa->fifo.free -= ((size) + 1);                                               \
-}while(0)
-
-// flush all the dirty state
-void nouveau_state_cache_flush(nouveauContextPtr nmesa)
-{
-	int i=0;
-	int run=0;
-
-	// fast-path no state changes
-	if (!nmesa->state_cache.dirty)
-		return;
-	nmesa->state_cache.dirty=0;
-
-	do
-	{
-		// jump to a dirty state
-		while((nmesa->state_cache.hdirty[i/NOUVEAU_STATE_CACHE_HIER_SIZE]==0)&&(i<NOUVEAU_STATE_CACHE_ENTRIES))
-			i=(i&~(NOUVEAU_STATE_CACHE_HIER_SIZE-1))+NOUVEAU_STATE_CACHE_HIER_SIZE;
-		while((nmesa->state_cache.atoms[i].dirty==0)&&(i<NOUVEAU_STATE_CACHE_ENTRIES))
-			i++;
-
-		// figure out a run of dirty values
-		run=0;
-		while((nmesa->state_cache.atoms[i+run].dirty)&&(i+run<NOUVEAU_STATE_CACHE_ENTRIES))
-			run++;
-
-		// output everything as a single run
-		if (run>0) {
-			int j;
-
-			BEGIN_RING_NOFLUSH(NvSub3D, i*4, run);
-			for(j=0;j<run;j++)
-			{
-				OUT_RING(nmesa->state_cache.atoms[i+j].value);
-				nmesa->state_cache.atoms[i+j].dirty=0;
-				if ((i+j)%NOUVEAU_STATE_CACHE_HIER_SIZE==0)
-					nmesa->state_cache.hdirty[(i+j)/NOUVEAU_STATE_CACHE_HIER_SIZE-1]=0;
-			}
-			i+=run;
-		}
-	}
-	while(i<NOUVEAU_STATE_CACHE_ENTRIES);
-	nmesa->state_cache.hdirty[NOUVEAU_STATE_CACHE_HIER_SIZE/NOUVEAU_STATE_CACHE_HIER_SIZE-1]=0;
-}
-
-
-// inits the state cache
-void nouveau_state_cache_init(nouveauContextPtr nmesa)
-{
-	int i;
-	for(i=0;i<NOUVEAU_STATE_CACHE_ENTRIES;i++)
-	{
-		nmesa->state_cache.atoms[i].dirty=0;
-		nmesa->state_cache.atoms[i].value=0xDEADBEEF; // nvidia cards like beef
-	}
-	nmesa->state_cache.dirty=0;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state_cache.h b/src/mesa/drivers/dri/nouveau/nouveau_state_cache.h
deleted file mode 100644
index 5f9d426450b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_state_cache.h
+++ /dev/null
@@ -1,29 +0,0 @@
-
-#ifndef __NOUVEAU_STATE_CACHE_H__
-#define __NOUVEAU_STATE_CACHE_H__
-
-#include "mtypes.h"
-
-#define NOUVEAU_STATE_CACHE_ENTRIES 2048
-// size of a dirty requests block
-// you can play with that and tune the value to increase/decrease performance
-// but keep it a power of 2 !
-#define NOUVEAU_STATE_CACHE_HIER_SIZE  32
-
-typedef struct nouveau_state_atom_t{
-	uint32_t value;
-	uint32_t dirty;
-}nouveau_state_atom;
-
-typedef struct nouveau_state_cache_t{
-	nouveau_state_atom atoms[NOUVEAU_STATE_CACHE_ENTRIES];
-	uint32_t current_pos;
-	// hierarchical dirty flags
-	uint8_t hdirty[NOUVEAU_STATE_CACHE_ENTRIES/NOUVEAU_STATE_CACHE_HIER_SIZE];
-	// master dirty flag
-	uint8_t dirty;
-}nouveau_state_cache;
-
-
-#endif
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_swtcl.c b/src/mesa/drivers/dri/nouveau/nouveau_swtcl.c
deleted file mode 100644
index 8a013bd9995..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_swtcl.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/* Common software TCL code */
-
-#include "nouveau_context.h"
-#include "nouveau_swtcl.h"
-#include "nv10_swtcl.h"
-#include "nouveau_span.h"
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/tnl.h"
-#include "tnl/t_pipeline.h"
-
-/* Common tri functions */
-
-/* The fallbacks */
-void nouveau_fallback_tri(struct nouveau_context *nmesa,
-		nouveauVertex *v0,
-		nouveauVertex *v1,
-		nouveauVertex *v2)
-{    
-	GLcontext *ctx = nmesa->glCtx;
-	SWvertex v[3];
-	_swsetup_Translate(ctx, v0, &v[0]);
-	_swsetup_Translate(ctx, v1, &v[1]);
-	_swsetup_Translate(ctx, v2, &v[2]);
-	_swrast_Triangle(ctx, &v[0], &v[1], &v[2]);
-}
-
-
-void nouveau_fallback_line(struct nouveau_context *nmesa,
-		nouveauVertex *v0,
-		nouveauVertex *v1)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	SWvertex v[2];
-	_swsetup_Translate(ctx, v0, &v[0]);
-	_swsetup_Translate(ctx, v1, &v[1]);
-	_swrast_Line(ctx, &v[0], &v[1]);
-}
-
-
-void nouveau_fallback_point(struct nouveau_context *nmesa,
-		nouveauVertex *v0)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	SWvertex v[1];
-	_swsetup_Translate(ctx, v0, &v[0]);
-	_swrast_Point(ctx, &v[0]);
-}
-
-void nouveauFallback(struct nouveau_context *nmesa, GLuint bit, GLboolean mode)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLuint oldfallback = nmesa->Fallback;
-
-	if (mode) {
-		nmesa->Fallback |= bit;
-		if (oldfallback == 0) {
-			if (nmesa->screen->card->type<NV_10) {
-				//nv04FinishPrimitive(nmesa);
-			} else {
-				//nv10FinishPrimitive(nmesa);
-			}
-
-			_swsetup_Wakeup(ctx);
-			nmesa->render_index = ~0;
-		}
-	}
-	else {
-		nmesa->Fallback &= ~bit;
-		if (oldfallback == bit) {
-			_swrast_flush( ctx );
-
-			if (nmesa->screen->card->type<NV_10) {
-				nv04TriInitFunctions(ctx);
-			} else {
-				nv10TriInitFunctions(ctx);
-			}
-
-			_tnl_invalidate_vertex_state( ctx, ~0 );
-			_tnl_invalidate_vertices( ctx, ~0 );
-			_tnl_install_attrs( ctx, 
-					nmesa->vertex_attrs, 
-					nmesa->vertex_attr_count,
-					nmesa->viewport.m, 0 ); 
-		}
-	}    
-}
-
-
-void nouveauRunPipeline( GLcontext *ctx )
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (nmesa->new_state) {
-		nmesa->new_render_state |= nmesa->new_state;
-	}
-
-	_tnl_run_pipeline( ctx );
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_swtcl.h b/src/mesa/drivers/dri/nouveau/nouveau_swtcl.h
deleted file mode 100644
index ba4d8725a65..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_swtcl.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NOUVEAU_SWTCL_H__
-#define __NOUVEAU_SWTCL_H__
-
-#include "nouveau_context.h"
-
-extern void nouveau_fallback_tri(struct nouveau_context *nmesa,
-		nouveauVertex *v0,
-		nouveauVertex *v1,
-		nouveauVertex *v2);
-
-extern void nouveau_fallback_line(struct nouveau_context *nmesa,
-		nouveauVertex *v0,
-		nouveauVertex *v1);
-
-extern void nouveau_fallback_point(struct nouveau_context *nmesa, 
-		nouveauVertex *v0);
-
-extern void nouveauFallback(struct nouveau_context *nmesa, GLuint bit, GLboolean mode);
-
-extern void nouveauRunPipeline( GLcontext *ctx );
-
-extern void nouveauTriInitFunctions( GLcontext *ctx );
-
-
-#endif /* __NOUVEAU_SWTCL_H__ */
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_sync.c b/src/mesa/drivers/dri/nouveau/nouveau_sync.c
deleted file mode 100644
index 8abc847e1e2..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_sync.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * Copyright (C) 2007 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "vblank.h" /* for DO_USLEEP */
-
-#include "nouveau_context.h"
-#include "nouveau_buffers.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_msg.h"
-#include "nouveau_sync.h"
-
-#define NOTIFIER(__v) \
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); \
-	volatile uint32_t *__v = (void*)nmesa->notifier_block + notifier->offset
-
-struct drm_nouveau_notifier_alloc *
-nouveau_notifier_new(GLcontext *ctx, GLuint handle, GLuint count)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	struct drm_nouveau_notifier_alloc *notifier;
-	int ret;
-
-#ifdef NOUVEAU_RING_DEBUG
-	return NULL;
-#endif
-
-	notifier = CALLOC_STRUCT(drm_nouveau_notifier_alloc);
-	if (!notifier)
-		return NULL;
-
-	notifier->channel = nmesa->fifo.channel;
-	notifier->handle  = handle;
-	notifier->count   = count;
-	ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_NOTIFIER_ALLOC,
-				  notifier, sizeof(*notifier));
-	if (ret) {
-		MESSAGE("Failed to create notifier 0x%08x: %d\n", handle, ret);
-		FREE(notifier);
-		return NULL;
-	}
-
-	return notifier;
-}
-
-void
-nouveau_notifier_destroy(GLcontext *ctx,
-			 struct drm_nouveau_notifier_alloc *notifier)
-{
-	/*XXX: free notifier object.. */
-	FREE(notifier);
-}
-
-void
-nouveau_notifier_reset(GLcontext *ctx,
-		       struct drm_nouveau_notifier_alloc *notifier,
-		       GLuint id)
-{
-	NOTIFIER(n);
-
-#ifdef NOUVEAU_RING_DEBUG
-	return;
-#endif
-
-	n[NV_NOTIFY_TIME_0      /4] = 0x00000000;
-	n[NV_NOTIFY_TIME_1      /4] = 0x00000000;
-	n[NV_NOTIFY_RETURN_VALUE/4] = 0x00000000;
-	n[NV_NOTIFY_STATE       /4] = (NV_NOTIFY_STATE_STATUS_IN_PROCESS <<
-				       NV_NOTIFY_STATE_STATUS_SHIFT);
-}
-
-GLuint
-nouveau_notifier_status(GLcontext *ctx,
-			struct drm_nouveau_notifier_alloc *notifier,
-			GLuint id)
-{
-	NOTIFIER(n);
-
-	return n[NV_NOTIFY_STATE/4] >> NV_NOTIFY_STATE_STATUS_SHIFT;
-}
-
-GLuint
-nouveau_notifier_return_val(GLcontext *ctx,
-			    struct drm_nouveau_notifier_alloc *notifier,
-			    GLuint id)
-{
-	NOTIFIER(n);
-
-	return n[NV_NOTIFY_RETURN_VALUE/4];
-}
-
-GLboolean
-nouveau_notifier_wait_status(GLcontext *ctx,
-			     struct drm_nouveau_notifier_alloc *notifier,
-			     GLuint id, GLuint status, GLuint timeout)
-{
-	NOTIFIER(n);
-	unsigned int time = 0;
-
-#ifdef NOUVEAU_RING_DEBUG
-	return GL_TRUE;
-#endif
-
-	while (time <= timeout) {
-		if (n[NV_NOTIFY_STATE/4] & NV_NOTIFY_STATE_ERROR_CODE_MASK) {
-			MESSAGE("Notifier returned error: 0x%04x\n",
-					n[NV_NOTIFY_STATE/4] &
-					NV_NOTIFY_STATE_ERROR_CODE_MASK);
-			return GL_FALSE;
-		}
-
-		if (((n[NV_NOTIFY_STATE/4] & NV_NOTIFY_STATE_STATUS_MASK) >>
-				NV_NOTIFY_STATE_STATUS_SHIFT) == status)
-			return GL_TRUE;
-
-		if (timeout) {
-			DO_USLEEP(1);
-			time++;
-		}
-	}
-
-	MESSAGE("Notifier timed out\n");
-	return GL_FALSE;
-}
-
-void
-nouveau_notifier_wait_nop(GLcontext *ctx,
-			  struct drm_nouveau_notifier_alloc *notifier,
-			  GLuint subc)
-{
-	NOTIFIER(n);
-	GLboolean ret;
-
-	nouveau_notifier_reset(ctx, notifier, 0);
-
-	BEGIN_RING_SIZE(subc, NV_NOTIFY, 1);
-	OUT_RING       (NV_NOTIFY_STYLE_WRITE_ONLY);
-	BEGIN_RING_SIZE(subc, NV_NOP, 1);
-	OUT_RING       (0);
-	FIRE_RING();
-
-	ret = nouveau_notifier_wait_status(ctx, notifier, 0,
-					   NV_NOTIFY_STATE_STATUS_COMPLETED,
-					   0 /* no timeout */);
-	if (ret == GL_FALSE) MESSAGE("wait on notifier failed\n");
-}
-
-GLboolean nouveauSyncInitFuncs(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-#ifdef NOUVEAU_RING_DEBUG
-	return GL_TRUE;
-#endif
-
-	nmesa->syncNotifier = nouveau_notifier_new(ctx, NvSyncNotify, 1);
-	if (!nmesa->syncNotifier) {
-		MESSAGE("Failed to create channel sync notifier\n");
-		return GL_FALSE;
-	}
-
-	/* 0x180 is SET_DMA_NOTIFY, should be correct for all supported 3D
-	 * object classes
-	 */
-	BEGIN_RING_CACHE(NvSub3D, 0x180, 1);
-	OUT_RING_CACHE  (NvSyncNotify);
-#ifdef ALLOW_MULTI_SUBCHANNEL
-	BEGIN_RING_SIZE(NvSubMemFormat,
-	      		NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
-	OUT_RING       (NvSyncNotify);
-#endif
-
-	return GL_TRUE;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_sync.h b/src/mesa/drivers/dri/nouveau/nouveau_sync.h
deleted file mode 100644
index b76af172762..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_sync.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (C) 2007 Ben Skeggs.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __NOUVEAU_SYNC_H__
-#define __NOUVEAU_SYNC_H__
-
-#include "nouveau_buffers.h"
-
-#define NV_NOTIFIER_SIZE                                                      32
-#define NV_NOTIFY_TIME_0                                              0x00000000
-#define NV_NOTIFY_TIME_1                                              0x00000004
-#define NV_NOTIFY_RETURN_VALUE                                        0x00000008
-#define NV_NOTIFY_STATE                                               0x0000000C
-#define NV_NOTIFY_STATE_STATUS_MASK                                   0xFF000000
-#define NV_NOTIFY_STATE_STATUS_SHIFT                                          24
-#define NV_NOTIFY_STATE_STATUS_COMPLETED                                    0x00
-#define NV_NOTIFY_STATE_STATUS_IN_PROCESS                                   0x01
-#define NV_NOTIFY_STATE_ERROR_CODE_MASK                               0x0000FFFF
-#define NV_NOTIFY_STATE_ERROR_CODE_SHIFT                                       0
-
-/* Methods that (hopefully) all objects have */
-#define NV_NOP                                                        0x00000100
-#define NV_NOTIFY                                                     0x00000104
-#define NV_NOTIFY_STYLE_WRITE_ONLY                                             0
-
-extern struct drm_nouveau_notifier_alloc *
-nouveau_notifier_new(GLcontext *, GLuint handle, GLuint count);
-extern void 
-nouveau_notifier_destroy(GLcontext *, struct drm_nouveau_notifier_alloc *);
-extern void
-nouveau_notifier_reset(GLcontext *, struct drm_nouveau_notifier_alloc *,
-		       GLuint id);
-extern GLuint
-nouveau_notifier_status(GLcontext *, struct drm_nouveau_notifier_alloc *,
-			GLuint id);
-extern GLuint
-nouveau_notifier_return_val(GLcontext *, struct drm_nouveau_notifier_alloc *,
-			    GLuint id);
-extern GLboolean
-nouveau_notifier_wait_status(GLcontext *, struct drm_nouveau_notifier_alloc *,
-			     GLuint id, GLuint status, GLuint timeout);
-extern void
-nouveau_notifier_wait_nop(GLcontext *ctx, struct drm_nouveau_notifier_alloc *,
-			  GLuint subc);
-
-extern GLboolean nouveauSyncInitFuncs(GLcontext *ctx);
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_tex.c b/src/mesa/drivers/dri/nouveau/nouveau_tex.c
deleted file mode 100644
index 0a8d2796695..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_tex.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#include "nouveau_tex.h"
-
-// XXX needs some love
-void nouveauTexInitFunctions( struct dd_function_table *functions )
-{
-/*
-   functions->TexEnv			= nouveauTexEnv;
-   functions->ChooseTextureFormat	= nouveauChooseTextureFormat;
-   functions->TexImage1D		= nouveauTexImage1D;
-   functions->TexSubImage1D		= nouveauTexSubImage1D;
-   functions->TexImage2D		= nouveauTexImage2D;
-   functions->TexSubImage2D		= nouveauTexSubImage2D;
-   functions->TexParameter		= nouveauTexParameter;
-   functions->BindTexture		= nouveauBindTexture;
-   functions->NewTextureObject		= nouveauNewTextureObject;
-   functions->DeleteTexture		= nouveauDeleteTexture;
-   functions->IsTextureResident		= driIsTextureResident;
-
-   driInitTextureFormats();
-*/
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_tex.h b/src/mesa/drivers/dri/nouveau/nouveau_tex.h
deleted file mode 100644
index 7ac71f8300b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nouveau_tex.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-#ifndef __NOUVEAU_TEX_H__
-#define __NOUVEAU_TEX_H__
-
-#include <errno.h>
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
-
-extern void nouveauTexInitFunctions( struct dd_function_table *functions );
-
-#endif /* __NOUVEAU_TEX_H__ */
diff --git a/src/mesa/drivers/dri/nouveau/nv04_state.c b/src/mesa/drivers/dri/nouveau/nv04_state.c
deleted file mode 100644
index 25df3d2a624..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv04_state.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/**************************************************************************
-
-Copyright 2007 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_msg.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-static uint32_t nv04_compare_func(GLuint f)
-{
-	switch ( f ) {
-		case GL_NEVER:		return 1;
-		case GL_LESS:		return 2;
-		case GL_EQUAL:		return 3;
-		case GL_LEQUAL:		return 4;
-		case GL_GREATER:	return 5;
-		case GL_NOTEQUAL:	return 6;
-		case GL_GEQUAL:		return 7;
-		case GL_ALWAYS:		return 8;
-	}
-	WARN_ONCE("Unable to find the function\n");
-	return 0;
-}
-
-static uint32_t nv04_blend_func(GLuint f)
-{
-	switch ( f ) {
-		case GL_ZERO:			return 0x1;
-		case GL_ONE:			return 0x2;
-		case GL_SRC_COLOR:		return 0x3;
-		case GL_ONE_MINUS_SRC_COLOR:	return 0x4;
-		case GL_SRC_ALPHA:		return 0x5;
-		case GL_ONE_MINUS_SRC_ALPHA:	return 0x6;
-		case GL_DST_ALPHA:		return 0x7;
-		case GL_ONE_MINUS_DST_ALPHA:	return 0x8;
-		case GL_DST_COLOR:		return 0x9;
-		case GL_ONE_MINUS_DST_COLOR:	return 0xA;
-		case GL_SRC_ALPHA_SATURATE:	return 0xB;
-	}
-	WARN_ONCE("Unable to find the function 0x%x\n",f);
-	return 0;
-}
-
-static void nv04_emit_control(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	uint32_t control,cull;
-	GLubyte alpha_ref;
-
-	CLAMPED_FLOAT_TO_UBYTE(alpha_ref, ctx->Color.AlphaRef);
-	control=alpha_ref;
-	control|=(nv04_compare_func(ctx->Color.AlphaFunc)<<8);
-	control|=(ctx->Color.AlphaEnabled<<12);
-	control|=(1<<13);
-	control|=(ctx->Depth.Test<<14);
-	control|=(nv04_compare_func(ctx->Depth.Func)<<16);
-	if ((ctx->Polygon.CullFlag)&&(ctx->Polygon.CullFaceMode!=GL_FRONT_AND_BACK))
-	{
-		if ((ctx->Polygon.FrontFace==GL_CW)&&(ctx->Polygon.CullFaceMode==GL_FRONT))
-			cull=2;
-		if ((ctx->Polygon.FrontFace==GL_CW)&&(ctx->Polygon.CullFaceMode==GL_BACK))
-			cull=3;
-		if ((ctx->Polygon.FrontFace==GL_CCW)&&(ctx->Polygon.CullFaceMode==GL_FRONT))
-			cull=3;
-		if ((ctx->Polygon.FrontFace==GL_CCW)&&(ctx->Polygon.CullFaceMode==GL_BACK))
-			cull=2;
-	}
-	else
-		if (ctx->Polygon.CullFaceMode==GL_FRONT_AND_BACK)
-			cull=0;
-		else
-			cull=1;
-	control|=(cull<<20);
-	control|=(ctx->Color.DitherFlag<<22);
-	if ((ctx->Depth.Test)&&(ctx->Depth.Mask))
-		control|=(1<<24);
-
-	control|=(1<<30); // integer zbuffer format
-
-	BEGIN_RING_CACHE(NvSub3D, NV04_DX5_TEXTURED_TRIANGLE_CONTROL, 1);
-	OUT_RING_CACHE(control);
-}
-
-static void nv04_emit_blend(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	uint32_t blend;
-
-	blend=0x4; // texture MODULATE_ALPHA
-	blend|=0x20; // alpha is MSB
-	switch(ctx->Light.ShadeModel) {
-		case GL_SMOOTH:blend|=(1<<6);break;
-		case GL_FLAT:  blend|=(2<<6);break;
-		default:break;
-	}
-	if (ctx->Hint.PerspectiveCorrection!=GL_FASTEST)
-		blend|=(1<<8);
-	blend|=(ctx->Fog.Enabled<<16);
-	blend|=(ctx->Color.BlendEnabled<<20);
-	blend|=(nv04_blend_func(ctx->Color.BlendSrcRGB)<<24);
-	blend|=(nv04_blend_func(ctx->Color.BlendDstRGB)<<28);
-
-	BEGIN_RING_CACHE(NvSub3D, NV04_DX5_TEXTURED_TRIANGLE_BLEND, 1);
-	OUT_RING_CACHE(blend);
-}
-
-static void nv04_emit_fog_color(GLcontext *ctx)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte c[4];
-	c[0] = FLOAT_TO_UBYTE( ctx->Fog.Color[0] );
-	c[1] = FLOAT_TO_UBYTE( ctx->Fog.Color[1] );
-	c[2] = FLOAT_TO_UBYTE( ctx->Fog.Color[2] );
-	c[3] = FLOAT_TO_UBYTE( ctx->Fog.Color[3] );
-	BEGIN_RING_CACHE(NvSub3D, NV04_DX5_TEXTURED_TRIANGLE_FOG_COLOR, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888_REV(c[0],c[1],c[2],c[3]));
-}
-
-static void nv04AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
-{
-	nv04_emit_control(ctx);
-}
-
-static void nv04BlendColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nv04_emit_blend(ctx);
-}
-
-static void nv04BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB, GLenum modeA)
-{
-	nv04_emit_blend(ctx);
-}
-
-
-static void nv04BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB,
-		GLenum sfactorA, GLenum dfactorA)
-{
-	nv04_emit_blend(ctx);
-}
-
-static void nv04Clear(GLcontext *ctx, GLbitfield mask)
-{
-	/* TODO */
-}
-
-static void nv04ClearColor(GLcontext *ctx, const GLfloat color[4])
-{
-	/* TODO */
-}
-
-static void nv04ClearDepth(GLcontext *ctx, GLclampd d)
-{
-	/* TODO */
-}
-
-static void nv04ClearStencil(GLcontext *ctx, GLint s)
-{
-	/* TODO */
-}
-
-static void nv04ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
-{
-	/* TODO */
-}
-
-static void nv04ColorMask(GLcontext *ctx, GLboolean rmask, GLboolean gmask,
-		GLboolean bmask, GLboolean amask )
-{
-	/* TODO */
-}
-
-static void nv04ColorMaterial(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	/* TODO I need love */
-}
-
-static void nv04CullFace(GLcontext *ctx, GLenum mode)
-{
-	nv04_emit_control(ctx);
-}
-
-static void nv04FrontFace(GLcontext *ctx, GLenum mode)
-{
-	/* TODO */
-}
-
-static void nv04DepthFunc(GLcontext *ctx, GLenum func)
-{
-	nv04_emit_control(ctx);
-}
-
-static void nv04DepthMask(GLcontext *ctx, GLboolean flag)
-{
-	/* TODO */
-}
-
-static void nv04DepthRange(GLcontext *ctx, GLclampd nearval, GLclampd farval)
-{
-	/* TODO */
-}
-
-/** Specify the current buffer for writing */
-//void (*DrawBuffer)( GLcontext *ctx, GLenum buffer );
-/** Specify the buffers for writing for fragment programs*/
-//void (*DrawBuffers)( GLcontext *ctx, GLsizei n, const GLenum *buffers );
-
-static void nv04Enable(GLcontext *ctx, GLenum cap, GLboolean state)
-{
-	switch(cap)
-	{
-		case GL_ALPHA_TEST:
-			nv04_emit_control(ctx);
-			break;
-//		case GL_AUTO_NORMAL:
-		case GL_BLEND:
-			nv04_emit_blend(ctx);
-			break;
-//		case GL_CLIP_PLANE0:
-//		case GL_CLIP_PLANE1:
-//		case GL_CLIP_PLANE2:
-//		case GL_CLIP_PLANE3:
-//		case GL_CLIP_PLANE4:
-//		case GL_CLIP_PLANE5:
-//		case GL_COLOR_LOGIC_OP:
-//		case GL_COLOR_MATERIAL:
-//		case GL_COLOR_SUM_EXT:
-//		case GL_COLOR_TABLE:
-//		case GL_CONVOLUTION_1D:
-//		case GL_CONVOLUTION_2D:
-		case GL_CULL_FACE:
-			nv04_emit_control(ctx);
-			break;
-		case GL_DEPTH_TEST:
-			nv04_emit_control(ctx);
-			break;
-		case GL_DITHER:
-			nv04_emit_control(ctx);
-			break;
-		case GL_FOG:
-			nv04_emit_blend(ctx);
-			nv04_emit_fog_color(ctx);
-			break;
-//		case GL_HISTOGRAM:
-//		case GL_INDEX_LOGIC_OP:
-//		case GL_LIGHT0:
-//		case GL_LIGHT1:
-//		case GL_LIGHT2:
-//		case GL_LIGHT3:
-//		case GL_LIGHT4:
-//		case GL_LIGHT5:
-//		case GL_LIGHT6:
-//		case GL_LIGHT7:
-//		case GL_LIGHTING:
-//		case GL_LINE_SMOOTH:
-//		case GL_LINE_STIPPLE:
-//		case GL_MAP1_COLOR_4:
-//		case GL_MAP1_INDEX:
-//		case GL_MAP1_NORMAL:
-//		case GL_MAP1_TEXTURE_COORD_1:
-//		case GL_MAP1_TEXTURE_COORD_2:
-//		case GL_MAP1_TEXTURE_COORD_3:
-//		case GL_MAP1_TEXTURE_COORD_4:
-//		case GL_MAP1_VERTEX_3:
-//		case GL_MAP1_VERTEX_4:
-//		case GL_MAP2_COLOR_4:
-//		case GL_MAP2_INDEX:
-//		case GL_MAP2_NORMAL:
-//		case GL_MAP2_TEXTURE_COORD_1:
-//		case GL_MAP2_TEXTURE_COORD_2:
-//		case GL_MAP2_TEXTURE_COORD_3:
-//		case GL_MAP2_TEXTURE_COORD_4:
-//		case GL_MAP2_VERTEX_3:
-//		case GL_MAP2_VERTEX_4:
-//		case GL_MINMAX:
-//		case GL_NORMALIZE:
-//		case GL_POINT_SMOOTH:
-//		case GL_POLYGON_OFFSET_POINT:
-//		case GL_POLYGON_OFFSET_LINE:
-//		case GL_POLYGON_OFFSET_FILL:
-//		case GL_POLYGON_SMOOTH:
-//		case GL_POLYGON_STIPPLE:
-//		case GL_POST_COLOR_MATRIX_COLOR_TABLE:
-//		case GL_POST_CONVOLUTION_COLOR_TABLE:
-//		case GL_RESCALE_NORMAL:
-//		case GL_SCISSOR_TEST:
-//		case GL_SEPARABLE_2D:
-//		case GL_STENCIL_TEST:
-//		case GL_TEXTURE_GEN_Q:
-//		case GL_TEXTURE_GEN_R:
-//		case GL_TEXTURE_GEN_S:
-//		case GL_TEXTURE_GEN_T:
-//		case GL_TEXTURE_1D:
-//		case GL_TEXTURE_2D:
-//		case GL_TEXTURE_3D:
-	}
-}
-
-static void nv04Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	nv04_emit_blend(ctx);
-	nv04_emit_fog_color(ctx);
-}
-   
-static void nv04Hint(GLcontext *ctx, GLenum target, GLenum mode)
-{
-	switch(target)
-	{
-		case GL_PERSPECTIVE_CORRECTION_HINT:nv04_emit_blend(ctx);break;
-		default:break;
-	}
-}
-
-static void nv04LineStipple(GLcontext *ctx, GLint factor, GLushort pattern )
-{
-	/* TODO not even in your dreams */
-}
-
-static void nv04LineWidth(GLcontext *ctx, GLfloat width)
-{
-	/* TODO */
-}
-
-static void nv04LogicOpcode(GLcontext *ctx, GLenum opcode)
-{
-	/* TODO */
-}
-
-static void nv04PointParameterfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/* TODO */
-}
-
-static void nv04PointSize(GLcontext *ctx, GLfloat size)
-{
-	/* TODO */
-}
-
-static void nv04PolygonMode(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	/* TODO */
-}
-
-/** Set the scale and units used to calculate depth values */
-static void nv04PolygonOffset(GLcontext *ctx, GLfloat factor, GLfloat units)
-{
-	/* TODO */
-}
-
-/** Set the polygon stippling pattern */
-static void nv04PolygonStipple(GLcontext *ctx, const GLubyte *mask )
-{
-	/* TODO */
-}
-
-/* Specifies the current buffer for reading */
-void (*ReadBuffer)( GLcontext *ctx, GLenum buffer );
-/** Set rasterization mode */
-void (*RenderMode)(GLcontext *ctx, GLenum mode );
-
-/** Define the scissor box */
-static void nv04Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-	/* TODO */
-}
-
-/** Select flat or smooth shading */
-static void nv04ShadeModel(GLcontext *ctx, GLenum mode)
-{
-	nv04_emit_blend(ctx);
-}
-
-/** OpenGL 2.0 two-sided StencilFunc */
-static void nv04StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func,
-		GLint ref, GLuint mask)
-{
-	/* TODO */
-}
-
-/** OpenGL 2.0 two-sided StencilMask */
-static void nv04StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
-{
-	/* TODO */
-}
-
-/** OpenGL 2.0 two-sided StencilOp */
-static void nv04StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail,
-		GLenum zfail, GLenum zpass)
-{
-	/* TODO */
-}
-
-/** Control the generation of texture coordinates */
-void (*TexGen)(GLcontext *ctx, GLenum coord, GLenum pname,
-		const GLfloat *params);
-/** Set texture environment parameters */
-void (*TexEnv)(GLcontext *ctx, GLenum target, GLenum pname,
-		const GLfloat *param);
-/** Set texture parameters */
-void (*TexParameter)(GLcontext *ctx, GLenum target,
-		struct gl_texture_object *texObj,
-		GLenum pname, const GLfloat *params);
-
-/* Update anything that depends on the window position/size */
-static void nv04WindowMoved(nouveauContextPtr nmesa)
-{
-}
-
-/* Initialise any card-specific non-GL related state */
-static GLboolean nv04InitCard(nouveauContextPtr nmesa)
-{
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-	nouveauObjectOnSubchannel(nmesa, NvSubCtxSurf3D, NvCtxSurf3D);
-
-	BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY, 3);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, NV04_DX5_TEXTURED_TRIANGLE_SURFACE, 1);
-	OUT_RING(NvCtxSurf3D);
-	return GL_TRUE;
-}
-
-/* Update buffer offset/pitch/format */
-static GLboolean nv04BindBuffers(nouveauContextPtr nmesa, int num_color,
-		nouveau_renderbuffer **color,
-		nouveau_renderbuffer *depth)
-{
-	GLuint x, y, w, h;
-	uint32_t depth_pitch=(depth?depth->pitch:0+15)&~15+16;
-	if (depth_pitch<256) depth_pitch=256;
-
-	w = color[0]->mesa.Width;
-	h = color[0]->mesa.Height;
-	x = nmesa->drawX;
-	y = nmesa->drawY;
-
-	BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_FORMAT, 1);
-	if (color[0]->mesa._ActualFormat == GL_RGBA8)
-		OUT_RING(0x108/*A8R8G8B8*/);
-	else
-		OUT_RING(0x103/*R5G6B5*/);
-
-	/* FIXME pitches have to be aligned ! */
-	BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_PITCH, 2);
-	OUT_RING(color[0]->pitch|(depth_pitch<<16));
-	OUT_RING(color[0]->offset);
-	if (depth) {
-		BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1);
-		OUT_RING(depth->offset);
-	}
-
-//	BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL, 2);
-//	OUT_RING((w<<16)|x);
-//	OUT_RING((h<<16)|y);
-
-
-	/* FIXME not sure... */
-/*	BEGIN_RING_SIZE(NvSubCtxSurf3D, NV04_CONTEXT_SURFACES_3D_CLIP_SIZE, 1);
-	OUT_RING((h<<16)|w);*/
-
-	return GL_TRUE;
-}
-
-void nv04InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	func->AlphaFunc			= nv04AlphaFunc;
-	func->BlendColor		= nv04BlendColor;
-	func->BlendEquationSeparate	= nv04BlendEquationSeparate;
-	func->BlendFuncSeparate		= nv04BlendFuncSeparate;
-	func->Clear			= nv04Clear;
-	func->ClearColor		= nv04ClearColor;
-	func->ClearDepth		= nv04ClearDepth;
-	func->ClearStencil		= nv04ClearStencil;
-	func->ClipPlane			= nv04ClipPlane;
-	func->ColorMask			= nv04ColorMask;
-	func->ColorMaterial		= nv04ColorMaterial;
-	func->CullFace			= nv04CullFace;
-	func->FrontFace			= nv04FrontFace;
-	func->DepthFunc			= nv04DepthFunc;
-	func->DepthMask			= nv04DepthMask;
-	func->DepthRange		= nv04DepthRange;
-	func->Enable			= nv04Enable;
-	func->Fogfv			= nv04Fogfv;
-	func->Hint			= nv04Hint;
-/*	func->Lightfv			= nv04Lightfv;*/
-/*	func->LightModelfv		= nv04LightModelfv; */
-	func->LineStipple		= nv04LineStipple;		/* Not for NV04 */
-	func->LineWidth			= nv04LineWidth;
-	func->LogicOpcode		= nv04LogicOpcode;
-	func->PointParameterfv		= nv04PointParameterfv;
-	func->PointSize			= nv04PointSize;
-	func->PolygonMode		= nv04PolygonMode;
-	func->PolygonOffset		= nv04PolygonOffset;
-	func->PolygonStipple		= nv04PolygonStipple;		/* Not for NV04 */
-/*	func->ReadBuffer		= nv04ReadBuffer;*/
-/*	func->RenderMode		= nv04RenderMode;*/
-	func->Scissor			= nv04Scissor;
-	func->ShadeModel		= nv04ShadeModel;
-	func->StencilFuncSeparate	= nv04StencilFuncSeparate;
-	func->StencilMaskSeparate	= nv04StencilMaskSeparate;
-	func->StencilOpSeparate		= nv04StencilOpSeparate;
-/*	func->TexGen			= nv04TexGen;*/
-/*	func->TexParameter		= nv04TexParameter;*/
-/*	func->TextureMatrix		= nv04TextureMatrix;*/
-
-	nmesa->hw_func.InitCard		= nv04InitCard;
-	nmesa->hw_func.BindBuffers	= nv04BindBuffers;
-	nmesa->hw_func.WindowMoved	= nv04WindowMoved;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv04_swtcl.c b/src/mesa/drivers/dri/nouveau/nv04_swtcl.c
deleted file mode 100644
index cb072e0bdbc..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv04_swtcl.c
+++ /dev/null
@@ -1,619 +0,0 @@
-/*
- * Copyright 2007 Stephane Marchesin. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-/* Software TCL for NV04, NV05, NV06 */
-
-#include <stdio.h>
-#include <math.h>
-
-#include "glheader.h"
-#include "context.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
-#include "enums.h"
-
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/t_context.h"
-#include "tnl/t_pipeline.h"
-
-#include "nouveau_swtcl.h"
-#include "nv04_swtcl.h"
-#include "nouveau_context.h"
-#include "nouveau_span.h"
-#include "nouveau_reg.h"
-#include "nouveau_tex.h"
-#include "nouveau_fifo.h"
-#include "nouveau_msg.h"
-#include "nouveau_object.h"
-
-static void nv04RasterPrimitive( GLcontext *ctx, GLenum rprim, GLuint hwprim );
-static void nv04RenderPrimitive( GLcontext *ctx, GLenum prim );
-static void nv04ResetLineStipple( GLcontext *ctx );
-
-
-static inline void nv04_2triangles(struct nouveau_context *nmesa,nouveauVertex* v0,nouveauVertex* v1,nouveauVertex* v2,nouveauVertex* v3,nouveauVertex* v4,nouveauVertex* v5)
-{
-	BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0xA),49);
-	OUT_RINGp(v0,8);
-	OUT_RINGp(v1,8);
-	OUT_RINGp(v2,8);
-	OUT_RINGp(v3,8);
-	OUT_RINGp(v4,8);
-	OUT_RINGp(v5,8);
-	OUT_RING(0xFEDCBA);
-}
-
-static inline void nv04_1triangle(struct nouveau_context *nmesa,nouveauVertex* v0,nouveauVertex* v1,nouveauVertex* v2)
-{
-	BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0xD),25);
-	OUT_RINGp(v0,8);
-	OUT_RINGp(v1,8);
-	OUT_RINGp(v2,8);
-	OUT_RING(0xFED);
-}
-
-static inline void nv04_1quad(struct nouveau_context *nmesa,nouveauVertex* v0,nouveauVertex* v1,nouveauVertex* v2,nouveauVertex* v3)
-{
-	BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0xC),33);
-	OUT_RINGp(v0,8);
-	OUT_RINGp(v1,8);
-	OUT_RINGp(v2,8);
-	OUT_RINGp(v3,8);
-	OUT_RING(0xFECEDC);
-}
-
-static inline void nv04_render_points(GLcontext *ctx,GLuint first,GLuint last)
-{
-	WARN_ONCE("Unimplemented\n");
-}
-
-static inline void nv04_render_line(GLcontext *ctx,GLuint v1,GLuint v2)
-{
-	WARN_ONCE("Unimplemented\n");
-}
-
-static inline void nv04_render_triangle(GLcontext *ctx,GLuint v1,GLuint v2,GLuint v3)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-
-	nv04_1triangle(nmesa,
-			(nouveauVertex*)(vertptr+v1*vertsize),
-			(nouveauVertex*)(vertptr+v2*vertsize),
-			(nouveauVertex*)(vertptr+v3*vertsize)
-		  );
-}
-
-static inline void nv04_render_quad(GLcontext *ctx,GLuint v1,GLuint v2,GLuint v3,GLuint v4)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-
-	nv04_1quad(nmesa,
-			(nouveauVertex*)(vertptr+v1*vertsize),
-			(nouveauVertex*)(vertptr+v2*vertsize),
-			(nouveauVertex*)(vertptr+v3*vertsize),
-			(nouveauVertex*)(vertptr+v4*vertsize)
-		  );
-}
-
-/**********************************************************************/
-/*               Render unclipped begin/end objects                   */
-/**********************************************************************/
-
-static void nv04_render_points_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// erm
-}
-
-static void nv04_render_lines_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// umm
-}
-
-static void nv04_render_line_strip_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// yeah
-}
-
-static void nv04_render_line_loop_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// right
-}
-
-static void nv04_render_triangles_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	int i;
-
-	for(i=start;i<count-5;i+=6)
-		nv04_2triangles(nmesa,
-				(nouveauVertex*)(vertptr+(i+0)*vertsize),
-				(nouveauVertex*)(vertptr+(i+1)*vertsize),
-				(nouveauVertex*)(vertptr+(i+2)*vertsize),
-				(nouveauVertex*)(vertptr+(i+3)*vertsize),
-				(nouveauVertex*)(vertptr+(i+4)*vertsize),
-				(nouveauVertex*)(vertptr+(i+5)*vertsize)
-			       );
-	if (i!=count)
-	{
-		nv04_1triangle(nmesa,
-				(nouveauVertex*)(vertptr+(i+0)*vertsize),
-				(nouveauVertex*)(vertptr+(i+1)*vertsize),
-				(nouveauVertex*)(vertptr+(i+2)*vertsize)
-			       );
-		i+=3;
-	}
-	if (i!=count)
-		printf("oops\n");
-}
-
-static void nv04_render_tri_strip_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	uint32_t striptbl[]={0x321210,0x543432,0x765654,0x987876,0xBA9A98,0xDCBCBA,0xFEDEDC};
-	int i,j;
-
-	for(i=start;i<count;i+=14)
-	{
-		int numvert=MIN2(16,count-i);
-		int numtri=numvert-2;
-		if (numvert<3)
-			break;
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x0),numvert*8);
-		for(j=0;j<numvert;j++)
-			OUT_RINGp((nouveauVertex*)(vertptr+(i+j)*vertsize),8);
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_DRAW|NONINC_METHOD,(numtri+1)/2);
-		for(j=0;j<numtri/2;j++)
-			OUT_RING(striptbl[j]);
-		if (numtri%2)
-			OUT_RING(striptbl[numtri/2]&0xFFF);
-	}
-}
-
-static void nv04_render_tri_fan_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	uint32_t fantbl[]={0x320210,0x540430,0x760650,0x980870,0xBA0A90,0xDC0CB0,0xFE0ED0};
-	int i,j;
-
-	BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x0),8);
-	OUT_RINGp((nouveauVertex*)(vertptr+start*vertsize),8);
-
-	for(i=start+1;i<count;i+=14)
-	{
-		int numvert=MIN2(15,count-i);
-		int numtri=numvert-1;
-		if (numvert<3)
-			break;
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x1),numvert*8);
-
-		for(j=0;j<numvert;j++)
-			OUT_RINGp((nouveauVertex*)(vertptr+(i+j)*vertsize),8);
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_DRAW|NONINC_METHOD,(numtri+1)/2);
-		for(j=0;j<numtri/2;j++)
-			OUT_RING(fantbl[j]);
-		if (numtri%2)
-			OUT_RING(fantbl[numtri/2]&0xFFF);
-	}
-}
-
-static void nv04_render_quads_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	int i;
-
-	for(i=start;i<count;i+=4)
-		nv04_1quad(nmesa,
-				(nouveauVertex*)(vertptr+(i+0)*vertsize),
-				(nouveauVertex*)(vertptr+(i+1)*vertsize),
-				(nouveauVertex*)(vertptr+(i+2)*vertsize),
-				(nouveauVertex*)(vertptr+(i+3)*vertsize)
-			       );
-}
-
-static void nv04_render_noop_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-}
-
-static void (*nv04_render_tab_verts[GL_POLYGON+2])(GLcontext *,
-							   GLuint,
-							   GLuint,
-							   GLuint) =
-{
-   nv04_render_points_verts,
-   nv04_render_lines_verts,
-   nv04_render_line_loop_verts,
-   nv04_render_line_strip_verts,
-   nv04_render_triangles_verts,
-   nv04_render_tri_strip_verts,
-   nv04_render_tri_fan_verts,
-   nv04_render_quads_verts,
-   nv04_render_tri_strip_verts,  //nv04_render_quad_strip_verts
-   nv04_render_tri_fan_verts,    //nv04_render_poly_verts
-   nv04_render_noop_verts,
-};
-
-
-static void nv04_render_points_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// erm
-}
-
-static void nv04_render_lines_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// umm
-}
-
-static void nv04_render_line_strip_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// yeah
-}
-
-static void nv04_render_line_loop_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	// right
-}
-
-static void nv04_render_triangles_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;
-	int i;
-
-	for(i=start;i<count-5;i+=6)
-		nv04_2triangles(nmesa,
-				(nouveauVertex*)(vertptr+elt[i+0]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+1]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+2]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+3]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+4]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+5]*vertsize)
-			       );
-	if (i!=count)
-	{
-		nv04_1triangle(nmesa,
-				(nouveauVertex*)(vertptr+elt[i+0]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+1]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+2]*vertsize)
-			       );
-		i+=3;
-	}
-	if (i!=count)
-		printf("oops\n");
-}
-
-static void nv04_render_tri_strip_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	uint32_t striptbl[]={0x321210,0x543432,0x765654,0x987876,0xBA9A98,0xDCBCBA,0xFEDEDC};
-	const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;
-	int i,j;
-
-	for(i=start;i<count;i+=14)
-	{
-		int numvert=MIN2(16,count-i);
-		int numtri=numvert-2;
-		if (numvert<3)
-			break;
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x0),numvert*8);
-		for(j=0;j<numvert;j++)
-			OUT_RINGp((nouveauVertex*)(vertptr+elt[i+j]*vertsize),8);
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_DRAW|NONINC_METHOD,(numtri+1)/2);
-		for(j=0;j<numtri/2;j++)
-			OUT_RING(striptbl[j]);
-		if (numtri%2)
-			OUT_RING(striptbl[numtri/2]&0xFFF);
-	}
-}
-
-static void nv04_render_tri_fan_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	uint32_t fantbl[]={0x320210,0x540430,0x760650,0x980870,0xBA0A90,0xDC0CB0,0xFE0ED0};
-	const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;
-	int i,j;
-
-	BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x0),8);
-	OUT_RINGp((nouveauVertex*)(vertptr+elt[start]*vertsize),8);
-
-	for(i=start+1;i<count;i+=14)
-	{
-		int numvert=MIN2(15,count-i);
-		int numtri=numvert-2;
-		if (numvert<3)
-			break;
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_TLVERTEX_SX(0x1),numvert*8);
-
-		for(j=0;j<numvert;j++)
-			OUT_RINGp((nouveauVertex*)(vertptr+elt[i+j]*vertsize),8);
-
-		BEGIN_RING_SIZE(NvSub3D,NV04_DX5_TEXTURED_TRIANGLE_DRAW|NONINC_METHOD,(numtri+1)/2);
-		for(j=0;j<numtri/2;j++)
-			OUT_RING(fantbl[j]);
-		if (numtri%2)
-			OUT_RING(fantbl[numtri/2]&0xFFF);
-	}
-}
-
-static void nv04_render_quads_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;
-	int i;
-
-	for(i=start;i<count;i+=4)
-		nv04_1quad(nmesa,
-				(nouveauVertex*)(vertptr+elt[i+0]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+1]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+2]*vertsize),
-				(nouveauVertex*)(vertptr+elt[i+3]*vertsize)
-			       );
-}
-
-static void nv04_render_noop_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-}
-
-static void (*nv04_render_tab_elts[GL_POLYGON+2])(GLcontext *,
-							   GLuint,
-							   GLuint,
-							   GLuint) =
-{
-   nv04_render_points_elts,
-   nv04_render_lines_elts,
-   nv04_render_line_loop_elts,
-   nv04_render_line_strip_elts,
-   nv04_render_triangles_elts,
-   nv04_render_tri_strip_elts,
-   nv04_render_tri_fan_elts,
-   nv04_render_quads_elts,
-   nv04_render_tri_strip_elts,   // nv04_render_quad_strip_elts,
-   nv04_render_tri_fan_elts,     // nv04_render_poly_elts,
-   nv04_render_noop_elts,
-};
-
-
-/**********************************************************************/
-/*                    Choose render functions                         */
-/**********************************************************************/
-
-
-#define EMIT_ATTR( ATTR, STYLE )					\
-do {									\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].attrib = (ATTR);	\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].format = (STYLE);	\
-   nmesa->vertex_attr_count++;						\
-} while (0)
-
-#define EMIT_PAD( N )							\
-do {									\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].attrib = 0;		\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].format = EMIT_PAD;	\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].offset = (N);		\
-   nmesa->vertex_attr_count++;						\
-} while (0)
-
-static void nv04_render_clipped_line(GLcontext *ctx,GLuint ii,GLuint jj)
-{
-}
-
-static void nv04_render_clipped_poly(GLcontext *ctx,const GLuint *elts,GLuint n)
-{
-}
-
-static void nv04ChooseRenderState(GLcontext *ctx)
-{
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-
-	tnl->Driver.Render.PrimTabVerts = nv04_render_tab_verts;
-	tnl->Driver.Render.PrimTabElts = nv04_render_tab_elts;
-	tnl->Driver.Render.ClippedLine = nv04_render_clipped_line;
-	tnl->Driver.Render.ClippedPolygon = nv04_render_clipped_poly;
-	tnl->Driver.Render.Points = nv04_render_points;
-	tnl->Driver.Render.Line = nv04_render_line;
-	tnl->Driver.Render.Triangle = nv04_render_triangle;
-	tnl->Driver.Render.Quad = nv04_render_quad;
-}
-
-
-
-static inline void nv04OutputVertexFormat(struct nouveau_context* nmesa)
-{
-	GLcontext* ctx=nmesa->glCtx;
-	DECLARE_RENDERINPUTS(index);
-
-	/*
-	 * Tell t_vertex about the vertex format
-	 */
-	nmesa->vertex_attr_count = 0;
-	RENDERINPUTS_COPY(index, nmesa->render_inputs_bitset);
-
-	// SX SY SZ INVW
-	// FIXME : we use W instead of INVW, but since W=1 it doesn't matter
-	if (RENDERINPUTS_TEST(index, _TNL_ATTRIB_POS))
-		EMIT_ATTR(_TNL_ATTRIB_POS,EMIT_4F_VIEWPORT);
-	else
-		EMIT_PAD(4*sizeof(float));
-
-	// COLOR
-	if (RENDERINPUTS_TEST(index, _TNL_ATTRIB_COLOR0))
-		EMIT_ATTR(_TNL_ATTRIB_COLOR0,EMIT_4UB_4F_ABGR);
-	else
-		EMIT_PAD(4);
-
-	// SPECULAR
-	if (RENDERINPUTS_TEST(index, _TNL_ATTRIB_COLOR1))
-		EMIT_ATTR(_TNL_ATTRIB_COLOR1,EMIT_4UB_4F_ABGR);
-	else
-		EMIT_PAD(4);
-
-	// TEXTURE
-	if (RENDERINPUTS_TEST(index, _TNL_ATTRIB_TEX0))
-		EMIT_ATTR(_TNL_ATTRIB_TEX0,EMIT_2F);
-	else
-		EMIT_PAD(2*sizeof(float));
-
-	nmesa->vertex_size=_tnl_install_attrs( ctx,
-			nmesa->vertex_attrs, 
-			nmesa->vertex_attr_count,
-			nmesa->viewport.m, 0 );
-}
-
-
-static void nv04ChooseVertexState( GLcontext *ctx )
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	DECLARE_RENDERINPUTS(index);
-
-	RENDERINPUTS_COPY(index, tnl->render_inputs_bitset);
-	if (!RENDERINPUTS_EQUAL(index, nmesa->render_inputs_bitset))
-	{
-		RENDERINPUTS_COPY(nmesa->render_inputs_bitset, index);
-		nv04OutputVertexFormat(nmesa);
-	}
-}
-
-
-/**********************************************************************/
-/*                 High level hooks for t_vb_render.c                 */
-/**********************************************************************/
-
-
-static void nv04RenderStart(GLcontext *ctx)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (nmesa->new_state) {
-		nmesa->new_render_state |= nmesa->new_state;
-	}
-
-	if (nmesa->new_render_state) {
-		nv04ChooseVertexState(ctx);
-		nv04ChooseRenderState(ctx);
-		nmesa->new_render_state = 0;
-	}
-}
-
-static void nv04RenderFinish(GLcontext *ctx)
-{
-}
-
-
-/* System to flush dma and emit state changes based on the rasterized
- * primitive.
- */
-void nv04RasterPrimitive(GLcontext *ctx,
-		GLenum glprim,
-		GLuint hwprim)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	assert (!nmesa->new_state);
-
-	if (hwprim != nmesa->current_primitive)
-	{
-		nmesa->current_primitive=hwprim;
-		
-	}
-}
-
-static const GLuint hw_prim[GL_POLYGON+1] = {
-	GL_POINTS+1,
-	GL_LINES+1,
-	GL_LINE_STRIP+1,
-	GL_LINE_LOOP+1,
-	GL_TRIANGLES+1,
-	GL_TRIANGLE_STRIP+1,
-	GL_TRIANGLE_FAN+1,
-	GL_QUADS+1,
-	GL_QUAD_STRIP+1,
-	GL_POLYGON+1
-};
-
-/* Callback for mesa:
- */
-static void nv04RenderPrimitive( GLcontext *ctx, GLuint prim )
-{
-	nv04RasterPrimitive( ctx, prim, hw_prim[prim] );
-}
-
-static void nv04ResetLineStipple( GLcontext *ctx )
-{
-	/* FIXME do something here */
-	WARN_ONCE("Unimplemented nv04ResetLineStipple\n");
-}
-
-
-/**********************************************************************/
-/*                            Initialization.                         */
-/**********************************************************************/
-
-void nv04TriInitFunctions(GLcontext *ctx)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-
-	tnl->Driver.RunPipeline = nouveauRunPipeline;
-	tnl->Driver.Render.Start = nv04RenderStart;
-	tnl->Driver.Render.Finish = nv04RenderFinish;
-	tnl->Driver.Render.PrimitiveNotify = nv04RenderPrimitive;
-	tnl->Driver.Render.ResetLineStipple = nv04ResetLineStipple;
-	tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
-	tnl->Driver.Render.CopyPV = _tnl_copy_pv;
-	tnl->Driver.Render.Interp = _tnl_interp;
-
-	_tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 32 );
-
-	nmesa->verts = (GLubyte *)tnl->clipspace.vertex_buf;
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nv04_swtcl.h b/src/mesa/drivers/dri/nouveau/nv04_swtcl.h
deleted file mode 100644
index 42dde5383eb..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv04_swtcl.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef __NV04_SWTCL_H__
-#define __NV04_SWTCL_H__
-
-#include "mtypes.h"
-
-extern void nv04Fallback( GLcontext *ctx, GLuint bit, GLboolean mode );
-extern void nv04FinishPrimitive(struct nouveau_context *nmesa);
-extern void nv04TriInitFunctions(GLcontext *ctx);
-#define FALLBACK( nmesa, bit, mode ) nouveauFallback( nmesa->glCtx, bit, mode )
-
-#endif /* __NV04_SWTCL_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state.c b/src/mesa/drivers/dri/nouveau/nv10_state.c
deleted file mode 100644
index 47c4b14ba6b..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv10_state.c
+++ /dev/null
@@ -1,797 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Nouveau
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-static void nv10ViewportScale(nouveauContextPtr nmesa)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLuint w = ctx->Viewport.Width;
-	GLuint h = ctx->Viewport.Height;
-
-	GLfloat max_depth = (ctx->Viewport.Near + ctx->Viewport.Far) * 0.5;
-/*	if (ctx->DrawBuffer) {
-		switch (ctx->DrawBuffer->_DepthBuffer->DepthBits) {
-			case 16:
-				max_depth *= 32767.0;
-				break;
-			case 24:
-				max_depth *= 16777215.0;
-				break;
-		}
-	} else {*/
-		/* Default to 24 bits range */	
-		max_depth *= 16777215.0;
-/*	}*/
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VIEWPORT_SCALE_X, 4);
-	OUT_RING_CACHEf ((((GLfloat) w) * 0.5) - 2048.0);
-	OUT_RING_CACHEf ((((GLfloat) h) * 0.5) - 2048.0);
-	OUT_RING_CACHEf (max_depth);
-	OUT_RING_CACHEf (0.0);
-}
-
-static void nv10AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte ubRef;
-	CLAMPED_FLOAT_TO_UBYTE(ubRef, ref);
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC, 2);
-	OUT_RING_CACHE(func);
-	OUT_RING_CACHE(ubRef);
-}
-
-static void nv10BlendColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); 
-	GLubyte cf[4];
-
-	CLAMPED_FLOAT_TO_UBYTE(cf[0], color[0]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[1], color[1]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[2], color[2]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[3], color[3]);
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_BLEND_COLOR, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888(cf[3], cf[1], cf[2], cf[0]));
-}
-
-static void nv10BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB, GLenum modeA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	assert( modeRGB == modeA );
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_BLEND_EQUATION, 1);
-	OUT_RING_CACHE(modeRGB);
-}
-
-
-static void nv10BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB,
-		GLenum sfactorA, GLenum dfactorA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	assert( sfactorRGB == sfactorA );
-	assert( dfactorRGB == dfactorA );
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC, 2);
-	OUT_RING_CACHE(sfactorRGB);
-	OUT_RING_CACHE(dfactorRGB);
-}
-
-static void nv10Clear(GLcontext *ctx, GLbitfield mask)
-{
-	/* TODO */
-}
-
-static void nv10ClearColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte c[4];
-	UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,color);
-	nmesa->clear_color_value = PACK_COLOR_8888(c[3],c[0],c[1],c[2]);
-}
-
-static void nv10ClearDepth(GLcontext *ctx, GLclampd d)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-/*	switch (ctx->DrawBuffer->_DepthBuffer->DepthBits) {
-		case 16:
-			nmesa->clear_value = (uint32_t)(d*0x7FFF);
-			break;
-		case 24:*/
-			nmesa->clear_value = ((nmesa->clear_value&0x000000FF) |
-				(((uint32_t)(d*0xFFFFFF))<<8));
-/*			break;
-	}*/
-}
-
-static void nv10ClearStencil(GLcontext *ctx, GLint s)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-/*	if (ctx->DrawBuffer->_DepthBuffer->DepthBits == 24) {*/
-		nmesa->clear_value = ((nmesa->clear_value&0xFFFFFF00)|
-			(s&0x000000FF));
-/*	}*/
-}
-
-static void nv10ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_A(plane), 4);
-	OUT_RING_CACHEf(equation[0]);
-	OUT_RING_CACHEf(equation[1]);
-	OUT_RING_CACHEf(equation[2]);
-	OUT_RING_CACHEf(equation[3]);
-}
-
-static void nv10ColorMask(GLcontext *ctx, GLboolean rmask, GLboolean gmask,
-		GLboolean bmask, GLboolean amask )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_COLOR_MASK, 1);
-	OUT_RING_CACHE(((amask && 0x01) << 24) | ((rmask && 0x01) << 16) | ((gmask && 0x01)<< 8) | ((bmask && 0x01) << 0));
-}
-
-static void nv10ColorMaterial(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	/* TODO I need love */
-}
-
-static void nv10CullFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_CULL_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv10FrontFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FRONT_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv10DepthFunc(GLcontext *ctx, GLenum func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_DEPTH_FUNC, 1);
-	OUT_RING_CACHE(func);
-}
-
-static void nv10DepthMask(GLcontext *ctx, GLboolean flag)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE, 1);
-	OUT_RING_CACHE(flag);
-}
-
-static void nv10DepthRange(GLcontext *ctx, GLclampd nearval, GLclampd farval)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	GLfloat depth_scale = 16777216.0;
-	if (ctx->DrawBuffer->_DepthBuffer->DepthBits == 16) {
-		depth_scale = 32768.0;
-	}
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR, 2);
-	OUT_RING_CACHEf(nearval * depth_scale);
-	OUT_RING_CACHEf(farval * depth_scale);
-
-	nv10ViewportScale(nmesa);
-}
-
-/** Specify the current buffer for writing */
-//void (*DrawBuffer)( GLcontext *ctx, GLenum buffer );
-/** Specify the buffers for writing for fragment programs*/
-//void (*DrawBuffers)( GLcontext *ctx, GLsizei n, const GLenum *buffers );
-
-static void nv10Enable(GLcontext *ctx, GLenum cap, GLboolean state)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	switch(cap)
-	{
-		case GL_ALPHA_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_AUTO_NORMAL:
-		case GL_BLEND:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_CLIP_PLANE0:
-		case GL_CLIP_PLANE1:
-		case GL_CLIP_PLANE2:
-		case GL_CLIP_PLANE3:
-		case GL_CLIP_PLANE4:
-		case GL_CLIP_PLANE5:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE(cap-GL_CLIP_PLANE0), 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_COLOR_LOGIC_OP:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_COLOR_MATERIAL:
-//		case GL_COLOR_SUM_EXT:
-//		case GL_COLOR_TABLE:
-//		case GL_CONVOLUTION_1D:
-//		case GL_CONVOLUTION_2D:
-		case GL_CULL_FACE:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DEPTH_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DITHER:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_DITHER_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_FOG:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FOG_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_HISTOGRAM:
-//		case GL_INDEX_LOGIC_OP:
-		case GL_LIGHT0:
-		case GL_LIGHT1:
-		case GL_LIGHT2:
-		case GL_LIGHT3:
-		case GL_LIGHT4:
-		case GL_LIGHT5:
-		case GL_LIGHT6:
-		case GL_LIGHT7:
-			{
-			uint32_t mask=1<<(2*(cap-GL_LIGHT0));
-			nmesa->enabled_lights=((nmesa->enabled_lights&mask)|(mask*state));
-			if (nmesa->lighting_enabled)
-			{
-				BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			}
-			break;
-			}
-		case GL_LIGHTING:
-			nmesa->lighting_enabled=state;
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-			if (nmesa->lighting_enabled)
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			else
-				OUT_RING_CACHE(0x0);
-			break;
-		case GL_LINE_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_LINE_STIPPLE:
-//		case GL_MAP1_COLOR_4:
-//		case GL_MAP1_INDEX:
-//		case GL_MAP1_NORMAL:
-//		case GL_MAP1_TEXTURE_COORD_1:
-//		case GL_MAP1_TEXTURE_COORD_2:
-//		case GL_MAP1_TEXTURE_COORD_3:
-//		case GL_MAP1_TEXTURE_COORD_4:
-//		case GL_MAP1_VERTEX_3:
-//		case GL_MAP1_VERTEX_4:
-//		case GL_MAP2_COLOR_4:
-//		case GL_MAP2_INDEX:
-//		case GL_MAP2_NORMAL:
-//		case GL_MAP2_TEXTURE_COORD_1:
-//		case GL_MAP2_TEXTURE_COORD_2:
-//		case GL_MAP2_TEXTURE_COORD_3:
-//		case GL_MAP2_TEXTURE_COORD_4:
-//		case GL_MAP2_VERTEX_3:
-//		case GL_MAP2_VERTEX_4:
-//		case GL_MINMAX:
-		case GL_NORMALIZE:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POINT_SMOOTH:
-		case GL_POLYGON_OFFSET_POINT:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_LINE:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_FILL:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POLYGON_STIPPLE:
-//		case GL_POST_COLOR_MATRIX_COLOR_TABLE:
-//		case GL_POST_CONVOLUTION_COLOR_TABLE:
-//		case GL_RESCALE_NORMAL:
-//		case GL_SCISSOR_TEST:
-//		case GL_SEPARABLE_2D:
-		case GL_STENCIL_TEST:
-			// TODO BACK and FRONT ?
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_STENCIL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_TEXTURE_GEN_Q:
-//		case GL_TEXTURE_GEN_R:
-//		case GL_TEXTURE_GEN_S:
-//		case GL_TEXTURE_GEN_T:
-//		case GL_TEXTURE_1D:
-//		case GL_TEXTURE_2D:
-//		case GL_TEXTURE_3D:
-	}
-}
-
-static void nv10Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-    nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-    switch(pname)
-    {
-        case GL_FOG_MODE:
-            //BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_FOG_MODE, 1);
-            //OUT_RING_CACHE (params);
-            break;
-            /* TODO: unsure about the rest.*/
-        default:
-            break;
-    }
-
-}
-   
-static void nv10Hint(GLcontext *ctx, GLenum target, GLenum mode)
-{
-	/* TODO I need love (fog and line_smooth hints) */
-}
-
-// void (*IndexMask)(GLcontext *ctx, GLuint mask);
-
-enum {
-	SPOTLIGHT_NO_UPDATE,
-	SPOTLIGHT_UPDATE_EXPONENT,
-	SPOTLIGHT_UPDATE_DIRECTION,
-	SPOTLIGHT_UPDATE_ALL
-};
-
-static void nv10Lightfv(GLcontext *ctx, GLenum light, GLenum pname, const GLfloat *params )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLint p = light - GL_LIGHT0;
-	struct gl_light *l = &ctx->Light.Light[p];
-	int spotlight_update = SPOTLIGHT_NO_UPDATE;
-
-	switch(pname)
-	{
-		case GL_AMBIENT:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_DIFFUSE:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPECULAR:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_POSITION:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPOT_DIRECTION:
-			spotlight_update = SPOTLIGHT_UPDATE_DIRECTION;
-			break;
-		case GL_SPOT_EXPONENT:
-			spotlight_update = SPOTLIGHT_UPDATE_EXPONENT;
-			break;
-		case GL_SPOT_CUTOFF:
-			spotlight_update = SPOTLIGHT_UPDATE_ALL;
-			break;
-		case GL_CONSTANT_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_LINEAR_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_QUADRATIC_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		default:
-			break;
-	}
-
-	switch(spotlight_update) {
-		case SPOTLIGHT_UPDATE_DIRECTION:
-			{
-				GLfloat x,y,z;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(p), 3);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_EXPONENT:
-			{
-				GLfloat cc,lc,qc;
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 3);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_ALL:
-			{
-				GLfloat cc,lc,qc, x,y,z, c;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				c = spot_light_coef_a + 1.0;
-				BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 7);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-				OUT_RING_CACHEf(c);
-			}
-			break;
-		default:
-			break;
-	}
-}
-
-/** Set the lighting model parameters */
-static void (*LightModelfv)(GLcontext *ctx, GLenum pname, const GLfloat *params);
-
-
-static void nv10LineStipple(GLcontext *ctx, GLint factor, GLushort pattern )
-{
-	/* Not for NV10 */
-}
-
-static void nv10LineWidth(GLcontext *ctx, GLfloat width)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_LINE_WIDTH, 1);
-	OUT_RING_CACHE(((int) (width * 8.0)) & -4);
-}
-
-static void nv10LogicOpcode(GLcontext *ctx, GLenum opcode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP, 1);
-	OUT_RING_CACHE(opcode);
-}
-
-static void nv10PointParameterfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/*TODO: not sure what goes here. */
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	
-}
-
-static void nv10PointSize(GLcontext *ctx, GLfloat size)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POINT_SIZE, 1);
-	OUT_RING_CACHE(((int) (size * 8.0)) & -4);
-}
-
-static void nv10PolygonMode(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT, 1);
-		OUT_RING_CACHE(mode);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK, 1);
-		OUT_RING_CACHE(mode);
-	}
-}
-
-/** Set the scale and units used to calculate depth values */
-static void nv10PolygonOffset(GLcontext *ctx, GLfloat factor, GLfloat units)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR, 2);
-        OUT_RING_CACHEf(factor);
-        OUT_RING_CACHEf(units);
-}
-
-/** Set the polygon stippling pattern */
-static void nv10PolygonStipple(GLcontext *ctx, const GLubyte *mask )
-{
-	/* Not for NV10 */
-}
-
-/* Specifies the current buffer for reading */
-void (*ReadBuffer)( GLcontext *ctx, GLenum buffer );
-/** Set rasterization mode */
-void (*RenderMode)(GLcontext *ctx, GLenum mode );
-
-/** Define the scissor box */
-static void nv10Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-}
-
-/** Select flat or smooth shading */
-static void nv10ShadeModel(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_SHADE_MODEL, 1);
-	OUT_RING_CACHE(mode);
-}
-
-/** OpenGL 2.0 two-sided StencilFunc */
-static void nv10StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func,
-		GLint ref, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	/* NV10 do not have separate FRONT and BACK stencils */
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_STENCIL_FUNC_FUNC, 3);
-	OUT_RING_CACHE(func);
-	OUT_RING_CACHE(ref);
-	OUT_RING_CACHE(mask);
-}
-
-/** OpenGL 2.0 two-sided StencilMask */
-static void nv10StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	/* NV10 do not have separate FRONT and BACK stencils */
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_STENCIL_MASK, 1);
-	OUT_RING_CACHE(mask);
-}
-
-/** OpenGL 2.0 two-sided StencilOp */
-static void nv10StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail,
-		GLenum zfail, GLenum zpass)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	/* NV10 do not have separate FRONT and BACK stencils */
-	BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_STENCIL_OP_FAIL, 3);
-	OUT_RING_CACHE(fail);
-	OUT_RING_CACHE(zfail);
-	OUT_RING_CACHE(zpass);
-}
-
-/** Control the generation of texture coordinates */
-void (*TexGen)(GLcontext *ctx, GLenum coord, GLenum pname,
-		const GLfloat *params);
-/** Set texture environment parameters */
-void (*TexEnv)(GLcontext *ctx, GLenum target, GLenum pname,
-		const GLfloat *param);
-/** Set texture parameters */
-void (*TexParameter)(GLcontext *ctx, GLenum target,
-		struct gl_texture_object *texObj,
-		GLenum pname, const GLfloat *params);
-
-static void nv10TextureMatrix(GLcontext *ctx, GLuint unit, const GLmatrix *mat)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_TX_MATRIX(unit, 0), 16);
-        /*XXX: This SHOULD work.*/
-        OUT_RING_CACHEp(mat->m, 16);
-}
-
-/* Update anything that depends on the window position/size */
-static void nv10WindowMoved(nouveauContextPtr nmesa)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLfloat *v = nmesa->viewport.m;
-	GLuint w = ctx->Viewport.Width;
-	GLuint h = ctx->Viewport.Height;
-	GLuint x = ctx->Viewport.X + nmesa->drawX;
-	GLuint y = ctx->Viewport.Y + nmesa->drawY;
-	int i;
-
-        BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ, 2);
-        OUT_RING_CACHE((w << 16) | x);
-        OUT_RING_CACHE((h << 16) | y);
-
-	/* something to do with clears, possibly doesn't belong here */
-	BEGIN_RING_SIZE(NvSub3D, 0x02b4, 1);
-	OUT_RING(0);
-
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(0), 1);
-        OUT_RING_CACHE(((w+x-1) << 16) | x | 0x08000800);
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(0), 1);
-        OUT_RING_CACHE(((h+y-1) << 16) | y | 0x08000800);
-	for (i=1; i<8; i++) {
-		BEGIN_RING_CACHE(NvSub3D,
-		      NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(i), 1);
-        	OUT_RING_CACHE(0);
-		BEGIN_RING_CACHE(NvSub3D,
-		      NV10_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(i), 1);
-	        OUT_RING_CACHE(0);
-	}
-
-	nv10ViewportScale(nmesa);
-}
-
-/* Initialise any card-specific non-GL related state */
-static GLboolean nv10InitCard(nouveauContextPtr nmesa)
-{
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-
-	BEGIN_RING_SIZE(NvSub3D, NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY0, 2);
-	OUT_RING(NvDmaFB);	/* 184 dma_in_memory0 */
-	OUT_RING(NvDmaFB);	/* 188 dma_in_memory1 */
-	BEGIN_RING_SIZE(NvSub3D, NV10_TCL_PRIMITIVE_3D_SET_DMA_IN_MEMORY2, 2);
-	OUT_RING(NvDmaFB);	/* 194 dma_in_memory2 */
-	OUT_RING(NvDmaFB);	/* 198 dma_in_memory3 */
-
-	BEGIN_RING_SIZE(NvSub3D, 0x0290, 1);
-	OUT_RING(0x00100001);
-	BEGIN_RING_SIZE(NvSub3D, 0x03f4, 1);
-	OUT_RING(0);
-
-	if (nmesa->screen->card->type >= NV_11) {
-	        BEGIN_RING_SIZE(NvSub3D, 0x120, 3);
-        	OUT_RING(0);
-	        OUT_RING(1);
-	        OUT_RING(2);
-	}
-
-	return GL_TRUE;
-}
-
-/* Update buffer offset/pitch/format */
-static GLboolean nv10BindBuffers(nouveauContextPtr nmesa, int num_color,
-				 nouveau_renderbuffer **color,
-				 nouveau_renderbuffer *depth)
-{
-	GLuint x, y, w, h;
-	GLuint pitch, format, depth_pitch;
-
-	w = color[0]->mesa.Width;
-	h = color[0]->mesa.Height;
-	x = nmesa->drawX;
-	y = nmesa->drawY;
-
-	if (num_color != 1)
-		return GL_FALSE;
-
-        BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ, 6);
-        OUT_RING_CACHE((w << 16) | x);
-        OUT_RING_CACHE((h << 16) | y);
-	depth_pitch = (depth ? depth->pitch : color[0]->pitch);
-	pitch = (depth_pitch<<16) | color[0]->pitch;
-	format = 0x108;
-	if (color[0]->mesa._ActualFormat != GL_RGBA8) {
-		format = 0x103; /* R5G6B5 color buffer */
-	}
-	OUT_RING_CACHE(format);
-	OUT_RING_CACHE(pitch);
-	OUT_RING_CACHE(color[0]->offset);
-	OUT_RING_CACHE(depth ? depth->offset : color[0]->offset);
-
-	/* Always set to bottom left of buffer */
-	/*BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_X, 4);
-	OUT_RING_CACHEf (0.0);
-	OUT_RING_CACHEf ((GLfloat) h);
-	OUT_RING_CACHEf (0.0);
-	OUT_RING_CACHEf (0.0);*/
-
-	return GL_TRUE;
-}
-
-void nv10InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	func->AlphaFunc			= nv10AlphaFunc;
-	func->BlendColor		= nv10BlendColor;
-	func->BlendEquationSeparate	= nv10BlendEquationSeparate;
-	func->BlendFuncSeparate		= nv10BlendFuncSeparate;
-	func->Clear			= nv10Clear;
-	func->ClearColor		= nv10ClearColor;
-	func->ClearDepth		= nv10ClearDepth;
-	func->ClearStencil		= nv10ClearStencil;
-	func->ClipPlane			= nv10ClipPlane;
-	func->ColorMask			= nv10ColorMask;
-	func->ColorMaterial		= nv10ColorMaterial;
-	func->CullFace			= nv10CullFace;
-	func->FrontFace			= nv10FrontFace;
-	func->DepthFunc			= nv10DepthFunc;
-	func->DepthMask			= nv10DepthMask;
-	func->DepthRange		= nv10DepthRange;
-	func->Enable			= nv10Enable;
-	func->Fogfv			= nv10Fogfv;
-	func->Hint			= nv10Hint;
-	func->Lightfv			= nv10Lightfv;
-/*	func->LightModelfv		= nv10LightModelfv; */
-	func->LineStipple		= nv10LineStipple;		/* Not for NV10 */
-	func->LineWidth			= nv10LineWidth;
-	func->LogicOpcode		= nv10LogicOpcode;
-	func->PointParameterfv		= nv10PointParameterfv;
-	func->PointSize			= nv10PointSize;
-	func->PolygonMode		= nv10PolygonMode;
-	func->PolygonOffset		= nv10PolygonOffset;
-	func->PolygonStipple		= nv10PolygonStipple;		/* Not for NV10 */
-/*	func->ReadBuffer		= nv10ReadBuffer;*/
-/*	func->RenderMode		= nv10RenderMode;*/
-	func->Scissor			= nv10Scissor;
-	func->ShadeModel		= nv10ShadeModel;
-	func->StencilFuncSeparate	= nv10StencilFuncSeparate;
-	func->StencilMaskSeparate	= nv10StencilMaskSeparate;
-	func->StencilOpSeparate		= nv10StencilOpSeparate;
-/*	func->TexGen			= nv10TexGen;*/
-/*	func->TexParameter		= nv10TexParameter;*/
-	func->TextureMatrix		= nv10TextureMatrix;
-
-	nmesa->hw_func.InitCard		= nv10InitCard;
-	nmesa->hw_func.BindBuffers	= nv10BindBuffers;
-	nmesa->hw_func.WindowMoved	= nv10WindowMoved;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv10_swtcl.c b/src/mesa/drivers/dri/nouveau/nv10_swtcl.c
deleted file mode 100644
index 611469b6e41..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv10_swtcl.c
+++ /dev/null
@@ -1,639 +0,0 @@
-/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
- * Copyright 2006 Stephane Marchesin. All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sub license,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-/* Software TCL for NV10, NV20, NV30, NV40, NV50 */
-
-#include <stdio.h>
-#include <math.h>
-
-#include "glheader.h"
-#include "context.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
-#include "enums.h"
-
-#include "swrast/swrast.h"
-#include "swrast_setup/swrast_setup.h"
-#include "tnl/t_context.h"
-#include "tnl/t_pipeline.h"
-
-#include "nouveau_swtcl.h"
-#include "nv10_swtcl.h"
-#include "nouveau_context.h"
-#include "nouveau_span.h"
-#include "nouveau_reg.h"
-#include "nouveau_tex.h"
-#include "nouveau_fifo.h"
-#include "nouveau_msg.h"
-#include "nouveau_object.h"
-
-static void nv10RasterPrimitive( GLcontext *ctx, GLenum rprim, GLuint hwprim );
-static void nv10RenderPrimitive( GLcontext *ctx, GLenum prim );
-static void nv10ResetLineStipple( GLcontext *ctx );
-
-
-
-static inline void nv10StartPrimitive(struct nouveau_context* nmesa,uint32_t primitive,uint32_t size)
-{
-	if ((nmesa->screen->card->type>=NV_10) && (nmesa->screen->card->type<=NV_17))
-		BEGIN_RING_SIZE(NvSub3D,NV10_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	else if (nmesa->screen->card->type==NV_20)
-		BEGIN_RING_SIZE(NvSub3D,NV20_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	else
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	OUT_RING(primitive);
-
-	if ((nmesa->screen->card->type>=NV_10) && (nmesa->screen->card->type<=NV_17))
-		BEGIN_RING_SIZE(NvSub3D,NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_DATA|NONINC_METHOD,size);
-	else if (nmesa->screen->card->type==NV_20)
-		BEGIN_RING_SIZE(NvSub3D,NV20_TCL_PRIMITIVE_3D_VERTEX_DATA|NONINC_METHOD,size);
-	else
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_VERTEX_DATA|NONINC_METHOD,size);
-}
-
-inline void nv10FinishPrimitive(struct nouveau_context *nmesa)
-{
-	if ((nmesa->screen->card->type>=NV_10) && (nmesa->screen->card->type<=NV_17))
-		BEGIN_RING_SIZE(NvSub3D,NV10_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	else if (nmesa->screen->card->type==NV_20)
-		BEGIN_RING_SIZE(NvSub3D,NV20_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	else
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_BEGIN_END,1);
-	OUT_RING(0x0);
-	FIRE_RING();
-}
-
-
-static inline void nv10ExtendPrimitive(struct nouveau_context* nmesa, int size)
-{
-	/* make sure there's enough room. if not, wait */
-	if (RING_AVAILABLE()<size)
-	{
-		WAIT_RING(nmesa,size);
-	}
-}
-
-/**********************************************************************/
-/*               Render unclipped begin/end objects                   */
-/**********************************************************************/
-
-static inline void nv10_render_generic_primitive_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags,GLuint prim)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	GLuint size_dword = vertsize*(count-start)/4;
-
-	nv10ExtendPrimitive(nmesa, size_dword);
-	nv10StartPrimitive(nmesa,prim+1,size_dword);
-	OUT_RINGp((nouveauVertex*)(vertptr+(start*vertsize)),size_dword);
-	nv10FinishPrimitive(nmesa);
-}
-
-static void nv10_render_points_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_POINTS);
-}
-
-static void nv10_render_lines_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_LINES);
-}
-
-static void nv10_render_line_strip_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_LINE_STRIP);
-}
-
-static void nv10_render_line_loop_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_LINE_LOOP);
-}
-
-static void nv10_render_triangles_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_TRIANGLES);
-}
-
-static void nv10_render_tri_strip_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_TRIANGLE_STRIP);
-}
-
-static void nv10_render_tri_fan_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_TRIANGLE_FAN);
-}
-
-static void nv10_render_quads_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_QUADS);
-}
-
-static void nv10_render_quad_strip_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_QUAD_STRIP);
-}
-
-static void nv10_render_poly_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_verts(ctx,start,count,flags,GL_POLYGON);
-}
-
-static void nv10_render_noop_verts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-}
-
-static void (*nv10_render_tab_verts[GL_POLYGON+2])(GLcontext *,
-							   GLuint,
-							   GLuint,
-							   GLuint) =
-{
-   nv10_render_points_verts,
-   nv10_render_lines_verts,
-   nv10_render_line_loop_verts,
-   nv10_render_line_strip_verts,
-   nv10_render_triangles_verts,
-   nv10_render_tri_strip_verts,
-   nv10_render_tri_fan_verts,
-   nv10_render_quads_verts,
-   nv10_render_quad_strip_verts,
-   nv10_render_poly_verts,
-   nv10_render_noop_verts,
-};
-
-
-static inline void nv10_render_generic_primitive_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags,GLuint prim)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	GLuint size_dword = vertsize*(count-start)/4;
-	const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;
-	GLuint j;
-
-	nv10ExtendPrimitive(nmesa, size_dword);
-	nv10StartPrimitive(nmesa,prim+1,size_dword);
-	for (j=start; j<count; j++ ) {
-		OUT_RINGp((nouveauVertex*)(vertptr+(elt[j]*vertsize)),vertsize/4);
-	}
-	nv10FinishPrimitive(nmesa);
-}
-
-static void nv10_render_points_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_POINTS);
-}
-
-static void nv10_render_lines_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_LINES);
-}
-
-static void nv10_render_line_strip_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_LINE_STRIP);
-}
-
-static void nv10_render_line_loop_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_LINE_LOOP);
-}
-
-static void nv10_render_triangles_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_TRIANGLES);
-}
-
-static void nv10_render_tri_strip_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_TRIANGLE_STRIP);
-}
-
-static void nv10_render_tri_fan_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_TRIANGLE_FAN);
-}
-
-static void nv10_render_quads_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_QUADS);
-}
-
-static void nv10_render_quad_strip_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_QUAD_STRIP);
-}
-
-static void nv10_render_poly_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-	nv10_render_generic_primitive_elts(ctx,start,count,flags,GL_POLYGON);
-}
-
-static void nv10_render_noop_elts(GLcontext *ctx,GLuint start,GLuint count,GLuint flags)
-{
-}
-
-static void (*nv10_render_tab_elts[GL_POLYGON+2])(GLcontext *,
-							   GLuint,
-							   GLuint,
-							   GLuint) =
-{
-   nv10_render_points_elts,
-   nv10_render_lines_elts,
-   nv10_render_line_loop_elts,
-   nv10_render_line_strip_elts,
-   nv10_render_triangles_elts,
-   nv10_render_tri_strip_elts,
-   nv10_render_tri_fan_elts,
-   nv10_render_quads_elts,
-   nv10_render_quad_strip_elts,
-   nv10_render_poly_elts,
-   nv10_render_noop_elts,
-};
-
-
-/**********************************************************************/
-/*                    Choose render functions                         */
-/**********************************************************************/
-
-
-#define EMIT_ATTR( ATTR, STYLE )					\
-do {									\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].attrib = (ATTR);	\
-   nmesa->vertex_attrs[nmesa->vertex_attr_count].format = (STYLE);	\
-   nmesa->vertex_attr_count++;						\
-} while (0)
-
-static void nv10_render_clipped_line(GLcontext *ctx,GLuint ii,GLuint jj)
-{
-
-}
-
-static void nv10_render_clipped_poly(GLcontext *ctx,const GLuint *elts,GLuint n)
-{
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	struct vertex_buffer *VB = &tnl->vb;
-	GLuint *tmp = VB->Elts;
-	VB->Elts = (GLuint *)elts;
-	nv10_render_generic_primitive_elts( ctx, 0, n, PRIM_BEGIN|PRIM_END,GL_POLYGON );
-	VB->Elts = tmp;
-}
-
-static inline void nv10_render_points(GLcontext *ctx,GLuint first,GLuint last)
-{
-	WARN_ONCE("Unimplemented\n");
-}
-
-static inline void nv10_render_line(GLcontext *ctx,GLuint v1,GLuint v2)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	GLuint size_dword = vertsize*(2)/4;
-
-	/* OUT_RINGp wants size in DWORDS */
-	vertsize >>= 2;
-
-	nv10ExtendPrimitive(nmesa, size_dword);
-	nv10StartPrimitive(nmesa,GL_LINES+1,size_dword);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v1*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v2*vertsize)),vertsize);
-	nv10FinishPrimitive(nmesa);
-}
-
-static inline void nv10_render_triangle(GLcontext *ctx,GLuint v1,GLuint v2,GLuint v3)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	GLuint size_dword = vertsize*(3)/4;
-
-	/* OUT_RINGp wants size in DWORDS */
-	vertsize >>= 2;
-
-	nv10ExtendPrimitive(nmesa, size_dword);
-	nv10StartPrimitive(nmesa,GL_TRIANGLES+1,size_dword);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v1*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v2*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v3*vertsize)),vertsize);
-	nv10FinishPrimitive(nmesa);
-}
-
-static inline void nv10_render_quad(GLcontext *ctx,GLuint v1,GLuint v2,GLuint v3,GLuint v4)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte *vertptr = (GLubyte *)nmesa->verts;
-	GLuint vertsize = nmesa->vertex_size;
-	GLuint size_dword = vertsize*(4)/4;
-
-	/* OUT_RINGp wants size in DWORDS */
-	vertsize >>= 2;
-
-	nv10ExtendPrimitive(nmesa, size_dword);
-	nv10StartPrimitive(nmesa,GL_QUADS+1,size_dword);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v1*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v2*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v3*vertsize)),vertsize);
-	OUT_RINGp((nouveauVertex*)(vertptr+(v4*vertsize)),vertsize);
-	nv10FinishPrimitive(nmesa);
-}
-
-
-
-static void nv10ChooseRenderState(GLcontext *ctx)
-{
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	tnl->Driver.Render.PrimTabVerts = nv10_render_tab_verts;
-	tnl->Driver.Render.PrimTabElts = nv10_render_tab_elts;
-	tnl->Driver.Render.ClippedLine = nv10_render_clipped_line;
-	tnl->Driver.Render.ClippedPolygon = nv10_render_clipped_poly;
-	tnl->Driver.Render.Points = nv10_render_points;
-	tnl->Driver.Render.Line = nv10_render_line;
-	tnl->Driver.Render.Triangle = nv10_render_triangle;
-	tnl->Driver.Render.Quad = nv10_render_quad;
-}
-
-
-
-static inline void nv10OutputVertexFormat(struct nouveau_context* nmesa)
-{
-	GLcontext* ctx=nmesa->glCtx;
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	DECLARE_RENDERINPUTS(index);
-	struct vertex_buffer *VB = &tnl->vb;
-	int attr_size[16];
-	int default_attr_size[8]={3,3,3,4,3,1,4,4};
-	int i;
-	int slots=0;
-	int total_size=0;
-
-	nmesa->vertex_attr_count = 0;
-	RENDERINPUTS_COPY(index, nmesa->render_inputs_bitset);
-
-	/*
-	 * Determine attribute sizes
-	 */
-	for(i=0;i<8;i++)
-	{
-		if (RENDERINPUTS_TEST(index, i))
-			attr_size[i]=default_attr_size[i];
-		else
-			attr_size[i]=0;
-	}
-	for(i=8;i<16;i++)
-	{
-		if (RENDERINPUTS_TEST(index, i))
-			attr_size[i]=VB->TexCoordPtr[i-8]->size;
-		else
-			attr_size[i]=0;
-	}
-
-	/*
-	 * Tell t_vertex about the vertex format
-	 */
-	for(i=0;i<16;i++)
-	{
-		if (RENDERINPUTS_TEST(index, i))
-		{
-			slots=i+1;
-			switch(attr_size[i])
-			{
-				case 1:
-					EMIT_ATTR(i,EMIT_1F);
-					break;
-				case 2:
-					EMIT_ATTR(i,EMIT_2F);
-					break;
-				case 3:
-					EMIT_ATTR(i,EMIT_3F);
-					break;
-				case 4:
-					EMIT_ATTR(i,EMIT_4F);
-					break;
-			}
-			if (i==_TNL_ATTRIB_COLOR0)
-				nmesa->color_offset=total_size;
-			if (i==_TNL_ATTRIB_COLOR1)
-				nmesa->specular_offset=total_size;
-			total_size+=attr_size[i];
-		}
-	}
-
-	nmesa->vertex_size=_tnl_install_attrs( ctx,
-			nmesa->vertex_attrs, 
-			nmesa->vertex_attr_count,
-			NULL, 0 );
-	assert(nmesa->vertex_size==total_size*4);
-
-	/* 
-	 * Tell the hardware about the vertex format
-	 */
-	if ((nmesa->screen->card->type>=NV_10) && (nmesa->screen->card->type<=NV_17)) {
-		int size;
-
-#define NV_VERTEX_ATTRIBUTE_TYPE_FLOAT 2
-
-#define NV10_SET_VERTEX_ATTRIB(i,j) \
-	do {	\
-		size = attr_size[j] << 4;	\
-		size |= (attr_size[j]*4) << 8;	\
-		size |= NV_VERTEX_ATTRIBUTE_TYPE_FLOAT;	\
-		BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VERTEX_ATTR(i),1);	\
-		OUT_RING_CACHE(size);	\
-	} while (0)
-
-		NV10_SET_VERTEX_ATTRIB(0, _TNL_ATTRIB_POS);
-		NV10_SET_VERTEX_ATTRIB(1, _TNL_ATTRIB_COLOR0);
-		NV10_SET_VERTEX_ATTRIB(2, _TNL_ATTRIB_COLOR1);
-		NV10_SET_VERTEX_ATTRIB(3, _TNL_ATTRIB_TEX0);
-		NV10_SET_VERTEX_ATTRIB(4, _TNL_ATTRIB_TEX1);
-		NV10_SET_VERTEX_ATTRIB(5, _TNL_ATTRIB_NORMAL);
-		NV10_SET_VERTEX_ATTRIB(6, _TNL_ATTRIB_WEIGHT);
-		NV10_SET_VERTEX_ATTRIB(7, _TNL_ATTRIB_FOG);
-
-		BEGIN_RING_CACHE(NvSub3D, NV10_TCL_PRIMITIVE_3D_VERTEX_ARRAY_VALIDATE,1);
-		OUT_RING_CACHE(0);
-	} else if (nmesa->screen->card->type==NV_20) {
-		for(i=0;i<16;i++)
-		{
-			int size=attr_size[i];
-			BEGIN_RING_CACHE(NvSub3D,NV20_TCL_PRIMITIVE_3D_VERTEX_ATTR(i),1);
-			OUT_RING_CACHE(NV_VERTEX_ATTRIBUTE_TYPE_FLOAT|(size*0x10));
-		}
-	} else {
-		BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DO_VERTICES, 1);
-		OUT_RING(0);
-		BEGIN_RING_CACHE(NvSub3D,NV30_TCL_PRIMITIVE_3D_VERTEX_ATTR0_POS,slots);
-		for(i=0;i<slots;i++)
-		{
-			int size=attr_size[i];
-			OUT_RING_CACHE(NV_VERTEX_ATTRIBUTE_TYPE_FLOAT|(size*0x10));
-		}
-		// FIXME this is probably not needed
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_VERTEX_UNK_0,1);
-		OUT_RING(0);
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_VERTEX_UNK_0,1);
-		OUT_RING(0);
-		BEGIN_RING_SIZE(NvSub3D,NV30_TCL_PRIMITIVE_3D_VERTEX_UNK_0,1);
-		OUT_RING(0);
-	}
-}
-
-
-static void nv10ChooseVertexState( GLcontext *ctx )
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	DECLARE_RENDERINPUTS(index);
-	
-	RENDERINPUTS_COPY(index, tnl->render_inputs_bitset);
-	if (!RENDERINPUTS_EQUAL(index, nmesa->render_inputs_bitset))
-	{
-		RENDERINPUTS_COPY(nmesa->render_inputs_bitset, index);
-		nv10OutputVertexFormat(nmesa);
-	}
-
-	if (nmesa->screen->card->type == NV_30) {
-		nouveauShader *fp;
-		
-		if (ctx->FragmentProgram.Enabled) {
-			fp = (nouveauShader *) ctx->FragmentProgram.Current;
-			nvsUpdateShader(ctx, fp);
-		} else
-			nvsUpdateShader(ctx, nmesa->passthrough_fp);
-	}
-
-	if (nmesa->screen->card->type >= NV_40) {
-		/* Ensure passthrough shader is being used, and mvp matrix
-		 * is up to date
-		 */
-		nvsUpdateShader(ctx, nmesa->passthrough_vp);
-
-		/* Update texenv shader / user fragprog */
-		nvsUpdateShader(ctx, (nouveauShader*)ctx->FragmentProgram._Current);
-	}
-}
-
-
-/**********************************************************************/
-/*                 High level hooks for t_vb_render.c                 */
-/**********************************************************************/
-
-
-static void nv10RenderStart(GLcontext *ctx)
-{
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (nmesa->new_state) {
-		nmesa->new_render_state |= nmesa->new_state;
-	}
-
-	if (nmesa->new_render_state) {
-		nv10ChooseVertexState(ctx);
-		nv10ChooseRenderState(ctx);
-		nmesa->new_render_state = 0;
-	}
-}
-
-static void nv10RenderFinish(GLcontext *ctx)
-{
-}
-
-
-/* System to flush dma and emit state changes based on the rasterized
- * primitive.
- */
-void nv10RasterPrimitive(GLcontext *ctx,
-		GLenum glprim,
-		GLuint hwprim)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-
-	assert (!nmesa->new_state);
-
-	if (hwprim != nmesa->current_primitive)
-	{
-		nmesa->current_primitive=hwprim;
-		
-	}
-}
-
-static const GLuint hw_prim[GL_POLYGON+1] = {
-	GL_POINTS+1,
-	GL_LINES+1,
-	GL_LINE_STRIP+1,
-	GL_LINE_LOOP+1,
-	GL_TRIANGLES+1,
-	GL_TRIANGLE_STRIP+1,
-	GL_TRIANGLE_FAN+1,
-	GL_QUADS+1,
-	GL_QUAD_STRIP+1,
-	GL_POLYGON+1
-};
-
-/* Callback for mesa:
- */
-static void nv10RenderPrimitive( GLcontext *ctx, GLuint prim )
-{
-	nv10RasterPrimitive( ctx, prim, hw_prim[prim] );
-}
-
-static void nv10ResetLineStipple( GLcontext *ctx )
-{
-	/* FIXME do something here */
-	WARN_ONCE("Unimplemented nv10ResetLineStipple\n");
-}
-
-
-/**********************************************************************/
-/*                            Initialization.                         */
-/**********************************************************************/
-
-void nv10TriInitFunctions(GLcontext *ctx)
-{
-	struct nouveau_context *nmesa = NOUVEAU_CONTEXT(ctx);
-	TNLcontext *tnl = TNL_CONTEXT(ctx);
-
-	tnl->Driver.RunPipeline = nouveauRunPipeline;
-	tnl->Driver.Render.Start = nv10RenderStart;
-	tnl->Driver.Render.Finish = nv10RenderFinish;
-	tnl->Driver.Render.PrimitiveNotify = nv10RenderPrimitive;
-	tnl->Driver.Render.ResetLineStipple = nv10ResetLineStipple;
-	tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
-	tnl->Driver.Render.CopyPV = _tnl_copy_pv;
-	tnl->Driver.Render.Interp = _tnl_interp;
-
-	_tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, 
-			64 * sizeof(GLfloat) );
-
-	nmesa->verts = (GLubyte *)tnl->clipspace.vertex_buf;
-}
-
-
diff --git a/src/mesa/drivers/dri/nouveau/nv10_swtcl.h b/src/mesa/drivers/dri/nouveau/nv10_swtcl.h
deleted file mode 100644
index 7c854addd2d..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv10_swtcl.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Stephane Marchesin
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-
-
-#ifndef __NV10_SWTCL_H__
-#define __NV10_SWTCL_H__
-
-#include "mtypes.h"
-
-extern void nv10Fallback( GLcontext *ctx, GLuint bit, GLboolean mode );
-extern void nv10FinishPrimitive(struct nouveau_context *nmesa);
-extern void nv10TriInitFunctions(GLcontext *ctx);
-#define FALLBACK( nmesa, bit, mode ) nouveauFallback( nmesa->glCtx, bit, mode )
-
-#endif /* __NV10_SWTCL_H__ */
-
diff --git a/src/mesa/drivers/dri/nouveau/nv20_shader.h b/src/mesa/drivers/dri/nouveau/nv20_shader.h
deleted file mode 100644
index 7d2e29db668..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv20_shader.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/* NV20_TCL_PRIMITIVE_3D_0x0B00 */
-#define NV20_VP_INST_0B00	0x00000000 /* always 0? */
-#define NV20_VP_INST0_KNOWN	0
-
-/* NV20_TCL_PRIMITIVE_3D_0x0B04 */
-#define NV20_VP_INST_SCA_OPCODE_SHIFT				25
-#define NV20_VP_INST_SCA_OPCODE_MASK				(0x0F << 25)
-#define NV20_VP_INST_OPCODE_RCP	0x2
-#define NV20_VP_INST_OPCODE_RCC	0x3
-#define NV20_VP_INST_OPCODE_RSQ	0x4
-#define NV20_VP_INST_OPCODE_EXP	0x5
-#define NV20_VP_INST_OPCODE_LOG	0x6
-#define NV20_VP_INST_OPCODE_LIT	0x7
-#define NV20_VP_INST_VEC_OPCODE_SHIFT				21
-#define NV20_VP_INST_VEC_OPCODE_MASK				(0x0F << 21)
-#define NV20_VP_INST_OPCODE_NOP	0x0 /* guess */
-#define NV20_VP_INST_OPCODE_MOV	0x1
-#define NV20_VP_INST_OPCODE_MUL	0x2
-#define NV20_VP_INST_OPCODE_ADD	0x3
-#define NV20_VP_INST_OPCODE_MAD	0x4
-#define NV20_VP_INST_OPCODE_DP3	0x5
-#define NV20_VP_INST_OPCODE_DPH	0x6
-#define NV20_VP_INST_OPCODE_DP4	0x7
-#define NV20_VP_INST_OPCODE_DST	0x8
-#define NV20_VP_INST_OPCODE_MIN	0x9
-#define NV20_VP_INST_OPCODE_MAX	0xA
-#define NV20_VP_INST_OPCODE_SLT	0xB
-#define NV20_VP_INST_OPCODE_SGE	0xC
-#define NV20_VP_INST_OPCODE_ARL	0xD
-#define NV20_VP_INST_CONST_SRC_SHIFT				13
-#define NV20_VP_INST_CONST_SRC_MASK				(0xFF << 13)
-#define NV20_VP_INST_INPUT_SRC_SHIFT				9
-#define NV20_VP_INST_INPUT_SRC_MASK				(0xF << 9) /* guess */
-#define NV20_VP_INST_INPUT_SRC_POS	0
-#define NV20_VP_INST_INPUT_SRC_COL0	3
-#define NV20_VP_INST_INPUT_SRC_COL1	4
-#define NV20_VP_INST_INPUT_SRC_TC(n)	(9+n)
-#define NV20_VP_INST_SRC0H_SHIFT				0
-#define NV20_VP_INST_SRC0H_MASK					(0x1FF << 0)
-#define NV20_VP_INST1_KNOWN	( \
-	NV20_VP_INST_OPCODE_MASK | \
-	NV20_VP_INST_CONST_SRC_MASK | \
-	NV20_VP_INST_INPUT_SRC_MASK | \
-	NV20_VP_INST_SRC0H_MASK \
-	)
-
-/* NV20_TCL_PRIMITIVE_3D_0x0B08 */
-#define NV20_VP_INST_SRC0L_SHIFT				26
-#define NV20_VP_INST_SRC0L_MASK					(0x3F  <<26)
-#define NV20_VP_INST_SRC1_SHIFT					11
-#define NV20_VP_INST_SRC1_MASK					(0x7FFF<<11)
-#define NV20_VP_INST_SRC2H_SHIFT				0
-#define NV20_VP_INST_SRC2H_MASK					(0x7FF << 0)
-
-/* NV20_TCL_PRIMITIVE_3D_0x0B0C */
-#define NV20_VP_INST_SRC2L_SHIFT				28
-#define NV20_VP_INST_SRC2L_MASK					(0x0F  <<28)
-#define NV20_VP_INST_VTEMP_WRITEMASK_SHIFT			24
-#define NV20_VP_INST_VTEMP_WRITEMASK_MASK			(0x0F  <<24)
-#    define NV20_VP_INST_TEMP_WRITEMASK_X	(1<<27)
-#    define NV20_VP_INST_TEMP_WRITEMASK_Y	(1<<26)
-#    define NV20_VP_INST_TEMP_WRITEMASK_Z	(1<<25)
-#    define NV20_VP_INST_TEMP_WRITEMASK_W	(1<<24)
-#define NV20_VP_INST_DEST_TEMP_ID_SHIFT				20
-#define NV20_VP_INST_DEST_TEMP_ID_MASK				(0x0F  <<20)
-#define NV20_VP_INST_STEMP_WRITEMASK_SHIFT			16
-#define NV20_VP_INST_STEMP_WRITEMASK_MASK			(0x0F  <<16)
-#    define NV20_VP_INST_STEMP_WRITEMASK_X	(1<<19)
-#    define NV20_VP_INST_STEMP_WRITEMASK_Y	(1<<18)
-#    define NV20_VP_INST_STEMP_WRITEMASK_Z	(1<<17)
-#    define NV20_VP_INST_STEMP_WRITEMASK_W	(1<<16)
-#define NV20_VP_INST_DEST_WRITEMASK_SHIFT			12
-#define NV20_VP_INST_DEST_WRITEMASK_MASK			(0x0F  <<12)
-#    define NV20_VP_INST_DEST_WRITEMASK_X	(1<<15)
-#    define NV20_VP_INST_DEST_WRITEMASK_Y	(1<<14)
-#    define NV20_VP_INST_DEST_WRITEMASK_Z	(1<<13)
-#    define NV20_VP_INST_DEST_WRITEMASK_W	(1<<12)
-#define NV20_VP_INST_DEST_SHIFT					3
-#define NV20_VP_INST_DEST_MASK					(0xF << 3) /* guess */
-#define NV20_VP_INST_DEST_POS	0
-#define NV20_VP_INST_DEST_COL0	3
-#define NV20_VP_INST_DEST_COL1	4
-#define NV20_VP_INST_DEST_TC(n)	(9+n)
-#define NV20_VP_INST_INDEX_CONST				(1<<1)
-#define NV20_VP_INST3_KNOWN ( \
-	NV20_VP_INST_SRC2L_MASK | \
-	NV20_VP_INST_TEMP_WRITEMASK_MASK | \
-	NV20_VP_INST_DEST_TEMP_ID_MASK | \
-	NV20_VP_INST_STEMP_WRITEMASK_MASK | \
-	NV20_VP_INST_DEST_WRITEMASK_MASK | \
-	NV20_VP_INST_DEST_MASK | \
-	NV20_VP_INST_INDEX_CONST \
-	)
-
-/* Useful to split the source selection regs into their pieces */
-#define NV20_VP_SRC0_HIGH_SHIFT 6
-#define NV20_VP_SRC0_HIGH_MASK  0x00007FC0
-#define NV20_VP_SRC0_LOW_MASK   0x0000003F
-#define NV20_VP_SRC2_HIGH_SHIFT 4
-#define NV20_VP_SRC2_HIGH_MASK  0x00007FF0
-#define NV20_VP_SRC2_LOW_MASK   0x0000000F
-
-#define NV20_VP_SRC_REG_NEGATE					(1<<14)
-#define NV20_VP_SRC_REG_SWZ_X_SHIFT				12
-#define NV20_VP_SRC_REG_SWZ_X_MASK				(0x03  <<12)
-#define NV20_VP_SRC_REG_SWZ_Y_SHIFT				10
-#define NV20_VP_SRC_REG_SWZ_Y_MASK				(0x03  <<10)
-#define NV20_VP_SRC_REG_SWZ_Z_SHIFT				8
-#define NV20_VP_SRC_REG_SWZ_Z_MASK				(0x03  << 8)
-#define NV20_VP_SRC_REG_SWZ_W_SHIFT				6
-#define NV20_VP_SRC_REG_SWZ_W_MASK				(0x03  << 6)
-#define NV20_VP_SRC_REG_SWZ_ALL_SHIFT				6
-#define NV20_VP_SRC_REG_SWZ_ALL_MASK				(0xFF  << 6)
-#define NV20_VP_SRC_REG_TEMP_ID_SHIFT				2
-#define NV20_VP_SRC_REG_TEMP_ID_MASK				(0x0F  << 0)
-#define NV20_VP_SRC_REG_TYPE_SHIFT				0
-#define NV20_VP_SRC_REG_TYPE_MASK				(0x03  << 0)
-#define NV20_VP_SRC_REG_TYPE_TEMP	1
-#define NV20_VP_SRC_REG_TYPE_INPUT	2
-#define NV20_VP_SRC_REG_TYPE_CONST	3	/* guess */
-
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state.c b/src/mesa/drivers/dri/nouveau/nv20_state.c
deleted file mode 100644
index ccf2f6148b4..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv20_state.c
+++ /dev/null
@@ -1,824 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Nouveau
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-static void nv20AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte ubRef;
-	CLAMPED_FLOAT_TO_UBYTE(ubRef, ref);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC, 2);
-	OUT_RING_CACHE(func);
-	OUT_RING_CACHE(ubRef);
-}
-
-static void nv20BlendColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); 
-	GLubyte cf[4];
-
-	CLAMPED_FLOAT_TO_UBYTE(cf[0], color[0]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[1], color[1]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[2], color[2]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[3], color[3]);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_BLEND_COLOR, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888(cf[3], cf[1], cf[2], cf[0]));
-}
-
-static void nv20BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB, GLenum modeA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_BLEND_EQUATION, 1);
-	OUT_RING_CACHE((modeA<<16) | modeRGB);
-}
-
-
-static void nv20BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB,
-		GLenum sfactorA, GLenum dfactorA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC, 2);
-	OUT_RING_CACHE((sfactorA<<16) | sfactorRGB);
-	OUT_RING_CACHE((dfactorA<<16) | dfactorRGB);
-}
-
-static void nv20Clear(GLcontext *ctx, GLbitfield mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLuint hw_bufs = 0;
-
-	if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT))
-		hw_bufs |= 0xf0;
-	if (mask & (BUFFER_BIT_DEPTH))
-		hw_bufs |= 0x03;
-
-	if (hw_bufs) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLEAR_WHICH_BUFFERS, 1);
-		OUT_RING_CACHE(hw_bufs);
-	}
-}
-
-static void nv20ClearColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte c[4];
-	UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,color);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CLEAR_VALUE_ARGB, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888(c[3],c[0],c[1],c[2]));
-}
-
-static void nv20ClearDepth(GLcontext *ctx, GLclampd d)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nmesa->clear_value=((nmesa->clear_value&0x000000FF)|(((uint32_t)(d*0xFFFFFF))<<8));
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH, 1);
-	OUT_RING_CACHE(nmesa->clear_value);
-}
-
-/* we're don't support indexed buffers
-   void (*ClearIndex)(GLcontext *ctx, GLuint index)
- */
-
-static void nv20ClearStencil(GLcontext *ctx, GLint s)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nmesa->clear_value=((nmesa->clear_value&0xFFFFFF00)|(s&0x000000FF));
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH, 1);
-	OUT_RING_CACHE(nmesa->clear_value);
-}
-
-static void nv20ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_A(plane), 4);
-	OUT_RING_CACHEf(equation[0]);
-	OUT_RING_CACHEf(equation[1]);
-	OUT_RING_CACHEf(equation[2]);
-	OUT_RING_CACHEf(equation[3]);
-}
-
-static void nv20ColorMask(GLcontext *ctx, GLboolean rmask, GLboolean gmask,
-		GLboolean bmask, GLboolean amask )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_COLOR_MASK, 1);
-	OUT_RING_CACHE(((amask && 0x01) << 24) | ((rmask && 0x01) << 16) | ((gmask && 0x01)<< 8) | ((bmask && 0x01) << 0));
-}
-
-static void nv20ColorMaterial(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	// TODO I need love
-}
-
-static void nv20CullFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CULL_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv20FrontFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_FRONT_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv20DepthFunc(GLcontext *ctx, GLenum func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_DEPTH_FUNC, 1);
-	OUT_RING_CACHE(func);
-}
-
-static void nv20DepthMask(GLcontext *ctx, GLboolean flag)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE, 1);
-	OUT_RING_CACHE(flag);
-}
-
-static void nv20DepthRange(GLcontext *ctx, GLclampd nearval, GLclampd farval)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR, 2);
-	OUT_RING_CACHEf(nearval);
-	OUT_RING_CACHEf(farval);
-}
-
-/** Specify the current buffer for writing */
-//void (*DrawBuffer)( GLcontext *ctx, GLenum buffer );
-/** Specify the buffers for writing for fragment programs*/
-//void (*DrawBuffers)( GLcontext *ctx, GLsizei n, const GLenum *buffers );
-
-static void nv20Enable(GLcontext *ctx, GLenum cap, GLboolean state)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	switch(cap)
-	{
-		case GL_ALPHA_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_AUTO_NORMAL:
-		case GL_BLEND:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_CLIP_PLANE0:
-		case GL_CLIP_PLANE1:
-		case GL_CLIP_PLANE2:
-		case GL_CLIP_PLANE3:
-		case GL_CLIP_PLANE4:
-		case GL_CLIP_PLANE5:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE(cap-GL_CLIP_PLANE0), 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_COLOR_LOGIC_OP:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_COLOR_MATERIAL:
-//		case GL_COLOR_SUM_EXT:
-//		case GL_COLOR_TABLE:
-//		case GL_CONVOLUTION_1D:
-//		case GL_CONVOLUTION_2D:
-		case GL_CULL_FACE:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DEPTH_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DITHER:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_DITHER_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_FOG:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_FOG_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_HISTOGRAM:
-//		case GL_INDEX_LOGIC_OP:
-		case GL_LIGHT0:
-		case GL_LIGHT1:
-		case GL_LIGHT2:
-		case GL_LIGHT3:
-		case GL_LIGHT4:
-		case GL_LIGHT5:
-		case GL_LIGHT6:
-		case GL_LIGHT7:
-			{
-			uint32_t mask=0x11<<(2*(cap-GL_LIGHT0));
-			nmesa->enabled_lights=((nmesa->enabled_lights&mask)|(mask*state));
-			if (nmesa->lighting_enabled)
-			{
-				BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			}
-			break;
-			}
-		case GL_LIGHTING:
-			nmesa->lighting_enabled=state;
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-			if (nmesa->lighting_enabled)
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			else
-				OUT_RING_CACHE(0x0);
-			break;
-		case GL_LINE_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_LINE_STIPPLE:
-//		case GL_MAP1_COLOR_4:
-//		case GL_MAP1_INDEX:
-//		case GL_MAP1_NORMAL:
-//		case GL_MAP1_TEXTURE_COORD_1:
-//		case GL_MAP1_TEXTURE_COORD_2:
-//		case GL_MAP1_TEXTURE_COORD_3:
-//		case GL_MAP1_TEXTURE_COORD_4:
-//		case GL_MAP1_VERTEX_3:
-//		case GL_MAP1_VERTEX_4:
-//		case GL_MAP2_COLOR_4:
-//		case GL_MAP2_INDEX:
-//		case GL_MAP2_NORMAL:
-//		case GL_MAP2_TEXTURE_COORD_1:
-//		case GL_MAP2_TEXTURE_COORD_2:
-//		case GL_MAP2_TEXTURE_COORD_3:
-//		case GL_MAP2_TEXTURE_COORD_4:
-//		case GL_MAP2_VERTEX_3:
-//		case GL_MAP2_VERTEX_4:
-//		case GL_MINMAX:
-		case GL_NORMALIZE:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POINT_SMOOTH:
-		case GL_POLYGON_OFFSET_POINT:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_LINE:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_FILL:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_STIPPLE:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POST_COLOR_MATRIX_COLOR_TABLE:
-//		case GL_POST_CONVOLUTION_COLOR_TABLE:
-//		case GL_RESCALE_NORMAL:
-		case GL_SCISSOR_TEST:
-			/* No enable bit, nv20Scissor will adjust to max range */
-			ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-			      			 ctx->Scissor.Width, ctx->Scissor.Height);
-			break;
-//		case GL_SEPARABLE_2D:
-		case GL_STENCIL_TEST:
-			// TODO BACK and FRONT ?
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_STENCIL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_TEXTURE_GEN_Q:
-//		case GL_TEXTURE_GEN_R:
-//		case GL_TEXTURE_GEN_S:
-//		case GL_TEXTURE_GEN_T:
-//		case GL_TEXTURE_1D:
-//		case GL_TEXTURE_2D:
-//		case GL_TEXTURE_3D:
-	}
-}
-
-static void nv20Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-    nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-    switch(pname)
-    {
-        case GL_FOG_MODE:
-            BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_FOG_MODE, 1);
-            //OUT_RING_CACHE (params);
-            break;
-            /* TODO: unsure about the rest.*/
-        default:
-            break;
-    }
-
-}
-   
-static void nv20Hint(GLcontext *ctx, GLenum target, GLenum mode)
-{
-	// TODO I need love (fog and line_smooth hints)
-}
-
-// void (*IndexMask)(GLcontext *ctx, GLuint mask);
-
-enum {
-	SPOTLIGHT_NO_UPDATE,
-	SPOTLIGHT_UPDATE_EXPONENT,
-	SPOTLIGHT_UPDATE_DIRECTION,
-	SPOTLIGHT_UPDATE_ALL
-};
-
-static void nv20Lightfv(GLcontext *ctx, GLenum light, GLenum pname, const GLfloat *params )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLint p = light - GL_LIGHT0;
-	struct gl_light *l = &ctx->Light.Light[p];
-	int spotlight_update = SPOTLIGHT_NO_UPDATE;
-
-	/* not sure where the fourth param value goes...*/
-	switch(pname)
-	{
-		case GL_AMBIENT:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_DIFFUSE:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPECULAR:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_POSITION:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPOT_DIRECTION:
-			spotlight_update = SPOTLIGHT_UPDATE_DIRECTION;
-			break;
-		case GL_SPOT_EXPONENT:
-			spotlight_update = SPOTLIGHT_UPDATE_EXPONENT;
-			break;
-		case GL_SPOT_CUTOFF:
-			spotlight_update = SPOTLIGHT_UPDATE_ALL;
-			break;
-		case GL_CONSTANT_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_LINEAR_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_QUADRATIC_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		default:
-			break;
-	}
-
-	switch(spotlight_update) {
-		case SPOTLIGHT_UPDATE_DIRECTION:
-			{
-				GLfloat x,y,z;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(p), 3);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_EXPONENT:
-			{
-				GLfloat cc,lc,qc;
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 3);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_ALL:
-			{
-				GLfloat cc,lc,qc, x,y,z, c;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				c = spot_light_coef_a + 1.0;
-				BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 7);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-				OUT_RING_CACHEf(c);
-			}
-			break;
-		default:
-			break;
-	}
-}
-
-/** Set the lighting model parameters */
-static void (*LightModelfv)(GLcontext *ctx, GLenum pname, const GLfloat *params);
-
-
-static void nv20LineStipple(GLcontext *ctx, GLint factor, GLushort pattern )
-{
-/*	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LINE_STIPPLE_PATTERN, 1);
-	OUT_RING_CACHE((pattern << 16) | factor);*/
-}
-
-static void nv20LineWidth(GLcontext *ctx, GLfloat width)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LINE_WIDTH, 1);
-	OUT_RING_CACHEf(width);
-}
-
-static void nv20LogicOpcode(GLcontext *ctx, GLenum opcode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP, 1);
-	OUT_RING_CACHE(opcode);
-}
-
-static void nv20PointParameterfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/*TODO: not sure what goes here. */
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	
-}
-
-/** Specify the diameter of rasterized points */
-static void nv20PointSize(GLcontext *ctx, GLfloat size)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POINT_SIZE, 1);
-	OUT_RING_CACHEf(size);
-}
-
-/** Select a polygon rasterization mode */
-static void nv20PolygonMode(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT, 1);
-		OUT_RING_CACHE(mode);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK, 1);
-		OUT_RING_CACHE(mode);
-	}
-}
-
-/** Set the scale and units used to calculate depth values */
-static void nv20PolygonOffset(GLcontext *ctx, GLfloat factor, GLfloat units)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR, 2);
-        OUT_RING_CACHEf(factor);
-        OUT_RING_CACHEf(units);
-}
-
-/** Set the polygon stippling pattern */
-static void nv20PolygonStipple(GLcontext *ctx, const GLubyte *mask )
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN(0), 32);
-        OUT_RING_CACHEp(mask, 32);
-}
-
-/* Specifies the current buffer for reading */
-void (*ReadBuffer)( GLcontext *ctx, GLenum buffer );
-/** Set rasterization mode */
-void (*RenderMode)(GLcontext *ctx, GLenum mode );
-
-/** Define the scissor box */
-static void nv20Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	/* There's no scissor enable bit, so adjust the scissor to cover the
-	 * maximum draw buffer bounds
-	 */
-	if (!ctx->Scissor.Enabled) {
-	   x = y = 0;
-	   w = h = 4095;
-	} else {
-	   x += nmesa->drawX;
-	   y += nmesa->drawY;
-	}
-
-        /*BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SCISSOR_X2_X1, 1);
-        OUT_RING_CACHE((w << 16) | x );
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SCISSOR_Y2_Y1, 1);
-        OUT_RING_CACHE((h << 16) | y );*/
-
-}
-
-/** Select flat or smooth shading */
-static void nv20ShadeModel(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SHADE_MODEL, 1);
-	OUT_RING_CACHE(mode);
-}
-
-/** OpenGL 2.0 two-sided StencilFunc */
-static void nv20StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func,
-		GLint ref, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_STENCIL_FUNC_FUNC, 3);
-	OUT_RING_CACHE(func);
-	OUT_RING_CACHE(ref);
-	OUT_RING_CACHE(mask);
-}
-
-/** OpenGL 2.0 two-sided StencilMask */
-static void nv20StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_STENCIL_MASK, 1);
-	OUT_RING_CACHE(mask);
-}
-
-/** OpenGL 2.0 two-sided StencilOp */
-static void nv20StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail,
-		GLenum zfail, GLenum zpass)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_STENCIL_OP_FAIL, 1);
-	OUT_RING_CACHE(fail);
-	OUT_RING_CACHE(zfail);
-	OUT_RING_CACHE(zpass);
-}
-
-/** Control the generation of texture coordinates */
-void (*TexGen)(GLcontext *ctx, GLenum coord, GLenum pname,
-		const GLfloat *params);
-/** Set texture environment parameters */
-void (*TexEnv)(GLcontext *ctx, GLenum target, GLenum pname,
-		const GLfloat *param);
-/** Set texture parameters */
-void (*TexParameter)(GLcontext *ctx, GLenum target,
-		struct gl_texture_object *texObj,
-		GLenum pname, const GLfloat *params);
-
-static void nv20TextureMatrix(GLcontext *ctx, GLuint unit, const GLmatrix *mat)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_TX_MATRIX(unit, 0), 16);
-        /*XXX: This SHOULD work.*/
-        OUT_RING_CACHEp(mat->m, 16);
-}
-
-/* Update anything that depends on the window position/size */
-static void nv20WindowMoved(nouveauContextPtr nmesa)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLfloat *v = nmesa->viewport.m;
-	GLuint w = ctx->Viewport.Width;
-	GLuint h = ctx->Viewport.Height;
-	GLuint x = ctx->Viewport.X + nmesa->drawX;
-	GLuint y = ctx->Viewport.Y + nmesa->drawY;
-	int i;
-
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ, 2);
-        OUT_RING_CACHE((w << 16) | x);
-        OUT_RING_CACHE((h << 16) | y);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x02b4, 1);
-	OUT_RING(0);
-
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(0), 1);
-        OUT_RING_CACHE((4095 << 16) | 0);
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(0), 1);
-        OUT_RING_CACHE((4095 << 16) | 0);
-	for (i=1; i<8; i++) {
-		BEGIN_RING_CACHE(NvSub3D,
-		      NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(i), 1);
-        	OUT_RING_CACHE(0);
-		BEGIN_RING_CACHE(NvSub3D,
-		      NV20_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_VERT(i), 1);
-	        OUT_RING_CACHE(0);
-	}
-
-	ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-	      		    ctx->Scissor.Width, ctx->Scissor.Height);
-
-	/* TODO: recalc viewport scale coefs */
-}
-
-/* Initialise any card-specific non-GL related state */
-static GLboolean nv20InitCard(nouveauContextPtr nmesa)
-{
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-
-	BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SET_OBJECT1, 2);
-	OUT_RING(NvDmaFB);	/* 184 dma_object1 */
-	OUT_RING(NvDmaFB);	/* 188 dma_object2 */
-	BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SET_OBJECT3, 2);
-	OUT_RING(NvDmaFB);	/* 194 dma_object3 */
-	OUT_RING(NvDmaFB);	/* 198 dma_object4 */
-	BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_SET_OBJECT8, 1);
-	OUT_RING(NvDmaFB);	/* 1a8 dma_object8 */
-
-	BEGIN_RING_SIZE(NvSub3D, 0x17e0, 3);
-	OUT_RINGf(0.0);
-	OUT_RINGf(0.0);
-	OUT_RINGf(1.0);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1e6c, 1);
-	OUT_RING(0x0db6);
-	BEGIN_RING_SIZE(NvSub3D, 0x0290, 1);
-	OUT_RING(0x00100001);
-	BEGIN_RING_SIZE(NvSub3D, 0x09fc, 1);
-	OUT_RING(0);
-	BEGIN_RING_SIZE(NvSub3D, 0x1d80, 1);
-	OUT_RING(1);
-	BEGIN_RING_SIZE(NvSub3D, 0x09f8, 1);
-	OUT_RING(4);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x17ec, 3);
-	OUT_RINGf(0.0);
-	OUT_RINGf(1.0);
-	OUT_RINGf(0.0);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1d88, 1);
-	OUT_RING(3);
-
-	/* FIXME: More dma objects to setup ? */
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1e98, 1);
-	OUT_RING(0);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x120, 3);
-	OUT_RING(0);
-	OUT_RING(1);
-	OUT_RING(2);
-
-	return GL_TRUE;
-}
-
-/* Update buffer offset/pitch/format */
-static GLboolean nv20BindBuffers(nouveauContextPtr nmesa, int num_color,
-				 nouveau_renderbuffer **color,
-				 nouveau_renderbuffer *depth)
-{
-	GLuint x, y, w, h;
-	GLuint pitch, format, depth_pitch;
-
-	w = color[0]->mesa.Width;
-	h = color[0]->mesa.Height;
-	x = nmesa->drawX;
-	y = nmesa->drawY;
-
-	if (num_color != 1)
-		return GL_FALSE;
-
-        BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_VIEWPORT_HORIZ, 6);
-        OUT_RING_CACHE((w << 16) | x);
-        OUT_RING_CACHE((h << 16) | y);
-	depth_pitch = (depth ? depth->pitch : color[0]->pitch);
-	pitch = (depth_pitch<<16) | color[0]->pitch;
-	format = 0x128;
-	if (color[0]->mesa._ActualFormat != GL_RGBA8) {
-		format = 0x123; /* R5G6B5 color buffer */
-	}
-	OUT_RING_CACHE(format);
-	OUT_RING_CACHE(pitch);
-	OUT_RING_CACHE(color[0]->offset);
-	OUT_RING_CACHE(depth ? depth->offset : color[0]->offset);
-
-	if (depth) {
-		BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_PITCH, 2);
-		/* TODO: use a different buffer */
-		OUT_RING(depth->pitch);
-		OUT_RING(depth->offset);
-	}
-
-	/* Always set to bottom left of buffer */
-	/*BEGIN_RING_CACHE(NvSub3D, NV20_TCL_PRIMITIVE_3D_VIEWPORT_ORIGIN_X, 4);
-	OUT_RING_CACHEf (0.0);
-	OUT_RING_CACHEf ((GLfloat) h);
-	OUT_RING_CACHEf (0.0);
-	OUT_RING_CACHEf (0.0);*/
-
-	return GL_TRUE;
-}
-
-void nv20InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	func->AlphaFunc			= nv20AlphaFunc;
-	func->BlendColor		= nv20BlendColor;
-	func->BlendEquationSeparate	= nv20BlendEquationSeparate;
-	func->BlendFuncSeparate		= nv20BlendFuncSeparate;
-	func->Clear			= nv20Clear;
-	func->ClearColor		= nv20ClearColor;
-	func->ClearDepth		= nv20ClearDepth;
-	func->ClearStencil		= nv20ClearStencil;
-	func->ClipPlane			= nv20ClipPlane;
-	func->ColorMask			= nv20ColorMask;
-	func->ColorMaterial		= nv20ColorMaterial;
-	func->CullFace			= nv20CullFace;
-	func->FrontFace			= nv20FrontFace;
-	func->DepthFunc			= nv20DepthFunc;
-	func->DepthMask			= nv20DepthMask;
-	func->DepthRange		= nv20DepthRange;
-	func->Enable			= nv20Enable;
-	func->Fogfv			= nv20Fogfv;
-	func->Hint			= nv20Hint;
-	func->Lightfv			= nv20Lightfv;
-/*	func->LightModelfv		= nv20LightModelfv; */
-	func->LineStipple		= nv20LineStipple;
-	func->LineWidth			= nv20LineWidth;
-	func->LogicOpcode		= nv20LogicOpcode;
-	func->PointParameterfv		= nv20PointParameterfv;
-	func->PointSize			= nv20PointSize;
-	func->PolygonMode		= nv20PolygonMode;
-	func->PolygonOffset		= nv20PolygonOffset;
-	func->PolygonStipple		= nv20PolygonStipple;
-/*	func->ReadBuffer		= nv20ReadBuffer;*/
-/*	func->RenderMode		= nv20RenderMode;*/
-	func->Scissor			= nv20Scissor;
-	func->ShadeModel		= nv20ShadeModel;
-	func->StencilFuncSeparate	= nv20StencilFuncSeparate;
-	func->StencilMaskSeparate	= nv20StencilMaskSeparate;
-	func->StencilOpSeparate		= nv20StencilOpSeparate;
-/*	func->TexGen			= nv20TexGen;*/
-/*	func->TexParameter		= nv20TexParameter;*/
-	func->TextureMatrix		= nv20TextureMatrix;
-
-	nmesa->hw_func.InitCard		= nv20InitCard;
-	nmesa->hw_func.BindBuffers	= nv20BindBuffers;
-	nmesa->hw_func.WindowMoved	= nv20WindowMoved;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nv20_vertprog.c b/src/mesa/drivers/dri/nouveau/nv20_vertprog.c
deleted file mode 100644
index 60cfcd70561..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv20_vertprog.c
+++ /dev/null
@@ -1,447 +0,0 @@
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-
-#include "nouveau_shader.h"
-#include "nv20_shader.h"
-
-unsigned int NVVP_TX_VOP_COUNT = 16;
-unsigned int NVVP_TX_NVS_OP_COUNT = 16;
-struct _op_xlat NVVP_TX_VOP[32];
-struct _op_xlat NVVP_TX_SOP[32];
-
-nvsSwzComp NV20VP_TX_SWIZZLE[4] = { NVS_SWZ_X, NVS_SWZ_Y, NVS_SWZ_Z, NVS_SWZ_W };
-
-/*****************************************************************************
- * Support routines
- */
-static void
-NV20VPUploadToHW(GLcontext *ctx, nouveauShader *nvs)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   int i;
-
-   /* XXX: missing a way to say what insn we're uploading from, and possible
-    *      the program start position (if NV20 has one) */
-   for (i=0; i<nvs->program_size; i+=4) {
-      BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_INST0, 4);
-      OUT_RING(nvs->program[i + 0]);
-      OUT_RING(nvs->program[i + 1]);
-      OUT_RING(nvs->program[i + 2]);
-      OUT_RING(nvs->program[i + 3]);
-   }
-}
-
-static void
-NV20VPUpdateConst(GLcontext *ctx, nouveauShader *nvs, int id)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-   /* Worth checking if the value *actually* changed? Mesa doesn't tell us this
-    * as far as I know..
-    */
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_ID, 1);
-   OUT_RING (id);
-   BEGIN_RING_SIZE(NvSub3D, NV20_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_X, 4);
-   OUT_RINGf(nvs->params[id].source_val[0]);
-   OUT_RINGf(nvs->params[id].source_val[1]);
-   OUT_RINGf(nvs->params[id].source_val[2]);
-   OUT_RINGf(nvs->params[id].source_val[3]);
-}
-
-/*****************************************************************************
- * Assembly routines
- */
-
-/*****************************************************************************
- * Disassembly routines
- */
-void
-NV20VPTXSwizzle(int hwswz, nvsSwzComp *swz)
-{
-   swz[NVS_SWZ_X] = NV20VP_TX_SWIZZLE[(hwswz & 0xC0) >> 6];
-   swz[NVS_SWZ_Y] = NV20VP_TX_SWIZZLE[(hwswz & 0x30) >> 4];
-   swz[NVS_SWZ_Z] = NV20VP_TX_SWIZZLE[(hwswz & 0x0C) >> 2];
-   swz[NVS_SWZ_W] = NV20VP_TX_SWIZZLE[(hwswz & 0x03) >> 0];
-}
-
-static int
-NV20VPHasMergedInst(nvsFunc * shader)
-{
-   if (shader->GetOpcodeHW(shader, 0) != NV20_VP_INST_OPCODE_NOP &&
-       shader->GetOpcodeHW(shader, 1) != NV20_VP_INST_OPCODE_NOP)
-      printf
-	 ("\n\n*****both opcode fields have values - PLEASE REPORT*****\n");
-   return 0;
-}
-
-static int
-NV20VPIsLastInst(nvsFunc * shader)
-{
-   return ((shader->inst[3] & (1 << 0)) ? 1 : 0);
-}
-
-static int
-NV20VPGetOffsetNext(nvsFunc * shader)
-{
-   return 4;
-}
-
-static struct _op_xlat *
-NV20VPGetOPTXRec(nvsFunc * shader, int merged)
-{
-   struct _op_xlat *opr;
-   int op;
-
-   if (shader->GetOpcodeSlot(shader, merged)) {
-      opr = NVVP_TX_SOP;
-      op = shader->GetOpcodeHW(shader, 1);
-      if (op >= NVVP_TX_NVS_OP_COUNT)
-	 return NULL;
-   }
-   else {
-      opr = NVVP_TX_VOP;
-      op = shader->GetOpcodeHW(shader, 0);
-      if (op >= NVVP_TX_VOP_COUNT)
-	 return NULL;
-   }
-
-   if (opr[op].SOP == NVS_OP_UNKNOWN)
-      return NULL;
-   return &opr[op];
-}
-
-static struct _op_xlat *
-NV20VPGetOPTXFromSOP(nvsOpcode sop, int *id)
-{
-   int i;
-
-   for (i=0;i<NVVP_TX_VOP_COUNT;i++) {
-      if (NVVP_TX_VOP[i].SOP == sop) {
-	 if (id) *id = 0;
-	 return &NVVP_TX_VOP[i];
-      }
-   }
-
-   for (i=0;i<NVVP_TX_NVS_OP_COUNT;i++) {
-      if (NVVP_TX_SOP[i].SOP == sop) {
-	 if (id) *id = 1;
-	 return &NVVP_TX_SOP[i];
-      }
-   }
-
-   return NULL;
-}
-
-static int
-NV20VPGetOpcodeSlot(nvsFunc * shader, int merged)
-{
-   if (shader->HasMergedInst(shader))
-      return merged;
-   if (shader->GetOpcodeHW(shader, 0) == NV20_VP_INST_OPCODE_NOP)
-      return 1;
-   return 0;
-}
-
-static nvsOpcode
-NV20VPGetOpcode(nvsFunc * shader, int merged)
-{
-   struct _op_xlat *opr;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr)
-      return NVS_OP_UNKNOWN;
-
-   return opr->SOP;
-}
-
-static nvsOpcode
-NV20VPGetOpcodeHW(nvsFunc * shader, int slot)
-{
-   if (slot)
-      return (shader->inst[1] & NV20_VP_INST_SCA_OPCODE_MASK)
-	 >> NV20_VP_INST_SCA_OPCODE_SHIFT;
-   return (shader->inst[1] & NV20_VP_INST_VEC_OPCODE_MASK)
-      >> NV20_VP_INST_VEC_OPCODE_SHIFT;
-}
-
-static nvsRegFile
-NV20VPGetDestFile(nvsFunc * shader, int merged)
-{
-   switch (shader->GetOpcode(shader, merged)) {
-   case NVS_OP_ARL:
-      return NVS_FILE_ADDRESS;
-   default:
-      /*FIXME: This probably isn't correct.. */
-      if ((shader->inst[3] & NV20_VP_INST_DEST_WRITEMASK_MASK) == 0)
-	 return NVS_FILE_TEMP;
-      return NVS_FILE_RESULT;
-   }
-}
-
-static unsigned int
-NV20VPGetDestID(nvsFunc * shader, int merged)
-{
-   int id;
-
-   switch (shader->GetDestFile(shader, merged)) {
-   case NVS_FILE_RESULT:
-      id = ((shader->inst[3] & NV20_VP_INST_DEST_MASK)
-	    >> NV20_VP_INST_DEST_SHIFT);
-      switch (id) {
-      case NV20_VP_INST_DEST_POS  : return NVS_FR_POSITION;
-      case NV20_VP_INST_DEST_COL0 : return NVS_FR_COL0;
-      case NV20_VP_INST_DEST_COL1 : return NVS_FR_COL1;
-      case NV20_VP_INST_DEST_TC(0): return NVS_FR_TEXCOORD0;
-      case NV20_VP_INST_DEST_TC(1): return NVS_FR_TEXCOORD1;
-      case NV20_VP_INST_DEST_TC(2): return NVS_FR_TEXCOORD2;
-      case NV20_VP_INST_DEST_TC(3): return NVS_FR_TEXCOORD3;
-      default:
-	 return -1;
-      }
-   case NVS_FILE_ADDRESS:
-      return 0;
-   case NVS_FILE_TEMP:
-      id = ((shader->inst[3] & NV20_VP_INST_DEST_TEMP_ID_MASK)
-	    >> NV20_VP_INST_DEST_TEMP_ID_SHIFT);
-      return id;
-   default:
-      return -1;
-   }
-}
-
-static unsigned int
-NV20VPGetDestMask(nvsFunc * shader, int merged)
-{
-   int hwmask, mask = 0;
-
-   /* Special handling for ARL - hardware only supports a
-    * 1-component address reg
-    */
-   if (shader->GetOpcode(shader, merged) == NVS_OP_ARL)
-      return SMASK_X;
-
-   if (shader->GetDestFile(shader, merged) == NVS_FILE_RESULT)
-      hwmask = (shader->inst[3] & NV20_VP_INST_DEST_WRITEMASK_MASK)
-	 >> NV20_VP_INST_DEST_WRITEMASK_SHIFT;
-   else if (shader->GetOpcodeSlot(shader, merged))
-      hwmask = (shader->inst[3] & NV20_VP_INST_STEMP_WRITEMASK_MASK)
-	 >> NV20_VP_INST_STEMP_WRITEMASK_SHIFT;
-   else
-      hwmask = (shader->inst[3] & NV20_VP_INST_VTEMP_WRITEMASK_MASK)
-	 >> NV20_VP_INST_VTEMP_WRITEMASK_SHIFT;
-
-   if (hwmask & (1 << 3)) mask |= SMASK_X;
-   if (hwmask & (1 << 2)) mask |= SMASK_Y;
-   if (hwmask & (1 << 1)) mask |= SMASK_Z;
-   if (hwmask & (1 << 0)) mask |= SMASK_W;
-
-   return mask;
-}
-
-static unsigned int
-NV20VPGetSourceHW(nvsFunc * shader, int merged, int pos)
-{
-   struct _op_xlat *opr;
-   unsigned int src;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr)
-      return -1;
-
-   switch (opr->srcpos[pos]) {
-   case 0:
-      src = ((shader->inst[1] & NV20_VP_INST_SRC0H_MASK)
-	     >> NV20_VP_INST_SRC0H_SHIFT)
-	 << NV20_VP_SRC0_HIGH_SHIFT;
-      src |= ((shader->inst[2] & NV20_VP_INST_SRC0L_MASK)
-	      >> NV20_VP_INST_SRC0L_SHIFT);
-      break;
-   case 1:
-      src = ((shader->inst[2] & NV20_VP_INST_SRC1_MASK)
-	     >> NV20_VP_INST_SRC1_SHIFT);
-      break;
-   case 2:
-      src = ((shader->inst[2] & NV20_VP_INST_SRC2H_MASK)
-	     >> NV20_VP_INST_SRC2H_SHIFT)
-	 << NV20_VP_SRC2_HIGH_SHIFT;
-      src |= ((shader->inst[3] & NV20_VP_INST_SRC2L_MASK)
-	      >> NV20_VP_INST_SRC2L_SHIFT);
-      break;
-   default:
-      src = -1;
-   }
-
-   return src;
-}
-
-static nvsRegFile
-NV20VPGetSourceFile(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-   struct _op_xlat *opr;
-   int file;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1)
-      return -1;
-
-   switch (opr->srcpos[pos]) {
-   case SPOS_ADDRESS:
-      return NVS_FILE_ADDRESS;
-   default:
-      src = NV20VPGetSourceHW(shader, merged, pos);
-      file = (src & NV20_VP_SRC_REG_TYPE_MASK) >> NV20_VP_SRC_REG_TYPE_SHIFT;
-
-      switch (file) {
-      case NV20_VP_SRC_REG_TYPE_TEMP : return NVS_FILE_TEMP;
-      case NV20_VP_SRC_REG_TYPE_INPUT: return NVS_FILE_ATTRIB;
-      case NV20_VP_SRC_REG_TYPE_CONST: return NVS_FILE_CONST;
-      default:
-	 return NVS_FILE_UNKNOWN;
-      }
-   }
-}
-
-static int
-NV20VPGetSourceID(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_TEMP:
-      src = shader->GetSourceHW(shader, merged, pos);
-      return ((src & NV20_VP_SRC_REG_TEMP_ID_MASK) >>
-	      NV20_VP_SRC_REG_TEMP_ID_SHIFT);
-   case NVS_FILE_CONST:
-      return ((shader->inst[1] & NV20_VP_INST_CONST_SRC_MASK)
-	      >> NV20_VP_INST_CONST_SRC_SHIFT);
-   case NVS_FILE_ATTRIB:
-      src = ((shader->inst[1] & NV20_VP_INST_INPUT_SRC_MASK)
-	     >> NV20_VP_INST_INPUT_SRC_SHIFT);
-      switch (src) {
-      case NV20_VP_INST_INPUT_SRC_POS  : return NVS_FR_POSITION;
-      case NV20_VP_INST_INPUT_SRC_COL0 : return NVS_FR_COL0;
-      case NV20_VP_INST_INPUT_SRC_COL1 : return NVS_FR_COL1;
-      case NV20_VP_INST_INPUT_SRC_TC(0): return NVS_FR_TEXCOORD0;
-      case NV20_VP_INST_INPUT_SRC_TC(1): return NVS_FR_TEXCOORD1;
-      case NV20_VP_INST_INPUT_SRC_TC(2): return NVS_FR_TEXCOORD2;
-      case NV20_VP_INST_INPUT_SRC_TC(3): return NVS_FR_TEXCOORD3;
-      default:
-	 return NVS_FR_UNKNOWN;
-      }
-   default:
-      return -1;
-   }
-}
-
-static int
-NV20VPGetSourceNegate(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-
-   return ((src & NV20_VP_SRC_REG_NEGATE) ? 1 : 0);
-}
-
-static int
-NV20VPGetSourceAbs(nvsFunc * shader, int merged, int pos)
-{
-   /* NV20 can't do ABS on sources?  Appears to be emulated with
-    *      MAX reg, reg, -reg
-    */
-   return 0;
-}
-
-static void
-NV20VPGetSourceSwizzle(nvsFunc * shader, int merged, int pos, nvsSwzComp *swz)
-{
-   unsigned int src;
-   int swzbits;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-   swzbits  =
-      (src & NV20_VP_SRC_REG_SWZ_ALL_MASK) >> NV20_VP_SRC_REG_SWZ_ALL_SHIFT;
-   return NV20VPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV20VPGetSourceIndexed(nvsFunc * shader, int merged, int pos)
-{
-   /* I don't think NV20 can index into attribs, at least no GL
-    * extension is exposed that will allow it.
-    */
-   if (shader->GetSourceFile(shader, merged, pos) != NVS_FILE_CONST)
-      return 0;
-   if (shader->inst[3] & NV20_VP_INST_INDEX_CONST)
-      return 1;
-   return 0;
-}
-
-static int
-NV20VPGetAddressRegID(nvsFunc * shader)
-{
-   /* Only 1 address reg */
-   return 0;
-}
-
-static nvsSwzComp
-NV20VPGetAddressRegSwizzle(nvsFunc * shader)
-{
-   /* Only A0.x available */
-   return NVS_SWZ_X;
-}
-
-void
-NV20VPInitShaderFuncs(nvsFunc * shader)
-{
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_NOP, NVS_OP_NOP, -1, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_MOV, NVS_OP_MOV,  0, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_MUL, NVS_OP_MUL,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_ADD, NVS_OP_ADD,  0,  2, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_MAD, NVS_OP_MAD,  0,  1,  2);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_DP3, NVS_OP_DP3,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_DPH, NVS_OP_DPH,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_DP4, NVS_OP_DP4,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_DST, NVS_OP_DST,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_MIN, NVS_OP_MIN,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_MAX, NVS_OP_MAX,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_SLT, NVS_OP_SLT,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_SGE, NVS_OP_SGE,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV20_VP_INST_OPCODE_ARL, NVS_OP_ARL,  0, -1, -1);
-
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_NOP, NVS_OP_NOP, -1, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_RCP, NVS_OP_RCP,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_RCC, NVS_OP_RCC,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_RSQ, NVS_OP_RSQ,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_EXP, NVS_OP_EXP,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_LOG, NVS_OP_LOG,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV20_VP_INST_OPCODE_LIT, NVS_OP_LIT,  2, -1, -1);
-
-   shader->UploadToHW		= NV20VPUploadToHW;
-   shader->UpdateConst		= NV20VPUpdateConst;
-
-   shader->GetOPTXRec		= NV20VPGetOPTXRec;
-   shader->GetOPTXFromSOP	= NV20VPGetOPTXFromSOP;
-
-   shader->HasMergedInst	= NV20VPHasMergedInst;
-   shader->IsLastInst		= NV20VPIsLastInst;
-   shader->GetOffsetNext	= NV20VPGetOffsetNext;
-   shader->GetOpcodeSlot	= NV20VPGetOpcodeSlot;
-   shader->GetOpcode		= NV20VPGetOpcode;
-   shader->GetOpcodeHW		= NV20VPGetOpcodeHW;
-   shader->GetDestFile		= NV20VPGetDestFile;
-   shader->GetDestID		= NV20VPGetDestID;
-   shader->GetDestMask		= NV20VPGetDestMask;
-   shader->GetSourceHW		= NV20VPGetSourceHW;
-   shader->GetSourceFile	= NV20VPGetSourceFile;
-   shader->GetSourceID		= NV20VPGetSourceID;
-   shader->GetSourceNegate	= NV20VPGetSourceNegate;
-   shader->GetSourceAbs		= NV20VPGetSourceAbs;
-   shader->GetSourceSwizzle	= NV20VPGetSourceSwizzle;
-   shader->GetSourceIndexed	= NV20VPGetSourceIndexed;
-   shader->GetRelAddressRegID	= NV20VPGetAddressRegID;
-   shader->GetRelAddressSwizzle	= NV20VPGetAddressRegSwizzle;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv30_fragprog.c b/src/mesa/drivers/dri/nouveau/nv30_fragprog.c
deleted file mode 100644
index e32452361e8..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv30_fragprog.c
+++ /dev/null
@@ -1,742 +0,0 @@
-#include <stdint.h>
-
-#include "glheader.h"
-#include "macros.h"
-
-#include "nouveau_context.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_drm.h"
-#include "nouveau_shader.h"
-#include "nouveau_object.h"
-#include "nouveau_msg.h"
-#include "nouveau_bufferobj.h"
-#include "nv30_shader.h"
-
-unsigned int NVFP_TX_AOP_COUNT = 64;
-struct _op_xlat NVFP_TX_AOP[64];
-
-/*******************************************************************************
- * Support routines
- */
-
-static void
-NV30FPUploadToHW(GLcontext *ctx, nouveauShader *nvs)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   nvsCardPriv *priv = &nvs->card_priv;
-   uint32_t offset;
-
-   if (!nvs->program_buffer)
-      nvs->program_buffer = ctx->Driver.NewBufferObject(ctx, 0,
-							GL_ARRAY_BUFFER_ARB);
-
-   /* Should use STATIC_DRAW_ARB if shader doesn't use changable params */
-   nouveau_bo_init_storage(ctx, NOUVEAU_BO_VRAM_OK,
-	 		  nvs->program_size * sizeof(uint32_t),
-			  (const GLvoid *)nvs->program,
-			  GL_DYNAMIC_DRAW_ARB,
-			  nvs->program_buffer);
-
-   offset = nouveau_bo_gpu_ref(ctx, nvs->program_buffer);
-
-   /* Not using state cache here, updated programs at the same address don't
-    * seem to take effect unless the ACTIVE_PROGRAM method is called again.
-    * HW caches the program somewhere?
-    */
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FP_ACTIVE_PROGRAM, 1);
-   OUT_RING       (offset | 1);
-   if (nmesa->screen->card->type == NV_30) {  
-	   BEGIN_RING_SIZE(NvSub3D,
-			   0x1d60 /*NV30_TCL_PRIMITIVE_3D_FP_CONTROL*/, 1);
-	   OUT_RING       ((priv->NV30FP.uses_kil << 7));
-	   BEGIN_RING_SIZE(NvSub3D, 0x1450, 1);
-	   OUT_RING       (priv->NV30FP.num_regs << 16);
-   } else {
-	   BEGIN_RING_SIZE(NvSub3D,
-			   0x1d60 /*NV30_TCL_PRIMITIVE_3D_FP_CONTROL*/, 1);
-	   OUT_RING       ((priv->NV30FP.uses_kil <<  7) |
-			   (priv->NV30FP.num_regs << 24));
-   }
-}
-
-static void
-NV30FPUpdateConst(GLcontext *ctx, nouveauShader *nvs, int id)
-{
-   uint32_t *new     = nvs->params[id].source_val ?
-      (uint32_t*)nvs->params[id].source_val : (uint32_t*)nvs->params[id].val;
-   uint32_t *current;
-   int i;
-
-   for (i=0; i<nvs->params[id].hw_index_cnt; i++) {
-      current = nvs->program + nvs->params[id].hw_index[i];
-      COPY_4V(current, new);
-   }
-   nvs->on_hardware = 0;
-}
-
-/*******************************************************************************
- * Assembly helpers
- */
-static struct _op_xlat *
-NV30FPGetOPTXFromSOP(nvsOpcode op, int *id)
-{
-   int i;
-
-   for (i=0; i<NVFP_TX_AOP_COUNT; i++) {
-      if (NVFP_TX_AOP[i].SOP == op) {
-	 if (id) *id = 0;
-	 return &NVFP_TX_AOP[i];
-      }
-   }
-
-   return NULL;
-}
-
-static int
-NV30FPSupportsOpcode(nvsFunc *shader, nvsOpcode op)
-{
-   if (shader->GetOPTXFromSOP(op, NULL))
-      return 1;
-   return 0;
-}
-
-static void
-NV30FPSetOpcode(nvsFunc *shader, unsigned int opcode, int slot)
-{
-   if (opcode == NV30_FP_OP_OPCODE_KIL)
-      shader->card_priv->NV30FP.uses_kil = GL_TRUE;
-   shader->inst[0] &= ~NV30_FP_OP_OPCODE_MASK;
-   shader->inst[0] |= (opcode << NV30_FP_OP_OPCODE_SHIFT);
-}
-
-static void
-NV30FPSetCCUpdate(nvsFunc *shader)
-{
-   shader->inst[0] |= NV30_FP_OP_COND_WRITE_ENABLE;
-}
-
-static void
-NV30FPSetCondition(nvsFunc *shader, int on, nvsCond cond, int reg,
-      		  nvsSwzComp *swz)
-{
-   nvsSwzComp default_swz[4] = { NVS_SWZ_X, NVS_SWZ_Y, NVS_SWZ_Z, NVS_SWZ_W };
-   unsigned int hwcond;
-
-   /* cond masking is always enabled */
-   if (!on) {
-      cond = NVS_COND_TR;
-      reg  = 0;
-      swz  = default_swz;
-   }
-
-   switch (cond) {
-   case NVS_COND_TR: hwcond = NV30_FP_OP_COND_TR; break;
-   case NVS_COND_FL: hwcond = NV30_FP_OP_COND_FL; break;
-   case NVS_COND_LT: hwcond = NV30_FP_OP_COND_LT; break;
-   case NVS_COND_GT: hwcond = NV30_FP_OP_COND_GT; break;
-   case NVS_COND_LE: hwcond = NV30_FP_OP_COND_LE; break;
-   case NVS_COND_GE: hwcond = NV30_FP_OP_COND_GE; break;
-   case NVS_COND_EQ: hwcond = NV30_FP_OP_COND_EQ; break;
-   case NVS_COND_NE: hwcond = NV30_FP_OP_COND_NE; break;
-   default:
-	WARN_ONCE("unknown fp condmask=%d\n", cond);
-	hwcond = NV30_FP_OP_COND_TR;
-	break;
-   }
-
-   shader->inst[1] &= ~NV30_FP_OP_COND_MASK;
-   shader->inst[1] |= (hwcond << NV30_FP_OP_COND_SHIFT);
-
-   shader->inst[1] &= ~NV30_FP_OP_COND_SWZ_ALL_MASK;
-   shader->inst[1] |= (swz[NVS_SWZ_X] << NV30_FP_OP_COND_SWZ_X_SHIFT);
-   shader->inst[1] |= (swz[NVS_SWZ_Y] << NV30_FP_OP_COND_SWZ_Y_SHIFT);
-   shader->inst[1] |= (swz[NVS_SWZ_Z] << NV30_FP_OP_COND_SWZ_Z_SHIFT);
-   shader->inst[1] |= (swz[NVS_SWZ_W] << NV30_FP_OP_COND_SWZ_W_SHIFT);
-}
-
-static void
-NV30FPSetHighReg(nvsFunc *shader, int id)
-{
-   if (shader->card_priv->NV30FP.num_regs < (id+1)) {
-      if (id == 0)
-	 id = 1; /* necessary? */
-      shader->card_priv->NV30FP.num_regs = (id+1);
-   }
-}
-
-static void
-NV30FPSetResult(nvsFunc *shader, nvsRegister *reg, unsigned int mask, int slot)
-{
-   unsigned int hwreg;
-
-   if (mask & SMASK_X) shader->inst[0] |= NV30_FP_OP_OUT_X;
-   if (mask & SMASK_Y) shader->inst[0] |= NV30_FP_OP_OUT_Y;
-   if (mask & SMASK_Z) shader->inst[0] |= NV30_FP_OP_OUT_Z;
-   if (mask & SMASK_W) shader->inst[0] |= NV30_FP_OP_OUT_W;
-
-   if (reg->file == NVS_FILE_RESULT) {
-      hwreg = 0; /* FIXME: this is only fragment.color */
-      /* This is *not* correct, I have no idea what it is either */
-      shader->inst[0] |= NV30_FP_OP_UNK0_7;
-   } else {
-      shader->inst[0] &= ~NV30_FP_OP_UNK0_7;
-      hwreg = reg->index;
-   }
-   NV30FPSetHighReg(shader, hwreg);
-   shader->inst[0] &= ~NV30_FP_OP_OUT_REG_SHIFT;
-   shader->inst[0] |= (hwreg  << NV30_FP_OP_OUT_REG_SHIFT);
-}
-
-static void
-NV30FPSetSource(nvsFunc *shader, nvsRegister *reg, int pos)
-{
-   unsigned int hwsrc = 0;
-
-   switch (reg->file) {
-   case NVS_FILE_TEMP:
-      hwsrc |= (NV30_FP_REG_TYPE_TEMP << NV30_FP_REG_TYPE_SHIFT);
-      hwsrc |= (reg->index << NV30_FP_REG_SRC_SHIFT);
-      NV30FPSetHighReg(shader, reg->index);
-      break;
-   case NVS_FILE_ATTRIB:
-      {
-	 unsigned int hwin;
-
-	 switch (reg->index) {
-	 case NVS_FR_POSITION : hwin = NV30_FP_OP_INPUT_SRC_POSITION; break;
-	 case NVS_FR_COL0     : hwin = NV30_FP_OP_INPUT_SRC_COL0; break;
-	 case NVS_FR_COL1     : hwin = NV30_FP_OP_INPUT_SRC_COL1; break;
-	 case NVS_FR_FOGCOORD : hwin = NV30_FP_OP_INPUT_SRC_FOGC; break;
-	 case NVS_FR_TEXCOORD0: hwin = NV30_FP_OP_INPUT_SRC_TC(0); break;
-	 case NVS_FR_TEXCOORD1: hwin = NV30_FP_OP_INPUT_SRC_TC(1); break;
-	 case NVS_FR_TEXCOORD2: hwin = NV30_FP_OP_INPUT_SRC_TC(2); break;
-	 case NVS_FR_TEXCOORD3: hwin = NV30_FP_OP_INPUT_SRC_TC(3); break;
-	 case NVS_FR_TEXCOORD4: hwin = NV30_FP_OP_INPUT_SRC_TC(4); break;
-	 case NVS_FR_TEXCOORD5: hwin = NV30_FP_OP_INPUT_SRC_TC(5); break;
-	 case NVS_FR_TEXCOORD6: hwin = NV30_FP_OP_INPUT_SRC_TC(6); break;
-	 case NVS_FR_TEXCOORD7: hwin = NV30_FP_OP_INPUT_SRC_TC(7); break;
-	 default:
-		WARN_ONCE("unknown fp input %d\n", reg->index);
-		hwin = NV30_FP_OP_INPUT_SRC_COL0;
-		break;
-	 }
-	 shader->inst[0] &= ~NV30_FP_OP_INPUT_SRC_MASK;
-	 shader->inst[0] |= (hwin << NV30_FP_OP_INPUT_SRC_SHIFT);
-	 hwsrc |= (hwin << NV30_FP_REG_SRC_SHIFT);
-      }
-      hwsrc |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT);
-      break;
-   case NVS_FILE_CONST:
-      /* consts are inlined after the inst */
-      hwsrc |= (NV30_FP_REG_TYPE_CONST << NV30_FP_REG_TYPE_SHIFT);
-      break;
-   default:
-      assert(0);
-      break;
-   }
-
-   if (reg->negate)
-      hwsrc |= NV30_FP_REG_NEGATE;
-   if (reg->abs)
-      shader->inst[1] |= (1 << (29+pos));
-   hwsrc |= (reg->swizzle[NVS_SWZ_X] << NV30_FP_REG_SWZ_X_SHIFT);
-   hwsrc |= (reg->swizzle[NVS_SWZ_Y] << NV30_FP_REG_SWZ_Y_SHIFT);
-   hwsrc |= (reg->swizzle[NVS_SWZ_Z] << NV30_FP_REG_SWZ_Z_SHIFT);
-   hwsrc |= (reg->swizzle[NVS_SWZ_W] << NV30_FP_REG_SWZ_W_SHIFT);
-
-   shader->inst[pos+1] &= ~NV30_FP_REG_ALL_MASK;
-   shader->inst[pos+1] |= hwsrc;
-}
-
-static void
-NV30FPSetTexImageUnit(nvsFunc *shader, int unit)
-{
-   shader->inst[0] &= ~NV30_FP_OP_TEX_UNIT_SHIFT;
-   shader->inst[0] |= (unit << NV30_FP_OP_TEX_UNIT_SHIFT);
-}
-
-static void
-NV30FPSetSaturate(nvsFunc *shader)
-{
-   shader->inst[0] |= NV30_FP_OP_OUT_SAT;
-}
-
-static void
-NV30FPInitInstruction(nvsFunc *shader)
-{
-   unsigned int hwsrc;
-
-   shader->inst[0] = 0;
-
-   hwsrc = (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT) |
-      	   (NVS_SWZ_X << NV30_FP_REG_SWZ_X_SHIFT) |
-	   (NVS_SWZ_Y << NV30_FP_REG_SWZ_Y_SHIFT) |
-	   (NVS_SWZ_Z << NV30_FP_REG_SWZ_Z_SHIFT) |
-	   (NVS_SWZ_W << NV30_FP_REG_SWZ_W_SHIFT);
-   shader->inst[1] = hwsrc;
-   shader->inst[2] = hwsrc;
-   shader->inst[3] = hwsrc;
-}
-
-static void
-NV30FPSetLastInst(nvsFunc *shader)
-{
-   shader->inst[0] |= 1; 
-}
-
-/*******************************************************************************
- * Disassembly helpers
- */
-static struct _op_xlat *
-NV30FPGetOPTXRec(nvsFunc * shader, int merged)
-{
-   int op;
-
-   op = shader->GetOpcodeHW(shader, 0);
-   if (op > NVFP_TX_AOP_COUNT)
-      return NULL;
-   if (NVFP_TX_AOP[op].SOP == NVS_OP_UNKNOWN)
-      return NULL;
-   return &NVFP_TX_AOP[op];
-}
-
-static int
-NV30FPHasMergedInst(nvsFunc * shader)
-{
-   return 0;
-}
-
-static int
-NV30FPIsLastInst(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV30_FP_OP_PROGRAM_END) ? 1 : 0);
-}
-
-static int
-NV30FPGetOffsetNext(nvsFunc * shader)
-{
-   int i;
-
-   for (i = 0; i < 3; i++)
-      if (shader->GetSourceFile(shader, 0, i) == NVS_FILE_CONST)
-	 return 8;
-   return 4;
-}
-
-static nvsOpcode
-NV30FPGetOpcode(nvsFunc * shader, int merged)
-{
-   struct _op_xlat *opr;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr)
-      return NVS_OP_UNKNOWN;
-
-   return opr->SOP;
-}
-
-static unsigned int
-NV30FPGetOpcodeHW(nvsFunc * shader, int slot)
-{
-   int op;
-
-   op = (shader->inst[0] & NV30_FP_OP_OPCODE_MASK) >> NV30_FP_OP_OPCODE_SHIFT;
-
-   return op;
-}
-
-static nvsRegFile
-NV30FPGetDestFile(nvsFunc * shader, int merged)
-{
-   /* Result regs overlap temporary regs */
-   return NVS_FILE_TEMP;
-}
-
-static unsigned int
-NV30FPGetDestID(nvsFunc * shader, int merged)
-{
-   int id;
-
-   switch (shader->GetDestFile(shader, merged)) {
-   case NVS_FILE_TEMP:
-      id = ((shader->inst[0] & NV30_FP_OP_OUT_REG_MASK)
-	    >> NV30_FP_OP_OUT_REG_SHIFT);
-      return id;
-   default:
-      return -1;
-   }
-}
-
-static unsigned int
-NV30FPGetDestMask(nvsFunc * shader, int merged)
-{
-   unsigned int mask = 0;
-
-   if (shader->inst[0] & NV30_FP_OP_OUT_X) mask |= SMASK_X;
-   if (shader->inst[0] & NV30_FP_OP_OUT_Y) mask |= SMASK_Y;
-   if (shader->inst[0] & NV30_FP_OP_OUT_Z) mask |= SMASK_Z;
-   if (shader->inst[0] & NV30_FP_OP_OUT_W) mask |= SMASK_W;
-
-   return mask;
-}
-
-static unsigned int
-NV30FPGetSourceHW(nvsFunc * shader, int merged, int pos)
-{
-   struct _op_xlat *opr;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1)
-      return -1;
-
-   return shader->inst[opr->srcpos[pos] + 1];
-}
-
-static nvsRegFile
-NV30FPGetSourceFile(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-   struct _op_xlat *opr;
-   int file;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1)
-      return NVS_FILE_UNKNOWN;
-
-   switch (opr->srcpos[pos]) {
-   case SPOS_ADDRESS: return NVS_FILE_ADDRESS;
-   default:
-      src = shader->GetSourceHW(shader, merged, pos);
-      file = (src & NV30_FP_REG_TYPE_MASK) >> NV30_FP_REG_TYPE_SHIFT;
-
-      switch (file) {
-      case NV30_FP_REG_TYPE_TEMP : return NVS_FILE_TEMP;
-      case NV30_FP_REG_TYPE_INPUT: return NVS_FILE_ATTRIB;
-      case NV30_FP_REG_TYPE_CONST: return NVS_FILE_CONST;
-      default:
-	 return NVS_FILE_UNKNOWN;
-      }
-   }
-}
-
-static int
-NV30FPGetSourceID(nvsFunc * shader, int merged, int pos)
-{
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_ATTRIB:
-      switch ((shader->inst[0] & NV30_FP_OP_INPUT_SRC_MASK)
-	      >> NV30_FP_OP_INPUT_SRC_SHIFT) {
-      case NV30_FP_OP_INPUT_SRC_POSITION: return NVS_FR_POSITION;
-      case NV30_FP_OP_INPUT_SRC_COL0    : return NVS_FR_COL0;
-      case NV30_FP_OP_INPUT_SRC_COL1    : return NVS_FR_COL1;
-      case NV30_FP_OP_INPUT_SRC_FOGC    : return NVS_FR_FOGCOORD;
-      case NV30_FP_OP_INPUT_SRC_TC(0)   : return NVS_FR_TEXCOORD0;
-      case NV30_FP_OP_INPUT_SRC_TC(1)   : return NVS_FR_TEXCOORD1;
-      case NV30_FP_OP_INPUT_SRC_TC(2)   : return NVS_FR_TEXCOORD2;
-      case NV30_FP_OP_INPUT_SRC_TC(3)   : return NVS_FR_TEXCOORD3;
-      case NV30_FP_OP_INPUT_SRC_TC(4)   : return NVS_FR_TEXCOORD4;
-      case NV30_FP_OP_INPUT_SRC_TC(5)   : return NVS_FR_TEXCOORD5;
-      case NV30_FP_OP_INPUT_SRC_TC(6)   : return NVS_FR_TEXCOORD6;
-      case NV30_FP_OP_INPUT_SRC_TC(7)   : return NVS_FR_TEXCOORD7;
-      default:
-	 return -1;
-      }
-      break;
-   case NVS_FILE_TEMP:
-      {
-	 unsigned int src;
-
-	 src = shader->GetSourceHW(shader, merged, pos);
-	 return ((src & NV30_FP_REG_SRC_MASK) >> NV30_FP_REG_SRC_SHIFT);
-      }
-   case NVS_FILE_CONST:		/* inlined into fragprog */
-   default:
-      return -1;
-   }
-}
-
-static int
-NV30FPGetTexImageUnit(nvsFunc *shader)
-{
-      return ((shader->inst[0] & NV30_FP_OP_TEX_UNIT_MASK)
-	      >> NV30_FP_OP_TEX_UNIT_SHIFT);
-}
-
-static int
-NV30FPGetSourceNegate(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-
-   if (src == -1)
-      return -1;
-   return ((src & NV30_FP_REG_NEGATE) ? 1 : 0);
-}
-
-static int
-NV30FPGetSourceAbs(nvsFunc * shader, int merged, int pos)
-{
-   struct _op_xlat *opr;
-   static unsigned int abspos[3] = {
-      NV30_FP_OP_OUT_ABS,
-      (1 << 30),		/* guess */
-      (1 << 31)			/* guess */
-   };
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1)
-      return -1;
-
-   return ((shader->inst[1] & abspos[opr->srcpos[pos]]) ? 1 : 0);
-}
-
-nvsSwzComp NV30FP_TX_SWIZZLE[4] = {NVS_SWZ_X, NVS_SWZ_Y, NVS_SWZ_Z, NVS_SWZ_W };
-
-static void
-NV30FPTXSwizzle(int hwswz, nvsSwzComp *swz)
-{
-   swz[NVS_SWZ_W] = NV30FP_TX_SWIZZLE[(hwswz & 0xC0) >> 6];
-   swz[NVS_SWZ_Z] = NV30FP_TX_SWIZZLE[(hwswz & 0x30) >> 4];
-   swz[NVS_SWZ_Y] = NV30FP_TX_SWIZZLE[(hwswz & 0x0C) >> 2];
-   swz[NVS_SWZ_X] = NV30FP_TX_SWIZZLE[(hwswz & 0x03) >> 0];
-}
-
-static void
-NV30FPGetSourceSwizzle(nvsFunc * shader, int merged, int pos, nvsSwzComp *swz)
-{
-   unsigned int src;
-   int swzbits;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-   swzbits = (src & NV30_FP_REG_SWZ_ALL_MASK) >> NV30_FP_REG_SWZ_ALL_SHIFT;
-   NV30FPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV30FPGetSourceIndexed(nvsFunc * shader, int merged, int pos)
-{
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_ATTRIB:
-      return ((shader->inst[3] & NV30_FP_OP_INDEX_INPUT) ? 1 : 0);
-   default:
-      return 0;
-   }
-}
-
-static void
-NV30FPGetSourceConstVal(nvsFunc * shader, int merged, int pos, float *val)
-{
-   val[0] = *(float *) &(shader->inst[4]);
-   val[1] = *(float *) &(shader->inst[5]);
-   val[2] = *(float *) &(shader->inst[6]);
-   val[3] = *(float *) &(shader->inst[7]);
-}
-
-static int
-NV30FPGetSourceScale(nvsFunc * shader, int merged, int pos)
-{
-/*FIXME: is this per-source, only for a specific source, or all sources??*/
-   return (1 << ((shader->inst[2] & NV30_FP_OP_SRC_SCALE_MASK)
-		 >> NV30_FP_OP_SRC_SCALE_SHIFT));
-}
-
-static int
-NV30FPGetAddressRegID(nvsFunc * shader)
-{
-   return 0;
-}
-
-static nvsSwzComp
-NV30FPGetAddressRegSwizzle(nvsFunc * shader)
-{
-   return NVS_SWZ_X;
-}
-
-static int
-NV30FPSupportsConditional(nvsFunc * shader)
-{
-   /*FIXME: Is this true of all ops? */
-   return 1;
-}
-
-static int
-NV30FPGetConditionUpdate(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV30_FP_OP_COND_WRITE_ENABLE) ? 1 : 0);
-}
-
-static int
-NV30FPGetConditionTest(nvsFunc * shader)
-{
-   /*FIXME: always? */
-   return 1;
-}
-
-static nvsCond
-NV30FPGetCondition(nvsFunc * shader)
-{
-   int cond;
-
-   cond = ((shader->inst[1] & NV30_FP_OP_COND_MASK)
-	   >> NV30_FP_OP_COND_SHIFT);
-
-   switch (cond) {
-   case NV30_FP_OP_COND_FL: return NVS_COND_FL;
-   case NV30_FP_OP_COND_LT: return NVS_COND_LT;
-   case NV30_FP_OP_COND_EQ: return NVS_COND_EQ;
-   case NV30_FP_OP_COND_LE: return NVS_COND_LE;
-   case NV30_FP_OP_COND_GT: return NVS_COND_GT;
-   case NV30_FP_OP_COND_NE: return NVS_COND_NE;
-   case NV30_FP_OP_COND_GE: return NVS_COND_GE;
-   case NV30_FP_OP_COND_TR: return NVS_COND_TR;
-   default:
-      return NVS_COND_UNKNOWN;
-   }
-}
-
-static void
-NV30FPGetCondRegSwizzle(nvsFunc * shader, nvsSwzComp *swz)
-{
-   int swzbits;
-
-   swzbits = (shader->inst[1] & NV30_FP_OP_COND_SWZ_ALL_MASK)
-      >> NV30_FP_OP_COND_SWZ_ALL_SHIFT;
-   NV30FPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV30FPGetCondRegID(nvsFunc * shader)
-{
-   return 0;
-}
-
-static nvsPrecision
-NV30FPGetPrecision(nvsFunc * shader)
-{
-   int p;
-
-   p = (shader->inst[0] & NV30_FP_OP_PRECISION_MASK)
-      >> NV30_FP_OP_PRECISION_SHIFT;
-
-   switch (p) {
-   case NV30_FP_PRECISION_FP32: return NVS_PREC_FLOAT32;
-   case NV30_FP_PRECISION_FP16: return NVS_PREC_FLOAT16;
-   case NV30_FP_PRECISION_FX12: return NVS_PREC_FIXED12;
-   default:
-      return NVS_PREC_UNKNOWN;
-   }
-}
-
-static int
-NV30FPGetSaturate(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV30_FP_OP_OUT_SAT) ? 1 : 0);
-}
-
-/*******************************************************************************
- * Init
- */
-void
-NV30FPInitShaderFuncs(nvsFunc * shader)
-{
-   /* These are probably bogus, I made them up... */
-   shader->MaxInst	= 1024;
-   shader->MaxAttrib	= 16;
-   shader->MaxTemp	= 32;
-   shader->MaxAddress	= 1;
-   shader->MaxConst	= 256;
-   shader->caps		= SCAP_SRC_ABS;
-
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_MOV, NVS_OP_MOV, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_MUL, NVS_OP_MUL, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_ADD, NVS_OP_ADD, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_MAD, NVS_OP_MAD, 0, 1, 2);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_DP3, NVS_OP_DP3, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_DP4, NVS_OP_DP4, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_DST, NVS_OP_DST, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_MIN, NVS_OP_MIN, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_MAX, NVS_OP_MAX, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SLT, NVS_OP_SLT, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SGE, NVS_OP_SGE, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_FRC, NVS_OP_FRC, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_FLR, NVS_OP_FLR, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_TEX, NVS_OP_TEX, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_TXD, NVS_OP_TXD, 0, 1, 2);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_TXP, NVS_OP_TXP, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_TXB, NVS_OP_TXB, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SEQ, NVS_OP_SEQ, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SGT, NVS_OP_SGT, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SLE, NVS_OP_SLE, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SNE, NVS_OP_SNE, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_RCP, NVS_OP_RCP, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_LG2, NVS_OP_LG2, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_EX2, NVS_OP_EX2, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_COS, NVS_OP_COS, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_SIN, NVS_OP_SIN, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_NOP, NVS_OP_NOP, -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_DDX, NVS_OP_DDX, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_DDY, NVS_OP_DDY, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_KIL, NVS_OP_KIL, -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_PK4B, NVS_OP_PK4B, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_UP4B, NVS_OP_UP4B, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_PK2H, NVS_OP_PK2H, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_UP2H, NVS_OP_UP2H, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_PK4UB, NVS_OP_PK4UB, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_UP4UB, NVS_OP_UP4UB, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_PK2US, NVS_OP_PK2US, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_UP2US, NVS_OP_UP2US, 0, -1, -1);
-   /*FIXME: Haven't confirmed the source positions for the below opcodes */
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_LIT, NVS_OP_LIT, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_LRP, NVS_OP_LRP, 0, 1, 2);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_POW, NVS_OP_POW, 0, 1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_RSQ, NVS_OP_RSQ, 0, -1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV30_FP_OP_OPCODE_RFL, NVS_OP_RFL, 0, 1, -1);
-
-   shader->GetOPTXRec		= NV30FPGetOPTXRec;
-   shader->GetOPTXFromSOP	= NV30FPGetOPTXFromSOP;
-
-   shader->UploadToHW		= NV30FPUploadToHW;
-   shader->UpdateConst		= NV30FPUpdateConst;
-
-   shader->InitInstruction	= NV30FPInitInstruction;
-   shader->SupportsOpcode	= NV30FPSupportsOpcode;
-   shader->SetOpcode		= NV30FPSetOpcode;
-   shader->SetCCUpdate		= NV30FPSetCCUpdate;
-   shader->SetCondition		= NV30FPSetCondition;
-   shader->SetResult		= NV30FPSetResult;
-   shader->SetSource		= NV30FPSetSource;
-   shader->SetTexImageUnit	= NV30FPSetTexImageUnit;
-   shader->SetSaturate		= NV30FPSetSaturate;
-   shader->SetLastInst		= NV30FPSetLastInst;
-
-   shader->HasMergedInst	= NV30FPHasMergedInst;
-   shader->IsLastInst		= NV30FPIsLastInst;
-   shader->GetOffsetNext	= NV30FPGetOffsetNext;
-   shader->GetOpcode		= NV30FPGetOpcode;
-   shader->GetOpcodeHW		= NV30FPGetOpcodeHW;
-   shader->GetDestFile		= NV30FPGetDestFile;
-   shader->GetDestID		= NV30FPGetDestID;
-   shader->GetDestMask		= NV30FPGetDestMask;
-   shader->GetSourceHW		= NV30FPGetSourceHW;
-   shader->GetSourceFile	= NV30FPGetSourceFile;
-   shader->GetSourceID		= NV30FPGetSourceID;
-   shader->GetTexImageUnit	= NV30FPGetTexImageUnit;
-   shader->GetSourceNegate	= NV30FPGetSourceNegate;
-   shader->GetSourceAbs		= NV30FPGetSourceAbs;
-   shader->GetSourceSwizzle	= NV30FPGetSourceSwizzle;
-   shader->GetSourceIndexed	= NV30FPGetSourceIndexed;
-   shader->GetSourceConstVal	= NV30FPGetSourceConstVal;
-   shader->GetSourceScale	= NV30FPGetSourceScale;
-   shader->GetRelAddressRegID	= NV30FPGetAddressRegID;
-   shader->GetRelAddressSwizzle = NV30FPGetAddressRegSwizzle;
-   shader->GetPrecision		= NV30FPGetPrecision;
-   shader->GetSaturate		= NV30FPGetSaturate;
-   shader->SupportsConditional	= NV30FPSupportsConditional;
-   shader->GetConditionUpdate	= NV30FPGetConditionUpdate;
-   shader->GetConditionTest	= NV30FPGetConditionTest;
-   shader->GetCondition		= NV30FPGetCondition;
-   shader->GetCondRegSwizzle	= NV30FPGetCondRegSwizzle;
-   shader->GetCondRegID		= NV30FPGetCondRegID;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv30_shader.h b/src/mesa/drivers/dri/nouveau/nv30_shader.h
deleted file mode 100644
index 7a027dd4273..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv30_shader.h
+++ /dev/null
@@ -1,379 +0,0 @@
-#ifndef __NV30_SHADER_H__
-#define __NV30_SHADER_H__
-
-/* Vertex programs instruction set
- *
- * 128bit opcodes, split into 4 32-bit ones for ease of use.
- *
- * Non-native instructions
- *	 ABS - MOV + NV40_VP_INST0_DEST_ABS
- *	 POW - EX2 + MUL + LG2
- *	 SUB - ADD, second source negated
- *	 SWZ - MOV
- *	 XPD -  
- *
- * Register access
- *	 - Only one INPUT can be accessed per-instruction (move extras into TEMPs)
- *	 - Only one CONST can be accessed per-instruction (move extras into TEMPs)
- *
- * Relative Addressing
- *	 According to the value returned for MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB
- *	 there are only two address registers available.  The destination in the ARL
- *	 instruction is set to TEMP <n> (The temp isn't actually written).
- *
- *	 When using vanilla ARB_v_p, the proprietary driver will squish both the available
- *	 ADDRESS regs into the first hardware reg in the X and Y components.
- *
- *	 To use an address reg as an index into consts, the CONST_SRC is set to
- *	 (const_base + offset) and INDEX_CONST is set.
- *
- *	 To access the second address reg use ADDR_REG_SELECT_1. A particular component
- *	 of the address regs is selected with ADDR_SWZ.
- *
- *	 Only one address register can be accessed per instruction.
- *
- * Conditional execution (see NV_vertex_program{2,3} for details)
- *	 Conditional execution of an instruction is enabled by setting COND_TEST_ENABLE, and
- *	 selecting the condition which will allow the test to pass with COND_{FL,LT,...}.
- *	 It is possible to swizzle the values in the condition register, which allows for
- *	 testing against an individual component.
- *
- * Branching
- *	 The BRA/CAL instructions seem to follow a slightly different opcode layout.  The
- *	 destination instruction ID (IADDR) overlaps a source field.  Instruction ID's seem to
- *	 be numbered based on the UPLOAD_FROM_ID FIFO command, and is incremented automatically
- *	 on each UPLOAD_INST FIFO command.
- *
- *	 Conditional branching is achieved by using the condition tests described above.
- *	 There doesn't appear to be dedicated looping instructions, but this can be done
- *	 using a temp reg + conditional branching.
- *
- *	 Subroutines may be uploaded before the main program itself, but the first executed
- *	 instruction is determined by the PROGRAM_START_ID FIFO command.
- *
- */
-
-/* DWORD 0 */
-#define NV30_VP_INST_ADDR_REG_SELECT_1				(1 << 24)
-#define NV30_VP_INST_SRC2_ABS			 		(1 << 23) /* guess */
-#define NV30_VP_INST_SRC1_ABS			 		(1 << 22) /* guess */
-#define NV30_VP_INST_SRC0_ABS			 		(1 << 21) /* guess */
-#define NV30_VP_INST_OUT_RESULT					(1 << 20)
-#define NV30_VP_INST_DEST_TEMP_ID_SHIFT				16
-#define NV30_VP_INST_DEST_TEMP_ID_MASK				(0x0F << 16)
-#define NV30_VP_INST_COND_UPDATE_ENABLE				(1<<15)
-#define NV30_VP_INST_COND_TEST_ENABLE				(1<<14)
-#define NV30_VP_INST_COND_SHIFT					11
-#define NV30_VP_INST_COND_MASK					(0x07 << 11)
-#	define NV30_VP_INST_COND_FL	0 /* guess */	
-#	define NV30_VP_INST_COND_LT	1	
-#	define NV30_VP_INST_COND_EQ	2
-#	define NV30_VP_INST_COND_LE	3
-#	define NV30_VP_INST_COND_GT	4
-#	define NV30_VP_INST_COND_NE	5
-#	define NV30_VP_INST_COND_GE	6
-#	define NV30_VP_INST_COND_TR	7 /* guess */
-#define NV30_VP_INST_COND_SWZ_X_SHIFT				9
-#define NV30_VP_INST_COND_SWZ_X_MASK				(0x03 <<  9)
-#define NV30_VP_INST_COND_SWZ_Y_SHIFT				7
-#define NV30_VP_INST_COND_SWZ_Y_MASK				(0x03 <<  7)
-#define NV30_VP_INST_COND_SWZ_Z_SHIFT				5
-#define NV30_VP_INST_COND_SWZ_Z_MASK				(0x03 <<  5)
-#define NV30_VP_INST_COND_SWZ_W_SHIFT				3
-#define NV30_VP_INST_COND_SWZ_W_MASK				(0x03 <<  3)
-#define NV30_VP_INST_COND_SWZ_ALL_SHIFT				3
-#define NV30_VP_INST_COND_SWZ_ALL_MASK				(0xFF <<  3)
-#define NV30_VP_INST_ADDR_SWZ_SHIFT				1
-#define NV30_VP_INST_ADDR_SWZ_MASK				(0x03 <<  1)
-#define NV30_VP_INST_SCA_OPCODEH_SHIFT				0
-#define NV30_VP_INST_SCA_OPCODEH_MASK				(0x01 <<  0)
-
-/* DWORD 1 */
-#define NV30_VP_INST_SCA_OPCODEL_SHIFT				28
-#define NV30_VP_INST_SCA_OPCODEL_MASK				(0x0F << 28)
-#	define NV30_VP_INST_OP_NOP	0x00
-#	define NV30_VP_INST_OP_RCP	0x02
-#	define NV30_VP_INST_OP_RCC	0x03
-#	define NV30_VP_INST_OP_RSQ	0x04
-#	define NV30_VP_INST_OP_EXP	0x05
-#	define NV30_VP_INST_OP_LOG	0x06
-#	define NV30_VP_INST_OP_LIT	0x07
-#	define NV30_VP_INST_OP_BRA	0x09
-#	define NV30_VP_INST_OP_CAL	0x0B
-#	define NV30_VP_INST_OP_RET	0x0C
-#	define NV30_VP_INST_OP_LG2	0x0D
-#	define NV30_VP_INST_OP_EX2	0x0E
-#	define NV30_VP_INST_OP_SIN	0x0F
-#	define NV30_VP_INST_OP_COS	0x10
-#define NV30_VP_INST_VEC_OPCODE_SHIFT				23
-#define NV30_VP_INST_VEC_OPCODE_MASK				(0x1F << 23)
-#	define NV30_VP_INST_OP_NOPV	0x00
-#	define NV30_VP_INST_OP_MOV	0x01
-#	define NV30_VP_INST_OP_MUL	0x02
-#	define NV30_VP_INST_OP_ADD	0x03
-#	define NV30_VP_INST_OP_MAD	0x04
-#	define NV30_VP_INST_OP_DP3	0x05
-#	define NV30_VP_INST_OP_DP4	0x07
-#	define NV30_VP_INST_OP_DPH	0x06
-#	define NV30_VP_INST_OP_DST	0x08
-#	define NV30_VP_INST_OP_MIN	0x09
-#	define NV30_VP_INST_OP_MAX	0x0A
-#	define NV30_VP_INST_OP_SLT	0x0B
-#	define NV30_VP_INST_OP_SGE	0x0C
-#	define NV30_VP_INST_OP_ARL	0x0D
-#	define NV30_VP_INST_OP_FRC	0x0E
-#	define NV30_VP_INST_OP_FLR	0x0F
-#	define NV30_VP_INST_OP_SEQ	0x10
-#	define NV30_VP_INST_OP_SFL	0x11
-#	define NV30_VP_INST_OP_SGT	0x12
-#	define NV30_VP_INST_OP_SLE	0x13
-#	define NV30_VP_INST_OP_SNE	0x14
-#	define NV30_VP_INST_OP_STR	0x15
-#	define NV30_VP_INST_OP_SSG	0x16
-#	define NV30_VP_INST_OP_ARR	0x17
-#	define NV30_VP_INST_OP_ARA	0x18
-#define NV30_VP_INST_CONST_SRC_SHIFT				14
-#define NV30_VP_INST_CONST_SRC_MASK				(0xFF << 14)
-#define NV30_VP_INST_INPUT_SRC_SHIFT				9		/*NV20*/
-#define NV30_VP_INST_INPUT_SRC_MASK				(0x0F <<  9)	/*NV20*/
-#	define NV30_VP_INST_IN_POS	0	  /* These seem to match the bindings specified in */
-#	define NV30_VP_INST_IN_WEIGHT	1	  /* the ARB_v_p spec (2.14.3.1) */
-#	define NV30_VP_INST_IN_NORMAL	2	  
-#	define NV30_VP_INST_IN_COL0	3	  /* Should probably confirm them all though */
-#	define NV30_VP_INST_IN_COL1	4
-#	define NV30_VP_INST_IN_FOGC	5
-#	define NV30_VP_INST_IN_TC0	8
-#	define NV30_VP_INST_IN_TC(n)	(8+n)
-#define NV30_VP_INST_SRC0H_SHIFT				0		/*NV20*/
-#define NV30_VP_INST_SRC0H_MASK					(0x1FF << 0)	/*NV20*/
-
-/* DWORD 2 */
-#define NV30_VP_INST_SRC0L_SHIFT				26		/*NV20*/
-#define NV30_VP_INST_SRC0L_MASK					(0x3F  <<26)	/*NV20*/
-#define NV30_VP_INST_SRC1_SHIFT					11		/*NV20*/
-#define NV30_VP_INST_SRC1_MASK					(0x7FFF<<11)	/*NV20*/
-#define NV30_VP_INST_SRC2H_SHIFT				0		/*NV20*/
-#define NV30_VP_INST_SRC2H_MASK					(0x7FF << 0)	/*NV20*/
-#define NV30_VP_INST_IADDR_SHIFT				2
-#define NV30_VP_INST_IADDR_MASK					(0xFF <<  2) 	/* guess */
-
-/* DWORD 3 */
-#define NV30_VP_INST_SRC2L_SHIFT				28		/*NV20*/
-#define NV30_VP_INST_SRC2L_MASK					(0x0F  <<28)	/*NV20*/
-#define NV30_VP_INST_STEMP_WRITEMASK_SHIFT			24
-#define NV30_VP_INST_STEMP_WRITEMASK_MASK			(0x0F << 24)
-#define NV30_VP_INST_VTEMP_WRITEMASK_SHIFT			20
-#define NV30_VP_INST_VTEMP_WRITEMASK_MASK			(0x0F << 20)
-#define NV30_VP_INST_SDEST_WRITEMASK_SHIFT			16
-#define NV30_VP_INST_SDEST_WRITEMASK_MASK			(0x0F << 16)
-#define NV30_VP_INST_VDEST_WRITEMASK_SHIFT			12		/*NV20*/
-#define NV30_VP_INST_VDEST_WRITEMASK_MASK			(0x0F << 12)	/*NV20*/
-#define NV30_VP_INST_DEST_ID_SHIFT				2
-#define NV30_VP_INST_DEST_ID_MASK				(0x0F <<  2)
-#	define NV30_VP_INST_DEST_POS	0
-#	define NV30_VP_INST_DEST_COL0	3
-#	define NV30_VP_INST_DEST_COL1	4
-#	define NV30_VP_INST_DEST_TC(n)	(8+n)
-
-/* Source-register definition - matches NV20 exactly */
-#define NV30_VP_SRC_REG_NEGATE					(1<<14)
-#define NV30_VP_SRC_REG_SWZ_X_SHIFT				12
-#define NV30_VP_SRC_REG_SWZ_X_MASK				(0x03  <<12)
-#define NV30_VP_SRC_REG_SWZ_Y_SHIFT				10
-#define NV30_VP_SRC_REG_SWZ_Y_MASK				(0x03  <<10)
-#define NV30_VP_SRC_REG_SWZ_Z_SHIFT				8
-#define NV30_VP_SRC_REG_SWZ_Z_MASK				(0x03  << 8)
-#define NV30_VP_SRC_REG_SWZ_W_SHIFT				6
-#define NV30_VP_SRC_REG_SWZ_W_MASK				(0x03  << 6)
-#define NV30_VP_SRC_REG_SWZ_ALL_SHIFT				6
-#define NV30_VP_SRC_REG_SWZ_ALL_MASK				(0xFF  << 6)
-#define NV30_VP_SRC_REG_TEMP_ID_SHIFT				2
-#define NV30_VP_SRC_REG_TEMP_ID_MASK				(0x0F  << 0)
-#define NV30_VP_SRC_REG_TYPE_SHIFT				0
-#define NV30_VP_SRC_REG_TYPE_MASK				(0x03  << 0)
-#define NV30_VP_SRC_REG_TYPE_TEMP	1
-#define NV30_VP_SRC_REG_TYPE_INPUT	2
-#define NV30_VP_SRC_REG_TYPE_CONST	3 /* guess */
-
-/*
- * Each fragment program opcode appears to be comprised of 4 32-bit values.
- *
- *	 0 - Opcode, output reg/mask, ATTRIB source
- *	 1 - Source 0
- *	 2 - Source 1
- *	 3 - Source 2
- *
- * There appears to be no special difference between result regs and temp regs.
- * 		result.color == R0.xyzw
- * 		result.depth == R1.z
- * When the fragprog contains instructions to write depth, NV30_TCL_PRIMITIVE_3D_UNK1D78=0
- * otherwise it is set to 1.
- *
- * Constants are inserted directly after the instruction that uses them.
- * 
- * It appears that it's not possible to use two input registers in one
- * instruction as the input sourcing is done in the instruction dword
- * and not the source selection dwords.  As such instructions such as:
- * 
- *		 ADD result.color, fragment.color, fragment.texcoord[0];
- *
- * must be split into two MOV's and then an ADD (nvidia does this) but
- * I'm not sure why it's not just one MOV and then source the second input
- * in the ADD instruction..
- *
- * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary
- * negation requires multiplication with a const.
- *
- * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO/SWIZZLE_ONE
- * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as SWIZZLE_ZERO
- * is implemented simply by not writing to the relevant components of the destination.
- *
- * Conditional execution
- *   TODO
- * 
- * Non-native instructions:
- *	 LIT
- *	 LRP - MAD+MAD
- *	 SUB - ADD, negate second source
- *	 RSQ - LG2 + EX2
- *	 POW - LG2 + MUL + EX2
- *	 SCS - COS + SIN
- *	 XPD
- */
-
-//== Opcode / Destination selection ==
-#define NV30_FP_OP_PROGRAM_END					(1 << 0)
-#define NV30_FP_OP_OUT_REG_SHIFT				1
-#define NV30_FP_OP_OUT_REG_MASK					(31 << 1)	/* uncertain */
-/* Needs to be set when writing outputs to get expected result.. */
-#define NV30_FP_OP_UNK0_7					(1 << 7)
-#define NV30_FP_OP_COND_WRITE_ENABLE				(1 << 8)
-#define NV30_FP_OP_OUTMASK_SHIFT				9
-#define NV30_FP_OP_OUTMASK_MASK					(0xF << 9)
-#	define NV30_FP_OP_OUT_X	(1<<9)
-#	define NV30_FP_OP_OUT_Y	(1<<10)
-#	define NV30_FP_OP_OUT_Z	(1<<11)
-#	define NV30_FP_OP_OUT_W	(1<<12)
-/* Uncertain about these, especially the input_src values.. it's possible that
- * they can be dynamically changed.
- */
-#define NV30_FP_OP_INPUT_SRC_SHIFT				13
-#define NV30_FP_OP_INPUT_SRC_MASK				(15 << 13)
-#	define NV30_FP_OP_INPUT_SRC_POSITION	0x0
-#	define NV30_FP_OP_INPUT_SRC_COL0	0x1
-#	define NV30_FP_OP_INPUT_SRC_COL1	0x2
-#	define NV30_FP_OP_INPUT_SRC_FOGC	0x3
-#	define NV30_FP_OP_INPUT_SRC_TC0		0x4
-#	define NV30_FP_OP_INPUT_SRC_TC(n)	(0x4 + n)
-#define NV30_FP_OP_TEX_UNIT_SHIFT				17
-#define NV30_FP_OP_TEX_UNIT_MASK				(0xF << 17) /* guess */
-#define NV30_FP_OP_PRECISION_SHIFT				22
-#define NV30_FP_OP_PRECISION_MASK				(3 << 22)
-#   define NV30_FP_PRECISION_FP32	0
-#   define NV30_FP_PRECISION_FP16	1
-#   define NV30_FP_PRECISION_FX12	2
-#define NV30_FP_OP_OPCODE_SHIFT					24
-#define NV30_FP_OP_OPCODE_MASK					(0x3F << 24)
-#	define NV30_FP_OP_OPCODE_NOP	0x00
-#	define NV30_FP_OP_OPCODE_MOV	0x01
-#	define NV30_FP_OP_OPCODE_MUL	0x02
-#	define NV30_FP_OP_OPCODE_ADD	0x03
-#	define NV30_FP_OP_OPCODE_MAD	0x04
-#	define NV30_FP_OP_OPCODE_DP3	0x05
-#	define NV30_FP_OP_OPCODE_DP4	0x06
-#	define NV30_FP_OP_OPCODE_DST	0x07
-#	define NV30_FP_OP_OPCODE_MIN	0x08
-#	define NV30_FP_OP_OPCODE_MAX	0x09
-#	define NV30_FP_OP_OPCODE_SLT	0x0A
-#	define NV30_FP_OP_OPCODE_SGE	0x0B
-#	define NV30_FP_OP_OPCODE_SLE	0x0C
-#	define NV30_FP_OP_OPCODE_SGT	0x0D
-#	define NV30_FP_OP_OPCODE_SNE	0x0E
-#	define NV30_FP_OP_OPCODE_SEQ	0x0F
-#	define NV30_FP_OP_OPCODE_FRC	0x10
-#	define NV30_FP_OP_OPCODE_FLR	0x11
-#	define NV30_FP_OP_OPCODE_KIL	0x12
-#	define NV30_FP_OP_OPCODE_PK4B   0x13
-#	define NV30_FP_OP_OPCODE_UP4B   0x14
-#	define NV30_FP_OP_OPCODE_DDX	0x15 /* can only write XY */
-#	define NV30_FP_OP_OPCODE_DDY	0x16 /* can only write XY */
-#	define NV30_FP_OP_OPCODE_TEX	0x17
-#	define NV30_FP_OP_OPCODE_TXP	0x18
-#	define NV30_FP_OP_OPCODE_TXD	0x19
-#	define NV30_FP_OP_OPCODE_RCP	0x1A
-#	define NV30_FP_OP_OPCODE_RSQ	0x1B
-#	define NV30_FP_OP_OPCODE_EX2	0x1C
-#	define NV30_FP_OP_OPCODE_LG2	0x1D
-#	define NV30_FP_OP_OPCODE_LIT	0x1E
-#	define NV30_FP_OP_OPCODE_LRP	0x1F
-#	define NV30_FP_OP_OPCODE_COS	0x22
-#	define NV30_FP_OP_OPCODE_SIN	0x23
-#	define NV30_FP_OP_OPCODE_PK2H   0x24
-#	define NV30_FP_OP_OPCODE_UP2H   0x25
-#	define NV30_FP_OP_OPCODE_POW	0x26
-#	define NV30_FP_OP_OPCODE_PK4UB  0x27
-#	define NV30_FP_OP_OPCODE_UP4UB  0x28
-#	define NV30_FP_OP_OPCODE_PK2US  0x29
-#	define NV30_FP_OP_OPCODE_UP2US  0x2A
-#	define NV30_FP_OP_OPCODE_DP2A   0x2E
-#	define NV30_FP_OP_OPCODE_TXB	0x31
-#	define NV30_FP_OP_OPCODE_RFL	0x36
-#define NV30_FP_OP_OUT_SAT					(1 << 31)
-
-/* high order bits of SRC0 */
-#define NV30_FP_OP_OUT_ABS					(1 << 29)
-#define NV30_FP_OP_COND_SWZ_W_SHIFT				27
-#define NV30_FP_OP_COND_SWZ_W_MASK				(3 << 27)
-#define NV30_FP_OP_COND_SWZ_Z_SHIFT				25
-#define NV30_FP_OP_COND_SWZ_Z_MASK				(3 << 25)
-#define NV30_FP_OP_COND_SWZ_Y_SHIFT				23
-#define NV30_FP_OP_COND_SWZ_Y_MASK				(3 << 23)
-#define NV30_FP_OP_COND_SWZ_X_SHIFT				21
-#define NV30_FP_OP_COND_SWZ_X_MASK				(3 << 21)
-#define NV30_FP_OP_COND_SWZ_ALL_SHIFT				21
-#define NV30_FP_OP_COND_SWZ_ALL_MASK				(0xFF << 21)
-#define NV30_FP_OP_COND_SHIFT					18
-#define NV30_FP_OP_COND_MASK					(0x07 << 18)
-#	define NV30_FP_OP_COND_FL	0
-#	define NV30_FP_OP_COND_LT	1
-#	define NV30_FP_OP_COND_EQ	2
-#	define NV30_FP_OP_COND_LE	3
-#	define NV30_FP_OP_COND_GT	4
-#	define NV30_FP_OP_COND_NE	5
-#	define NV30_FP_OP_COND_GE	6
-#	define NV30_FP_OP_COND_TR	7
-
-/* high order bits of SRC1 */
-#define NV30_FP_OP_SRC_SCALE_SHIFT				28
-#define NV30_FP_OP_SRC_SCALE_MASK				(3 << 28)
-
-/* high order bits of SRC2 */
-#define NV30_FP_OP_INDEX_INPUT					(1 << 30)
-
-//== Register selection ==
-#define NV30_FP_REG_ALL_MASK					(0x1FFFF<<0)
-#define NV30_FP_REG_TYPE_SHIFT					0
-#define NV30_FP_REG_TYPE_MASK					(3 << 0)
-#	define NV30_FP_REG_TYPE_TEMP	0
-#	define NV30_FP_REG_TYPE_INPUT	1
-#	define NV30_FP_REG_TYPE_CONST	2
-#define NV30_FP_REG_SRC_SHIFT					2 /* uncertain */
-#define NV30_FP_REG_SRC_MASK					(31 << 2)
-#define NV30_FP_REG_UNK_0					(1 << 8)
-#define NV30_FP_REG_SWZ_ALL_SHIFT				9
-#define NV30_FP_REG_SWZ_ALL_MASK				(255 << 9)
-#define NV30_FP_REG_SWZ_X_SHIFT					9
-#define NV30_FP_REG_SWZ_X_MASK					(3 << 9)
-#define NV30_FP_REG_SWZ_Y_SHIFT					11
-#define NV30_FP_REG_SWZ_Y_MASK					(3 << 11)
-#define NV30_FP_REG_SWZ_Z_SHIFT					13
-#define NV30_FP_REG_SWZ_Z_MASK					(3 << 13)
-#define NV30_FP_REG_SWZ_W_SHIFT					15
-#define NV30_FP_REG_SWZ_W_MASK					(3 << 15)
-#	define NV30_FP_SWIZZLE_X	0
-#	define NV30_FP_SWIZZLE_Y	1
-#	define NV30_FP_SWIZZLE_Z	2
-#	define NV30_FP_SWIZZLE_W	3
-#define NV30_FP_REG_NEGATE					(1 << 17)
-
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nv30_state.c b/src/mesa/drivers/dri/nouveau/nv30_state.c
deleted file mode 100644
index 9b010954b33..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv30_state.c
+++ /dev/null
@@ -1,1002 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Nouveau
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_state.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-#define NOUVEAU_CARD_USING_SHADERS (nmesa->screen->card->type >= NV_40)
-
-static void nv30AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte ubRef;
-	CLAMPED_FLOAT_TO_UBYTE(ubRef, ref);
-
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC, 2);
-	OUT_RING_CACHE(func);     /* NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_FUNC */
-	OUT_RING_CACHE(ubRef);    /* NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF  */
-}
-
-static void nv30BlendColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); 
-	GLubyte cf[4];
-
-	CLAMPED_FLOAT_TO_UBYTE(cf[0], color[0]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[1], color[1]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[2], color[2]);
-	CLAMPED_FLOAT_TO_UBYTE(cf[3], color[3]);
-
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_BLEND_COLOR, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888(cf[3], cf[1], cf[2], cf[0]));
-}
-
-static void nv30BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB, GLenum modeA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_BLEND_EQUATION, 1);
-	OUT_RING_CACHE((modeA<<16) | modeRGB);
-}
-
-
-static void nv30BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB,
-		GLenum sfactorA, GLenum dfactorA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC, 2);
-	OUT_RING_CACHE((sfactorA<<16) | sfactorRGB);
-	OUT_RING_CACHE((dfactorA<<16) | dfactorRGB);
-}
-
-static void nv30Clear(GLcontext *ctx, GLbitfield mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLuint hw_bufs = 0;
-
-	if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT))
-		hw_bufs |= 0xf0;
-	if (mask & (BUFFER_BIT_DEPTH))
-		hw_bufs |= 0x03;
-
-	if (hw_bufs) {
-		BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLEAR_WHICH_BUFFERS, 1);
-		OUT_RING(hw_bufs);
-	}
-}
-
-static void nv30ClearColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte c[4];
-	UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,color);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLEAR_VALUE_ARGB, 1);
-	OUT_RING_CACHE(PACK_COLOR_8888(c[3],c[0],c[1],c[2]));
-}
-
-static void nv30ClearDepth(GLcontext *ctx, GLclampd d)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nmesa->clear_value=((nmesa->clear_value&0x000000FF)|(((uint32_t)(d*0xFFFFFF))<<8));
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH, 1);
-	OUT_RING_CACHE(nmesa->clear_value);
-}
-
-/* we're don't support indexed buffers
-   void (*ClearIndex)(GLcontext *ctx, GLuint index)
- */
-
-static void nv30ClearStencil(GLcontext *ctx, GLint s)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	nmesa->clear_value=((nmesa->clear_value&0xFFFFFF00)|(s&0x000000FF));
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLEAR_VALUE_DEPTH, 1);
-	OUT_RING_CACHE(nmesa->clear_value);
-}
-
-static void nv30ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (NOUVEAU_CARD_USING_SHADERS)
-		return;
-
-	plane -= GL_CLIP_PLANE0;
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_A(plane), 4);
-	OUT_RING_CACHEf(equation[0]);
-	OUT_RING_CACHEf(equation[1]);
-	OUT_RING_CACHEf(equation[2]);
-	OUT_RING_CACHEf(equation[3]);
-}
-
-static void nv30ColorMask(GLcontext *ctx, GLboolean rmask, GLboolean gmask,
-		GLboolean bmask, GLboolean amask )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_COLOR_MASK, 1);
-	OUT_RING_CACHE(((amask && 0x01) << 24) | ((rmask && 0x01) << 16) | ((gmask && 0x01)<< 8) | ((bmask && 0x01) << 0));
-}
-
-static void nv30ColorMaterial(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	// TODO I need love
-}
-
-static void nv30CullFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CULL_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv30FrontFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FRONT_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv30DepthFunc(GLcontext *ctx, GLenum func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DEPTH_FUNC, 1);
-	OUT_RING_CACHE(func);
-}
-
-static void nv30DepthMask(GLcontext *ctx, GLboolean flag)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE, 1);
-	OUT_RING_CACHE(flag);
-}
-
-static void nv30DepthRange(GLcontext *ctx, GLclampd nearval, GLclampd farval)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR, 2);
-	OUT_RING_CACHEf(nearval);
-	OUT_RING_CACHEf(farval);
-}
-
-/** Specify the current buffer for writing */
-//void (*DrawBuffer)( GLcontext *ctx, GLenum buffer );
-/** Specify the buffers for writing for fragment programs*/
-//void (*DrawBuffers)( GLcontext *ctx, GLsizei n, const GLenum *buffers );
-
-static void nv30Enable(GLcontext *ctx, GLenum cap, GLboolean state)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	switch(cap)
-	{
-		case GL_ALPHA_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_AUTO_NORMAL:
-		case GL_BLEND:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_BLEND_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_CLIP_PLANE0:
-		case GL_CLIP_PLANE1:
-		case GL_CLIP_PLANE2:
-		case GL_CLIP_PLANE3:
-		case GL_CLIP_PLANE4:
-		case GL_CLIP_PLANE5:
-			if (NOUVEAU_CARD_USING_SHADERS) {
-				nouveauShader *nvs = (nouveauShader *)ctx->VertexProgram._Current;
-				if (nvs)
-					nvs->translated = GL_FALSE;
-			} else {
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CLIP_PLANE_ENABLE(cap-GL_CLIP_PLANE0), 1);
-				OUT_RING_CACHE(state);
-			}
-			break;
-		case GL_COLOR_LOGIC_OP:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_COLOR_MATERIAL:
-//		case GL_COLOR_SUM_EXT:
-//		case GL_COLOR_TABLE:
-//		case GL_CONVOLUTION_1D:
-//		case GL_CONVOLUTION_2D:
-		case GL_CULL_FACE:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DEPTH_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DITHER:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DITHER_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_FOG:
-			if (NOUVEAU_CARD_USING_SHADERS)
-				break;
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_HISTOGRAM:
-//		case GL_INDEX_LOGIC_OP:
-		case GL_LIGHT0:
-		case GL_LIGHT1:
-		case GL_LIGHT2:
-		case GL_LIGHT3:
-		case GL_LIGHT4:
-		case GL_LIGHT5:
-		case GL_LIGHT6:
-		case GL_LIGHT7:
-			{
-			uint32_t mask=0x11<<(2*(cap-GL_LIGHT0));
-
-			if (NOUVEAU_CARD_USING_SHADERS)
-				break;
-
-			nmesa->enabled_lights=((nmesa->enabled_lights&mask)|(mask*state));
-			if (nmesa->lighting_enabled)
-			{
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			}
-			break;
-			}
-		case GL_LIGHTING:
-			if (NOUVEAU_CARD_USING_SHADERS)
-				break;
-
-			nmesa->lighting_enabled=state;
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_ENABLED_LIGHTS, 1);
-			if (nmesa->lighting_enabled)
-				OUT_RING_CACHE(nmesa->enabled_lights);
-			else
-				OUT_RING_CACHE(0x0);
-			break;
-//		case GL_LINE_SMOOTH:
-//		case GL_LINE_STIPPLE:
-//		case GL_MAP1_COLOR_4:
-//		case GL_MAP1_INDEX:
-//		case GL_MAP1_NORMAL:
-//		case GL_MAP1_TEXTURE_COORD_1:
-//		case GL_MAP1_TEXTURE_COORD_2:
-//		case GL_MAP1_TEXTURE_COORD_3:
-//		case GL_MAP1_TEXTURE_COORD_4:
-//		case GL_MAP1_VERTEX_3:
-//		case GL_MAP1_VERTEX_4:
-//		case GL_MAP2_COLOR_4:
-//		case GL_MAP2_INDEX:
-//		case GL_MAP2_NORMAL:
-//		case GL_MAP2_TEXTURE_COORD_1:
-//		case GL_MAP2_TEXTURE_COORD_2:
-//		case GL_MAP2_TEXTURE_COORD_3:
-//		case GL_MAP2_TEXTURE_COORD_4:
-//		case GL_MAP2_VERTEX_3:
-//		case GL_MAP2_VERTEX_4:
-//		case GL_MINMAX:
-		case GL_NORMALIZE:
-			if (nmesa->screen->card->type != NV_44) {
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE, 1);
-				OUT_RING_CACHE(state);
-			}
-			break;
-//		case GL_POINT_SMOOTH:
-		case GL_POLYGON_OFFSET_POINT:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_LINE:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_FILL:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_STIPPLE:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POST_COLOR_MATRIX_COLOR_TABLE:
-//		case GL_POST_CONVOLUTION_COLOR_TABLE:
-//		case GL_RESCALE_NORMAL:
-		case GL_SCISSOR_TEST:
-			/* No enable bit, nv30Scissor will adjust to max range */
-			ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-			      			 ctx->Scissor.Width, ctx->Scissor.Height);
-			break;
-//		case GL_SEPARABLE_2D:
-		case GL_STENCIL_TEST:
-			// TODO BACK and FRONT ?
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_TEXTURE_GEN_Q:
-//		case GL_TEXTURE_GEN_R:
-//		case GL_TEXTURE_GEN_S:
-//		case GL_TEXTURE_GEN_T:
-//		case GL_TEXTURE_1D:
-//		case GL_TEXTURE_2D:
-//		case GL_TEXTURE_3D:
-	}
-}
-
-static void nv30Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-    nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-    if (NOUVEAU_CARD_USING_SHADERS)
-        return;
-
-    switch(pname)
-    {
-    case GL_FOG_MODE:
-    {
-        int mode = 0;
-        /* The modes are different in GL and the card.  */
-        switch(ctx->Fog.Mode)
-        {
-        case GL_LINEAR:
-            mode = 0x804;
-            break;
-        case GL_EXP:
-            mode = 0x802;
-            break;
-        case GL_EXP2:
-            mode = 0x803;
-            break;
-        }
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_MODE, 1);
-	OUT_RING_CACHE (mode);
-	break;
-    }
-    case GL_FOG_COLOR:
-    {
-	GLubyte c[4];
-	UNCLAMPED_FLOAT_TO_RGBA_CHAN(c,params);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_COLOR, 1);
-        /* nvidia ignores the alpha channel */
-	OUT_RING_CACHE(PACK_COLOR_8888_REV(c[0],c[1],c[2],c[3]));
-        break;
-    }
-    case GL_FOG_DENSITY:
-    case GL_FOG_START:
-    case GL_FOG_END:
-    {
-        GLfloat f=0., c=0.;
-        switch(ctx->Fog.Mode)
-        {
-        case GL_LINEAR:
-            f = -1.0/(ctx->Fog.End - ctx->Fog.Start);
-            c = ctx->Fog.Start/(ctx->Fog.End - ctx->Fog.Start) + 2.001953;
-            break;
-        case GL_EXP:
-            f = -0.090168*ctx->Fog.Density;
-            c = 1.5;
-        case GL_EXP2:
-            f = -0.212330*ctx->Fog.Density;
-            c = 1.5;
-        }
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_LINEAR, 1);
-        OUT_RING_CACHE(f);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_CONSTANT, 1);
-        OUT_RING_CACHE(c);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_FOG_EQUATION_QUADRATIC, 1);
-        OUT_RING_CACHE(0); /* Is this always the same? */
-        break;
-    }
-//    case GL_FOG_COORD_SRC:
-    default:
-        break;
-    }
-}
-   
-static void nv30Hint(GLcontext *ctx, GLenum target, GLenum mode)
-{
-	// TODO I need love (fog and line_smooth hints)
-}
-
-// void (*IndexMask)(GLcontext *ctx, GLuint mask);
-
-enum {
-	SPOTLIGHT_NO_UPDATE,
-	SPOTLIGHT_UPDATE_EXPONENT,
-	SPOTLIGHT_UPDATE_DIRECTION,
-	SPOTLIGHT_UPDATE_ALL
-};
-
-static void nv30Lightfv(GLcontext *ctx, GLenum light, GLenum pname, const GLfloat *params )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLint p = light - GL_LIGHT0;
-	struct gl_light *l = &ctx->Light.Light[p];
-	int spotlight_update = SPOTLIGHT_NO_UPDATE;
-
-	if (NOUVEAU_CARD_USING_SHADERS)
-	   return;
-
-	/* not sure where the fourth param value goes...*/
-	switch(pname)
-	{
-		case GL_AMBIENT:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_DIFFUSE:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPECULAR:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_POSITION:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_POSITION_X(p), 3);
-			OUT_RING_CACHEf(params[0]);
-			OUT_RING_CACHEf(params[1]);
-			OUT_RING_CACHEf(params[2]);
-			break;
-		case GL_SPOT_DIRECTION:
-			spotlight_update = SPOTLIGHT_UPDATE_DIRECTION;
-			break;
-		case GL_SPOT_EXPONENT:
-			spotlight_update = SPOTLIGHT_UPDATE_EXPONENT;
-			break;
-		case GL_SPOT_CUTOFF:
-			spotlight_update = SPOTLIGHT_UPDATE_ALL;
-			break;
-		case GL_CONSTANT_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_CONSTANT_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_LINEAR_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_LINEAR_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		case GL_QUADRATIC_ATTENUATION:
-			BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_QUADRATIC_ATTENUATION(p), 1);
-			OUT_RING_CACHEf(*params);
-			break;
-		default:
-			break;
-	}
-
-	switch(spotlight_update) {
-		case SPOTLIGHT_UPDATE_DIRECTION:
-			{
-				GLfloat x,y,z;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_DIR_X(p), 3);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_EXPONENT:
-			{
-				GLfloat cc,lc,qc;
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 3);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-			}
-			break;
-		case SPOTLIGHT_UPDATE_ALL:
-			{
-				GLfloat cc,lc,qc, x,y,z, c;
-				GLfloat spot_light_coef_a = 1.0 / (l->_CosCutoff - 1.0);
-				cc = 1.0;	/* FIXME: These need to be correctly computed */
-				lc = 0.0;
-				qc = 2.0;
-				x = spot_light_coef_a * l->_NormDirection[0];
-				y = spot_light_coef_a * l->_NormDirection[1];
-				z = spot_light_coef_a * l->_NormDirection[2];
-				c = spot_light_coef_a + 1.0;
-				BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LIGHT_SPOT_CUTOFF_A(p), 7);
-				OUT_RING_CACHEf(cc);
-				OUT_RING_CACHEf(lc);
-				OUT_RING_CACHEf(qc);
-				OUT_RING_CACHEf(x);
-				OUT_RING_CACHEf(y);
-				OUT_RING_CACHEf(z);
-				OUT_RING_CACHEf(c);
-			}
-			break;
-		default:
-			break;
-	}
-}
-
-/** Set the lighting model parameters */
-void (*LightModelfv)(GLcontext *ctx, GLenum pname, const GLfloat *params);
-
-
-static void nv30LineStipple(GLcontext *ctx, GLint factor, GLushort pattern )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LINE_STIPPLE_PATTERN, 1);
-	OUT_RING_CACHE((pattern << 16) | factor);
-}
-
-static void nv30LineWidth(GLcontext *ctx, GLfloat width)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte ubWidth;
-
-	ubWidth = (GLubyte)(width * 8.0) & 0xFF;
-
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LINE_WIDTH_SMOOTH, 1);
-	OUT_RING_CACHE(ubWidth);
-}
-
-static void nv30LogicOpcode(GLcontext *ctx, GLenum opcode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_COLOR_LOGIC_OP_OP, 1);
-	OUT_RING_CACHE(opcode);
-}
-
-static void nv30PointParameterfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/*TODO: not sure what goes here. */
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	
-}
-
-/** Specify the diameter of rasterized points */
-static void nv30PointSize(GLcontext *ctx, GLfloat size)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POINT_SIZE, 1);
-	OUT_RING_CACHEf(size);
-}
-
-/** Select a polygon rasterization mode */
-static void nv30PolygonMode(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT, 1);
-		OUT_RING_CACHE(mode);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK, 1);
-		OUT_RING_CACHE(mode);
-	}
-}
-
-/** Set the scale and units used to calculate depth values */
-static void nv30PolygonOffset(GLcontext *ctx, GLfloat factor, GLfloat units)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR, 2);
-        OUT_RING_CACHEf(factor);
-
-        /* Looks like we always multiply units by 2.0... according to the dumps.*/
-        OUT_RING_CACHEf(units * 2.0);
-}
-
-/** Set the polygon stippling pattern */
-static void nv30PolygonStipple(GLcontext *ctx, const GLubyte *mask )
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN(0), 32);
-        OUT_RING_CACHEp(mask, 32);
-}
-
-/* Specifies the current buffer for reading */
-void (*ReadBuffer)( GLcontext *ctx, GLenum buffer );
-/** Set rasterization mode */
-void (*RenderMode)(GLcontext *ctx, GLenum mode );
-
-/* Translate GL coords to window coords, clamping w/h to the
- * dimensions of the window.
- */
-static void nv30WindowCoords(nouveauContextPtr nmesa,
-			     GLuint x, GLuint y, GLuint w, GLuint h,
-			     GLuint *wX, GLuint *wY, GLuint *wW, GLuint *wH)
-{
-	if ((x+w) > nmesa->drawW)
-		w = nmesa->drawW - x;
-	(*wX) = x + nmesa->drawX;
-	(*wW) = w;
-
-	if ((y+h) > nmesa->drawH)
-		h = nmesa->drawH - y;
-	(*wY) = (nmesa->drawH - y) - h + nmesa->drawY;
-	(*wH) = h;
-}
-
-/** Define the scissor box */
-static void nv30Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLuint wX, wY, wW, wH;
-
-	/* There's no scissor enable bit, so adjust the scissor to cover the
-	 * maximum draw buffer bounds
-	 */
-	if (!ctx->Scissor.Enabled) {
-	   wX = nmesa->drawX;
-	   wY = nmesa->drawY;
-	   wW = nmesa->drawW;
-	   wH = nmesa->drawH;
-	} else {
-	   nv30WindowCoords(nmesa, x, y, w, h, &wX, &wY, &wW, &wH);
-	}
-
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SCISSOR_WIDTH_XPOS, 2);
-        OUT_RING_CACHE  ((wW << 16) | wX);
-        OUT_RING_CACHE  ((wH << 16) | wY);
-}
-
-/** Select flat or smooth shading */
-static void nv30ShadeModel(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SHADE_MODEL, 1);
-	OUT_RING_CACHE(mode);
-}
-
-/** OpenGL 2.0 two-sided StencilFunc */
-static void nv30StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func,
-		GLint ref, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_FUNC, 3);
-		OUT_RING_CACHE(func);
-		OUT_RING_CACHE(ref);
-		OUT_RING_CACHE(mask);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_FUNC, 3);
-		OUT_RING_CACHE(func);
-		OUT_RING_CACHE(ref);
-		OUT_RING_CACHE(mask);
-	}
-}
-
-/** OpenGL 2.0 two-sided StencilMask */
-static void nv30StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-}
-
-/** OpenGL 2.0 two-sided StencilOp */
-static void nv30StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail,
-		GLenum zfail, GLenum zpass)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_FAIL, 3);
-		OUT_RING_CACHE(fail);
-		OUT_RING_CACHE(zfail);
-		OUT_RING_CACHE(zpass);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_FAIL, 3);
-		OUT_RING_CACHE(fail);
-		OUT_RING_CACHE(zfail);
-		OUT_RING_CACHE(zpass);
-	}
-}
-
-/** Control the generation of texture coordinates */
-void (*TexGen)(GLcontext *ctx, GLenum coord, GLenum pname,
-		const GLfloat *params);
-/** Set texture environment parameters */
-void (*TexEnv)(GLcontext *ctx, GLenum target, GLenum pname,
-		const GLfloat *param);
-/** Set texture parameters */
-void (*TexParameter)(GLcontext *ctx, GLenum target,
-		struct gl_texture_object *texObj,
-		GLenum pname, const GLfloat *params);
-
-static void nv30TextureMatrix(GLcontext *ctx, GLuint unit, const GLmatrix *mat)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (!NOUVEAU_CARD_USING_SHADERS) {
-		BEGIN_RING_CACHE(NvSub3D,
-				 NV30_TCL_PRIMITIVE_3D_TX_MATRIX(unit, 0), 16);
-		/*XXX: This SHOULD work.*/
-		OUT_RING_CACHEp(mat->m, 16);
-	}
-}
-
-static void nv30WindowMoved(nouveauContextPtr nmesa)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLfloat *v = nmesa->viewport.m;
-	GLuint wX, wY, wW, wH;
-
-	nv30WindowCoords(nmesa, ctx->Viewport.X, ctx->Viewport.Y, 
-				ctx->Viewport.Width, ctx->Viewport.Height,
-				&wX, &wY, &wW, &wH);
-        BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_DIMS_0, 2);
-        OUT_RING_CACHE  ((wW << 16) | wX);
-        OUT_RING_CACHE  ((wH << 16) | wY);
-
-	/* something to do with clears, possibly doesn't belong here */
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_OFS0, 2);
-        OUT_RING_CACHE(((nmesa->drawX + nmesa->drawW) << 16) | nmesa->drawX);
-        OUT_RING_CACHE(((nmesa->drawY + nmesa->drawH) << 16) | nmesa->drawY);
-
-	/* viewport transform */
-	BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_XFRM_OX, 8);
-	OUT_RING_CACHEf (v[MAT_TX]);
-	OUT_RING_CACHEf (v[MAT_TY]);
-	OUT_RING_CACHEf (v[MAT_TZ]);
-	OUT_RING_CACHEf (0.0);
-	OUT_RING_CACHEf (v[MAT_SX]);
-	OUT_RING_CACHEf (v[MAT_SY]);
-	OUT_RING_CACHEf (v[MAT_SZ]);
-	OUT_RING_CACHEf (0.0);
-
-	ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-	      		    ctx->Scissor.Width, ctx->Scissor.Height);
-}
-
-static GLboolean nv30InitCard(nouveauContextPtr nmesa)
-{
-	int i;
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT1, 3);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaTT);
-        OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT8, 1);
-	OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT4, 2);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-        BEGIN_RING_SIZE(NvSub3D, 0x1b0, 1); /* SET_OBJECT8B*/
-        OUT_RING(NvDmaFB);
-
-        for(i = 0x2c8; i <= 0x2fc; i += 4)
-        {
-            BEGIN_RING_SIZE(NvSub3D, i, 1);
-            OUT_RING(0x0);
-        }
-
-	BEGIN_RING_SIZE(NvSub3D, 0x0220, 1);
-	OUT_RING(1);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x03b0, 1);
-	OUT_RING(0x00100000);
-	BEGIN_RING_SIZE(NvSub3D, 0x1454, 1);
-	OUT_RING(0);
-	BEGIN_RING_SIZE(NvSub3D, 0x1d80, 1);
-	OUT_RING(3);
-	
-	/* NEW */
-       	BEGIN_RING_SIZE(NvSub3D, 0x1e98, 1);
-        OUT_RING(0);
-        BEGIN_RING_SIZE(NvSub3D, 0x17e0, 3);
-        OUT_RING(0);
-        OUT_RING(0);
-        OUT_RING(0x3f800000);
-        BEGIN_RING_SIZE(NvSub3D, 0x1f80, 16);
-        OUT_RING(0); OUT_RING(0); OUT_RING(0); OUT_RING(0); 
-        OUT_RING(0); OUT_RING(0); OUT_RING(0); OUT_RING(0); 
-        OUT_RING(0x0000ffff);
-        OUT_RING(0); OUT_RING(0); OUT_RING(0); OUT_RING(0); 
-        OUT_RING(0); OUT_RING(0); OUT_RING(0); 
-/*
-        BEGIN_RING_SIZE(NvSub3D, 0x100, 2);
-        OUT_RING(0);
-        OUT_RING(0);
-*/
-        BEGIN_RING_SIZE(NvSub3D, 0x120, 3);
-        OUT_RING(0);
-        OUT_RING(1);
-        OUT_RING(2);
-
-        BEGIN_RING_SIZE(NvSub3D, 0x1d88, 1);
-        OUT_RING(0x00001200);
-
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_RC_ENABLE, 1);
-	OUT_RING       (0);
-
-	return GL_TRUE;
-}
-
-static GLboolean nv40InitCard(nouveauContextPtr nmesa)
-{
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT1, 2);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT8, 1);
-	OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_OBJECT4, 2);
-	OUT_RING(NvDmaFB);
-	OUT_RING(NvDmaFB);
-	BEGIN_RING_SIZE(NvSub3D, 0x0220, 1);
-	OUT_RING(1);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1ea4, 3);
-	OUT_RING(0x00000010);
-	OUT_RING(0x01000100);
-	OUT_RING(0xff800006);
-	BEGIN_RING_SIZE(NvSub3D, 0x1fc4, 1);
-	OUT_RING(0x06144321);
-	BEGIN_RING_SIZE(NvSub3D, 0x1fc8, 2);
-	OUT_RING(0xedcba987);
-	OUT_RING(0x00000021);
-	BEGIN_RING_SIZE(NvSub3D, 0x1fd0, 1);
-	OUT_RING(0x00171615);
-	BEGIN_RING_SIZE(NvSub3D, 0x1fd4, 1);
-	OUT_RING(0x001b1a19);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1ef8, 1);
-	OUT_RING(0x0020ffff);
-	BEGIN_RING_SIZE(NvSub3D, 0x1d64, 1);
-	OUT_RING(0x00d30000);
-	BEGIN_RING_SIZE(NvSub3D, 0x1e94, 1);
-	OUT_RING(0x00000001);
-
-	return GL_TRUE;
-}
-
-static GLboolean nv30BindBuffers(nouveauContextPtr nmesa, int num_color,
-		nouveau_renderbuffer **color,
-		nouveau_renderbuffer *depth)
-{
-	GLuint x, y, w, h;
-
-	w = color[0]->mesa.Width;
-	h = color[0]->mesa.Height;
-	x = nmesa->drawX;
-	y = nmesa->drawY;
-
-	if (num_color != 1)
-		return GL_FALSE;
-	BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VIEWPORT_COLOR_BUFFER_DIM0, 5);
-	OUT_RING        (((w+x)<<16)|x);
-	OUT_RING        (((h+y)<<16)|y);
-	if (color[0]->mesa._ActualFormat == GL_RGBA8)
-		OUT_RING        (0x148);
-	else
-		OUT_RING        (0x143);
-	if (nmesa->screen->card->type >= NV_40)
-		OUT_RING        (color[0]->pitch);
-	else
-		OUT_RING        (color[0]->pitch | (depth ? (depth->pitch << 16): 0));
-	OUT_RING        (color[0]->offset);
-
-	if (depth) {
-		BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_DEPTH_OFFSET, 1);
-		OUT_RING        (depth->offset);
-		if (nmesa->screen->card->type >= NV_40) {
-			BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_LMA_DEPTH_BUFFER_PITCH, 1);
-			OUT_RING        (depth->pitch);
-		}
-	}
-
-	return GL_TRUE;
-}
-
-void nv30InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	func->AlphaFunc			= nv30AlphaFunc;
-	func->BlendColor		= nv30BlendColor;
-	func->BlendEquationSeparate	= nv30BlendEquationSeparate;
-	func->BlendFuncSeparate		= nv30BlendFuncSeparate;
-	func->Clear			= nv30Clear;
-	func->ClearColor		= nv30ClearColor;
-	func->ClearDepth		= nv30ClearDepth;
-	func->ClearStencil		= nv30ClearStencil;
-	func->ClipPlane			= nv30ClipPlane;
-	func->ColorMask			= nv30ColorMask;
-	func->ColorMaterial		= nv30ColorMaterial;
-	func->CullFace			= nv30CullFace;
-	func->FrontFace			= nv30FrontFace;
-	func->DepthFunc			= nv30DepthFunc;
-	func->DepthMask			= nv30DepthMask;
-	func->DepthRange                = nv30DepthRange;
-	func->Enable			= nv30Enable;
-	func->Fogfv			= nv30Fogfv;
-	func->Hint			= nv30Hint;
-	func->Lightfv			= nv30Lightfv;
-/*	func->LightModelfv		= nv30LightModelfv; */
-	func->LineStipple		= nv30LineStipple;
-	func->LineWidth			= nv30LineWidth;
-	func->LogicOpcode		= nv30LogicOpcode;
-	func->PointParameterfv		= nv30PointParameterfv;
-	func->PointSize			= nv30PointSize;
-	func->PolygonMode		= nv30PolygonMode;
-	func->PolygonOffset		= nv30PolygonOffset;
-	func->PolygonStipple		= nv30PolygonStipple;
-#if 0
-	func->ReadBuffer		= nv30ReadBuffer;
-	func->RenderMode		= nv30RenderMode;
-#endif
-	func->Scissor			= nv30Scissor;
-	func->ShadeModel		= nv30ShadeModel;
-	func->StencilFuncSeparate	= nv30StencilFuncSeparate;
-	func->StencilMaskSeparate	= nv30StencilMaskSeparate;
-	func->StencilOpSeparate		= nv30StencilOpSeparate;
-#if 0
-	func->TexGen			= nv30TexGen;
-	func->TexParameter		= nv30TexParameter;
-#endif
-	func->TextureMatrix		= nv30TextureMatrix;
-
-
-	if (nmesa->screen->card->type >= NV_40)
-	   nmesa->hw_func.InitCard	= nv40InitCard;
-	else 
-	   nmesa->hw_func.InitCard	= nv30InitCard;
-	nmesa->hw_func.BindBuffers	= nv30BindBuffers;
-	nmesa->hw_func.WindowMoved	= nv30WindowMoved;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nv30_vertprog.c b/src/mesa/drivers/dri/nouveau/nv30_vertprog.c
deleted file mode 100644
index d023e8439e3..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv30_vertprog.c
+++ /dev/null
@@ -1,367 +0,0 @@
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-
-#include "nouveau_shader.h"
-#include "nv30_shader.h"
-
-/*****************************************************************************
- * Support routines
- */
-static void
-NV30VPUploadToHW(GLcontext *ctx, nouveauShader *nvs)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   int i;
-
-   /* We can do better here and keep more than one VP on the hardware, and
-    * switch between them with PROGRAM_START_ID..
-    */
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_FROM_ID, 1);
-   OUT_RING(0);
-   for (i=0; i<nvs->program_size; i+=4) {
-      BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_INST0, 4);
-      OUT_RING(nvs->program[i + 0]);
-      OUT_RING(nvs->program[i + 1]);
-      OUT_RING(nvs->program[i + 2]);
-      OUT_RING(nvs->program[i + 3]);
-   }
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_PROGRAM_START_ID, 1);
-   OUT_RING(0);
-
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_IN_REG, 2);
-   OUT_RING(nvs->card_priv.NV30VP.vp_in_reg);
-   OUT_RING(nvs->card_priv.NV30VP.vp_out_reg);
-
-   BEGIN_RING_CACHE(NvSub3D, NV30_TCL_PRIMITIVE_3D_SET_CLIPPING_PLANES, 1);
-   OUT_RING_CACHE  (nvs->card_priv.NV30VP.clip_enables);
-}
-
-static void
-NV30VPUpdateConst(GLcontext *ctx, nouveauShader *nvs, int id)
-{
-   nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-   GLfloat *val;
-
-   val = nvs->params[id].source_val ?
-      nvs->params[id].source_val : nvs->params[id].val;
-
-   BEGIN_RING_SIZE(NvSub3D, NV30_TCL_PRIMITIVE_3D_VP_UPLOAD_CONST_ID, 5);
-   OUT_RING (id);
-   OUT_RINGp(val, 4);
-}
-
-/*****************************************************************************
- * Assembly routines
- */
-static void
-NV30VPSetBranchTarget(nvsFunc *shader, int addr)
-{
-	shader->inst[2] &= ~NV30_VP_INST_IADDR_MASK;
-	shader->inst[2] |= (addr << NV30_VP_INST_IADDR_SHIFT);
-}
-
-/*****************************************************************************
- * Disassembly routines
- */
-static unsigned int
-NV30VPGetOpcodeHW(nvsFunc * shader, int slot)
-{
-   int op;
-
-   if (slot) {
-      op = (shader->inst[1] & NV30_VP_INST_SCA_OPCODEL_MASK)
-	 >> NV30_VP_INST_SCA_OPCODEL_SHIFT;
-      op |= ((shader->inst[0] & NV30_VP_INST_SCA_OPCODEH_MASK)
-	     >> NV30_VP_INST_SCA_OPCODEH_SHIFT) << 4;
-   }
-   else {
-      op = (shader->inst[1] & NV30_VP_INST_VEC_OPCODE_MASK)
-	 >> NV30_VP_INST_VEC_OPCODE_SHIFT;
-   }
-
-   return op;
-}
-
-static nvsRegFile
-NV30VPGetDestFile(nvsFunc * shader, int merged)
-{
-   switch (shader->GetOpcode(shader, merged)) {
-   case NVS_OP_ARL:
-   case NVS_OP_ARR:
-   case NVS_OP_ARA:
-      return NVS_FILE_ADDRESS;
-   default:
-      /*FIXME: This probably isn't correct.. */
-      if ((shader->inst[3] & NV30_VP_INST_VDEST_WRITEMASK_MASK) != 0)
-	 return NVS_FILE_RESULT;
-      if ((shader->inst[3] & NV30_VP_INST_SDEST_WRITEMASK_MASK) != 0)
-	 return NVS_FILE_RESULT;
-      return NVS_FILE_TEMP;
-   }
-}
-
-static unsigned int
-NV30VPGetDestID(nvsFunc * shader, int merged)
-{
-   int id;
-
-   switch (shader->GetDestFile(shader, merged)) {
-   case NVS_FILE_RESULT:
-      id = ((shader->inst[3] & NV30_VP_INST_DEST_ID_MASK)
-	    >> NV30_VP_INST_DEST_ID_SHIFT);
-      switch (id) {
-      case NV30_VP_INST_DEST_POS  : return NVS_FR_POSITION;
-      case NV30_VP_INST_DEST_COL0 : return NVS_FR_COL0;
-      case NV30_VP_INST_DEST_COL1 : return NVS_FR_COL1;
-      case NV30_VP_INST_DEST_TC(0): return NVS_FR_TEXCOORD0;
-      case NV30_VP_INST_DEST_TC(1): return NVS_FR_TEXCOORD1;
-      case NV30_VP_INST_DEST_TC(2): return NVS_FR_TEXCOORD2;
-      case NV30_VP_INST_DEST_TC(3): return NVS_FR_TEXCOORD3;
-      case NV30_VP_INST_DEST_TC(4): return NVS_FR_TEXCOORD4;
-      case NV30_VP_INST_DEST_TC(5): return NVS_FR_TEXCOORD5;
-      case NV30_VP_INST_DEST_TC(6): return NVS_FR_TEXCOORD6;
-      case NV30_VP_INST_DEST_TC(7): return NVS_FR_TEXCOORD7;
-      default:
-	 return -1;
-      }
-   case NVS_FILE_ADDRESS:
-   case NVS_FILE_TEMP:
-      return (shader->inst[0] & NV30_VP_INST_DEST_TEMP_ID_MASK)
-	 >> NV30_VP_INST_DEST_TEMP_ID_SHIFT;
-   default:
-      return -1;
-   }
-}
-
-static unsigned int
-NV30VPGetDestMask(nvsFunc * shader, int merged)
-{
-   int hwmask, mask = 0;
-
-   if (shader->GetDestFile(shader, merged) == NVS_FILE_RESULT)
-      if (shader->GetOpcodeSlot(shader, merged))
-	 hwmask = (shader->inst[3] & NV30_VP_INST_SDEST_WRITEMASK_MASK)
-	    >> NV30_VP_INST_SDEST_WRITEMASK_SHIFT;
-      else
-	 hwmask = (shader->inst[3] & NV30_VP_INST_VDEST_WRITEMASK_MASK)
-	    >> NV30_VP_INST_VDEST_WRITEMASK_SHIFT;
-   else if (shader->GetOpcodeSlot(shader, merged))
-      hwmask = (shader->inst[3] & NV30_VP_INST_STEMP_WRITEMASK_MASK)
-	 >> NV30_VP_INST_STEMP_WRITEMASK_SHIFT;
-   else
-      hwmask = (shader->inst[3] & NV30_VP_INST_VTEMP_WRITEMASK_MASK)
-	 >> NV30_VP_INST_VTEMP_WRITEMASK_SHIFT;
-
-   if (hwmask & (1 << 3)) mask |= SMASK_X;
-   if (hwmask & (1 << 2)) mask |= SMASK_Y;
-   if (hwmask & (1 << 1)) mask |= SMASK_Z;
-   if (hwmask & (1 << 0)) mask |= SMASK_W;
-
-   return mask;
-}
-
-static int
-NV30VPGetSourceID(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_TEMP:
-      src = shader->GetSourceHW(shader, merged, pos);
-      return ((src & NV30_VP_SRC_REG_TEMP_ID_MASK) >>
-	      NV30_VP_SRC_REG_TEMP_ID_SHIFT);
-   case NVS_FILE_CONST:
-      return ((shader->inst[1] & NV30_VP_INST_CONST_SRC_MASK)
-	      >> NV30_VP_INST_CONST_SRC_SHIFT);
-   case NVS_FILE_ATTRIB:
-      src = ((shader->inst[1] & NV30_VP_INST_INPUT_SRC_MASK)
-	     >> NV30_VP_INST_INPUT_SRC_SHIFT);
-      switch (src) {
-      case NV30_VP_INST_IN_POS  : return NVS_FR_POSITION;
-      case NV30_VP_INST_IN_COL0 : return NVS_FR_COL0;
-      case NV30_VP_INST_IN_COL1 : return NVS_FR_COL1;
-      case NV30_VP_INST_IN_TC(0): return NVS_FR_TEXCOORD0;
-      case NV30_VP_INST_IN_TC(1): return NVS_FR_TEXCOORD1;
-      case NV30_VP_INST_IN_TC(2): return NVS_FR_TEXCOORD2;
-      case NV30_VP_INST_IN_TC(3): return NVS_FR_TEXCOORD3;
-      case NV30_VP_INST_IN_TC(4): return NVS_FR_TEXCOORD4;
-      case NV30_VP_INST_IN_TC(5): return NVS_FR_TEXCOORD5;
-      case NV30_VP_INST_IN_TC(6): return NVS_FR_TEXCOORD6;
-      case NV30_VP_INST_IN_TC(7): return NVS_FR_TEXCOORD7;
-      default:
-	 return NVS_FR_UNKNOWN;
-      }
-   default:
-      return -1;
-   }
-}
-
-static int
-NV30VPGetSourceAbs(nvsFunc * shader, int merged, int pos)
-{
-   struct _op_xlat *opr;
-   static unsigned int abspos[3] = {
-      NV30_VP_INST_SRC0_ABS,
-      NV30_VP_INST_SRC1_ABS,
-      NV30_VP_INST_SRC2_ABS,
-   };
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1 || opr->srcpos[pos] > 2)
-      return 0;
-
-   return ((shader->inst[0] & abspos[opr->srcpos[pos]]) ? 1 : 0);
-}
-
-static int
-NV30VPGetRelAddressRegID(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV30_VP_INST_ADDR_REG_SELECT_1) ? 1 : 0);
-}
-
-static nvsSwzComp
-NV30VPGetRelAddressSwizzle(nvsFunc * shader)
-{
-   nvsSwzComp swz;
-
-   swz = NV20VP_TX_SWIZZLE[(shader->inst[0] & NV30_VP_INST_ADDR_SWZ_MASK)
-			   >> NV30_VP_INST_ADDR_SWZ_SHIFT];
-   return swz;
-}
-
-static int
-NV30VPSupportsConditional(nvsFunc * shader)
-{
-   /*FIXME: Is this true of all ops? */
-   return 1;
-}
-
-static int
-NV30VPGetConditionUpdate(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV30_VP_INST_COND_UPDATE_ENABLE) ? 1 : 0);
-}
-
-static int
-NV30VPGetConditionTest(nvsFunc * shader)
-{
-   int op;
-
-   /* The condition test is unconditionally enabled on some
-    * instructions. ie: the condition test bit does *NOT* have
-    * to be set.
-    *
-    * FIXME: check other relevant ops for this situation.
-    */
-   op = shader->GetOpcodeHW(shader, 1);
-   switch (op) {
-   case NV30_VP_INST_OP_BRA:
-      return 1;
-   default:
-      return ((shader->inst[0] & NV30_VP_INST_COND_TEST_ENABLE) ? 1 : 0);
-   }
-}
-
-static nvsCond
-NV30VPGetCondition(nvsFunc * shader)
-{
-   int cond;
-
-   cond = ((shader->inst[0] & NV30_VP_INST_COND_MASK)
-	   >> NV30_VP_INST_COND_SHIFT);
-
-   switch (cond) {
-   case NV30_VP_INST_COND_FL: return NVS_COND_FL;
-   case NV30_VP_INST_COND_LT: return NVS_COND_LT;
-   case NV30_VP_INST_COND_EQ: return NVS_COND_EQ;
-   case NV30_VP_INST_COND_LE: return NVS_COND_LE;
-   case NV30_VP_INST_COND_GT: return NVS_COND_GT;
-   case NV30_VP_INST_COND_NE: return NVS_COND_NE;
-   case NV30_VP_INST_COND_GE: return NVS_COND_GE;
-   case NV30_VP_INST_COND_TR: return NVS_COND_TR;
-   default:
-      return NVS_COND_UNKNOWN;
-   }
-}
-
-static void
-NV30VPGetCondRegSwizzle(nvsFunc * shader, nvsSwzComp *swz)
-{
-   int swzbits;
-
-   swzbits = (shader->inst[0] & NV30_VP_INST_COND_SWZ_ALL_MASK)
-      >> NV30_VP_INST_COND_SWZ_ALL_SHIFT;
-   NV20VPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV30VPGetCondRegID(nvsFunc * shader)
-{
-   return 0;
-}
-
-
-static int
-NV30VPGetBranch(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV30_VP_INST_IADDR_MASK)
-	   >> NV30_VP_INST_IADDR_SHIFT);
-}
-
-void
-NV30VPInitShaderFuncs(nvsFunc * shader)
-{
-   /* Inherit NV20 code, a lot of it is the same */
-   NV20VPInitShaderFuncs(shader);
-
-   /* Increase max valid opcode ID, and add new instructions */
-   NVVP_TX_VOP_COUNT = NVVP_TX_NVS_OP_COUNT = 32;
-
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_FRC, NVS_OP_FRC,  0, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_FLR, NVS_OP_FLR,  0, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SEQ, NVS_OP_SEQ,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SFL, NVS_OP_SFL,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SGT, NVS_OP_SGT,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SLE, NVS_OP_SLE,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SNE, NVS_OP_SNE,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_STR, NVS_OP_STR,  0,  1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_SSG, NVS_OP_SSG,  0, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_ARR, NVS_OP_ARR,  0, -1, -1);
-   MOD_OPCODE(NVVP_TX_VOP, NV30_VP_INST_OP_ARA, NVS_OP_ARA,  3, -1, -1);
-
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_BRA, NVS_OP_BRA, -1, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_CAL, NVS_OP_CAL, -1, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_RET, NVS_OP_RET, -1, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_LG2, NVS_OP_LG2,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_EX2, NVS_OP_EX2,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_SIN, NVS_OP_SIN,  2, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV30_VP_INST_OP_COS, NVS_OP_COS,  2, -1, -1);
-
-   shader->UploadToHW		= NV30VPUploadToHW;
-   shader->UpdateConst		= NV30VPUpdateConst;
-
-   shader->GetOpcodeHW		= NV30VPGetOpcodeHW;
-
-   shader->GetDestFile		= NV30VPGetDestFile;
-   shader->GetDestID		= NV30VPGetDestID;
-   shader->GetDestMask		= NV30VPGetDestMask;
-
-   shader->GetSourceID		= NV30VPGetSourceID;
-   shader->GetSourceAbs		= NV30VPGetSourceAbs;
-
-   shader->GetRelAddressRegID	= NV30VPGetRelAddressRegID;
-   shader->GetRelAddressSwizzle	= NV30VPGetRelAddressSwizzle;
-
-   shader->SupportsConditional	= NV30VPSupportsConditional;
-   shader->GetConditionUpdate	= NV30VPGetConditionUpdate;
-   shader->GetConditionTest	= NV30VPGetConditionTest;
-   shader->GetCondition		= NV30VPGetCondition;
-   shader->GetCondRegSwizzle	= NV30VPGetCondRegSwizzle;
-   shader->GetCondRegID		= NV30VPGetCondRegID;
-
-   shader->GetBranch		= NV30VPGetBranch;
-   shader->SetBranchTarget	= NV30VPSetBranchTarget;
-}
-
diff --git a/src/mesa/drivers/dri/nouveau/nv40_fragprog.c b/src/mesa/drivers/dri/nouveau/nv40_fragprog.c
deleted file mode 100644
index 3e4ae0496e4..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv40_fragprog.c
+++ /dev/null
@@ -1,224 +0,0 @@
-#include "nouveau_shader.h"
-#include "nv40_shader.h"
-
-/* branching ops */
-unsigned int NVFP_TX_BOP_COUNT = 5;
-struct _op_xlat NVFP_TX_BOP[64];
-
-
-/*****************************************************************************
- * Assembly routines
- * 	- These extend the NV30 routines, which are almost identical.  NV40
- * 	  just has branching hacked into the instruction set.
- */
-static int
-NV40FPSupportsResultScale(nvsFunc *shader, nvsScale scale)
-{
-	switch (scale) {
-	case NVS_SCALE_1X:
-	case NVS_SCALE_2X:
-	case NVS_SCALE_4X:
-	case NVS_SCALE_8X:
-	case NVS_SCALE_INV_2X:
-	case NVS_SCALE_INV_4X:
-	case NVS_SCALE_INV_8X:
-		return 1;
-	default:
-		return 0;
-	}
-}
-
-static void
-NV40FPSetResultScale(nvsFunc *shader, nvsScale scale)
-{
-	shader->inst[2] &= ~NV40_FP_OP_DST_SCALE_MASK;
-	shader->inst[2] |= ((unsigned int)scale << NV40_FP_OP_DST_SCALE_SHIFT);
-}
-
-static void
-NV40FPSetBranchTarget(nvsFunc *shader, int addr)
-{
-	shader->inst[2] &= ~NV40_FP_OP_IADDR_MASK;
-	shader->inst[2] |= (addr << NV40_FP_OP_IADDR_SHIFT);
-}
-
-static void
-NV40FPSetBranchElse(nvsFunc *shader, int addr)
-{
-	shader->inst[2] &= ~NV40_FP_OP_ELSE_ID_MASK;
-	shader->inst[2] |= (addr << NV40_FP_OP_ELSE_ID_SHIFT);
-}
-
-static void
-NV40FPSetBranchEnd(nvsFunc *shader, int addr)
-{
-	shader->inst[3] &= ~NV40_FP_OP_END_ID_MASK;
-	shader->inst[3] |= (addr << NV40_FP_OP_END_ID_SHIFT);
-}
-
-static void
-NV40FPSetLoopParams(nvsFunc *shader, int count, int initial, int increment)
-{
-	shader->inst[2] &= ~(NV40_FP_OP_LOOP_COUNT_MASK |
-			     NV40_FP_OP_LOOP_INDEX_MASK |
-			     NV40_FP_OP_LOOP_INCR_MASK);
-	shader->inst[2] |= ((count     << NV40_FP_OP_LOOP_COUNT_SHIFT) |
-			    (initial   << NV40_FP_OP_LOOP_INDEX_SHIFT) |
-			    (increment << NV40_FP_OP_LOOP_INCR_SHIFT));
-}
-
-/*****************************************************************************
- * Disassembly routines
- */
-static struct _op_xlat *
-NV40FPGetOPTXRec(nvsFunc * shader, int merged)
-{
-   struct _op_xlat *opr;
-   int op;
-
-   op = shader->GetOpcodeHW(shader, 0);
-   if (shader->inst[2] & NV40_FP_OP_OPCODE_IS_BRANCH) {
-      opr = NVFP_TX_BOP;
-      op &= ~NV40_FP_OP_OPCODE_IS_BRANCH;
-      if (op > NVFP_TX_BOP_COUNT)
-	 return NULL;
-   }
-   else {
-      opr = NVFP_TX_AOP;
-      if (op > NVFP_TX_AOP_COUNT)
-	 return NULL;
-   }
-
-   if (opr[op].SOP == NVS_OP_UNKNOWN)
-      return NULL;
-   return &opr[op];
-}
-
-static int
-NV40FPGetSourceID(nvsFunc * shader, int merged, int pos)
-{
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_ATTRIB:
-      switch ((shader->inst[0] & NV40_FP_OP_INPUT_SRC_MASK)
-	      >> NV40_FP_OP_INPUT_SRC_SHIFT) {
-      case NV40_FP_OP_INPUT_SRC_POSITION: return NVS_FR_POSITION;
-      case NV40_FP_OP_INPUT_SRC_COL0    : return NVS_FR_COL0;
-      case NV40_FP_OP_INPUT_SRC_COL1    : return NVS_FR_COL1;
-      case NV40_FP_OP_INPUT_SRC_FOGC    : return NVS_FR_FOGCOORD;
-      case NV40_FP_OP_INPUT_SRC_TC(0)   : return NVS_FR_TEXCOORD0;
-      case NV40_FP_OP_INPUT_SRC_TC(1)   : return NVS_FR_TEXCOORD1;
-      case NV40_FP_OP_INPUT_SRC_TC(2)   : return NVS_FR_TEXCOORD2;
-      case NV40_FP_OP_INPUT_SRC_TC(3)   : return NVS_FR_TEXCOORD3;
-      case NV40_FP_OP_INPUT_SRC_TC(4)   : return NVS_FR_TEXCOORD4;
-      case NV40_FP_OP_INPUT_SRC_TC(5)   : return NVS_FR_TEXCOORD5;
-      case NV40_FP_OP_INPUT_SRC_TC(6)   : return NVS_FR_TEXCOORD6;
-      case NV40_FP_OP_INPUT_SRC_TC(7)   : return NVS_FR_TEXCOORD7;
-      case NV40_FP_OP_INPUT_SRC_FACING  : return NVS_FR_FACING;
-      default:
-	 return -1;
-      }
-      break;
-   case NVS_FILE_TEMP:
-      {
-	 unsigned int src;
-
-	 src = shader->GetSourceHW(shader, merged, pos);
-	 return ((src & NV40_FP_REG_SRC_MASK) >> NV40_FP_REG_SRC_SHIFT);
-      }
-   case NVS_FILE_CONST:		/* inlined into fragprog */
-   default:
-      return -1;
-   }
-}
-
-static int
-NV40FPGetBranch(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV40_FP_OP_IADDR_MASK)
-	   >> NV40_FP_OP_IADDR_SHIFT);;
-}
-
-static int
-NV40FPGetBranchElse(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV40_FP_OP_ELSE_ID_MASK)
-	   >> NV40_FP_OP_ELSE_ID_SHIFT);
-}
-
-static int
-NV40FPGetBranchEnd(nvsFunc * shader)
-{
-   return ((shader->inst[3] & NV40_FP_OP_END_ID_MASK)
-	   >> NV40_FP_OP_END_ID_SHIFT);
-}
-
-static int
-NV40FPGetLoopCount(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV40_FP_OP_LOOP_COUNT_MASK)
-	   >> NV40_FP_OP_LOOP_COUNT_SHIFT);
-}
-
-static int
-NV40FPGetLoopInitial(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV40_FP_OP_LOOP_INDEX_MASK)
-	   >> NV40_FP_OP_LOOP_INDEX_SHIFT);
-}
-
-static int
-NV40FPGetLoopIncrement(nvsFunc * shader)
-{
-   return ((shader->inst[2] & NV40_FP_OP_LOOP_INCR_MASK)
-	   >> NV40_FP_OP_LOOP_INCR_SHIFT);
-}
-
-void
-NV40FPInitShaderFuncs(nvsFunc * shader)
-{
-   /* Inherit NV30 FP code, it's mostly the same */
-   NV30FPInitShaderFuncs(shader);
-
-   /* Kill off opcodes seen on NV30, but not seen on NV40 - need to find
-    * out if these actually work or not.
-    *
-    * update: either LIT/RSQ don't work on nv40, or I generate bad code for
-    *         them.  haven't tested the others yet
-    */
-   MOD_OPCODE(NVFP_TX_AOP, 0x1B, NVS_OP_UNKNOWN, -1, -1, -1);	/* NV30 RSQ */
-   MOD_OPCODE(NVFP_TX_AOP, 0x1E, NVS_OP_UNKNOWN, -1, -1, -1);	/* NV30 LIT */
-   MOD_OPCODE(NVFP_TX_AOP, 0x1F, NVS_OP_UNKNOWN, -1, -1, -1);	/* NV30 LRP */
-   MOD_OPCODE(NVFP_TX_AOP, 0x26, NVS_OP_UNKNOWN, -1, -1, -1);	/* NV30 POW */
-   MOD_OPCODE(NVFP_TX_AOP, 0x36, NVS_OP_UNKNOWN, -1, -1, -1);	/* NV30 RFL */
-
-   /* Extra opcodes supported on NV40 */
-   MOD_OPCODE(NVFP_TX_AOP, NV40_FP_OP_OPCODE_DIV     , NVS_OP_DIV ,  0,  1, -1);
-   MOD_OPCODE(NVFP_TX_AOP, NV40_FP_OP_OPCODE_DP2A    , NVS_OP_DP2A,  0,  1,  2);
-   MOD_OPCODE(NVFP_TX_AOP, NV40_FP_OP_OPCODE_TXL     , NVS_OP_TXL ,  0, -1, -1);
-
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_BRK , NVS_OP_BRK , -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_CAL , NVS_OP_CAL , -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_IF  , NVS_OP_IF  , -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_LOOP, NVS_OP_LOOP, -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_REP , NVS_OP_REP , -1, -1, -1);
-   MOD_OPCODE(NVFP_TX_BOP, NV40_FP_OP_BRA_OPCODE_RET , NVS_OP_RET , -1, -1, -1);
-
-   shader->SupportsResultScale	= NV40FPSupportsResultScale;
-   shader->SetResultScale	= NV40FPSetResultScale;
-
-   /* fragment.facing */
-   shader->GetSourceID		= NV40FPGetSourceID;
-
-   /* branching */
-   shader->GetOPTXRec		= NV40FPGetOPTXRec;
-   shader->GetBranch		= NV40FPGetBranch;
-   shader->GetBranchElse	= NV40FPGetBranchElse;
-   shader->GetBranchEnd		= NV40FPGetBranchEnd;
-   shader->GetLoopCount		= NV40FPGetLoopCount;
-   shader->GetLoopInitial	= NV40FPGetLoopInitial;
-   shader->GetLoopIncrement	= NV40FPGetLoopIncrement;
-   shader->SetBranchTarget	= NV40FPSetBranchTarget;
-   shader->SetBranchElse	= NV40FPSetBranchElse;
-   shader->SetBranchEnd		= NV40FPSetBranchEnd;
-   shader->SetLoopParams	= NV40FPSetLoopParams;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv40_shader.h b/src/mesa/drivers/dri/nouveau/nv40_shader.h
deleted file mode 100644
index 584f4c23e08..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv40_shader.h
+++ /dev/null
@@ -1,467 +0,0 @@
-#ifndef __NV40_SHADER_H__
-#define __NV40_SHADER_H__
-
-/* Vertex programs instruction set
- *
- * The NV40 instruction set is very similar to NV30.  Most fields are in
- * a slightly different position in the instruction however.
- *
- * Merged instructions
- *     In some cases it is possible to put two instructions into one opcode
- *     slot.  The rules for when this is OK is not entirely clear to me yet.
- *
- *     There are separate writemasks and dest temp register fields for each
- *     grouping of instructions.  There is however only one field with the
- *     ID of a result register.  Writing to temp/result regs is selected by
- *     setting VEC_RESULT/SCA_RESULT.
- *
- * Temporary registers
- *     The source/dest temp register fields have been extended by 1 bit, to
- *     give a total of 32 temporary registers.
- *
- * Relative Addressing
- *     NV40 can use an address register to index into vertex attribute regs.
- *     This is done by putting the offset value into INPUT_SRC and setting
- *     the INDEX_INPUT flag.
- *
- * Conditional execution (see NV_vertex_program{2,3} for details)
- *     There is a second condition code register on NV40, it's use is enabled
- *     by setting the COND_REG_SELECT_1 flag.
- *
- * Texture lookup
- *     TODO
- */
-
-/* ---- OPCODE BITS 127:96 / data DWORD 0 --- */
-#define NV40_VP_INST_VEC_RESULT                                        (1 << 30)
-/* uncertain.. */
-#define NV40_VP_INST_COND_UPDATE_ENABLE                        ((1 << 14)|1<<29)
-/* use address reg as index into attribs */
-#define NV40_VP_INST_INDEX_INPUT                                       (1 << 27)
-#define NV40_VP_INST_COND_REG_SELECT_1                                 (1 << 25)
-#define NV40_VP_INST_ADDR_REG_SELECT_1                                 (1 << 24)
-#define NV40_VP_INST_SRC2_ABS                                          (1 << 23)
-#define NV40_VP_INST_SRC1_ABS                                          (1 << 22)
-#define NV40_VP_INST_SRC0_ABS                                          (1 << 21)
-#define NV40_VP_INST_VEC_DEST_TEMP_SHIFT                                      15
-#define NV40_VP_INST_VEC_DEST_TEMP_MASK                             (0x1F << 15)
-#define NV40_VP_INST_COND_TEST_ENABLE                                  (1 << 13)
-#define NV40_VP_INST_COND_SHIFT                                               10
-#define NV40_VP_INST_COND_MASK                                       (0x7 << 10)
-#    define NV40_VP_INST_COND_FL                                               0
-#    define NV40_VP_INST_COND_LT                                               1
-#    define NV40_VP_INST_COND_EQ                                               2
-#    define NV40_VP_INST_COND_LE                                               3
-#    define NV40_VP_INST_COND_GT                                               4
-#    define NV40_VP_INST_COND_NE                                               5
-#    define NV40_VP_INST_COND_GE                                               6
-#    define NV40_VP_INST_COND_TR                                               7
-#define NV40_VP_INST_COND_SWZ_X_SHIFT                                          8
-#define NV40_VP_INST_COND_SWZ_X_MASK                                    (3 << 8)
-#define NV40_VP_INST_COND_SWZ_Y_SHIFT                                          6
-#define NV40_VP_INST_COND_SWZ_Y_MASK                                    (3 << 6)
-#define NV40_VP_INST_COND_SWZ_Z_SHIFT                                          4
-#define NV40_VP_INST_COND_SWZ_Z_MASK                                    (3 << 4)
-#define NV40_VP_INST_COND_SWZ_W_SHIFT                                          2
-#define NV40_VP_INST_COND_SWZ_W_MASK                                    (3 << 2)
-#define NV40_VP_INST_COND_SWZ_ALL_SHIFT                                        2
-#define NV40_VP_INST_COND_SWZ_ALL_MASK                               (0xFF << 2)
-#define NV40_VP_INST_ADDR_SWZ_SHIFT                                            0
-#define NV40_VP_INST_ADDR_SWZ_MASK                                   (0x03 << 0)
-#define NV40_VP_INST0_KNOWN ( \
-                NV40_VP_INST_INDEX_INPUT | \
-                NV40_VP_INST_COND_REG_SELECT_1 | \
-                NV40_VP_INST_ADDR_REG_SELECT_1 | \
-                NV40_VP_INST_SRC2_ABS | \
-                NV40_VP_INST_SRC1_ABS | \
-                NV40_VP_INST_SRC0_ABS | \
-                NV40_VP_INST_VEC_DEST_TEMP_MASK | \
-                NV40_VP_INST_COND_TEST_ENABLE | \
-                NV40_VP_INST_COND_MASK | \
-                NV40_VP_INST_COND_SWZ_ALL_MASK | \
-                NV40_VP_INST_ADDR_SWZ_MASK)
-
-/* ---- OPCODE BITS 95:64 / data DWORD 1 --- */
-#define NV40_VP_INST_VEC_OPCODE_SHIFT                                         22
-#define NV40_VP_INST_VEC_OPCODE_MASK                                (0x1F << 22)
-#    define NV40_VP_INST_OP_NOP                                             0x00
-#    define NV40_VP_INST_OP_MOV                                             0x01
-#    define NV40_VP_INST_OP_MUL                                             0x02
-#    define NV40_VP_INST_OP_ADD                                             0x03
-#    define NV40_VP_INST_OP_MAD                                             0x04
-#    define NV40_VP_INST_OP_DP3                                             0x05
-#    define NV40_VP_INST_OP_DP4                                             0x07
-#    define NV40_VP_INST_OP_DPH                                             0x06
-#    define NV40_VP_INST_OP_DST                                             0x08
-#    define NV40_VP_INST_OP_MIN                                             0x09
-#    define NV40_VP_INST_OP_MAX                                             0x0A
-#    define NV40_VP_INST_OP_SLT                                             0x0B
-#    define NV40_VP_INST_OP_SGE                                             0x0C
-#    define NV40_VP_INST_OP_ARL                                             0x0D
-#    define NV40_VP_INST_OP_FRC                                             0x0E
-#    define NV40_VP_INST_OP_FLR                                             0x0F
-#    define NV40_VP_INST_OP_SEQ                                             0x10
-#    define NV40_VP_INST_OP_SFL                                             0x11
-#    define NV40_VP_INST_OP_SGT                                             0x12
-#    define NV40_VP_INST_OP_SLE                                             0x13
-#    define NV40_VP_INST_OP_SNE                                             0x14
-#    define NV40_VP_INST_OP_STR                                             0x15
-#    define NV40_VP_INST_OP_SSG                                             0x16
-#    define NV40_VP_INST_OP_ARR                                             0x17
-#    define NV40_VP_INST_OP_ARA                                             0x18
-#    define NV40_VP_INST_OP_TXWHAT                                          0x19
-#define NV40_VP_INST_SCA_OPCODE_SHIFT                                         27
-#define NV40_VP_INST_SCA_OPCODE_MASK                                (0x1F << 27)
-#    define NV40_VP_INST_OP_RCP                                             0x02
-#    define NV40_VP_INST_OP_RCC                                             0x03
-#    define NV40_VP_INST_OP_RSQ                                             0x04
-#    define NV40_VP_INST_OP_EXP                                             0x05
-#    define NV40_VP_INST_OP_LOG                                             0x06
-#    define NV40_VP_INST_OP_LIT                                             0x07
-#    define NV40_VP_INST_OP_BRA                                             0x09
-#    define NV40_VP_INST_OP_CAL                                             0x0B
-#    define NV40_VP_INST_OP_RET                                             0x0C
-#    define NV40_VP_INST_OP_LG2                                             0x0D
-#    define NV40_VP_INST_OP_EX2                                             0x0E
-#    define NV40_VP_INST_OP_SIN                                             0x0F
-#    define NV40_VP_INST_OP_COS                                             0x10
-#    define NV40_VP_INST_OP_PUSHA                                           0x13
-#    define NV40_VP_INST_OP_POPA                                            0x14
-#define NV40_VP_INST_CONST_SRC_SHIFT                                          12
-#define NV40_VP_INST_CONST_SRC_MASK                                 (0xFF << 12)
-#define NV40_VP_INST_INPUT_SRC_SHIFT                                           8
-#define NV40_VP_INST_INPUT_SRC_MASK                                  (0x0F << 8)
-#    define NV40_VP_INST_IN_POS                                                0
-#    define NV40_VP_INST_IN_WEIGHT                                             1
-#    define NV40_VP_INST_IN_NORMAL                                             2
-#    define NV40_VP_INST_IN_COL0                                               3
-#    define NV40_VP_INST_IN_COL1                                               4
-#    define NV40_VP_INST_IN_FOGC                                               5
-#    define NV40_VP_INST_IN_TC0                                                8
-#    define NV40_VP_INST_IN_TC(n)                                          (8+n)
-#define NV40_VP_INST_SRC0H_SHIFT                                               0
-#define NV40_VP_INST_SRC0H_MASK                                      (0xFF << 0)
-#define NV40_VP_INST1_KNOWN ( \
-                NV40_VP_INST_VEC_OPCODE_MASK | \
-                NV40_VP_INST_SCA_OPCODE_MASK | \
-                NV40_VP_INST_CONST_SRC_MASK  | \
-                NV40_VP_INST_INPUT_SRC_MASK  | \
-                NV40_VP_INST_SRC0H_MASK \
-                )
-
-/* ---- OPCODE BITS 63:32 / data DWORD 2 --- */
-#define NV40_VP_INST_SRC0L_SHIFT                                              23
-#define NV40_VP_INST_SRC0L_MASK                                    (0x1FF << 23)
-#define NV40_VP_INST_SRC1_SHIFT                                                6
-#define NV40_VP_INST_SRC1_MASK                                    (0x1FFFF << 6)
-#define NV40_VP_INST_SRC2H_SHIFT                                               0
-#define NV40_VP_INST_SRC2H_MASK                                      (0x3F << 0)
-#define NV40_VP_INST_IADDRH_SHIFT                                              0
-#define NV40_VP_INST_IADDRH_MASK                                     (0x1F << 0)
-
-/* ---- OPCODE BITS 31:0 / data DWORD 3 --- */
-#define NV40_VP_INST_IADDRL_SHIFT                                             29
-#define NV40_VP_INST_IADDRL_MASK                                       (7 << 29)
-#define NV40_VP_INST_SRC2L_SHIFT                                              21
-#define NV40_VP_INST_SRC2L_MASK                                    (0x7FF << 21)
-#define NV40_VP_INST_SCA_WRITEMASK_SHIFT                                      17
-#define NV40_VP_INST_SCA_WRITEMASK_MASK                              (0xF << 17)
-#    define NV40_VP_INST_SCA_WRITEMASK_X                               (1 << 20)
-#    define NV40_VP_INST_SCA_WRITEMASK_Y                               (1 << 19)
-#    define NV40_VP_INST_SCA_WRITEMASK_Z                               (1 << 18)
-#    define NV40_VP_INST_SCA_WRITEMASK_W                               (1 << 17)
-#define NV40_VP_INST_VEC_WRITEMASK_SHIFT                                      13
-#define NV40_VP_INST_VEC_WRITEMASK_MASK                              (0xF << 13)
-#    define NV40_VP_INST_VEC_WRITEMASK_X                               (1 << 16)
-#    define NV40_VP_INST_VEC_WRITEMASK_Y                               (1 << 15)
-#    define NV40_VP_INST_VEC_WRITEMASK_Z                               (1 << 14)
-#    define NV40_VP_INST_VEC_WRITEMASK_W                               (1 << 13)
-#define NV40_VP_INST_SCA_RESULT                                        (1 << 12)
-#define NV40_VP_INST_SCA_DEST_TEMP_SHIFT                                       7
-#define NV40_VP_INST_SCA_DEST_TEMP_MASK                              (0x1F << 7)
-#define NV40_VP_INST_DEST_SHIFT                                                2
-#define NV40_VP_INST_DEST_MASK                                         (31 << 2)
-#    define NV40_VP_INST_DEST_POS                                              0
-#    define NV40_VP_INST_DEST_COL0                                             1
-#    define NV40_VP_INST_DEST_COL1                                             2
-#    define NV40_VP_INST_DEST_BFC0                                             3
-#    define NV40_VP_INST_DEST_BFC1                                             4
-#    define NV40_VP_INST_DEST_FOGC                                             5
-#    define NV40_VP_INST_DEST_PSZ                                              6
-#    define NV40_VP_INST_DEST_TC0                                              7
-#    define NV40_VP_INST_DEST_TC(n)                                        (7+n)
-#    define NV40_VP_INST_DEST_TEMP                                          0x1F
-#define NV40_VP_INST_INDEX_CONST                                        (1 << 1)
-#define NV40_VP_INST_LAST                                               (1 << 0)
-#define NV40_VP_INST3_KNOWN ( \
-                NV40_VP_INST_SRC2L_MASK |\
-                NV40_VP_INST_SCA_WRITEMASK_MASK |\
-                NV40_VP_INST_VEC_WRITEMASK_MASK |\
-                NV40_VP_INST_SCA_DEST_TEMP_MASK |\
-                NV40_VP_INST_DEST_MASK |\
-                NV40_VP_INST_INDEX_CONST)
-
-/* Useful to split the source selection regs into their pieces */
-#define NV40_VP_SRC0_HIGH_SHIFT                                                9
-#define NV40_VP_SRC0_HIGH_MASK                                        0x0001FE00
-#define NV40_VP_SRC0_LOW_MASK                                         0x000001FF
-#define NV40_VP_SRC2_HIGH_SHIFT                                               11
-#define NV40_VP_SRC2_HIGH_MASK                                        0x0001F800
-#define NV40_VP_SRC2_LOW_MASK                                         0x000007FF
-
-/* Source selection - these are the bits you fill NV40_VP_INST_SRCn with */
-#define NV40_VP_SRC_NEGATE                                             (1 << 16)
-#define NV40_VP_SRC_SWZ_X_SHIFT                                               14
-#define NV40_VP_SRC_SWZ_X_MASK                                         (3 << 14)
-#define NV40_VP_SRC_SWZ_Y_SHIFT                                               12
-#define NV40_VP_SRC_SWZ_Y_MASK                                         (3 << 12)
-#define NV40_VP_SRC_SWZ_Z_SHIFT                                               10
-#define NV40_VP_SRC_SWZ_Z_MASK                                         (3 << 10)
-#define NV40_VP_SRC_SWZ_W_SHIFT                                                8
-#define NV40_VP_SRC_SWZ_W_MASK                                          (3 << 8)
-#define NV40_VP_SRC_SWZ_ALL_SHIFT                                              8
-#define NV40_VP_SRC_SWZ_ALL_MASK                                     (0xFF << 8)
-#define NV40_VP_SRC_TEMP_SRC_SHIFT                                             2
-#define NV40_VP_SRC_TEMP_SRC_MASK                                    (0x1F << 2)
-#define NV40_VP_SRC_REG_TYPE_SHIFT                                             0
-#define NV40_VP_SRC_REG_TYPE_MASK                                       (3 << 0)
-#    define NV40_VP_SRC_REG_TYPE_UNK0                                          0
-#    define NV40_VP_SRC_REG_TYPE_TEMP                                          1
-#    define NV40_VP_SRC_REG_TYPE_INPUT                                         2
-#    define NV40_VP_SRC_REG_TYPE_CONST                                         3
-
-
-/*
- * Each fragment program opcode appears to be comprised of 4 32-bit values.
- *
- *         0 - Opcode, output reg/mask, ATTRIB source
- *         1 - Source 0
- *         2 - Source 1
- *         3 - Source 2
- *
- * There appears to be no special difference between result regs and temp regs.
- *                 result.color == R0.xyzw
- *                 result.depth == R1.z
- * When the fragprog contains instructions to write depth,
- * NV30_TCL_PRIMITIVE_3D_UNK1D78=0 otherwise it is set to 1.
- *
- * Constants are inserted directly after the instruction that uses them.
- * 
- * It appears that it's not possible to use two input registers in one
- * instruction as the input sourcing is done in the instruction dword
- * and not the source selection dwords.  As such instructions such as:
- * 
- *                 ADD result.color, fragment.color, fragment.texcoord[0];
- *
- * must be split into two MOV's and then an ADD (nvidia does this) but
- * I'm not sure why it's not just one MOV and then source the second input
- * in the ADD instruction..
- *
- * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary
- * negation requires multiplication with a const.
- *
- * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO and
- * SWIZZLE_ONE.
- *
- * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as
- * SWIZZLE_ZERO is implemented simply by not writing to the relevant components
- * of the destination.
- *
- * Looping
- *   Loops appear to be fairly expensive on NV40 at least, the proprietary
- *   driver goes to a lot of effort to avoid using the native looping
- *   instructions.  If the total number of *executed* instructions between
- *   REP/ENDREP or LOOP/ENDLOOP is <=500, the driver will unroll the loop.
- *   The maximum loop count is 255.
- *
- * Conditional execution
- *   TODO
- * 
- * Non-native instructions:
- *         LIT
- *         LRP - MAD+MAD
- *         SUB - ADD, negate second source
- *         RSQ - LG2 + EX2
- *         POW - LG2 + MUL + EX2
- *         SCS - COS + SIN
- *         XPD
- *         DP2 - MUL + ADD
- *         NRM
- */
-
-//== Opcode / Destination selection ==
-#define NV40_FP_OP_PROGRAM_END                                          (1 << 0)
-#define NV40_FP_OP_OUT_REG_SHIFT                                               1
-#define NV40_FP_OP_OUT_REG_MASK                                        (31 << 1)
-/* Needs to be set when writing outputs to get expected result.. */
-#define NV40_FP_OP_UNK0_7                                               (1 << 7)
-#define NV40_FP_OP_COND_WRITE_ENABLE                                    (1 << 8)
-#define NV40_FP_OP_OUTMASK_SHIFT                                               9
-#define NV40_FP_OP_OUTMASK_MASK                                       (0xF << 9)
-#    define NV40_FP_OP_OUT_X                                            (1 << 9)
-#    define NV40_FP_OP_OUT_Y                                            (1 <<10)
-#    define NV40_FP_OP_OUT_Z                                            (1 <<11)
-#    define NV40_FP_OP_OUT_W                                            (1 <<12)
-/* Uncertain about these, especially the input_src values.. it's possible that
- * they can be dynamically changed.
- */
-#define NV40_FP_OP_INPUT_SRC_SHIFT                                            13
-#define NV40_FP_OP_INPUT_SRC_MASK                                     (15 << 13)
-#    define NV40_FP_OP_INPUT_SRC_POSITION                                    0x0
-#    define NV40_FP_OP_INPUT_SRC_COL0                                        0x1
-#    define NV40_FP_OP_INPUT_SRC_COL1                                        0x2
-#    define NV40_FP_OP_INPUT_SRC_FOGC                                        0x3
-#    define NV40_FP_OP_INPUT_SRC_TC0                                         0x4
-#    define NV40_FP_OP_INPUT_SRC_TC(n)                                 (0x4 + n)
-#    define NV40_FP_OP_INPUT_SRC_FACING                                      0xE
-#define NV40_FP_OP_TEX_UNIT_SHIFT                                             17
-#define NV40_FP_OP_TEX_UNIT_MASK                                     (0xF << 17)
-#define NV40_FP_OP_PRECISION_SHIFT                                            22
-#define NV40_FP_OP_PRECISION_MASK                                      (3 << 22)
-#   define NV40_FP_PRECISION_FP32                                              0
-#   define NV40_FP_PRECISION_FP16                                              1
-#   define NV40_FP_PRECISION_FX12                                              2
-#define NV40_FP_OP_OPCODE_SHIFT                                               24
-#define NV40_FP_OP_OPCODE_MASK                                      (0x3F << 24)
-#        define NV40_FP_OP_OPCODE_NOP                                       0x00
-#        define NV40_FP_OP_OPCODE_MOV                                       0x01
-#        define NV40_FP_OP_OPCODE_MUL                                       0x02
-#        define NV40_FP_OP_OPCODE_ADD                                       0x03
-#        define NV40_FP_OP_OPCODE_MAD                                       0x04
-#        define NV40_FP_OP_OPCODE_DP3                                       0x05
-#        define NV40_FP_OP_OPCODE_DP4                                       0x06
-#        define NV40_FP_OP_OPCODE_DST                                       0x07
-#        define NV40_FP_OP_OPCODE_MIN                                       0x08
-#        define NV40_FP_OP_OPCODE_MAX                                       0x09
-#        define NV40_FP_OP_OPCODE_SLT                                       0x0A
-#        define NV40_FP_OP_OPCODE_SGE                                       0x0B
-#        define NV40_FP_OP_OPCODE_SLE                                       0x0C
-#        define NV40_FP_OP_OPCODE_SGT                                       0x0D
-#        define NV40_FP_OP_OPCODE_SNE                                       0x0E
-#        define NV40_FP_OP_OPCODE_SEQ                                       0x0F
-#        define NV40_FP_OP_OPCODE_FRC                                       0x10
-#        define NV40_FP_OP_OPCODE_FLR                                       0x11
-#        define NV40_FP_OP_OPCODE_KIL                                       0x12
-#        define NV40_FP_OP_OPCODE_PK4B                                      0x13
-#        define NV40_FP_OP_OPCODE_UP4B                                      0x14
-/* DDX/DDY can only write to XY */
-#        define NV40_FP_OP_OPCODE_DDX                                       0x15
-#        define NV40_FP_OP_OPCODE_DDY                                       0x16
-#        define NV40_FP_OP_OPCODE_TEX                                       0x17
-#        define NV40_FP_OP_OPCODE_TXP                                       0x18
-#        define NV40_FP_OP_OPCODE_TXD                                       0x19
-#        define NV40_FP_OP_OPCODE_RCP                                       0x1A
-#        define NV40_FP_OP_OPCODE_EX2                                       0x1C
-#        define NV40_FP_OP_OPCODE_LG2                                       0x1D
-#        define NV40_FP_OP_OPCODE_COS                                       0x22
-#        define NV40_FP_OP_OPCODE_SIN                                       0x23
-#        define NV40_FP_OP_OPCODE_PK2H                                      0x24
-#        define NV40_FP_OP_OPCODE_UP2H                                      0x25
-#        define NV40_FP_OP_OPCODE_PK4UB                                     0x27
-#        define NV40_FP_OP_OPCODE_UP4UB                                     0x28
-#        define NV40_FP_OP_OPCODE_PK2US                                     0x29
-#        define NV40_FP_OP_OPCODE_UP2US                                     0x2A
-#        define NV40_FP_OP_OPCODE_DP2A                                      0x2E
-#        define NV40_FP_OP_OPCODE_TXL                                       0x2F
-#        define NV40_FP_OP_OPCODE_TXB                                       0x31
-#        define NV40_FP_OP_OPCODE_DIV                                       0x3A
-/* The use of these instructions appears to be indicated by bit 31 of DWORD 2.*/
-#        define NV40_FP_OP_BRA_OPCODE_BRK                                    0x0
-#        define NV40_FP_OP_BRA_OPCODE_CAL                                    0x1
-#        define NV40_FP_OP_BRA_OPCODE_IF                                     0x2
-#        define NV40_FP_OP_BRA_OPCODE_LOOP                                   0x3
-#        define NV40_FP_OP_BRA_OPCODE_REP                                    0x4
-#        define NV40_FP_OP_BRA_OPCODE_RET                                    0x5
-#define NV40_FP_OP_OUT_SAT                                             (1 << 31)
-
-/* high order bits of SRC0 */
-#define NV40_FP_OP_OUT_ABS                                             (1 << 29)
-#define NV40_FP_OP_COND_SWZ_W_SHIFT                                           27
-#define NV40_FP_OP_COND_SWZ_W_MASK                                     (3 << 27)
-#define NV40_FP_OP_COND_SWZ_Z_SHIFT                                           25
-#define NV40_FP_OP_COND_SWZ_Z_MASK                                     (3 << 25)
-#define NV40_FP_OP_COND_SWZ_Y_SHIFT                                           23
-#define NV40_FP_OP_COND_SWZ_Y_MASK                                     (3 << 23)
-#define NV40_FP_OP_COND_SWZ_X_SHIFT                                           21
-#define NV40_FP_OP_COND_SWZ_X_MASK                                     (3 << 21)
-#define NV40_FP_OP_COND_SWZ_ALL_SHIFT                                         21
-#define NV40_FP_OP_COND_SWZ_ALL_MASK                                (0xFF << 21)
-#define NV40_FP_OP_COND_SHIFT                                                 18
-#define NV40_FP_OP_COND_MASK                                        (0x07 << 18)
-#        define NV40_FP_OP_COND_FL                                             0
-#        define NV40_FP_OP_COND_LT                                             1
-#        define NV40_FP_OP_COND_EQ                                             2
-#        define NV40_FP_OP_COND_LE                                             3
-#        define NV40_FP_OP_COND_GT                                             4
-#        define NV40_FP_OP_COND_NE                                             5
-#        define NV40_FP_OP_COND_GE                                             6
-#        define NV40_FP_OP_COND_TR                                             7
-
-/* high order bits of SRC1 */
-#define NV40_FP_OP_OPCODE_IS_BRANCH                                      (1<<31)
-#define NV40_FP_OP_DST_SCALE_SHIFT                                            28
-#define NV40_FP_OP_DST_SCALE_MASK                                      (3 << 28)
-
-/* SRC1 LOOP */
-#define NV40_FP_OP_LOOP_INCR_SHIFT                                            19
-#define NV40_FP_OP_LOOP_INCR_MASK                                   (0xFF << 19)
-#define NV40_FP_OP_LOOP_INDEX_SHIFT                                           10
-#define NV40_FP_OP_LOOP_INDEX_MASK                                  (0xFF << 10)
-#define NV40_FP_OP_LOOP_COUNT_SHIFT                                            2
-#define NV40_FP_OP_LOOP_COUNT_MASK                                   (0xFF << 2)
-
-/* SRC1 IF */
-#define NV40_FP_OP_ELSE_ID_SHIFT                                               2
-#define NV40_FP_OP_ELSE_ID_MASK                                      (0xFF << 2)
-
-/* SRC1 CAL */
-#define NV40_FP_OP_IADDR_SHIFT                                                 2
-#define NV40_FP_OP_IADDR_MASK                                        (0xFF << 2)
-
-/* SRC1 REP
- *   I have no idea why there are 3 count values here..  but they
- *   have always been filled with the same value in my tests so
- *   far..
- */
-#define NV40_FP_OP_REP_COUNT1_SHIFT                                            2
-#define NV40_FP_OP_REP_COUNT1_MASK                                   (0xFF << 2)
-#define NV40_FP_OP_REP_COUNT2_SHIFT                                           10
-#define NV40_FP_OP_REP_COUNT2_MASK                                  (0xFF << 10)
-#define NV40_FP_OP_REP_COUNT3_SHIFT                                           19
-#define NV40_FP_OP_REP_COUNT3_MASK                                  (0xFF << 19)
-
-/* SRC2 REP/IF */
-#define NV40_FP_OP_END_ID_SHIFT                                                2
-#define NV40_FP_OP_END_ID_MASK                                       (0xFF << 2)
-
-// SRC2 high-order
-#define NV40_FP_OP_INDEX_INPUT                                         (1 << 30)
-#define NV40_FP_OP_ADDR_INDEX_SHIFT                                           19
-#define NV40_FP_OP_ADDR_INDEX_MASK                                   (0xF << 19)
-
-//== Register selection ==
-#define NV40_FP_REG_TYPE_SHIFT                                                 0
-#define NV40_FP_REG_TYPE_MASK                                           (3 << 0)
-#        define NV40_FP_REG_TYPE_TEMP                                          0
-#        define NV40_FP_REG_TYPE_INPUT                                         1
-#        define NV40_FP_REG_TYPE_CONST                                         2
-#define NV40_FP_REG_SRC_SHIFT                                                  2
-#define NV40_FP_REG_SRC_MASK                                           (31 << 2)
-#define NV40_FP_REG_UNK_0                                               (1 << 8)
-#define NV40_FP_REG_SWZ_ALL_SHIFT                                              9
-#define NV40_FP_REG_SWZ_ALL_MASK                                      (255 << 9)
-#define NV40_FP_REG_SWZ_X_SHIFT                                                9
-#define NV40_FP_REG_SWZ_X_MASK                                          (3 << 9)
-#define NV40_FP_REG_SWZ_Y_SHIFT                                               11
-#define NV40_FP_REG_SWZ_Y_MASK                                         (3 << 11)
-#define NV40_FP_REG_SWZ_Z_SHIFT                                               13
-#define NV40_FP_REG_SWZ_Z_MASK                                         (3 << 13)
-#define NV40_FP_REG_SWZ_W_SHIFT                                               15
-#define NV40_FP_REG_SWZ_W_MASK                                         (3 << 15)
-#        define NV40_FP_SWIZZLE_X                                              0
-#        define NV40_FP_SWIZZLE_Y                                              1
-#        define NV40_FP_SWIZZLE_Z                                              2
-#        define NV40_FP_SWIZZLE_W                                              3
-#define NV40_FP_REG_NEGATE                                             (1 << 17)
-
-#endif
diff --git a/src/mesa/drivers/dri/nouveau/nv40_vertprog.c b/src/mesa/drivers/dri/nouveau/nv40_vertprog.c
deleted file mode 100644
index d054140bcd0..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv40_vertprog.c
+++ /dev/null
@@ -1,778 +0,0 @@
-#include "nouveau_shader.h"
-#include "nouveau_msg.h"
-#include "nv40_shader.h"
-
-/*****************************************************************************
- * Assembly routines
- */
-static int
-NV40VPSupportsOpcode(nvsFunc * shader, nvsOpcode op)
-{
-   if (shader->GetOPTXFromSOP(op, NULL))
-      return 1;
-   return 0;
-}
-
-static void
-NV40VPSetOpcode(nvsFunc *shader, unsigned int opcode, int slot)
-{
-   if (slot) {
-      shader->inst[1] &= ~NV40_VP_INST_SCA_OPCODE_MASK;
-      shader->inst[1] |= (opcode << NV40_VP_INST_SCA_OPCODE_SHIFT);
-   } else {
-      shader->inst[1] &= ~NV40_VP_INST_VEC_OPCODE_MASK;
-      shader->inst[1] |= (opcode << NV40_VP_INST_VEC_OPCODE_SHIFT);
-   }
-}
-
-static void
-NV40VPSetCCUpdate(nvsFunc *shader)
-{
-   shader->inst[0] |= NV40_VP_INST_COND_UPDATE_ENABLE;
-}
-
-static void
-NV40VPSetCondition(nvsFunc *shader, int on, nvsCond cond, int reg,
-      		   nvsSwzComp *swizzle)
-{
-   unsigned int hwcond;
-
-   if (on ) shader->inst[0] |= NV40_VP_INST_COND_TEST_ENABLE;
-   else     shader->inst[0] &= ~NV40_VP_INST_COND_TEST_ENABLE;
-   if (reg) shader->inst[0] |= NV40_VP_INST_COND_REG_SELECT_1;
-   else     shader->inst[0] &= ~NV40_VP_INST_COND_REG_SELECT_1;
-
-   switch (cond) {
-   case NVS_COND_TR: hwcond = NV40_VP_INST_COND_TR; break;
-   case NVS_COND_FL: hwcond = NV40_VP_INST_COND_FL; break;
-   case NVS_COND_LT: hwcond = NV40_VP_INST_COND_LT; break;
-   case NVS_COND_GT: hwcond = NV40_VP_INST_COND_GT; break;
-   case NVS_COND_NE: hwcond = NV40_VP_INST_COND_NE; break;
-   case NVS_COND_EQ: hwcond = NV40_VP_INST_COND_EQ; break;
-   case NVS_COND_GE: hwcond = NV40_VP_INST_COND_GE; break;
-   case NVS_COND_LE: hwcond = NV40_VP_INST_COND_LE; break;
-   default:
-	WARN_ONCE("unknown vp cond %d\n", cond);
-	hwcond = NV40_VP_INST_COND_TR;
-	break;
-   }
-   shader->inst[0] &= ~NV40_VP_INST_COND_MASK;
-   shader->inst[0] |= (hwcond << NV40_VP_INST_COND_SHIFT);
-
-   shader->inst[0] &= ~NV40_VP_INST_COND_SWZ_ALL_MASK;
-   shader->inst[0] |= (swizzle[NVS_SWZ_X] << NV40_VP_INST_COND_SWZ_X_SHIFT);
-   shader->inst[0] |= (swizzle[NVS_SWZ_Y] << NV40_VP_INST_COND_SWZ_Y_SHIFT);
-   shader->inst[0] |= (swizzle[NVS_SWZ_Z] << NV40_VP_INST_COND_SWZ_Z_SHIFT);
-   shader->inst[0] |= (swizzle[NVS_SWZ_W] << NV40_VP_INST_COND_SWZ_W_SHIFT);
-}
-
-/* these just exist here until nouveau_reg.h has them. */
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_COL0	(1<<0)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_COL1	(1<<1)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_BFC0	(1<<2)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_BFC1	(1<<3)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_FOGC	(1<<4)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_PSZ	(1<<5)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP0	(1<<6)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP1	(1<<7)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP2	(1<<8)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP3	(1<<9)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP4	(1<<10)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP5	(1<<11)
-#define NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_TEX0   (1<<14)
-
-static unsigned int
-NV40VPTranslateResultReg(nvsFunc *shader, nvsFixedReg result,
-					  unsigned int *mask_ret)
-{
-	unsigned int *out_reg = &shader->card_priv->NV30VP.vp_out_reg;
-	unsigned int *clip_en = &shader->card_priv->NV30VP.clip_enables;
-
-	*mask_ret = 0xf;
-
-	switch (result) {
-	case NVS_FR_POSITION:
-		/* out_reg POS implied */
-		return NV40_VP_INST_DEST_POS;
-	case NVS_FR_COL0:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_COL0;
-		return NV40_VP_INST_DEST_COL0;
-	case NVS_FR_COL1:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_COL1;
-		return NV40_VP_INST_DEST_COL1;
-	case NVS_FR_BFC0:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_BFC0;
-		return NV40_VP_INST_DEST_BFC0;
-	case NVS_FR_BFC1:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_BFC1;
-		return NV40_VP_INST_DEST_BFC1;
-	case NVS_FR_FOGCOORD:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_FOGC;
-		*mask_ret = 0x8;
-		return NV40_VP_INST_DEST_FOGC;
-	case NVS_FR_CLIP0:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP0;
-		(*clip_en) |= 0x00000002;
-		*mask_ret = 0x4;
-		return NV40_VP_INST_DEST_FOGC;
-	case NVS_FR_CLIP1:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP1;
-		(*clip_en) |= 0x00000020;
-		*mask_ret = 0x2;
-		return NV40_VP_INST_DEST_FOGC;
-	case NVS_FR_CLIP2:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP2;
-		(*clip_en) |= 0x00000200;
-		*mask_ret = 0x1;
-		return NV40_VP_INST_DEST_FOGC;
-	case NVS_FR_POINTSZ:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_PSZ;
-		*mask_ret = 0x8;
-		return NV40_VP_INST_DEST_PSZ;
-	case NVS_FR_CLIP3:
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP3;
-		(*clip_en) |= 0x00002000;
-		*mask_ret = 0x4;
-		return NV40_VP_INST_DEST_PSZ;
-	case NVS_FR_CLIP4:
-		(*clip_en) |= 0x00020000;
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP4;
-		*mask_ret = 0x2;
-		return NV40_VP_INST_DEST_PSZ;
-	case NVS_FR_CLIP5:
-		(*clip_en) |= 0x00200000;
-		(*out_reg) |= NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_CLP5;
-		*mask_ret = 0x1;
-		return NV40_VP_INST_DEST_PSZ;
-	case NVS_FR_TEXCOORD0:
-	case NVS_FR_TEXCOORD1:
-	case NVS_FR_TEXCOORD2:
-	case NVS_FR_TEXCOORD3:
-	case NVS_FR_TEXCOORD4:
-	case NVS_FR_TEXCOORD5:
-	case NVS_FR_TEXCOORD6:
-	case NVS_FR_TEXCOORD7:
-	{
-		int unit = result - NVS_FR_TEXCOORD0;
-		(*out_reg) |= (NV30_TCL_PRIMITIVE_3D_VP_OUT_REG_TEX0 << unit);
-		return NV40_VP_INST_DEST_TC(unit);
-	}
-	default:
-		WARN_ONCE("unknown vp output %d\n", result);
-		return NV40_VP_INST_DEST_POS;
-	}
-}
-
-static void
-NV40VPSetResult(nvsFunc *shader, nvsRegister * dest, unsigned int mask,
-      		int slot)
-{
-   unsigned int hwmask = 0;
-
-   if (mask & SMASK_X) hwmask |= (1 << 3);
-   if (mask & SMASK_Y) hwmask |= (1 << 2);
-   if (mask & SMASK_Z) hwmask |= (1 << 1);
-   if (mask & SMASK_W) hwmask |= (1 << 0);
-
-   if (dest->file == NVS_FILE_RESULT) {
-      unsigned int valid_mask;
-      int hwidx;
-
-      hwidx = NV40VPTranslateResultReg(shader, dest->index, &valid_mask);
-      if (hwmask & ~valid_mask)
-	      WARN_ONCE("writing invalid components of result reg\n");
-      hwmask &= valid_mask;
-
-      shader->inst[3] &= ~NV40_VP_INST_DEST_MASK;
-      shader->inst[3] |= (hwidx << NV40_VP_INST_DEST_SHIFT);
-
-      if (slot) shader->inst[3] |= NV40_VP_INST_SCA_RESULT;
-      else      shader->inst[0] |= NV40_VP_INST_VEC_RESULT;
-   } else {
-      /* NVS_FILE_TEMP || NVS_FILE_ADDRESS */
-      if (slot) {
-	 shader->inst[3] &= ~NV40_VP_INST_SCA_RESULT;
-	 shader->inst[3] &= ~NV40_VP_INST_SCA_DEST_TEMP_MASK;
-	 shader->inst[3] |= (dest->index << NV40_VP_INST_SCA_DEST_TEMP_SHIFT);
-      } else {
-	 shader->inst[0] &= ~NV40_VP_INST_VEC_RESULT;
-	 shader->inst[0] &= ~(NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20));
-	 shader->inst[0] |= (dest->index << NV40_VP_INST_VEC_DEST_TEMP_SHIFT);
-      }
-   }
-
-   if (slot) {
-      shader->inst[3] &= ~NV40_VP_INST_SCA_WRITEMASK_MASK;
-      shader->inst[3] |= (hwmask << NV40_VP_INST_SCA_WRITEMASK_SHIFT);
-   } else {
-      shader->inst[3] &= ~NV40_VP_INST_VEC_WRITEMASK_MASK;
-      shader->inst[3] |= (hwmask << NV40_VP_INST_VEC_WRITEMASK_SHIFT);
-   }
-}
-
-static void
-NV40VPInsertSource(nvsFunc *shader, unsigned int hw, int pos)
-{
-   switch (pos) {
-   case 0:
-      shader->inst[1] &= ~NV40_VP_INST_SRC0H_MASK;
-      shader->inst[2] &= ~NV40_VP_INST_SRC0L_MASK;
-      shader->inst[1] |= ((hw & NV40_VP_SRC0_HIGH_MASK) >>
-	    NV40_VP_SRC0_HIGH_SHIFT)
-	 << NV40_VP_INST_SRC0H_SHIFT;
-      shader->inst[2] |= (hw & NV40_VP_SRC0_LOW_MASK)
-	 << NV40_VP_INST_SRC0L_SHIFT;
-      break;
-   case 1:
-      shader->inst[2] &= ~NV40_VP_INST_SRC1_MASK;
-      shader->inst[2] |= hw
-	 << NV40_VP_INST_SRC1_SHIFT;
-      break;
-   case 2:
-      shader->inst[2] &= ~NV40_VP_INST_SRC2H_MASK;
-      shader->inst[3] &= ~NV40_VP_INST_SRC2L_MASK;
-      shader->inst[2] |= ((hw & NV40_VP_SRC2_HIGH_MASK) >>
-	    NV40_VP_SRC2_HIGH_SHIFT)
-	 << NV40_VP_INST_SRC2H_SHIFT;
-      shader->inst[3] |= (hw & NV40_VP_SRC2_LOW_MASK)
-	 << NV40_VP_INST_SRC2L_SHIFT;
-      break;
-   default:
-      assert(0);
-      break;
-   }
-}
-
-static void
-NV40VPSetSource(nvsFunc *shader, nvsRegister * src, int pos)
-{
-   unsigned int hw = 0;
-
-   switch (src->file) {
-   case NVS_FILE_ADDRESS:
-      break;
-   case NVS_FILE_ATTRIB:
-      hw |= (NV40_VP_SRC_REG_TYPE_INPUT << NV40_VP_SRC_REG_TYPE_SHIFT);
-
-      shader->inst[1] &= ~NV40_VP_INST_INPUT_SRC_MASK;
-      shader->inst[1] |= (src->index << NV40_VP_INST_INPUT_SRC_SHIFT);
-      shader->card_priv->NV30VP.vp_in_reg |= (1 << src->index);
-      if (src->indexed) {
-	 shader->inst[0] |= NV40_VP_INST_INDEX_INPUT;
-	 if (src->addr_reg)
-	    shader->inst[0] |= NV40_VP_INST_ADDR_REG_SELECT_1;
-	 else
-	    shader->inst[0] &= ~NV40_VP_INST_ADDR_REG_SELECT_1;
-	 shader->inst[0] &= ~NV40_VP_INST_ADDR_SWZ_SHIFT;
-	 shader->inst[0] |= (src->addr_comp << NV40_VP_INST_ADDR_SWZ_SHIFT);
-      } else
-	 shader->inst[0] &= ~NV40_VP_INST_INDEX_INPUT;
-      break;
-   case NVS_FILE_CONST:
-      hw |= (NV40_VP_SRC_REG_TYPE_CONST << NV40_VP_SRC_REG_TYPE_SHIFT);
-
-      shader->inst[1] &= ~NV40_VP_INST_CONST_SRC_MASK;
-      shader->inst[1] |= (src->index << NV40_VP_INST_CONST_SRC_SHIFT);
-      if (src->indexed) {
-	 shader->inst[3] |= NV40_VP_INST_INDEX_CONST;
-	 if (src->addr_reg)
-	    shader->inst[0] |= NV40_VP_INST_ADDR_REG_SELECT_1;
-	 else
-	    shader->inst[0] &= ~NV40_VP_INST_ADDR_REG_SELECT_1;
-	 shader->inst[0] &= ~NV40_VP_INST_ADDR_SWZ_MASK;
-	 shader->inst[0] |= (src->addr_comp << NV40_VP_INST_ADDR_SWZ_SHIFT);
-      } else
-	 shader->inst[3] &= ~NV40_VP_INST_INDEX_CONST;
-      break;
-   case NVS_FILE_TEMP:
-      hw |= (NV40_VP_SRC_REG_TYPE_TEMP << NV40_VP_SRC_REG_TYPE_SHIFT);
-      hw |= (src->index << NV40_VP_SRC_TEMP_SRC_SHIFT);
-      break;
-   default:
-      fprintf(stderr, "unknown source file %d\n", src->file);
-      assert(0);
-      break;
-   }
-
-   if (src->file != NVS_FILE_ADDRESS) {
-      if (src->negate)
-	 hw |= NV40_VP_SRC_NEGATE;
-      if (src->abs)
-	 shader->inst[0] |= (1 << (21 + pos));
-      else
-	 shader->inst[0] &= ~(1 << (21 + pos));
-      hw |= (src->swizzle[0] << NV40_VP_SRC_SWZ_X_SHIFT);
-      hw |= (src->swizzle[1] << NV40_VP_SRC_SWZ_Y_SHIFT);
-      hw |= (src->swizzle[2] << NV40_VP_SRC_SWZ_Z_SHIFT);
-      hw |= (src->swizzle[3] << NV40_VP_SRC_SWZ_W_SHIFT);
-
-      NV40VPInsertSource(shader, hw, pos);
-   }
-}
-
-static void
-NV40VPSetBranchTarget(nvsFunc *shader, int addr)
-{
-	shader->inst[2] &= ~NV40_VP_INST_IADDRH_MASK;
-	shader->inst[2] |= ((addr & 0xf8) >> 3) << NV40_VP_INST_IADDRH_SHIFT;
-	shader->inst[3] &= ~NV40_VP_INST_IADDRL_MASK;
-	shader->inst[3] |= ((addr & 0x07) << NV40_VP_INST_IADDRL_SHIFT);
-}
-
-static void
-NV40VPInitInstruction(nvsFunc *shader)
-{
-   unsigned int hwsrc = 0;
-
-   shader->inst[0] = /*NV40_VP_INST_VEC_RESULT | */
-      		     NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20);
-   shader->inst[1] = 0;
-   shader->inst[2] = 0;
-   shader->inst[3] = NV40_VP_INST_SCA_RESULT |
-      		     NV40_VP_INST_SCA_DEST_TEMP_MASK |
-		     NV40_VP_INST_DEST_MASK;
-   
-   hwsrc = (NV40_VP_SRC_REG_TYPE_INPUT << NV40_VP_SRC_REG_TYPE_SHIFT) |
-      	   (NVS_SWZ_X << NV40_VP_SRC_SWZ_X_SHIFT) |
-      	   (NVS_SWZ_Y << NV40_VP_SRC_SWZ_Y_SHIFT) |
-      	   (NVS_SWZ_Z << NV40_VP_SRC_SWZ_Z_SHIFT) |
-      	   (NVS_SWZ_W << NV40_VP_SRC_SWZ_W_SHIFT);
-   NV40VPInsertSource(shader, hwsrc, 0);
-   NV40VPInsertSource(shader, hwsrc, 1);
-   NV40VPInsertSource(shader, hwsrc, 2);
-}
-
-static void
-NV40VPSetLastInst(nvsFunc *shader)
-{
-   shader->inst[3] |= 1;
-}
-
-/*****************************************************************************
- * Disassembly routines
- */
-static int
-NV40VPHasMergedInst(nvsFunc * shader)
-{
-   if (shader->GetOpcodeHW(shader, 0) != NV40_VP_INST_OP_NOP &&
-       shader->GetOpcodeHW(shader, 1) != NV40_VP_INST_OP_NOP)
-      return 1;
-   return 0;
-}
-
-static unsigned int
-NV40VPGetOpcodeHW(nvsFunc * shader, int slot)
-{
-   int op;
-
-   if (slot)
-      op = (shader->inst[1] & NV40_VP_INST_SCA_OPCODE_MASK)
-	 >> NV40_VP_INST_SCA_OPCODE_SHIFT;
-   else
-      op = (shader->inst[1] & NV40_VP_INST_VEC_OPCODE_MASK)
-	 >> NV40_VP_INST_VEC_OPCODE_SHIFT;
-
-   return op;
-}
-
-static nvsRegFile
-NV40VPGetDestFile(nvsFunc * shader, int merged)
-{
-   nvsOpcode op;
-
-   op = shader->GetOpcode(shader, merged);
-   switch (op) {
-   case NVS_OP_ARL:
-   case NVS_OP_ARR:
-   case NVS_OP_ARA:
-   case NVS_OP_POPA:
-      return NVS_FILE_ADDRESS;
-   default:
-      if (shader->GetOpcodeSlot(shader, merged)) {
-	 if (shader->inst[3] & NV40_VP_INST_SCA_RESULT)
-	    return NVS_FILE_RESULT;
-      }
-      else {
-	 if (shader->inst[0] & NV40_VP_INST_VEC_RESULT)
-	    return NVS_FILE_RESULT;
-      }
-      return NVS_FILE_TEMP;
-   }
-
-}
-
-static unsigned int
-NV40VPGetDestID(nvsFunc * shader, int merged)
-{
-   int id;
-
-   switch (shader->GetDestFile(shader, merged)) {
-   case NVS_FILE_RESULT:
-      id = ((shader->inst[3] & NV40_VP_INST_DEST_MASK)
-	    >> NV40_VP_INST_DEST_SHIFT);
-      switch (id) {
-      case NV40_VP_INST_DEST_POS : return NVS_FR_POSITION;
-      case NV40_VP_INST_DEST_COL0: return NVS_FR_COL0;
-      case NV40_VP_INST_DEST_COL1: return NVS_FR_COL1;
-      case NV40_VP_INST_DEST_BFC0: return NVS_FR_BFC0;
-      case NV40_VP_INST_DEST_BFC1: return NVS_FR_BFC1;
-      case NV40_VP_INST_DEST_FOGC: {
-	    int mask = shader->GetDestMask(shader, merged);
-	    switch (mask) {
-	    case SMASK_X: return NVS_FR_FOGCOORD;
-	    case SMASK_Y: return NVS_FR_CLIP0;
-	    case SMASK_Z: return NVS_FR_CLIP1;
-	    case SMASK_W: return NVS_FR_CLIP2;
-	    default:
-	       printf("more than 1 mask component set in FOGC writemask!\n");
-	       return NVS_FR_UNKNOWN;
-	    }
-	 }
-      case NV40_VP_INST_DEST_PSZ:
-	 {
-	    int mask = shader->GetDestMask(shader, merged);
-	    switch (mask) {
-	    case SMASK_X: return NVS_FR_POINTSZ;
-	    case SMASK_Y: return NVS_FR_CLIP3;
-	    case SMASK_Z: return NVS_FR_CLIP4;
-	    case SMASK_W: return NVS_FR_CLIP5;
-	    default:
-	       printf("more than 1 mask component set in PSZ writemask!\n");
-	       return NVS_FR_UNKNOWN;
-	    }
-	 }
-      case NV40_VP_INST_DEST_TC(0): return NVS_FR_TEXCOORD0;
-      case NV40_VP_INST_DEST_TC(1): return NVS_FR_TEXCOORD1;
-      case NV40_VP_INST_DEST_TC(2): return NVS_FR_TEXCOORD2;
-      case NV40_VP_INST_DEST_TC(3): return NVS_FR_TEXCOORD3;
-      case NV40_VP_INST_DEST_TC(4): return NVS_FR_TEXCOORD4;
-      case NV40_VP_INST_DEST_TC(5): return NVS_FR_TEXCOORD5;
-      case NV40_VP_INST_DEST_TC(6): return NVS_FR_TEXCOORD6;
-      case NV40_VP_INST_DEST_TC(7): return NVS_FR_TEXCOORD7;
-      default:
-	 return -1;
-      }
-   case NVS_FILE_ADDRESS:
-      /* Instructions that write address regs are encoded as if
-       * they would write temps.
-       */
-   case NVS_FILE_TEMP:
-      if (shader->GetOpcodeSlot(shader, merged))
-	 id = ((shader->inst[3] & NV40_VP_INST_SCA_DEST_TEMP_MASK)
-	       >> NV40_VP_INST_SCA_DEST_TEMP_SHIFT);
-      else
-	 id = ((shader->inst[0] & NV40_VP_INST_VEC_DEST_TEMP_MASK)
-	       >> NV40_VP_INST_VEC_DEST_TEMP_SHIFT);
-      return id;
-   default:
-      return -1;
-   }
-}
-
-static unsigned int
-NV40VPGetDestMask(nvsFunc * shader, int merged)
-{
-   unsigned int mask = 0;
-
-   if (shader->GetOpcodeSlot(shader, merged)) {
-      if (shader->inst[3] & NV40_VP_INST_SCA_WRITEMASK_X) mask |= SMASK_X;
-      if (shader->inst[3] & NV40_VP_INST_SCA_WRITEMASK_Y) mask |= SMASK_Y;
-      if (shader->inst[3] & NV40_VP_INST_SCA_WRITEMASK_Z) mask |= SMASK_Z;
-      if (shader->inst[3] & NV40_VP_INST_SCA_WRITEMASK_W) mask |= SMASK_W;
-   } else {
-      if (shader->inst[3] & NV40_VP_INST_VEC_WRITEMASK_X) mask |= SMASK_X;
-      if (shader->inst[3] & NV40_VP_INST_VEC_WRITEMASK_Y) mask |= SMASK_Y;
-      if (shader->inst[3] & NV40_VP_INST_VEC_WRITEMASK_Z) mask |= SMASK_Z;
-      if (shader->inst[3] & NV40_VP_INST_VEC_WRITEMASK_W) mask |= SMASK_W;
-   }
-
-   return mask;
-}
-
-static unsigned int
-NV40VPGetSourceHW(nvsFunc * shader, int merged, int pos)
-{
-   struct _op_xlat *opr;
-   unsigned int src;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr)
-      return -1;
-
-   switch (opr->srcpos[pos]) {
-   case 0:
-      src = ((shader->inst[1] & NV40_VP_INST_SRC0H_MASK)
-	     >> NV40_VP_INST_SRC0H_SHIFT)
-	 << NV40_VP_SRC0_HIGH_SHIFT;
-      src |= ((shader->inst[2] & NV40_VP_INST_SRC0L_MASK)
-	      >> NV40_VP_INST_SRC0L_SHIFT);
-      break;
-   case 1:
-      src = ((shader->inst[2] & NV40_VP_INST_SRC1_MASK)
-	     >> NV40_VP_INST_SRC1_SHIFT);
-      break;
-   case 2:
-      src = ((shader->inst[2] & NV40_VP_INST_SRC2H_MASK)
-	     >> NV40_VP_INST_SRC2H_SHIFT)
-	 << NV40_VP_SRC2_HIGH_SHIFT;
-      src |= ((shader->inst[3] & NV40_VP_INST_SRC2L_MASK)
-	      >> NV40_VP_INST_SRC2L_SHIFT);
-      break;
-   default:
-      src = -1;
-   }
-
-   return src;
-}
-
-static nvsRegFile
-NV40VPGetSourceFile(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-   struct _op_xlat *opr;
-   int file;
-
-   opr = shader->GetOPTXRec(shader, merged);
-   if (!opr || opr->srcpos[pos] == -1)
-      return -1;
-
-   switch (opr->srcpos[pos]) {
-   case SPOS_ADDRESS: return NVS_FILE_ADDRESS;
-   default:
-      src = shader->GetSourceHW(shader, merged, pos);
-      file = (src & NV40_VP_SRC_REG_TYPE_MASK) >> NV40_VP_SRC_REG_TYPE_SHIFT;
-
-      switch (file) {
-      case NV40_VP_SRC_REG_TYPE_TEMP : return NVS_FILE_TEMP;
-      case NV40_VP_SRC_REG_TYPE_INPUT: return NVS_FILE_ATTRIB;
-      case NV40_VP_SRC_REG_TYPE_CONST: return NVS_FILE_CONST;
-      default:
-	 return NVS_FILE_UNKNOWN;
-      }
-   }
-}
-
-static int
-NV40VPGetSourceID(nvsFunc * shader, int merged, int pos)
-{
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_ATTRIB:
-      switch ((shader->inst[1] & NV40_VP_INST_INPUT_SRC_MASK)
-	      >> NV40_VP_INST_INPUT_SRC_SHIFT) {
-      case NV40_VP_INST_IN_POS:		return NVS_FR_POSITION;
-      case NV40_VP_INST_IN_WEIGHT:	return NVS_FR_WEIGHT;
-      case NV40_VP_INST_IN_NORMAL:	return NVS_FR_NORMAL;
-      case NV40_VP_INST_IN_COL0:	return NVS_FR_COL0;
-      case NV40_VP_INST_IN_COL1:	return NVS_FR_COL1;
-      case NV40_VP_INST_IN_FOGC:	return NVS_FR_FOGCOORD;
-      case NV40_VP_INST_IN_TC(0):	return NVS_FR_TEXCOORD0;
-      case NV40_VP_INST_IN_TC(1):	return NVS_FR_TEXCOORD1;
-      case NV40_VP_INST_IN_TC(2):	return NVS_FR_TEXCOORD2;
-      case NV40_VP_INST_IN_TC(3):	return NVS_FR_TEXCOORD3;
-      case NV40_VP_INST_IN_TC(4):	return NVS_FR_TEXCOORD4;
-      case NV40_VP_INST_IN_TC(5):	return NVS_FR_TEXCOORD5;
-      case NV40_VP_INST_IN_TC(6):	return NVS_FR_TEXCOORD6;
-      case NV40_VP_INST_IN_TC(7):	return NVS_FR_TEXCOORD7;
-      default:
-	 return -1;
-      }
-      break;
-   case NVS_FILE_CONST:
-      return ((shader->inst[1] & NV40_VP_INST_CONST_SRC_MASK)
-	      >> NV40_VP_INST_CONST_SRC_SHIFT);
-   case NVS_FILE_TEMP:
-      {
-	 unsigned int src;
-
-	 src = shader->GetSourceHW(shader, merged, pos);
-	 return ((src & NV40_VP_SRC_TEMP_SRC_MASK) >>
-		 NV40_VP_SRC_TEMP_SRC_SHIFT);
-      }
-   default:
-      return -1;
-   }
-}
-
-static int
-NV40VPGetSourceNegate(nvsFunc * shader, int merged, int pos)
-{
-   unsigned int src;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-
-   if (src == -1)
-      return -1;
-   return ((src & NV40_VP_SRC_NEGATE) ? 1 : 0);
-}
-
-static void
-NV40VPGetSourceSwizzle(nvsFunc * shader, int merged, int pos, nvsSwzComp *swz)
-{
-   unsigned int src;
-   int swzbits;
-
-   src = shader->GetSourceHW(shader, merged, pos);
-   swzbits = (src & NV40_VP_SRC_SWZ_ALL_MASK) >> NV40_VP_SRC_SWZ_ALL_SHIFT;
-   NV20VPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV40VPGetSourceIndexed(nvsFunc * shader, int merged, int pos)
-{
-   switch (shader->GetSourceFile(shader, merged, pos)) {
-   case NVS_FILE_ATTRIB:
-      return ((shader->inst[0] & NV40_VP_INST_INDEX_INPUT) ? 1 : 0);
-   case NVS_FILE_CONST:
-      return ((shader->inst[3] & NV40_VP_INST_INDEX_CONST) ? 1 : 0);
-   default:
-      return 0;
-   }
-}
-
-static nvsSwzComp
-NV40VPGetAddressRegSwizzle(nvsFunc * shader)
-{
-   nvsSwzComp swz;
-
-   swz = NV20VP_TX_SWIZZLE[(shader->inst[0] & NV40_VP_INST_ADDR_SWZ_MASK)
-			   >> NV40_VP_INST_ADDR_SWZ_SHIFT];
-   return swz;
-}
-
-static int
-NV40VPSupportsConditional(nvsFunc * shader)
-{
-   /*FIXME: Is this true of all ops? */
-   return 1;
-}
-
-static int
-NV40VPGetConditionUpdate(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV40_VP_INST_COND_UPDATE_ENABLE) ? 1 : 0);
-}
-
-static int
-NV40VPGetConditionTest(nvsFunc * shader)
-{
-   int op;
-
-   /* The condition test is unconditionally enabled on some
-    * instructions. ie: the condition test bit does *NOT* have
-    * to be set.
-    *
-    * FIXME: check other relevant ops for this situation.
-    */
-   op = shader->GetOpcodeHW(shader, 1);
-   switch (op) {
-   case NV40_VP_INST_OP_BRA:
-      return 1;
-   default:
-      return ((shader->inst[0] & NV40_VP_INST_COND_TEST_ENABLE) ? 1 : 0);
-   }
-}
-
-static nvsCond
-NV40VPGetCondition(nvsFunc * shader)
-{
-   int cond;
-
-   cond = ((shader->inst[0] & NV40_VP_INST_COND_MASK)
-	   >> NV40_VP_INST_COND_SHIFT);
-
-   switch (cond) {
-   case NV40_VP_INST_COND_FL: return NVS_COND_FL;
-   case NV40_VP_INST_COND_LT: return NVS_COND_LT;
-   case NV40_VP_INST_COND_EQ: return NVS_COND_EQ;
-   case NV40_VP_INST_COND_LE: return NVS_COND_LE;
-   case NV40_VP_INST_COND_GT: return NVS_COND_GT;
-   case NV40_VP_INST_COND_NE: return NVS_COND_NE;
-   case NV40_VP_INST_COND_GE: return NVS_COND_GE;
-   case NV40_VP_INST_COND_TR: return NVS_COND_TR;
-   default:
-      return NVS_COND_UNKNOWN;
-   }
-}
-
-static void
-NV40VPGetCondRegSwizzle(nvsFunc * shader, nvsSwzComp *swz)
-{
-   int swzbits;
-
-   swzbits = (shader->inst[0] & NV40_VP_INST_COND_SWZ_ALL_MASK)
-      >> NV40_VP_INST_COND_SWZ_ALL_SHIFT;
-   NV20VPTXSwizzle(swzbits, swz);
-}
-
-static int
-NV40VPGetCondRegID(nvsFunc * shader)
-{
-   return ((shader->inst[0] & NV40_VP_INST_COND_REG_SELECT_1) ? 1 : 0);
-}
-
-static int
-NV40VPGetBranch(nvsFunc * shader)
-{
-   int addr;
-
-   addr = ((shader->inst[2] & NV40_VP_INST_IADDRH_MASK)
-	   >> NV40_VP_INST_IADDRH_SHIFT) << 3;
-   addr |= ((shader->inst[3] & NV40_VP_INST_IADDRL_MASK)
-	    >> NV40_VP_INST_IADDRL_SHIFT);
-   return addr;
-}
-
-void
-NV40VPInitShaderFuncs(nvsFunc * shader)
-{
-   /* Inherit NV30 VP code, we share some of it */
-   NV30VPInitShaderFuncs(shader);
-
-   /* Limits */
-   shader->MaxInst	= 4096;
-   shader->MaxAttrib	= 16;
-   shader->MaxTemp	= 32;
-   shader->MaxAddress	= 2;
-   shader->MaxConst	= 256;
-   shader->caps		= SCAP_SRC_ABS;
-
-   /* Add extra opcodes for NV40+ */
-//      MOD_OPCODE(NVVP_TX_VOP, NV40_VP_INST_OP_TXWHAT, NVS_OP_TEX  ,  0,  4, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV40_VP_INST_OP_PUSHA, NVS_OP_PUSHA,  3, -1, -1);
-   MOD_OPCODE(NVVP_TX_SOP, NV40_VP_INST_OP_POPA , NVS_OP_POPA , -1, -1, -1);
-
-   shader->InitInstruction	= NV40VPInitInstruction;
-   shader->SupportsOpcode	= NV40VPSupportsOpcode;
-   shader->SetOpcode		= NV40VPSetOpcode;
-   shader->SetCCUpdate		= NV40VPSetCCUpdate;
-   shader->SetCondition		= NV40VPSetCondition;
-   shader->SetResult		= NV40VPSetResult;
-   shader->SetSource		= NV40VPSetSource;
-   shader->SetLastInst		= NV40VPSetLastInst;
-   shader->SetBranchTarget	= NV40VPSetBranchTarget;
-
-   shader->HasMergedInst	= NV40VPHasMergedInst;
-   shader->GetOpcodeHW		= NV40VPGetOpcodeHW;
-
-   shader->GetDestFile		= NV40VPGetDestFile;
-   shader->GetDestID		= NV40VPGetDestID;
-   shader->GetDestMask		= NV40VPGetDestMask;
-
-   shader->GetSourceHW		= NV40VPGetSourceHW;
-   shader->GetSourceFile	= NV40VPGetSourceFile;
-   shader->GetSourceID		= NV40VPGetSourceID;
-   shader->GetSourceNegate	= NV40VPGetSourceNegate;
-   shader->GetSourceSwizzle	= NV40VPGetSourceSwizzle;
-   shader->GetSourceIndexed	= NV40VPGetSourceIndexed;
-
-   shader->GetRelAddressSwizzle	= NV40VPGetAddressRegSwizzle;
-
-   shader->SupportsConditional	= NV40VPSupportsConditional;
-   shader->GetConditionUpdate	= NV40VPGetConditionUpdate;
-   shader->GetConditionTest	= NV40VPGetConditionTest;
-   shader->GetCondition		= NV40VPGetCondition;
-   shader->GetCondRegSwizzle	= NV40VPGetCondRegSwizzle;
-   shader->GetCondRegID		= NV40VPGetCondRegID;
-
-   shader->GetBranch		= NV40VPGetBranch;
-}
diff --git a/src/mesa/drivers/dri/nouveau/nv50_state.c b/src/mesa/drivers/dri/nouveau/nv50_state.c
deleted file mode 100644
index 818e268615c..00000000000
--- a/src/mesa/drivers/dri/nouveau/nv50_state.c
+++ /dev/null
@@ -1,641 +0,0 @@
-/**************************************************************************
-
-Copyright 2006 Nouveau
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-#include "nouveau_context.h"
-#include "nouveau_object.h"
-#include "nouveau_fifo.h"
-#include "nouveau_reg.h"
-#include "nouveau_state.h"
-
-#include "tnl/t_pipeline.h"
-
-#include "mtypes.h"
-#include "colormac.h"
-
-static void nv50AlphaFunc(GLcontext *ctx, GLenum func, GLfloat ref)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLubyte ubRef;
-	CLAMPED_FLOAT_TO_UBYTE(ubRef, ref);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_ALPHA_FUNC_REF, 2);
-	OUT_RING_CACHE(ubRef);
-	OUT_RING_CACHE(func);
-}
-
-static void nv50BlendColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); 
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_BLEND_COLOR_R, 4);
-	OUT_RING_CACHEf(color[0]);
-	OUT_RING_CACHEf(color[1]);
-	OUT_RING_CACHEf(color[2]);
-	OUT_RING_CACHEf(color[3]);
-}
-
-static void nv50BlendEquationSeparate(GLcontext *ctx, GLenum modeRGB, GLenum modeA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_BLEND_EQUATION_RGB, 1);
-	OUT_RING_CACHE(modeRGB);
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_BLEND_EQUATION_ALPHA, 1);
-	OUT_RING_CACHE(modeA);
-}
-
-
-static void nv50BlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB,
-		GLenum sfactorA, GLenum dfactorA)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC_RGB, 2);
-	OUT_RING_CACHE(sfactorRGB);	/* FIXME, sometimes has |0x4000 */
-	OUT_RING_CACHE(dfactorRGB);	/* FIXME, sometimes has |0x4000 */
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_BLEND_FUNC_SRC_ALPHA, 2);
-	OUT_RING_CACHE(sfactorA);	/* FIXME, sometimes has |0x4000 */
-	OUT_RING_CACHE(dfactorA);	/* FIXME, sometimes has |0x4000 */
-}
-
-static void nv50Clear(GLcontext *ctx, GLbitfield mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	GLuint hw_bufs = 0;
-
-	if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT))
-		hw_bufs |= 0x3c;
-	if (mask & (BUFFER_BIT_STENCIL))
-		hw_bufs |= 0x02;
-	if (mask & (BUFFER_BIT_DEPTH))
-		hw_bufs |= 0x01;
-
-	if (hw_bufs) {
-		BEGIN_RING_SIZE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CLEAR_BUFFERS, 1);
-		OUT_RING(hw_bufs);
-	}
-}
-
-static void nv50ClearColor(GLcontext *ctx, const GLfloat color[4])
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CLEAR_COLOR_R, 4);
-	OUT_RING_CACHEf(color[0]);
-	OUT_RING_CACHEf(color[1]);
-	OUT_RING_CACHEf(color[2]);
-	OUT_RING_CACHEf(color[3]);
-}
-
-static void nv50ClearDepth(GLcontext *ctx, GLclampd d)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CLEAR_DEPTH, 1);
-	OUT_RING_CACHEf(d);
-}
-
-/* we're don't support indexed buffers
-   void (*ClearIndex)(GLcontext *ctx, GLuint index)
- */
-
-static void nv50ClearStencil(GLcontext *ctx, GLint s)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CLEAR_STENCIL, 1);
-	OUT_RING_CACHE(s);
-}
-
-static void nv50ClipPlane(GLcontext *ctx, GLenum plane, const GLfloat *equation)
-{
-	/* Only using shaders */
-}
-
-static void nv50ColorMask(GLcontext *ctx, GLboolean rmask, GLboolean gmask,
-		GLboolean bmask, GLboolean amask )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	int i;
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_COLOR_MASK(0), 8);
-	for (i=0; i<8; i++) {
-		OUT_RING_CACHE(((amask && 0x01) << 12) | ((bmask && 0x01) << 8) | ((gmask && 0x01)<< 4) | ((rmask && 0x01) << 0));
-	}
-}
-
-static void nv50ColorMaterial(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	// TODO I need love
-}
-
-static void nv50CullFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CULL_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv50FrontFace(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_FRONT_FACE, 1);
-	OUT_RING_CACHE(mode);
-}
-
-static void nv50DepthFunc(GLcontext *ctx, GLenum func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_DEPTH_FUNC, 1);
-	OUT_RING_CACHE(func);
-}
-
-static void nv50DepthMask(GLcontext *ctx, GLboolean flag)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_DEPTH_WRITE_ENABLE, 1);
-	OUT_RING_CACHE(flag);
-}
-
-static void nv50DepthRange(GLcontext *ctx, GLclampd nearval, GLclampd farval)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_DEPTH_RANGE_NEAR, 2);
-	OUT_RING_CACHEf(nearval);
-	OUT_RING_CACHEf(farval);
-}
-
-/** Specify the current buffer for writing */
-//void (*DrawBuffer)( GLcontext *ctx, GLenum buffer );
-/** Specify the buffers for writing for fragment programs*/
-//void (*DrawBuffers)( GLcontext *ctx, GLsizei n, const GLenum *buffers );
-
-static void nv50Enable(GLcontext *ctx, GLenum cap, GLboolean state)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	switch(cap)
-	{
-		case GL_ALPHA_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_ALPHA_FUNC_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_AUTO_NORMAL:
-//		case GL_BLEND:
-//		case GL_CLIP_PLANE0:
-//		case GL_CLIP_PLANE1:
-//		case GL_CLIP_PLANE2:
-//		case GL_CLIP_PLANE3:
-//		case GL_CLIP_PLANE4:
-//		case GL_CLIP_PLANE5:
-		case GL_COLOR_LOGIC_OP:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LOGIC_OP_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_COLOR_MATERIAL:
-//		case GL_COLOR_SUM_EXT:
-//		case GL_COLOR_TABLE:
-//		case GL_CONVOLUTION_1D:
-//		case GL_CONVOLUTION_2D:
-		case GL_CULL_FACE:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_CULL_FACE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_DEPTH_TEST:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_DEPTH_TEST_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_DITHER:
-//		case GL_FOG:
-//		case GL_HISTOGRAM:
-//		case GL_INDEX_LOGIC_OP:
-//		case GL_LIGHT0:
-//		case GL_LIGHT1:
-//		case GL_LIGHT2:
-//		case GL_LIGHT3:
-//		case GL_LIGHT4:
-//		case GL_LIGHT5:
-//		case GL_LIGHT6:
-//		case GL_LIGHT7:
-//		case GL_LIGHTING:
-		case GL_LINE_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LINE_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_LINE_STIPPLE:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LINE_STIPPLE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_MAP1_COLOR_4:
-//		case GL_MAP1_INDEX:
-//		case GL_MAP1_NORMAL:
-//		case GL_MAP1_TEXTURE_COORD_1:
-//		case GL_MAP1_TEXTURE_COORD_2:
-//		case GL_MAP1_TEXTURE_COORD_3:
-//		case GL_MAP1_TEXTURE_COORD_4:
-//		case GL_MAP1_VERTEX_3:
-//		case GL_MAP1_VERTEX_4:
-//		case GL_MAP2_COLOR_4:
-//		case GL_MAP2_INDEX:
-//		case GL_MAP2_NORMAL:
-//		case GL_MAP2_TEXTURE_COORD_1:
-//		case GL_MAP2_TEXTURE_COORD_2:
-//		case GL_MAP2_TEXTURE_COORD_3:
-//		case GL_MAP2_TEXTURE_COORD_4:
-//		case GL_MAP2_VERTEX_3:
-//		case GL_MAP2_VERTEX_4:
-//		case GL_MINMAX:
-//		case GL_NORMALIZE:
-//		case GL_POINT_SMOOTH:
-		case GL_POLYGON_OFFSET_POINT:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_POINT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_LINE:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_LINE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_OFFSET_FILL:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FILL_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_SMOOTH:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_SMOOTH_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-		case GL_POLYGON_STIPPLE:
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_POST_COLOR_MATRIX_COLOR_TABLE:
-//		case GL_POST_CONVOLUTION_COLOR_TABLE:
-//		case GL_RESCALE_NORMAL:
-		case GL_SCISSOR_TEST:
-			/* No enable bit, nv50Scissor will adjust to max range */
-			ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-			      			 ctx->Scissor.Width, ctx->Scissor.Height);
-			break;
-//		case GL_SEPARABLE_2D:
-		case GL_STENCIL_TEST:
-			// TODO BACK and FRONT ?
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_ENABLE, 1);
-			OUT_RING_CACHE(state);
-			break;
-//		case GL_TEXTURE_GEN_Q:
-//		case GL_TEXTURE_GEN_R:
-//		case GL_TEXTURE_GEN_S:
-//		case GL_TEXTURE_GEN_T:
-//		case GL_TEXTURE_1D:
-//		case GL_TEXTURE_2D:
-//		case GL_TEXTURE_3D:
-	}
-}
-
-static void nv50Fogfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/* Only using shaders */
-}
-   
-static void nv50Hint(GLcontext *ctx, GLenum target, GLenum mode)
-{
-	// TODO I need love (fog and line_smooth hints)
-}
-
-// void (*IndexMask)(GLcontext *ctx, GLuint mask);
-
-static void nv50Lightfv(GLcontext *ctx, GLenum light, GLenum pname, const GLfloat *params )
-{
-	/* Only with shaders */
-}
-
-/** Set the lighting model parameters */
-void (*LightModelfv)(GLcontext *ctx, GLenum pname, const GLfloat *params);
-
-
-static void nv50LineStipple(GLcontext *ctx, GLint factor, GLushort pattern )
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LINE_STIPPLE_PATTERN, 1);
-	OUT_RING_CACHE((pattern << 8) | factor);
-}
-
-static void nv50LineWidth(GLcontext *ctx, GLfloat width)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LINE_WIDTH, 1);
-	OUT_RING_CACHEf(width);
-}
-
-static void nv50LogicOpcode(GLcontext *ctx, GLenum opcode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_LOGIC_OP_OP, 1);
-	OUT_RING_CACHE(opcode);
-}
-
-static void nv50PointParameterfv(GLcontext *ctx, GLenum pname, const GLfloat *params)
-{
-	/*TODO: not sure what goes here. */
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-	
-}
-
-/** Specify the diameter of rasterized points */
-static void nv50PointSize(GLcontext *ctx, GLfloat size)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POINT_SIZE, 1);
-	OUT_RING_CACHEf(size);
-}
-
-/** Select a polygon rasterization mode */
-static void nv50PolygonMode(GLcontext *ctx, GLenum face, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_MODE_FRONT, 1);
-		OUT_RING_CACHE(mode);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_MODE_BACK, 1);
-		OUT_RING_CACHE(mode);
-	}
-}
-
-/** Set the scale and units used to calculate depth values */
-static void nv50PolygonOffset(GLcontext *ctx, GLfloat factor, GLfloat units)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
- 
-        BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_FACTOR, 1);
-        OUT_RING_CACHEf(factor);
-        BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_OFFSET_UNITS, 1);
-        OUT_RING_CACHEf(units);
-}
-
-/** Set the polygon stippling pattern */
-static void nv50PolygonStipple(GLcontext *ctx, const GLubyte *mask )
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-        BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_POLYGON_STIPPLE_PATTERN(0), 32);
-        OUT_RING_CACHEp(mask, 32);
-}
-
-/* Specifies the current buffer for reading */
-void (*ReadBuffer)( GLcontext *ctx, GLenum buffer );
-/** Set rasterization mode */
-void (*RenderMode)(GLcontext *ctx, GLenum mode );
-
-/** Define the scissor box */
-static void nv50Scissor(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
-{
-        nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	/* There's no scissor enable bit, so adjust the scissor to cover the
-	 * maximum draw buffer bounds
-	 */
-	if (!ctx->Scissor.Enabled) {
-	   x = y = 0;
-	   w = h = 8191;
-	} else {
-	   x += nmesa->drawX;
-	   y += nmesa->drawY;
-	}
-
-        BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_SCISSOR_WIDTH_XPOS, 2);
-        OUT_RING_CACHE(((w) << 16) | x);
-        OUT_RING_CACHE(((h) << 16) | y);
-}
-
-/** Select flat or smooth shading */
-static void nv50ShadeModel(GLcontext *ctx, GLenum mode)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_SHADE_MODEL, 1);
-	OUT_RING_CACHE(mode);
-}
-
-/** OpenGL 2.0 two-sided StencilFunc */
-static void nv50StencilFuncSeparate(GLcontext *ctx, GLenum face, GLenum func,
-		GLint ref, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_FUNC, 1);
-		OUT_RING_CACHE(func);
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_REF, 1);
-		OUT_RING_CACHE(ref);
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_FUNC_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_FUNC, 2);
-		OUT_RING_CACHE(func);
-		OUT_RING_CACHE(ref);
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_FUNC_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-}
-
-/** OpenGL 2.0 two-sided StencilMask */
-static void nv50StencilMaskSeparate(GLcontext *ctx, GLenum face, GLuint mask)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_MASK, 1);
-		OUT_RING_CACHE(mask);
-	}
-}
-
-/** OpenGL 2.0 two-sided StencilOp */
-static void nv50StencilOpSeparate(GLcontext *ctx, GLenum face, GLenum fail,
-		GLenum zfail, GLenum zpass)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	if (face == GL_FRONT || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_FRONT_OP_FAIL, 3);
-		OUT_RING_CACHE(fail);
-		OUT_RING_CACHE(zfail);
-		OUT_RING_CACHE(zpass);
-	}
-	if (face == GL_BACK || face == GL_FRONT_AND_BACK) {
-		BEGIN_RING_CACHE(NvSub3D, NV50_TCL_PRIMITIVE_3D_STENCIL_BACK_OP_FAIL, 3);
-		OUT_RING_CACHE(fail);
-		OUT_RING_CACHE(zfail);
-		OUT_RING_CACHE(zpass);
-	}
-}
-
-/** Control the generation of texture coordinates */
-void (*TexGen)(GLcontext *ctx, GLenum coord, GLenum pname,
-		const GLfloat *params);
-/** Set texture environment parameters */
-void (*TexEnv)(GLcontext *ctx, GLenum target, GLenum pname,
-		const GLfloat *param);
-/** Set texture parameters */
-void (*TexParameter)(GLcontext *ctx, GLenum target,
-		struct gl_texture_object *texObj,
-		GLenum pname, const GLfloat *params);
-
-static void nv50TextureMatrix(GLcontext *ctx, GLuint unit, const GLmatrix *mat)
-{
-	/* Only with shaders */
-}
-
-static void nv50WindowMoved(nouveauContextPtr nmesa)
-{
-	GLcontext *ctx = nmesa->glCtx;
-	GLfloat *v = nmesa->viewport.m;
-	GLuint w = ctx->Viewport.Width;
-	GLuint h = ctx->Viewport.Height;
-	GLuint x = ctx->Viewport.X + nmesa->drawX;
-	GLuint y = ctx->Viewport.Y + nmesa->drawY;
-	int i;
-
-	BEGIN_RING_CACHE(NvSub3D,
-	      NV50_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(0), 2);
-        OUT_RING_CACHE((8191 << 16) | 0);
-        OUT_RING_CACHE((8191 << 16) | 0);
-	for (i=1; i<8; i++) {
-		BEGIN_RING_CACHE(NvSub3D,
-		      NV50_TCL_PRIMITIVE_3D_VIEWPORT_CLIP_HORIZ(i), 2);
-        	OUT_RING_CACHE(0);
-	        OUT_RING_CACHE(0);
-	}
-
-	ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
-	      		    ctx->Scissor.Width, ctx->Scissor.Height);
-}
-
-static GLboolean nv50InitCard(nouveauContextPtr nmesa)
-{
-	int i,j;
-
-	nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
-
-	BEGIN_RING_SIZE(NvSub3D, 0x1558, 1);
-	OUT_RING(1);
-
-	BEGIN_RING_SIZE(NvSub3D, NV50_TCL_PRIMITIVE_3D_SET_OBJECT_1(0), 8);
-	for (i=0; i<8; i++) {
-		OUT_RING(NvDmaFB);
-	}
-
-	BEGIN_RING_SIZE(NvSub3D, NV50_TCL_PRIMITIVE_3D_SET_OBJECT_0(0), 12);
-	for (i=0; i<12; i++) {
-		OUT_RING(NvDmaFB);
-	}
-
-	BEGIN_RING_SIZE(NvSub3D, 0x121c, 1);
-	OUT_RING(1);
-
-	for (i=0; i<8; i++) {
-		BEGIN_RING_SIZE(NvSub3D, 0x0200 + (i*0x20), 5);
-		for (j=0; j<5; j++) {
-			OUT_RING(0);
-		}
-	}
-
-	BEGIN_RING_SIZE(NvSub3D, 0x0fe0, 5);
-	OUT_RING(0);
-	OUT_RING(0);
-	OUT_RING(0x16);
-	OUT_RING(0);
-	OUT_RING(0);
-
-	return GL_FALSE;
-}
-
-static GLboolean nv50BindBuffers(nouveauContextPtr nmesa, int num_color,
-      				 nouveau_renderbuffer **color,
-				 nouveau_renderbuffer *depth)
-{
-	return GL_FALSE;
-}
-
-void nv50InitStateFuncs(GLcontext *ctx, struct dd_function_table *func)
-{
-	nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx);
-
-	func->AlphaFunc			= nv50AlphaFunc;
-	func->BlendColor		= nv50BlendColor;
-	func->BlendEquationSeparate	= nv50BlendEquationSeparate;
-	func->BlendFuncSeparate		= nv50BlendFuncSeparate;
-	func->Clear			= nv50Clear;
-	func->ClearColor		= nv50ClearColor;
-	func->ClearDepth		= nv50ClearDepth;
-	func->ClearStencil		= nv50ClearStencil;
-	func->ClipPlane			= nv50ClipPlane;
-	func->ColorMask			= nv50ColorMask;
-	func->ColorMaterial		= nv50ColorMaterial;
-	func->CullFace			= nv50CullFace;
-	func->FrontFace			= nv50FrontFace;
-	func->DepthFunc			= nv50DepthFunc;
-	func->DepthMask			= nv50DepthMask;
-	func->DepthRange		= nv50DepthRange;
-	func->Enable			= nv50Enable;
-	func->Fogfv			= nv50Fogfv;
-	func->Hint			= nv50Hint;
-	func->Lightfv			= nv50Lightfv;
-/*	func->LightModelfv		= nv50LightModelfv;	 */
-	func->LineStipple		= nv50LineStipple;
-	func->LineWidth			= nv50LineWidth;
-	func->LogicOpcode		= nv50LogicOpcode;
-	func->PointParameterfv		= nv50PointParameterfv;
-	func->PointSize			= nv50PointSize;
-	func->PolygonMode		= nv50PolygonMode;
-	func->PolygonOffset		= nv50PolygonOffset;
-	func->PolygonStipple		= nv50PolygonStipple;
-/*	func->ReadBuffer		= nv50ReadBuffer;	*/
-/*	func->RenderMode		= nv50RenderMode;	*/
-	func->Scissor			= nv50Scissor;
-	func->ShadeModel		= nv50ShadeModel;
-	func->StencilFuncSeparate	= nv50StencilFuncSeparate;
-	func->StencilMaskSeparate	= nv50StencilMaskSeparate;
-	func->StencilOpSeparate		= nv50StencilOpSeparate;
-/*	func->TexGen			= nv50TexGen;		*/
-/*	func->TexParameter		= nv50TexParameter;	*/
-	func->TextureMatrix		= nv50TextureMatrix;
-
-	nmesa->hw_func.InitCard		= nv50InitCard;
-	nmesa->hw_func.BindBuffers	= nv50BindBuffers;
-	nmesa->hw_func.WindowMoved	= nv50WindowMoved;
-}
diff --git a/src/mesa/drivers/dri/r128/r128_context.c b/src/mesa/drivers/dri/r128/r128_context.c
index dfc89a2da76..535a98cc01f 100644
--- a/src/mesa/drivers/dri/r128/r128_context.c
+++ b/src/mesa/drivers/dri/r128/r128_context.c
@@ -32,12 +32,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-#include "glheader.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -253,7 +253,7 @@ GLboolean r128CreateContext( const __GLcontextModes *glVisual,
    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 
    driInitExtensions( ctx, card_extensions, GL_TRUE );
-   if (sPriv->drmMinor >= 4)
+   if (sPriv->drm_version.minor >= 4)
       _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
 
    r128InitTriFuncs( ctx );
@@ -261,9 +261,6 @@ GLboolean r128CreateContext( const __GLcontextModes *glVisual,
    r128DDInitSpanFuncs( ctx );
    r128DDInitState( rmesa );
 
-   rmesa->vblank_flags = (rmesa->r128Screen->irq != 0)
-       ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-
    driContextPriv->driverPrivate = (void *)rmesa;
 
 #if DO_DEBUG
@@ -346,8 +343,13 @@ r128MakeCurrent( __DRIcontextPrivate *driContextPriv,
 	 newR128Ctx->dirty = R128_UPLOAD_ALL;
       }
 
-      driDrawableInitVBlank( driDrawPriv, newR128Ctx->vblank_flags,
-			     &newR128Ctx->vbl_seq );
+      if (driDrawPriv->swap_interval == (unsigned)-1) {
+	 driDrawPriv->vblFlags = (newR128Ctx->r128Screen->irq != 0)
+	    ? driGetDefaultVBlankFlags(&newR128Ctx->optionCache)
+	    : VBLANK_FLAG_NO_IRQ;
+
+	 driDrawableInitVBlank( driDrawPriv );
+      }
       newR128Ctx->driDrawable = driDrawPriv;
 
       _mesa_make_current( newR128Ctx->glCtx,
diff --git a/src/mesa/drivers/dri/r128/r128_context.h b/src/mesa/drivers/dri/r128/r128_context.h
index 1d10cb0b4fe..0e10209a6ad 100644
--- a/src/mesa/drivers/dri/r128/r128_context.h
+++ b/src/mesa/drivers/dri/r128/r128_context.h
@@ -39,7 +39,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "drm.h"
 #include "r128_drm.h"
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "tnl/t_vertex.h"
 
 #include "r128_reg.h"
@@ -209,11 +209,6 @@ struct r128_context {
    GLuint c_textureBytes;
    GLuint c_vertexBuffers;
 
-   /* VBI
-    */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
-
    /* Configuration cache
     */
    driOptionCache optionCache;
diff --git a/src/mesa/drivers/dri/r128/r128_dd.c b/src/mesa/drivers/dri/r128/r128_dd.c
index d8e1c70ab77..dfe47f2dd64 100644
--- a/src/mesa/drivers/dri/r128/r128_dd.c
+++ b/src/mesa/drivers/dri/r128/r128_dd.c
@@ -38,8 +38,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_dd.h"
 #include "swrast/swrast.h"
 
-#include "context.h"
-#include "framebuffer.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.c b/src/mesa/drivers/dri/r128/r128_ioctl.c
index dcb5d10459e..84ac3d9f797 100644
--- a/src/mesa/drivers/dri/r128/r128_ioctl.c
+++ b/src/mesa/drivers/dri/r128/r128_ioctl.c
@@ -36,8 +36,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_context.h"
 #include "r128_state.h"
 #include "r128_ioctl.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/imports.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 
@@ -248,7 +248,7 @@ static int r128WaitForFrameCompletion( r128ContextPtr rmesa )
 
 /* Copy the back color buffer to the front color buffer.
  */
-void r128CopyBuffer( const __DRIdrawablePrivate *dPriv )
+void r128CopyBuffer( __DRIdrawablePrivate *dPriv )
 {
    r128ContextPtr rmesa;
    GLint nbox, i, ret;
@@ -281,7 +281,7 @@ void r128CopyBuffer( const __DRIdrawablePrivate *dPriv )
    }
 
    UNLOCK_HARDWARE( rmesa );
-   driWaitForVBlank( dPriv, &rmesa->vbl_seq, rmesa->vblank_flags, &missed_target );
+   driWaitForVBlank( dPriv, &missed_target );
    LOCK_HARDWARE( rmesa );
 
    nbox = dPriv->numClipRects;	/* must be in locked region */
@@ -327,7 +327,7 @@ void r128CopyBuffer( const __DRIdrawablePrivate *dPriv )
 #endif
 }
 
-void r128PageFlip( const __DRIdrawablePrivate *dPriv )
+void r128PageFlip( __DRIdrawablePrivate *dPriv )
 {
    r128ContextPtr rmesa;
    GLint ret;
@@ -358,7 +358,7 @@ void r128PageFlip( const __DRIdrawablePrivate *dPriv )
    }
 
    UNLOCK_HARDWARE( rmesa );
-   driWaitForVBlank( dPriv, &rmesa->vbl_seq, rmesa->vblank_flags, &missed_target );
+   driWaitForVBlank( dPriv, &missed_target );
    LOCK_HARDWARE( rmesa );
 
    /* The kernel will have been initialized to perform page flipping
diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.h b/src/mesa/drivers/dri/r128/r128_ioctl.h
index 52ae3a293f8..4b0c9cdc7fe 100644
--- a/src/mesa/drivers/dri/r128/r128_ioctl.h
+++ b/src/mesa/drivers/dri/r128/r128_ioctl.h
@@ -44,7 +44,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 extern drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa );
 extern void r128FlushVerticesLocked( r128ContextPtr rmesa );
 
-static __inline void *r128AllocDmaLow( r128ContextPtr rmesa, int count,
+static INLINE void *r128AllocDmaLow( r128ContextPtr rmesa, int count,
 				       int vert_size )
 {
    uint32_t *head;
@@ -85,8 +85,8 @@ extern void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 extern void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 				       const GLint x[], const GLint y[] );
 
-extern void r128CopyBuffer( const __DRIdrawablePrivate *dPriv );
-extern void r128PageFlip( const __DRIdrawablePrivate *dPriv );
+extern void r128CopyBuffer( __DRIdrawablePrivate *dPriv );
+extern void r128PageFlip( __DRIdrawablePrivate *dPriv );
 void r128WaitForVBlank( r128ContextPtr rmesa );
 
 extern void r128WaitForIdleLocked( r128ContextPtr rmesa );
diff --git a/src/mesa/drivers/dri/r128/r128_lock.c b/src/mesa/drivers/dri/r128/r128_lock.c
index 3478e12ad07..81488a27424 100644
--- a/src/mesa/drivers/dri/r128/r128_lock.c
+++ b/src/mesa/drivers/dri/r128/r128_lock.c
@@ -58,7 +58,7 @@ r128UpdatePageFlipping( r128ContextPtr rmesa )
    rmesa->new_state |= R128_NEW_WINDOW;
 }
 
-/* Update the hardware state.  This is called if another context has
+/* Update the hardware state.  This is called if another main/context.has
  * grabbed the hardware lock, which includes the X server.  This
  * function also updates the driver's window state after the X server
  * moves, resizes or restacks a window -- the change will be reflected
diff --git a/src/mesa/drivers/dri/r128/r128_screen.c b/src/mesa/drivers/dri/r128/r128_screen.c
index 1e9616272f0..cb3a147dbac 100644
--- a/src/mesa/drivers/dri/r128/r128_screen.c
+++ b/src/mesa/drivers/dri/r128/r128_screen.c
@@ -39,10 +39,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_span.h"
 #include "r128_tris.h"
 
-#include "context.h"
-#include "imports.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/context.h"
+#include "main/imports.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "utils.h"
 #include "vblank.h"
@@ -97,9 +97,7 @@ r128CreateScreen( __DRIscreenPrivate *sPriv )
 {
    r128ScreenPtr r128Screen;
    R128DRIPtr r128DRIPriv = (R128DRIPtr)sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
+   int i;
 
    if (sPriv->devPrivSize != sizeof(R128DRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(R128DRIRec) does not match passed size from device driver\n");
@@ -120,7 +118,7 @@ r128CreateScreen( __DRIscreenPrivate *sPriv )
    r128Screen->IsPCI = r128DRIPriv->IsPCI;
    r128Screen->sarea_priv_offset = r128DRIPriv->sarea_priv_offset;
    
-   if (sPriv->drmMinor >= 3) {
+   if (sPriv->drm_version.minor >= 3) {
       drm_r128_getparam_t gp;
       int ret;
 
@@ -225,15 +223,14 @@ r128CreateScreen( __DRIscreenPrivate *sPriv )
 
    r128Screen->driScreen = sPriv;
 
-   if ( glx_enable_extension != NULL ) {
-      if ( r128Screen->irq != 0 ) {
-	 (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-	 (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-	 (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      }
-
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
+   i = 0;
+   r128Screen->extensions[i++] = &driFrameTrackingExtension.base;
+   if ( r128Screen->irq != 0 ) {
+       r128Screen->extensions[i++] = &driSwapControlExtension.base;
+       r128Screen->extensions[i++] = &driMediaStreamCounterExtension.base;
    }
+   r128Screen->extensions[i++] = NULL;
+   sPriv->extensions = r128Screen->extensions;
 
    return r128Screen;
 }
@@ -401,37 +398,18 @@ r128InitDriver( __DRIscreenPrivate *sPriv )
    return GL_TRUE;
 }
 
-
-static struct __DriverAPIRec r128API = {
-   .InitDriver      = r128InitDriver,
-   .DestroyScreen   = r128DestroyScreen,
-   .CreateContext   = r128CreateContext,
-   .DestroyContext  = r128DestroyContext,
-   .CreateBuffer    = r128CreateBuffer,
-   .DestroyBuffer   = r128DestroyBuffer,
-   .SwapBuffers     = r128SwapBuffers,
-   .MakeCurrent     = r128MakeCurrent,
-   .UnbindContext   = r128UnbindContext,
-   .GetSwapInfo     = NULL,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL
-
-};
-
-
-static __GLcontextModes *
-r128FillInModes( unsigned pixel_bits, unsigned depth_bits,
+static const __DRIconfig **
+r128FillInModes( __DRIscreenPrivate *psp,
+		 unsigned pixel_bits, unsigned depth_bits,
 		 unsigned stencil_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
+    __DRIconfig **configs;
     __GLcontextModes * m;
-    unsigned num_modes;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     GLenum fb_format;
     GLenum fb_type;
+    int i;
 
     /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
      * enough to add support.  Basically, if a context is created with an
@@ -459,8 +437,6 @@ r128FillInModes( unsigned pixel_bits, unsigned depth_bits,
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -470,97 +446,85 @@ r128FillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
-
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
+   configs = driCreateConfigs(fb_format, fb_type,
+			      depth_bits_array, stencil_bits_array,
+			      depth_buffer_factor, back_buffer_modes,
+			      back_buffer_factor);
+   if (configs == NULL) {
+    fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+              __LINE__);
+      return NULL;
+   }
 
-    /* Mark the visual as slow if there are "fake" stencil bits.
-     */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
-	    m->visualRating = GLX_SLOW_CONFIG;
-	}
-    }
+   /* Mark the visual as slow if there are "fake" stencil bits.
+    */
+   for (i = 0; configs[i]; i++) {
+      m = &configs[i]->modes;
+      if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
+         m->visualRating = GLX_SLOW_CONFIG;
+      }
+   }
 
-    return modes;
+   return (const __DRIconfig **) configs;
 }
 
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
+static const __DRIconfig **
+r128InitScreen(__DRIscreenPrivate *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 4, 0, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 2, 2, 0 };
-
-
-   dri_interface = interface;
+   R128DRIPtr dri_priv = (R128DRIPtr) psp->pDevPriv;
 
    if ( ! driCheckDriDdxDrmVersions2( "Rage128",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
-      
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &r128API);
-   if ( psp != NULL ) {
-      R128DRIPtr dri_priv = (R128DRIPtr) psp->pDevPriv;
-      *driver_modes = r128FillInModes( dri_priv->bpp,
-				       (dri_priv->bpp == 16) ? 16 : 24,
-				       (dri_priv->bpp == 16) ? 0  : 8,
-				       (dri_priv->backOffset != dri_priv->depthOffset) );
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
 
-   return (void *) psp;
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+   if (!r128InitDriver(psp))
+       return NULL;
+
+   return r128FillInModes( psp,
+			   dri_priv->bpp,
+			   (dri_priv->bpp == 16) ? 16 : 24,
+			   (dri_priv->bpp == 16) ? 0  : 8,
+			   (dri_priv->backOffset != dri_priv->depthOffset) );
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = r128InitScreen,
+   .DestroyScreen   = r128DestroyScreen,
+   .CreateContext   = r128CreateContext,
+   .DestroyContext  = r128DestroyContext,
+   .CreateBuffer    = r128CreateBuffer,
+   .DestroyBuffer   = r128DestroyBuffer,
+   .SwapBuffers     = r128SwapBuffers,
+   .MakeCurrent     = r128MakeCurrent,
+   .UnbindContext   = r128UnbindContext,
+   .GetSwapInfo     = NULL,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL
+};
diff --git a/src/mesa/drivers/dri/r128/r128_screen.h b/src/mesa/drivers/dri/r128/r128_screen.h
index b31e87661b5..e2fa1677c9f 100644
--- a/src/mesa/drivers/dri/r128/r128_screen.h
+++ b/src/mesa/drivers/dri/r128/r128_screen.h
@@ -77,6 +77,8 @@ typedef struct {
    /* Configuration cache with default values for all contexts */
    driOptionCache optionCache;
 
+   const __DRIextension *extensions[4];
+
 } r128ScreenRec, *r128ScreenPtr;
 
 
diff --git a/src/mesa/drivers/dri/r128/r128_span.c b/src/mesa/drivers/dri/r128/r128_span.c
index c5b6480db9e..dd177e0def5 100644
--- a/src/mesa/drivers/dri/r128/r128_span.c
+++ b/src/mesa/drivers/dri/r128/r128_span.c
@@ -130,6 +130,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* 16-bit depth buffer functions
  */
+#define VALUE_TYPE GLushort
 
 #define WRITE_DEPTH_SPAN()						\
 do {									\
@@ -206,6 +207,8 @@ do {									\
 
 /* 24-bit depth, 8-bit stencil buffer functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH_SPAN()						\
 do {									\
    GLuint buf[n];							\
diff --git a/src/mesa/drivers/dri/r128/r128_state.c b/src/mesa/drivers/dri/r128/r128_state.c
index 58c3a27ee83..451dcd1b553 100644
--- a/src/mesa/drivers/dri/r128/r128_state.c
+++ b/src/mesa/drivers/dri/r128/r128_state.c
@@ -39,9 +39,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_tris.h"
 #include "r128_tex.h"
 
-#include "context.h"
-#include "enums.h"
-#include "colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -812,7 +812,7 @@ static void r128UpdateWindow( GLcontext *ctx )
    r128ContextPtr rmesa = R128_CONTEXT(ctx);
    int x = rmesa->driDrawable->x;
    int y = rmesa->driDrawable->y;
-   struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0][0];
+   struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
    driRenderbuffer *drb = (driRenderbuffer *) rb;
 
    rmesa->setup.window_xy_offset = (((y & 0xFFF) << R128_WINDOW_Y_SHIFT) |
@@ -896,18 +896,22 @@ static void r128DDDrawBuffer( GLcontext *ctx, GLenum mode )
 
    FLUSH_BATCH( rmesa );
 
-   /*
-    * _ColorDrawBufferMask is easier to cope with than <mode>.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
-   case BUFFER_BIT_BACK_LEFT:
-      FALLBACK( rmesa, R128_FALLBACK_DRAW_BUFFER, GL_FALSE );
-      break;
-   default:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
       /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( rmesa, R128_FALLBACK_DRAW_BUFFER, GL_TRUE );
-      break;
+      return;
+   }
+   else {
+      switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+      case BUFFER_FRONT_LEFT:
+      case BUFFER_BACK_LEFT:
+         FALLBACK( rmesa, R128_FALLBACK_DRAW_BUFFER, GL_FALSE );
+         break;
+      default:
+         /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
+         FALLBACK( rmesa, R128_FALLBACK_DRAW_BUFFER, GL_TRUE );
+         break;
+      }
    }
 
    rmesa->new_state |= R128_NEW_WINDOW;
diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c
index 5712351b037..3fc9c06cfa2 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.c
+++ b/src/mesa/drivers/dri/r128/r128_tex.c
@@ -39,17 +39,17 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_tex.h"
 #include "r128_texobj.h"
 
-#include "context.h"
-#include "macros.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texobj.h"
-#include "imports.h"
-#include "colormac.h"
-#include "texobj.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/texobj.h"
 
 #include "xmlpool.h"
 
diff --git a/src/mesa/drivers/dri/r128/r128_tex.h b/src/mesa/drivers/dri/r128/r128_tex.h
index e863436f4b2..7df8decf76b 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.h
+++ b/src/mesa/drivers/dri/r128/r128_tex.h
@@ -67,9 +67,9 @@ extern void r128InitTextureFuncs( struct dd_function_table *functions );
 #define R128PACKCOLOR4444( r, g, b, a )					\
    ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
 
-static __inline__ uint32_t r128PackColor( GLuint cpp,
-					GLubyte r, GLubyte g,
-					GLubyte b, GLubyte a )
+static INLINE uint32_t r128PackColor( GLuint cpp,
+                                       GLubyte r, GLubyte g,
+                                       GLubyte b, GLubyte a )
 {
     switch ( cpp ) {
     case 2:
diff --git a/src/mesa/drivers/dri/r128/r128_texmem.c b/src/mesa/drivers/dri/r128/r128_texmem.c
index af510a38c95..111fe1fd742 100644
--- a/src/mesa/drivers/dri/r128/r128_texmem.c
+++ b/src/mesa/drivers/dri/r128/r128_texmem.c
@@ -38,11 +38,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_tris.h"
 #include "r128_tex.h"
 
-#include "context.h"
-#include "macros.h"
-#include "simple_list.h"
-#include "texformat.h"
-#include "imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
+#include "main/imports.h"
 
 #define TEX_0	1
 #define TEX_1	2
diff --git a/src/mesa/drivers/dri/r128/r128_texobj.h b/src/mesa/drivers/dri/r128/r128_texobj.h
index 8a0596eea8e..efbbb2df781 100644
--- a/src/mesa/drivers/dri/r128/r128_texobj.h
+++ b/src/mesa/drivers/dri/r128/r128_texobj.h
@@ -35,7 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef _R128_TEXOBJ_H_
 #define _R128_TEXOBJ_H_
 
-#include "mm.h"
+#include "main/mm.h"
 
 /* Individual texture image information.
  */
diff --git a/src/mesa/drivers/dri/r128/r128_texstate.c b/src/mesa/drivers/dri/r128/r128_texstate.c
index 211b9ea2a97..a9c9568003b 100644
--- a/src/mesa/drivers/dri/r128/r128_texstate.c
+++ b/src/mesa/drivers/dri/r128/r128_texstate.c
@@ -32,11 +32,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Brian Paul <brianp@valinux.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
 
 #include "r128_context.h"
 #include "r128_state.h"
diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c
index f2f124360c3..bcc9ffa651e 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.c
+++ b/src/mesa/drivers/dri/r128/r128_tris.c
@@ -33,10 +33,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/r128/r128_tris.h b/src/mesa/drivers/dri/r128/r128_tris.h
index c8f0a4809b9..d90ca31534e 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.h
+++ b/src/mesa/drivers/dri/r128/r128_tris.h
@@ -35,7 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R128_TRIS_H__
 #define __R128_TRIS_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void r128InitTriFuncs( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index c1d51e87001..e1633772a18 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -31,12 +31,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "macros.h"
-#include "context.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
-#include "simple_list.h"
+#include "main/simple_list.h"
 
 #include "r200_context.h"
 #include "r200_state.h"
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 5a178442bdb..5531e0a7399 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -32,15 +32,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "api_arrayelt.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "state.h"
+#include "main/glheader.h"
+#include "main/api_arrayelt.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/state.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -69,6 +69,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define need_GL_ATI_fragment_shader
 #define need_GL_EXT_blend_minmax
 #define need_GL_EXT_fog_coord
+#define need_GL_EXT_multi_draw_arrays
 #define need_GL_EXT_secondary_color
 #define need_GL_EXT_blend_equation_separate
 #define need_GL_EXT_blend_func_separate
@@ -132,6 +133,7 @@ const struct dri_extension card_extensions[] =
     { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
     { "GL_EXT_blend_subtract",             NULL },
     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
+    { "GL_EXT_multi_draw_arrays",          GL_EXT_multi_draw_arrays_functions },
     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
     { "GL_EXT_stencil_wrap",               NULL },
     { "GL_EXT_texture_edge_clamp",         NULL },
@@ -277,14 +279,14 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
                                                  "def_max_anisotropy");
 
    if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
-      if ( sPriv->drmMinor < 13 )
+      if ( sPriv->drm_version.minor < 13 )
 	 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
-			  "disabling.\n",sPriv->drmMinor );
+			  "disabling.\n", sPriv->drm_version.minor );
       else
 	 rmesa->using_hyperz = GL_TRUE;
    }
  
-   if ( sPriv->drmMinor >= 15 )
+   if ( sPriv->drm_version.minor >= 15 )
       rmesa->texmicrotile = GL_TRUE;
 
    /* Init default driver functions then plug in our R200-specific functions
@@ -317,7 +319,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    rmesa->dri.hwContext = driContextPriv->hHWContext;
    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
    rmesa->dri.fd = sPriv->fd;
-   rmesa->dri.drmMinor = sPriv->drmMinor;
+   rmesa->dri.drmMinor = sPriv->drm_version.minor;
 
    rmesa->r200Screen = screen;
    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
@@ -499,13 +501,10 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
 	      fthrottle_mode,
 	      rmesa->r200Screen->irq);
 
-   rmesa->vblank_flags = (rmesa->r200Screen->irq != 0)
-       ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-
    rmesa->prefer_gart_client_texturing = 
       (getenv("R200_GART_CLIENT_TEXTURES") != 0);
 
-   (*dri_interface->getUST)( & rmesa->swap_ust );
+   (*sPriv->systemTime->getUST)( & rmesa->swap_ust );
 
 
 #if DO_DEBUG
@@ -666,15 +665,18 @@ r200MakeCurrent( __DRIcontextPrivate *driContextPriv,
       if (R200_DEBUG & DEBUG_DRI)
 	 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *)newCtx->glCtx);
 
-      if ( newCtx->dri.drawable != driDrawPriv ) {
-	 driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags,
-				&newCtx->vbl_seq );
-      }
-
       newCtx->dri.readable = driReadPriv;
 
       if ( newCtx->dri.drawable != driDrawPriv ||
            newCtx->lastStamp != driDrawPriv->lastStamp ) {
+	 if (driDrawPriv->swap_interval == (unsigned)-1) {
+	    driDrawPriv->vblFlags = (newCtx->r200Screen->irq != 0)
+	       ? driGetDefaultVBlankFlags(&newCtx->optionCache)
+	       : VBLANK_FLAG_NO_IRQ;
+
+	    driDrawableInitVBlank( driDrawPriv );
+	 }
+
 	 newCtx->dri.drawable = driDrawPriv;
 
 	 r200SetCliprects(newCtx);
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index bec09e8ef6a..14a1dda46ac 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -41,9 +41,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "dri_util.h"
 #include "texmem.h"
 
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
 #include "r200_reg.h"
 #include "r200_vertprog.h"
 
@@ -63,7 +63,7 @@ typedef union { GLfloat f; uint32_t ui32; } float_ui32_type;
 
 #include "r200_lock.h"
 #include "radeon_screen.h"
-#include "mm.h"
+#include "main/mm.h"
 
 /* Flags for software fallback cases */
 /* See correponding strings in r200_swtcl.c */
@@ -179,6 +179,7 @@ struct r200_tex_obj {
 
    drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 					/* Six, for the cube faces */
+   GLboolean image_override;		/* Image overridden by GLX_EXT_tfp */
 
    GLuint pp_txfilter;		        /* hardware register values */
    GLuint pp_txformat;
@@ -892,11 +893,8 @@ struct r200_context {
    GLuint TexGenCompSel;
    GLmatrix tmpmat;
 
-   /* VBI / buffer swap
+   /* buffer swap
     */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
-
    int64_t swap_ust;
    int64_t swap_missed_ust;
 
@@ -929,7 +927,7 @@ struct r200_context {
 #define R200_CONTEXT(ctx)		((r200ContextPtr)(ctx->DriverCtx))
 
 
-static __inline GLuint r200PackColor( GLuint cpp,
+static INLINE GLuint r200PackColor( GLuint cpp,
 					GLubyte r, GLubyte g,
 					GLubyte b, GLubyte a )
 {
diff --git a/src/mesa/drivers/dri/r200/r200_fragshader.c b/src/mesa/drivers/dri/r200/r200_fragshader.c
index 5dd3adaef69..d514b28219a 100644
--- a/src/mesa/drivers/dri/r200/r200_fragshader.c
+++ b/src/mesa/drivers/dri/r200/r200_fragshader.c
@@ -24,13 +24,13 @@
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  **************************************************************************/
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
 
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "tnl/t_context.h"
-#include "atifragshader.h"
-#include "program.h"
+#include "shader/atifragshader.h"
+#include "shader/program.h"
 #include "r200_context.h"
 #include "r200_ioctl.h"
 #include "r200_tex.h"
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index ed57defb498..0741e57af71 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -35,10 +35,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <sched.h>
 #include <errno.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "macros.h"
-#include "context.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
 
 #include "r200_context.h"
@@ -419,13 +419,14 @@ static void r200WaitForFrameCompletion( r200ContextPtr rmesa )
 
 /* Copy the back color buffer to the front color buffer.
  */
-void r200CopyBuffer( const __DRIdrawablePrivate *dPriv,
+void r200CopyBuffer( __DRIdrawablePrivate *dPriv,
 		      const drm_clip_rect_t	 *rect)
 {
    r200ContextPtr rmesa;
    GLint nbox, i, ret;
    GLboolean   missed_target;
    int64_t ust;
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -449,7 +450,7 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv,
    if (!rect)
    {
        UNLOCK_HARDWARE( rmesa );
-       driWaitForVBlank( dPriv, & rmesa->vbl_seq, rmesa->vblank_flags, & missed_target );
+       driWaitForVBlank( dPriv, & missed_target );
        LOCK_HARDWARE( rmesa );
    }
 
@@ -476,16 +477,18 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv,
 	     if (rect->y2 < b->y2)
 		 b->y2 = rect->y2;
 
-	     if (b->x1 < b->x2 && b->y1 < b->y2)
-		 b++;
+	     if (b->x1 >= b->x2 || b->y1 >= b->y2)
+		 continue;
 	  }
-	  else
-	      b++;
 
+	  b++;
 	  n++;
       }
       rmesa->sarea->nbox = n;
 
+      if (!n)
+	 continue;
+
       ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_SWAP );
 
       if ( ret ) {
@@ -501,7 +504,7 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv,
        rmesa->hw.all_dirty = GL_TRUE;
 
        rmesa->swap_count++;
-       (*dri_interface->getUST)( & ust );
+       (*psp->systemTime->getUST)( & ust );
        if ( missed_target ) {
 	   rmesa->swap_missed_count++;
 	   rmesa->swap_missed_ust = ust - rmesa->swap_ust;
@@ -513,11 +516,12 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv,
    }
 }
 
-void r200PageFlip( const __DRIdrawablePrivate *dPriv )
+void r200PageFlip( __DRIdrawablePrivate *dPriv )
 {
    r200ContextPtr rmesa;
    GLint ret;
    GLboolean   missed_target;
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -553,10 +557,10 @@ void r200PageFlip( const __DRIdrawablePrivate *dPriv )
     */
    r200WaitForFrameCompletion( rmesa );
    UNLOCK_HARDWARE( rmesa );
-   driWaitForVBlank( dPriv, & rmesa->vbl_seq, rmesa->vblank_flags, & missed_target );
+   driWaitForVBlank( dPriv, & missed_target );
    if ( missed_target ) {
       rmesa->swap_missed_count++;
-      (void) (*dri_interface->getUST)( & rmesa->swap_missed_ust );
+      (void) (*psp->systemTime->getUST)( & rmesa->swap_missed_ust );
    }
    LOCK_HARDWARE( rmesa );
 
@@ -570,7 +574,7 @@ void r200PageFlip( const __DRIdrawablePrivate *dPriv )
    }
 
    rmesa->swap_count++;
-   (void) (*dri_interface->getUST)( & rmesa->swap_ust );
+   (void) (*psp->systemTime->getUST)( & rmesa->swap_ust );
 
 #if 000
    if ( rmesa->sarea->pfCurrentPage == 1 ) {
@@ -857,7 +861,7 @@ void r200Finish( GLcontext *ctx )
  * the kernel data structures, and the current context to get the
  * device fd.
  */
-void *r200AllocateMemoryMESA(__DRInativeDisplay *dpy, int scrn, GLsizei size,
+void *r200AllocateMemoryMESA(__DRIscreen *screen, GLsizei size,
 			     GLfloat readfreq, GLfloat writefreq, 
 			     GLfloat priority)
 {
@@ -899,7 +903,7 @@ void *r200AllocateMemoryMESA(__DRInativeDisplay *dpy, int scrn, GLsizei size,
 
 
 /* Called via glXFreeMemoryMESA() */
-void r200FreeMemoryMESA(__DRInativeDisplay *dpy, int scrn, GLvoid *pointer)
+void r200FreeMemoryMESA(__DRIscreen *screen, GLvoid *pointer)
 {
    GET_CURRENT_CONTEXT(ctx);
    r200ContextPtr rmesa;
@@ -936,7 +940,7 @@ void r200FreeMemoryMESA(__DRInativeDisplay *dpy, int scrn, GLvoid *pointer)
 }
 
 /* Called via glXGetMemoryOffsetMESA() */
-GLuint r200GetMemoryOffsetMESA(__DRInativeDisplay *dpy, int scrn, const GLvoid *pointer)
+GLuint r200GetMemoryOffsetMESA(__DRIscreen *screen, const GLvoid *pointer)
 {
    GET_CURRENT_CONTEXT(ctx);
    r200ContextPtr rmesa;
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h
index 5ed1555f6a3..f7458e4a0ed 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.h
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.h
@@ -35,7 +35,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R200_IOCTL_H__
 #define __R200_IOCTL_H__
 
-#include "simple_list.h"
+#include "main/simple_list.h"
 #include "radeon_dri.h"
 #include "r200_lock.h"
 
@@ -89,19 +89,19 @@ extern void r200ReleaseDmaRegion( r200ContextPtr rmesa,
 				    struct r200_dma_region *region,
 				    const char *caller );
 
-extern void r200CopyBuffer( const __DRIdrawablePrivate *drawable,
+extern void r200CopyBuffer( __DRIdrawablePrivate *drawable,
 			    const drm_clip_rect_t      *rect);
-extern void r200PageFlip( const __DRIdrawablePrivate *drawable );
+extern void r200PageFlip( __DRIdrawablePrivate *drawable );
 extern void r200Flush( GLcontext *ctx );
 extern void r200Finish( GLcontext *ctx );
 extern void r200WaitForIdleLocked( r200ContextPtr rmesa );
 extern void r200WaitForVBlank( r200ContextPtr rmesa );
 extern void r200InitIoctlFuncs( struct dd_function_table *functions );
 
-extern void *r200AllocateMemoryMESA( __DRInativeDisplay *dpy, int scrn, GLsizei size, GLfloat readfreq,
+extern void *r200AllocateMemoryMESA( __DRIscreen *screen, GLsizei size, GLfloat readfreq,
 				   GLfloat writefreq, GLfloat priority );
-extern void r200FreeMemoryMESA( __DRInativeDisplay *dpy, int scrn, GLvoid *pointer );
-extern GLuint r200GetMemoryOffsetMESA( __DRInativeDisplay *dpy, int scrn, const GLvoid *pointer );
+extern void r200FreeMemoryMESA( __DRIscreen *screen, GLvoid *pointer );
+extern GLuint r200GetMemoryOffsetMESA( __DRIscreen *screen, const GLvoid *pointer );
 
 extern GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
 				   GLint size );
@@ -137,7 +137,7 @@ do {								\
    memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd,	\
 	   rmesa->hw.ATOM.cmd_size * 4)
 
-static __inline int R200_DB_STATECHANGE( 
+static INLINE int R200_DB_STATECHANGE( 
    r200ContextPtr rmesa,
    struct r200_state_atom *atom )
 {
@@ -183,7 +183,7 @@ do {							\
  * and hang on to the lock until the critical section is finished and we flush
  * the buffer again and unlock.
  */
-static __inline void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
+static INLINE void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
 {
    if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
       r200FlushCmdBuf( rmesa, __FUNCTION__ );
@@ -192,7 +192,7 @@ static __inline void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
 
 /* Alloc space in the command buffer
  */
-static __inline char *r200AllocCmdBuf( r200ContextPtr rmesa,
+static INLINE char *r200AllocCmdBuf( r200ContextPtr rmesa,
 					 int bytes, const char *where )
 {
    char * head;
diff --git a/src/mesa/drivers/dri/r200/r200_lock.c b/src/mesa/drivers/dri/r200/r200_lock.c
index f89b526a312..99661a4bfb4 100644
--- a/src/mesa/drivers/dri/r200/r200_lock.c
+++ b/src/mesa/drivers/dri/r200/r200_lock.c
@@ -60,7 +60,7 @@ r200UpdatePageFlipping( r200ContextPtr rmesa )
 
 
 
-/* Update the hardware state.  This is called if another context has
+/* Update the hardware state.  This is called if another main/context.has
  * grabbed the hardware lock, which includes the X server.  This
  * function also updates the driver's window state after the X server
  * moves, resizes or restacks a window -- the change will be reflected
diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
index 7bc05e2f0bd..8512b9af478 100644
--- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c
+++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
@@ -32,11 +32,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/imports.h"
+#include "main/macros.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "math/m_translate.h"
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c
index 2f5aab0744b..be68821dc1d 100644
--- a/src/mesa/drivers/dri/r200/r200_pixel.c
+++ b/src/mesa/drivers/dri/r200/r200_pixel.c
@@ -31,10 +31,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "enums.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 #include "swrast/swrast.h"
 
 #include "r200_context.h"
@@ -294,7 +294,7 @@ static void do_draw_pix( GLcontext *ctx,
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
    __DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
    drm_clip_rect_t *box = dPriv->pClipRects;
-   struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorDrawBuffers[0][0];
+   struct gl_renderbuffer *rb = ctx->ReadBuffer->_ColorDrawBuffers[0];
    driRenderbuffer *drb = (driRenderbuffer *) rb;
    int nbox = dPriv->numClipRects;
    int i;
@@ -382,13 +382,13 @@ r200TryDrawPixels( GLcontext *ctx,
    GLint pitch = unpack->RowLength ? unpack->RowLength : width;
    GLuint planemask;
    GLuint cpp = rmesa->r200Screen->cpp;
-   GLint size = width * pitch * cpp;
+   GLint size = height * pitch * cpp;
 
    if (R200_DEBUG & DEBUG_PIXEL)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
    /* check that we're drawing to exactly one color buffer */
-   if (ctx->DrawBuffer->_NumColorDrawBuffers[0] != 1)
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1)
      return GL_FALSE;
 
    switch (format) {
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c
index 00d2f65c998..36530c224e9 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.c
+++ b/src/mesa/drivers/dri/r200/r200_sanity.c
@@ -34,8 +34,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  
 #include <errno.h> 
 
-#include "glheader.h"
-#include "imports.h"
+#include "main/glheader.h"
+#include "main/imports.h"
 
 #include "r200_context.h"
 #include "r200_ioctl.h"
diff --git a/src/mesa/drivers/dri/r200/r200_span.c b/src/mesa/drivers/dri/r200/r200_span.c
index fe427bdcdec..9783678028a 100644
--- a/src/mesa/drivers/dri/r200/r200_span.c
+++ b/src/mesa/drivers/dri/r200/r200_span.c
@@ -32,10 +32,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
-#include "colormac.h"
 
 #include "r200_context.h"
 #include "r200_ioctl.h"
@@ -172,6 +172,7 @@ r200_mba_z16( driRenderbuffer *drb, GLint x, GLint y )
 
 /* 16-bit depth buffer functions
  */
+#define VALUE_TYPE GLushort
 
 #define WRITE_DEPTH( _x, _y, d )					\
    *(GLushort *)(buf + r200_mba_z16( drb, _x + xo, _y + yo )) = d;
@@ -185,6 +186,7 @@ r200_mba_z16( driRenderbuffer *drb, GLint x, GLint y )
 
 /* 24 bit depth, 8 bit stencil depthbuffer functions
  */
+#define VALUE_TYPE GLuint
 
 #define WRITE_DEPTH( _x, _y, d )					\
 do {									\
@@ -255,7 +257,7 @@ static void r200SpanRenderStart( GLcontext *ctx )
    {
       int p;
       driRenderbuffer *drb =
-	 (driRenderbuffer *) ctx->WinSysDrawBuffer->_ColorDrawBuffers[0][0];
+	 (driRenderbuffer *) ctx->WinSysDrawBuffer->_ColorDrawBuffers[0];
       volatile int *buf =
 	 (volatile int *)(rmesa->dri.screen->pFB + drb->offset);
       p = *buf;
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index e9d2d9a3cd1..0eaaaf69ac7 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -33,13 +33,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "api_arrayelt.h"
-#include "enums.h"
-#include "colormac.h"
-#include "light.h"
-#include "framebuffer.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/api_arrayelt.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/light.h"
+#include "main/framebuffer.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
@@ -1859,8 +1859,7 @@ void r200SetCliprects( r200ContextPtr rmesa )
    GLframebuffer *const draw_fb = (GLframebuffer*) drawable->driverPrivate;
    GLframebuffer *const read_fb = (GLframebuffer*) readable->driverPrivate;
 
-   if (draw_fb->_ColorDrawBufferMask[0]
-       == BUFFER_BIT_BACK_LEFT) {
+   if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BIT_BACK_LEFT) {
       /* Can't ignore 2d windows if we are page flipping.
        */
       if ( drawable->numBackClipRects == 0 || rmesa->doPageFlip ) {
@@ -1910,17 +1909,18 @@ static void r200DrawBuffer( GLcontext *ctx, GLenum mode )
 
    R200_FIREVERTICES(rmesa);	/* don't pipeline cliprect changes */
 
-   /*
-    * _ColorDrawBufferMask is easier to cope with than <mode>.
-    * Check for software fallback, update cliprects.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
-   case BUFFER_BIT_BACK_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      /* 0 (GL_NONE) buffers or multiple color drawing buffers */
+      FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
+   case BUFFER_BACK_LEFT:
       FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
    default:
-      /* 0 (GL_NONE) buffers or multiple color drawing buffers */
       FALLBACK( rmesa, R200_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
@@ -2445,11 +2445,11 @@ r200UpdateDrawBuffer(GLcontext *ctx)
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    driRenderbuffer *drb;
 
-   if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT) {
+   if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
       /* draw to front */
       drb = (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
    }
-   else if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) {
+   else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
       /* draw to back */
       drb = (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
    }
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 0c36cefc161..9e4677eda40 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -31,11 +31,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "enums.h"
-#include "colormac.h"
-#include "api_arrayelt.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/api_arrayelt.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index a1ea0198bee..b25f0282445 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -32,13 +32,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "enums.h"
-#include "image.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/imports.h"
+#include "main/macros.h"
 
 #include "swrast/s_context.h"
 #include "swrast/s_fog.h"
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.h b/src/mesa/drivers/dri/r200/r200_swtcl.h
index 7458c549288..8c29fd0c999 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.h
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.h
@@ -34,7 +34,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R200_SWTCL_H__
 #define __R200_SWTCL_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 #include "r200_context.h"
 
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index 2ad35d43906..99aecfe1e90 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -32,12 +32,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "enums.h"
-#include "colormac.h"
-#include "light.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/colormac.h"
+#include "main/light.h"
 
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -488,7 +488,7 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index e7a37dd4c99..5a4db33f441 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -31,18 +31,19 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "colormac.h"
-#include "context.h"
-#include "enums.h"
-#include "image.h"
-#include "simple_list.h"
-#include "texformat.h"
-#include "texstore.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+
 #include "texmem.h"
-#include "teximage.h"
-#include "texobj.h"
 
 #include "r200_context.h"
 #include "r200_state.h"
@@ -102,37 +103,39 @@ static void r200SetTexWrap( r200TexObjPtr t, GLenum swrap, GLenum twrap, GLenum
       _mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
    }
 
-   switch ( twrap ) {
-   case GL_REPEAT:
-      t->pp_txfilter |= R200_CLAMP_T_WRAP;
-      break;
-   case GL_CLAMP:
-      t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
-      is_clamp = GL_TRUE;
-      break;
-   case GL_CLAMP_TO_EDGE:
-      t->pp_txfilter |= R200_CLAMP_T_CLAMP_LAST;
-      break;
-   case GL_CLAMP_TO_BORDER:
-      t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
-      is_clamp_to_border = GL_TRUE;
-      break;
-   case GL_MIRRORED_REPEAT:
-      t->pp_txfilter |= R200_CLAMP_T_MIRROR;
-      break;
-   case GL_MIRROR_CLAMP_EXT:
-      t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
-      is_clamp = GL_TRUE;
-      break;
-   case GL_MIRROR_CLAMP_TO_EDGE_EXT:
-      t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_LAST;
-      break;
-   case GL_MIRROR_CLAMP_TO_BORDER_EXT:
-      t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
-      is_clamp_to_border = GL_TRUE;
-      break;
-   default:
-      _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
+   if (t->base.tObj->Target != GL_TEXTURE_1D) {
+      switch ( twrap ) {
+      case GL_REPEAT:
+         t->pp_txfilter |= R200_CLAMP_T_WRAP;
+         break;
+      case GL_CLAMP:
+         t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
+         is_clamp = GL_TRUE;
+         break;
+      case GL_CLAMP_TO_EDGE:
+         t->pp_txfilter |= R200_CLAMP_T_CLAMP_LAST;
+         break;
+      case GL_CLAMP_TO_BORDER:
+         t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
+         is_clamp_to_border = GL_TRUE;
+         break;
+      case GL_MIRRORED_REPEAT:
+         t->pp_txfilter |= R200_CLAMP_T_MIRROR;
+         break;
+      case GL_MIRROR_CLAMP_EXT:
+         t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
+         is_clamp = GL_TRUE;
+         break;
+      case GL_MIRROR_CLAMP_TO_EDGE_EXT:
+         t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_LAST;
+         break;
+      case GL_MIRROR_CLAMP_TO_BORDER_EXT:
+         t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
+         is_clamp_to_border = GL_TRUE;
+         break;
+      default:
+         _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
+      }
    }
 
    t->pp_txformat_x &= ~R200_CLAMP_Q_MASK;
diff --git a/src/mesa/drivers/dri/r200/r200_tex.h b/src/mesa/drivers/dri/r200/r200_tex.h
index e6c0e00eb07..10ff8e8a660 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.h
+++ b/src/mesa/drivers/dri/r200/r200_tex.h
@@ -35,6 +35,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R200_TEX_H__
 #define __R200_TEX_H__
 
+extern void r200SetTexOffset(__DRIcontext *pDRICtx, GLint texname,
+			     unsigned long long offset, GLint depth,
+			     GLuint pitch);
+
 extern void r200UpdateTextureState( GLcontext *ctx );
 
 extern int r200UploadTexImages( r200ContextPtr rmesa, r200TexObjPtr t, GLuint face );
diff --git a/src/mesa/drivers/dri/r200/r200_texmem.c b/src/mesa/drivers/dri/r200/r200_texmem.c
index d926313d576..3b81ac0c802 100644
--- a/src/mesa/drivers/dri/r200/r200_texmem.c
+++ b/src/mesa/drivers/dri/r200/r200_texmem.c
@@ -37,11 +37,11 @@ SOFTWARE.
  
 #include <errno.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "colormac.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 #include "r200_context.h"
 #include "r200_ioctl.h"
 #include "r200_tex.h"
@@ -181,7 +181,8 @@ static void r200UploadRectSubImage( r200ContextPtr rmesa,
       /* In this case, could also use GART texturing.  This is
        * currently disabled, but has been tested & works.
        */
-      t->pp_txoffset = r200GartOffsetFromVirtual( rmesa, texImage->Data );
+      if ( !t->image_override )
+         t->pp_txoffset = r200GartOffsetFromVirtual( rmesa, texImage->Data );
       t->pp_txpitch = texImage->RowStride * texFormat->TexelBytes - 32;
 
       if (R200_DEBUG & DEBUG_TEXTURE)
@@ -467,7 +468,7 @@ int r200UploadTexImages( r200ContextPtr rmesa, r200TexObjPtr t, GLuint face )
 	       t->base.firstLevel, t->base.lastLevel );
    }
 
-   if ( !t || t->base.totalSize == 0 )
+   if ( !t || t->base.totalSize == 0 || t->image_override )
       return 0;
 
    if (R200_DEBUG & DEBUG_SYNC) {
diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
index ae02ec4b638..3f9a2f4ac1b 100644
--- a/src/mesa/drivers/dri/r200/r200_texstate.c
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c
@@ -32,12 +32,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
+#include "main/texobj.h"
+#include "main/enums.h"
 
 #include "r200_context.h"
 #include "r200_state.h"
@@ -70,12 +71,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define _INVALID(f) \
     [ MESA_FORMAT_ ## f ] = { 0xffffffff, 0 }
 #define VALID_FORMAT(f) ( ((f) <= MESA_FORMAT_RGBA_DXT5) \
-			     && (tx_table_le[f].format != 0xffffffff) )
+			     && (tx_table_be[f].format != 0xffffffff) )
 
-static const struct {
+struct tx_table {
    GLuint format, filter;
-}
-tx_table_be[] =
+};
+
+static const struct tx_table tx_table_be[] =
 {
    [ MESA_FORMAT_RGBA8888 ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
    _ALPHA_REV(RGBA8888),
@@ -104,16 +106,13 @@ tx_table_be[] =
    _ALPHA(RGBA_DXT5),
 };
 
-static const struct {
-   GLuint format, filter;
-}
-tx_table_le[] =
+static const struct tx_table tx_table_le[] =
 {
    _ALPHA(RGBA8888),
    [ MESA_FORMAT_RGBA8888_REV ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
    _ALPHA(ARGB8888),
    _ALPHA_REV(ARGB8888),
-   _INVALID(RGB888),
+   [ MESA_FORMAT_RGB888 ] = { R200_TXFORMAT_ARGB8888, 0 },
    _COLOR(RGB565),
    _COLOR_REV(RGB565),
    _ALPHA(ARGB4444),
@@ -160,30 +159,26 @@ static void r200SetTexImages( r200ContextPtr rmesa,
    GLint i, texelBytes;
    GLint numLevels;
    GLint log2Width, log2Height, log2Depth;
-   const GLuint ui = 1;
-   const GLubyte littleEndian = *((const GLubyte *) &ui);
 
    /* Set the hardware texture format
     */
+   if ( !t->image_override ) {
+      if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
+	 const struct tx_table *table = _mesa_little_endian() ? tx_table_le :
+								tx_table_be;
 
-   t->pp_txformat &= ~(R200_TXFORMAT_FORMAT_MASK |
-		       R200_TXFORMAT_ALPHA_IN_MAP);
-   t->pp_txfilter &= ~R200_YUV_TO_RGB;
+         t->pp_txformat &= ~(R200_TXFORMAT_FORMAT_MASK |
+                             R200_TXFORMAT_ALPHA_IN_MAP);
+         t->pp_txfilter &= ~R200_YUV_TO_RGB;
 
-   if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
-      if (littleEndian) {
-	 t->pp_txformat |= tx_table_le[ baseImage->TexFormat->MesaFormat ].format;
-	 t->pp_txfilter |= tx_table_le[ baseImage->TexFormat->MesaFormat ].filter;
+	 t->pp_txformat |= table[ baseImage->TexFormat->MesaFormat ].format;
+	 t->pp_txfilter |= table[ baseImage->TexFormat->MesaFormat ].filter;
       }
       else {
-	 t->pp_txformat |= tx_table_be[ baseImage->TexFormat->MesaFormat ].format;
-	 t->pp_txfilter |= tx_table_be[ baseImage->TexFormat->MesaFormat ].filter;
+         _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
+         return;
       }
    }
-   else {
-      _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
-      return;
-   }
 
    texelBytes = baseImage->TexFormat->TexelBytes;
 
@@ -380,11 +375,13 @@ static void r200SetTexImages( r200ContextPtr rmesa,
     * requires 64-byte aligned pitches, and we may/may not need the
     * blitter.   NPOT only!
     */
-   if (baseImage->IsCompressed)
-      t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
-   else
-      t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
-   t->pp_txpitch -= 32;
+   if ( !t->image_override ) {
+      if (baseImage->IsCompressed)
+         t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
+      else
+         t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
+      t->pp_txpitch -= 32;
+   }
 
    t->dirty_state = TEX_ALL;
 
@@ -979,6 +976,44 @@ static GLboolean r200UpdateTextureEnv( GLcontext *ctx, int unit, int slot, GLuin
    return GL_TRUE;
 }
 
+void r200SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
+		      unsigned long long offset, GLint depth, GLuint pitch)
+{
+	r200ContextPtr rmesa = pDRICtx->driverPrivate;
+	struct gl_texture_object *tObj =
+	    _mesa_lookup_texture(rmesa->glCtx, texname);
+	r200TexObjPtr t;
+
+	if (!tObj)
+		return;
+
+	t = (r200TexObjPtr) tObj->DriverData;
+
+	t->image_override = GL_TRUE;
+
+	if (!offset)
+		return;
+
+	t->pp_txoffset = offset;
+	t->pp_txpitch = pitch - 32;
+
+	switch (depth) {
+	case 32:
+		t->pp_txformat = tx_table_le[MESA_FORMAT_ARGB8888].format;
+		t->pp_txfilter |= tx_table_le[MESA_FORMAT_ARGB8888].filter;
+		break;
+	case 24:
+	default:
+		t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format;
+		t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB888].filter;
+		break;
+	case 16:
+		t->pp_txformat = tx_table_le[MESA_FORMAT_RGB565].format;
+		t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB565].filter;
+		break;
+	}
+}
+
 #define REF_COLOR 1
 #define REF_ALPHA 2
 
@@ -1560,7 +1595,7 @@ static GLboolean enable_tex_2d( GLcontext *ctx, int unit )
       R200_FIREVERTICES( rmesa );
       r200SetTexImages( rmesa, tObj );
       r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock ) 
+      if ( !t->base.memBlock && !t->image_override ) 
 	 return GL_FALSE;
    }
 
@@ -1668,7 +1703,9 @@ static GLboolean enable_tex_rect( GLcontext *ctx, int unit )
       R200_FIREVERTICES( rmesa );
       r200SetTexImages( rmesa, tObj );
       r200UploadTexImages( rmesa, (r200TexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock && !rmesa->prefer_gart_client_texturing ) 
+      if ( !t->base.memBlock &&
+           !t->image_override &&
+           !rmesa->prefer_gart_client_texturing ) 
 	 return GL_FALSE;
    }
 
@@ -1778,6 +1815,12 @@ void r200UpdateTextureState( GLcontext *ctx )
    GLboolean ok;
    GLuint dbg;
 
+   /* NOTE: must not manipulate rmesa->state.texture.unit[].unitneeded or
+      rmesa->state.envneeded before a R200_STATECHANGE (or R200_NEWPRIM) since
+      we use these to determine if we want to emit the corresponding state
+      atoms. */
+   R200_NEWPRIM( rmesa );
+
    if (ctx->ATIFragmentShader._Enabled) {
       GLuint i;
       for (i = 0; i < R200_MAX_TEXTURE_UNITS; i++) {
diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c
index 6089d617c6b..562992fbb5c 100644
--- a/src/mesa/drivers/dri/r200/r200_vertprog.c
+++ b/src/mesa/drivers/dri/r200/r200_vertprog.c
@@ -30,10 +30,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Aapo Tahkola <aet@rasterburn.org>
  *   Roland Scheidegger <rscheidegger_lists@hispeed.ch>
  */
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-#include "program.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "shader/program.h"
 #include "shader/prog_instruction.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
@@ -154,7 +154,7 @@ static GLboolean r200VertexProgUpdateParams(GLcontext *ctx, struct r200_vertex_p
    return GL_TRUE;
 }
 
-static __inline unsigned long t_dst_mask(GLuint mask)
+static INLINE unsigned long t_dst_mask(GLuint mask)
 {
    /* WRITEMASK_* is equivalent to VSF_FLAG_* */
    return mask & VSF_FLAG_ALL;
@@ -215,6 +215,7 @@ static unsigned long t_src_class(enum register_file file)
    case PROGRAM_LOCAL_PARAM:
    case PROGRAM_ENV_PARAM:
    case PROGRAM_NAMED_PARAM:
+   case PROGRAM_CONSTANT:
    case PROGRAM_STATE_VAR:
       return VSF_IN_CLASS_PARAM;
    /*
@@ -228,7 +229,7 @@ static unsigned long t_src_class(enum register_file file)
    }
 }
 
-static __inline unsigned long t_swizzle(GLubyte swizzle)
+static INLINE unsigned long t_swizzle(GLubyte swizzle)
 {
 /* this is in fact a NOP as the Mesa SWIZZLE_* are all identical to VSF_IN_COMPONENT_* */
    return swizzle;
@@ -408,6 +409,7 @@ static GLboolean r200_translate_vertex_program(GLcontext *ctx, struct r200_verte
    int fog_temp_i = 0;
    int free_inputs;
    int array_count = 0;
+   int u_temp_used;
 
    vp->native = GL_FALSE;
    vp->translated = GL_TRUE;
@@ -744,9 +746,16 @@ static GLboolean r200_translate_vertex_program(GLcontext *ctx, struct r200_verte
 	 goto next;
 
       case OPCODE_MAD:
+	 /* only 2 read ports into temp memory thus may need the macro op MAD_2
+	    instead (requiring 2 clocks) if all inputs are in temp memory
+	    (and, only if they actually reference 3 distinct temps) */
 	 hw_op=(src[0].File == PROGRAM_TEMPORARY &&
 	    src[1].File == PROGRAM_TEMPORARY &&
-	    src[2].File == PROGRAM_TEMPORARY) ? R200_VPI_OUT_OP_MAD_2 : R200_VPI_OUT_OP_MAD;
+	    src[2].File == PROGRAM_TEMPORARY &&
+	    (((src[0].RelAddr << 8) | src[0].Index) != ((src[1].RelAddr << 8) | src[1].Index)) &&
+	    (((src[0].RelAddr << 8) | src[0].Index) != ((src[2].RelAddr << 8) | src[2].Index)) &&
+	    (((src[1].RelAddr << 8) | src[1].Index) != ((src[2].RelAddr << 8) | src[2].Index))) ?
+	    R200_VPI_OUT_OP_MAD_2 : R200_VPI_OUT_OP_MAD;
 
 	 o_inst->op = MAKE_VSF_OP(hw_op, t_dst(&dst),
 	    t_dst_mask(dst.WriteMask));
@@ -874,8 +883,11 @@ else {
       case OPCODE_XPD:
 	 /* mul r0, r1.yzxw, r2.zxyw
 	    mad r0, -r2.yzxw, r1.zxyw, r0
-	    NOTE: might need MAD_2
 	  */
+	 hw_op=(src[0].File == PROGRAM_TEMPORARY &&
+	    src[1].File == PROGRAM_TEMPORARY &&
+	    (((src[0].RelAddr << 8) | src[0].Index) != ((src[1].RelAddr << 8) | src[1].Index))) ?
+	    R200_VPI_OUT_OP_MAD_2 : R200_VPI_OUT_OP_MAD;
 
 	 o_inst->op = MAKE_VSF_OP(R200_VPI_OUT_OP_MUL,
 	    (u_temp_i << R200_VPI_OUT_REG_INDEX_SHIFT) | R200_VSF_OUT_CLASS_TMP,
@@ -901,7 +913,7 @@ else {
 	 o_inst++;
 	 u_temp_i--;
 
-	 o_inst->op = MAKE_VSF_OP(R200_VPI_OUT_OP_MAD, t_dst(&dst),
+	 o_inst->op = MAKE_VSF_OP(hw_op, t_dst(&dst),
 		t_dst_mask(dst.WriteMask));
 
 	 o_inst->src0 = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
@@ -1051,14 +1063,15 @@ else {
          dofogfix = 0;
       }
 
+      u_temp_used = (R200_VSF_MAX_TEMPS - 1) - u_temp_i;
       if (mesa_vp->Base.NumNativeTemporaries <
-	 (mesa_vp->Base.NumTemporaries + (R200_VSF_MAX_TEMPS - 1 - u_temp_i))) {
+	 (mesa_vp->Base.NumTemporaries + u_temp_used)) {
 	 mesa_vp->Base.NumNativeTemporaries =
-	    mesa_vp->Base.NumTemporaries + (R200_VSF_MAX_TEMPS - 1 - u_temp_i);
+	    mesa_vp->Base.NumTemporaries + u_temp_used;
       }
-      if (u_temp_i < mesa_vp->Base.NumTemporaries) {
+      if ((mesa_vp->Base.NumTemporaries + u_temp_used) > R200_VSF_MAX_TEMPS) {
 	 if (R200_DEBUG & DEBUG_FALLBACKS) {
-	    fprintf(stderr, "Ran out of temps, num temps %d, us %d\n", mesa_vp->Base.NumTemporaries, u_temp_i);
+	    fprintf(stderr, "Ran out of temps, num temps %d, us %d\n", mesa_vp->Base.NumTemporaries, u_temp_used);
 	 }
 	 return GL_FALSE;
       }
diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 44248964fdb..6ca934204f3 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -28,7 +28,6 @@ DRIVER_SOURCES = \
 		 radeon_span.c \
 		 radeon_state.c \
 		 r300_mem.c \
-		 \
 		 r300_context.c \
 		 r300_ioctl.c \
 		 r300_cmdbuf.c \
@@ -37,8 +36,16 @@ DRIVER_SOURCES = \
 		 r300_texmem.c \
 		 r300_tex.c \
 		 r300_texstate.c \
+		 radeon_program.c \
+		 radeon_program_alu.c \
+		 radeon_program_pair.c \
+		 radeon_nqssadce.c \
 		 r300_vertprog.c \
 		 r300_fragprog.c \
+		 r300_fragprog_swizzle.c \
+		 r300_fragprog_emit.c \
+		 r500_fragprog.c \
+		 r500_fragprog_emit.c \
 		 r300_shader.c \
 		 r300_emit.c \
 		 r300_swtcl.c \
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 9eca41fa38c..c9e1dfe9774 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -33,13 +33,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author Nicolai Haehnle <prefect_@gmx.net>
  */
 
-#include "glheader.h"
-#include "state.h"
-#include "imports.h"
-#include "macros.h"
-#include "context.h"
+#include "main/glheader.h"
+#include "main/state.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/context.h"
+#include "main/simple_list.h"
 #include "swrast/swrast.h"
-#include "simple_list.h"
 
 #include "drm.h"
 #include "radeon_drm.h"
@@ -150,7 +150,7 @@ static void r300PrintStateAtom(r300ContextPtr r300, struct r300_state_atom *stat
  * The caller must have ensured that there is enough space in the command
  * buffer.
  */
-static inline void r300EmitAtoms(r300ContextPtr r300, GLboolean dirty)
+static INLINE void r300EmitAtoms(r300ContextPtr r300, GLboolean dirty)
 {
 	struct r300_state_atom *atom;
 	uint32_t *dest;
@@ -164,7 +164,7 @@ static inline void r300EmitAtoms(r300ContextPtr r300, GLboolean dirty)
 	r300->cmdbuf.count_used++;
 
 	/* Emit cache flush */
-	*dest = cmdpacket0(R300_TX_CNTL, 1);
+	*dest = cmdpacket0(R300_TX_INVALTAGS, 1);
 	dest++;
 	r300->cmdbuf.count_used++;
 
@@ -242,6 +242,7 @@ void r300EmitState(r300ContextPtr r300)
 
 #define packet0_count(ptr) (((drm_r300_cmd_header_t*)(ptr))->packet0.count)
 #define vpu_count(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
+#define r500fp_count(ptr) (((drm_r300_cmd_header_t*)(ptr))->r500fp.count)
 
 static int check_always(r300ContextPtr r300, struct r300_state_atom *atom)
 {
@@ -262,6 +263,20 @@ static int check_vpu(r300ContextPtr r300, struct r300_state_atom *atom)
 	return cnt ? (cnt * 4) + 1 : 0;
 }
 
+static int check_r500fp(r300ContextPtr r300, struct r300_state_atom *atom)
+{
+	int cnt;
+	cnt = r500fp_count(atom->cmd);
+	return cnt ? (cnt * 6) + 1 : 0;
+}
+
+static int check_r500fp_const(r300ContextPtr r300, struct r300_state_atom *atom)
+{
+	int cnt;
+	cnt = r500fp_count(atom->cmd);
+	return cnt ? (cnt * 4) + 1 : 0;
+}
+
 #define ALLOC_STATE( ATOM, CHK, SZ, IDX )				\
    do {									\
       r300->hw.ATOM.cmd_size = (SZ);					\
@@ -281,10 +296,15 @@ void r300InitCmdBuf(r300ContextPtr r300)
 {
 	int size, mtu;
 	int has_tcl = 1;
+	int is_r500 = 0;
+	int i;
 
 	if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
 		has_tcl = 0;
 
+	if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+		is_r500 = 1;
+
 	r300->hw.max_state_size = 2 + 2;	/* reserve extra space for WAIT_IDLE and tex cache flush */
 
 	mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
@@ -299,32 +319,39 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	/* Initialize state atoms */
 	ALLOC_STATE(vpt, always, R300_VPT_CMDSIZE, 0);
 	r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmdpacket0(R300_SE_VPORT_XSCALE, 6);
-	ALLOC_STATE(vap_cntl, always, 2, 0);
-	r300->hw.vap_cntl.cmd[0] = cmdpacket0(R300_VAP_CNTL, 1);
+	ALLOC_STATE(vap_cntl, always, R300_VAP_CNTL_SIZE, 0);
+	r300->hw.vap_cntl.cmd[R300_VAP_CNTL_FLUSH] = cmdpacket0(R300_VAP_PVS_STATE_FLUSH_REG, 1);
+	r300->hw.vap_cntl.cmd[R300_VAP_CNTL_FLUSH_1] = 0;
+	r300->hw.vap_cntl.cmd[R300_VAP_CNTL_CMD] = cmdpacket0(R300_VAP_CNTL, 1);
+	if (is_r500) {
+	    ALLOC_STATE(vap_index_offset, always, 2, 0);
+	    r300->hw.vap_index_offset.cmd[0] = cmdpacket0(R500_VAP_INDEX_OFFSET, 1);
+	    r300->hw.vap_index_offset.cmd[1] = 0;
+	}
 	ALLOC_STATE(vte, always, 3, 0);
 	r300->hw.vte.cmd[0] = cmdpacket0(R300_SE_VTE_CNTL, 2);
-	ALLOC_STATE(unk2134, always, 3, 0);
-	r300->hw.unk2134.cmd[0] = cmdpacket0(0x2134, 2);
+	ALLOC_STATE(vap_vf_max_vtx_indx, always, 3, 0);
+	r300->hw.vap_vf_max_vtx_indx.cmd[0] = cmdpacket0(R300_VAP_VF_MAX_VTX_INDX, 2);
 	ALLOC_STATE(vap_cntl_status, always, 2, 0);
 	r300->hw.vap_cntl_status.cmd[0] = cmdpacket0(R300_VAP_CNTL_STATUS, 1);
 	ALLOC_STATE(vir[0], variable, R300_VIR_CMDSIZE, 0);
 	r300->hw.vir[0].cmd[R300_VIR_CMD_0] =
-	    cmdpacket0(R300_VAP_INPUT_ROUTE_0_0, 1);
+	    cmdpacket0(R300_VAP_PROG_STREAM_CNTL_0, 1);
 	ALLOC_STATE(vir[1], variable, R300_VIR_CMDSIZE, 1);
 	r300->hw.vir[1].cmd[R300_VIR_CMD_0] =
-	    cmdpacket0(R300_VAP_INPUT_ROUTE_1_0, 1);
+	    cmdpacket0(R300_VAP_PROG_STREAM_CNTL_EXT_0, 1);
 	ALLOC_STATE(vic, always, R300_VIC_CMDSIZE, 0);
-	r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_INPUT_CNTL_0, 2);
-	ALLOC_STATE(unk21DC, always, 2, 0);
-	r300->hw.unk21DC.cmd[0] = cmdpacket0(0x21DC, 1);
-	ALLOC_STATE(unk221C, always, 2, 0);
-	r300->hw.unk221C.cmd[0] = cmdpacket0(R300_VAP_UNKNOWN_221C, 1);
-	ALLOC_STATE(vap_clip, always, 5, 0);
-	r300->hw.vap_clip.cmd[0] = cmdpacket0(R300_VAP_CLIP_X_0, 4);
+	r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(R300_VAP_VTX_STATE_CNTL, 2);
+	ALLOC_STATE(vap_psc_sgn_norm_cntl, always, 2, 0);
+	r300->hw.vap_psc_sgn_norm_cntl.cmd[0] = cmdpacket0(R300_VAP_PSC_SGN_NORM_CNTL, SGN_NORM_ZERO_CLAMP_MINUS_ONE);
 
 	if (has_tcl) {
-		ALLOC_STATE(unk2288, always, 2, 0);
-		r300->hw.unk2288.cmd[0] = cmdpacket0(R300_VAP_UNKNOWN_2288, 1);
+		ALLOC_STATE(vap_clip_cntl, always, 2, 0);
+		r300->hw.vap_clip_cntl.cmd[0] = cmdpacket0(R300_VAP_CLIP_CNTL, 1);
+		ALLOC_STATE(vap_clip, always, 5, 0);
+		r300->hw.vap_clip.cmd[0] = cmdpacket0(R300_VAP_GB_VERT_CLIP_ADJ, 4);
+		ALLOC_STATE(vap_pvs_vtx_timeout_reg, always, 2, 0);
+		r300->hw.vap_pvs_vtx_timeout_reg.cmd[0] = cmdpacket0(VAP_PVS_VTX_TIMEOUT_REG, 1);
 	}
 
 	ALLOC_STATE(vof, always, R300_VOF_CMDSIZE, 0);
@@ -334,7 +361,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	if (has_tcl) {
 		ALLOC_STATE(pvs, always, R300_PVS_CMDSIZE, 0);
 		r300->hw.pvs.cmd[R300_PVS_CMD_0] =
-		    cmdpacket0(R300_VAP_PVS_CNTL_1, 3);
+		    cmdpacket0(R300_VAP_PVS_CODE_CNTL_0, 3);
 	}
 
 	ALLOC_STATE(gb_enable, always, 2, 0);
@@ -343,121 +370,183 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	r300->hw.gb_misc.cmd[0] = cmdpacket0(R300_GB_MSPOS0, 5);
 	ALLOC_STATE(txe, always, R300_TXE_CMDSIZE, 0);
 	r300->hw.txe.cmd[R300_TXE_CMD_0] = cmdpacket0(R300_TX_ENABLE, 1);
-	ALLOC_STATE(unk4200, always, 5, 0);
-	r300->hw.unk4200.cmd[0] = cmdpacket0(0x4200, 4);
-	ALLOC_STATE(unk4214, always, 2, 0);
-	r300->hw.unk4214.cmd[0] = cmdpacket0(0x4214, 1);
+	ALLOC_STATE(ga_point_s0, always, 5, 0);
+	r300->hw.ga_point_s0.cmd[0] = cmdpacket0(R300_GA_POINT_S0, 4);
+	ALLOC_STATE(ga_triangle_stipple, always, 2, 0);
+	r300->hw.ga_triangle_stipple.cmd[0] = cmdpacket0(R300_GA_TRIANGLE_STIPPLE, 1);
 	ALLOC_STATE(ps, always, R300_PS_CMDSIZE, 0);
-	r300->hw.ps.cmd[0] = cmdpacket0(R300_RE_POINTSIZE, 1);
-	ALLOC_STATE(unk4230, always, 4, 0);
-	r300->hw.unk4230.cmd[0] = cmdpacket0(0x4230, 3);
+	r300->hw.ps.cmd[0] = cmdpacket0(R300_GA_POINT_SIZE, 1);
+	ALLOC_STATE(ga_point_minmax, always, 4, 0);
+	r300->hw.ga_point_minmax.cmd[0] = cmdpacket0(R300_GA_POINT_MINMAX, 3);
 	ALLOC_STATE(lcntl, always, 2, 0);
-	r300->hw.lcntl.cmd[0] = cmdpacket0(R300_RE_LINE_CNT, 1);
-	ALLOC_STATE(unk4260, always, 4, 0);
-	r300->hw.unk4260.cmd[0] = cmdpacket0(0x4260, 3);
+	r300->hw.lcntl.cmd[0] = cmdpacket0(R300_GA_LINE_CNTL, 1);
+	ALLOC_STATE(ga_line_stipple, always, 4, 0);
+	r300->hw.ga_line_stipple.cmd[0] = cmdpacket0(R300_GA_LINE_STIPPLE_VALUE, 3);
 	ALLOC_STATE(shade, always, 5, 0);
-	r300->hw.shade.cmd[0] = cmdpacket0(R300_RE_SHADE, 4);
+	r300->hw.shade.cmd[0] = cmdpacket0(R300_GA_ENHANCE, 4);
 	ALLOC_STATE(polygon_mode, always, 4, 0);
-	r300->hw.polygon_mode.cmd[0] = cmdpacket0(R300_RE_POLYGON_MODE, 3);
+	r300->hw.polygon_mode.cmd[0] = cmdpacket0(R300_GA_POLY_MODE, 3);
 	ALLOC_STATE(fogp, always, 3, 0);
-	r300->hw.fogp.cmd[0] = cmdpacket0(R300_RE_FOG_SCALE, 2);
+	r300->hw.fogp.cmd[0] = cmdpacket0(R300_GA_FOG_SCALE, 2);
 	ALLOC_STATE(zbias_cntl, always, 2, 0);
-	r300->hw.zbias_cntl.cmd[0] = cmdpacket0(R300_RE_ZBIAS_CNTL, 1);
+	r300->hw.zbias_cntl.cmd[0] = cmdpacket0(R300_SU_TEX_WRAP, 1);
 	ALLOC_STATE(zbs, always, R300_ZBS_CMDSIZE, 0);
 	r300->hw.zbs.cmd[R300_ZBS_CMD_0] =
-	    cmdpacket0(R300_RE_ZBIAS_T_FACTOR, 4);
+	    cmdpacket0(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
 	ALLOC_STATE(occlusion_cntl, always, 2, 0);
-	r300->hw.occlusion_cntl.cmd[0] = cmdpacket0(R300_RE_OCCLUSION_CNTL, 1);
+	r300->hw.occlusion_cntl.cmd[0] = cmdpacket0(R300_SU_POLY_OFFSET_ENABLE, 1);
 	ALLOC_STATE(cul, always, R300_CUL_CMDSIZE, 0);
-	r300->hw.cul.cmd[R300_CUL_CMD_0] = cmdpacket0(R300_RE_CULL_CNTL, 1);
-	ALLOC_STATE(unk42C0, always, 3, 0);
-	r300->hw.unk42C0.cmd[0] = cmdpacket0(0x42C0, 2);
+	r300->hw.cul.cmd[R300_CUL_CMD_0] = cmdpacket0(R300_SU_CULL_MODE, 1);
+	ALLOC_STATE(su_depth_scale, always, 3, 0);
+	r300->hw.su_depth_scale.cmd[0] = cmdpacket0(R300_SU_DEPTH_SCALE, 2);
 	ALLOC_STATE(rc, always, R300_RC_CMDSIZE, 0);
-	r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(R300_RS_CNTL_0, 2);
-	ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0);
-	r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_INTERP_0, 8);
-	ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
-	r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, 1);
-	ALLOC_STATE(unk43A4, always, 3, 0);
-	r300->hw.unk43A4.cmd[0] = cmdpacket0(0x43A4, 2);
-	ALLOC_STATE(unk43E8, always, 2, 0);
-	r300->hw.unk43E8.cmd[0] = cmdpacket0(0x43E8, 1);
-	ALLOC_STATE(fp, always, R300_FP_CMDSIZE, 0);
-	r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(R300_PFS_CNTL_0, 3);
-	r300->hw.fp.cmd[R300_FP_CMD_1] = cmdpacket0(R300_PFS_NODE_0, 4);
-	ALLOC_STATE(fpt, variable, R300_FPT_CMDSIZE, 0);
-	r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(R300_PFS_TEXI_0, 0);
-	ALLOC_STATE(unk46A4, always, 6, 0);
-	r300->hw.unk46A4.cmd[0] = cmdpacket0(0x46A4, 5);
-	ALLOC_STATE(fpi[0], variable, R300_FPI_CMDSIZE, 0);
-	r300->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR0_0, 1);
-	ALLOC_STATE(fpi[1], variable, R300_FPI_CMDSIZE, 1);
-	r300->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR1_0, 1);
-	ALLOC_STATE(fpi[2], variable, R300_FPI_CMDSIZE, 2);
-	r300->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR2_0, 1);
-	ALLOC_STATE(fpi[3], variable, R300_FPI_CMDSIZE, 3);
-	r300->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR3_0, 1);
+	r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(R300_RS_COUNT, 2);
+	if (is_r500) {
+		ALLOC_STATE(ri, always, R500_RI_CMDSIZE, 0);
+		r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R500_RS_IP_0, 16);
+		for (i = 0; i < 8; i++) {
+			r300->hw.ri.cmd[R300_RI_CMD_0 + i +1] =
+			  (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
+                          (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+                          (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+                          (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
+		}
+		ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
+		r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, 1);
+	} else {
+		ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0);
+		r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_IP_0, 8);
+		ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
+		r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, 1);
+	}
+	ALLOC_STATE(sc_hyperz, always, 3, 0);
+	r300->hw.sc_hyperz.cmd[0] = cmdpacket0(R300_SC_HYPERZ, 2);
+	ALLOC_STATE(sc_screendoor, always, 2, 0);
+	r300->hw.sc_screendoor.cmd[0] = cmdpacket0(R300_SC_SCREENDOOR, 1);
+	ALLOC_STATE(us_out_fmt, always, 6, 0);
+	r300->hw.us_out_fmt.cmd[0] = cmdpacket0(R300_US_OUT_FMT, 5);
+
+	if (is_r500) {
+		ALLOC_STATE(fp, always, R500_FP_CMDSIZE, 0);
+		r300->hw.fp.cmd[R500_FP_CMD_0] = cmdpacket0(R500_US_CONFIG, 2);
+		r300->hw.fp.cmd[R500_FP_CNTL] = R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO;
+		r300->hw.fp.cmd[R500_FP_CMD_1] = cmdpacket0(R500_US_CODE_ADDR, 3);
+		r300->hw.fp.cmd[R500_FP_CMD_2] = cmdpacket0(R500_US_FC_CTRL, 1);
+		r300->hw.fp.cmd[R500_FP_FC_CNTL] = 0; /* FIXME when we add flow control */
+
+		ALLOC_STATE(r500fp, r500fp, R500_FPI_CMDSIZE, 0);
+		r300->hw.r500fp.cmd[R300_FPI_CMD_0] = cmdr500fp(0, 0, 0, 0);
+		ALLOC_STATE(r500fp_const, r500fp_const, R500_FPP_CMDSIZE, 0);
+		r300->hw.r500fp_const.cmd[R300_FPI_CMD_0] = cmdr500fp(0, 0, 1, 0);
+	} else {
+		ALLOC_STATE(fp, always, R300_FP_CMDSIZE, 0);
+		r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(R300_US_CONFIG, 3);
+		r300->hw.fp.cmd[R300_FP_CMD_1] = cmdpacket0(R300_US_CODE_ADDR_0, 4);
+		ALLOC_STATE(fpt, variable, R300_FPT_CMDSIZE, 0);
+		r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(R300_US_TEX_INST_0, 0);
+
+		ALLOC_STATE(fpi[0], variable, R300_FPI_CMDSIZE, 0);
+		r300->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_INST_0, 1);
+		ALLOC_STATE(fpi[1], variable, R300_FPI_CMDSIZE, 1);
+		r300->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_ADDR_0, 1);
+		ALLOC_STATE(fpi[2], variable, R300_FPI_CMDSIZE, 2);
+		r300->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_INST_0, 1);
+		ALLOC_STATE(fpi[3], variable, R300_FPI_CMDSIZE, 3);
+		r300->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_ADDR_0, 1);
+		ALLOC_STATE(fpp, variable, R300_FPP_CMDSIZE, 0);
+		r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, 0);
+	}
 	ALLOC_STATE(fogs, always, R300_FOGS_CMDSIZE, 0);
-	r300->hw.fogs.cmd[R300_FOGS_CMD_0] = cmdpacket0(R300_RE_FOG_STATE, 1);
+	r300->hw.fogs.cmd[R300_FOGS_CMD_0] = cmdpacket0(R300_FG_FOG_BLEND, 1);
 	ALLOC_STATE(fogc, always, R300_FOGC_CMDSIZE, 0);
-	r300->hw.fogc.cmd[R300_FOGC_CMD_0] = cmdpacket0(R300_FOG_COLOR_R, 3);
+	r300->hw.fogc.cmd[R300_FOGC_CMD_0] = cmdpacket0(R300_FG_FOG_COLOR_R, 3);
 	ALLOC_STATE(at, always, R300_AT_CMDSIZE, 0);
-	r300->hw.at.cmd[R300_AT_CMD_0] = cmdpacket0(R300_PP_ALPHA_TEST, 2);
-	ALLOC_STATE(unk4BD8, always, 2, 0);
-	r300->hw.unk4BD8.cmd[0] = cmdpacket0(0x4BD8, 1);
-	ALLOC_STATE(fpp, variable, R300_FPP_CMDSIZE, 0);
-	r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, 0);
-	ALLOC_STATE(unk4E00, always, 2, 0);
-	r300->hw.unk4E00.cmd[0] = cmdpacket0(0x4E00, 1);
+	r300->hw.at.cmd[R300_AT_CMD_0] = cmdpacket0(R300_FG_ALPHA_FUNC, 2);
+	ALLOC_STATE(fg_depth_src, always, 2, 0);
+	r300->hw.fg_depth_src.cmd[0] = cmdpacket0(R300_FG_DEPTH_SRC, 1);
+	ALLOC_STATE(rb3d_cctl, always, 2, 0);
+	r300->hw.rb3d_cctl.cmd[0] = cmdpacket0(R300_RB3D_CCTL, 1);
 	ALLOC_STATE(bld, always, R300_BLD_CMDSIZE, 0);
 	r300->hw.bld.cmd[R300_BLD_CMD_0] = cmdpacket0(R300_RB3D_CBLEND, 2);
 	ALLOC_STATE(cmk, always, R300_CMK_CMDSIZE, 0);
-	r300->hw.cmk.cmd[R300_CMK_CMD_0] = cmdpacket0(R300_RB3D_COLORMASK, 1);
-	ALLOC_STATE(blend_color, always, 4, 0);
-	r300->hw.blend_color.cmd[0] = cmdpacket0(R300_RB3D_BLEND_COLOR, 3);
+	r300->hw.cmk.cmd[R300_CMK_CMD_0] = cmdpacket0(RB3D_COLOR_CHANNEL_MASK, 1);
+	if (is_r500) {
+		ALLOC_STATE(blend_color, always, 3, 0);
+		r300->hw.blend_color.cmd[0] = cmdpacket0(R500_RB3D_CONSTANT_COLOR_AR, 2);
+	} else {
+		ALLOC_STATE(blend_color, always, 2, 0);
+		r300->hw.blend_color.cmd[0] = cmdpacket0(R300_RB3D_BLEND_COLOR, 1);
+	}
+	ALLOC_STATE(rop, always, 2, 0);
+	r300->hw.rop.cmd[0] = cmdpacket0(R300_RB3D_ROPCNTL, 1);
 	ALLOC_STATE(cb, always, R300_CB_CMDSIZE, 0);
 	r300->hw.cb.cmd[R300_CB_CMD_0] = cmdpacket0(R300_RB3D_COLOROFFSET0, 1);
 	r300->hw.cb.cmd[R300_CB_CMD_1] = cmdpacket0(R300_RB3D_COLORPITCH0, 1);
-	ALLOC_STATE(unk4E50, always, 10, 0);
-	r300->hw.unk4E50.cmd[0] = cmdpacket0(0x4E50, 9);
-	ALLOC_STATE(unk4E88, always, 2, 0);
-	r300->hw.unk4E88.cmd[0] = cmdpacket0(0x4E88, 1);
-	ALLOC_STATE(unk4EA0, always, 3, 0);
-	r300->hw.unk4EA0.cmd[0] = cmdpacket0(0x4EA0, 2);
+	ALLOC_STATE(rb3d_dither_ctl, always, 10, 0);
+	r300->hw.rb3d_dither_ctl.cmd[0] = cmdpacket0(R300_RB3D_DITHER_CTL, 9);
+	ALLOC_STATE(rb3d_aaresolve_ctl, always, 2, 0);
+	r300->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(R300_RB3D_AARESOLVE_CTL, 1);
+	ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0);
+	r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2);
 	ALLOC_STATE(zs, always, R300_ZS_CMDSIZE, 0);
 	r300->hw.zs.cmd[R300_ZS_CMD_0] =
-	    cmdpacket0(R300_RB3D_ZSTENCIL_CNTL_0, 3);
+	    cmdpacket0(R300_ZB_CNTL, 3);
 	ALLOC_STATE(zstencil_format, always, 5, 0);
 	r300->hw.zstencil_format.cmd[0] =
-	    cmdpacket0(R300_RB3D_ZSTENCIL_FORMAT, 4);
+	    cmdpacket0(R300_ZB_FORMAT, 4);
 	ALLOC_STATE(zb, always, R300_ZB_CMDSIZE, 0);
-	r300->hw.zb.cmd[R300_ZB_CMD_0] = cmdpacket0(R300_RB3D_DEPTHOFFSET, 2);
-	ALLOC_STATE(unk4F28, always, 2, 0);
-	r300->hw.unk4F28.cmd[0] = cmdpacket0(0x4F28, 1);
+	r300->hw.zb.cmd[R300_ZB_CMD_0] = cmdpacket0(R300_ZB_DEPTHOFFSET, 2);
+	ALLOC_STATE(zb_depthclearvalue, always, 2, 0);
+	r300->hw.zb_depthclearvalue.cmd[0] = cmdpacket0(R300_ZB_DEPTHCLEARVALUE, 1);
 	ALLOC_STATE(unk4F30, always, 3, 0);
 	r300->hw.unk4F30.cmd[0] = cmdpacket0(0x4F30, 2);
-	ALLOC_STATE(unk4F44, always, 2, 0);
-	r300->hw.unk4F44.cmd[0] = cmdpacket0(0x4F44, 1);
-	ALLOC_STATE(unk4F54, always, 2, 0);
-	r300->hw.unk4F54.cmd[0] = cmdpacket0(0x4F54, 1);
+	ALLOC_STATE(zb_hiz_offset, always, 2, 0);
+	r300->hw.zb_hiz_offset.cmd[0] = cmdpacket0(R300_ZB_HIZ_OFFSET, 1);
+	ALLOC_STATE(zb_hiz_pitch, always, 2, 0);
+	r300->hw.zb_hiz_pitch.cmd[0] = cmdpacket0(R300_ZB_HIZ_PITCH, 1);
 
 	/* VPU only on TCL */
 	if (has_tcl) {
+   	        int i;
 		ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0);
 		r300->hw.vpi.cmd[R300_VPI_CMD_0] =
-		    cmdvpu(R300_PVS_UPLOAD_PROGRAM, 0);
-		ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
-		r300->hw.vpp.cmd[R300_VPP_CMD_0] =
-		    cmdvpu(R300_PVS_UPLOAD_PARAMETERS, 0);
-		ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
-		r300->hw.vps.cmd[R300_VPS_CMD_0] =
-		    cmdvpu(R300_PVS_UPLOAD_POINTSIZE, 1);
+		    cmdvpu(R300_PVS_CODE_START, 0);
+
+		if (is_r500) {
+		    ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
+		    r300->hw.vpp.cmd[R300_VPP_CMD_0] =
+			cmdvpu(R500_PVS_CONST_START, 0);
+
+		    ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
+		    r300->hw.vps.cmd[R300_VPS_CMD_0] =
+			cmdvpu(R500_POINT_VPORT_SCALE_OFFSET, 1);
+
+			for (i = 0; i < 6; i++) {
+				ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0);
+				r300->hw.vpucp[i].cmd[R300_VPUCP_CMD_0] =
+					cmdvpu(R500_PVS_UCP_START + i, 1);
+			}
+		} else {
+		    ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
+		    r300->hw.vpp.cmd[R300_VPP_CMD_0] =
+			cmdvpu(R300_PVS_CONST_START, 0);
+
+		    ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
+		    r300->hw.vps.cmd[R300_VPS_CMD_0] =
+			cmdvpu(R300_POINT_VPORT_SCALE_OFFSET, 1);
+
+			for (i = 0; i < 6; i++) {
+				ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0);
+				r300->hw.vpucp[i].cmd[R300_VPUCP_CMD_0] =
+					cmdvpu(R300_PVS_UCP_START + i, 1);
+			}
+		}
 	}
 
 	/* Textures */
 	ALLOC_STATE(tex.filter, variable, mtu + 1, 0);
 	r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
-	    cmdpacket0(R300_TX_FILTER_0, 0);
+	    cmdpacket0(R300_TX_FILTER0_0, 0);
 
 	ALLOC_STATE(tex.filter_1, variable, mtu + 1, 0);
 	r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
@@ -471,7 +560,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	    cmdpacket0(R300_TX_FORMAT_0, 0);
 
 	ALLOC_STATE(tex.pitch, variable, mtu + 1, 0);
-	r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_PITCH_0, 0);
+	r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(R300_TX_FORMAT2_0, 0);
 
 	ALLOC_STATE(tex.offset, variable, mtu + 1, 0);
 	r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.h b/src/mesa/drivers/dri/r300/r300_cmdbuf.h
index acb6e38c6df..a8eaa580bd9 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.h
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.h
@@ -52,7 +52,7 @@ extern void r300DestroyCmdBuf(r300ContextPtr r300);
  *
  * \param dwords The number of dwords we need to be free on the command buffer
  */
-static inline void r300EnsureCmdBufSpace(r300ContextPtr r300,
+static INLINE void r300EnsureCmdBufSpace(r300ContextPtr r300,
 					     int dwords, const char *caller)
 {
 	assert(dwords < r300->cmdbuf.size);
@@ -68,7 +68,7 @@ static inline void r300EnsureCmdBufSpace(r300ContextPtr r300,
  * causes state reemission after a flush. This is necessary to ensure
  * correct hardware state after an unlock.
  */
-static inline uint32_t *r300RawAllocCmdBuf(r300ContextPtr r300,
+static INLINE uint32_t *r300RawAllocCmdBuf(r300ContextPtr r300,
 					       int dwords, const char *caller)
 {
 	uint32_t *ptr;
@@ -80,7 +80,7 @@ static inline uint32_t *r300RawAllocCmdBuf(r300ContextPtr r300,
 	return ptr;
 }
 
-static inline uint32_t *r300AllocCmdBuf(r300ContextPtr r300,
+static INLINE uint32_t *r300AllocCmdBuf(r300ContextPtr r300,
 					    int dwords, const char *caller)
 {
 	uint32_t *ptr;
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 14e0f052fd5..37436275e34 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -35,15 +35,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author Nicolai Haehnle <prefect_@gmx.net>
  */
 
-#include "glheader.h"
-#include "api_arrayelt.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
-#include "state.h"
-#include "bufferobj.h"
+#include "main/glheader.h"
+#include "main/api_arrayelt.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
+#include "main/state.h"
+#include "main/bufferobj.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -79,11 +79,13 @@ int hw_tcl_on = 1;
 
 #define need_GL_EXT_stencil_two_side
 #define need_GL_ARB_multisample
+#define need_GL_ARB_point_parameters
 #define need_GL_ARB_texture_compression
 #define need_GL_ARB_vertex_buffer_object
 #define need_GL_ARB_vertex_program
 #define need_GL_EXT_blend_minmax
 //#define need_GL_EXT_fog_coord
+#define need_GL_EXT_multi_draw_arrays
 #define need_GL_EXT_secondary_color
 #define need_GL_EXT_blend_equation_separate
 #define need_GL_EXT_blend_func_separate
@@ -93,8 +95,13 @@ int hw_tcl_on = 1;
 
 const struct dri_extension card_extensions[] = {
   /* *INDENT-OFF* */
+  {"GL_ARB_depth_texture",		NULL},
+  {"GL_ARB_fragment_program",		NULL},
   {"GL_ARB_multisample",		GL_ARB_multisample_functions},
   {"GL_ARB_multitexture",		NULL},
+  {"GL_ARB_point_parameters",		GL_ARB_point_parameters_functions},
+  {"GL_ARB_shadow",			NULL},
+  {"GL_ARB_shadow_ambient",		NULL},
   {"GL_ARB_texture_border_clamp",	NULL},
   {"GL_ARB_texture_compression",	GL_ARB_texture_compression_functions},
   {"GL_ARB_texture_cube_map",		NULL},
@@ -105,14 +112,15 @@ const struct dri_extension card_extensions[] = {
   {"GL_ARB_texture_mirrored_repeat",	NULL},
   {"GL_ARB_vertex_buffer_object",	GL_ARB_vertex_buffer_object_functions},
   {"GL_ARB_vertex_program",		GL_ARB_vertex_program_functions},
-  {"GL_ARB_fragment_program",		NULL},
   {"GL_EXT_blend_equation_separate",	GL_EXT_blend_equation_separate_functions},
   {"GL_EXT_blend_func_separate",	GL_EXT_blend_func_separate_functions},
   {"GL_EXT_blend_minmax",		GL_EXT_blend_minmax_functions},
   {"GL_EXT_blend_subtract",		NULL},
 //  {"GL_EXT_fog_coord",			GL_EXT_fog_coord_functions },
+  {"GL_EXT_multi_draw_arrays",		GL_EXT_multi_draw_arrays_functions},
   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
   {"GL_EXT_secondary_color", 		GL_EXT_secondary_color_functions},
+  {"GL_EXT_shadow_funcs",		NULL},
   {"GL_EXT_stencil_two_side",		GL_EXT_stencil_two_side_functions},
   {"GL_EXT_stencil_wrap",		NULL},
   {"GL_EXT_texture_edge_clamp",		NULL},
@@ -273,6 +281,12 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 	    MIN2(ctx->Const.MaxTextureImageUnits,
 		 ctx->Const.MaxTextureCoordUnits);
 	ctx->Const.MaxTextureMaxAnisotropy = 16.0;
+	ctx->Const.MaxTextureLodBias = 16.0;
+
+	if (screen->chip_family >= CHIP_FAMILY_RV515) {
+	    ctx->Const.MaxTextureLevels = 13;
+	    ctx->Const.MaxTextureRectSize = 4096;
+	}
 
 	ctx->Const.MinPointSize = 1.0;
 	ctx->Const.MinPointSizeAA = 1.0;
@@ -340,7 +354,7 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 	ctx->Const.FragmentProgram.MaxNativeTexIndirections =
 	    PFS_MAX_TEX_INDIRECT;
 	ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;	/* and these are?? */
-	_tnl_ProgramCacheInit(ctx);
+	ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 	ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 
 	driInitExtensions(ctx, card_extensions, GL_TRUE);
@@ -486,7 +500,6 @@ void r300DestroyContext(__DRIcontextPrivate * driContextPriv)
 		release_texture_heaps =
 		    (r300->radeon.glCtx->Shared->RefCount == 1);
 		_swsetup_DestroyContext(r300->radeon.glCtx);
-		_tnl_ProgramCacheDestroy(r300->radeon.glCtx);
 		_tnl_DestroyContext(r300->radeon.glCtx);
 		_vbo_DestroyContext(r300->radeon.glCtx);
 		_swrast_DestroyContext(r300->radeon.glCtx);
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index be6909724a3..c15e9fa3009 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -43,9 +43,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "dri_util.h"
 #include "texmem.h"
 
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
 
 #define USER_BUFFERS
 
@@ -54,7 +54,7 @@ typedef struct r300_context r300ContextRec;
 typedef struct r300_context *r300ContextPtr;
 
 #include "radeon_lock.h"
-#include "mm.h"
+#include "main/mm.h"
 
 /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
    I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
@@ -73,12 +73,12 @@ typedef struct r300_context *r300ContextPtr;
 	}
 
 #include "r300_vertprog.h"
-#include "r300_fragprog.h"
+#include "r500_fragprog.h"
 
 /**
  * This function takes a float and packs it into a uint32_t
  */
-static inline uint32_t r300PackFloat32(float fl)
+static INLINE uint32_t r300PackFloat32(float fl)
 {
 	union {
 		float fl;
@@ -95,7 +95,7 @@ static inline uint32_t r300PackFloat32(float fl)
  * But it works for most things.  I'll fix it later if someone
  * else with a better clue doesn't
  */
-static inline uint32_t r300PackFloat24(float f)
+static INLINE uint32_t r300PackFloat24(float f)
 {
 	float mantissa;
 	int exponent;
@@ -178,13 +178,6 @@ struct r300_tex_obj {
 	GLuint bufAddr;		/* Offset to start of locally
 				   shared texture block */
 
-	GLuint dirty_state;	/* Flags (1 per texunit) for
-				   whether or not this texobj
-				   has dirty hardware state
-				   (pp_*) that needs to be
-				   brought into the
-				   texunit. */
-
 	drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 	/* Six, for the cube faces */
 
@@ -330,15 +323,17 @@ struct r300_state_atom {
 #define R300_RI_INTERP_7	8
 #define R300_RI_CMDSIZE		9
 
+#define R500_RI_CMDSIZE	       17
+
 #define R300_RR_CMD_0		0	/* rr is variable size (at least 1) */
-#define R300_RR_ROUTE_0		1
-#define R300_RR_ROUTE_1		2
-#define R300_RR_ROUTE_2		3
-#define R300_RR_ROUTE_3		4
-#define R300_RR_ROUTE_4		5
-#define R300_RR_ROUTE_5		6
-#define R300_RR_ROUTE_6		7
-#define R300_RR_ROUTE_7		8
+#define R300_RR_INST_0		1
+#define R300_RR_INST_1		2
+#define R300_RR_INST_2		3
+#define R300_RR_INST_3		4
+#define R300_RR_INST_4		5
+#define R300_RR_INST_5		6
+#define R300_RR_INST_6		7
+#define R300_RR_INST_7		8
 #define R300_RR_CMDSIZE		9
 
 #define R300_FP_CMD_0		0
@@ -352,6 +347,17 @@ struct r300_state_atom {
 #define R300_FP_NODE3		8
 #define R300_FP_CMDSIZE		9
 
+#define R500_FP_CMD_0           0
+#define R500_FP_CNTL            1
+#define R500_FP_PIXSIZE         2
+#define R500_FP_CMD_1           3
+#define R500_FP_CODE_ADDR       4
+#define R500_FP_CODE_RANGE      5
+#define R500_FP_CODE_OFFSET     6
+#define R500_FP_CMD_2           7
+#define R500_FP_FC_CNTL         8
+#define R500_FP_CMDSIZE         9
+
 #define R300_FPT_CMD_0		0
 #define R300_FPT_INSTR_0	1
 #define R300_FPT_CMDSIZE	65
@@ -359,10 +365,14 @@ struct r300_state_atom {
 #define R300_FPI_CMD_0		0
 #define R300_FPI_INSTR_0	1
 #define R300_FPI_CMDSIZE	65
+/* R500 has space for 512 instructions - 6 dwords per instruction */
+#define R500_FPI_CMDSIZE	(512*6+1)
 
 #define R300_FPP_CMD_0		0
 #define R300_FPP_PARAM_0	1
 #define R300_FPP_CMDSIZE	(32*4+1)
+/* R500 has spcae for 256 constants - 4 dwords per constant */
+#define R500_FPP_CMDSIZE	(256*4+1)
 
 #define R300_FOGS_CMD_0		0
 #define R300_FOGS_STATE		1
@@ -410,6 +420,12 @@ struct r300_state_atom {
 #define R300_ZB_PITCH		2
 #define R300_ZB_CMDSIZE		3
 
+#define R300_VAP_CNTL_FLUSH     0
+#define R300_VAP_CNTL_FLUSH_1   1
+#define R300_VAP_CNTL_CMD       2
+#define R300_VAP_CNTL_INSTR     3
+#define R300_VAP_CNTL_SIZE      4
+
 #define R300_VPI_CMD_0		0
 #define R300_VPI_INSTR_0	1
 #define R300_VPI_CMDSIZE	1025	/* 256 16 byte instructions */
@@ -418,6 +434,13 @@ struct r300_state_atom {
 #define R300_VPP_PARAM_0	1
 #define R300_VPP_CMDSIZE	1025	/* 256 4-component parameters */
 
+#define R300_VPUCP_CMD_0		0
+#define R300_VPUCP_X            1
+#define R300_VPUCP_Y            2
+#define R300_VPUCP_Z            3
+#define R300_VPUCP_W            4
+#define R300_VPUCP_CMDSIZE	5	/* 256 4-component parameters */
+
 #define R300_VPS_CMD_0		0
 #define R300_VPS_ZERO_0		1
 #define R300_VPS_ZERO_1		2
@@ -444,67 +467,72 @@ struct r300_hw_state {
 
 	struct r300_state_atom vpt;	/* viewport (1D98) */
 	struct r300_state_atom vap_cntl;
+        struct r300_state_atom vap_index_offset; /* 0x208c r5xx only */
 	struct r300_state_atom vof;	/* VAP output format register 0x2090 */
 	struct r300_state_atom vte;	/* (20B0) */
-	struct r300_state_atom unk2134;	/* (2134) */
+	struct r300_state_atom vap_vf_max_vtx_indx;	/* Maximum Vertex Indx Clamp (2134) */
 	struct r300_state_atom vap_cntl_status;
 	struct r300_state_atom vir[2];	/* vap input route (2150/21E0) */
 	struct r300_state_atom vic;	/* vap input control (2180) */
-	struct r300_state_atom unk21DC;	/* (21DC) */
-	struct r300_state_atom unk221C;	/* (221C) */
+	struct r300_state_atom vap_psc_sgn_norm_cntl; /* Programmable Stream Control Signed Normalize Control (21DC) */
+	struct r300_state_atom vap_clip_cntl;
 	struct r300_state_atom vap_clip;
-	struct r300_state_atom unk2288;	/* (2288) */
+	struct r300_state_atom vap_pvs_vtx_timeout_reg;	/* Vertex timeout register (2288) */
 	struct r300_state_atom pvs;	/* pvs_cntl (22D0) */
 	struct r300_state_atom gb_enable;	/* (4008) */
 	struct r300_state_atom gb_misc;	/* Multisampling position shifts ? (4010) */
-	struct r300_state_atom unk4200;	/* (4200) */
-	struct r300_state_atom unk4214;	/* (4214) */
+	struct r300_state_atom ga_point_s0;	/* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) (4200) */
+	struct r300_state_atom ga_triangle_stipple;	/* (4214) */
 	struct r300_state_atom ps;	/* pointsize (421C) */
-	struct r300_state_atom unk4230;	/* (4230) */
+	struct r300_state_atom ga_point_minmax;	/* (4230) */
 	struct r300_state_atom lcntl;	/* line control */
-	struct r300_state_atom unk4260;	/* (4260) */
+	struct r300_state_atom ga_line_stipple;	/* (4260) */
 	struct r300_state_atom shade;
 	struct r300_state_atom polygon_mode;
 	struct r300_state_atom fogp;	/* fog parameters (4294) */
-	struct r300_state_atom unk429C;	/* (429C) */
+	struct r300_state_atom ga_soft_reset;	/* (429C) */
 	struct r300_state_atom zbias_cntl;
 	struct r300_state_atom zbs;	/* zbias (42A4) */
 	struct r300_state_atom occlusion_cntl;
 	struct r300_state_atom cul;	/* cull cntl (42B8) */
-	struct r300_state_atom unk42C0;	/* (42C0) */
+	struct r300_state_atom su_depth_scale;	/* (42C0) */
 	struct r300_state_atom rc;	/* rs control (4300) */
 	struct r300_state_atom ri;	/* rs interpolators (4310) */
 	struct r300_state_atom rr;	/* rs route (4330) */
-	struct r300_state_atom unk43A4;	/* (43A4) */
-	struct r300_state_atom unk43E8;	/* (43E8) */
+	struct r300_state_atom sc_hyperz;	/* (43A4) */
+	struct r300_state_atom sc_screendoor;	/* (43E8) */
 	struct r300_state_atom fp;	/* fragment program cntl + nodes (4600) */
 	struct r300_state_atom fpt;	/* texi - (4620) */
-	struct r300_state_atom unk46A4;	/* (46A4) */
+	struct r300_state_atom us_out_fmt;	/* (46A4) */
+	struct r300_state_atom r500fp;	/* r500 fp instructions */
+	struct r300_state_atom r500fp_const;	/* r500 fp constants */
 	struct r300_state_atom fpi[4];	/* fp instructions (46C0/47C0/48C0/49C0) */
 	struct r300_state_atom fogs;	/* fog state (4BC0) */
 	struct r300_state_atom fogc;	/* fog color (4BC8) */
 	struct r300_state_atom at;	/* alpha test (4BD4) */
-	struct r300_state_atom unk4BD8;	/* (4BD8) */
+	struct r300_state_atom fg_depth_src;	/* (4BD8) */
 	struct r300_state_atom fpp;	/* 0x4C00 and following */
-	struct r300_state_atom unk4E00;	/* (4E00) */
+	struct r300_state_atom rb3d_cctl;	/* (4E00) */
 	struct r300_state_atom bld;	/* blending (4E04) */
 	struct r300_state_atom cmk;	/* colormask (4E0C) */
 	struct r300_state_atom blend_color;	/* constant blend color */
+	struct r300_state_atom rop;	/* ropcntl */
 	struct r300_state_atom cb;	/* colorbuffer (4E28) */
-	struct r300_state_atom unk4E50;	/* (4E50) */
-	struct r300_state_atom unk4E88;	/* (4E88) */
-	struct r300_state_atom unk4EA0;	/* (4E88) I saw it only written on RV350 hardware..  */
+	struct r300_state_atom rb3d_dither_ctl;	/* (4E50) */
+	struct r300_state_atom rb3d_aaresolve_ctl;	/* (4E88) */
+	struct r300_state_atom rb3d_discard_src_pixel_lte_threshold;	/* (4E88) I saw it only written on RV350 hardware..  */
 	struct r300_state_atom zs;	/* zstencil control (4F00) */
 	struct r300_state_atom zstencil_format;
 	struct r300_state_atom zb;	/* z buffer (4F20) */
-	struct r300_state_atom unk4F28;	/* (4F28) */
+	struct r300_state_atom zb_depthclearvalue;	/* (4F28) */
 	struct r300_state_atom unk4F30;	/* (4F30) */
-	struct r300_state_atom unk4F44;	/* (4F44) */
-	struct r300_state_atom unk4F54;	/* (4F54) */
+	struct r300_state_atom zb_hiz_offset;	/* (4F44) */
+	struct r300_state_atom zb_hiz_pitch;	/* (4F54) */
 
 	struct r300_state_atom vpi;	/* vp instructions */
 	struct r300_state_atom vpp;	/* vp parameters */
 	struct r300_state_atom vps;	/* vertex point size (?) */
+	struct r300_state_atom vpucp[6];	/* vp user clip plane - 6 */
 	/* 8 texture units */
 	/* the state is grouped by function and not by
 	   texture unit. This makes single unit updates
@@ -546,9 +574,7 @@ struct r300_depthbuffer_state {
 };
 
 struct r300_stencilbuffer_state {
-	GLuint clear;
 	GLboolean hw_stencil;
-
 };
 
 /* Vertex shader state */
@@ -596,6 +622,7 @@ extern int hw_tcl_on;
 struct r300_vertex_program_key {
 	GLuint InputsRead;
 	GLuint OutputsWritten;
+	GLuint OutputsAdded;
 };
 
 struct r300_vertex_program {
@@ -627,82 +654,75 @@ struct r300_vertex_program_cont {
 #define PFS_NUM_TEMP_REGS	32
 #define PFS_NUM_CONST_REGS	16
 
-/* Mapping Mesa registers to R300 temporaries */
-struct reg_acc {
-	int reg;		/* Assigned hw temp */
-	unsigned int refcount;	/* Number of uses by mesa program */
-};
+struct r300_pfs_compile_state;
+
 
 /**
- * Describe the current lifetime information for an R300 temporary
+ * Stores state that influences the compilation of a fragment program.
  */
-struct reg_lifetime {
-	/* Index of the first slot where this register is free in the sense
-	   that it can be used as a new destination register.
-	   This is -1 if the register has been assigned to a Mesa register
-	   and the last access to the register has not yet been emitted */
-	int free;
-
-	/* Index of the first slot where this register is currently reserved.
-	   This is used to stop e.g. a scalar operation from being moved
-	   before the allocation time of a register that was first allocated
-	   for a vector operation. */
-	int reserved;
-
-	/* Index of the first slot in which the register can be used as a
-	   source without losing the value that is written by the last
-	   emitted instruction that writes to the register */
-	int vector_valid;
-	int scalar_valid;
-
-	/* Index to the slot where the register was last read.
-	   This is also the first slot in which the register may be written again */
-	int vector_lastread;
-	int scalar_lastread;
+struct r300_fragment_program_external_state {
+	struct {
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is:
+		 *  0 - GL_LUMINANCE
+		 *  1 - GL_INTENSITY
+		 *  2 - GL_ALPHA
+		 * depending on the depth texture mode.
+		 */
+		GLuint depth_texture_mode : 2;
+
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is (texture_compare_func - GL_NEVER).
+		 * [e.g. if compare function is GL_LEQUAL, this field is 3]
+		 *
+		 * Otherwise, this field is 0.
+		 */
+		GLuint texture_compare_func : 3;
+	} unit[16];
 };
 
-/**
- * Store usage information about an ALU instruction slot during the
- * compilation of a fragment program.
- */
-#define SLOT_SRC_VECTOR  (1<<0)
-#define SLOT_SRC_SCALAR  (1<<3)
-#define SLOT_SRC_BOTH    (SLOT_SRC_VECTOR | SLOT_SRC_SCALAR)
-#define SLOT_OP_VECTOR   (1<<16)
-#define SLOT_OP_SCALAR   (1<<17)
-#define SLOT_OP_BOTH     (SLOT_OP_VECTOR | SLOT_OP_SCALAR)
-
-struct r300_pfs_compile_slot {
-	/* Bitmask indicating which parts of the slot are used, using SLOT_ constants
-	   defined above */
-	unsigned int used;
-
-	/* Selected sources */
-	int vsrc[3];
-	int ssrc[3];
+
+struct r300_fragment_program_node {
+	int tex_offset; /**< first tex instruction */
+	int tex_end; /**< last tex instruction, relative to tex_offset */
+	int alu_offset; /**< first ALU instruction */
+	int alu_end; /**< last ALU instruction, relative to alu_offset */
+	int flags;
 };
 
 /**
- * Store information during compilation of fragment programs.
+ * Stores an R300 fragment program in its compiled-to-hardware form.
  */
-struct r300_pfs_compile_state {
-	int nrslots;		/* number of ALU slots used so far */
+struct r300_fragment_program_code {
+	struct {
+		int length; /**< total # of texture instructions used */
+		GLuint inst[PFS_MAX_TEX_INST];
+	} tex;
 
-	/* Track which (parts of) slots are already filled with instructions */
-	struct r300_pfs_compile_slot slot[PFS_MAX_ALU_INST];
+	struct {
+		int length; /**< total # of ALU instructions used */
+		struct {
+			GLuint inst0;
+			GLuint inst1;
+			GLuint inst2;
+			GLuint inst3;
+		} inst[PFS_MAX_ALU_INST];
+	} alu;
 
-	/* Track the validity of R300 temporaries */
-	struct reg_lifetime hwtemps[PFS_NUM_TEMP_REGS];
+	struct r300_fragment_program_node node[4];
+	int cur_node;
+	int first_node_has_tex;
 
-	/* Used to map Mesa's inputs/temps onto hardware temps */
-	int temp_in_use;
-	struct reg_acc temps[PFS_NUM_TEMP_REGS];
-	struct reg_acc inputs[32];	/* don't actually need 32... */
+	/**
+	 * Remember which program register a given hardware constant
+	 * belongs to.
+	 */
+	struct prog_src_register constant[PFS_NUM_CONST_REGS];
+	int const_nr;
 
-	/* Track usage of hardware temps, for register allocation,
-	 * indirection detection, etc. */
-	GLuint used_in_node;
-	GLuint dest_in_node;
+	int max_temp_idx;
 };
 
 /**
@@ -712,51 +732,75 @@ struct r300_pfs_compile_state {
 struct r300_fragment_program {
 	struct gl_fragment_program mesa_program;
 
-	GLcontext *ctx;
 	GLboolean translated;
 	GLboolean error;
-	struct r300_pfs_compile_state *cs;
 
-	struct {
-		int length;
-		GLuint inst[PFS_MAX_TEX_INST];
-	} tex;
+	struct r300_fragment_program_external_state state;
+	struct r300_fragment_program_code code;
 
-	struct {
-		struct {
-			GLuint inst0;
-			GLuint inst1;
-			GLuint inst2;
-			GLuint inst3;
-		} inst[PFS_MAX_ALU_INST];
-	} alu;
+	GLboolean WritesDepth;
+	GLuint optimization;
+};
+
+struct r500_pfs_compile_state;
 
+struct r500_fragment_program_external_state {
 	struct {
-		int tex_offset;
-		int tex_end;
-		int alu_offset;
-		int alu_end;
-		int flags;
-	} node[4];
-	int cur_node;
-	int first_node_has_tex;
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is:
+		 *  0 - GL_LUMINANCE
+		 *  1 - GL_INTENSITY
+		 *  2 - GL_ALPHA
+		 * depending on the depth texture mode.
+		 */
+		GLuint depth_texture_mode : 2;
+
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is (texture_compare_func - GL_NEVER).
+		 * [e.g. if compare function is GL_LEQUAL, this field is 3]
+		 *
+		 * Otherwise, this field is 0.
+		 */
+		GLuint texture_compare_func : 3;
+	} unit[16];
+};
 
-	int alu_offset;
-	int alu_end;
-	int tex_offset;
-	int tex_end;
-
-	/* Hardware constants.
-	 * Contains a pointer to the value. The destination of the pointer
-	 * is supposed to be updated when GL state changes.
-	 * Typically, this is either a pointer into
-	 * gl_program_parameter_list::ParameterValues, or a pointer to a
-	 * global constant (e.g. for sin/cos-approximation)
+struct r500_fragment_program_code {
+	struct {
+		GLuint inst0;
+		GLuint inst1;
+		GLuint inst2;
+		GLuint inst3;
+		GLuint inst4;
+		GLuint inst5;
+	} inst[512];
+
+	int inst_offset;
+	int inst_end;
+
+	/**
+	 * Remember which program register a given hardware constant
+	 * belongs to.
 	 */
-	const GLfloat *constant[PFS_NUM_CONST_REGS];
+	struct prog_src_register constant[PFS_NUM_CONST_REGS];
 	int const_nr;
 
 	int max_temp_idx;
+};
+
+struct r500_fragment_program {
+	struct gl_fragment_program mesa_program;
+
+	GLcontext *ctx;
+	GLboolean translated;
+	GLboolean error;
+
+	struct r500_fragment_program_external_state state;
+	struct r500_fragment_program_code code;
+
+	GLboolean writes_depth;
 
 	GLuint optimization;
 };
@@ -772,7 +816,6 @@ struct r300_state {
 	struct r300_texture_state texture;
 	int sw_tcl_inputs[VERT_ATTRIB_MAX];
 	struct r300_vertex_shader_state vertex_shader;
-	struct r300_pfs_compile_state pfs_compile;
 	struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
 	int aos_count;
 
@@ -795,7 +838,7 @@ struct r300_state {
  */
 struct r300_swtcl_info {
    GLuint RenderIndex;
-   
+
    /**
     * Size of a hardware vertex.  This is calculated when \c ::vertex_attrs is
     * installed in the Mesa state vector.
diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 424bf44e595..80bd3389aef 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -33,12 +33,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "imports.h"
-#include "macros.h"
-#include "image.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/image.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "math/m_translate.h"
@@ -207,49 +207,57 @@ static void r300EmitVec(GLcontext * ctx, struct r300_dma_region *rvb,
 	}
 }
 
-static GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
+#define DW_SIZE(x) ((inputs[tab[(x)]] << R300_DST_VEC_LOC_SHIFT) |	\
+		    (attribptr[tab[(x)]]->size - 1) << R300_DATA_TYPE_0_SHIFT)
+
+GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
 				 int *inputs, GLint * tab, GLuint nr)
 {
 	GLuint i, dw;
 
 	/* type, inputs, stop bit, size */
-	for (i = 0; i + 1 < nr; i += 2) {
-		dw = R300_INPUT_ROUTE_FLOAT | (inputs[tab[i]] << 8) | (attribptr[tab[i]]->size - 1);
-		dw |= (R300_INPUT_ROUTE_FLOAT | (inputs[tab[i + 1]] << 8) | (attribptr[tab[i + 1]]->size - 1)) << 16;
-		if (i + 2 == nr) {
-			dw |= (R300_VAP_INPUT_ROUTE_END << 16);
+	for (i = 0; i < nr; i += 2) {
+		/* make sure input is valid, would lockup the gpu */
+		assert(inputs[tab[i]] != -1);
+		dw = (R300_SIGNED | DW_SIZE(i));
+		if (i + 1 == nr) {
+			dw |= R300_LAST_VEC << R300_DATA_TYPE_0_SHIFT;
+		} else {
+			assert(inputs[tab[i + 1]] != -1);
+			dw |= (R300_SIGNED |
+			       DW_SIZE(i + 1)) << R300_DATA_TYPE_1_SHIFT;
+			if (i + 2 == nr) {
+				dw |= R300_LAST_VEC << R300_DATA_TYPE_1_SHIFT;
+			}
 		}
 		dst[i >> 1] = dw;
 	}
 
-	if (nr & 1) {
-		dw = R300_INPUT_ROUTE_FLOAT | (inputs[tab[nr - 1]] << 8) | (attribptr[tab[nr - 1]]->size - 1);
-		dw |= R300_VAP_INPUT_ROUTE_END;
-		dst[nr >> 1] = dw;
-	}
-
 	return (nr + 1) >> 1;
 }
 
 static GLuint r300VAPInputRoute1Swizzle(int swizzle[4])
 {
-	return (swizzle[0] << R300_INPUT_ROUTE_X_SHIFT) |
-	    (swizzle[1] << R300_INPUT_ROUTE_Y_SHIFT) |
-	    (swizzle[2] << R300_INPUT_ROUTE_Z_SHIFT) |
-	    (swizzle[3] << R300_INPUT_ROUTE_W_SHIFT);
+	return (swizzle[0] << R300_SWIZZLE_SELECT_X_SHIFT) |
+	    (swizzle[1] << R300_SWIZZLE_SELECT_Y_SHIFT) |
+	    (swizzle[2] << R300_SWIZZLE_SELECT_Z_SHIFT) |
+	    (swizzle[3] << R300_SWIZZLE_SELECT_W_SHIFT);
 }
 
 GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr)
 {
-	GLuint i;
-
-	for (i = 0; i + 1 < nr; i += 2) {
-		dst[i >> 1] = r300VAPInputRoute1Swizzle(swizzle[i]) | R300_INPUT_ROUTE_ENABLE;
-		dst[i >> 1] |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) | R300_INPUT_ROUTE_ENABLE) << 16;
-	}
+	GLuint i, dw;
 
-	if (nr & 1) {
-		dst[nr >> 1] = r300VAPInputRoute1Swizzle(swizzle[nr - 1]) | R300_INPUT_ROUTE_ENABLE;
+	for (i = 0; i < nr; i += 2) {
+		dw = (r300VAPInputRoute1Swizzle(swizzle[i]) |
+		      ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
+			R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT;
+		if (i + 1 < nr) {
+			dw |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) |
+			       ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
+				 R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT;
+		}
+		dst[i >> 1] = dw;
 	}
 
 	return (nr + 1) >> 1;
@@ -294,7 +302,7 @@ GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
 		ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
 
 	if (OutputsWritten & (1 << VERT_RESULT_COL0))
-		ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT;
+		ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT;
 
 	if (OutputsWritten & (1 << VERT_RESULT_COL1))
 		ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
@@ -536,16 +544,16 @@ void r300ReleaseArrays(GLcontext * ctx)
 
 void r300EmitCacheFlush(r300ContextPtr rmesa)
 {
-        int cmd_reserved = 0;
+	int cmd_reserved = 0;
 	int cmd_written = 0;
 
 	drm_radeon_cmd_header_t *cmd = NULL;
 
 	reg_start(R300_RB3D_DSTCACHE_CTLSTAT, 0);
-	e32(R300_RB3D_DSTCACHE_UNKNOWN_0A);
-
-	reg_start(R300_RB3D_ZCACHE_CTLSTAT, 0);
-	e32(R300_RB3D_ZCACHE_UNKNOWN_03);
-
+	e32(R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
+	    R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 
+	reg_start(R300_ZB_ZCACHE_CTLSTAT, 0);
+	e32(R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
+	    R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 }
diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index a6d69ec5ff8..89d738339f8 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -39,7 +39,7 @@
 #ifndef __R300_EMIT_H__
 #define __R300_EMIT_H__
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "r300_context.h"
 #include "r300_cmdbuf.h"
 #include "radeon_reg.h"
@@ -50,7 +50,7 @@
 #define CP_PACKET3( pkt, n )						\
 	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
 
-static inline uint32_t cmdpacket0(int reg, int count)
+static INLINE uint32_t cmdpacket0(int reg, int count)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -62,7 +62,7 @@ static inline uint32_t cmdpacket0(int reg, int count)
 	return cmd.u;
 }
 
-static inline uint32_t cmdvpu(int addr, int count)
+static INLINE uint32_t cmdvpu(int addr, int count)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -74,7 +74,21 @@ static inline uint32_t cmdvpu(int addr, int count)
 	return cmd.u;
 }
 
-static inline uint32_t cmdpacket3(int packet)
+static INLINE uint32_t cmdr500fp(int addr, int count, int type, int clamp)
+{
+	drm_r300_cmd_header_t cmd;
+
+	cmd.r500fp.cmd_type = R300_CMD_R500FP;
+	cmd.r500fp.count = count;
+	cmd.r500fp.adrhi_flags = ((unsigned int)addr & 0x100) >> 8;
+	cmd.r500fp.adrhi_flags |= type ? R500FP_CONSTANT_TYPE : 0;
+	cmd.r500fp.adrhi_flags |= clamp ? R500FP_CONSTANT_CLAMP : 0;
+	cmd.r500fp.adrlo = ((unsigned int)addr & 0x00FF);
+
+	return cmd.u;
+}
+
+static INLINE uint32_t cmdpacket3(int packet)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -84,7 +98,7 @@ static inline uint32_t cmdpacket3(int packet)
 	return cmd.u;
 }
 
-static inline uint32_t cmdcpdelay(unsigned short count)
+static INLINE uint32_t cmdcpdelay(unsigned short count)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -94,7 +108,7 @@ static inline uint32_t cmdcpdelay(unsigned short count)
 	return cmd.u;
 }
 
-static inline uint32_t cmdwait(unsigned char flags)
+static INLINE uint32_t cmdwait(unsigned char flags)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -104,7 +118,7 @@ static inline uint32_t cmdwait(unsigned char flags)
 	return cmd.u;
 }
 
-static inline uint32_t cmdpacify(void)
+static INLINE uint32_t cmdpacify(void)
 {
 	drm_r300_cmd_header_t cmd;
 
@@ -166,6 +180,19 @@ static inline uint32_t cmdpacify(void)
 		cmd[0].i = cmdvpu((dest), _n/4);			\
 	} while (0);
 
+#define r500fp_start_fragment(dest, length)				\
+	do {								\
+		int _n;							\
+		_n = (length);						\
+		cmd = (drm_radeon_cmd_header_t*)			\
+			r300AllocCmdBuf(rmesa,				\
+					(_n+1),				\
+					__FUNCTION__);			\
+		cmd_reserved = _n+1;					\
+		cmd_written =1;						\
+		cmd[0].i = cmdr500fp((dest), _n/6, 0, 0);		\
+	} while (0);
+
 #define start_packet3(packet, count)					\
 	{								\
 		int _n;							\
@@ -191,7 +218,7 @@ static inline uint32_t cmdpacify(void)
 /**
  * Must be sent to switch to 2d commands
  */
-void static inline end_3d(r300ContextPtr rmesa)
+void static INLINE end_3d(r300ContextPtr rmesa)
 {
 	drm_radeon_cmd_header_t *cmd = NULL;
 
@@ -200,7 +227,7 @@ void static inline end_3d(r300ContextPtr rmesa)
 	cmd[0].header.cmd_type = R300_CMD_END3D;
 }
 
-void static inline cp_delay(r300ContextPtr rmesa, unsigned short count)
+void static INLINE cp_delay(r300ContextPtr rmesa, unsigned short count)
 {
 	drm_radeon_cmd_header_t *cmd = NULL;
 
@@ -209,7 +236,7 @@ void static inline cp_delay(r300ContextPtr rmesa, unsigned short count)
 	cmd[0].i = cmdcpdelay(count);
 }
 
-void static inline cp_wait(r300ContextPtr rmesa, unsigned char flags)
+void static INLINE cp_wait(r300ContextPtr rmesa, unsigned char flags)
 {
 	drm_radeon_cmd_header_t *cmd = NULL;
 
@@ -230,6 +257,8 @@ extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim);
 
 extern void r300EmitCacheFlush(r300ContextPtr rmesa);
 
+extern GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
+				 int *inputs, GLint * tab, GLuint nr);
 extern GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr);
 extern GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead);
 extern GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead);
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c
index cce8e685865..4ef7f2bd788 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r300_fragprog.c
@@ -28,1974 +28,250 @@
 /**
  * \file
  *
- * \author Ben Skeggs <darktama@iinet.net.au>
+ * Fragment program compiler. Perform transformations on the intermediate
+ * representation until the program is in a form where we can translate
+ * it more or less directly into machine-readable form.
  *
+ * \author Ben Skeggs <darktama@iinet.net.au>
  * \author Jerome Glisse <j.glisse@gmail.com>
- *
- * \todo Depth write, WPOS/FOGC inputs
- *
- * \todo FogOption
- *
- * \todo Verify results of opcodes for accuracy, I've only checked them in
- * specific cases.
  */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/prog_instruction.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_print.h"
 
 #include "r300_context.h"
 #include "r300_fragprog.h"
-#include "r300_reg.h"
+#include "r300_fragprog_swizzle.h"
 #include "r300_state.h"
 
-/*
- * Usefull macros and values
- */
-#define ERROR(fmt, args...) do {			\
-		fprintf(stderr, "%s::%s(): " fmt "\n",	\
-			__FILE__, __FUNCTION__, ##args);	\
-		fp->error = GL_TRUE;			\
-	} while(0)
-
-#define PFS_INVAL 0xFFFFFFFF
-#define COMPILE_STATE struct r300_pfs_compile_state *cs = fp->cs
-
-#define SWIZZLE_XYZ		0
-#define SWIZZLE_XXX		1
-#define SWIZZLE_YYY		2
-#define SWIZZLE_ZZZ		3
-#define SWIZZLE_WWW		4
-#define SWIZZLE_YZX		5
-#define SWIZZLE_ZXY		6
-#define SWIZZLE_WZY		7
-#define SWIZZLE_111		8
-#define SWIZZLE_000		9
-#define SWIZZLE_HHH		10
-
-#define swizzle(r, x, y, z, w) do_swizzle(fp, r,		\
-					  ((SWIZZLE_##x<<0)|	\
-					   (SWIZZLE_##y<<3)|	\
-					   (SWIZZLE_##z<<6)|	\
-					   (SWIZZLE_##w<<9)),	\
-					  0)
-
-#define REG_TYPE_INPUT		0
-#define REG_TYPE_OUTPUT		1
-#define REG_TYPE_TEMP		2
-#define REG_TYPE_CONST		3
-
-#define REG_TYPE_SHIFT		0
-#define REG_INDEX_SHIFT		2
-#define REG_VSWZ_SHIFT		8
-#define REG_SSWZ_SHIFT		13
-#define REG_NEGV_SHIFT		18
-#define REG_NEGS_SHIFT		19
-#define REG_ABS_SHIFT		20
-#define REG_NO_USE_SHIFT	21	// Hack for refcounting
-#define REG_VALID_SHIFT		22	// Does the register contain a defined value?
-#define REG_BUILTIN_SHIFT   23	// Is it a builtin (like all zero/all one)?
-
-#define REG_TYPE_MASK		(0x03 << REG_TYPE_SHIFT)
-#define REG_INDEX_MASK		(0x3F << REG_INDEX_SHIFT)
-#define REG_VSWZ_MASK		(0x1F << REG_VSWZ_SHIFT)
-#define REG_SSWZ_MASK		(0x1F << REG_SSWZ_SHIFT)
-#define REG_NEGV_MASK		(0x01 << REG_NEGV_SHIFT)
-#define REG_NEGS_MASK		(0x01 << REG_NEGS_SHIFT)
-#define REG_ABS_MASK		(0x01 << REG_ABS_SHIFT)
-#define REG_NO_USE_MASK		(0x01 << REG_NO_USE_SHIFT)
-#define REG_VALID_MASK		(0x01 << REG_VALID_SHIFT)
-#define REG_BUILTIN_MASK	(0x01 << REG_BUILTIN_SHIFT)
-
-#define REG(type, index, vswz, sswz, nouse, valid, builtin)	\
-	(((type << REG_TYPE_SHIFT) & REG_TYPE_MASK) |			\
-	 ((index << REG_INDEX_SHIFT) & REG_INDEX_MASK) |		\
-	 ((nouse << REG_NO_USE_SHIFT) & REG_NO_USE_MASK) |		\
-	 ((valid << REG_VALID_SHIFT) & REG_VALID_MASK) |		\
-	 ((builtin << REG_BUILTIN_SHIFT) & REG_BUILTIN_MASK) |	\
-	 ((vswz << REG_VSWZ_SHIFT) & REG_VSWZ_MASK) |			\
-	 ((sswz << REG_SSWZ_SHIFT) & REG_SSWZ_MASK))
-#define REG_GET_TYPE(reg)						\
-	((reg & REG_TYPE_MASK) >> REG_TYPE_SHIFT)
-#define REG_GET_INDEX(reg)						\
-	((reg & REG_INDEX_MASK) >> REG_INDEX_SHIFT)
-#define REG_GET_VSWZ(reg)						\
-	((reg & REG_VSWZ_MASK) >> REG_VSWZ_SHIFT)
-#define REG_GET_SSWZ(reg)						\
-	((reg & REG_SSWZ_MASK) >> REG_SSWZ_SHIFT)
-#define REG_GET_NO_USE(reg)						\
-	((reg & REG_NO_USE_MASK) >> REG_NO_USE_SHIFT)
-#define REG_GET_VALID(reg)						\
-	((reg & REG_VALID_MASK) >> REG_VALID_SHIFT)
-#define REG_GET_BUILTIN(reg)						\
-	((reg & REG_BUILTIN_MASK) >> REG_BUILTIN_SHIFT)
-#define REG_SET_TYPE(reg, type)						\
-	reg = ((reg & ~REG_TYPE_MASK) |					\
-	       ((type << REG_TYPE_SHIFT) & REG_TYPE_MASK))
-#define REG_SET_INDEX(reg, index)					\
-	reg = ((reg & ~REG_INDEX_MASK) |				\
-	       ((index << REG_INDEX_SHIFT) & REG_INDEX_MASK))
-#define REG_SET_VSWZ(reg, vswz)						\
-	reg = ((reg & ~REG_VSWZ_MASK) |					\
-	       ((vswz << REG_VSWZ_SHIFT) & REG_VSWZ_MASK))
-#define REG_SET_SSWZ(reg, sswz)						\
-	reg = ((reg & ~REG_SSWZ_MASK) |					\
-	       ((sswz << REG_SSWZ_SHIFT) & REG_SSWZ_MASK))
-#define REG_SET_NO_USE(reg, nouse)					\
-	reg = ((reg & ~REG_NO_USE_MASK) |				\
-	       ((nouse << REG_NO_USE_SHIFT) & REG_NO_USE_MASK))
-#define REG_SET_VALID(reg, valid)					\
-	reg = ((reg & ~REG_VALID_MASK) |				\
-	       ((valid << REG_VALID_SHIFT) & REG_VALID_MASK))
-#define REG_SET_BUILTIN(reg, builtin)					\
-	reg = ((reg & ~REG_BUILTIN_MASK) |				\
-	       ((builtin << REG_BUILTIN_SHIFT) & REG_BUILTIN_MASK))
-#define REG_ABS(reg)							\
-	reg = (reg | REG_ABS_MASK)
-#define REG_NEGV(reg)							\
-	reg = (reg | REG_NEGV_MASK)
-#define REG_NEGS(reg)							\
-	reg = (reg | REG_NEGS_MASK)
-
-/*
- * Datas structures for fragment program generation
- */
-
-/* description of r300 native hw instructions */
-static const struct {
-	const char *name;
-	int argc;
-	int v_op;
-	int s_op;
-} r300_fpop[] = {
-	/* *INDENT-OFF* */
-	{"MAD", 3, R300_FPI0_OUTC_MAD, R300_FPI2_OUTA_MAD},
-	{"DP3", 2, R300_FPI0_OUTC_DP3, R300_FPI2_OUTA_DP4},
-	{"DP4", 2, R300_FPI0_OUTC_DP4, R300_FPI2_OUTA_DP4},
-	{"MIN", 2, R300_FPI0_OUTC_MIN, R300_FPI2_OUTA_MIN},
-	{"MAX", 2, R300_FPI0_OUTC_MAX, R300_FPI2_OUTA_MAX},
-	{"CMP", 3, R300_FPI0_OUTC_CMP, R300_FPI2_OUTA_CMP},
-	{"FRC", 1, R300_FPI0_OUTC_FRC, R300_FPI2_OUTA_FRC},
-	{"EX2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_EX2},
-	{"LG2", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_LG2},
-	{"RCP", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RCP},
-	{"RSQ", 1, R300_FPI0_OUTC_REPL_ALPHA, R300_FPI2_OUTA_RSQ},
-	{"REPL_ALPHA", 1, R300_FPI0_OUTC_REPL_ALPHA, PFS_INVAL},
-	{"CMPH", 3, R300_FPI0_OUTC_CMPH, PFS_INVAL},
-	/* *INDENT-ON* */
-};
-
-/* vector swizzles r300 can support natively, with a couple of
- * cases we handle specially
- *
- * REG_VSWZ/REG_SSWZ is an index into this table
- */
-
-/* mapping from SWIZZLE_* to r300 native values for scalar insns */
-#define SWIZZLE_HALF 6
-
-#define MAKE_SWZ3(x, y, z) (MAKE_SWIZZLE4(SWIZZLE_##x, \
-					  SWIZZLE_##y, \
-					  SWIZZLE_##z, \
-					  SWIZZLE_ZERO))
-/* native swizzles */
-static const struct r300_pfs_swizzle {
-	GLuint hash;		/* swizzle value this matches */
-	GLuint base;		/* base value for hw swizzle */
-	GLuint stride;		/* difference in base between arg0/1/2 */
-	GLuint flags;
-} v_swiz[] = {
-	/* *INDENT-OFF* */
-	{MAKE_SWZ3(X, Y, Z), R300_FPI0_ARGC_SRC0C_XYZ, 4, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(X, X, X), R300_FPI0_ARGC_SRC0C_XXX, 4, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(Y, Y, Y), R300_FPI0_ARGC_SRC0C_YYY, 4, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(Z, Z, Z), R300_FPI0_ARGC_SRC0C_ZZZ, 4, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(W, W, W), R300_FPI0_ARGC_SRC0A, 1, SLOT_SRC_SCALAR},
-	{MAKE_SWZ3(Y, Z, X), R300_FPI0_ARGC_SRC0C_YZX, 1, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(Z, X, Y), R300_FPI0_ARGC_SRC0C_ZXY, 1, SLOT_SRC_VECTOR},
-	{MAKE_SWZ3(W, Z, Y), R300_FPI0_ARGC_SRC0CA_WZY, 1, SLOT_SRC_BOTH},
-	{MAKE_SWZ3(ONE, ONE, ONE), R300_FPI0_ARGC_ONE, 0, 0},
-	{MAKE_SWZ3(ZERO, ZERO, ZERO), R300_FPI0_ARGC_ZERO, 0, 0},
-	{MAKE_SWZ3(HALF, HALF, HALF), R300_FPI0_ARGC_HALF, 0, 0},
-	{PFS_INVAL, 0, 0, 0},
-	/* *INDENT-ON* */
-};
-
-/* used during matching of non-native swizzles */
-#define SWZ_X_MASK (7 << 0)
-#define SWZ_Y_MASK (7 << 3)
-#define SWZ_Z_MASK (7 << 6)
-#define SWZ_W_MASK (7 << 9)
-static const struct {
-	GLuint hash;		/* used to mask matching swizzle components */
-	int mask;		/* actual outmask */
-	int count;		/* count of components matched */
-} s_mask[] = {
-	/* *INDENT-OFF* */
-	{SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK, 1 | 2 | 4, 3},
-	{SWZ_X_MASK | SWZ_Y_MASK, 1 | 2, 2},
-	{SWZ_X_MASK | SWZ_Z_MASK, 1 | 4, 2},
-	{SWZ_Y_MASK | SWZ_Z_MASK, 2 | 4, 2},
-	{SWZ_X_MASK, 1, 1},
-	{SWZ_Y_MASK, 2, 1},
-	{SWZ_Z_MASK, 4, 1},
-	{PFS_INVAL, PFS_INVAL, PFS_INVAL}
-	/* *INDENT-ON* */
-};
-
-static const struct {
-	int base;		/* hw value of swizzle */
-	int stride;		/* difference between SRC0/1/2 */
-	GLuint flags;
-} s_swiz[] = {
-	/* *INDENT-OFF* */
-	{R300_FPI2_ARGA_SRC0C_X, 3, SLOT_SRC_VECTOR},
-	{R300_FPI2_ARGA_SRC0C_Y, 3, SLOT_SRC_VECTOR},
-	{R300_FPI2_ARGA_SRC0C_Z, 3, SLOT_SRC_VECTOR},
-	{R300_FPI2_ARGA_SRC0A, 1, SLOT_SRC_SCALAR},
-	{R300_FPI2_ARGA_ZERO, 0, 0},
-	{R300_FPI2_ARGA_ONE, 0, 0},
-	{R300_FPI2_ARGA_HALF, 0, 0}
-	/* *INDENT-ON* */
-};
-
-/* boiler-plate reg, for convenience */
-static const GLuint undef = REG(REG_TYPE_TEMP,
-				0,
-				SWIZZLE_XYZ,
-				SWIZZLE_W,
-				GL_FALSE,
-				GL_FALSE,
-				GL_FALSE);
-
-/* constant one source */
-static const GLuint pfs_one = REG(REG_TYPE_CONST,
-				  0,
-				  SWIZZLE_111,
-				  SWIZZLE_ONE,
-				  GL_FALSE,
-				  GL_TRUE,
-				  GL_TRUE);
-
-/* constant half source */
-static const GLuint pfs_half = REG(REG_TYPE_CONST,
-				   0,
-				   SWIZZLE_HHH,
-				   SWIZZLE_HALF,
-				   GL_FALSE,
-				   GL_TRUE,
-				   GL_TRUE);
-
-/* constant zero source */
-static const GLuint pfs_zero = REG(REG_TYPE_CONST,
-				   0,
-				   SWIZZLE_000,
-				   SWIZZLE_ZERO,
-				   GL_FALSE,
-				   GL_TRUE,
-				   GL_TRUE);
+#include "radeon_nqssadce.h"
+#include "radeon_program_alu.h"
 
-/*
- * Common functions prototypes
- */
-static void dump_program(struct r300_fragment_program *fp);
-static void emit_arith(struct r300_fragment_program *fp, int op,
-		       GLuint dest, int mask,
-		       GLuint src0, GLuint src1, GLuint src2, int flags);
 
-/**
- * Get an R300 temporary that can be written to in the given slot.
- */
-static int get_hw_temp(struct r300_fragment_program *fp, int slot)
+static void reset_srcreg(struct prog_src_register* reg)
 {
-	COMPILE_STATE;
-	int r;
-
-	for (r = 0; r < PFS_NUM_TEMP_REGS; ++r) {
-		if (cs->hwtemps[r].free >= 0 && cs->hwtemps[r].free <= slot)
-			break;
-	}
-
-	if (r >= PFS_NUM_TEMP_REGS) {
-		ERROR("Out of hardware temps\n");
-		return 0;
-	}
-	// Reserved is used to avoid the following scenario:
-	//  R300 temporary X is first assigned to Mesa temporary Y during vector ops
-	//  R300 temporary X is then assigned to Mesa temporary Z for further vector ops
-	//  Then scalar ops on Mesa temporary Z are emitted and move back in time
-	//  to overwrite the value of temporary Y.
-	// End scenario.
-	cs->hwtemps[r].reserved = cs->hwtemps[r].free;
-	cs->hwtemps[r].free = -1;
-
-	// Reset to some value that won't mess things up when the user
-	// tries to read from a temporary that hasn't been assigned a value yet.
-	// In the normal case, vector_valid and scalar_valid should be set to
-	// a sane value by the first emit that writes to this temporary.
-	cs->hwtemps[r].vector_valid = 0;
-	cs->hwtemps[r].scalar_valid = 0;
-
-	if (r > fp->max_temp_idx)
-		fp->max_temp_idx = r;
-
-	return r;
+	_mesa_bzero(reg, sizeof(*reg));
+	reg->Swizzle = SWIZZLE_NOOP;
 }
 
-/**
- * Get an R300 temporary that will act as a TEX destination register.
- */
-static int get_hw_temp_tex(struct r300_fragment_program *fp)
+static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
 {
-	COMPILE_STATE;
-	int r;
-
-	for (r = 0; r < PFS_NUM_TEMP_REGS; ++r) {
-		if (cs->used_in_node & (1 << r))
-			continue;
-
-		// Note: Be very careful here
-		if (cs->hwtemps[r].free >= 0 && cs->hwtemps[r].free <= 0)
-			break;
-	}
-
-	if (r >= PFS_NUM_TEMP_REGS)
-		return get_hw_temp(fp, 0);	/* Will cause an indirection */
-
-	cs->hwtemps[r].reserved = cs->hwtemps[r].free;
-	cs->hwtemps[r].free = -1;
-
-	// Reset to some value that won't mess things up when the user
-	// tries to read from a temporary that hasn't been assigned a value yet.
-	// In the normal case, vector_valid and scalar_valid should be set to
-	// a sane value by the first emit that writes to this temporary.
-	cs->hwtemps[r].vector_valid = cs->nrslots;
-	cs->hwtemps[r].scalar_valid = cs->nrslots;
-
-	if (r > fp->max_temp_idx)
-		fp->max_temp_idx = r;
-
-	return r;
-}
-
-/**
- * Mark the given hardware register as free.
- */
-static void free_hw_temp(struct r300_fragment_program *fp, int idx)
-{
-	COMPILE_STATE;
-
-	// Be very careful here. Consider sequences like
-	//  MAD r0, r1,r2,r3
-	//  TEX r4, ...
-	// The TEX instruction may be moved in front of the MAD instruction
-	// due to the way nodes work. We don't want to alias r1 and r4 in
-	// this case.
-	// I'm certain the register allocation could be further sanitized,
-	// but it's tricky because of stuff that can happen inside emit_tex
-	// and emit_arith.
-	cs->hwtemps[idx].free = cs->nrslots + 1;
-}
-
-/**
- * Create a new Mesa temporary register.
- */
-static GLuint get_temp_reg(struct r300_fragment_program *fp)
-{
-	COMPILE_STATE;
-	GLuint r = undef;
-	GLuint index;
-
-	index = ffs(~cs->temp_in_use);
-	if (!index) {
-		ERROR("Out of program temps\n");
-		return r;
-	}
-
-	cs->temp_in_use |= (1 << --index);
-	cs->temps[index].refcount = 0xFFFFFFFF;
-	cs->temps[index].reg = -1;
-
-	REG_SET_TYPE(r, REG_TYPE_TEMP);
-	REG_SET_INDEX(r, index);
-	REG_SET_VALID(r, GL_TRUE);
-	return r;
-}
-
-/**
- * Create a new Mesa temporary register that will act as the destination
- * register for a texture read.
- */
-static GLuint get_temp_reg_tex(struct r300_fragment_program *fp)
-{
-	COMPILE_STATE;
-	GLuint r = undef;
-	GLuint index;
-
-	index = ffs(~cs->temp_in_use);
-	if (!index) {
-		ERROR("Out of program temps\n");
-		return r;
-	}
-
-	cs->temp_in_use |= (1 << --index);
-	cs->temps[index].refcount = 0xFFFFFFFF;
-	cs->temps[index].reg = get_hw_temp_tex(fp);
-
-	REG_SET_TYPE(r, REG_TYPE_TEMP);
-	REG_SET_INDEX(r, index);
-	REG_SET_VALID(r, GL_TRUE);
-	return r;
-}
-
-/**
- * Free a Mesa temporary and the associated R300 temporary.
- */
-static void free_temp(struct r300_fragment_program *fp, GLuint r)
-{
-	COMPILE_STATE;
-	GLuint index = REG_GET_INDEX(r);
-
-	if (!(cs->temp_in_use & (1 << index)))
-		return;
+	gl_state_index fail_value_tokens[STATE_LENGTH] = {
+		STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
+	};
+	struct prog_src_register reg = { 0, };
 
-	if (REG_GET_TYPE(r) == REG_TYPE_TEMP) {
-		free_hw_temp(fp, cs->temps[index].reg);
-		cs->temps[index].reg = -1;
-		cs->temp_in_use &= ~(1 << index);
-	} else if (REG_GET_TYPE(r) == REG_TYPE_INPUT) {
-		free_hw_temp(fp, cs->inputs[index].reg);
-		cs->inputs[index].reg = -1;
-	}
+	fail_value_tokens[2] = tmu;
+	reg.File = PROGRAM_STATE_VAR;
+	reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
+	reg.Swizzle = SWIZZLE_WWWW;
+	return reg;
 }
 
 /**
- * Emit a hardware constant/parameter.
+ * Transform TEX, TXP, TXB, and KIL instructions in the following way:
+ *  - premultiply texture coordinates for RECT
+ *  - extract operand swizzles
+ *  - introduce a temporary register when write masks are needed
  *
- * \p cp Stable pointer to an array of 4 floats.
- *  The pointer must be stable in the sense that it remains to be valid
- *  and hold the contents of the constant/parameter throughout the lifetime
- *  of the fragment program (actually, up until the next time the fragment
- *  program is translated).
- */
-static GLuint emit_const4fv(struct r300_fragment_program *fp,
-			    const GLfloat * cp)
-{
-	GLuint reg = undef;
-	int index;
-
-	for (index = 0; index < fp->const_nr; ++index) {
-		if (fp->constant[index] == cp)
-			break;
-	}
-
-	if (index >= fp->const_nr) {
-		if (index >= PFS_NUM_CONST_REGS) {
-			ERROR("Out of hw constants!\n");
-			return reg;
-		}
-
-		fp->const_nr++;
-		fp->constant[index] = cp;
-	}
-
-	REG_SET_TYPE(reg, REG_TYPE_CONST);
-	REG_SET_INDEX(reg, index);
-	REG_SET_VALID(reg, GL_TRUE);
-	return reg;
-}
-
-static inline GLuint negate(GLuint r)
-{
-	REG_NEGS(r);
-	REG_NEGV(r);
-	return r;
-}
-
-/* Hack, to prevent clobbering sources used multiple times when
- * emulating non-native instructions
+ * \todo If/when r5xx uses the radeon_program architecture, this can probably
+ * be reused.
  */
-static inline GLuint keep(GLuint r)
-{
-	REG_SET_NO_USE(r, GL_TRUE);
-	return r;
-}
-
-static inline GLuint absolute(GLuint r)
+static GLboolean transform_TEX(
+	struct radeon_transform_context *t,
+	struct prog_instruction* orig_inst, void* data)
 {
-	REG_ABS(r);
-	return r;
-}
-
-static int swz_native(struct r300_fragment_program *fp,
-		      GLuint src, GLuint * r, GLuint arbneg)
-{
-	/* Native swizzle, handle negation */
-	src = (src & ~REG_NEGS_MASK) | (((arbneg >> 3) & 1) << REG_NEGS_SHIFT);
-
-	if ((arbneg & 0x7) == 0x0) {
-		src = src & ~REG_NEGV_MASK;
-		*r = src;
-	} else if ((arbneg & 0x7) == 0x7) {
-		src |= REG_NEGV_MASK;
-		*r = src;
-	} else {
-		if (!REG_GET_VALID(*r))
-			*r = get_temp_reg(fp);
-		src |= REG_NEGV_MASK;
-		emit_arith(fp,
-			   PFS_OP_MAD,
-			   *r, arbneg & 0x7, keep(src), pfs_one, pfs_zero, 0);
-		src = src & ~REG_NEGV_MASK;
-		emit_arith(fp,
-			   PFS_OP_MAD,
-			   *r,
-			   (arbneg ^ 0x7) | WRITEMASK_W,
-			   src, pfs_one, pfs_zero, 0);
-	}
-
-	return 3;
-}
-
-static int swz_emit_partial(struct r300_fragment_program *fp,
-			    GLuint src,
-			    GLuint * r, int mask, int mc, GLuint arbneg)
-{
-	GLuint tmp;
-	GLuint wmask = 0;
-
-	if (!REG_GET_VALID(*r))
-		*r = get_temp_reg(fp);
-
-	/* A partial match, VSWZ/mask define what parts of the
-	 * desired swizzle we match
-	 */
-	if (mc + s_mask[mask].count == 3) {
-		wmask = WRITEMASK_W;
-		src |= ((arbneg >> 3) & 1) << REG_NEGS_SHIFT;
-	}
-
-	tmp = arbneg & s_mask[mask].mask;
-	if (tmp) {
-		tmp = tmp ^ s_mask[mask].mask;
-		if (tmp) {
-			emit_arith(fp,
-				   PFS_OP_MAD,
-				   *r,
-				   arbneg & s_mask[mask].mask,
-				   keep(src) | REG_NEGV_MASK,
-				   pfs_one, pfs_zero, 0);
-			if (!wmask) {
-				REG_SET_NO_USE(src, GL_TRUE);
-			} else {
-				REG_SET_NO_USE(src, GL_FALSE);
-			}
-			emit_arith(fp,
-				   PFS_OP_MAD,
-				   *r, tmp | wmask, src, pfs_one, pfs_zero, 0);
-		} else {
-			if (!wmask) {
-				REG_SET_NO_USE(src, GL_TRUE);
-			} else {
-				REG_SET_NO_USE(src, GL_FALSE);
-			}
-			emit_arith(fp,
-				   PFS_OP_MAD,
-				   *r,
-				   (arbneg & s_mask[mask].mask) | wmask,
-				   src | REG_NEGV_MASK, pfs_one, pfs_zero, 0);
-		}
-	} else {
-		if (!wmask) {
-			REG_SET_NO_USE(src, GL_TRUE);
-		} else {
-			REG_SET_NO_USE(src, GL_FALSE);
-		}
-		emit_arith(fp, PFS_OP_MAD,
-			   *r,
-			   s_mask[mask].mask | wmask,
-			   src, pfs_one, pfs_zero, 0);
-	}
-
-	return s_mask[mask].count;
-}
-
-static GLuint do_swizzle(struct r300_fragment_program *fp,
-			 GLuint src, GLuint arbswz, GLuint arbneg)
-{
-	GLuint r = undef;
-	GLuint vswz;
-	int c_mask = 0;
-	int v_match = 0;
-
-	/* If swizzling from something without an XYZW native swizzle,
-	 * emit result to a temp, and do new swizzle from the temp.
-	 */
-#if 0
-	if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || REG_GET_SSWZ(src) != SWIZZLE_W) {
-		GLuint temp = get_temp_reg(fp);
-		emit_arith(fp,
-			   PFS_OP_MAD,
-			   temp, WRITEMASK_XYZW, src, pfs_one, pfs_zero, 0);
-		src = temp;
-	}
-#endif
-
-	if (REG_GET_VSWZ(src) != SWIZZLE_XYZ || REG_GET_SSWZ(src) != SWIZZLE_W) {
-		GLuint vsrcswz =
-		    (v_swiz[REG_GET_VSWZ(src)].
-		     hash & (SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK)) |
-		    REG_GET_SSWZ(src) << 9;
-		GLint i;
-
-		GLuint newswz = 0;
-		GLuint offset;
-		for (i = 0; i < 4; ++i) {
-			offset = GET_SWZ(arbswz, i);
-
-			newswz |=
-			    (offset <= 3) ? GET_SWZ(vsrcswz,
-						    offset) << i *
-			    3 : offset << i * 3;
-		}
-
-		arbswz = newswz & (SWZ_X_MASK | SWZ_Y_MASK | SWZ_Z_MASK);
-		REG_SET_SSWZ(src, GET_SWZ(newswz, 3));
-	} else {
-		/* set scalar swizzling */
-		REG_SET_SSWZ(src, GET_SWZ(arbswz, 3));
-
-	}
-	do {
-		vswz = REG_GET_VSWZ(src);
-		do {
-			int chash;
-
-			REG_SET_VSWZ(src, vswz);
-			chash = v_swiz[REG_GET_VSWZ(src)].hash &
-			    s_mask[c_mask].hash;
-
-			if (chash == (arbswz & s_mask[c_mask].hash)) {
-				if (s_mask[c_mask].count == 3) {
-					v_match += swz_native(fp,
-							      src, &r, arbneg);
-				} else {
-					v_match += swz_emit_partial(fp,
-								    src,
-								    &r,
-								    c_mask,
-								    v_match,
-								    arbneg);
-				}
-
-				if (v_match == 3)
-					return r;
-
-				/* Fill with something invalid.. all 0's was
-				 * wrong before, matched SWIZZLE_X.  So all
-				 * 1's will be okay for now
-				 */
-				arbswz |= (PFS_INVAL & s_mask[c_mask].hash);
-			}
-		} while (v_swiz[++vswz].hash != PFS_INVAL);
-		REG_SET_VSWZ(src, SWIZZLE_XYZ);
-	} while (s_mask[++c_mask].hash != PFS_INVAL);
-
-	ERROR("should NEVER get here\n");
-	return r;
-}
-
-static GLuint t_src(struct r300_fragment_program *fp,
-		    struct prog_src_register fpsrc)
-{
-	GLuint r = undef;
-
-	switch (fpsrc.File) {
-	case PROGRAM_TEMPORARY:
-		REG_SET_INDEX(r, fpsrc.Index);
-		REG_SET_VALID(r, GL_TRUE);
-		REG_SET_TYPE(r, REG_TYPE_TEMP);
-		break;
-	case PROGRAM_INPUT:
-		REG_SET_INDEX(r, fpsrc.Index);
-		REG_SET_VALID(r, GL_TRUE);
-		REG_SET_TYPE(r, REG_TYPE_INPUT);
-		break;
-	case PROGRAM_LOCAL_PARAM:
-		r = emit_const4fv(fp,
-				  fp->mesa_program.Base.LocalParams[fpsrc.
-								    Index]);
-		break;
-	case PROGRAM_ENV_PARAM:
-		r = emit_const4fv(fp,
-				  fp->ctx->FragmentProgram.Parameters[fpsrc.
-								      Index]);
-		break;
-	case PROGRAM_STATE_VAR:
-	case PROGRAM_NAMED_PARAM:
-		r = emit_const4fv(fp,
-				  fp->mesa_program.Base.Parameters->
-				  ParameterValues[fpsrc.Index]);
-		break;
-	default:
-		ERROR("unknown SrcReg->File %x\n", fpsrc.File);
-		return r;
-	}
-
-	/* no point swizzling ONE/ZERO/HALF constants... */
-	if (REG_GET_VSWZ(r) < SWIZZLE_111 || REG_GET_SSWZ(r) < SWIZZLE_ZERO)
-		r = do_swizzle(fp, r, fpsrc.Swizzle, fpsrc.NegateBase);
-	return r;
-}
-
-static GLuint t_scalar_src(struct r300_fragment_program *fp,
-			   struct prog_src_register fpsrc)
-{
-	struct prog_src_register src = fpsrc;
-	int sc = GET_SWZ(fpsrc.Swizzle, 0);	/* X */
-
-	src.Swizzle = ((sc << 0) | (sc << 3) | (sc << 6) | (sc << 9));
-
-	return t_src(fp, src);
-}
-
-static GLuint t_dst(struct r300_fragment_program *fp,
-		    struct prog_dst_register dest)
-{
-	GLuint r = undef;
-
-	switch (dest.File) {
-	case PROGRAM_TEMPORARY:
-		REG_SET_INDEX(r, dest.Index);
-		REG_SET_VALID(r, GL_TRUE);
-		REG_SET_TYPE(r, REG_TYPE_TEMP);
-		return r;
-	case PROGRAM_OUTPUT:
-		REG_SET_TYPE(r, REG_TYPE_OUTPUT);
-		switch (dest.Index) {
-		case FRAG_RESULT_COLR:
-		case FRAG_RESULT_DEPR:
-			REG_SET_INDEX(r, dest.Index);
-			REG_SET_VALID(r, GL_TRUE);
-			return r;
-		default:
-			ERROR("Bad DstReg->Index 0x%x\n", dest.Index);
-			return r;
-		}
-	default:
-		ERROR("Bad DstReg->File 0x%x\n", dest.File);
-		return r;
-	}
-}
-
-static int t_hw_src(struct r300_fragment_program *fp, GLuint src, GLboolean tex)
-{
-	COMPILE_STATE;
-	int idx;
-	int index = REG_GET_INDEX(src);
-
-	switch (REG_GET_TYPE(src)) {
-	case REG_TYPE_TEMP:
-		/* NOTE: if reg==-1 here, a source is being read that
-		 *       hasn't been written to. Undefined results.
-		 */
-		if (cs->temps[index].reg == -1)
-			cs->temps[index].reg = get_hw_temp(fp, cs->nrslots);
-
-		idx = cs->temps[index].reg;
-
-		if (!REG_GET_NO_USE(src) && (--cs->temps[index].refcount == 0))
-			free_temp(fp, src);
-		break;
-	case REG_TYPE_INPUT:
-		idx = cs->inputs[index].reg;
-
-		if (!REG_GET_NO_USE(src) && (--cs->inputs[index].refcount == 0))
-			free_hw_temp(fp, cs->inputs[index].reg);
-		break;
-	case REG_TYPE_CONST:
-		return (index | SRC_CONST);
-	default:
-		ERROR("Invalid type for source reg\n");
-		return (0 | SRC_CONST);
-	}
+	struct r300_fragment_program_compiler *compiler =
+		(struct r300_fragment_program_compiler*)data;
+	struct prog_instruction inst = *orig_inst;
+	struct prog_instruction* tgt;
+	GLboolean destredirect = GL_FALSE;
+
+	if (inst.Opcode != OPCODE_TEX &&
+	    inst.Opcode != OPCODE_TXB &&
+	    inst.Opcode != OPCODE_TXP &&
+	    inst.Opcode != OPCODE_KIL)
+		return GL_FALSE;
 
-	if (!tex)
-		cs->used_in_node |= (1 << idx);
+	if (inst.Opcode != OPCODE_KIL &&
+	    t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
 
-	return idx;
-}
+		if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
+			tgt = radeonAppendInstructions(t->Program, 1);
 
-static int t_hw_dst(struct r300_fragment_program *fp,
-		    GLuint dest, GLboolean tex, int slot)
-{
-	COMPILE_STATE;
-	int idx;
-	GLuint index = REG_GET_INDEX(dest);
-	assert(REG_GET_VALID(dest));
-
-	switch (REG_GET_TYPE(dest)) {
-	case REG_TYPE_TEMP:
-		if (cs->temps[REG_GET_INDEX(dest)].reg == -1) {
-			if (!tex) {
-				cs->temps[index].reg = get_hw_temp(fp, slot);
+			tgt->Opcode = OPCODE_MOV;
+			tgt->DstReg = inst.DstReg;
+			if (comparefunc == GL_ALWAYS) {
+				tgt->SrcReg[0].File = PROGRAM_BUILTIN;
+				tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
 			} else {
-				cs->temps[index].reg = get_hw_temp_tex(fp);
+				tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
 			}
+			return GL_TRUE;
 		}
-		idx = cs->temps[index].reg;
-
-		if (!REG_GET_NO_USE(dest) && (--cs->temps[index].refcount == 0))
-			free_temp(fp, dest);
-
-		cs->dest_in_node |= (1 << idx);
-		cs->used_in_node |= (1 << idx);
-		break;
-	case REG_TYPE_OUTPUT:
-		switch (index) {
-		case FRAG_RESULT_COLR:
-			fp->node[fp->cur_node].flags |=
-			    R300_PFS_NODE_OUTPUT_COLOR;
-			break;
-		case FRAG_RESULT_DEPR:
-			fp->node[fp->cur_node].flags |=
-			    R300_PFS_NODE_OUTPUT_DEPTH;
-			break;
-		}
-		return index;
-		break;
-	default:
-		ERROR("invalid dest reg type %d\n", REG_GET_TYPE(dest));
-		return 0;
-	}
 
-	return idx;
-}
-
-static void emit_nop(struct r300_fragment_program *fp)
-{
-	COMPILE_STATE;
-
-	if (cs->nrslots >= PFS_MAX_ALU_INST) {
-		ERROR("Out of ALU instruction slots\n");
-		return;
+		inst.DstReg.File = PROGRAM_TEMPORARY;
+		inst.DstReg.Index = radeonFindFreeTemporary(t);
+		inst.DstReg.WriteMask = WRITEMASK_XYZW;
 	}
 
-	fp->alu.inst[cs->nrslots].inst0 = NOP_INST0;
-	fp->alu.inst[cs->nrslots].inst1 = NOP_INST1;
-	fp->alu.inst[cs->nrslots].inst2 = NOP_INST2;
-	fp->alu.inst[cs->nrslots].inst3 = NOP_INST3;
-	cs->nrslots++;
-}
-
-static void emit_tex(struct r300_fragment_program *fp,
-		     struct prog_instruction *fpi, int opcode)
-{
-	COMPILE_STATE;
-	GLuint coord = t_src(fp, fpi->SrcReg[0]);
-	GLuint dest = undef, rdest = undef;
-	GLuint din, uin;
-	int unit = fpi->TexSrcUnit;
-	int hwsrc, hwdest;
-	GLuint tempreg = 0;
-
-	uin = cs->used_in_node;
-	din = cs->dest_in_node;
-
-	/* Resolve source/dest to hardware registers */
-	if (opcode != R300_FPITX_OP_KIL) {
-		if (fpi->TexSrcTarget == TEXTURE_RECT_INDEX) {
-			/**
-			 * Hardware uses [0..1]x[0..1] range for rectangle textures
-			 * instead of [0..Width]x[0..Height].
-			 * Add a scaling instruction.
-			 *
-			 * \todo Refactor this once we have proper rewriting/optimization
-			 * support for programs.
-			 */
-			gl_state_index tokens[STATE_LENGTH] = {
-				STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0,
-				0
-			};
-			int factor_index;
-			GLuint factorreg;
-
-			tokens[2] = unit;
-			factor_index =
-			    _mesa_add_state_reference(fp->mesa_program.Base.
-						      Parameters, tokens);
-			factorreg =
-			    emit_const4fv(fp,
-					  fp->mesa_program.Base.Parameters->
-					  ParameterValues[factor_index]);
-			tempreg = keep(get_temp_reg(fp));
-
-			emit_arith(fp, PFS_OP_MAD, tempreg, WRITEMASK_XYZW,
-				   coord, factorreg, pfs_zero, 0);
-
-			/* Ensure correct node indirection */
-			uin = cs->used_in_node;
-			din = cs->dest_in_node;
-
-			hwsrc = t_hw_src(fp, tempreg, GL_TRUE);
-		} else {
-			hwsrc = t_hw_src(fp, coord, GL_TRUE);
-		}
-
-		dest = t_dst(fp, fpi->DstReg);
 
-		/* r300 doesn't seem to be able to do TEX->output reg */
-		if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) {
-			rdest = dest;
-			dest = get_temp_reg_tex(fp);
-		}
-		hwdest =
-		    t_hw_dst(fp, dest, GL_TRUE,
-			     fp->node[fp->cur_node].alu_offset);
-
-		/* Use a temp that hasn't been used in this node, rather
-		 * than causing an indirection
-		 */
-		if (uin & (1 << hwdest)) {
-			free_hw_temp(fp, hwdest);
-			hwdest = get_hw_temp_tex(fp);
-			cs->temps[REG_GET_INDEX(dest)].reg = hwdest;
-		}
-	} else {
-		hwdest = 0;
-		unit = 0;
-		hwsrc = t_hw_src(fp, coord, GL_TRUE);
-	}
-
-	/* Indirection if source has been written in this node, or if the
-	 * dest has been read/written in this node
+	/* Hardware uses [0..1]x[0..1] range for rectangle textures
+	 * instead of [0..Width]x[0..Height].
+	 * Add a scaling instruction.
 	 */
-	if ((REG_GET_TYPE(coord) != REG_TYPE_CONST &&
-	     (din & (1 << hwsrc))) || (uin & (1 << hwdest))) {
-
-		/* Finish off current node */
-		if (fp->node[fp->cur_node].alu_offset == cs->nrslots)
-			emit_nop(fp);
-
-		fp->node[fp->cur_node].alu_end =
-		    cs->nrslots - fp->node[fp->cur_node].alu_offset - 1;
-		assert(fp->node[fp->cur_node].alu_end >= 0);
-
-		if (++fp->cur_node >= PFS_MAX_TEX_INDIRECT) {
-			ERROR("too many levels of texture indirection\n");
-			return;
-		}
-
-		/* Start new node */
-		fp->node[fp->cur_node].tex_offset = fp->tex.length;
-		fp->node[fp->cur_node].alu_offset = cs->nrslots;
-		fp->node[fp->cur_node].tex_end = -1;
-		fp->node[fp->cur_node].alu_end = -1;
-		fp->node[fp->cur_node].flags = 0;
-		cs->used_in_node = 0;
-		cs->dest_in_node = 0;
-	}
+	if (inst.Opcode != OPCODE_KIL && inst.TexSrcTarget == TEXTURE_RECT_INDEX) {
+		gl_state_index tokens[STATE_LENGTH] = {
+			STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0,
+			0
+		};
 
-	if (fp->cur_node == 0)
-		fp->first_node_has_tex = 1;
+		int tempreg = radeonFindFreeTemporary(t);
+		int factor_index;
 
-	fp->tex.inst[fp->tex.length++] = 0 | (hwsrc << R300_FPITX_SRC_SHIFT)
-	    | (hwdest << R300_FPITX_DST_SHIFT)
-	    | (unit << R300_FPITX_IMAGE_SHIFT)
-	    /* not entirely sure about this */
-	    | (opcode << R300_FPITX_OPCODE_SHIFT);
+		tokens[2] = inst.TexSrcUnit;
+		factor_index = _mesa_add_state_reference(t->Program->Parameters, tokens);
 
-	cs->dest_in_node |= (1 << hwdest);
-	if (REG_GET_TYPE(coord) != REG_TYPE_CONST)
-		cs->used_in_node |= (1 << hwsrc);
+		tgt = radeonAppendInstructions(t->Program, 1);
 
-	fp->node[fp->cur_node].tex_end++;
+		tgt->Opcode = OPCODE_MUL;
+		tgt->DstReg.File = PROGRAM_TEMPORARY;
+		tgt->DstReg.Index = tempreg;
+		tgt->SrcReg[0] = inst.SrcReg[0];
+		tgt->SrcReg[1].File = PROGRAM_STATE_VAR;
+		tgt->SrcReg[1].Index = factor_index;
 
-	/* Copy from temp to output if needed */
-	if (REG_GET_VALID(rdest)) {
-		emit_arith(fp, PFS_OP_MAD, rdest, WRITEMASK_XYZW, dest,
-			   pfs_one, pfs_zero, 0);
-		free_temp(fp, dest);
+		reset_srcreg(&inst.SrcReg[0]);
+		inst.SrcReg[0].File = PROGRAM_TEMPORARY;
+		inst.SrcReg[0].Index = tempreg;
 	}
 
-	/* Free temp register */
-	if (tempreg != 0)
-		free_temp(fp, tempreg);
-}
-
-/**
- * Returns the first slot where we could possibly allow writing to dest,
- * according to register allocation.
- */
-static int get_earliest_allowed_write(struct r300_fragment_program *fp,
-				      GLuint dest, int mask)
-{
-	COMPILE_STATE;
-	int idx;
-	int pos;
-	GLuint index = REG_GET_INDEX(dest);
-	assert(REG_GET_VALID(dest));
-
-	switch (REG_GET_TYPE(dest)) {
-	case REG_TYPE_TEMP:
-		if (cs->temps[index].reg == -1)
-			return 0;
-
-		idx = cs->temps[index].reg;
-		break;
-	case REG_TYPE_OUTPUT:
-		return 0;
-	default:
-		ERROR("invalid dest reg type %d\n", REG_GET_TYPE(dest));
-		return 0;
-	}
-
-	pos = cs->hwtemps[idx].reserved;
-	if (mask & WRITEMASK_XYZ) {
-		if (pos < cs->hwtemps[idx].vector_lastread)
-			pos = cs->hwtemps[idx].vector_lastread;
-	}
-	if (mask & WRITEMASK_W) {
-		if (pos < cs->hwtemps[idx].scalar_lastread)
-			pos = cs->hwtemps[idx].scalar_lastread;
-	}
-
-	return pos;
-}
+	if (inst.Opcode != OPCODE_KIL) {
+		if (inst.DstReg.File != PROGRAM_TEMPORARY ||
+		    inst.DstReg.WriteMask != WRITEMASK_XYZW) {
+			int tempreg = radeonFindFreeTemporary(t);
 
-/**
- * Allocates a slot for an ALU instruction that can consist of
- * a vertex part or a scalar part or both.
- *
- * Sources from src (src[0] to src[argc-1]) are added to the slot in the
- * appropriate position (vector and/or scalar), and their positions are
- * recorded in the srcpos array.
- *
- * This function emits instruction code for the source fetch and the
- * argument selection. It does not emit instruction code for the
- * opcode or the destination selection.
- *
- * @return the index of the slot
- */
-static int find_and_prepare_slot(struct r300_fragment_program *fp,
-				 GLboolean emit_vop,
-				 GLboolean emit_sop,
-				 int argc, GLuint * src, GLuint dest, int mask)
-{
-	COMPILE_STATE;
-	int hwsrc[3];
-	int srcpos[3];
-	unsigned int used;
-	int tempused;
-	int tempvsrc[3];
-	int tempssrc[3];
-	int pos;
-	int regnr;
-	int i, j;
-
-	// Determine instruction slots, whether sources are required on
-	// vector or scalar side, and the smallest slot number where
-	// all source registers are available
-	used = 0;
-	if (emit_vop)
-		used |= SLOT_OP_VECTOR;
-	if (emit_sop)
-		used |= SLOT_OP_SCALAR;
-
-	pos = get_earliest_allowed_write(fp, dest, mask);
-
-	if (fp->node[fp->cur_node].alu_offset > pos)
-		pos = fp->node[fp->cur_node].alu_offset;
-	for (i = 0; i < argc; ++i) {
-		if (!REG_GET_BUILTIN(src[i])) {
-			if (emit_vop)
-				used |= v_swiz[REG_GET_VSWZ(src[i])].flags << i;
-			if (emit_sop)
-				used |= s_swiz[REG_GET_SSWZ(src[i])].flags << i;
-		}
-
-		hwsrc[i] = t_hw_src(fp, src[i], GL_FALSE);	/* Note: sideeffects wrt refcounting! */
-		regnr = hwsrc[i] & 31;
-
-		if (REG_GET_TYPE(src[i]) == REG_TYPE_TEMP) {
-			if (used & (SLOT_SRC_VECTOR << i)) {
-				if (cs->hwtemps[regnr].vector_valid > pos)
-					pos = cs->hwtemps[regnr].vector_valid;
-			}
-			if (used & (SLOT_SRC_SCALAR << i)) {
-				if (cs->hwtemps[regnr].scalar_valid > pos)
-					pos = cs->hwtemps[regnr].scalar_valid;
-			}
+			inst.DstReg.File = PROGRAM_TEMPORARY;
+			inst.DstReg.Index = tempreg;
+			inst.DstReg.WriteMask = WRITEMASK_XYZW;
+			destredirect = GL_TRUE;
 		}
 	}
 
-	// Find a slot that fits
-	for (;; ++pos) {
-		if (cs->slot[pos].used & used & SLOT_OP_BOTH)
-			continue;
-
-		if (pos >= cs->nrslots) {
-			if (cs->nrslots >= PFS_MAX_ALU_INST) {
-				ERROR("Out of ALU instruction slots\n");
-				return -1;
-			}
-
-			fp->alu.inst[pos].inst0 = NOP_INST0;
-			fp->alu.inst[pos].inst1 = NOP_INST1;
-			fp->alu.inst[pos].inst2 = NOP_INST2;
-			fp->alu.inst[pos].inst3 = NOP_INST3;
-
-			cs->nrslots++;
-		}
-		// Note: When we need both parts (vector and scalar) of a source,
-		// we always try to put them into the same position. This makes the
-		// code easier to read, and it is optimal (i.e. one doesn't gain
-		// anything by splitting the parts).
-		// It also avoids headaches with swizzles that access both parts (i.e WXY)
-		tempused = cs->slot[pos].used;
-		for (i = 0; i < 3; ++i) {
-			tempvsrc[i] = cs->slot[pos].vsrc[i];
-			tempssrc[i] = cs->slot[pos].ssrc[i];
-		}
-
-		for (i = 0; i < argc; ++i) {
-			int flags = (used >> i) & SLOT_SRC_BOTH;
-
-			if (!flags) {
-				srcpos[i] = 0;
-				continue;
-			}
-
-			for (j = 0; j < 3; ++j) {
-				if ((tempused >> j) & flags & SLOT_SRC_VECTOR) {
-					if (tempvsrc[j] != hwsrc[i])
-						continue;
-				}
-
-				if ((tempused >> j) & flags & SLOT_SRC_SCALAR) {
-					if (tempssrc[j] != hwsrc[i])
-						continue;
-				}
-
-				break;
-			}
-
-			if (j == 3)
-				break;
-
-			srcpos[i] = j;
-			tempused |= flags << j;
-			if (flags & SLOT_SRC_VECTOR)
-				tempvsrc[j] = hwsrc[i];
-			if (flags & SLOT_SRC_SCALAR)
-				tempssrc[j] = hwsrc[i];
-		}
-
-		if (i == argc)
-			break;
-	}
-
-	// Found a slot, reserve it
-	cs->slot[pos].used = tempused | (used & SLOT_OP_BOTH);
-	for (i = 0; i < 3; ++i) {
-		cs->slot[pos].vsrc[i] = tempvsrc[i];
-		cs->slot[pos].ssrc[i] = tempssrc[i];
-	}
-
-	for (i = 0; i < argc; ++i) {
-		if (REG_GET_TYPE(src[i]) == REG_TYPE_TEMP) {
-			int regnr = hwsrc[i] & 31;
-
-			if (used & (SLOT_SRC_VECTOR << i)) {
-				if (cs->hwtemps[regnr].vector_lastread < pos)
-					cs->hwtemps[regnr].vector_lastread =
-					    pos;
-			}
-			if (used & (SLOT_SRC_SCALAR << i)) {
-				if (cs->hwtemps[regnr].scalar_lastread < pos)
-					cs->hwtemps[regnr].scalar_lastread =
-					    pos;
-			}
-		}
-	}
-
-	// Emit the source fetch code
-	fp->alu.inst[pos].inst1 &= ~R300_FPI1_SRC_MASK;
-	fp->alu.inst[pos].inst1 |=
-	    ((cs->slot[pos].vsrc[0] << R300_FPI1_SRC0C_SHIFT) |
-	     (cs->slot[pos].vsrc[1] << R300_FPI1_SRC1C_SHIFT) |
-	     (cs->slot[pos].vsrc[2] << R300_FPI1_SRC2C_SHIFT));
-
-	fp->alu.inst[pos].inst3 &= ~R300_FPI3_SRC_MASK;
-	fp->alu.inst[pos].inst3 |=
-	    ((cs->slot[pos].ssrc[0] << R300_FPI3_SRC0A_SHIFT) |
-	     (cs->slot[pos].ssrc[1] << R300_FPI3_SRC1A_SHIFT) |
-	     (cs->slot[pos].ssrc[2] << R300_FPI3_SRC2A_SHIFT));
-
-	// Emit the argument selection code
-	if (emit_vop) {
-		int swz[3];
-
-		for (i = 0; i < 3; ++i) {
-			if (i < argc) {
-				swz[i] = (v_swiz[REG_GET_VSWZ(src[i])].base +
-					  (srcpos[i] *
-					   v_swiz[REG_GET_VSWZ(src[i])].
-					   stride)) | ((src[i] & REG_NEGV_MASK)
-						       ? ARG_NEG : 0) | ((src[i]
-									  &
-									  REG_ABS_MASK)
-									 ?
-									 ARG_ABS
-									 : 0);
-			} else {
-				swz[i] = R300_FPI0_ARGC_ZERO;
-			}
-		}
-
-		fp->alu.inst[pos].inst0 &=
-		    ~(R300_FPI0_ARG0C_MASK | R300_FPI0_ARG1C_MASK |
-		      R300_FPI0_ARG2C_MASK);
-		fp->alu.inst[pos].inst0 |=
-		    (swz[0] << R300_FPI0_ARG0C_SHIFT) | (swz[1] <<
-							 R300_FPI0_ARG1C_SHIFT)
-		    | (swz[2] << R300_FPI0_ARG2C_SHIFT);
-	}
-
-	if (emit_sop) {
-		int swz[3];
-
-		for (i = 0; i < 3; ++i) {
-			if (i < argc) {
-				swz[i] = (s_swiz[REG_GET_SSWZ(src[i])].base +
-					  (srcpos[i] *
-					   s_swiz[REG_GET_SSWZ(src[i])].
-					   stride)) | ((src[i] & REG_NEGV_MASK)
-						       ? ARG_NEG : 0) | ((src[i]
-									  &
-									  REG_ABS_MASK)
-									 ?
-									 ARG_ABS
-									 : 0);
-			} else {
-				swz[i] = R300_FPI2_ARGA_ZERO;
-			}
-		}
-
-		fp->alu.inst[pos].inst2 &=
-		    ~(R300_FPI2_ARG0A_MASK | R300_FPI2_ARG1A_MASK |
-		      R300_FPI2_ARG2A_MASK);
-		fp->alu.inst[pos].inst2 |=
-		    (swz[0] << R300_FPI2_ARG0A_SHIFT) | (swz[1] <<
-							 R300_FPI2_ARG1A_SHIFT)
-		    | (swz[2] << R300_FPI2_ARG2A_SHIFT);
-	}
-
-	return pos;
-}
-
-/**
- * Append an ALU instruction to the instruction list.
- */
-static void emit_arith(struct r300_fragment_program *fp,
-		       int op,
-		       GLuint dest,
-		       int mask,
-		       GLuint src0, GLuint src1, GLuint src2, int flags)
-{
-	COMPILE_STATE;
-	GLuint src[3] = { src0, src1, src2 };
-	int hwdest;
-	GLboolean emit_vop, emit_sop;
-	int vop, sop, argc;
-	int pos;
-
-	vop = r300_fpop[op].v_op;
-	sop = r300_fpop[op].s_op;
-	argc = r300_fpop[op].argc;
-
-	if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT &&
-	    REG_GET_INDEX(dest) == FRAG_RESULT_DEPR) {
-		if (mask & WRITEMASK_Z) {
-			mask = WRITEMASK_W;
-		} else {
-			return;
-		}
-	}
-
-	emit_vop = GL_FALSE;
-	emit_sop = GL_FALSE;
-	if ((mask & WRITEMASK_XYZ) || vop == R300_FPI0_OUTC_DP3)
-		emit_vop = GL_TRUE;
-	if ((mask & WRITEMASK_W) || vop == R300_FPI0_OUTC_REPL_ALPHA)
-		emit_sop = GL_TRUE;
-
-	pos =
-	    find_and_prepare_slot(fp, emit_vop, emit_sop, argc, src, dest,
-				  mask);
-	if (pos < 0)
-		return;
-
-	hwdest = t_hw_dst(fp, dest, GL_FALSE, pos);	/* Note: Side effects wrt register allocation */
-
-	if (flags & PFS_FLAG_SAT) {
-		vop |= R300_FPI0_OUTC_SAT;
-		sop |= R300_FPI2_OUTA_SAT;
-	}
-
-	/* Throw the pieces together and get FPI0/1 */
-	if (emit_vop) {
-		fp->alu.inst[pos].inst0 |= vop;
+	tgt = radeonAppendInstructions(t->Program, 1);
+	_mesa_copy_instructions(tgt, &inst, 1);
+
+	if (inst.Opcode != OPCODE_KIL &&
+	    t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
+		GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
+		int rcptemp = radeonFindFreeTemporary(t);
+		int pass, fail;
+
+		tgt = radeonAppendInstructions(t->Program, 3);
+
+		tgt[0].Opcode = OPCODE_RCP;
+		tgt[0].DstReg.File = PROGRAM_TEMPORARY;
+		tgt[0].DstReg.Index = rcptemp;
+		tgt[0].DstReg.WriteMask = WRITEMASK_W;
+		tgt[0].SrcReg[0] = inst.SrcReg[0];
+		tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
+
+		tgt[1].Opcode = OPCODE_MAD;
+		tgt[1].DstReg = inst.DstReg;
+		tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
+		tgt[1].SrcReg[0] = inst.SrcReg[0];
+		tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
+		tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
+		tgt[1].SrcReg[1].Index = rcptemp;
+		tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
+		tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
+		tgt[1].SrcReg[2].Index = inst.DstReg.Index;
+		if (depthmode == 0) /* GL_LUMINANCE */
+			tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
+		else if (depthmode == 2) /* GL_ALPHA */
+			tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
+
+		/* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
+		 *   r  < tex  <=>      -tex+r < 0
+		 *   r >= tex  <=> not (-tex+r < 0 */
+		if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
+			tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
+		else
+			tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
 
-		fp->alu.inst[pos].inst1 |= hwdest << R300_FPI1_DSTC_SHIFT;
+		tgt[2].Opcode = OPCODE_CMP;
+		tgt[2].DstReg = orig_inst->DstReg;
+		tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 
-		if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) {
-			if (REG_GET_INDEX(dest) == FRAG_RESULT_COLR) {
-				fp->alu.inst[pos].inst1 |=
-				    (mask & WRITEMASK_XYZ) <<
-				    R300_FPI1_DSTC_OUTPUT_MASK_SHIFT;
-			} else
-				assert(0);
+		if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
+			pass = 1;
+			fail = 2;
 		} else {
-			fp->alu.inst[pos].inst1 |=
-			    (mask & WRITEMASK_XYZ) <<
-			    R300_FPI1_DSTC_REG_MASK_SHIFT;
-
-			cs->hwtemps[hwdest].vector_valid = pos + 1;
+			pass = 2;
+			fail = 1;
 		}
-	}
 
-	/* And now FPI2/3 */
-	if (emit_sop) {
-		fp->alu.inst[pos].inst2 |= sop;
-
-		if (mask & WRITEMASK_W) {
-			if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) {
-				if (REG_GET_INDEX(dest) == FRAG_RESULT_COLR) {
-					fp->alu.inst[pos].inst3 |=
-					    (hwdest << R300_FPI3_DSTA_SHIFT) |
-					    R300_FPI3_DSTA_OUTPUT;
-				} else if (REG_GET_INDEX(dest) ==
-					   FRAG_RESULT_DEPR) {
-					fp->alu.inst[pos].inst3 |=
-					    R300_FPI3_DSTA_DEPTH;
-				} else
-					assert(0);
-			} else {
-				fp->alu.inst[pos].inst3 |=
-				    (hwdest << R300_FPI3_DSTA_SHIFT) |
-				    R300_FPI3_DSTA_REG;
+		tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
+		tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
+		tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
+	} else if (destredirect) {
+		tgt = radeonAppendInstructions(t->Program, 1);
 
-				cs->hwtemps[hwdest].scalar_valid = pos + 1;
-			}
-		}
+		tgt->Opcode = OPCODE_MOV;
+		tgt->DstReg = orig_inst->DstReg;
+		tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt->SrcReg[0].Index = inst.DstReg.Index;
 	}
 
-	return;
+	return GL_TRUE;
 }
 
-#if 0
-static GLuint get_attrib(struct r300_fragment_program *fp, GLuint attr)
+
+static void update_params(r300ContextPtr r300, struct r300_fragment_program *fp)
 {
 	struct gl_fragment_program *mp = &fp->mesa_program;
-	GLuint r = undef;
-
-	if (!(mp->Base.InputsRead & (1 << attr))) {
-		ERROR("Attribute %d was not provided!\n", attr);
-		return undef;
-	}
 
-	REG_SET_TYPE(r, REG_TYPE_INPUT);
-	REG_SET_INDEX(r, attr);
-	REG_SET_VALID(r, GL_TRUE);
-	return r;
+	/* Ask Mesa nicely to fill in ParameterValues for us */
+	if (mp->Base.Parameters)
+		_mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
 }
-#endif
-
-static GLfloat SinCosConsts[2][4] = {
-	{
-	 1.273239545,		// 4/PI
-	 -0.405284735,		// -4/(PI*PI)
-	 3.141592654,		// PI
-	 0.2225			// weight
-	 },
-	{
-	 0.75,
-	 0.0,
-	 0.159154943,		// 1/(2*PI)
-	 6.283185307		// 2*PI
-	 }
-};
+
 
 /**
- * Emit a LIT instruction.
- * \p flags may be PFS_FLAG_SAT
+ * Transform the program to support fragment.position.
  *
- * Definition of LIT (from ARB_fragment_program):
- * tmp = VectorLoad(op0);
- * if (tmp.x < 0) tmp.x = 0;
- * if (tmp.y < 0) tmp.y = 0;
- * if (tmp.w < -(128.0-epsilon)) tmp.w = -(128.0-epsilon);
- * else if (tmp.w > 128-epsilon) tmp.w = 128-epsilon;
- * result.x = 1.0;
- * result.y = tmp.x;
- * result.z = (tmp.x > 0) ? RoughApproxPower(tmp.y, tmp.w) : 0.0;
- * result.w = 1.0;
+ * Introduce a small fragment at the start of the program that will be
+ * the only code that directly reads the FRAG_ATTRIB_WPOS input.
+ * All other code pieces that reference that input will be rewritten
+ * to read from a newly allocated temporary.
  *
- * The longest path of computation is the one leading to result.z,
- * consisting of 5 operations. This implementation of LIT takes
- * 5 slots. So unless there's some special undocumented opcode,
- * this implementation is potentially optimal. Unfortunately,
- * emit_arith is a bit too conservative because it doesn't understand
- * partial writes to the vector component.
+ * \todo if/when r5xx supports the radeon_program architecture, this is a
+ * likely candidate for code sharing.
  */
-static const GLfloat LitConst[4] =
-    { 127.999999, 127.999999, 127.999999, -127.999999 };
-
-static void emit_lit(struct r300_fragment_program *fp,
-		     GLuint dest, int mask, GLuint src, int flags)
+static void insert_WPOS_trailer(struct r300_fragment_program_compiler *compiler)
 {
-	COMPILE_STATE;
-	GLuint cnst;
-	int needTemporary;
-	GLuint temp;
-
-	cnst = emit_const4fv(fp, LitConst);
-
-	needTemporary = 0;
-	if ((mask & WRITEMASK_XYZW) != WRITEMASK_XYZW) {
-		needTemporary = 1;
-	} else if (REG_GET_TYPE(dest) == REG_TYPE_OUTPUT) {
-		// LIT is typically followed by DP3/DP4, so there's no point
-		// in creating special code for this case
-		needTemporary = 1;
-	}
-
-	if (needTemporary) {
-		temp = keep(get_temp_reg(fp));
-	} else {
-		temp = keep(dest);
-	}
-
-	// Note: The order of emit_arith inside the slots is relevant,
-	// because emit_arith only looks at scalar vs. vector when resolving
-	// dependencies, and it does not consider individual vector components,
-	// so swizzling between the two parts can create fake dependencies.
-
-	// First slot
-	emit_arith(fp, PFS_OP_MAX, temp, WRITEMASK_XY,
-		   keep(src), pfs_zero, undef, 0);
-	emit_arith(fp, PFS_OP_MAX, temp, WRITEMASK_W, src, cnst, undef, 0);
-
-	// Second slot
-	emit_arith(fp, PFS_OP_MIN, temp, WRITEMASK_Z,
-		   swizzle(temp, W, W, W, W), cnst, undef, 0);
-	emit_arith(fp, PFS_OP_LG2, temp, WRITEMASK_W,
-		   swizzle(temp, Y, Y, Y, Y), undef, undef, 0);
-
-	// Third slot
-	// If desired, we saturate the y result here.
-	// This does not affect the use as a condition variable in the CMP later
-	emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_W,
-		   temp, swizzle(temp, Z, Z, Z, Z), pfs_zero, 0);
-	emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_Y,
-		   swizzle(temp, X, X, X, X), pfs_one, pfs_zero, flags);
-
-	// Fourth slot
-	emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_X,
-		   pfs_one, pfs_one, pfs_zero, 0);
-	emit_arith(fp, PFS_OP_EX2, temp, WRITEMASK_W, temp, undef, undef, 0);
-
-	// Fifth slot
-	emit_arith(fp, PFS_OP_CMP, temp, WRITEMASK_Z,
-		   pfs_zero, swizzle(temp, W, W, W, W),
-		   negate(swizzle(temp, Y, Y, Y, Y)), flags);
-	emit_arith(fp, PFS_OP_MAD, temp, WRITEMASK_W, pfs_one, pfs_one,
-		   pfs_zero, 0);
-
-	if (needTemporary) {
-		emit_arith(fp, PFS_OP_MAD, dest, mask,
-			   temp, pfs_one, pfs_zero, flags);
-		free_temp(fp, temp);
-	} else {
-		// Decrease refcount of the destination
-		t_hw_dst(fp, dest, GL_FALSE, cs->nrslots);
-	}
-}
-
-static GLboolean parse_program(struct r300_fragment_program *fp)
-{
-	struct gl_fragment_program *mp = &fp->mesa_program;
-	const struct prog_instruction *inst = mp->Base.Instructions;
-	struct prog_instruction *fpi;
-	GLuint src[3], dest, temp[2];
-	int flags, mask = 0;
-	int const_sin[2];
-
-	if (!inst || inst[0].Opcode == OPCODE_END) {
-		ERROR("empty program?\n");
-		return GL_FALSE;
-	}
+	GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
 
-	for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
-		if (fpi->SaturateMode == SATURATE_ZERO_ONE)
-			flags = PFS_FLAG_SAT;
-		else
-			flags = 0;
-
-		if (fpi->Opcode != OPCODE_KIL) {
-			dest = t_dst(fp, fpi->DstReg);
-			mask = fpi->DstReg.WriteMask;
-		}
-
-		switch (fpi->Opcode) {
-		case OPCODE_ABS:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   absolute(src[0]), pfs_one, pfs_zero, flags);
-			break;
-		case OPCODE_ADD:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], pfs_one, src[1], flags);
-			break;
-		case OPCODE_CMP:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			src[2] = t_src(fp, fpi->SrcReg[2]);
-			/* ARB_f_p - if src0.c < 0.0 ? src1.c : src2.c
-			 *    r300 - if src2.c < 0.0 ? src1.c : src0.c
-			 */
-			emit_arith(fp, PFS_OP_CMP, dest, mask,
-				   src[2], src[1], src[0], flags);
-			break;
-		case OPCODE_COS:
-			/*
-			 * cos using a parabola (see SIN):
-			 * cos(x):
-			 *   x = (x/(2*PI))+0.75
-			 *   x = frac(x)
-			 *   x = (x*2*PI)-PI
-			 *   result = sin(x)
-			 */
-			temp[0] = get_temp_reg(fp);
-			const_sin[0] = emit_const4fv(fp, SinCosConsts[0]);
-			const_sin[1] = emit_const4fv(fp, SinCosConsts[1]);
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-
-			/* add 0.5*PI and do range reduction */
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X,
-				   swizzle(src[0], X, X, X, X),
-				   swizzle(const_sin[1], Z, Z, Z, Z),
-				   swizzle(const_sin[1], X, X, X, X), 0);
-
-			emit_arith(fp, PFS_OP_FRC, temp[0], WRITEMASK_X,
-				   swizzle(temp[0], X, X, X, X),
-				   undef, undef, 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(temp[0], X, X, X, X), swizzle(const_sin[1], W, W, W, W),	//2*PI
-				   negate(swizzle(const_sin[0], Z, Z, Z, Z)),	//-PI
-				   0);
-
-			/* SIN */
-
-			emit_arith(fp, PFS_OP_MAD, temp[0],
-				   WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0],
-								      Z, Z, Z,
-								      Z),
-				   const_sin[0], pfs_zero, 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X,
-				   swizzle(temp[0], Y, Y, Y, Y),
-				   absolute(swizzle(temp[0], Z, Z, Z, Z)),
-				   swizzle(temp[0], X, X, X, X), 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Y,
-				   swizzle(temp[0], X, X, X, X),
-				   absolute(swizzle(temp[0], X, X, X, X)),
-				   negate(swizzle(temp[0], X, X, X, X)), 0);
-
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   swizzle(temp[0], Y, Y, Y, Y),
-				   swizzle(const_sin[0], W, W, W, W),
-				   swizzle(temp[0], X, X, X, X), flags);
-
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_DP3:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_DP3, dest, mask,
-				   src[0], src[1], undef, flags);
-			break;
-		case OPCODE_DP4:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_DP4, dest, mask,
-				   src[0], src[1], undef, flags);
-			break;
-		case OPCODE_DPH:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			/* src0.xyz1 -> temp
-			 * DP4 dest, temp, src1
-			 */
-#if 0
-			temp[0] = get_temp_reg(fp);
-			src[0].s_swz = SWIZZLE_ONE;
-			emit_arith(fp, PFS_OP_MAD, temp[0], mask,
-				   src[0], pfs_one, pfs_zero, 0);
-			emit_arith(fp, PFS_OP_DP4, dest, mask,
-				   temp[0], src[1], undef, flags);
-			free_temp(fp, temp[0]);
-#else
-			emit_arith(fp, PFS_OP_DP4, dest, mask,
-				   swizzle(src[0], X, Y, Z, ONE), src[1],
-				   undef, flags);
-#endif
-			break;
-		case OPCODE_DST:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			/* dest.y = src0.y * src1.y */
-			if (mask & WRITEMASK_Y)
-				emit_arith(fp, PFS_OP_MAD, dest, WRITEMASK_Y,
-					   keep(src[0]), keep(src[1]),
-					   pfs_zero, flags);
-			/* dest.z = src0.z */
-			if (mask & WRITEMASK_Z)
-				emit_arith(fp, PFS_OP_MAD, dest, WRITEMASK_Z,
-					   src[0], pfs_one, pfs_zero, flags);
-			/* result.x = 1.0
-			 * result.w = src1.w */
-			if (mask & WRITEMASK_XW) {
-				REG_SET_VSWZ(src[1], SWIZZLE_111);	/*Cheat */
-				emit_arith(fp, PFS_OP_MAD, dest,
-					   mask & WRITEMASK_XW,
-					   src[1], pfs_one, pfs_zero, flags);
-			}
-			break;
-		case OPCODE_EX2:
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_EX2, dest, mask,
-				   src[0], undef, undef, flags);
-			break;
-		case OPCODE_FLR:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			temp[0] = get_temp_reg(fp);
-			/* FRC temp, src0
-			 * MAD dest, src0, 1.0, -temp
-			 */
-			emit_arith(fp, PFS_OP_FRC, temp[0], mask,
-				   keep(src[0]), undef, undef, 0);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], pfs_one, negate(temp[0]), flags);
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_FRC:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_FRC, dest, mask,
-				   src[0], undef, undef, flags);
-			break;
-		case OPCODE_KIL:
-			emit_tex(fp, fpi, R300_FPITX_OP_KIL);
-			break;
-		case OPCODE_LG2:
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_LG2, dest, mask,
-				   src[0], undef, undef, flags);
-			break;
-		case OPCODE_LIT:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			emit_lit(fp, dest, mask, src[0], flags);
-			break;
-		case OPCODE_LRP:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			src[2] = t_src(fp, fpi->SrcReg[2]);
-			/* result = tmp0tmp1 + (1 - tmp0)tmp2
-			 *        = tmp0tmp1 + tmp2 + (-tmp0)tmp2
-			 *     MAD temp, -tmp0, tmp2, tmp2
-			 *     MAD result, tmp0, tmp1, temp
-			 */
-			temp[0] = get_temp_reg(fp);
-			emit_arith(fp, PFS_OP_MAD, temp[0], mask,
-				   negate(keep(src[0])), keep(src[2]), src[2],
-				   0);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], src[1], temp[0], flags);
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_MAD:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			src[2] = t_src(fp, fpi->SrcReg[2]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], src[1], src[2], flags);
-			break;
-		case OPCODE_MAX:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_MAX, dest, mask,
-				   src[0], src[1], undef, flags);
-			break;
-		case OPCODE_MIN:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_MIN, dest, mask,
-				   src[0], src[1], undef, flags);
-			break;
-		case OPCODE_MOV:
-		case OPCODE_SWZ:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], pfs_one, pfs_zero, flags);
-			break;
-		case OPCODE_MUL:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], src[1], pfs_zero, flags);
-			break;
-		case OPCODE_POW:
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-			src[1] = t_scalar_src(fp, fpi->SrcReg[1]);
-			temp[0] = get_temp_reg(fp);
-			emit_arith(fp, PFS_OP_LG2, temp[0], WRITEMASK_W,
-				   src[0], undef, undef, 0);
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_W,
-				   temp[0], src[1], pfs_zero, 0);
-			emit_arith(fp, PFS_OP_EX2, dest, fpi->DstReg.WriteMask,
-				   temp[0], undef, undef, 0);
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_RCP:
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_RCP, dest, mask,
-				   src[0], undef, undef, flags);
-			break;
-		case OPCODE_RSQ:
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-			emit_arith(fp, PFS_OP_RSQ, dest, mask,
-				   absolute(src[0]), pfs_zero, pfs_zero, flags);
-			break;
-		case OPCODE_SCS:
-			/*
-			 * scs using a parabola :
-			 * scs(x):
-			 *   result.x = sin(-abs(x)+0.5*PI)  (cos)
-			 *   result.y = sin(x)               (sin)
-			 *
-			 */
-			temp[0] = get_temp_reg(fp);
-			temp[1] = get_temp_reg(fp);
-			const_sin[0] = emit_const4fv(fp, SinCosConsts[0]);
-			const_sin[1] = emit_const4fv(fp, SinCosConsts[1]);
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-
-			/* x = -abs(x)+0.5*PI */
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(const_sin[0], Z, Z, Z, Z),	//PI
-				   pfs_half,
-				   negate(abs
-					  (swizzle(keep(src[0]), X, X, X, X))),
-				   0);
-
-			/* C*x (sin) */
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_W,
-				   swizzle(const_sin[0], Y, Y, Y, Y),
-				   swizzle(keep(src[0]), X, X, X, X),
-				   pfs_zero, 0);
-
-			/* B*x, C*x (cos) */
-			emit_arith(fp, PFS_OP_MAD, temp[0],
-				   WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0],
-								      Z, Z, Z,
-								      Z),
-				   const_sin[0], pfs_zero, 0);
-
-			/* B*x (sin) */
-			emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_W,
-				   swizzle(const_sin[0], X, X, X, X),
-				   keep(src[0]), pfs_zero, 0);
-
-			/* y = B*x + C*x*abs(x) (sin) */
-			emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_Z,
-				   absolute(src[0]),
-				   swizzle(temp[0], W, W, W, W),
-				   swizzle(temp[1], W, W, W, W), 0);
-
-			/* y = B*x + C*x*abs(x) (cos) */
-			emit_arith(fp, PFS_OP_MAD, temp[1], WRITEMASK_W,
-				   swizzle(temp[0], Y, Y, Y, Y),
-				   absolute(swizzle(temp[0], Z, Z, Z, Z)),
-				   swizzle(temp[0], X, X, X, X), 0);
-
-			/* y*abs(y) - y (cos), y*abs(y) - y (sin) */
-			emit_arith(fp, PFS_OP_MAD, temp[0],
-				   WRITEMASK_X | WRITEMASK_Y, swizzle(temp[1],
-								      W, Z, Y,
-								      X),
-				   absolute(swizzle(temp[1], W, Z, Y, X)),
-				   negate(swizzle(temp[1], W, Z, Y, X)), 0);
-
-			/* dest.xy = mad(temp.xy, P, temp2.wz) */
-			emit_arith(fp, PFS_OP_MAD, dest,
-				   mask & (WRITEMASK_X | WRITEMASK_Y), temp[0],
-				   swizzle(const_sin[0], W, W, W, W),
-				   swizzle(temp[1], W, Z, Y, X), flags);
-
-			free_temp(fp, temp[0]);
-			free_temp(fp, temp[1]);
-			break;
-		case OPCODE_SGE:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			temp[0] = get_temp_reg(fp);
-			/* temp = src0 - src1
-			 * dest.c = (temp.c < 0.0) ? 0 : 1
-			 */
-			emit_arith(fp, PFS_OP_MAD, temp[0], mask,
-				   src[0], pfs_one, negate(src[1]), 0);
-			emit_arith(fp, PFS_OP_CMP, dest, mask,
-				   pfs_one, pfs_zero, temp[0], 0);
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_SIN:
-			/*
-			 *  using a parabola:
-			 * sin(x) = 4/pi * x + -4/(pi*pi) * x * abs(x)
-			 * extra precision is obtained by weighting against
-			 * itself squared.
-			 */
-
-			temp[0] = get_temp_reg(fp);
-			const_sin[0] = emit_const4fv(fp, SinCosConsts[0]);
-			const_sin[1] = emit_const4fv(fp, SinCosConsts[1]);
-			src[0] = t_scalar_src(fp, fpi->SrcReg[0]);
-
-			/* do range reduction */
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X,
-				   swizzle(keep(src[0]), X, X, X, X),
-				   swizzle(const_sin[1], Z, Z, Z, Z),
-				   pfs_half, 0);
-
-			emit_arith(fp, PFS_OP_FRC, temp[0], WRITEMASK_X,
-				   swizzle(temp[0], X, X, X, X),
-				   undef, undef, 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Z, swizzle(temp[0], X, X, X, X), swizzle(const_sin[1], W, W, W, W),	//2*PI
-				   negate(swizzle(const_sin[0], Z, Z, Z, Z)),	//PI
-				   0);
-
-			/* SIN */
-
-			emit_arith(fp, PFS_OP_MAD, temp[0],
-				   WRITEMASK_X | WRITEMASK_Y, swizzle(temp[0],
-								      Z, Z, Z,
-								      Z),
-				   const_sin[0], pfs_zero, 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_X,
-				   swizzle(temp[0], Y, Y, Y, Y),
-				   absolute(swizzle(temp[0], Z, Z, Z, Z)),
-				   swizzle(temp[0], X, X, X, X), 0);
-
-			emit_arith(fp, PFS_OP_MAD, temp[0], WRITEMASK_Y,
-				   swizzle(temp[0], X, X, X, X),
-				   absolute(swizzle(temp[0], X, X, X, X)),
-				   negate(swizzle(temp[0], X, X, X, X)), 0);
-
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   swizzle(temp[0], Y, Y, Y, Y),
-				   swizzle(const_sin[0], W, W, W, W),
-				   swizzle(temp[0], X, X, X, X), flags);
-
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_SLT:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			temp[0] = get_temp_reg(fp);
-			/* temp = src0 - src1
-			 * dest.c = (temp.c < 0.0) ? 1 : 0
-			 */
-			emit_arith(fp, PFS_OP_MAD, temp[0], mask,
-				   src[0], pfs_one, negate(src[1]), 0);
-			emit_arith(fp, PFS_OP_CMP, dest, mask,
-				   pfs_zero, pfs_one, temp[0], 0);
-			free_temp(fp, temp[0]);
-			break;
-		case OPCODE_SUB:
-			src[0] = t_src(fp, fpi->SrcReg[0]);
-			src[1] = t_src(fp, fpi->SrcReg[1]);
-			emit_arith(fp, PFS_OP_MAD, dest, mask,
-				   src[0], pfs_one, negate(src[1]), flags);
-			break;
-		case OPCODE_TEX:
-			emit_tex(fp, fpi, R300_FPITX_OP_TEX);
-			break;
-		case OPCODE_TXB:
-			emit_tex(fp, fpi, R300_FPITX_OP_TXB);
-			break;
-		case OPCODE_TXP:
-			emit_tex(fp, fpi, R300_FPITX_OP_TXP);
-			break;
-		case OPCODE_XPD:{
-				src[0] = t_src(fp, fpi->SrcReg[0]);
-				src[1] = t_src(fp, fpi->SrcReg[1]);
-				temp[0] = get_temp_reg(fp);
-				/* temp = src0.zxy * src1.yzx */
-				emit_arith(fp, PFS_OP_MAD, temp[0],
-					   WRITEMASK_XYZ, swizzle(keep(src[0]),
-								  Z, X, Y, W),
-					   swizzle(keep(src[1]), Y, Z, X, W),
-					   pfs_zero, 0);
-				/* dest.xyz = src0.yzx * src1.zxy - temp
-				 * dest.w       = undefined
-				 * */
-				emit_arith(fp, PFS_OP_MAD, dest,
-					   mask & WRITEMASK_XYZ, swizzle(src[0],
-									 Y, Z,
-									 X, W),
-					   swizzle(src[1], Z, X, Y, W),
-					   negate(temp[0]), flags);
-				/* cleanup */
-				free_temp(fp, temp[0]);
-				break;
-			}
-		default:
-			ERROR("unknown fpi->Opcode %d\n", fpi->Opcode);
-			break;
-		}
-
-		if (fp->error)
-			return GL_FALSE;
-
-	}
-
-	return GL_TRUE;
-}
+	if (!(InputsRead & FRAG_BIT_WPOS))
+		return;
 
-static void insert_wpos(struct gl_program *prog)
-{
 	static gl_state_index tokens[STATE_LENGTH] = {
 		STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
 	};
 	struct prog_instruction *fpi;
 	GLuint window_index;
 	int i = 0;
-	GLuint tempregi = prog->NumTemporaries;
-	/* should do something else if no temps left... */
-	prog->NumTemporaries++;
+	GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
 
-	fpi = _mesa_alloc_instructions(prog->NumInstructions + 3);
-	_mesa_init_instructions(fpi, prog->NumInstructions + 3);
+	_mesa_insert_instructions(compiler->program, 0, 3);
+	fpi = compiler->program->Instructions;
 
 	/* perspective divide */
 	fpi[i].Opcode = OPCODE_RCP;
@@ -2027,7 +303,7 @@ static void insert_wpos(struct gl_program *prog)
 	i++;
 
 	/* viewport transformation */
-	window_index = _mesa_add_state_reference(prog->Parameters, tokens);
+	window_index = _mesa_add_state_reference(compiler->program->Parameters, tokens);
 
 	fpi[i].Opcode = OPCODE_MAD;
 
@@ -2052,242 +328,182 @@ static void insert_wpos(struct gl_program *prog)
 	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 	i++;
 
-	_mesa_copy_instructions(&fpi[i], prog->Instructions,
-				prog->NumInstructions);
-
-	free(prog->Instructions);
-
-	prog->Instructions = fpi;
-
-	prog->NumInstructions += i;
-	fpi = &prog->Instructions[prog->NumInstructions - 1];
-
-	assert(fpi->Opcode == OPCODE_END);
-
-	for (fpi = &prog->Instructions[3]; fpi->Opcode != OPCODE_END; fpi++) {
-		for (i = 0; i < 3; i++)
-			if (fpi->SrcReg[i].File == PROGRAM_INPUT &&
-			    fpi->SrcReg[i].Index == FRAG_ATTRIB_WPOS) {
-				fpi->SrcReg[i].File = PROGRAM_TEMPORARY;
-				fpi->SrcReg[i].Index = tempregi;
+	for (; i < compiler->program->NumInstructions; ++i) {
+		int reg;
+		for (reg = 0; reg < 3; reg++) {
+			if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
+			    fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
+				fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
+				fpi[i].SrcReg[reg].Index = tempregi;
 			}
+		}
 	}
 }
 
-/* - Init structures
- * - Determine what hwregs each input corresponds to
- */
-static void init_program(r300ContextPtr r300, struct r300_fragment_program *fp)
+
+static void nqssadce_init(struct nqssadce_state* s)
 {
-	struct r300_pfs_compile_state *cs = NULL;
-	struct gl_fragment_program *mp = &fp->mesa_program;
-	struct prog_instruction *fpi;
-	GLuint InputsRead = mp->Base.InputsRead;
-	GLuint temps_used = 0;	/* for fp->temps[] */
-	int i, j;
-
-	/* New compile, reset tracking data */
-	fp->optimization =
-	    driQueryOptioni(&r300->radeon.optionCache, "fp_optimization");
-	fp->translated = GL_FALSE;
-	fp->error = GL_FALSE;
-	fp->cs = cs = &(R300_CONTEXT(fp->ctx)->state.pfs_compile);
-	fp->tex.length = 0;
-	fp->cur_node = 0;
-	fp->first_node_has_tex = 0;
-	fp->const_nr = 0;
-	fp->max_temp_idx = 0;
-	fp->node[0].alu_end = -1;
-	fp->node[0].tex_end = -1;
-
-	_mesa_memset(cs, 0, sizeof(*fp->cs));
-	for (i = 0; i < PFS_MAX_ALU_INST; i++) {
-		for (j = 0; j < 3; j++) {
-			cs->slot[i].vsrc[j] = SRC_CONST;
-			cs->slot[i].ssrc[j] = SRC_CONST;
-		}
-	}
+	s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
+	s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
+}
 
-	/* Work out what temps the Mesa inputs correspond to, this must match
-	 * what setup_rs_unit does, which shouldn't be a problem as rs_unit
-	 * configures itself based on the fragprog's InputsRead
-	 *
-	 * NOTE: this depends on get_hw_temp() allocating registers in order,
-	 * starting from register 0.
-	 */
 
-	/* Texcoords come first */
-	for (i = 0; i < fp->ctx->Const.MaxTextureUnits; i++) {
-		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
-			cs->inputs[FRAG_ATTRIB_TEX0 + i].refcount = 0;
-			cs->inputs[FRAG_ATTRIB_TEX0 + i].reg =
-			    get_hw_temp(fp, 0);
-		}
+static GLuint build_dtm(GLuint depthmode)
+{
+	switch(depthmode) {
+	default:
+	case GL_LUMINANCE: return 0;
+	case GL_INTENSITY: return 1;
+	case GL_ALPHA: return 2;
 	}
-	InputsRead &= ~FRAG_BITS_TEX_ANY;
+}
 
-	/* fragment position treated as a texcoord */
-	if (InputsRead & FRAG_BIT_WPOS) {
-		cs->inputs[FRAG_ATTRIB_WPOS].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_WPOS].reg = get_hw_temp(fp, 0);
-		insert_wpos(&mp->Base);
-	}
-	InputsRead &= ~FRAG_BIT_WPOS;
+static GLuint build_func(GLuint comparefunc)
+{
+	return comparefunc - GL_NEVER;
+}
 
-	/* Then primary colour */
-	if (InputsRead & FRAG_BIT_COL0) {
-		cs->inputs[FRAG_ATTRIB_COL0].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_COL0].reg = get_hw_temp(fp, 0);
-	}
-	InputsRead &= ~FRAG_BIT_COL0;
 
-	/* Secondary color */
-	if (InputsRead & FRAG_BIT_COL1) {
-		cs->inputs[FRAG_ATTRIB_COL1].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_COL1].reg = get_hw_temp(fp, 0);
-	}
-	InputsRead &= ~FRAG_BIT_COL1;
-
-	/* Anything else */
-	if (InputsRead) {
-		WARN_ONCE("Don't know how to handle inputs 0x%x\n", InputsRead);
-		/* force read from hwreg 0 for now */
-		for (i = 0; i < 32; i++)
-			if (InputsRead & (1 << i))
-				cs->inputs[i].reg = 0;
-	}
+/**
+ * Collect all external state that is relevant for compiling the given
+ * fragment program.
+ */
+static void build_state(
+	r300ContextPtr r300,
+	struct r300_fragment_program *fp,
+	struct r300_fragment_program_external_state *state)
+{
+	int unit;
 
-	/* Pre-parse the mesa program, grabbing refcounts on input/temp regs.
-	 * That way, we can free up the reg when it's no longer needed
-	 */
-	if (!mp->Base.Instructions) {
-		ERROR("No instructions found in program\n");
-		return;
-	}
+	_mesa_bzero(state, sizeof(*state));
 
-	for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
-		int idx;
-
-		for (i = 0; i < 3; i++) {
-			idx = fpi->SrcReg[i].Index;
-			switch (fpi->SrcReg[i].File) {
-			case PROGRAM_TEMPORARY:
-				if (!(temps_used & (1 << idx))) {
-					cs->temps[idx].reg = -1;
-					cs->temps[idx].refcount = 1;
-					temps_used |= (1 << idx);
-				} else
-					cs->temps[idx].refcount++;
-				break;
-			case PROGRAM_INPUT:
-				cs->inputs[idx].refcount++;
-				break;
-			default:
-				break;
-			}
-		}
+	for(unit = 0; unit < 16; ++unit) {
+		if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
+			struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
 
-		idx = fpi->DstReg.Index;
-		if (fpi->DstReg.File == PROGRAM_TEMPORARY) {
-			if (!(temps_used & (1 << idx))) {
-				cs->temps[idx].reg = -1;
-				cs->temps[idx].refcount = 1;
-				temps_used |= (1 << idx);
-			} else
-				cs->temps[idx].refcount++;
+			state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
+			state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
 		}
 	}
-	cs->temp_in_use = temps_used;
 }
 
-static void update_params(struct r300_fragment_program *fp)
-{
-	struct gl_fragment_program *mp = &fp->mesa_program;
-
-	/* Ask Mesa nicely to fill in ParameterValues for us */
-	if (mp->Base.Parameters)
-		_mesa_load_state_parameters(fp->ctx, mp->Base.Parameters);
-}
 
 void r300TranslateFragmentShader(r300ContextPtr r300,
 				 struct r300_fragment_program *fp)
 {
-	struct r300_pfs_compile_state *cs = NULL;
+	struct r300_fragment_program_external_state state;
+
+	build_state(r300, fp, &state);
+	if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
+		/* TODO: cache compiled programs */
+		fp->translated = GL_FALSE;
+		_mesa_memcpy(&fp->state, &state, sizeof(state));
+	}
 
 	if (!fp->translated) {
+		struct r300_fragment_program_compiler compiler;
+
+		compiler.r300 = r300;
+		compiler.fp = fp;
+		compiler.code = &fp->code;
+		compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Fragment Program: Initial program:\n");
+			_mesa_print_program(compiler.program);
+		}
 
-		init_program(r300, fp);
-		cs = fp->cs;
+		insert_WPOS_trailer(&compiler);
+
+		struct radeon_program_transformation transformations[] = {
+			{ &transform_TEX, &compiler },
+			{ &radeonTransformALU, 0 },
+			{ &radeonTransformTrigSimple, 0 }
+		};
+		radeonLocalTransform(
+			r300->radeon.glCtx,
+			compiler.program,
+			3, transformations);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Fragment Program: After native rewrite:\n");
+			_mesa_print_program(compiler.program);
+		}
 
-		if (parse_program(fp) == GL_FALSE) {
-			dump_program(fp);
-			return;
+		struct radeon_nqssadce_descr nqssadce = {
+			.Init = &nqssadce_init,
+			.IsNativeSwizzle = &r300FPIsNativeSwizzle,
+			.BuildSwizzle = &r300FPBuildSwizzle,
+			.RewriteDepthOut = GL_TRUE
+		};
+		radeonNqssaDce(r300->radeon.glCtx, compiler.program, &nqssadce);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Compiler: after NqSSA-DCE:\n");
+			_mesa_print_program(compiler.program);
 		}
 
-		/* Finish off */
-		fp->node[fp->cur_node].alu_end =
-		    cs->nrslots - fp->node[fp->cur_node].alu_offset - 1;
-		if (fp->node[fp->cur_node].tex_end < 0)
-			fp->node[fp->cur_node].tex_end = 0;
-		fp->alu_offset = 0;
-		fp->alu_end = cs->nrslots - 1;
-		fp->tex_offset = 0;
-		fp->tex_end = fp->tex.length ? fp->tex.length - 1 : 0;
-		assert(fp->node[fp->cur_node].alu_end >= 0);
-		assert(fp->alu_end >= 0);
-
-		fp->translated = GL_TRUE;
-		if (RADEON_DEBUG & DEBUG_PIXEL)
-			dump_program(fp);
-		r300UpdateStateParameters(fp->ctx, _NEW_PROGRAM);
+		if (!r300FragmentProgramEmit(&compiler))
+			fp->error = GL_TRUE;
+
+		/* Subtle: Rescue any parameters that have been added during transformations */
+		_mesa_free_parameter_list(fp->mesa_program.Base.Parameters);
+		fp->mesa_program.Base.Parameters = compiler.program->Parameters;
+		compiler.program->Parameters = 0;
+
+		_mesa_reference_program(r300->radeon.glCtx, &compiler.program, NULL);
+
+		if (!fp->error)
+			fp->translated = GL_TRUE;
+		if (fp->error || (RADEON_DEBUG & DEBUG_PIXEL))
+			r300FragmentProgramDump(fp, &fp->code);
+		r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
 	}
 
-	update_params(fp);
+	update_params(r300, fp);
 }
 
 /* just some random things... */
-static void dump_program(struct r300_fragment_program *fp)
+void r300FragmentProgramDump(
+	struct r300_fragment_program *fp,
+	struct r300_fragment_program_code *code)
 {
 	int n, i, j;
 	static int pc = 0;
 
 	fprintf(stderr, "pc=%d*************************************\n", pc++);
 
-	fprintf(stderr, "Mesa program:\n");
-	fprintf(stderr, "-------------\n");
-	_mesa_print_program(&fp->mesa_program.Base);
-	fflush(stdout);
-
 	fprintf(stderr, "Hardware program\n");
 	fprintf(stderr, "----------------\n");
 
-	for (n = 0; n < (fp->cur_node + 1); n++) {
+	for (n = 0; n < (code->cur_node + 1); n++) {
 		fprintf(stderr, "NODE %d: alu_offset: %d, tex_offset: %d, "
-			"alu_end: %d, tex_end: %d\n", n,
-			fp->node[n].alu_offset,
-			fp->node[n].tex_offset,
-			fp->node[n].alu_end, fp->node[n].tex_end);
+			"alu_end: %d, tex_end: %d, flags: %08x\n", n,
+			code->node[n].alu_offset,
+			code->node[n].tex_offset,
+			code->node[n].alu_end, code->node[n].tex_end,
+			code->node[n].flags);
 
-		if (fp->tex.length) {
+		if (n > 0 || code->first_node_has_tex) {
 			fprintf(stderr, "  TEX:\n");
-			for (i = fp->node[n].tex_offset;
-			     i <= fp->node[n].tex_offset + fp->node[n].tex_end;
+			for (i = code->node[n].tex_offset;
+			     i <= code->node[n].tex_offset + code->node[n].tex_end;
 			     ++i) {
 				const char *instr;
 
-				switch ((fp->tex.
-					 inst[i] >> R300_FPITX_OPCODE_SHIFT) &
+				switch ((code->tex.
+					 inst[i] >> R300_TEX_INST_SHIFT) &
 					15) {
-				case R300_FPITX_OP_TEX:
+				case R300_TEX_OP_LD:
 					instr = "TEX";
 					break;
-				case R300_FPITX_OP_KIL:
+				case R300_TEX_OP_KIL:
 					instr = "KIL";
 					break;
-				case R300_FPITX_OP_TXP:
+				case R300_TEX_OP_TXP:
 					instr = "TXP";
 					break;
-				case R300_FPITX_OP_TXB:
+				case R300_TEX_OP_TXB:
 					instr = "TXB";
 					break;
 				default:
@@ -2297,22 +513,20 @@ static void dump_program(struct r300_fragment_program *fp)
 				fprintf(stderr,
 					"    %s t%i, %c%i, texture[%i]   (%08x)\n",
 					instr,
-					(fp->tex.
-					 inst[i] >> R300_FPITX_DST_SHIFT) & 31,
-					(fp->tex.
-					 inst[i] & R300_FPITX_SRC_CONST) ? 'c' :
+					(code->tex.
+					 inst[i] >> R300_DST_ADDR_SHIFT) & 31,
 					't',
-					(fp->tex.
-					 inst[i] >> R300_FPITX_SRC_SHIFT) & 31,
-					(fp->tex.
-					 inst[i] & R300_FPITX_IMAGE_MASK) >>
-					R300_FPITX_IMAGE_SHIFT,
-					fp->tex.inst[i]);
+					(code->tex.
+					 inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
+					(code->tex.
+					 inst[i] & R300_TEX_ID_MASK) >>
+					R300_TEX_ID_SHIFT,
+					code->tex.inst[i]);
 			}
 		}
 
-		for (i = fp->node[n].alu_offset;
-		     i <= fp->node[n].alu_offset + fp->node[n].alu_end; ++i) {
+		for (i = code->node[n].alu_offset;
+		     i <= code->node[n].alu_offset + code->node[n].alu_end; ++i) {
 			char srcc[3][10], dstc[20];
 			char srca[3][10], dsta[20];
 			char argc[3][20];
@@ -2320,8 +534,8 @@ static void dump_program(struct r300_fragment_program *fp)
 			char flags[5], tmp[10];
 
 			for (j = 0; j < 3; ++j) {
-				int regc = fp->alu.inst[i].inst1 >> (j * 6);
-				int rega = fp->alu.inst[i].inst3 >> (j * 6);
+				int regc = code->alu.inst[i].inst1 >> (j * 6);
+				int rega = code->alu.inst[i].inst3 >> (j * 6);
 
 				sprintf(srcc[j], "%c%i",
 					(regc & 32) ? 'c' : 't', regc & 31);
@@ -2331,46 +545,46 @@ static void dump_program(struct r300_fragment_program *fp)
 
 			dstc[0] = 0;
 			sprintf(flags, "%s%s%s",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_REG_X) ? "x" : "",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_REG_Y) ? "y" : "",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_REG_Z) ? "z" : "");
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_REG_X) ? "x" : "",
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_REG_Y) ? "y" : "",
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_REG_Z) ? "z" : "");
 			if (flags[0] != 0) {
 				sprintf(dstc, "t%i.%s ",
-					(fp->alu.inst[i].
-					 inst1 >> R300_FPI1_DSTC_SHIFT) & 31,
+					(code->alu.inst[i].
+					 inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 					flags);
 			}
 			sprintf(flags, "%s%s%s",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_OUTPUT_X) ? "x" : "",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_OUTPUT_Y) ? "y" : "",
-				(fp->alu.inst[i].
-				 inst1 & R300_FPI1_DSTC_OUTPUT_Z) ? "z" : "");
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_OUTPUT_X) ? "x" : "",
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "",
+				(code->alu.inst[i].
+				 inst1 & R300_ALU_DSTC_OUTPUT_Z) ? "z" : "");
 			if (flags[0] != 0) {
 				sprintf(tmp, "o%i.%s",
-					(fp->alu.inst[i].
-					 inst1 >> R300_FPI1_DSTC_SHIFT) & 31,
+					(code->alu.inst[i].
+					 inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 					flags);
 				strcat(dstc, tmp);
 			}
 
 			dsta[0] = 0;
-			if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_REG) {
+			if (code->alu.inst[i].inst3 & R300_ALU_DSTA_REG) {
 				sprintf(dsta, "t%i.w ",
-					(fp->alu.inst[i].
-					 inst3 >> R300_FPI3_DSTA_SHIFT) & 31);
+					(code->alu.inst[i].
+					 inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 			}
-			if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_OUTPUT) {
+			if (code->alu.inst[i].inst3 & R300_ALU_DSTA_OUTPUT) {
 				sprintf(tmp, "o%i.w ",
-					(fp->alu.inst[i].
-					 inst3 >> R300_FPI3_DSTA_SHIFT) & 31);
+					(code->alu.inst[i].
+					 inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 				strcat(dsta, tmp);
 			}
-			if (fp->alu.inst[i].inst3 & R300_FPI3_DSTA_DEPTH) {
+			if (code->alu.inst[i].inst3 & R300_ALU_DSTA_DEPTH) {
 				strcat(dsta, "Z");
 			}
 
@@ -2378,31 +592,31 @@ static void dump_program(struct r300_fragment_program *fp)
 				"%3i: xyz: %3s %3s %3s -> %-20s (%08x)\n"
 				"       w: %3s %3s %3s -> %-20s (%08x)\n", i,
 				srcc[0], srcc[1], srcc[2], dstc,
-				fp->alu.inst[i].inst1, srca[0], srca[1],
-				srca[2], dsta, fp->alu.inst[i].inst3);
+				code->alu.inst[i].inst1, srca[0], srca[1],
+				srca[2], dsta, code->alu.inst[i].inst3);
 
 			for (j = 0; j < 3; ++j) {
-				int regc = fp->alu.inst[i].inst0 >> (j * 7);
-				int rega = fp->alu.inst[i].inst2 >> (j * 7);
+				int regc = code->alu.inst[i].inst0 >> (j * 7);
+				int rega = code->alu.inst[i].inst2 >> (j * 7);
 				int d;
 				char buf[20];
 
 				d = regc & 31;
 				if (d < 12) {
 					switch (d % 4) {
-					case R300_FPI0_ARGC_SRC0C_XYZ:
+					case R300_ALU_ARGC_SRC0C_XYZ:
 						sprintf(buf, "%s.xyz",
 							srcc[d / 4]);
 						break;
-					case R300_FPI0_ARGC_SRC0C_XXX:
+					case R300_ALU_ARGC_SRC0C_XXX:
 						sprintf(buf, "%s.xxx",
 							srcc[d / 4]);
 						break;
-					case R300_FPI0_ARGC_SRC0C_YYY:
+					case R300_ALU_ARGC_SRC0C_YYY:
 						sprintf(buf, "%s.yyy",
 							srcc[d / 4]);
 						break;
-					case R300_FPI0_ARGC_SRC0C_ZZZ:
+					case R300_ALU_ARGC_SRC0C_ZZZ:
 						sprintf(buf, "%s.zzz",
 							srcc[d / 4]);
 						break;
@@ -2465,8 +679,8 @@ static void dump_program(struct r300_fragment_program *fp)
 			fprintf(stderr, "     xyz: %8s %8s %8s    op: %08x\n"
 				"       w: %8s %8s %8s    op: %08x\n",
 				argc[0], argc[1], argc[2],
-				fp->alu.inst[i].inst0, arga[0], arga[1],
-				arga[2], fp->alu.inst[i].inst2);
+				code->alu.inst[i].inst0, arga[0], arga[1],
+				arga[2], code->alu.inst[i].inst2);
 		}
 	}
 }
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.h b/src/mesa/drivers/dri/r300/r300_fragprog.h
index 72fca778455..94fb554fb37 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog.h
+++ b/src/mesa/drivers/dri/r300/r300_fragprog.h
@@ -33,72 +33,100 @@
 #ifndef __R300_FRAGPROG_H_
 #define __R300_FRAGPROG_H_
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
 #include "shader/program.h"
 #include "shader/prog_instruction.h"
 
 #include "r300_context.h"
-
-typedef struct r300_fragment_program_swizzle {
-	GLuint length;
-	GLuint src[4];
-	GLuint inst[8];
-} r300_fragment_program_swizzle_t;
-
-/* supported hw opcodes */
-#define PFS_OP_MAD 0
-#define PFS_OP_DP3 1
-#define PFS_OP_DP4 2
-#define PFS_OP_MIN 3
-#define PFS_OP_MAX 4
-#define PFS_OP_CMP 5
-#define PFS_OP_FRC 6
-#define PFS_OP_EX2 7
-#define PFS_OP_LG2 8
-#define PFS_OP_RCP 9
-#define PFS_OP_RSQ 10
-#define PFS_OP_REPL_ALPHA 11
-#define PFS_OP_CMPH 12
-#define MAX_PFS_OP 12
-
-#define PFS_FLAG_SAT	(1 << 0)
-#define PFS_FLAG_ABS	(1 << 1)
-
-#define ARG_NEG			(1 << 5)
-#define ARG_ABS			(1 << 6)
-#define ARG_MASK		(127 << 0)
-#define ARG_STRIDE		7
-#define SRC_CONST		(1 << 5)
-#define SRC_MASK		(63 << 0)
-#define SRC_STRIDE		6
-
-#define NOP_INST0 (						 \
-		(R300_FPI0_OUTC_MAD) |				 \
-		(R300_FPI0_ARGC_ZERO << R300_FPI0_ARG0C_SHIFT) | \
-		(R300_FPI0_ARGC_ZERO << R300_FPI0_ARG1C_SHIFT) | \
-		(R300_FPI0_ARGC_ZERO << R300_FPI0_ARG2C_SHIFT))
-#define NOP_INST1 (					     \
-		((0 | SRC_CONST) << R300_FPI1_SRC0C_SHIFT) | \
-		((0 | SRC_CONST) << R300_FPI1_SRC1C_SHIFT) | \
-		((0 | SRC_CONST) << R300_FPI1_SRC2C_SHIFT))
-#define NOP_INST2 ( \
-		(R300_FPI2_OUTA_MAD) |				 \
-		(R300_FPI2_ARGA_ZERO << R300_FPI2_ARG0A_SHIFT) | \
-		(R300_FPI2_ARGA_ZERO << R300_FPI2_ARG1A_SHIFT) | \
-		(R300_FPI2_ARGA_ZERO << R300_FPI2_ARG2A_SHIFT))
-#define NOP_INST3 (					     \
-		((0 | SRC_CONST) << R300_FPI3_SRC0A_SHIFT) | \
-		((0 | SRC_CONST) << R300_FPI3_SRC1A_SHIFT) | \
-		((0 | SRC_CONST) << R300_FPI3_SRC2A_SHIFT))
+#include "radeon_program.h"
 
 #define DRI_CONF_FP_OPTIMIZATION_SPEED   0
 #define DRI_CONF_FP_OPTIMIZATION_QUALITY 1
 
+#if 1
+
+/**
+ * Fragment program helper macros
+ */
+
+/* Produce unshifted source selectors */
+#define FP_TMP(idx) (idx)
+#define FP_CONST(idx) ((idx) | (1 << 5))
+
+/* Produce source/dest selector dword */
+#define FP_SELC_MASK_NO		0
+#define FP_SELC_MASK_X		1
+#define FP_SELC_MASK_Y		2
+#define FP_SELC_MASK_XY		3
+#define FP_SELC_MASK_Z		4
+#define FP_SELC_MASK_XZ		5
+#define FP_SELC_MASK_YZ		6
+#define FP_SELC_MASK_XYZ	7
+
+#define FP_SELC(destidx,regmask,outmask,src0,src1,src2) \
+	(((destidx) << R300_ALU_DSTC_SHIFT) |		\
+	 (FP_SELC_MASK_##regmask << 23) |		\
+	 (FP_SELC_MASK_##outmask << 26) |		\
+	 ((src0) << R300_ALU_SRC0C_SHIFT) |		\
+	 ((src1) << R300_ALU_SRC1C_SHIFT) |		\
+	 ((src2) << R300_ALU_SRC2C_SHIFT))
+
+#define FP_SELA_MASK_NO		0
+#define FP_SELA_MASK_W		1
+
+#define FP_SELA(destidx,regmask,outmask,src0,src1,src2) \
+	(((destidx) << R300_ALU_DSTA_SHIFT) |		\
+	 (FP_SELA_MASK_##regmask << 23) |		\
+	 (FP_SELA_MASK_##outmask << 24) |		\
+	 ((src0) << R300_ALU_SRC0A_SHIFT) |		\
+	 ((src1) << R300_ALU_SRC1A_SHIFT) |		\
+	 ((src2) << R300_ALU_SRC2A_SHIFT))
+
+/* Produce unshifted argument selectors */
+#define FP_ARGC(source)	R300_ALU_ARGC_##source
+#define FP_ARGA(source) R300_ALU_ARGA_##source
+#define FP_ABS(arg) ((arg) | (1 << 6))
+#define FP_NEG(arg) ((arg) ^ (1 << 5))
+
+/* Produce instruction dword */
+#define FP_INSTRC(opcode,arg0,arg1,arg2) \
+	(R300_ALU_OUTC_##opcode | 		\
+	((arg0) << R300_ALU_ARG0C_SHIFT) |	\
+	((arg1) << R300_ALU_ARG1C_SHIFT) |	\
+	((arg2) << R300_ALU_ARG2C_SHIFT))
+
+#define FP_INSTRA(opcode,arg0,arg1,arg2) \
+	(R300_ALU_OUTA_##opcode | 		\
+	((arg0) << R300_ALU_ARG0A_SHIFT) |	\
+	((arg1) << R300_ALU_ARG1A_SHIFT) |	\
+	((arg2) << R300_ALU_ARG2A_SHIFT))
+
+#endif
+
 struct r300_fragment_program;
 
 extern void r300TranslateFragmentShader(r300ContextPtr r300,
 					struct r300_fragment_program *fp);
 
+
+/**
+ * Used internally by the r300 fragment program code to store compile-time
+ * only data.
+ */
+struct r300_fragment_program_compiler {
+	r300ContextPtr r300;
+	struct r300_fragment_program *fp;
+	struct r300_fragment_program_code *code;
+	struct gl_program *program;
+};
+
+extern GLboolean r300FragmentProgramEmit(struct r300_fragment_program_compiler *compiler);
+
+
+extern void r300FragmentProgramDump(
+	struct r300_fragment_program *fp,
+	struct r300_fragment_program_code *code);
+
 #endif
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog_emit.c b/src/mesa/drivers/dri/r300/r300_fragprog_emit.c
new file mode 100644
index 00000000000..9f0b7e35349
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/r300_fragprog_emit.c
@@ -0,0 +1,344 @@
+/*
+ * Copyright (C) 2005 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * \file
+ *
+ * Emit the r300_fragment_program_code that can be understood by the hardware.
+ * Input is a pre-transformed radeon_program.
+ *
+ * \author Ben Skeggs <darktama@iinet.net.au>
+ *
+ * \author Jerome Glisse <j.glisse@gmail.com>
+ *
+ * \todo FogOption
+ */
+
+#include "r300_fragprog.h"
+
+#include "radeon_program_pair.h"
+#include "r300_fragprog_swizzle.h"
+#include "r300_reg.h"
+
+
+#define PROG_CODE \
+	struct r300_fragment_program_compiler *c = (struct r300_fragment_program_compiler*)data; \
+	struct r300_fragment_program_code *code = c->code
+
+#define error(fmt, args...) do {			\
+		fprintf(stderr, "%s::%s(): " fmt "\n",	\
+			__FILE__, __FUNCTION__, ##args);	\
+	} while(0)
+
+
+static GLboolean emit_const(void* data, GLuint file, GLuint index, GLuint *hwindex)
+{
+	PROG_CODE;
+
+	for (*hwindex = 0; *hwindex < code->const_nr; ++*hwindex) {
+		if (code->constant[*hwindex].File == file &&
+		    code->constant[*hwindex].Index == index)
+			break;
+	}
+
+	if (*hwindex >= code->const_nr) {
+		if (*hwindex >= PFS_NUM_CONST_REGS) {
+			error("Out of hw constants!\n");
+			return GL_FALSE;
+		}
+
+		code->const_nr++;
+		code->constant[*hwindex].File = file;
+		code->constant[*hwindex].Index = index;
+	}
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Mark a temporary register as used.
+ */
+static void use_temporary(struct r300_fragment_program_code *code, GLuint index)
+{
+	if (index > code->max_temp_idx)
+		code->max_temp_idx = index;
+}
+
+
+static GLuint translate_rgb_opcode(GLuint opcode)
+{
+	switch(opcode) {
+	case OPCODE_CMP: return R300_ALU_OUTC_CMP;
+	case OPCODE_DP3: return R300_ALU_OUTC_DP3;
+	case OPCODE_DP4: return R300_ALU_OUTC_DP4;
+	case OPCODE_FRC: return R300_ALU_OUTC_FRC;
+	default:
+		error("translate_rgb_opcode(%i): Unknown opcode", opcode);
+		/* fall through */
+	case OPCODE_NOP:
+		/* fall through */
+	case OPCODE_MAD: return R300_ALU_OUTC_MAD;
+	case OPCODE_MAX: return R300_ALU_OUTC_MAX;
+	case OPCODE_MIN: return R300_ALU_OUTC_MIN;
+	case OPCODE_REPL_ALPHA: return R300_ALU_OUTC_REPL_ALPHA;
+	}
+}
+
+static GLuint translate_alpha_opcode(GLuint opcode)
+{
+	switch(opcode) {
+	case OPCODE_CMP: return R300_ALU_OUTA_CMP;
+	case OPCODE_DP3: return R300_ALU_OUTA_DP4;
+	case OPCODE_DP4: return R300_ALU_OUTA_DP4;
+	case OPCODE_EX2: return R300_ALU_OUTA_EX2;
+	case OPCODE_FRC: return R300_ALU_OUTA_FRC;
+	case OPCODE_LG2: return R300_ALU_OUTA_LG2;
+	default:
+		error("translate_rgb_opcode(%i): Unknown opcode", opcode);
+		/* fall through */
+	case OPCODE_NOP:
+		/* fall through */
+	case OPCODE_MAD: return R300_ALU_OUTA_MAD;
+	case OPCODE_MAX: return R300_ALU_OUTA_MAX;
+	case OPCODE_MIN: return R300_ALU_OUTA_MIN;
+	case OPCODE_RCP: return R300_ALU_OUTA_RCP;
+	case OPCODE_RSQ: return R300_ALU_OUTA_RSQ;
+	}
+}
+
+/**
+ * Emit one paired ALU instruction.
+ */
+static GLboolean emit_alu(void* data, struct radeon_pair_instruction* inst)
+{
+	PROG_CODE;
+
+	if (code->alu.length >= PFS_MAX_ALU_INST) {
+		error("Too many ALU instructions");
+		return GL_FALSE;
+	}
+
+	int ip = code->alu.length++;
+	int j;
+	code->node[code->cur_node].alu_end++;
+
+	code->alu.inst[ip].inst0 = translate_rgb_opcode(inst->RGB.Opcode);
+	code->alu.inst[ip].inst2 = translate_alpha_opcode(inst->Alpha.Opcode);
+
+	for(j = 0; j < 3; ++j) {
+		GLuint src = inst->RGB.Src[j].Index | (inst->RGB.Src[j].Constant << 5);
+		if (!inst->RGB.Src[j].Constant)
+			use_temporary(code, inst->RGB.Src[j].Index);
+		code->alu.inst[ip].inst1 |= src << (6*j);
+
+		src = inst->Alpha.Src[j].Index | (inst->Alpha.Src[j].Constant << 5);
+		if (!inst->Alpha.Src[j].Constant)
+			use_temporary(code, inst->Alpha.Src[j].Index);
+		code->alu.inst[ip].inst3 |= src << (6*j);
+
+		GLuint arg = r300FPTranslateRGBSwizzle(inst->RGB.Arg[j].Source, inst->RGB.Arg[j].Swizzle);
+		arg |= inst->RGB.Arg[j].Abs << 6;
+		arg |= inst->RGB.Arg[j].Negate << 5;
+		code->alu.inst[ip].inst0 |= arg << (7*j);
+
+		arg = r300FPTranslateAlphaSwizzle(inst->Alpha.Arg[j].Source, inst->Alpha.Arg[j].Swizzle);
+		arg |= inst->Alpha.Arg[j].Abs << 6;
+		arg |= inst->Alpha.Arg[j].Negate << 5;
+		code->alu.inst[ip].inst2 |= arg << (7*j);
+	}
+
+	if (inst->RGB.Saturate)
+		code->alu.inst[ip].inst0 |= R300_ALU_OUTC_CLAMP;
+	if (inst->Alpha.Saturate)
+		code->alu.inst[ip].inst2 |= R300_ALU_OUTA_CLAMP;
+
+	if (inst->RGB.WriteMask) {
+		use_temporary(code, inst->RGB.DestIndex);
+		code->alu.inst[ip].inst1 |=
+			(inst->RGB.DestIndex << R300_ALU_DSTC_SHIFT) |
+			(inst->RGB.WriteMask << R300_ALU_DSTC_REG_MASK_SHIFT);
+	}
+	if (inst->RGB.OutputWriteMask) {
+		code->alu.inst[ip].inst1 |= (inst->RGB.OutputWriteMask << R300_ALU_DSTC_OUTPUT_MASK_SHIFT);
+		code->node[code->cur_node].flags |= R300_RGBA_OUT;
+	}
+
+	if (inst->Alpha.WriteMask) {
+		use_temporary(code, inst->Alpha.DestIndex);
+		code->alu.inst[ip].inst3 |=
+			(inst->Alpha.DestIndex << R300_ALU_DSTA_SHIFT) |
+			R300_ALU_DSTA_REG;
+	}
+	if (inst->Alpha.OutputWriteMask) {
+		code->alu.inst[ip].inst3 |= R300_ALU_DSTA_OUTPUT;
+		code->node[code->cur_node].flags |= R300_RGBA_OUT;
+	}
+	if (inst->Alpha.DepthWriteMask) {
+		code->alu.inst[ip].inst3 |= R300_ALU_DSTA_DEPTH;
+		code->node[code->cur_node].flags |= R300_W_OUT;
+		c->fp->WritesDepth = GL_TRUE;
+	}
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Finish the current node without advancing to the next one.
+ */
+static GLboolean finish_node(struct r300_fragment_program_compiler *c)
+{
+	struct r300_fragment_program_code *code = c->code;
+	struct r300_fragment_program_node *node = &code->node[code->cur_node];
+
+	if (node->alu_end < 0) {
+		/* Generate a single NOP for this node */
+		struct radeon_pair_instruction inst;
+		_mesa_bzero(&inst, sizeof(inst));
+		if (!emit_alu(c, &inst))
+			return GL_FALSE;
+	}
+
+	if (node->tex_end < 0) {
+		if (code->cur_node == 0) {
+			node->tex_end = 0;
+		} else {
+			error("Node %i has no TEX instructions", code->cur_node);
+			return GL_FALSE;
+		}
+	} else {
+		if (code->cur_node == 0)
+			code->first_node_has_tex = 1;
+	}
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Begin a block of texture instructions.
+ * Create the necessary indirection.
+ */
+static GLboolean begin_tex(void* data)
+{
+	PROG_CODE;
+
+	if (code->cur_node == 0) {
+		if (code->node[0].alu_end < 0 &&
+		    code->node[0].tex_end < 0)
+			return GL_TRUE;
+	}
+
+	if (code->cur_node == 3) {
+		error("Too many texture indirections");
+		return GL_FALSE;
+	}
+
+	if (!finish_node(c))
+		return GL_FALSE;
+
+	struct r300_fragment_program_node *node = &code->node[++code->cur_node];
+	node->alu_offset = code->alu.length;
+	node->alu_end = -1;
+	node->tex_offset = code->tex.length;
+	node->tex_end = -1;
+	return GL_TRUE;
+}
+
+
+static GLboolean emit_tex(void* data, struct prog_instruction* inst)
+{
+	PROG_CODE;
+
+	if (code->tex.length >= PFS_MAX_TEX_INST) {
+		error("Too many TEX instructions");
+		return GL_FALSE;
+	}
+
+	GLuint unit = inst->TexSrcUnit;
+	GLuint dest = inst->DstReg.Index;
+	GLuint opcode;
+
+	switch(inst->Opcode) {
+	case OPCODE_KIL: opcode = R300_TEX_OP_KIL; break;
+	case OPCODE_TEX: opcode = R300_TEX_OP_LD; break;
+	case OPCODE_TXB: opcode = R300_TEX_OP_TXB; break;
+	case OPCODE_TXP: opcode = R300_TEX_OP_TXP; break;
+	default:
+		error("Unknown texture opcode %i", inst->Opcode);
+		return GL_FALSE;
+	}
+
+	if (inst->Opcode == OPCODE_KIL) {
+		unit = 0;
+		dest = 0;
+	} else {
+		use_temporary(code, dest);
+	}
+
+	use_temporary(code, inst->SrcReg[0].Index);
+
+	code->node[code->cur_node].tex_end++;
+	code->tex.inst[code->tex.length++] =
+		(inst->SrcReg[0].Index << R300_SRC_ADDR_SHIFT) |
+		(dest << R300_DST_ADDR_SHIFT) |
+		(unit << R300_TEX_ID_SHIFT) |
+		(opcode << R300_TEX_INST_SHIFT);
+	return GL_TRUE;
+}
+
+
+static const struct radeon_pair_handler pair_handler = {
+	.EmitConst = &emit_const,
+	.EmitPaired = &emit_alu,
+	.EmitTex = &emit_tex,
+	.BeginTexBlock = &begin_tex,
+	.MaxHwTemps = PFS_NUM_TEMP_REGS
+};
+
+/**
+ * Final compilation step: Turn the intermediate radeon_program into
+ * machine-readable instructions.
+ */
+GLboolean r300FragmentProgramEmit(struct r300_fragment_program_compiler *compiler)
+{
+	struct r300_fragment_program_code *code = compiler->code;
+
+	_mesa_bzero(code, sizeof(struct r300_fragment_program_code));
+	code->node[0].alu_end = -1;
+	code->node[0].tex_end = -1;
+
+	if (!radeonPairProgram(compiler->r300->radeon.glCtx, compiler->program, &pair_handler, compiler))
+		return GL_FALSE;
+
+	if (!finish_node(compiler))
+		return GL_FALSE;
+
+	return GL_TRUE;
+}
+
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog_swizzle.c b/src/mesa/drivers/dri/r300/r300_fragprog_swizzle.c
new file mode 100644
index 00000000000..a86d2bd4712
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/r300_fragprog_swizzle.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * @file
+ * Utilities to deal with the somewhat odd restriction on R300 fragment
+ * program swizzles.
+ */
+
+#include "r300_fragprog_swizzle.h"
+
+#include "r300_reg.h"
+#include "radeon_nqssadce.h"
+
+#define MAKE_SWZ3(x, y, z) (MAKE_SWIZZLE4(SWIZZLE_##x, SWIZZLE_##y, SWIZZLE_##z, SWIZZLE_ZERO))
+
+struct swizzle_data {
+	GLuint hash; /**< swizzle value this matches */
+	GLuint base; /**< base value for hw swizzle */
+	GLuint stride; /**< difference in base between arg0/1/2 */
+};
+
+static const struct swizzle_data native_swizzles[] = {
+	{MAKE_SWZ3(X, Y, Z), R300_ALU_ARGC_SRC0C_XYZ, 4},
+	{MAKE_SWZ3(X, X, X), R300_ALU_ARGC_SRC0C_XXX, 4},
+	{MAKE_SWZ3(Y, Y, Y), R300_ALU_ARGC_SRC0C_YYY, 4},
+	{MAKE_SWZ3(Z, Z, Z), R300_ALU_ARGC_SRC0C_ZZZ, 4},
+	{MAKE_SWZ3(W, W, W), R300_ALU_ARGC_SRC0A, 1},
+	{MAKE_SWZ3(Y, Z, X), R300_ALU_ARGC_SRC0C_YZX, 1},
+	{MAKE_SWZ3(Z, X, Y), R300_ALU_ARGC_SRC0C_ZXY, 1},
+	{MAKE_SWZ3(W, Z, Y), R300_ALU_ARGC_SRC0CA_WZY, 1},
+	{MAKE_SWZ3(ONE, ONE, ONE), R300_ALU_ARGC_ONE, 0},
+	{MAKE_SWZ3(ZERO, ZERO, ZERO), R300_ALU_ARGC_ZERO, 0}
+};
+
+static const int num_native_swizzles = sizeof(native_swizzles)/sizeof(native_swizzles[0]);
+
+
+/**
+ * Find a native RGB swizzle that matches the given swizzle.
+ * Returns 0 if none found.
+ */
+static const struct swizzle_data* lookup_native_swizzle(GLuint swizzle)
+{
+	int i, comp;
+
+	for(i = 0; i < num_native_swizzles; ++i) {
+		const struct swizzle_data* sd = &native_swizzles[i];
+		for(comp = 0; comp < 3; ++comp) {
+			GLuint swz = GET_SWZ(swizzle, comp);
+			if (swz == SWIZZLE_NIL)
+				continue;
+			if (swz != GET_SWZ(sd->hash, comp))
+				break;
+		}
+		if (comp == 3)
+			return sd;
+	}
+
+	return 0;
+}
+
+
+/**
+ * Check whether the given instruction supports the swizzle and negate
+ * combinations in the given source register.
+ */
+GLboolean r300FPIsNativeSwizzle(GLuint opcode, struct prog_src_register reg)
+{
+	if (reg.Abs)
+		reg.NegateBase = 0;
+
+	if (opcode == OPCODE_KIL ||
+	    opcode == OPCODE_TEX ||
+	    opcode == OPCODE_TXB ||
+	    opcode == OPCODE_TXP) {
+		int j;
+
+		if (reg.Abs || reg.NegateBase != (15*reg.NegateAbs))
+			return GL_FALSE;
+
+		for(j = 0; j < 4; ++j) {
+			GLuint swz = GET_SWZ(reg.Swizzle, j);
+			if (swz == SWIZZLE_NIL)
+				continue;
+			if (swz != j)
+				return GL_FALSE;
+		}
+
+		return GL_TRUE;
+	}
+
+	GLuint relevant = 0;
+	int j;
+
+	for(j = 0; j < 3; ++j)
+		if (GET_SWZ(reg.Swizzle, j) != SWIZZLE_NIL)
+			relevant |= 1 << j;
+
+	if ((reg.NegateBase & relevant) && (reg.NegateBase & relevant) != relevant)
+		return GL_FALSE;
+
+	if (!lookup_native_swizzle(reg.Swizzle))
+		return GL_FALSE;
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Generate MOV dst, src using only native swizzles.
+ */
+void r300FPBuildSwizzle(struct nqssadce_state *s, struct prog_dst_register dst, struct prog_src_register src)
+{
+	if (src.Abs)
+		src.NegateBase = 0;
+
+	while(dst.WriteMask) {
+		const struct swizzle_data *best_swizzle = 0;
+		GLuint best_matchcount = 0;
+		GLuint best_matchmask = 0;
+		GLboolean rgbnegate;
+		int i, comp;
+
+		for(i = 0; i < num_native_swizzles; ++i) {
+			const struct swizzle_data *sd = &native_swizzles[i];
+			GLuint matchcount = 0;
+			GLuint matchmask = 0;
+			for(comp = 0; comp < 3; ++comp) {
+				if (!GET_BIT(dst.WriteMask, comp))
+					continue;
+				GLuint swz = GET_SWZ(src.Swizzle, comp);
+				if (swz == SWIZZLE_NIL)
+					continue;
+				if (swz == GET_SWZ(sd->hash, comp)) {
+					matchcount++;
+					matchmask |= 1 << comp;
+				}
+			}
+			if (matchcount > best_matchcount) {
+				best_swizzle = sd;
+				best_matchcount = matchcount;
+				best_matchmask = matchmask;
+				if (matchmask == (dst.WriteMask & WRITEMASK_XYZ))
+					break;
+			}
+		}
+
+		if ((src.NegateBase & best_matchmask) != 0) {
+			best_matchmask &= src.NegateBase;
+			rgbnegate = !src.NegateAbs;
+		} else {
+			rgbnegate = src.NegateAbs;
+		}
+
+		struct prog_instruction *inst;
+
+		_mesa_insert_instructions(s->Program, s->IP, 1);
+		inst = s->Program->Instructions + s->IP++;
+		inst->Opcode = OPCODE_MOV;
+		inst->DstReg = dst;
+		inst->DstReg.WriteMask &= (best_matchmask | WRITEMASK_W);
+		inst->SrcReg[0] = src;
+		/* Note: We rely on NqSSA/DCE to set unused swizzle components to NIL */
+
+		dst.WriteMask &= ~inst->DstReg.WriteMask;
+	}
+}
+
+
+/**
+ * Translate an RGB (XYZ) swizzle into the hardware code for the given
+ * instruction source.
+ */
+GLuint r300FPTranslateRGBSwizzle(GLuint src, GLuint swizzle)
+{
+	const struct swizzle_data* sd = lookup_native_swizzle(swizzle);
+
+	if (!sd) {
+		_mesa_printf("Not a native swizzle: %08x\n", swizzle);
+		return 0;
+	}
+
+	return sd->base + src*sd->stride;
+}
+
+
+/**
+ * Translate an Alpha (W) swizzle into the hardware code for the given
+ * instruction source.
+ */
+GLuint r300FPTranslateAlphaSwizzle(GLuint src, GLuint swizzle)
+{
+	if (swizzle < 3)
+		return swizzle + 3*src;
+
+	switch(swizzle) {
+	case SWIZZLE_W: return R300_ALU_ARGA_SRC0A + src;
+	case SWIZZLE_ONE: return R300_ALU_ARGA_ONE;
+	case SWIZZLE_ZERO: return R300_ALU_ARGA_ZERO;
+	default: return R300_ALU_ARGA_ONE;
+	}
+}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_query.h b/src/mesa/drivers/dri/r300/r300_fragprog_swizzle.h
index 3ded41417e1..231bf4eef5f 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_query.h
+++ b/src/mesa/drivers/dri/r300/r300_fragprog_swizzle.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007 Ben Skeggs.
+ * Copyright (C) 2008 Nicolai Haehnle.
  *
  * All Rights Reserved.
  *
@@ -25,14 +25,18 @@
  *
  */
 
-#ifndef __NOUVEAU_QUERY_H__
-#define __NOUVEAU_QUERY_H__
+#ifndef __R300_FRAGPROG_SWIZZLE_H_
+#define __R300_FRAGPROG_SWIZZLE_H_
 
-typedef struct nouveau_query_object_t {
-	struct gl_query_object mesa;
+#include "main/glheader.h"
+#include "shader/prog_instruction.h"
 
-	int notifier_id;
-} nouveau_query_object;
+struct nqssadce_state;
 
-extern void nouveauQueryInitFuncs(GLcontext *ctx);
-#endif
+GLboolean r300FPIsNativeSwizzle(GLuint opcode, struct prog_src_register reg);
+void r300FPBuildSwizzle(struct nqssadce_state*, struct prog_dst_register dst, struct prog_src_register src);
+
+GLuint r300FPTranslateRGBSwizzle(GLuint src, GLuint swizzle);
+GLuint r300FPTranslateAlphaSwizzle(GLuint src, GLuint swizzle);
+
+#endif /* __R300_FRAGPROG_SWIZZLE_H_ */
diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c
index 90f5027c9ad..ee85e229f0b 100644
--- a/src/mesa/drivers/dri/r300/r300_ioctl.c
+++ b/src/mesa/drivers/dri/r300/r300_ioctl.c
@@ -40,10 +40,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <sched.h>
 #include <errno.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "macros.h"
-#include "context.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
 
 #include "r300_context.h"
@@ -51,9 +51,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_ioctl.h"
 #include "r300_cmdbuf.h"
 #include "r300_state.h"
-#include "r300_program.h"
+#include "r300_vertprog.h"
 #include "radeon_reg.h"
 #include "r300_emit.h"
+#include "r300_fragprog.h"
 
 #include "vblank.h"
 
@@ -106,19 +107,19 @@ static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer)
 	e32(cbpitch);
 
 	R300_STATECHANGE(r300, cmk);
-	reg_start(R300_RB3D_COLORMASK, 0);
+	reg_start(RB3D_COLOR_CHANNEL_MASK, 0);
 
 	if (flags & CLEARBUFFER_COLOR) {
-		e32((ctx->Color.ColorMask[BCOMP] ? R300_COLORMASK0_B : 0) |
-		    (ctx->Color.ColorMask[GCOMP] ? R300_COLORMASK0_G : 0) |
-		    (ctx->Color.ColorMask[RCOMP] ? R300_COLORMASK0_R : 0) |
-		    (ctx->Color.ColorMask[ACOMP] ? R300_COLORMASK0_A : 0));
+		e32((ctx->Color.ColorMask[BCOMP] ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
+		    (ctx->Color.ColorMask[GCOMP] ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
+		    (ctx->Color.ColorMask[RCOMP] ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
+		    (ctx->Color.ColorMask[ACOMP] ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0));
 	} else {
 		e32(0x0);
 	}
 
 	R300_STATECHANGE(r300, zs);
-	reg_start(R300_RB3D_ZSTENCIL_CNTL_0, 2);
+	reg_start(R300_ZB_CNTL, 2);
 
 	{
 		uint32_t t1, t2;
@@ -127,37 +128,28 @@ static void r300ClearBuffer(r300ContextPtr r300, int flags, int buffer)
 		t2 = 0x0;
 
 		if (flags & CLEARBUFFER_DEPTH) {
-			t1 |= R300_RB3D_Z_WRITE_ONLY;
+			t1 |= R300_Z_ENABLE | R300_Z_WRITE_ENABLE;
 			t2 |=
-			    (R300_ZS_ALWAYS << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
-		} else {
-			t1 |= R300_RB3D_Z_DISABLED_1;	// disable
+			    (R300_ZS_ALWAYS << R300_Z_FUNC_SHIFT);
 		}
 
 		if (flags & CLEARBUFFER_STENCIL) {
-			t1 |= R300_RB3D_STENCIL_ENABLE;
+			t1 |= R300_STENCIL_ENABLE;
 			t2 |=
 			    (R300_ZS_ALWAYS <<
-			     R300_RB3D_ZS1_FRONT_FUNC_SHIFT) |
+			     R300_S_FRONT_FUNC_SHIFT) |
 			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT) |
+			     R300_S_FRONT_SFAIL_OP_SHIFT) |
 			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT) |
+			     R300_S_FRONT_ZPASS_OP_SHIFT) |
 			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT) |
-			    (R300_ZS_ALWAYS <<
-			     R300_RB3D_ZS1_BACK_FUNC_SHIFT) |
-			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT) |
-			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT) |
-			    (R300_ZS_REPLACE <<
-			     R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT);
+			     R300_S_FRONT_ZFAIL_OP_SHIFT);
 		}
 
 		e32(t1);
 		e32(t2);
-		e32(r300->state.stencil.clear);
+		e32(((ctx->Stencil.WriteMask[0] & R300_STENCILREF_MASK) << R300_STENCILWRITEMASK_SHIFT) |
+		    (ctx->Stencil.Clear & R300_STENCILREF_MASK));
 	}
 
 	cmd2 = (drm_r300_cmd_header_t *) r300AllocCmdBuf(r300, 9, __FUNCTION__);
@@ -186,10 +178,16 @@ static void r300EmitClearState(GLcontext * ctx)
 	int cmd_written = 0;
 	drm_radeon_cmd_header_t *cmd = NULL;
 	int has_tcl = 1;
+	int is_r500 = 0;
+	GLuint vap_cntl;
 
 	if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
 		has_tcl = 0;
 
+        if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+                is_r500 = 1;
+
+
 	/* FIXME: the values written to R300_VAP_INPUT_ROUTE_0_0 and
 	 * R300_VAP_INPUT_ROUTE_0_1 are in fact known, however, the values are
 	 * quite complex; see the functions in r300_emit.c.
@@ -199,25 +197,38 @@ static void r300EmitClearState(GLcontext * ctx)
 	 * these registers, as well as the actual values used for rendering.
 	 */
 	R300_STATECHANGE(r300, vir[0]);
-	reg_start(R300_VAP_INPUT_ROUTE_0_0, 0);
+	reg_start(R300_VAP_PROG_STREAM_CNTL_0, 0);
 	if (!has_tcl)
-		e32(0x22030003);
+	    e32(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_0_SHIFT) |
+		 ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)));
 	else
-		e32(0x21030003);
+	    e32(((((0 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_0_SHIFT) |
+		 ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) | R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT)));
 
 	/* disable fog */
 	R300_STATECHANGE(r300, fogs);
-	reg_start(R300_RE_FOG_STATE, 0);
+	reg_start(R300_FG_FOG_BLEND, 0);
 	e32(0x0);
 
 	R300_STATECHANGE(r300, vir[1]);
-	reg_start(R300_VAP_INPUT_ROUTE_1_0, 0);
-	e32(0xF688F688);
+	reg_start(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0);
+	e32(((((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) |
+	       (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) |
+	       (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) |
+	       (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) |
+	       ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT))
+	      << R300_SWIZZLE0_SHIFT) |
+	     (((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) |
+	       (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) |
+	       (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) |
+	       (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) |
+	       ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT))
+	      << R300_SWIZZLE1_SHIFT)));
 
 	/* R300_VAP_INPUT_CNTL_0, R300_VAP_INPUT_CNTL_1 */
 	R300_STATECHANGE(r300, vic);
-	reg_start(R300_VAP_INPUT_CNTL_0, 1);
-	e32(R300_INPUT_CNTL_0_COLOR);
+	reg_start(R300_VAP_VTX_STATE_CNTL, 1);
+	e32((R300_SEL_USER_COLOR_0 << R300_COLOR_0_ASSEMBLY_SHIFT));
 	e32(R300_INPUT_CNTL_POS | R300_INPUT_CNTL_COLOR | R300_INPUT_CNTL_TC0);
 
 	R300_STATECHANGE(r300, vte);
@@ -229,13 +240,13 @@ static void r300EmitClearState(GLcontext * ctx)
 	    R300_VPORT_Z_OFFSET_ENA);
 	e32(0x8);
 
-	reg_start(0x21dc, 0);
+	reg_start(R300_VAP_PSC_SGN_NORM_CNTL, 0);
 	e32(0xaaaaaaaa);
 
 	R300_STATECHANGE(r300, vof);
 	reg_start(R300_VAP_OUTPUT_VTX_FMT_0, 1);
 	e32(R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT |
-	    R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT);
+	    R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT);
 	e32(0x0);		/* no textures */
 
 	R300_STATECHANGE(r300, txe);
@@ -252,7 +263,7 @@ static void r300EmitClearState(GLcontext * ctx)
 	efloat(0.0);
 
 	R300_STATECHANGE(r300, at);
-	reg_start(R300_PP_ALPHA_TEST, 0);
+	reg_start(R300_FG_ALPHA_FUNC, 0);
 	e32(0x0);
 
 	R300_STATECHANGE(r300, bld);
@@ -260,78 +271,192 @@ static void r300EmitClearState(GLcontext * ctx)
 	e32(0x0);
 	e32(0x0);
 
-	R300_STATECHANGE(r300, unk221C);
-	reg_start(R300_VAP_UNKNOWN_221C, 0);
-	e32(R300_221C_CLEAR);
+	if (has_tcl) {
+	    R300_STATECHANGE(r300, vap_clip_cntl);
+	    reg_start(R300_VAP_CLIP_CNTL, 0);
+	    e32(R300_PS_UCP_MODE_CLIP_AS_TRIFAN | R300_CLIP_DISABLE);
+        }
 
 	R300_STATECHANGE(r300, ps);
-	reg_start(R300_RE_POINTSIZE, 0);
+	reg_start(R300_GA_POINT_SIZE, 0);
 	e32(((dPriv->w * 6) << R300_POINTSIZE_X_SHIFT) |
 	    ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT));
 
-	R300_STATECHANGE(r300, ri);
-	reg_start(R300_RS_INTERP_0, 8);
-	for (i = 0; i < 8; ++i) {
-		e32(R300_RS_INTERP_USED);
+	if (!is_r500) {
+		R300_STATECHANGE(r300, ri);
+		reg_start(R300_RS_IP_0, 7);
+		for (i = 0; i < 8; ++i) {
+			e32(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3));
+		}
+
+		R300_STATECHANGE(r300, rc);
+		/* The second constant is needed to get glxgears display anything .. */
+		reg_start(R300_RS_COUNT, 1);
+		e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
+		e32(0x0);
+
+		R300_STATECHANGE(r300, rr);
+		reg_start(R300_RS_INST_0, 0);
+		e32(R300_RS_INST_COL_CN_WRITE);
+	} else {
+		R300_STATECHANGE(r300, ri);
+		reg_start(R500_RS_IP_0, 7);
+		for (i = 0; i < 8; ++i) {
+			e32((R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
+			    (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+			    (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+			    (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT));
+		}
+
+		R300_STATECHANGE(r300, rc);
+		/* The second constant is needed to get glxgears display anything .. */
+		reg_start(R300_RS_COUNT, 1);
+		e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
+		e32(0x0);
+
+		R300_STATECHANGE(r300, rr);
+		reg_start(R500_RS_INST_0, 0);
+		e32(R500_RS_INST_COL_CN_WRITE);
+
 	}
 
-	R300_STATECHANGE(r300, rc);
-	/* The second constant is needed to get glxgears display anything .. */
-	reg_start(R300_RS_CNTL_0, 1);
-	e32((1 << R300_RS_CNTL_CI_CNT_SHIFT) | R300_RS_CNTL_0_UNKNOWN_18);
-	e32(0x0);
+	if (!is_r500) {
+		R300_STATECHANGE(r300, fp);
+		reg_start(R300_US_CONFIG, 2);
+		e32(0x0);
+		e32(0x0);
+		e32(0x0);
+		reg_start(R300_US_CODE_ADDR_0, 3);
+		e32(0x0);
+		e32(0x0);
+		e32(0x0);
+		e32(R300_RGBA_OUT);
 
-	R300_STATECHANGE(r300, rr);
-	reg_start(R300_RS_ROUTE_0, 0);
-	e32(R300_RS_ROUTE_0_COLOR);
+		R300_STATECHANGE(r300, fpi[0]);
+		R300_STATECHANGE(r300, fpi[1]);
+		R300_STATECHANGE(r300, fpi[2]);
+		R300_STATECHANGE(r300, fpi[3]);
 
-	R300_STATECHANGE(r300, fp);
-	reg_start(R300_PFS_CNTL_0, 2);
-	e32(0x0);
-	e32(0x0);
-	e32(0x0);
-	reg_start(R300_PFS_NODE_0, 3);
-	e32(0x0);
-	e32(0x0);
-	e32(0x0);
-	e32(R300_PFS_NODE_OUTPUT_COLOR);
+		reg_start(R300_US_ALU_RGB_INST_0, 0);
+		e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
 
-	R300_STATECHANGE(r300, fpi[0]);
-	R300_STATECHANGE(r300, fpi[1]);
-	R300_STATECHANGE(r300, fpi[2]);
-	R300_STATECHANGE(r300, fpi[3]);
+		reg_start(R300_US_ALU_RGB_ADDR_0, 0);
+		e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0));
 
-	reg_start(R300_PFS_INSTR0_0, 0);
-	e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
+		reg_start(R300_US_ALU_ALPHA_INST_0, 0);
+		e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)));
 
-	reg_start(R300_PFS_INSTR1_0, 0);
-	e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0));
+		reg_start(R300_US_ALU_ALPHA_ADDR_0, 0);
+		e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
+	} else {
+ 		R300_STATECHANGE(r300, fp);
+ 		reg_start(R500_US_CONFIG, 1);
+ 		e32(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
+ 		e32(0x0);
+ 		reg_start(R500_US_CODE_ADDR, 2);
+ 		e32(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1));
+ 		e32(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1));
+ 		e32(R500_US_CODE_OFFSET_ADDR(0));
+
+		R300_STATECHANGE(r300, r500fp);
+		r500fp_start_fragment(0, 6);
+
+		e32(R500_INST_TYPE_OUT |
+		    R500_INST_TEX_SEM_WAIT |
+		    R500_INST_LAST |
+		    R500_INST_RGB_OMASK_R |
+		    R500_INST_RGB_OMASK_G |
+		    R500_INST_RGB_OMASK_B |
+		    R500_INST_ALPHA_OMASK |
+		    R500_INST_RGB_CLAMP |
+		    R500_INST_ALPHA_CLAMP);
+
+		e32(R500_RGB_ADDR0(0) |
+		    R500_RGB_ADDR1(0) |
+		    R500_RGB_ADDR1_CONST |
+		    R500_RGB_ADDR2(0) |
+		    R500_RGB_ADDR2_CONST);
+
+		e32(R500_ALPHA_ADDR0(0) |
+		    R500_ALPHA_ADDR1(0) |
+		    R500_ALPHA_ADDR1_CONST |
+		    R500_ALPHA_ADDR2(0) |
+		    R500_ALPHA_ADDR2_CONST);
+
+		e32(R500_ALU_RGB_SEL_A_SRC0 |
+		    R500_ALU_RGB_R_SWIZ_A_R |
+		    R500_ALU_RGB_G_SWIZ_A_G |
+		    R500_ALU_RGB_B_SWIZ_A_B |
+		    R500_ALU_RGB_SEL_B_SRC0 |
+		    R500_ALU_RGB_R_SWIZ_B_R |
+		    R500_ALU_RGB_B_SWIZ_B_G |
+		    R500_ALU_RGB_G_SWIZ_B_B);
+
+		e32(R500_ALPHA_OP_CMP |
+		    R500_ALPHA_SWIZ_A_A |
+		    R500_ALPHA_SWIZ_B_A);
+
+		e32(R500_ALU_RGBA_OP_CMP |
+		    R500_ALU_RGBA_R_SWIZ_0 |
+		    R500_ALU_RGBA_G_SWIZ_0 |
+		    R500_ALU_RGBA_B_SWIZ_0 |
+		    R500_ALU_RGBA_A_SWIZ_0);
+	}
 
-	reg_start(R300_PFS_INSTR2_0, 0);
-	e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)));
+	reg_start(R300_VAP_PVS_STATE_FLUSH_REG, 0);
+	e32(0x00000000);
+	if (has_tcl) {
+	    vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
+			(5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+			(12 << R300_VF_MAX_VTX_NUM_SHIFT));
+	    if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+		vap_cntl |= R500_TCL_STATE_OPTIMIZATION;
+	} else
+	    vap_cntl = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
+			(5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+			(5 << R300_VF_MAX_VTX_NUM_SHIFT));
+
+	if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
+	    vap_cntl |= (2 << R300_PVS_NUM_FPUS_SHIFT);
+	else if ((r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
+		 (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
+		 (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
+	    vap_cntl |= (5 << R300_PVS_NUM_FPUS_SHIFT);
+	else if ((r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
+		 (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
+	    vap_cntl |= (6 << R300_PVS_NUM_FPUS_SHIFT);
+	else if ((r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
+		 (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
+	    vap_cntl |= (8 << R300_PVS_NUM_FPUS_SHIFT);
+	else
+	    vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT);
 
-	reg_start(R300_PFS_INSTR3_0, 0);
-	e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
+	R300_STATECHANGE(rmesa, vap_cntl);
+	reg_start(R300_VAP_CNTL, 0);
+	e32(vap_cntl);
 
 	if (has_tcl) {
 		R300_STATECHANGE(r300, pvs);
-		reg_start(R300_VAP_PVS_CNTL_1, 2);
-		e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
-		    (0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
-		    (1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
-		e32(0x0);
-		e32(1 << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT);
+		reg_start(R300_VAP_PVS_CODE_CNTL_0, 2);
+
+		e32((0 << R300_PVS_FIRST_INST_SHIFT) |
+		    (0 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+		    (1 << R300_PVS_LAST_INST_SHIFT));
+		e32((0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
+		    (0 << R300_PVS_MAX_CONST_ADDR_SHIFT));
+		e32(1 << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
 
 		R300_STATECHANGE(r300, vpi);
 		vsf_start_fragment(0x0, 8);
-		e32(VP_OUT(ADD, OUT, 0, XYZW));
-		e32(VP_IN(IN, 0));
-		e32(VP_ZERO());
+
+		e32(PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 0, 0xf, PVS_DST_REG_OUT));
+		e32(PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
+		e32(PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
 		e32(0x0);
 
-		e32(VP_OUT(ADD, OUT, 1, XYZW));
-		e32(VP_IN(IN, 1));
-		e32(VP_ZERO());
+		e32(PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, PVS_DST_REG_OUT));
+		e32(PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
+		e32(PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
 		e32(0x0);
 	}
 }
diff --git a/src/mesa/drivers/dri/r300/r300_program.h b/src/mesa/drivers/dri/r300/r300_program.h
deleted file mode 100644
index eddd783f073..00000000000
--- a/src/mesa/drivers/dri/r300/r300_program.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
-Copyright (C) 2004 Nicolai Haehnle.  All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining
-a copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sublicense, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial
-portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- *   Nicolai Haehnle <prefect_@gmx.net>
- */
-
-#ifndef __R300_PROGRAM_H__
-#define __R300_PROGRAM_H__
-
-#include "r300_reg.h"
-
-/**
- * Vertex program helper macros
- */
-
-/* Produce out dword */
-#define VP_OUTCLASS_TMP		R300_VPI_OUT_REG_CLASS_TEMPORARY
-#define VP_OUTCLASS_OUT		R300_VPI_OUT_REG_CLASS_RESULT
-
-#define VP_OUTMASK_X	R300_VPI_OUT_WRITE_X
-#define VP_OUTMASK_Y	R300_VPI_OUT_WRITE_Y
-#define VP_OUTMASK_Z	R300_VPI_OUT_WRITE_Z
-#define VP_OUTMASK_W	R300_VPI_OUT_WRITE_W
-#define VP_OUTMASK_XY	(VP_OUTMASK_X|VP_OUTMASK_Y)
-#define VP_OUTMASK_XZ	(VP_OUTMASK_X|VP_OUTMASK_Z)
-#define VP_OUTMASK_XW	(VP_OUTMASK_X|VP_OUTMASK_W)
-#define VP_OUTMASK_XYZ	(VP_OUTMASK_XY|VP_OUTMASK_Z)
-#define VP_OUTMASK_XYW	(VP_OUTMASK_XY|VP_OUTMASK_W)
-#define VP_OUTMASK_XZW	(VP_OUTMASK_XZ|VP_OUTMASK_W)
-#define VP_OUTMASK_XYZW	(VP_OUTMASK_XYZ|VP_OUTMASK_W)
-#define VP_OUTMASK_YZ	(VP_OUTMASK_Y|VP_OUTMASK_Z)
-#define VP_OUTMASK_YW	(VP_OUTMASK_Y|VP_OUTMASK_W)
-#define VP_OUTMASK_YZW	(VP_OUTMASK_YZ|VP_OUTMASK_W)
-#define VP_OUTMASK_ZW	(VP_OUTMASK_Z|VP_OUTMASK_W)
-
-#define VP_OUT(instr,outclass,outidx,outmask) \
-	(R300_VPI_OUT_OP_##instr |				\
-	((outidx) << R300_VPI_OUT_REG_INDEX_SHIFT) |		\
-	VP_OUTCLASS_##outclass |				\
-	VP_OUTMASK_##outmask)
-
-/* Produce in dword */
-#define VP_INCLASS_TMP		R300_VPI_IN_REG_CLASS_TEMPORARY
-#define VP_INCLASS_IN		R300_VPI_IN_REG_CLASS_ATTRIBUTE
-#define VP_INCLASS_CONST	R300_VPI_IN_REG_CLASS_PARAMETER
-
-#define VP_IN(class,idx) \
-	(((idx) << R300_VPI_IN_REG_INDEX_SHIFT) |		\
-	VP_INCLASS_##class |					\
-	(R300_VPI_IN_SELECT_X << R300_VPI_IN_X_SHIFT) |		\
-	(R300_VPI_IN_SELECT_Y << R300_VPI_IN_Y_SHIFT) |		\
-	(R300_VPI_IN_SELECT_Z << R300_VPI_IN_Z_SHIFT) |		\
-	(R300_VPI_IN_SELECT_W << R300_VPI_IN_W_SHIFT))
-#define VP_ZERO() \
-	((R300_VPI_IN_SELECT_ZERO << R300_VPI_IN_X_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ZERO << R300_VPI_IN_Y_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ZERO << R300_VPI_IN_Z_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ZERO << R300_VPI_IN_W_SHIFT))
-#define VP_ONE() \
-	((R300_VPI_IN_SELECT_ONE << R300_VPI_IN_X_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ONE << R300_VPI_IN_Y_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ONE << R300_VPI_IN_Z_SHIFT) |	\
-	(R300_VPI_IN_SELECT_ONE << R300_VPI_IN_W_SHIFT))
-
-#define VP_NEG(in,comp)		((in) ^ (R300_VPI_IN_NEG_##comp))
-#define VP_NEGALL(in,comp)	VP_NEG(VP_NEG(VP_NEG(VP_NEG((in),X),Y),Z),W)
-
-/**
- * Fragment program helper macros
- */
-
-/* Produce unshifted source selectors */
-#define FP_TMP(idx) (idx)
-#define FP_CONST(idx) ((idx) | (1 << 5))
-
-/* Produce source/dest selector dword */
-#define FP_SELC_MASK_NO		0
-#define FP_SELC_MASK_X		1
-#define FP_SELC_MASK_Y		2
-#define FP_SELC_MASK_XY		3
-#define FP_SELC_MASK_Z		4
-#define FP_SELC_MASK_XZ		5
-#define FP_SELC_MASK_YZ		6
-#define FP_SELC_MASK_XYZ	7
-
-#define FP_SELC(destidx,regmask,outmask,src0,src1,src2) \
-	(((destidx) << R300_FPI1_DSTC_SHIFT) |		\
-	 (FP_SELC_MASK_##regmask << 23) |		\
-	 (FP_SELC_MASK_##outmask << 26) |		\
-	 ((src0) << R300_FPI1_SRC0C_SHIFT) |		\
-	 ((src1) << R300_FPI1_SRC1C_SHIFT) |		\
-	 ((src2) << R300_FPI1_SRC2C_SHIFT))
-
-#define FP_SELA_MASK_NO		0
-#define FP_SELA_MASK_W		1
-
-#define FP_SELA(destidx,regmask,outmask,src0,src1,src2) \
-	(((destidx) << R300_FPI3_DSTA_SHIFT) |		\
-	 (FP_SELA_MASK_##regmask << 23) |		\
-	 (FP_SELA_MASK_##outmask << 24) |		\
-	 ((src0) << R300_FPI3_SRC0A_SHIFT) |		\
-	 ((src1) << R300_FPI3_SRC1A_SHIFT) |		\
-	 ((src2) << R300_FPI3_SRC2A_SHIFT))
-
-/* Produce unshifted argument selectors */
-#define FP_ARGC(source)	R300_FPI0_ARGC_##source
-#define FP_ARGA(source) R300_FPI2_ARGA_##source
-#define FP_ABS(arg) ((arg) | (1 << 6))
-#define FP_NEG(arg) ((arg) ^ (1 << 5))
-
-/* Produce instruction dword */
-#define FP_INSTRC(opcode,arg0,arg1,arg2) \
-	(R300_FPI0_OUTC_##opcode | 		\
-	((arg0) << R300_FPI0_ARG0C_SHIFT) |	\
-	((arg1) << R300_FPI0_ARG1C_SHIFT) |	\
-	((arg2) << R300_FPI0_ARG2C_SHIFT))
-
-#define FP_INSTRA(opcode,arg0,arg1,arg2) \
-	(R300_FPI2_OUTA_##opcode | 		\
-	((arg0) << R300_FPI2_ARG0A_SHIFT) |	\
-	((arg1) << R300_FPI2_ARG1A_SHIFT) |	\
-	((arg2) << R300_FPI2_ARG2A_SHIFT))
-
-extern void debug_vp(GLcontext * ctx, struct gl_vertex_program *vp);
-
-#endif				/* __R300_PROGRAM_H__ */
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index 1baa74c5269..778db96cc1f 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -67,9 +67,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /*
  * Vertex Array Processing (VAP) Control
- * Stolen from r200 code from Christoph Brill (It's a guess!)
  */
 #define R300_VAP_CNTL	0x2080
+#       define R300_PVS_NUM_SLOTS_SHIFT                 0
+#       define R300_PVS_NUM_CNTLRS_SHIFT                4
+#       define R300_PVS_NUM_FPUS_SHIFT                  8
+#       define R300_VF_MAX_VTX_NUM_SHIFT                18
+#       define R300_GL_CLIP_SPACE_DEF                   (0 << 22)
+#       define R300_DX_CLIP_SPACE_DEF                   (1 << 22)
+#       define R500_TCL_STATE_OPTIMIZATION              (1 << 23)
 
 /* This register is written directly and also starts data section
  * in many 3d CP_PACKET3's
@@ -106,14 +112,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 	/* number of vertices */
 #	define	R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT           16
 
-/* BEGIN: Wild guesses */
+#define R500_VAP_INDEX_OFFSET		    0x208c
+
 #define R300_VAP_OUTPUT_VTX_FMT_0           0x2090
 #       define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT     (1<<0)
-#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT   (1<<1)
-#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2)  /* GUESS */
-#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3)  /* GUESS */
-#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4)  /* GUESS */
-#       define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */
+#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT (1<<1)
+#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2)
+#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3)
+#       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4)
+#       define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16)
 
 #define R300_VAP_OUTPUT_VTX_FMT_1           0x2094
 	/* each of the following is 3 bits wide, specifies number
@@ -126,30 +133,64 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
-/* END: Wild guesses */
+#	define R300_VAP_OUTPUT_VTX_FMT_1__NOT_PRESENT  0
+#	define R300_VAP_OUTPUT_VTX_FMT_1__1_COMPONENT  1
+#	define R300_VAP_OUTPUT_VTX_FMT_1__2_COMPONENTS 2
+#	define R300_VAP_OUTPUT_VTX_FMT_1__3_COMPONENTS 3
+#	define R300_VAP_OUTPUT_VTX_FMT_1__4_COMPONENTS 4
 
 #define R300_SE_VTE_CNTL                  0x20b0
-#	define     R300_VPORT_X_SCALE_ENA                0x00000001
-#	define     R300_VPORT_X_OFFSET_ENA               0x00000002
-#	define     R300_VPORT_Y_SCALE_ENA                0x00000004
-#	define     R300_VPORT_Y_OFFSET_ENA               0x00000008
-#	define     R300_VPORT_Z_SCALE_ENA                0x00000010
-#	define     R300_VPORT_Z_OFFSET_ENA               0x00000020
-#	define     R300_VTX_XY_FMT                       0x00000100
-#	define     R300_VTX_Z_FMT                        0x00000200
-#	define     R300_VTX_W0_FMT                       0x00000400
-#	define     R300_VTX_W0_NORMALIZE                 0x00000800
-#	define     R300_VTX_ST_DENORMALIZED              0x00001000
+#	define     R300_VPORT_X_SCALE_ENA                (1 << 0)
+#	define     R300_VPORT_X_OFFSET_ENA               (1 << 1)
+#	define     R300_VPORT_Y_SCALE_ENA                (1 << 2)
+#	define     R300_VPORT_Y_OFFSET_ENA               (1 << 3)
+#	define     R300_VPORT_Z_SCALE_ENA                (1 << 4)
+#	define     R300_VPORT_Z_OFFSET_ENA               (1 << 5)
+#	define     R300_VTX_XY_FMT                       (1 << 8)
+#	define     R300_VTX_Z_FMT                        (1 << 9)
+#	define     R300_VTX_W0_FMT                       (1 << 10)
+#	define     R300_SERIAL_PROC_ENA                  (1 << 11)
 
 /* BEGIN: Vertex data assembly - lots of uncertainties */
 
 /* gap */
 
+/* Maximum Vertex Indx Clamp */
+#define R300_VAP_VF_MAX_VTX_INDX         0x2134
+/* Minimum Vertex Indx Clamp */
+#define R300_VAP_VF_MIN_VTX_INDX         0x2138
+
+/** Vertex assembler/processor control status */
 #define R300_VAP_CNTL_STATUS              0x2140
+/* No swap at all (default) */
 #	define R300_VC_NO_SWAP                  (0 << 0)
+/* 16-bit swap: 0xAABBCCDD becomes 0xBBAADDCC */
 #	define R300_VC_16BIT_SWAP               (1 << 0)
+/* 32-bit swap: 0xAABBCCDD becomes 0xDDCCBBAA */
 #	define R300_VC_32BIT_SWAP               (2 << 0)
+/* Half-dword swap: 0xAABBCCDD becomes 0xCCDDAABB */
+#	define R300_VC_HALF_DWORD_SWAP          (3 << 0)
+/* The TCL engine will not be used (as it is logically or even physically removed) */
 #	define R300_VAP_TCL_BYPASS		(1 << 8)
+/* Read only flag if TCL engine is busy. */
+#	define R300_VAP_PVS_BUSY                (1 << 11)
+/* TODO: gap for MAX_MPS */
+/* Read only flag if the vertex store is busy. */
+#	define R300_VAP_VS_BUSY                 (1 << 24)
+/* Read only flag if the reciprocal engine is busy. */
+#	define R300_VAP_RCP_BUSY                (1 << 25)
+/* Read only flag if the viewport transform engine is busy. */
+#	define R300_VAP_VTE_BUSY                (1 << 26)
+/* Read only flag if the memory interface unit is busy. */
+#	define R300_VAP_MUI_BUSY                (1 << 27)
+/* Read only flag if the vertex cache is busy. */
+#	define R300_VAP_VC_BUSY                 (1 << 28)
+/* Read only flag if the vertex fetcher is busy. */
+#	define R300_VAP_VF_BUSY                 (1 << 29)
+/* Read only flag if the register pipeline is busy. */
+#	define R300_VAP_REGPIPE_BUSY            (1 << 30)
+/* Read only flag if the VAP engine is busy. */
+#	define R300_VAP_VAP_BUSY                (1 << 31)
 
 /* gap */
 
@@ -177,27 +218,31 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Always set COMPONENTS_4 in immediate mode.
  */
 
-#define R300_VAP_INPUT_ROUTE_0_0            0x2150
-#       define R300_INPUT_ROUTE_COMPONENTS_1     (0 << 0)
-#       define R300_INPUT_ROUTE_COMPONENTS_2     (1 << 0)
-#       define R300_INPUT_ROUTE_COMPONENTS_3     (2 << 0)
-#       define R300_INPUT_ROUTE_COMPONENTS_4     (3 << 0)
-#       define R300_INPUT_ROUTE_COMPONENTS_RGBA  (4 << 0) /* GUESS */
-#       define R300_VAP_INPUT_ROUTE_IDX_SHIFT    8
-#       define R300_VAP_INPUT_ROUTE_IDX_MASK     (31 << 8) /* GUESS */
-#       define R300_VAP_INPUT_ROUTE_END          (1 << 13)
-#       define R300_INPUT_ROUTE_IMMEDIATE_MODE   (0 << 14) /* GUESS */
-#       define R300_INPUT_ROUTE_FLOAT            (1 << 14) /* GUESS */
-#       define R300_INPUT_ROUTE_UNSIGNED_BYTE    (2 << 14) /* GUESS */
-#       define R300_INPUT_ROUTE_FLOAT_COLOR      (3 << 14) /* GUESS */
-#define R300_VAP_INPUT_ROUTE_0_1            0x2154
-#define R300_VAP_INPUT_ROUTE_0_2            0x2158
-#define R300_VAP_INPUT_ROUTE_0_3            0x215C
-#define R300_VAP_INPUT_ROUTE_0_4            0x2160
-#define R300_VAP_INPUT_ROUTE_0_5            0x2164
-#define R300_VAP_INPUT_ROUTE_0_6            0x2168
-#define R300_VAP_INPUT_ROUTE_0_7            0x216C
-
+#define R300_VAP_PROG_STREAM_CNTL_0                     0x2150
+#       define R300_DATA_TYPE_0_SHIFT                   0
+#       define R300_DATA_TYPE_FLOAT_1                   0
+#       define R300_DATA_TYPE_FLOAT_2                   1
+#       define R300_DATA_TYPE_FLOAT_3                   2
+#       define R300_DATA_TYPE_FLOAT_4                   3
+#       define R300_DATA_TYPE_BYTE                      4
+#       define R300_DATA_TYPE_D3DCOLOR                  5
+#       define R300_DATA_TYPE_SHORT_2                   6
+#       define R300_DATA_TYPE_SHORT_4                   7
+#       define R300_DATA_TYPE_VECTOR_3_TTT              8
+#       define R300_DATA_TYPE_VECTOR_3_EET              9
+#       define R300_SKIP_DWORDS_SHIFT                   4
+#       define R300_DST_VEC_LOC_SHIFT                   8
+#       define R300_LAST_VEC                            (1 << 13)
+#       define R300_SIGNED                              (1 << 14)
+#       define R300_NORMALIZE                           (1 << 15)
+#       define R300_DATA_TYPE_1_SHIFT                   16
+#define R300_VAP_PROG_STREAM_CNTL_1                     0x2154
+#define R300_VAP_PROG_STREAM_CNTL_2                     0x2158
+#define R300_VAP_PROG_STREAM_CNTL_3                     0x215C
+#define R300_VAP_PROG_STREAM_CNTL_4                     0x2160
+#define R300_VAP_PROG_STREAM_CNTL_5                     0x2164
+#define R300_VAP_PROG_STREAM_CNTL_6                     0x2168
+#define R300_VAP_PROG_STREAM_CNTL_7                     0x216C
 /* gap */
 
 /* Notes:
@@ -205,9 +250,26 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *    if vertex program uses only position, fglrx will set normal, too
  *  - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
  */
-#define R300_VAP_INPUT_CNTL_0               0x2180
-#       define R300_INPUT_CNTL_0_COLOR           0x00000001
-#define R300_VAP_INPUT_CNTL_1               0x2184
+#define R300_VAP_VTX_STATE_CNTL               0x2180
+#       define R300_COLOR_0_ASSEMBLY_SHIFT    0
+#       define R300_SEL_COLOR                 0
+#       define R300_SEL_USER_COLOR_0          1
+#       define R300_SEL_USER_COLOR_1          2
+#       define R300_COLOR_1_ASSEMBLY_SHIFT    2
+#       define R300_COLOR_2_ASSEMBLY_SHIFT    4
+#       define R300_COLOR_3_ASSEMBLY_SHIFT    6
+#       define R300_COLOR_4_ASSEMBLY_SHIFT    8
+#       define R300_COLOR_5_ASSEMBLY_SHIFT    10
+#       define R300_COLOR_6_ASSEMBLY_SHIFT    12
+#       define R300_COLOR_7_ASSEMBLY_SHIFT    14
+#       define R300_UPDATE_USER_COLOR_0_ENA   (1 << 16)
+
+/*
+ * Each bit in this field applies to the corresponding vector in the VSM
+ * memory (i.e. Bit 0 applies to VECTOR_0 (POSITION), etc.). If the bit
+ * is set, then the corresponding 4-Dword Vector is output into the Vertex Stream.
+ */
+#define R300_VAP_VSM_VTX_ASSM               0x2184
 #       define R300_INPUT_CNTL_POS               0x00000001
 #       define R300_INPUT_CNTL_NORMAL            0x00000002
 #       define R300_INPUT_CNTL_COLOR             0x00000004
@@ -220,6 +282,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_INPUT_CNTL_TC6               0x00010000 /* GUESS */
 #       define R300_INPUT_CNTL_TC7               0x00020000 /* GUESS */
 
+/* Programmable Stream Control Signed Normalize Control */
+#define R300_VAP_PSC_SGN_NORM_CNTL         0x21dc
+#	define SGN_NORM_ZERO                 0
+#	define SGN_NORM_ZERO_CLAMP_MINUS_ONE 1
+#	define SGN_NORM_NO_ZERO              2
+
 /* gap */
 
 /* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
@@ -229,26 +297,40 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * mode, the swizzling pattern is e.g. used to set zw components in texture
  * coordinates with only tweo components.
  */
-#define R300_VAP_INPUT_ROUTE_1_0            0x21E0
+#define R300_VAP_PROG_STREAM_CNTL_EXT_0                 0x21e0
+#       define R300_SWIZZLE0_SHIFT                      0
+#       define R300_SWIZZLE_SELECT_X_SHIFT              0
+#       define R300_SWIZZLE_SELECT_Y_SHIFT              3
+#       define R300_SWIZZLE_SELECT_Z_SHIFT              6
+#       define R300_SWIZZLE_SELECT_W_SHIFT              9
+
+#       define R300_SWIZZLE_SELECT_X                    0
+#       define R300_SWIZZLE_SELECT_Y                    1
+#       define R300_SWIZZLE_SELECT_Z                    2
+#       define R300_SWIZZLE_SELECT_W                    3
+#       define R300_SWIZZLE_SELECT_FP_ZERO              4
+#       define R300_SWIZZLE_SELECT_FP_ONE               5
+/* alternate forms for r300_emit.c */
 #       define R300_INPUT_ROUTE_SELECT_X    0
 #       define R300_INPUT_ROUTE_SELECT_Y    1
 #       define R300_INPUT_ROUTE_SELECT_Z    2
 #       define R300_INPUT_ROUTE_SELECT_W    3
 #       define R300_INPUT_ROUTE_SELECT_ZERO 4
 #       define R300_INPUT_ROUTE_SELECT_ONE  5
-#       define R300_INPUT_ROUTE_SELECT_MASK 7
-#       define R300_INPUT_ROUTE_X_SHIFT     0
-#       define R300_INPUT_ROUTE_Y_SHIFT     3
-#       define R300_INPUT_ROUTE_Z_SHIFT     6
-#       define R300_INPUT_ROUTE_W_SHIFT     9
-#       define R300_INPUT_ROUTE_ENABLE      (15 << 12)
-#define R300_VAP_INPUT_ROUTE_1_1            0x21E4
-#define R300_VAP_INPUT_ROUTE_1_2            0x21E8
-#define R300_VAP_INPUT_ROUTE_1_3            0x21EC
-#define R300_VAP_INPUT_ROUTE_1_4            0x21F0
-#define R300_VAP_INPUT_ROUTE_1_5            0x21F4
-#define R300_VAP_INPUT_ROUTE_1_6            0x21F8
-#define R300_VAP_INPUT_ROUTE_1_7            0x21FC
+
+#       define R300_WRITE_ENA_SHIFT                     12
+#       define R300_WRITE_ENA_X                         1
+#       define R300_WRITE_ENA_Y                         2
+#       define R300_WRITE_ENA_Z                         4
+#       define R300_WRITE_ENA_W                         8
+#       define R300_SWIZZLE1_SHIFT                      16
+#define R300_VAP_PROG_STREAM_CNTL_EXT_1                 0x21e4
+#define R300_VAP_PROG_STREAM_CNTL_EXT_2                 0x21e8
+#define R300_VAP_PROG_STREAM_CNTL_EXT_3                 0x21ec
+#define R300_VAP_PROG_STREAM_CNTL_EXT_4                 0x21f0
+#define R300_VAP_PROG_STREAM_CNTL_EXT_5                 0x21f4
+#define R300_VAP_PROG_STREAM_CNTL_EXT_6                 0x21f8
+#define R300_VAP_PROG_STREAM_CNTL_EXT_7                 0x21fc
 
 /* END: Vertex data assembly */
 
@@ -280,18 +362,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Multiple vertex programs and parameter sets can be loaded at once,
  * which could explain the size discrepancy.
  */
-#define R300_VAP_PVS_UPLOAD_ADDRESS         0x2200
-#       define R300_PVS_UPLOAD_PROGRAM           0x00000000
-/* gap */
-#       define R300_PVS_UPLOAD_PARAMETERS        0x00000200
-/* gap */
-#       define R300_PVS_UPLOAD_CLIP_PLANE0       0x00000400
-#       define R300_PVS_UPLOAD_CLIP_PLANE1       0x00000401
-#       define R300_PVS_UPLOAD_CLIP_PLANE2       0x00000402
-#       define R300_PVS_UPLOAD_CLIP_PLANE3       0x00000403
-#       define R300_PVS_UPLOAD_CLIP_PLANE4       0x00000404
-#       define R300_PVS_UPLOAD_CLIP_PLANE5       0x00000405
-#       define R300_PVS_UPLOAD_POINTSIZE         0x00000406
+#define R300_VAP_PVS_VECTOR_INDX_REG         0x2200
+#       define R300_PVS_CODE_START           0
+#       define R300_MAX_PVS_CODE_LINES       256
+#       define R500_MAX_PVS_CODE_LINES       1024
+#       define R300_PVS_CONST_START          512
+#       define R500_PVS_CONST_START          1024
+#       define R300_MAX_PVS_CONST_VECS       256
+#       define R500_MAX_PVS_CONST_VECS       1024
+#       define R300_PVS_UCP_START            1024
+#       define R500_PVS_UCP_START            1536
+#       define R300_POINT_VPORT_SCALE_OFFSET 1030
+#       define R500_POINT_VPORT_SCALE_OFFSET 1542
+#       define R300_POINT_GEN_TEX_OFFSET     1031
+#       define R500_POINT_GEN_TEX_OFFSET     1543
 
 /*
  * These are obsolete defines form r300_context.h, but they might give some
@@ -319,10 +403,28 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 /* I do not know the purpose of this register. However, I do know that
  * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
  * for normal rendering.
+ *
+ * 2007-11-05: This register is the user clip plane control register, but there
+ * also seems to be a rendering mode control; the NORMAL/CLEAR defines.
+ *
+ * See bug #9871. http://bugs.freedesktop.org/attachment.cgi?id=10672&action=view
  */
-#define R300_VAP_UNKNOWN_221C               0x221C
-#       define R300_221C_NORMAL                  0x00000000
-#       define R300_221C_CLEAR                   0x0001C000
+#define R300_VAP_CLIP_CNTL                       0x221C
+#       define R300_VAP_UCP_ENABLE_0             (1 << 0)
+#       define R300_VAP_UCP_ENABLE_1             (1 << 1)
+#       define R300_VAP_UCP_ENABLE_2             (1 << 2)
+#       define R300_VAP_UCP_ENABLE_3             (1 << 3)
+#       define R300_VAP_UCP_ENABLE_4             (1 << 4)
+#       define R300_VAP_UCP_ENABLE_5             (1 << 5)
+#       define R300_PS_UCP_MODE_DIST_COP         (0 << 14)
+#       define R300_PS_UCP_MODE_RADIUS_COP       (1 << 14)
+#       define R300_PS_UCP_MODE_RADIUS_COP_CLIP  (2 << 14)
+#       define R300_PS_UCP_MODE_CLIP_AS_TRIFAN   (3 << 14)
+#       define R300_CLIP_DISABLE                 (1 << 16)
+#       define R300_UCP_CULL_ONLY_ENABLE         (1 << 17)
+#       define R300_BOUNDARY_EDGE_FLAG_ENABLE    (1 << 18)
+#       define R500_COLOR2_IS_TEXTURE            (1 << 20)
+#       define R500_COLOR3_IS_TEXTURE            (1 << 21)
 
 /* These seem to be per-pixel and per-vertex X and Y clipping planes. The first
  * plane is per-pixel and the second plane is per-vertex.
@@ -331,10 +433,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest.
  */
-#define R300_VAP_CLIP_X_0                   0x2220
-#define R300_VAP_CLIP_X_1                   0x2224
-#define R300_VAP_CLIP_Y_0                   0x2228
-#define R300_VAP_CLIP_Y_1                   0x2230
+#define R300_VAP_GB_VERT_CLIP_ADJ                   0x2220
+#define R300_VAP_GB_VERT_DISC_ADJ                   0x2224
+#define R300_VAP_GB_HORZ_CLIP_ADJ                   0x2228
+#define R300_VAP_GB_HORZ_DISC_ADJ                   0x222c
 
 /* gap */
 
@@ -343,10 +445,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
  * avoids bugs caused by still running shaders reading bad data from memory.
  */
-#define R300_VAP_PVS_WAITIDLE               0x2284 /* GUESS */
+#define R300_VAP_PVS_STATE_FLUSH_REG        0x2284
 
-/* Absolutely no clue what this register is about. */
-#define R300_VAP_UNKNOWN_2288               0x2288
+/* This register is used to define the number of core clocks to wait for a
+ * vertex to be received by the VAP input controller (while the primitive
+ * path is backed up) before forcing any accumulated vertices to be submitted
+ * to the vertex processing path.
+ */
+#define VAP_PVS_VTX_TIMEOUT_REG             0x2288
 #       define R300_2288_R300                    0x00750000 /* -- nh */
 #       define R300_2288_RV350                   0x0000FFFF /* -- Vladimir */
 
@@ -369,17 +475,17 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * is sometimes accepted other instruction that have no relationship with
  * position calculations.
  */
-#define R300_VAP_PVS_CNTL_1                 0x22D0
-#       define R300_PVS_CNTL_1_PROGRAM_START_SHIFT   0
-#       define R300_PVS_CNTL_1_POS_END_SHIFT         10
-#       define R300_PVS_CNTL_1_PROGRAM_END_SHIFT     20
+#define R300_VAP_PVS_CODE_CNTL_0            0x22D0
+#       define R300_PVS_FIRST_INST_SHIFT         0
+#       define R300_PVS_XYZW_VALID_INST_SHIFT    10
+#       define R300_PVS_LAST_INST_SHIFT          20
 /* Addresses are relative the the vertex program parameters area. */
-#define R300_VAP_PVS_CNTL_2                 0x22D4
-#       define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
-#       define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT  16
-#define R300_VAP_PVS_CNTL_3	           0x22D8
-#       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT 10
-#       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT 0
+#define R300_VAP_PVS_CONST_CNTL             0x22D4
+#       define R300_PVS_CONST_BASE_OFFSET_SHIFT  0
+#       define R300_PVS_MAX_CONST_ADDR_SHIFT     16
+#define R300_VAP_PVS_CODE_CNTL_1	    0x22D8
+#       define R300_PVS_LAST_VTX_SRC_INST_SHIFT  0
+#define R300_VAP_PVS_FLOW_CNTL_OPC          0x22DC
 
 /* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
  * immediate vertices
@@ -427,17 +533,23 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * (or something closely related to that).
  * This bit is rather fatal at the time being due to lackings at pixel
  * shader side
+ * Specifies top of Raster pipe specific enable controls.
  */
 #define R300_GB_ENABLE	0x4008
-#	define R300_GB_POINT_STUFF_ENABLE	(1<<0)
-#	define R300_GB_LINE_STUFF_ENABLE	(1<<1)
-#	define R300_GB_TRIANGLE_STUFF_ENABLE	(1<<2)
-#	define R300_GB_STENCIL_AUTO_ENABLE	(1<<4)
-#	define R300_GB_UNK31			(1<<31)
+#	define R300_GB_POINT_STUFF_DISABLE     (0 << 0)
+#	define R300_GB_POINT_STUFF_ENABLE      (1 << 0) /* Specifies if points will have stuffed texture coordinates. */
+#	define R300_GB_LINE_STUFF_DISABLE      (0 << 1)
+#	define R300_GB_LINE_STUFF_ENABLE       (1 << 1) /* Specifies if lines will have stuffed texture coordinates. */
+#	define R300_GB_TRIANGLE_STUFF_DISABLE  (0 << 2)
+#	define R300_GB_TRIANGLE_STUFF_ENABLE   (1 << 2) /* Specifies if triangles will have stuffed texture coordinates. */
+#	define R300_GB_STENCIL_AUTO_DISABLE    (0 << 4)
+#	define R300_GB_STENCIL_AUTO_ENABLE     (1 << 4) /* Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit. */
+#	define R300_GB_STENCIL_AUTO_FORCE      (2 << 4) /* Force 0 into dzy low bit. */
+
 	/* each of the following is 2 bits wide */
-#define R300_GB_TEX_REPLICATE	0
-#define R300_GB_TEX_ST		1
-#define R300_GB_TEX_STR		2
+#define R300_GB_TEX_REPLICATE	0 /* Replicate VAP source texture coordinates (S,T,[R,Q]). */
+#define R300_GB_TEX_ST		1 /* Stuff with source texture coordinates (S,T). */
+#define R300_GB_TEX_STR		2 /* Stuff with source texture coordinates (S,T,R). */
 #	define R300_GB_TEX0_SOURCE_SHIFT	16
 #	define R300_GB_TEX1_SOURCE_SHIFT	18
 #	define R300_GB_TEX2_SOURCE_SHIFT	20
@@ -448,7 +560,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_GB_TEX7_SOURCE_SHIFT	30
 
 /* MSPOS - positions for multisample antialiasing (?) */
-#define R300_GB_MSPOS0	0x4010
+#define R300_GB_MSPOS0                           0x4010
 	/* shifts - each of the fields is 4 bits */
 #	define R300_GB_MSPOS0__MS_X0_SHIFT	0
 #	define R300_GB_MSPOS0__MS_Y0_SHIFT	4
@@ -459,7 +571,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_GB_MSPOS0__MSBD0_Y		24
 #	define R300_GB_MSPOS0__MSBD0_X		28
 
-#define R300_GB_MSPOS1	0x4014
+#define R300_GB_MSPOS1                           0x4014
 #	define R300_GB_MSPOS1__MS_X3_SHIFT	0
 #	define R300_GB_MSPOS1__MS_Y3_SHIFT	4
 #	define R300_GB_MSPOS1__MS_X4_SHIFT	8
@@ -468,31 +580,47 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_GB_MSPOS1__MS_Y5_SHIFT	20
 #	define R300_GB_MSPOS1__MSBD1		24
 
-
-#define R300_GB_TILE_CONFIG	0x4018
-#	define R300_GB_TILE_ENABLE	(1<<0)
-#	define R300_GB_TILE_PIPE_COUNT_RV300	0
-#	define R300_GB_TILE_PIPE_COUNT_R300	(3<<1)
-#	define R300_GB_TILE_PIPE_COUNT_R420	(7<<1)
-#	define R300_GB_TILE_PIPE_COUNT_RV410	(3<<1)
-#	define R300_GB_TILE_SIZE_8		0
-#	define R300_GB_TILE_SIZE_16		(1<<4)
-#	define R300_GB_TILE_SIZE_32		(2<<4)
-#	define R300_GB_SUPER_SIZE_1		(0<<6)
-#	define R300_GB_SUPER_SIZE_2		(1<<6)
-#	define R300_GB_SUPER_SIZE_4		(2<<6)
-#	define R300_GB_SUPER_SIZE_8		(3<<6)
-#	define R300_GB_SUPER_SIZE_16		(4<<6)
-#	define R300_GB_SUPER_SIZE_32		(5<<6)
-#	define R300_GB_SUPER_SIZE_64		(6<<6)
-#	define R300_GB_SUPER_SIZE_128		(7<<6)
+/* Specifies the graphics pipeline configuration for rasterization. */
+#define R300_GB_TILE_CONFIG                      0x4018
+#	define R300_GB_TILE_DISABLE             (0 << 0)
+#	define R300_GB_TILE_ENABLE              (1 << 0)
+#	define R300_GB_TILE_PIPE_COUNT_RV300	(0 << 1) /* RV350 (1 pipe, 1 ctx) */
+#	define R300_GB_TILE_PIPE_COUNT_R300	(3 << 1) /* R300 (2 pipes, 1 ctx) */
+#	define R300_GB_TILE_PIPE_COUNT_R420_3P  (6 << 1) /* R420-3P (3 pipes, 1 ctx) */
+#	define R300_GB_TILE_PIPE_COUNT_R420	(7 << 1) /* R420 (4 pipes, 1 ctx) */
+#	define R300_GB_TILE_SIZE_8		(0 << 4)
+#	define R300_GB_TILE_SIZE_16		(1 << 4)
+#	define R300_GB_TILE_SIZE_32		(2 << 4)
+#	define R300_GB_SUPER_SIZE_1		(0 << 6)
+#	define R300_GB_SUPER_SIZE_2		(1 << 6)
+#	define R300_GB_SUPER_SIZE_4		(2 << 6)
+#	define R300_GB_SUPER_SIZE_8		(3 << 6)
+#	define R300_GB_SUPER_SIZE_16		(4 << 6)
+#	define R300_GB_SUPER_SIZE_32		(5 << 6)
+#	define R300_GB_SUPER_SIZE_64		(6 << 6)
+#	define R300_GB_SUPER_SIZE_128		(7 << 6)
 #	define R300_GB_SUPER_X_SHIFT		9	/* 3 bits wide */
 #	define R300_GB_SUPER_Y_SHIFT		12	/* 3 bits wide */
-#	define R300_GB_SUPER_TILE_A		0
-#	define R300_GB_SUPER_TILE_B		(1<<15)
-#	define R300_GB_SUBPIXEL_1_12		0
-#	define R300_GB_SUBPIXEL_1_16		(1<<16)
-
+#	define R300_GB_SUPER_TILE_A		(0 << 15)
+#	define R300_GB_SUPER_TILE_B		(1 << 15)
+#	define R300_GB_SUBPIXEL_1_12		(0 << 16)
+#	define R300_GB_SUBPIXEL_1_16		(1 << 16)
+#	define GB_TILE_CONFIG_QUADS_PER_RAS_4   (0 << 17)
+#	define GB_TILE_CONFIG_QUADS_PER_RAS_8   (1 << 17)
+#	define GB_TILE_CONFIG_QUADS_PER_RAS_16  (2 << 17)
+#	define GB_TILE_CONFIG_QUADS_PER_RAS_32  (3 << 17)
+#	define GB_TILE_CONFIG_BB_SCAN_INTERCEPT (0 << 19)
+#	define GB_TILE_CONFIG_BB_SCAN_BOUND_BOX (1 << 19)
+#	define GB_TILE_CONFIG_ALT_SCAN_EN_LR    (0 << 20)
+#	define GB_TILE_CONFIG_ALT_SCAN_EN_LRL   (1 << 20)
+#	define GB_TILE_CONFIG_ALT_OFFSET        (0 << 21)
+#	define GB_TILE_CONFIG_SUBPRECISION      (0 << 22)
+#	define GB_TILE_CONFIG_ALT_TILING_DEF    (0 << 23)
+#	define GB_TILE_CONFIG_ALT_TILING_3_2    (1 << 23)
+#	define GB_TILE_CONFIG_Z_EXTENDED_24_1   (0 << 24)
+#	define GB_TILE_CONFIG_Z_EXTENDED_S25_1  (1 << 24)
+
+/* Specifies the sizes of the various FIFO`s in the sc/rs/us. This register must be the first one written */
 #define R300_GB_FIFO_SIZE	0x4024
 	/* each of the following is 2 bits wide */
 #define R300_GB_FIFO_SIZE_32	0
@@ -516,30 +644,102 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_OFIFO_HIGHWATER_SHIFT	22	/* two bits only */
 #	define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT	24
 
-#define R300_GB_SELECT	0x401C
-#	define R300_GB_FOG_SELECT_C0A		0
-#	define R300_GB_FOG_SELECT_C1A		1
-#	define R300_GB_FOG_SELECT_C2A		2
-#	define R300_GB_FOG_SELECT_C3A		3
-#	define R300_GB_FOG_SELECT_1_1_W	4
-#	define R300_GB_FOG_SELECT_Z		5
-#	define R300_GB_DEPTH_SELECT_Z		0
-#	define R300_GB_DEPTH_SELECT_1_1_W	(1<<3)
-#	define R300_GB_W_SELECT_1_W		0
-#	define R300_GB_W_SELECT_1		(1<<4)
-
-#define R300_GB_AA_CONFIG		0x4020
-#	define R300_AA_DISABLE			0x00
-#	define R300_AA_ENABLE			0x01
-#	define R300_AA_SUBSAMPLES_2		0
-#	define R300_AA_SUBSAMPLES_3		(1<<1)
-#	define R300_AA_SUBSAMPLES_4		(2<<1)
-#	define R300_AA_SUBSAMPLES_6		(3<<1)
+#define GB_Z_PEQ_CONFIG                          0x4028
+#	define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_4_4    (0 << 0)
+#	define GB_Z_PEQ_CONFIG_Z_PEQ_SIZE_8_8    (1 << 0)
+
+/* Specifies various polygon specific selects (fog, depth, perspective). */
+#define R300_GB_SELECT                           0x401c
+#	define R300_GB_FOG_SELECT_C0A		(0 << 0)
+#	define R300_GB_FOG_SELECT_C1A           (1 << 0)
+#	define R300_GB_FOG_SELECT_C2A           (2 << 0)
+#	define R300_GB_FOG_SELECT_C3A           (3 << 0)
+#	define R300_GB_FOG_SELECT_1_1_W         (4 << 0)
+#	define R300_GB_FOG_SELECT_Z		(5 << 0)
+#	define R300_GB_DEPTH_SELECT_Z		(0 << 3
+#	define R300_GB_DEPTH_SELECT_1_1_W	(1 << 3)
+#	define R300_GB_W_SELECT_1_W		(0 << 4)
+#	define R300_GB_W_SELECT_1		(1 << 4)
+#	define R300_GB_FOG_STUFF_DISABLE        (0 << 5)
+#	define R300_GB_FOG_STUFF_ENABLE         (1 << 5)
+#	define R300_GB_FOG_STUFF_TEX_SHIFT      6
+#	define R300_GB_FOG_STUFF_TEX_MASK       0x000003c0
+#	define R300_GB_FOG_STUFF_COMP_SHIFT     10
+#	define R300_GB_FOG_STUFF_COMP_MASK      0x00000c00
+
+/* Specifies the graphics pipeline configuration for antialiasing. */
+#define GB_AA_CONFIG   	                         0x4020
+#	define GB_AA_CONFIG_AA_DISABLE           (0 << 0)
+#	define GB_AA_CONFIG_AA_ENABLE            (1 << 0)
+#	define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2  (0 << 1)
+#	define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_3  (1 << 1)
+#	define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4  (2 << 1)
+#	define GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6  (3 << 1)
+
+/* Selects which of 4 pipes are active. */
+#define GB_PIPE_SELECT                           0x402c
+#	define GB_PIPE_SELECT_PIPE0_ID_SHIFT  0
+#	define GB_PIPE_SELECT_PIPE1_ID_SHIFT  2
+#	define GB_PIPE_SELECT_PIPE2_ID_SHIFT  4
+#	define GB_PIPE_SELECT_PIPE3_ID_SHIFT  6
+#	define GB_PIPE_SELECT_PIPE_MASK_SHIFT 8
+#	define GB_PIPE_SELECT_MAX_PIPE        12
+#	define GB_PIPE_SELECT_BAD_PIPES       14
+#	define GB_PIPE_SELECT_CONFIG_PIPES    18
+
+
+/* Specifies the sizes of the various FIFO`s in the sc/rs. */
+#define GB_FIFO_SIZE1                            0x4070
+/* High water mark for SC input fifo */
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_SHIFT 0
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_IFIFO_MASK  0x0000003f
+/* High water mark for SC input fifo (B) */
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_SHIFT 6
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_BFIFO_MASK  0x00000fc0
+/* High water mark for RS colors' fifo */
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_COL_SHIFT   12
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_COL_MASK    0x0003f000
+/* High water mark for RS textures' fifo */
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_SHIFT   18
+#	define GB_FIFO_SIZE1_SC_HIGHWATER_TEX_MASK    0x00fc0000
+
+/* This table specifies the source location and format for up to 16 texture
+ * addresses (i[0]:i[15]) and four colors (c[0]:c[3])
+ */
+#define R500_RS_IP_0					0x4074
+#define R500_RS_IP_1					0x4078
+#define R500_RS_IP_2					0x407C
+#define R500_RS_IP_3					0x4080
+#define R500_RS_IP_4					0x4084
+#define R500_RS_IP_5					0x4088
+#define R500_RS_IP_6					0x408C
+#define R500_RS_IP_7					0x4090
+#define R500_RS_IP_8					0x4094
+#define R500_RS_IP_9					0x4098
+#define R500_RS_IP_10					0x409C
+#define R500_RS_IP_11					0x40A0
+#define R500_RS_IP_12					0x40A4
+#define R500_RS_IP_13					0x40A8
+#define R500_RS_IP_14					0x40AC
+#define R500_RS_IP_15					0x40B0
+#define R500_RS_IP_PTR_K0                               62
+#define R500_RS_IP_PTR_K1                               63
+#define R500_RS_IP_TEX_PTR_S_SHIFT 			0
+#define R500_RS_IP_TEX_PTR_T_SHIFT 			6
+#define R500_RS_IP_TEX_PTR_R_SHIFT 			12
+#define R500_RS_IP_TEX_PTR_Q_SHIFT 			18
+#define R500_RS_IP_COL_PTR_SHIFT 			24
+#define R500_RS_IP_COL_FMT_SHIFT 			27
+#	define R500_RS_COL_PTR(x)		        (x << 24)
+#       define R500_RS_COL_FMT(x)                       (x << 27)
+/* gap */
+#define R500_RS_IP_OFFSET_DIS 				(0 << 31)
+#define R500_RS_IP_OFFSET_EN 				(1 << 31)
 
 /* gap */
 
 /* Zero to flush caches. */
-#define R300_TX_CNTL                        0x4100
+#define R300_TX_INVALTAGS                   0x4100
 #define R300_TX_FLUSH                       0x0
 
 /* The upper enable bits are guessed, based on fglrx reported limits. */
@@ -561,53 +761,335 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_TX_ENABLE_14                 (1 << 14)
 #       define R300_TX_ENABLE_15                 (1 << 15)
 
-/* The pointsize is given in multiples of 6. The pointsize can be
- * enormous: Clear() renders a single point that fills the entire
- * framebuffer.
+#define R500_TX_FILTER_4		    0x4110
+#	define R500_TX_WEIGHT_1_SHIFT            (0)
+#	define R500_TX_WEIGHT_0_SHIFT            (11)
+#	define R500_TX_WEIGHT_PAIR               (1<<22)
+#	define R500_TX_PHASE_SHIFT               (23)
+#	define R500_TX_DIRECTION_HORIZONTAL	 (0<<27)
+#	define R500_TX_DIRECTION_VERITCAL	 (1<<27)
+
+/* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */
+#define R300_GA_POINT_S0                              0x4200
+
+/* T Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) */
+#define R300_GA_POINT_T0                              0x4204
+
+/* S Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */
+#define R300_GA_POINT_S1                              0x4208
+
+/* T Texture Coordinate of Vertex 2 for Point texture stuffing (URC) */
+#define R300_GA_POINT_T1                              0x420c
+
+/* Specifies amount to shift integer position of vertex (screen space) before
+ * converting to float for triangle stipple.
+ */
+#define R300_GA_TRIANGLE_STIPPLE            0x4214
+#	define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_SHIFT 0
+#	define R300_GA_TRIANGLE_STIPPLE_X_SHIFT_MASK  0x0000000f
+#	define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_SHIFT 16
+#	define R300_GA_TRIANGLE_STIPPLE_Y_SHIFT_MASK  0x000f0000
+
+/* The pointsize is given in multiples of 6. The pointsize can be enormous:
+ * Clear() renders a single point that fills the entire framebuffer.
+ * 1/2 Height of point; fixed (16.0), subpixel format (1/12 or 1/16, even if in
+ * 8b precision).
  */
-#define R300_RE_POINTSIZE                   0x421C
-#       define R300_POINTSIZE_Y_SHIFT            0
-#       define R300_POINTSIZE_Y_MASK             (0xFFFF << 0) /* GUESS */
-#       define R300_POINTSIZE_X_SHIFT            16
-#       define R300_POINTSIZE_X_MASK             (0xFFFF << 16) /* GUESS */
+#define R300_GA_POINT_SIZE                   0x421C
+#       define R300_POINTSIZE_Y_SHIFT         0
+#       define R300_POINTSIZE_Y_MASK          0x0000ffff
+#       define R300_POINTSIZE_X_SHIFT         16
+#       define R300_POINTSIZE_X_MASK          0xffff0000
 #       define R300_POINTSIZE_MAX             (R300_POINTSIZE_Y_MASK / 6)
 
-/* The line width is given in multiples of 6.
+/* Blue fill color */
+#define R500_GA_FILL_R                                0x4220
+
+/* Blue fill color */
+#define R500_GA_FILL_G                                0x4224
+
+/* Blue fill color */
+#define R500_GA_FILL_B                                0x4228
+
+/* Alpha fill color */
+#define R500_GA_FILL_A                                0x422c
+
+
+/* Specifies maximum and minimum point & sprite sizes for per vertex size
+ * specification. The lower part (15:0) is MIN and (31:16) is max.
+ */
+#define R300_GA_POINT_MINMAX                0x4230
+#       define R300_GA_POINT_MINMAX_MIN_SHIFT          0
+#       define R300_GA_POINT_MINMAX_MIN_MASK           (0xFFFF << 0)
+#       define R300_GA_POINT_MINMAX_MAX_SHIFT          16
+#       define R300_GA_POINT_MINMAX_MAX_MASK           (0xFFFF << 16)
+
+/* 1/2 width of line, in subpixels (1/12 or 1/16 only, even in 8b
+ * subprecision); (16.0) fixed format.
+ *
+ * The line width is given in multiples of 6.
  * In default mode lines are classified as vertical lines.
  * HO: horizontal
  * VE: vertical or horizontal
  * HO & VE: no classification
  */
-#define R300_RE_LINE_CNT                      0x4234
-#       define R300_LINESIZE_SHIFT            0
-#       define R300_LINESIZE_MASK             (0xFFFF << 0) /* GUESS */
-#       define R300_LINESIZE_MAX             (R300_LINESIZE_MASK / 6)
+#define R300_GA_LINE_CNTL                             0x4234
+#       define R300_GA_LINE_CNTL_WIDTH_SHIFT       0
+#       define R300_GA_LINE_CNTL_WIDTH_MASK        0x0000ffff
+#	define R300_GA_LINE_CNTL_END_TYPE_HOR      (0 << 16)
+#	define R300_GA_LINE_CNTL_END_TYPE_VER      (1 << 16)
+#	define R300_GA_LINE_CNTL_END_TYPE_SQR      (2 << 16) /* horizontal or vertical depending upon slope */
+#	define R300_GA_LINE_CNTL_END_TYPE_COMP     (3 << 16) /* Computed (perpendicular to slope) */
+#	define R500_GA_LINE_CNTL_SORT_NO           (0 << 18)
+#	define R500_GA_LINE_CNTL_SORT_MINX_MINY    (1 << 18)
+/** TODO: looks wrong */
+#       define R300_LINESIZE_MAX              (R300_GA_LINE_CNTL_WIDTH_MASK / 6)
+/** TODO: looks wrong */
 #       define R300_LINE_CNT_HO               (1 << 16)
+/** TODO: looks wrong */
 #       define R300_LINE_CNT_VE               (1 << 17)
 
-/* Some sort of scale or clamp value for texcoordless textures. */
-#define R300_RE_UNK4238                       0x4238
-
-/* Something shade related */
-#define R300_RE_SHADE                         0x4274
-
-#define R300_RE_SHADE_MODEL                   0x4278
-#	define R300_RE_SHADE_MODEL_SMOOTH     0x3aaaa
-#	define R300_RE_SHADE_MODEL_FLAT       0x39595
-
-/* Dangerous */
-#define R300_RE_POLYGON_MODE                  0x4288
-#	define R300_PM_ENABLED                (1 << 0)
-#	define R300_PM_FRONT_POINT            (0 << 0)
-#	define R300_PM_BACK_POINT             (0 << 0)
-#	define R300_PM_FRONT_LINE             (1 << 4)
-#	define R300_PM_FRONT_FILL             (1 << 5)
-#	define R300_PM_BACK_LINE              (1 << 7)
-#	define R300_PM_BACK_FILL              (1 << 8)
-
-/* Fog parameters */
-#define R300_RE_FOG_SCALE                     0x4294
-#define R300_RE_FOG_START                     0x4298
+/* Line Stipple configuration information. */
+#define R300_GA_LINE_STIPPLE_CONFIG                   0x4238
+#	define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_NO     (0 << 0)
+#	define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE   (1 << 0)
+#	define R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_PACKET (2 << 0)
+#	define R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_SHIFT 2
+#	define R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK  0xfffffffc
+
+/* Used to load US instructions and constants */
+#define R500_GA_US_VECTOR_INDEX               0x4250
+#	define R500_GA_US_VECTOR_INDEX_SHIFT       0
+#	define R500_GA_US_VECTOR_INDEX_MASK        0x000000ff
+#	define R500_GA_US_VECTOR_INDEX_TYPE_INSTR  (0 << 16)
+#	define R500_GA_US_VECTOR_INDEX_TYPE_CONST  (1 << 16)
+#	define R500_GA_US_VECTOR_INDEX_CLAMP_NO    (0 << 17)
+#	define R500_GA_US_VECTOR_INDEX_CLAMP_CONST (1 << 17)
+
+/* Data register for loading US instructions and constants */
+#define R500_GA_US_VECTOR_DATA                0x4254
+
+/* Specifies color properties and mappings of textures. */
+#define R500_GA_COLOR_CONTROL_PS3                     0x4258
+#	define R500_TEX0_SHADING_PS3_SOLID       (0 << 0)
+#	define R500_TEX0_SHADING_PS3_FLAT        (1 << 0)
+#	define R500_TEX0_SHADING_PS3_GOURAUD     (2 << 0)
+#	define R500_TEX1_SHADING_PS3_SOLID       (0 << 2)
+#	define R500_TEX1_SHADING_PS3_FLAT        (1 << 2)
+#	define R500_TEX1_SHADING_PS3_GOURAUD     (2 << 2)
+#	define R500_TEX2_SHADING_PS3_SOLID       (0 << 4)
+#	define R500_TEX2_SHADING_PS3_FLAT        (1 << 4)
+#	define R500_TEX2_SHADING_PS3_GOURAUD     (2 << 4)
+#	define R500_TEX3_SHADING_PS3_SOLID       (0 << 6)
+#	define R500_TEX3_SHADING_PS3_FLAT        (1 << 6)
+#	define R500_TEX3_SHADING_PS3_GOURAUD     (2 << 6)
+#	define R500_TEX4_SHADING_PS3_SOLID       (0 << 8)
+#	define R500_TEX4_SHADING_PS3_FLAT        (1 << 8)
+#	define R500_TEX4_SHADING_PS3_GOURAUD     (2 << 8)
+#	define R500_TEX5_SHADING_PS3_SOLID       (0 << 10)
+#	define R500_TEX5_SHADING_PS3_FLAT        (1 << 10)
+#	define R500_TEX5_SHADING_PS3_GOURAUD     (2 << 10)
+#	define R500_TEX6_SHADING_PS3_SOLID       (0 << 12)
+#	define R500_TEX6_SHADING_PS3_FLAT        (1 << 12)
+#	define R500_TEX6_SHADING_PS3_GOURAUD     (2 << 12)
+#	define R500_TEX7_SHADING_PS3_SOLID       (0 << 14)
+#	define R500_TEX7_SHADING_PS3_FLAT        (1 << 14)
+#	define R500_TEX7_SHADING_PS3_GOURAUD     (2 << 14)
+#	define R500_TEX8_SHADING_PS3_SOLID       (0 << 16)
+#	define R500_TEX8_SHADING_PS3_FLAT        (1 << 16)
+#	define R500_TEX8_SHADING_PS3_GOURAUD     (2 << 16)
+#	define R500_TEX9_SHADING_PS3_SOLID       (0 << 18)
+#	define R500_TEX9_SHADING_PS3_FLAT        (1 << 18)
+#	define R500_TEX9_SHADING_PS3_GOURAUD     (2 << 18)
+#	define R500_TEX10_SHADING_PS3_SOLID      (0 << 20)
+#	define R500_TEX10_SHADING_PS3_FLAT       (1 << 20)
+#	define R500_TEX10_SHADING_PS3_GOURAUD    (2 << 20)
+#	define R500_COLOR0_TEX_OVERRIDE_NO       (0 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_0    (1 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_1    (2 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_2    (3 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_3    (4 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_4    (5 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_5    (6 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_6    (7 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_7    (8 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_8_C2 (9 << 22)
+#	define R500_COLOR0_TEX_OVERRIDE_TEX_9_C3 (10 << 22)
+#	define R500_COLOR1_TEX_OVERRIDE_NO       (0 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_0    (1 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_1    (2 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_2    (3 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_3    (4 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_4    (5 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_5    (6 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_6    (7 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_7    (8 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_8_C2 (9 << 26)
+#	define R500_COLOR1_TEX_OVERRIDE_TEX_9_C3 (10 << 26)
+
+/* Returns idle status of various G3D block, captured when GA_IDLE written or
+ * when hard or soft reset asserted.
+ */
+#define R500_GA_IDLE                                  0x425c
+#	define R500_GA_IDLE_PIPE3_Z_IDLE  (0 << 0)
+#	define R500_GA_IDLE_PIPE2_Z_IDLE  (0 << 1)
+#	define R500_GA_IDLE_PIPE3_CD_IDLE (0 << 2)
+#	define R500_GA_IDLE_PIPE2_CD_IDLE (0 << 3)
+#	define R500_GA_IDLE_PIPE3_FG_IDLE (0 << 4)
+#	define R500_GA_IDLE_PIPE2_FG_IDLE (0 << 5)
+#	define R500_GA_IDLE_PIPE3_US_IDLE (0 << 6)
+#	define R500_GA_IDLE_PIPE2_US_IDLE (0 << 7)
+#	define R500_GA_IDLE_PIPE3_SC_IDLE (0 << 8)
+#	define R500_GA_IDLE_PIPE2_SC_IDLE (0 << 9)
+#	define R500_GA_IDLE_PIPE3_RS_IDLE (0 << 10)
+#	define R500_GA_IDLE_PIPE2_RS_IDLE (0 << 11)
+#	define R500_GA_IDLE_PIPE1_Z_IDLE  (0 << 12)
+#	define R500_GA_IDLE_PIPE0_Z_IDLE  (0 << 13)
+#	define R500_GA_IDLE_PIPE1_CD_IDLE (0 << 14)
+#	define R500_GA_IDLE_PIPE0_CD_IDLE (0 << 15)
+#	define R500_GA_IDLE_PIPE1_FG_IDLE (0 << 16)
+#	define R500_GA_IDLE_PIPE0_FG_IDLE (0 << 17)
+#	define R500_GA_IDLE_PIPE1_US_IDLE (0 << 18)
+#	define R500_GA_IDLE_PIPE0_US_IDLE (0 << 19)
+#	define R500_GA_IDLE_PIPE1_SC_IDLE (0 << 20)
+#	define R500_GA_IDLE_PIPE0_SC_IDLE (0 << 21)
+#	define R500_GA_IDLE_PIPE1_RS_IDLE (0 << 22)
+#	define R500_GA_IDLE_PIPE0_RS_IDLE (0 << 23)
+#	define R500_GA_IDLE_SU_IDLE       (0 << 24)
+#	define R500_GA_IDLE_GA_IDLE       (0 << 25)
+#	define R500_GA_IDLE_GA_UNIT2_IDLE (0 << 26)
+
+/* Current value of stipple accumulator. */
+#define R300_GA_LINE_STIPPLE_VALUE            0x4260
+
+/* S Texture Coordinate Value for Vertex 0 of Line (stuff textures -- i.e. AA) */
+#define R300_GA_LINE_S0                               0x4264
+/* S Texture Coordinate Value for Vertex 1 of Lines (V2 of parallelogram -- stuff textures -- i.e. AA) */
+#define R300_GA_LINE_S1                               0x4268
+
+/* GA Input fifo high water marks */
+#define R500_GA_FIFO_CNTL                             0x4270
+#	define R500_GA_FIFO_CNTL_VERTEX_FIFO_MASK   0x00000007
+#	define R500_GA_FIFO_CNTL_VERTEX_FIFO_SHIFT  0
+#	define R500_GA_FIFO_CNTL_VERTEX_INDEX_MASK  0x00000038
+#	define R500_GA_FIFO_CNTL_VERTEX_INDEX_SHIFT 3
+#	define R500_GA_FIFO_CNTL_VERTEX_REG_MASK    0x00003fc0
+#	define R500_GA_FIFO_CNTL_VERTEX_REG_SHIFT   6
+
+/* GA enhance/tweaks */
+#define R300_GA_ENHANCE                               0x4274
+#	define R300_GA_ENHANCE_DEADLOCK_CNTL_NO_EFFECT   (0 << 0)
+#	define R300_GA_ENHANCE_DEADLOCK_CNTL_PREVENT_TCL (1 << 0) /* Prevents TCL interface from deadlocking on GA side. */
+#	define R300_GA_ENHANCE_FASTSYNC_CNTL_NO_EFFECT   (0 << 1)
+#	define R300_GA_ENHANCE_FASTSYNC_CNTL_ENABLE      (1 << 1) /* Enables high-performance register/primitive switching. */
+#	define R500_GA_ENHANCE_REG_READWRITE_NO_EFFECT   (0 << 2) /* R520+ only */
+#	define R500_GA_ENHANCE_REG_READWRITE_ENABLE      (1 << 2) /* R520+ only, Enables GA support of simultaneous register reads and writes. */
+#	define R500_GA_ENHANCE_REG_NOSTALL_NO_EFFECT     (0 << 3)
+#	define R500_GA_ENHANCE_REG_NOSTALL_ENABLE        (1 << 3) /* Enables GA support of no-stall reads for register read back. */
+
+#define R300_GA_COLOR_CONTROL                   0x4278
+#	define R300_GA_COLOR_CONTROL_RGB0_SHADING_SOLID      (0 << 0)
+#	define R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT       (1 << 0)
+#	define R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD    (2 << 0)
+#	define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_SOLID    (0 << 2)
+#	define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT     (1 << 2)
+#	define R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD  (2 << 2)
+#	define R300_GA_COLOR_CONTROL_RGB1_SHADING_SOLID      (0 << 4)
+#	define R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT       (1 << 4)
+#	define R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD    (2 << 4)
+#	define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_SOLID    (0 << 6)
+#	define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_FLAT     (1 << 6)
+#	define R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD  (2 << 6)
+#	define R300_GA_COLOR_CONTROL_RGB2_SHADING_SOLID      (0 << 8)
+#	define R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT       (1 << 8)
+#	define R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD    (2 << 8)
+#	define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_SOLID    (0 << 10)
+#	define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT     (1 << 10)
+#	define R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD  (2 << 10)
+#	define R300_GA_COLOR_CONTROL_RGB3_SHADING_SOLID      (0 << 12)
+#	define R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT       (1 << 12)
+#	define R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD    (2 << 12)
+#	define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_SOLID    (0 << 14)
+#	define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_FLAT     (1 << 14)
+#	define R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD  (2 << 14)
+#	define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST  (0 << 16)
+#	define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND (1 << 16)
+#	define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_THIRD  (2 << 16)
+#	define R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST   (3 << 16)
+
+/** TODO: might be candidate for removal */
+#	define R300_RE_SHADE_MODEL_SMOOTH     ( \
+	R300_GA_COLOR_CONTROL_RGB0_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_RGB1_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_RGB2_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_RGB3_SHADING_GOURAUD | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
+/** TODO: might be candidate for removal, the GOURAUD stuff also looks buggy to me */
+#	define R300_RE_SHADE_MODEL_FLAT     ( \
+	R300_GA_COLOR_CONTROL_RGB0_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA0_SHADING_FLAT | \
+	R300_GA_COLOR_CONTROL_RGB1_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA1_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_RGB2_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA2_SHADING_FLAT | \
+	R300_GA_COLOR_CONTROL_RGB3_SHADING_FLAT | R300_GA_COLOR_CONTROL_ALPHA3_SHADING_GOURAUD | \
+	R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST )
+
+/* Specifies red & green components of fill color -- S312 format -- Backwards comp. */
+#define R300_GA_SOLID_RG                         0x427c
+#	define GA_SOLID_RG_COLOR_GREEN_SHIFT 0
+#	define GA_SOLID_RG_COLOR_GREEN_MASK  0x0000ffff
+#	define GA_SOLID_RG_COLOR_RED_SHIFT   16
+#	define GA_SOLID_RG_COLOR_RED_MASK    0xffff0000
+/* Specifies blue & alpha components of fill color -- S312 format -- Backwards comp. */
+#define R300_GA_SOLID_BA                         0x4280
+#	define GA_SOLID_BA_COLOR_ALPHA_SHIFT 0
+#	define GA_SOLID_BA_COLOR_ALPHA_MASK  0x0000ffff
+#	define GA_SOLID_BA_COLOR_BLUE_SHIFT  16
+#	define GA_SOLID_BA_COLOR_BLUE_MASK   0xffff0000
+
+/* Polygon Mode
+ * Dangerous
+ */
+#define R300_GA_POLY_MODE                             0x4288
+#	define R300_GA_POLY_MODE_DISABLE           (0 << 0)
+#	define R300_GA_POLY_MODE_DUAL              (1 << 0) /* send 2 sets of 3 polys with specified poly type */
+/* reserved */
+#	define R300_GA_POLY_MODE_FRONT_PTYPE_POINT (0 << 4)
+#	define R300_GA_POLY_MODE_FRONT_PTYPE_LINE  (1 << 4)
+#	define R300_GA_POLY_MODE_FRONT_PTYPE_TRI   (2 << 4)
+/* reserved */
+#	define R300_GA_POLY_MODE_BACK_PTYPE_POINT  (0 << 7)
+#	define R300_GA_POLY_MODE_BACK_PTYPE_LINE   (1 << 7)
+#	define R300_GA_POLY_MODE_BACK_PTYPE_TRI    (2 << 7)
+/* reserved */
+
+/* Specifies the rouding mode for geometry & color SPFP to FP conversions. */
+#define R300_GA_ROUND_MODE                            0x428c
+#	define R300_GA_ROUND_MODE_GEOMETRY_ROUND_TRUNC   (0 << 0)
+#	define R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST (1 << 0)
+#	define R300_GA_ROUND_MODE_COLOR_ROUND_TRUNC      (0 << 2)
+#	define R300_GA_ROUND_MODE_COLOR_ROUND_NEAREST    (1 << 2)
+#	define R300_GA_ROUND_MODE_RGB_CLAMP_RGB          (0 << 4)
+#	define R300_GA_ROUND_MODE_RGB_CLAMP_FP20         (1 << 4)
+#	define R300_GA_ROUND_MODE_ALPHA_CLAMP_RGB        (0 << 5)
+#	define R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20       (1 << 5)
+#	define R500_GA_ROUND_MODE_GEOMETRY_MASK_SHIFT    6
+#	define R500_GA_ROUND_MODE_GEOMETRY_MASK_MASK     0x000003c0
+
+/* Specifies x & y offsets for vertex data after conversion to FP.
+ * Offsets are in S15 format (subpixels -- 1/12 or 1/16, even in 8b
+ * subprecision).
+ */
+#define R300_GA_OFFSET                                0x4290
+#	define R300_GA_OFFSET_X_OFFSET_SHIFT 0
+#	define R300_GA_OFFSET_X_OFFSET_MASK  0x0000ffff
+#	define R300_GA_OFFSET_Y_OFFSET_SHIFT 16
+#	define R300_GA_OFFSET_Y_OFFSET_MASK  0xffff0000
+
+/* Specifies the scale to apply to fog. */
+#define R300_GA_FOG_SCALE                     0x4294
+/* Specifies the offset to apply to fog. */
+#define R300_GA_FOG_OFFSET                    0x4298
+/* Specifies number of cycles to assert reset, and also causes RB3D soft reset to assert. */
+#define R300_GA_SOFT_RESET                    0x429c
 
 /* Not sure why there are duplicate of factor and constant values.
  * My best guess so far is that there are seperate zbiases for test and write.
@@ -615,11 +1097,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Some of the tests indicate that fgl has a fallback implementation of zbias
  * via pixel shaders.
  */
-#define R300_RE_ZBIAS_CNTL                    0x42A0 /* GUESS */
-#define R300_RE_ZBIAS_T_FACTOR                0x42A4
-#define R300_RE_ZBIAS_T_CONSTANT              0x42A8
-#define R300_RE_ZBIAS_W_FACTOR                0x42AC
-#define R300_RE_ZBIAS_W_CONSTANT              0x42B0
+#define R300_SU_TEX_WRAP                      0x42A0
+#define R300_SU_POLY_OFFSET_FRONT_SCALE       0x42A4
+#define R300_SU_POLY_OFFSET_FRONT_OFFSET      0x42A8
+#define R300_SU_POLY_OFFSET_BACK_SCALE        0x42AC
+#define R300_SU_POLY_OFFSET_BACK_OFFSET       0x42B0
 
 /* This register needs to be set to (1<<1) for RV350 to correctly
  * perform depth test (see --vb-triangles in r300_demo)
@@ -630,31 +1112,44 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *  One to enable depth test and one for depth write.
  * Yet this doesnt explain why depth writes work ...
  */
-#define R300_RE_OCCLUSION_CNTL		    0x42B4
-#	define R300_OCCLUSION_ON		(1<<1)
+#define R300_SU_POLY_OFFSET_ENABLE	       0x42B4
+#	define R300_FRONT_ENABLE	       (1 << 0)
+#	define R300_BACK_ENABLE 	       (1 << 1)
+#	define R300_PARA_ENABLE 	       (1 << 2)
 
-#define R300_RE_CULL_CNTL                   0x42B8
+#define R300_SU_CULL_MODE                      0x42B8
 #       define R300_CULL_FRONT                   (1 << 0)
 #       define R300_CULL_BACK                    (1 << 1)
 #       define R300_FRONT_FACE_CCW               (0 << 2)
 #       define R300_FRONT_FACE_CW                (1 << 2)
 
+/* SU Depth Scale value */
+#define R300_SU_DEPTH_SCALE                 0x42c0
+/* SU Depth Offset value */
+#define R300_SU_DEPTH_OFFSET                0x42c4
+
 
 /* BEGIN: Rasterization / Interpolators - many guesses */
 
-/* 0_UNKNOWN_18 has always been set except for clear operations.
+/*
  * TC_CNT is the number of incoming texture coordinate sets (i.e. it depends
  * on the vertex program, *not* the fragment program)
  */
-#define R300_RS_CNTL_0                      0x4300
-#       define R300_RS_CNTL_TC_CNT_SHIFT         2
-#       define R300_RS_CNTL_TC_CNT_MASK          (7 << 2)
-	/* number of color interpolators used */
-#	define R300_RS_CNTL_CI_CNT_SHIFT         7
-#       define R300_RS_CNTL_0_UNKNOWN_18         (1 << 18)
-	/* Guess: RS_CNTL_1 holds the index of the highest used RS_ROUTE_n
-	   register. */
-#define R300_RS_CNTL_1                      0x4304
+#define R300_RS_COUNT                      0x4300
+#       define R300_IT_COUNT_SHIFT               0
+#       define R300_IT_COUNT_MASK                0x0000007f
+#       define R300_IC_COUNT_SHIFT               7
+#       define R300_IC_COUNT_MASK                0x00000780
+#       define R300_W_ADDR_SHIFT                 12
+#       define R300_W_ADDR_MASK                  0x0003f000
+#       define R300_HIRES_DIS                    (0 << 18)
+#       define R300_HIRES_EN                     (1 << 18)
+
+#define R300_RS_INST_COUNT                       0x4304
+#       define R300_RS_INST_COUNT_SHIFT          0
+#       define R300_RS_INST_COUNT_MASK           0x0000000f
+#       define R300_RS_TX_OFFSET_SHIFT           5
+#	define R300_RS_TX_OFFSET_MASK            0x000000e0
 
 /* gap */
 
@@ -671,63 +1166,108 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Note: The _UNKNOWN constants are always set in their respective
  * register. I don't know if this is necessary.
  */
-#define R300_RS_INTERP_0                    0x4310
-#define R300_RS_INTERP_1                    0x4314
-#       define R300_RS_INTERP_1_UNKNOWN          0x40
-#define R300_RS_INTERP_2                    0x4318
-#       define R300_RS_INTERP_2_UNKNOWN          0x80
-#define R300_RS_INTERP_3                    0x431C
-#       define R300_RS_INTERP_3_UNKNOWN          0xC0
-#define R300_RS_INTERP_4                    0x4320
-#define R300_RS_INTERP_5                    0x4324
-#define R300_RS_INTERP_6                    0x4328
-#define R300_RS_INTERP_7                    0x432C
-#       define R300_RS_INTERP_SRC_SHIFT          2
-#       define R300_RS_INTERP_SRC_MASK           (7 << 2)
-#       define R300_RS_INTERP_USED               0x00D10000
+#define R300_RS_IP_0				        0x4310
+#define R300_RS_IP_1				        0x4314
+#define R300_RS_IP_2				        0x4318
+#define R300_RS_IP_3				        0x431C
+#       define R300_RS_INTERP_SRC_SHIFT          2 /* TODO: check for removal */
+#       define R300_RS_INTERP_SRC_MASK           (7 << 2) /* TODO: check for removal */
+#	define R300_RS_TEX_PTR(x)		        (x << 0)
+#	define R300_RS_COL_PTR(x)		        (x << 6)
+#	define R300_RS_COL_FMT(x)		        (x << 9)
+#	define R300_RS_COL_FMT_RGBA		        0
+#	define R300_RS_COL_FMT_RGB0		        1
+#	define R300_RS_COL_FMT_RGB1		        2
+#	define R300_RS_COL_FMT_000A		        4
+#	define R300_RS_COL_FMT_0000		        5
+#	define R300_RS_COL_FMT_0001		        6
+#	define R300_RS_COL_FMT_111A		        8
+#	define R300_RS_COL_FMT_1110		        9
+#	define R300_RS_COL_FMT_1111		        10
+#	define R300_RS_SEL_S(x)		                (x << 13)
+#	define R300_RS_SEL_T(x)		                (x << 16)
+#	define R300_RS_SEL_R(x)		                (x << 19)
+#	define R300_RS_SEL_Q(x)		                (x << 22)
+#	define R300_RS_SEL_C0		                0
+#	define R300_RS_SEL_C1		                1
+#	define R300_RS_SEL_C2		                2
+#	define R300_RS_SEL_C3		                3
+#	define R300_RS_SEL_K0		                4
+#	define R300_RS_SEL_K1		                5
+
+
+/*  */
+#define R500_RS_INST_0					0x4320
+#define R500_RS_INST_1					0x4324
+#define R500_RS_INST_2					0x4328
+#define R500_RS_INST_3					0x432c
+#define R500_RS_INST_4					0x4330
+#define R500_RS_INST_5					0x4334
+#define R500_RS_INST_6					0x4338
+#define R500_RS_INST_7					0x433c
+#define R500_RS_INST_8					0x4340
+#define R500_RS_INST_9					0x4344
+#define R500_RS_INST_10					0x4348
+#define R500_RS_INST_11					0x434c
+#define R500_RS_INST_12					0x4350
+#define R500_RS_INST_13					0x4354
+#define R500_RS_INST_14					0x4358
+#define R500_RS_INST_15					0x435c
+#define R500_RS_INST_TEX_ID_SHIFT			0
+#define R500_RS_INST_TEX_CN_WRITE			(1 << 4)
+#define R500_RS_INST_TEX_ADDR_SHIFT			5
+#define R500_RS_INST_COL_ID_SHIFT			12
+#define R500_RS_INST_COL_CN_NO_WRITE			(0 << 16)
+#define R500_RS_INST_COL_CN_WRITE			(1 << 16)
+#define R500_RS_INST_COL_CN_WRITE_FBUFFER		(2 << 16)
+#define R500_RS_INST_COL_CN_WRITE_BACKFACE		(3 << 16)
+#define R500_RS_INST_COL_ADDR_SHIFT			18
+#define R500_RS_INST_TEX_ADJ				(1 << 25)
+#define R500_RS_INST_W_CN				(1 << 26)
 
 /* These DWORDs control how vertex data is routed into fragment program
  * registers, after interpolators.
  */
-#define R300_RS_ROUTE_0                     0x4330
-#define R300_RS_ROUTE_1                     0x4334
-#define R300_RS_ROUTE_2                     0x4338
-#define R300_RS_ROUTE_3                     0x433C /* GUESS */
-#define R300_RS_ROUTE_4                     0x4340 /* GUESS */
-#define R300_RS_ROUTE_5                     0x4344 /* GUESS */
-#define R300_RS_ROUTE_6                     0x4348 /* GUESS */
-#define R300_RS_ROUTE_7                     0x434C /* GUESS */
-#       define R300_RS_ROUTE_SOURCE_INTERP_0     0
-#       define R300_RS_ROUTE_SOURCE_INTERP_1     1
-#       define R300_RS_ROUTE_SOURCE_INTERP_2     2
-#       define R300_RS_ROUTE_SOURCE_INTERP_3     3
-#       define R300_RS_ROUTE_SOURCE_INTERP_4     4
-#       define R300_RS_ROUTE_SOURCE_INTERP_5     5 /* GUESS */
-#       define R300_RS_ROUTE_SOURCE_INTERP_6     6 /* GUESS */
-#       define R300_RS_ROUTE_SOURCE_INTERP_7     7 /* GUESS */
-#       define R300_RS_ROUTE_ENABLE              (1 << 3) /* GUESS */
-#       define R300_RS_ROUTE_DEST_SHIFT          6
-#       define R300_RS_ROUTE_DEST_MASK           (31 << 6) /* GUESS */
-
-/* Special handling for color: When the fragment program uses color,
- * the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the
- * color register index.
- *
- * Apperently you may set the R300_RS_ROUTE_0_COLOR bit, but not provide any
- * R300_RS_ROUTE_0_COLOR_DEST value; this setup is used for clearing the state.
- * See r300_ioctl.c:r300EmitClearState. I'm not sure if this setup is strictly
- * correct or not. - Oliver.
- */
-#       define R300_RS_ROUTE_0_COLOR             (1 << 14)
-#       define R300_RS_ROUTE_0_COLOR_DEST_SHIFT  17
-#       define R300_RS_ROUTE_0_COLOR_DEST_MASK   (31 << 17) /* GUESS */
-/* As above, but for secondary color */
-#		define R300_RS_ROUTE_1_COLOR1            (1 << 14)
-#		define R300_RS_ROUTE_1_COLOR1_DEST_SHIFT 17
-#		define R300_RS_ROUTE_1_COLOR1_DEST_MASK  (31 << 17)
-#		define R300_RS_ROUTE_1_UNKNOWN11         (1 << 11)
+#define R300_RS_INST_0                     0x4330
+#define R300_RS_INST_1                     0x4334
+#define R300_RS_INST_2                     0x4338
+#define R300_RS_INST_3                     0x433C /* GUESS */
+#define R300_RS_INST_4                     0x4340 /* GUESS */
+#define R300_RS_INST_5                     0x4344 /* GUESS */
+#define R300_RS_INST_6                     0x4348 /* GUESS */
+#define R300_RS_INST_7                     0x434C /* GUESS */
+#	define R300_RS_INST_TEX_ID(x)  		((x) << 0)
+#	define R300_RS_INST_TEX_CN_WRITE 	(1 << 3)
+#	define R300_RS_INST_TEX_ADDR_SHIFT 	6
+#	define R300_RS_INST_COL_ID(x)		((x) << 11)
+#	define R300_RS_INST_COL_CN_WRITE	(1 << 14)
+#	define R300_RS_INST_COL_ADDR_SHIFT	17
+#	define R300_RS_INST_TEX_ADJ		(1 << 22)
+#	define R300_RS_COL_BIAS_UNUSED_SHIFT    23
+
 /* END: Rasterization / Interpolators - many guesses */
 
+/* Hierarchical Z Enable */
+#define R300_SC_HYPERZ                   0x43a4
+#	define R300_SC_HYPERZ_DISABLE     (0 << 0)
+#	define R300_SC_HYPERZ_ENABLE      (1 << 0)
+#	define R300_SC_HYPERZ_MIN         (0 << 1)
+#	define R300_SC_HYPERZ_MAX         (1 << 1)
+#	define R300_SC_HYPERZ_ADJ_256     (0 << 2)
+#	define R300_SC_HYPERZ_ADJ_128     (1 << 2)
+#	define R300_SC_HYPERZ_ADJ_64      (2 << 2)
+#	define R300_SC_HYPERZ_ADJ_32      (3 << 2)
+#	define R300_SC_HYPERZ_ADJ_16      (4 << 2)
+#	define R300_SC_HYPERZ_ADJ_8       (5 << 2)
+#	define R300_SC_HYPERZ_ADJ_4       (6 << 2)
+#	define R300_SC_HYPERZ_ADJ_2       (7 << 2)
+#	define R300_SC_HYPERZ_HZ_Z0MIN_NO (0 << 5)
+#	define R300_SC_HYPERZ_HZ_Z0MIN    (1 << 5)
+#	define R300_SC_HYPERZ_HZ_Z0MAX_NO (0 << 6)
+#	define R300_SC_HYPERZ_HZ_Z0MAX    (1 << 6)
+
+#define R300_SC_EDGERULE                 0x43a8
+
 /* BEGIN: Scissors and cliprects */
 
 /* There are four clipping rectangles. Their corner coordinates are inclusive.
@@ -744,21 +1284,21 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * For some reason, the top-left corner of the framebuffer is at (1440, 1440)
  * for the purpose of clipping and scissors.
  */
-#define R300_RE_CLIPRECT_TL_0               0x43B0
-#define R300_RE_CLIPRECT_BR_0               0x43B4
-#define R300_RE_CLIPRECT_TL_1               0x43B8
-#define R300_RE_CLIPRECT_BR_1               0x43BC
-#define R300_RE_CLIPRECT_TL_2               0x43C0
-#define R300_RE_CLIPRECT_BR_2               0x43C4
-#define R300_RE_CLIPRECT_TL_3               0x43C8
-#define R300_RE_CLIPRECT_BR_3               0x43CC
+#define R300_SC_CLIPRECT_TL_0               0x43B0
+#define R300_SC_CLIPRECT_BR_0               0x43B4
+#define R300_SC_CLIPRECT_TL_1               0x43B8
+#define R300_SC_CLIPRECT_BR_1               0x43BC
+#define R300_SC_CLIPRECT_TL_2               0x43C0
+#define R300_SC_CLIPRECT_BR_2               0x43C4
+#define R300_SC_CLIPRECT_TL_3               0x43C8
+#define R300_SC_CLIPRECT_BR_3               0x43CC
 #       define R300_CLIPRECT_OFFSET              1440
 #       define R300_CLIPRECT_MASK                0x1FFF
 #       define R300_CLIPRECT_X_SHIFT             0
 #       define R300_CLIPRECT_X_MASK              (0x1FFF << 0)
 #       define R300_CLIPRECT_Y_SHIFT             13
 #       define R300_CLIPRECT_Y_MASK              (0x1FFF << 13)
-#define R300_RE_CLIPRECT_CNTL               0x43D0
+#define R300_SC_CLIP_RULE                   0x43D0
 #       define R300_CLIP_OUT                     (1 << 0)
 #       define R300_CLIP_0                       (1 << 1)
 #       define R300_CLIP_1                       (1 << 2)
@@ -778,13 +1318,17 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* gap */
 
-#define R300_RE_SCISSORS_TL                 0x43E0
-#define R300_RE_SCISSORS_BR                 0x43E4
+#define R300_SC_SCISSORS_TL                 0x43E0
+#define R300_SC_SCISSORS_BR                 0x43E4
 #       define R300_SCISSORS_OFFSET              1440
 #       define R300_SCISSORS_X_SHIFT             0
 #       define R300_SCISSORS_X_MASK              (0x1FFF << 0)
 #       define R300_SCISSORS_Y_SHIFT             13
 #       define R300_SCISSORS_Y_MASK              (0x1FFF << 13)
+
+/* Screen door sample mask */
+#define R300_SC_SCREENDOOR                 0x43e8
+
 /* END: Scissors and cliprects */
 
 /* BEGIN: Texture specification */
@@ -794,43 +1338,55 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * unit. This means that e.g. the offset for texture image unit N is found in
  * register TX_OFFSET_0 + (4*N)
  */
-#define R300_TX_FILTER_0                    0x4400
+#define R300_TX_FILTER0_0                        0x4400
+#define R300_TX_FILTER0_1                        0x4404
+#define R300_TX_FILTER0_2                        0x4408
+#define R300_TX_FILTER0_3                        0x440c
+#define R300_TX_FILTER0_4                        0x4410
+#define R300_TX_FILTER0_5                        0x4414
+#define R300_TX_FILTER0_6                        0x4418
+#define R300_TX_FILTER0_7                        0x441c
+#define R300_TX_FILTER0_8                        0x4420
+#define R300_TX_FILTER0_9                        0x4424
+#define R300_TX_FILTER0_10                       0x4428
+#define R300_TX_FILTER0_11                       0x442c
+#define R300_TX_FILTER0_12                       0x4430
+#define R300_TX_FILTER0_13                       0x4434
+#define R300_TX_FILTER0_14                       0x4438
+#define R300_TX_FILTER0_15                       0x443c
 #       define R300_TX_REPEAT                    0
 #       define R300_TX_MIRRORED                  1
-#       define R300_TX_CLAMP                     4
 #       define R300_TX_CLAMP_TO_EDGE             2
+#	define R300_TX_MIRROR_ONCE_TO_EDGE       3
+#       define R300_TX_CLAMP                     4
+#	define R300_TX_MIRROR_ONCE               5
 #       define R300_TX_CLAMP_TO_BORDER           6
+#	define R300_TX_MIRROR_ONCE_TO_BORDER     7
 #       define R300_TX_WRAP_S_SHIFT              0
 #       define R300_TX_WRAP_S_MASK               (7 << 0)
 #       define R300_TX_WRAP_T_SHIFT              3
 #       define R300_TX_WRAP_T_MASK               (7 << 3)
-#       define R300_TX_WRAP_Q_SHIFT              6
-#       define R300_TX_WRAP_Q_MASK               (7 << 6)
+#       define R300_TX_WRAP_R_SHIFT              6
+#       define R300_TX_WRAP_R_MASK               (7 << 6)
+#	define R300_TX_MAG_FILTER_4              (0 << 9)
 #       define R300_TX_MAG_FILTER_NEAREST        (1 << 9)
 #       define R300_TX_MAG_FILTER_LINEAR         (2 << 9)
+#       define R300_TX_MAG_FILTER_ANISO          (3 << 9)
 #       define R300_TX_MAG_FILTER_MASK           (3 << 9)
 #       define R300_TX_MIN_FILTER_NEAREST        (1 << 11)
 #       define R300_TX_MIN_FILTER_LINEAR         (2 << 11)
-#	define R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST       (5  <<  11)
-#	define R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR        (9  <<  11)
-#	define R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST        (6  <<  11)
-#	define R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR         (10 <<  11)
-
-/* NOTE: NEAREST doesnt seem to exist.
- * Im not seting MAG_FILTER_MASK and (3 << 11) on for all
- * anisotropy modes because that would void selected mag filter
- */
-#	define R300_TX_MIN_FILTER_ANISO_NEAREST             (0 << 13)
-#	define R300_TX_MIN_FILTER_ANISO_LINEAR              (0 << 13)
-#	define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (1 << 13)
-#	define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR  (2 << 13)
-#       define R300_TX_MIN_FILTER_MASK   ( (15 << 11) | (3 << 13) )
-#	define R300_TX_MAX_ANISO_1_TO_1  (0 << 21)
-#	define R300_TX_MAX_ANISO_2_TO_1  (2 << 21)
-#	define R300_TX_MAX_ANISO_4_TO_1  (4 << 21)
-#	define R300_TX_MAX_ANISO_8_TO_1  (6 << 21)
-#	define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
-#	define R300_TX_MAX_ANISO_MASK    (14 << 21)
+#	define R300_TX_MIN_FILTER_ANISO          (3 << 11)
+#	define R300_TX_MIN_FILTER_MASK           (3 << 11)
+#	define R300_TX_MIN_FILTER_MIP_NONE       (0 << 13)
+#	define R300_TX_MIN_FILTER_MIP_NEAREST    (1 << 13)
+#	define R300_TX_MIN_FILTER_MIP_LINEAR     (2 << 13)
+#	define R300_TX_MIN_FILTER_MIP_MASK       (3 << 13)
+#	define R300_TX_MAX_ANISO_1_TO_1          (0 << 21)
+#	define R300_TX_MAX_ANISO_2_TO_1          (1 << 21)
+#	define R300_TX_MAX_ANISO_4_TO_1          (2 << 21)
+#	define R300_TX_MAX_ANISO_8_TO_1          (3 << 21)
+#	define R300_TX_MAX_ANISO_16_TO_1         (4 << 21)
+#	define R300_TX_MAX_ANISO_MASK            (7 << 21)
 
 #define R300_TX_FILTER1_0                      0x4440
 #	define R300_CHROMA_KEY_MODE_DISABLE    0
@@ -838,7 +1394,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_CHROMA_KEY_BLEND           2
 #	define R300_MC_ROUND_NORMAL            (0<<2)
 #	define R300_MC_ROUND_MPEG4             (1<<2)
-#	define R300_LOD_BIAS_MASK	    0x1fff
+#	define R300_LOD_BIAS_SHIFT             3
+#	define R300_LOD_BIAS_MASK	       0x1ff8
 #	define R300_EDGE_ANISO_EDGE_DIAG       (0<<13)
 #	define R300_EDGE_ANISO_EDGE_ONLY       (1<<13)
 #	define R300_MC_COORD_TRUNCATE_DISABLE  (0<<14)
@@ -849,12 +1406,16 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_TX_TRI_PERF_3_8            (3<<15)
 #	define R300_ANISO_THRESHOLD_MASK       (7<<17)
 
+#	define R500_MACRO_SWITCH               (1<<22)
+#	define R500_BORDER_FIX                 (1<<31)
+
 #define R300_TX_SIZE_0                      0x4480
 #       define R300_TX_WIDTHMASK_SHIFT           0
 #       define R300_TX_WIDTHMASK_MASK            (2047 << 0)
 #       define R300_TX_HEIGHTMASK_SHIFT          11
 #       define R300_TX_HEIGHTMASK_MASK           (2047 << 11)
-#       define R300_TX_UNK23                     (1 << 23)
+#	define R300_TX_DEPTHMASK_SHIFT		 22
+#	define R300_TX_DEPTHMASK_MASK		 (0xf << 22)
 #       define R300_TX_MAX_MIP_LEVEL_SHIFT       26
 #       define R300_TX_MAX_MIP_LEVEL_MASK        (0xf << 26)
 #       define R300_TX_SIZE_PROJECTED            (1<<30)
@@ -865,7 +1426,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 	   They are given meanings as R, G, B and Alpha by the swizzle
 	   specification */
 #	define R300_TX_FORMAT_X8		    0x0
+#	define R500_TX_FORMAT_X1		    0x0 // bit set in format 2
 #	define R300_TX_FORMAT_X16		    0x1
+#	define R500_TX_FORMAT_X1_REV		    0x0 // bit set in format 2
 #	define R300_TX_FORMAT_Y4X4		    0x2
 #	define R300_TX_FORMAT_Y8X8		    0x3
 #	define R300_TX_FORMAT_Y16X16		    0x4
@@ -886,9 +1449,17 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_TX_FORMAT_A8R8G8B8	    	    0x13     /* no swizzle */
 #	define R300_TX_FORMAT_B8G8_B8G8	    	    0x14     /* no swizzle */
 #	define R300_TX_FORMAT_G8R8_G8B8	    	    0x15     /* no swizzle */
+
+	/* These two values are wrong, but they're the only values that
+	 * produce any even vaguely correct results.  Can r300 only do 16-bit
+	 * depth textures?
+	 */
+#	define R300_TX_FORMAT_X24_Y8	    	    0x1e
+#	define R300_TX_FORMAT_X32	    	    0x1e
+
 	/* 0x16 - some 16 bit green format.. ?? */
-#	define R300_TX_FORMAT_UNK25		   (1 << 25) /* no swizzle */
-#	define R300_TX_FORMAT_CUBIC_MAP		   (1 << 26)
+#	define R300_TX_FORMAT_3D		   (1 << 25)
+#	define R300_TX_FORMAT_CUBIC_MAP		   (2 << 25)
 
 	/* gap */
 	/* Floating point formats */
@@ -941,7 +1512,18 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #	define R300_TX_FORMAT_YUV_MODE		0x00800000
 
-#define R300_TX_PITCH_0			    0x4500 /* obvious missing in gap */
+#define R300_TX_FORMAT2_0		    0x4500 /* obvious missing in gap */
+#       define R300_TX_PITCHMASK_SHIFT           0
+#       define R300_TX_PITCHMASK_MASK            (2047 << 0)
+#	define R500_TXFORMAT_MSB		 (1 << 14)
+#	define R500_TXWIDTH_BIT11	         (1 << 15)
+#	define R500_TXHEIGHT_BIT11	         (1 << 16)
+#	define R500_POW2FIX2FLT			 (1 << 17)
+#	define R500_SEL_FILTER4_TC0		 (0 << 18)
+#	define R500_SEL_FILTER4_TC1		 (1 << 18)
+#	define R500_SEL_FILTER4_TC2		 (2 << 18)
+#	define R500_SEL_FILTER4_TC3		 (3 << 18)
+
 #define R300_TX_OFFSET_0                    0x4540
 	/* BEGIN: Guess from R200 */
 #       define R300_TXO_ENDIAN_NO_SWAP           (0 << 0)
@@ -949,15 +1531,50 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_TXO_ENDIAN_WORD_SWAP         (2 << 0)
 #       define R300_TXO_ENDIAN_HALFDW_SWAP       (3 << 0)
 #       define R300_TXO_MACRO_TILE               (1 << 2)
+#       define R300_TXO_MICRO_TILE_LINEAR        (0 << 3)
 #       define R300_TXO_MICRO_TILE               (1 << 3)
+#       define R300_TXO_MICRO_TILE_SQUARE        (2 << 3)
 #       define R300_TXO_OFFSET_MASK              0xffffffe0
 #       define R300_TXO_OFFSET_SHIFT             5
 	/* END: Guess from R200 */
 
 /* 32 bit chroma key */
 #define R300_TX_CHROMA_KEY_0                      0x4580
+#define R300_TX_CHROMA_KEY_1                      0x4584
+#define R300_TX_CHROMA_KEY_2                      0x4588
+#define R300_TX_CHROMA_KEY_3                      0x458c
+#define R300_TX_CHROMA_KEY_4                      0x4590
+#define R300_TX_CHROMA_KEY_5                      0x4594
+#define R300_TX_CHROMA_KEY_6                      0x4598
+#define R300_TX_CHROMA_KEY_7                      0x459c
+#define R300_TX_CHROMA_KEY_8                      0x45a0
+#define R300_TX_CHROMA_KEY_9                      0x45a4
+#define R300_TX_CHROMA_KEY_10                     0x45a8
+#define R300_TX_CHROMA_KEY_11                     0x45ac
+#define R300_TX_CHROMA_KEY_12                     0x45b0
+#define R300_TX_CHROMA_KEY_13                     0x45b4
+#define R300_TX_CHROMA_KEY_14                     0x45b8
+#define R300_TX_CHROMA_KEY_15                     0x45bc
 /* ff00ff00 == { 0, 1.0, 0, 1.0 } */
-#define R300_TX_BORDER_COLOR_0              0x45C0
+
+/* Border Color */
+#define R300_TX_BORDER_COLOR_0              0x45c0
+#define R300_TX_BORDER_COLOR_1              0x45c4
+#define R300_TX_BORDER_COLOR_2              0x45c8
+#define R300_TX_BORDER_COLOR_3              0x45cc
+#define R300_TX_BORDER_COLOR_4              0x45d0
+#define R300_TX_BORDER_COLOR_5              0x45d4
+#define R300_TX_BORDER_COLOR_6              0x45d8
+#define R300_TX_BORDER_COLOR_7              0x45dc
+#define R300_TX_BORDER_COLOR_8              0x45e0
+#define R300_TX_BORDER_COLOR_9              0x45e4
+#define R300_TX_BORDER_COLOR_10             0x45e8
+#define R300_TX_BORDER_COLOR_11             0x45ec
+#define R300_TX_BORDER_COLOR_12             0x45f0
+#define R300_TX_BORDER_COLOR_13             0x45f4
+#define R300_TX_BORDER_COLOR_14             0x45f8
+#define R300_TX_BORDER_COLOR_15             0x45fc
+
 
 /* END: Texture specification */
 
@@ -980,23 +1597,23 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * offsets into the respective instruction streams, while *_END points to the
  * last instruction relative to this offset.
  */
-#define R300_PFS_CNTL_0                     0x4600
+#define R300_US_CONFIG                      0x4600
 #       define R300_PFS_CNTL_LAST_NODES_SHIFT    0
 #       define R300_PFS_CNTL_LAST_NODES_MASK     (3 << 0)
 #       define R300_PFS_CNTL_FIRST_NODE_HAS_TEX  (1 << 3)
-#define R300_PFS_CNTL_1                     0x4604
+#define R300_US_PIXSIZE                     0x4604
 /* There is an unshifted value here which has so far always been equal to the
  * index of the highest used temporary register.
  */
-#define R300_PFS_CNTL_2                     0x4608
+#define R300_US_CODE_OFFSET                 0x4608
 #       define R300_PFS_CNTL_ALU_OFFSET_SHIFT    0
 #       define R300_PFS_CNTL_ALU_OFFSET_MASK     (63 << 0)
 #       define R300_PFS_CNTL_ALU_END_SHIFT       6
 #       define R300_PFS_CNTL_ALU_END_MASK        (63 << 6)
-#       define R300_PFS_CNTL_TEX_OFFSET_SHIFT    12
-#       define R300_PFS_CNTL_TEX_OFFSET_MASK     (31 << 12) /* GUESS */
+#       define R300_PFS_CNTL_TEX_OFFSET_SHIFT    13
+#       define R300_PFS_CNTL_TEX_OFFSET_MASK     (31 << 13)
 #       define R300_PFS_CNTL_TEX_END_SHIFT       18
-#       define R300_PFS_CNTL_TEX_END_MASK        (31 << 18) /* GUESS */
+#       define R300_PFS_CNTL_TEX_END_MASK        (31 << 18)
 
 /* gap */
 
@@ -1007,45 +1624,65 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * Offsets are relative to the master offset from PFS_CNTL_2.
  */
-#define R300_PFS_NODE_0                     0x4610
-#define R300_PFS_NODE_1                     0x4614
-#define R300_PFS_NODE_2                     0x4618
-#define R300_PFS_NODE_3                     0x461C
-#       define R300_PFS_NODE_ALU_OFFSET_SHIFT    0
-#       define R300_PFS_NODE_ALU_OFFSET_MASK     (63 << 0)
-#       define R300_PFS_NODE_ALU_END_SHIFT       6
-#       define R300_PFS_NODE_ALU_END_MASK        (63 << 6)
-#       define R300_PFS_NODE_TEX_OFFSET_SHIFT    12
-#       define R300_PFS_NODE_TEX_OFFSET_MASK     (31 << 12)
-#       define R300_PFS_NODE_TEX_END_SHIFT       17
-#       define R300_PFS_NODE_TEX_END_MASK        (31 << 17)
-#		define R300_PFS_NODE_OUTPUT_COLOR        (1 << 22)
-#		define R300_PFS_NODE_OUTPUT_DEPTH        (1 << 23)
+#define R300_US_CODE_ADDR_0                 0x4610
+#define R300_US_CODE_ADDR_1                 0x4614
+#define R300_US_CODE_ADDR_2                 0x4618
+#define R300_US_CODE_ADDR_3                 0x461C
+#       define R300_ALU_START_SHIFT         0
+#       define R300_ALU_START_MASK          (63 << 0)
+#       define R300_ALU_SIZE_SHIFT          6
+#       define R300_ALU_SIZE_MASK           (63 << 6)
+#       define R300_TEX_START_SHIFT         12
+#       define R300_TEX_START_MASK          (31 << 12)
+#       define R300_TEX_SIZE_SHIFT          17
+#       define R300_TEX_SIZE_MASK           (31 << 17)
+#	define R300_RGBA_OUT                (1 << 22)
+#	define R300_W_OUT                   (1 << 23)
 
 /* TEX
  * As far as I can tell, texture instructions cannot write into output
  * registers directly. A subsequent ALU instruction is always necessary,
  * even if it's just MAD o0, r0, 1, 0
  */
-#define R300_PFS_TEXI_0                     0x4620
-#	define R300_FPITX_SRC_SHIFT              0
-#	define R300_FPITX_SRC_MASK               (31 << 0)
-	/* GUESS */
-#	define R300_FPITX_SRC_CONST              (1 << 5)
-#	define R300_FPITX_DST_SHIFT              6
-#	define R300_FPITX_DST_MASK               (31 << 6)
-#	define R300_FPITX_IMAGE_SHIFT            11
-	/* GUESS based on layout and native limits */
-#       define R300_FPITX_IMAGE_MASK             (15 << 11)
-/* Unsure if these are opcodes, or some kind of bitfield, but this is how
- * they were set when I checked
- */
-#	define R300_FPITX_OPCODE_SHIFT		15
-#		define R300_FPITX_OP_TEX	1
-#		define R300_FPITX_OP_KIL	2
-#		define R300_FPITX_OP_TXP	3
-#		define R300_FPITX_OP_TXB	4
-#	define R300_FPITX_OPCODE_MASK           (7 << 15)
+#define R300_US_TEX_INST_0                  0x4620
+#	define R300_SRC_ADDR_SHIFT          0
+#	define R300_SRC_ADDR_MASK           (31 << 0)
+#	define R300_DST_ADDR_SHIFT          6
+#	define R300_DST_ADDR_MASK           (31 << 6)
+#	define R300_TEX_ID_SHIFT            11
+#       define R300_TEX_ID_MASK             (15 << 11)
+#	define R300_TEX_INST_SHIFT		15
+#		define R300_TEX_OP_NOP	        0
+#		define R300_TEX_OP_LD	        1
+#		define R300_TEX_OP_KIL	        2
+#		define R300_TEX_OP_TXP	        3
+#		define R300_TEX_OP_TXB	        4
+#	define R300_TEX_INST_MASK               (7 << 15)
+
+/* Output format from the unfied shader */
+#define R300_US_OUT_FMT                     0x46A4
+#	define R300_US_OUT_FMT_C4_8         (0 << 0)
+#	define R300_US_OUT_FMT_C4_10        (1 << 0)
+#	define R300_US_OUT_FMT_C4_10_GAMMA  (2 << 0)
+#	define R300_US_OUT_FMT_C_16         (3 << 0)
+#	define R300_US_OUT_FMT_C2_16        (4 << 0)
+#	define R300_US_OUT_FMT_C4_16        (5 << 0)
+#	define R300_US_OUT_FMT_C_16_MPEG    (6 << 0)
+#	define R300_US_OUT_FMT_C2_16_MPEG   (7 << 0)
+#	define R300_US_OUT_FMT_C2_4         (8 << 0)
+#	define R300_US_OUT_FMT_C_3_3_2      (9 << 0)
+#	define R300_US_OUT_FMT_C_6_5_6      (10 << 0)
+#	define R300_US_OUT_FMT_C_11_11_10   (11 << 0)
+#	define R300_US_OUT_FMT_C_10_11_11   (12 << 0)
+#	define R300_US_OUT_FMT_C_2_10_10_10 (13 << 0)
+/* reserved */
+#	define R300_US_OUT_FMT_UNUSED       (15 << 0)
+#	define R300_US_OUT_FMT_C_16_FP      (16 << 0)
+#	define R300_US_OUT_FMT_C2_16_FP     (17 << 0)
+#	define R300_US_OUT_FMT_C4_16_FP     (18 << 0)
+#	define R300_US_OUT_FMT_C_32_FP      (19 << 0)
+#	define R300_US_OUT_FMT_C2_32_FP     (20 << 0)
+#	define R300_US_OUT_FMT_C4_32_FP     (20 << 0)
 
 /* ALU
  * The ALU instructions register blocks are enumerated according to the order
@@ -1111,172 +1748,256 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *  - Set FPI0/FPI2_SPECIAL_LRP
  * Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD
  */
-#define R300_PFS_INSTR1_0                   0x46C0
-#       define R300_FPI1_SRC0C_SHIFT             0
-#       define R300_FPI1_SRC0C_MASK              (31 << 0)
-#       define R300_FPI1_SRC0C_CONST             (1 << 5)
-#       define R300_FPI1_SRC1C_SHIFT             6
-#       define R300_FPI1_SRC1C_MASK              (31 << 6)
-#       define R300_FPI1_SRC1C_CONST             (1 << 11)
-#       define R300_FPI1_SRC2C_SHIFT             12
-#       define R300_FPI1_SRC2C_MASK              (31 << 12)
-#       define R300_FPI1_SRC2C_CONST             (1 << 17)
-#       define R300_FPI1_SRC_MASK                0x0003ffff
-#       define R300_FPI1_DSTC_SHIFT              18
-#       define R300_FPI1_DSTC_MASK               (31 << 18)
-#		define R300_FPI1_DSTC_REG_MASK_SHIFT     23
-#       define R300_FPI1_DSTC_REG_X              (1 << 23)
-#       define R300_FPI1_DSTC_REG_Y              (1 << 24)
-#       define R300_FPI1_DSTC_REG_Z              (1 << 25)
-#		define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT  26
-#       define R300_FPI1_DSTC_OUTPUT_X           (1 << 26)
-#       define R300_FPI1_DSTC_OUTPUT_Y           (1 << 27)
-#       define R300_FPI1_DSTC_OUTPUT_Z           (1 << 28)
-
-#define R300_PFS_INSTR3_0                   0x47C0
-#       define R300_FPI3_SRC0A_SHIFT             0
-#       define R300_FPI3_SRC0A_MASK              (31 << 0)
-#       define R300_FPI3_SRC0A_CONST             (1 << 5)
-#       define R300_FPI3_SRC1A_SHIFT             6
-#       define R300_FPI3_SRC1A_MASK              (31 << 6)
-#       define R300_FPI3_SRC1A_CONST             (1 << 11)
-#       define R300_FPI3_SRC2A_SHIFT             12
-#       define R300_FPI3_SRC2A_MASK              (31 << 12)
-#       define R300_FPI3_SRC2A_CONST             (1 << 17)
-#       define R300_FPI3_SRC_MASK                0x0003ffff
-#       define R300_FPI3_DSTA_SHIFT              18
-#       define R300_FPI3_DSTA_MASK               (31 << 18)
-#       define R300_FPI3_DSTA_REG                (1 << 23)
-#       define R300_FPI3_DSTA_OUTPUT             (1 << 24)
-#		define R300_FPI3_DSTA_DEPTH              (1 << 27)
-
-#define R300_PFS_INSTR0_0                   0x48C0
-#       define R300_FPI0_ARGC_SRC0C_XYZ          0
-#       define R300_FPI0_ARGC_SRC0C_XXX          1
-#       define R300_FPI0_ARGC_SRC0C_YYY          2
-#       define R300_FPI0_ARGC_SRC0C_ZZZ          3
-#       define R300_FPI0_ARGC_SRC1C_XYZ          4
-#       define R300_FPI0_ARGC_SRC1C_XXX          5
-#       define R300_FPI0_ARGC_SRC1C_YYY          6
-#       define R300_FPI0_ARGC_SRC1C_ZZZ          7
-#       define R300_FPI0_ARGC_SRC2C_XYZ          8
-#       define R300_FPI0_ARGC_SRC2C_XXX          9
-#       define R300_FPI0_ARGC_SRC2C_YYY          10
-#       define R300_FPI0_ARGC_SRC2C_ZZZ          11
-#       define R300_FPI0_ARGC_SRC0A              12
-#       define R300_FPI0_ARGC_SRC1A              13
-#       define R300_FPI0_ARGC_SRC2A              14
-#       define R300_FPI0_ARGC_SRC1C_LRP          15
-#       define R300_FPI0_ARGC_ZERO               20
-#       define R300_FPI0_ARGC_ONE                21
-	/* GUESS */
-#       define R300_FPI0_ARGC_HALF               22
-#       define R300_FPI0_ARGC_SRC0C_YZX          23
-#       define R300_FPI0_ARGC_SRC1C_YZX          24
-#       define R300_FPI0_ARGC_SRC2C_YZX          25
-#       define R300_FPI0_ARGC_SRC0C_ZXY          26
-#       define R300_FPI0_ARGC_SRC1C_ZXY          27
-#       define R300_FPI0_ARGC_SRC2C_ZXY          28
-#       define R300_FPI0_ARGC_SRC0CA_WZY         29
-#       define R300_FPI0_ARGC_SRC1CA_WZY         30
-#       define R300_FPI0_ARGC_SRC2CA_WZY         31
-
-#       define R300_FPI0_ARG0C_SHIFT             0
-#       define R300_FPI0_ARG0C_MASK              (31 << 0)
-#       define R300_FPI0_ARG0C_NEG               (1 << 5)
-#       define R300_FPI0_ARG0C_ABS               (1 << 6)
-#       define R300_FPI0_ARG1C_SHIFT             7
-#       define R300_FPI0_ARG1C_MASK              (31 << 7)
-#       define R300_FPI0_ARG1C_NEG               (1 << 12)
-#       define R300_FPI0_ARG1C_ABS               (1 << 13)
-#       define R300_FPI0_ARG2C_SHIFT             14
-#       define R300_FPI0_ARG2C_MASK              (31 << 14)
-#       define R300_FPI0_ARG2C_NEG               (1 << 19)
-#       define R300_FPI0_ARG2C_ABS               (1 << 20)
-#       define R300_FPI0_SPECIAL_LRP             (1 << 21)
-#       define R300_FPI0_OUTC_MAD                (0 << 23)
-#       define R300_FPI0_OUTC_DP3                (1 << 23)
-#       define R300_FPI0_OUTC_DP4                (2 << 23)
-#       define R300_FPI0_OUTC_MIN                (4 << 23)
-#       define R300_FPI0_OUTC_MAX                (5 << 23)
-#       define R300_FPI0_OUTC_CMPH               (7 << 23)
-#       define R300_FPI0_OUTC_CMP                (8 << 23)
-#       define R300_FPI0_OUTC_FRC                (9 << 23)
-#       define R300_FPI0_OUTC_REPL_ALPHA         (10 << 23)
-#       define R300_FPI0_OUTC_SAT                (1 << 30)
-#       define R300_FPI0_INSERT_NOP              (1 << 31)
-
-#define R300_PFS_INSTR2_0                   0x49C0
-#       define R300_FPI2_ARGA_SRC0C_X            0
-#       define R300_FPI2_ARGA_SRC0C_Y            1
-#       define R300_FPI2_ARGA_SRC0C_Z            2
-#       define R300_FPI2_ARGA_SRC1C_X            3
-#       define R300_FPI2_ARGA_SRC1C_Y            4
-#       define R300_FPI2_ARGA_SRC1C_Z            5
-#       define R300_FPI2_ARGA_SRC2C_X            6
-#       define R300_FPI2_ARGA_SRC2C_Y            7
-#       define R300_FPI2_ARGA_SRC2C_Z            8
-#       define R300_FPI2_ARGA_SRC0A              9
-#       define R300_FPI2_ARGA_SRC1A              10
-#       define R300_FPI2_ARGA_SRC2A              11
-#       define R300_FPI2_ARGA_SRC1A_LRP          15
-#       define R300_FPI2_ARGA_ZERO               16
-#       define R300_FPI2_ARGA_ONE                17
-	/* GUESS */
-#       define R300_FPI2_ARGA_HALF               18
-#       define R300_FPI2_ARG0A_SHIFT             0
-#       define R300_FPI2_ARG0A_MASK              (31 << 0)
-#       define R300_FPI2_ARG0A_NEG               (1 << 5)
-	/* GUESS */
-#	define R300_FPI2_ARG0A_ABS		 (1 << 6)
-#       define R300_FPI2_ARG1A_SHIFT             7
-#       define R300_FPI2_ARG1A_MASK              (31 << 7)
-#       define R300_FPI2_ARG1A_NEG               (1 << 12)
-	/* GUESS */
-#	define R300_FPI2_ARG1A_ABS		 (1 << 13)
-#       define R300_FPI2_ARG2A_SHIFT             14
-#       define R300_FPI2_ARG2A_MASK              (31 << 14)
-#       define R300_FPI2_ARG2A_NEG               (1 << 19)
-	/* GUESS */
-#	define R300_FPI2_ARG2A_ABS		 (1 << 20)
-#       define R300_FPI2_SPECIAL_LRP             (1 << 21)
-#       define R300_FPI2_OUTA_MAD                (0 << 23)
-#       define R300_FPI2_OUTA_DP4                (1 << 23)
-#       define R300_FPI2_OUTA_MIN                (2 << 23)
-#       define R300_FPI2_OUTA_MAX                (3 << 23)
-#       define R300_FPI2_OUTA_CMP                (6 << 23)
-#       define R300_FPI2_OUTA_FRC                (7 << 23)
-#       define R300_FPI2_OUTA_EX2                (8 << 23)
-#       define R300_FPI2_OUTA_LG2                (9 << 23)
-#       define R300_FPI2_OUTA_RCP                (10 << 23)
-#       define R300_FPI2_OUTA_RSQ                (11 << 23)
-#       define R300_FPI2_OUTA_SAT                (1 << 30)
-#       define R300_FPI2_UNKNOWN_31              (1 << 31)
+#define R300_US_ALU_RGB_ADDR_0                   0x46C0
+#       define R300_ALU_SRC0C_SHIFT             0
+#       define R300_ALU_SRC0C_MASK              (31 << 0)
+#       define R300_ALU_SRC0C_CONST             (1 << 5)
+#       define R300_ALU_SRC1C_SHIFT             6
+#       define R300_ALU_SRC1C_MASK              (31 << 6)
+#       define R300_ALU_SRC1C_CONST             (1 << 11)
+#       define R300_ALU_SRC2C_SHIFT             12
+#       define R300_ALU_SRC2C_MASK              (31 << 12)
+#       define R300_ALU_SRC2C_CONST             (1 << 17)
+#       define R300_ALU_SRC_MASK                0x0003ffff
+#       define R300_ALU_DSTC_SHIFT              18
+#       define R300_ALU_DSTC_MASK               (31 << 18)
+#		define R300_ALU_DSTC_REG_MASK_SHIFT     23
+#       define R300_ALU_DSTC_REG_X              (1 << 23)
+#       define R300_ALU_DSTC_REG_Y              (1 << 24)
+#       define R300_ALU_DSTC_REG_Z              (1 << 25)
+#		define R300_ALU_DSTC_OUTPUT_MASK_SHIFT  26
+#       define R300_ALU_DSTC_OUTPUT_X           (1 << 26)
+#       define R300_ALU_DSTC_OUTPUT_Y           (1 << 27)
+#       define R300_ALU_DSTC_OUTPUT_Z           (1 << 28)
+
+#define R300_US_ALU_ALPHA_ADDR_0                 0x47C0
+#       define R300_ALU_SRC0A_SHIFT             0
+#       define R300_ALU_SRC0A_MASK              (31 << 0)
+#       define R300_ALU_SRC0A_CONST             (1 << 5)
+#       define R300_ALU_SRC1A_SHIFT             6
+#       define R300_ALU_SRC1A_MASK              (31 << 6)
+#       define R300_ALU_SRC1A_CONST             (1 << 11)
+#       define R300_ALU_SRC2A_SHIFT             12
+#       define R300_ALU_SRC2A_MASK              (31 << 12)
+#       define R300_ALU_SRC2A_CONST             (1 << 17)
+#       define R300_ALU_SRC_MASK                0x0003ffff
+#       define R300_ALU_DSTA_SHIFT              18
+#       define R300_ALU_DSTA_MASK               (31 << 18)
+#       define R300_ALU_DSTA_REG                (1 << 23)
+#       define R300_ALU_DSTA_OUTPUT             (1 << 24)
+#		define R300_ALU_DSTA_DEPTH              (1 << 27)
+
+#define R300_US_ALU_RGB_INST_0                   0x48C0
+#       define R300_ALU_ARGC_SRC0C_XYZ          0
+#       define R300_ALU_ARGC_SRC0C_XXX          1
+#       define R300_ALU_ARGC_SRC0C_YYY          2
+#       define R300_ALU_ARGC_SRC0C_ZZZ          3
+#       define R300_ALU_ARGC_SRC1C_XYZ          4
+#       define R300_ALU_ARGC_SRC1C_XXX          5
+#       define R300_ALU_ARGC_SRC1C_YYY          6
+#       define R300_ALU_ARGC_SRC1C_ZZZ          7
+#       define R300_ALU_ARGC_SRC2C_XYZ          8
+#       define R300_ALU_ARGC_SRC2C_XXX          9
+#       define R300_ALU_ARGC_SRC2C_YYY          10
+#       define R300_ALU_ARGC_SRC2C_ZZZ          11
+#       define R300_ALU_ARGC_SRC0A              12
+#       define R300_ALU_ARGC_SRC1A              13
+#       define R300_ALU_ARGC_SRC2A              14
+#       define R300_ALU_ARGC_SRCP_XYZ           15
+#       define R300_ALU_ARGC_SRCP_XXX           16
+#       define R300_ALU_ARGC_SRCP_YYY           17
+#       define R300_ALU_ARGC_SRCP_ZZZ           18
+#       define R300_ALU_ARGC_SRCP_WWW           19
+#       define R300_ALU_ARGC_ZERO               20
+#       define R300_ALU_ARGC_ONE                21
+#       define R300_ALU_ARGC_HALF               22
+#       define R300_ALU_ARGC_SRC0C_YZX          23
+#       define R300_ALU_ARGC_SRC1C_YZX          24
+#       define R300_ALU_ARGC_SRC2C_YZX          25
+#       define R300_ALU_ARGC_SRC0C_ZXY          26
+#       define R300_ALU_ARGC_SRC1C_ZXY          27
+#       define R300_ALU_ARGC_SRC2C_ZXY          28
+#       define R300_ALU_ARGC_SRC0CA_WZY         29
+#       define R300_ALU_ARGC_SRC1CA_WZY         30
+#       define R300_ALU_ARGC_SRC2CA_WZY         31
+
+#       define R300_ALU_ARG0C_SHIFT             0
+#       define R300_ALU_ARG0C_MASK              (31 << 0)
+#       define R300_ALU_ARG0C_NOP               (0 << 5)
+#       define R300_ALU_ARG0C_NEG               (1 << 5)
+#       define R300_ALU_ARG0C_ABS               (2 << 5)
+#       define R300_ALU_ARG0C_NAB               (3 << 5)
+#       define R300_ALU_ARG1C_SHIFT             7
+#       define R300_ALU_ARG1C_MASK              (31 << 7)
+#       define R300_ALU_ARG1C_NOP               (0 << 12)
+#       define R300_ALU_ARG1C_NEG               (1 << 12)
+#       define R300_ALU_ARG1C_ABS               (2 << 12)
+#       define R300_ALU_ARG1C_NAB               (3 << 12)
+#       define R300_ALU_ARG2C_SHIFT             14
+#       define R300_ALU_ARG2C_MASK              (31 << 14)
+#       define R300_ALU_ARG2C_NOP               (0 << 19)
+#       define R300_ALU_ARG2C_NEG               (1 << 19)
+#       define R300_ALU_ARG2C_ABS               (2 << 19)
+#       define R300_ALU_ARG2C_NAB               (3 << 19)
+#       define R300_ALU_SRCP_1_MINUS_2_SRC0     (0 << 21)
+#       define R300_ALU_SRCP_SRC1_MINUS_SRC0    (1 << 21)
+#       define R300_ALU_SRCP_SRC1_PLUS_SRC0     (2 << 21)
+#       define R300_ALU_SRCP_1_MINUS_SRC0       (3 << 21)
+
+#       define R300_ALU_OUTC_MAD                (0 << 23)
+#       define R300_ALU_OUTC_DP3                (1 << 23)
+#       define R300_ALU_OUTC_DP4                (2 << 23)
+#       define R300_ALU_OUTC_D2A                (3 << 23)
+#       define R300_ALU_OUTC_MIN                (4 << 23)
+#       define R300_ALU_OUTC_MAX                (5 << 23)
+#       define R300_ALU_OUTC_CMPH               (7 << 23)
+#       define R300_ALU_OUTC_CMP                (8 << 23)
+#       define R300_ALU_OUTC_FRC                (9 << 23)
+#       define R300_ALU_OUTC_REPL_ALPHA         (10 << 23)
+
+#       define R300_ALU_OUTC_MOD_NOP            (0 << 27)
+#       define R300_ALU_OUTC_MOD_MUL2           (1 << 27)
+#       define R300_ALU_OUTC_MOD_MUL4           (2 << 27)
+#       define R300_ALU_OUTC_MOD_MUL8           (3 << 27)
+#       define R300_ALU_OUTC_MOD_DIV2           (4 << 27)
+#       define R300_ALU_OUTC_MOD_DIV4           (5 << 27)
+#       define R300_ALU_OUTC_MOD_DIV8           (6 << 27)
+
+#       define R300_ALU_OUTC_CLAMP              (1 << 30)
+#       define R300_ALU_INSERT_NOP              (1 << 31)
+
+#define R300_US_ALU_ALPHA_INST_0                 0x49C0
+#       define R300_ALU_ARGA_SRC0C_X            0
+#       define R300_ALU_ARGA_SRC0C_Y            1
+#       define R300_ALU_ARGA_SRC0C_Z            2
+#       define R300_ALU_ARGA_SRC1C_X            3
+#       define R300_ALU_ARGA_SRC1C_Y            4
+#       define R300_ALU_ARGA_SRC1C_Z            5
+#       define R300_ALU_ARGA_SRC2C_X            6
+#       define R300_ALU_ARGA_SRC2C_Y            7
+#       define R300_ALU_ARGA_SRC2C_Z            8
+#       define R300_ALU_ARGA_SRC0A              9
+#       define R300_ALU_ARGA_SRC1A              10
+#       define R300_ALU_ARGA_SRC2A              11
+#       define R300_ALU_ARGA_SRCP_X             12
+#       define R300_ALU_ARGA_SRCP_Y             13
+#       define R300_ALU_ARGA_SRCP_Z             14
+#       define R300_ALU_ARGA_SRCP_W             15
+
+#       define R300_ALU_ARGA_ZERO               16
+#       define R300_ALU_ARGA_ONE                17
+#       define R300_ALU_ARGA_HALF               18
+#       define R300_ALU_ARG0A_SHIFT             0
+#       define R300_ALU_ARG0A_MASK              (31 << 0)
+#       define R300_ALU_ARG0A_NOP               (0 << 5)
+#       define R300_ALU_ARG0A_NEG               (1 << 5)
+#	define R300_ALU_ARG0A_ABS		 (2 << 5)
+#	define R300_ALU_ARG0A_NAB		 (3 << 5)
+#       define R300_ALU_ARG1A_SHIFT             7
+#       define R300_ALU_ARG1A_MASK              (31 << 7)
+#       define R300_ALU_ARG1A_NOP               (0 << 12)
+#       define R300_ALU_ARG1A_NEG               (1 << 12)
+#	define R300_ALU_ARG1A_ABS		 (2 << 12)
+#	define R300_ALU_ARG1A_NAB		 (3 << 12)
+#       define R300_ALU_ARG2A_SHIFT             14
+#       define R300_ALU_ARG2A_MASK              (31 << 14)
+#       define R300_ALU_ARG2A_NOP               (0 << 19)
+#       define R300_ALU_ARG2A_NEG               (1 << 19)
+#	define R300_ALU_ARG2A_ABS		 (2 << 19)
+#	define R300_ALU_ARG2A_NAB		 (3 << 19)
+#       define R300_ALU_SRCP_1_MINUS_2_SRC0     (0 << 21)
+#       define R300_ALU_SRCP_SRC1_MINUS_SRC0    (1 << 21)
+#       define R300_ALU_SRCP_SRC1_PLUS_SRC0     (2 << 21)
+#       define R300_ALU_SRCP_1_MINUS_SRC0       (3 << 21)
+
+#       define R300_ALU_OUTA_MAD                (0 << 23)
+#       define R300_ALU_OUTA_DP4                (1 << 23)
+#       define R300_ALU_OUTA_MIN                (2 << 23)
+#       define R300_ALU_OUTA_MAX                (3 << 23)
+#       define R300_ALU_OUTA_CND                (5 << 23)
+#       define R300_ALU_OUTA_CMP                (6 << 23)
+#       define R300_ALU_OUTA_FRC                (7 << 23)
+#       define R300_ALU_OUTA_EX2                (8 << 23)
+#       define R300_ALU_OUTA_LG2                (9 << 23)
+#       define R300_ALU_OUTA_RCP                (10 << 23)
+#       define R300_ALU_OUTA_RSQ                (11 << 23)
+
+#       define R300_ALU_OUTA_MOD_NOP            (0 << 27)
+#       define R300_ALU_OUTA_MOD_MUL2           (1 << 27)
+#       define R300_ALU_OUTA_MOD_MUL4           (2 << 27)
+#       define R300_ALU_OUTA_MOD_MUL8           (3 << 27)
+#       define R300_ALU_OUTA_MOD_DIV2           (4 << 27)
+#       define R300_ALU_OUTA_MOD_DIV4           (5 << 27)
+#       define R300_ALU_OUTA_MOD_DIV8           (6 << 27)
+
+#       define R300_ALU_OUTA_CLAMP              (1 << 30)
 /* END: Fragment program instruction set */
 
-/* Fog state and color */
-#define R300_RE_FOG_STATE                   0x4BC0
-#       define R300_FOG_ENABLE                   (1 << 0)
-#	define R300_FOG_MODE_LINEAR              (0 << 1)
-#	define R300_FOG_MODE_EXP                 (1 << 1)
-#	define R300_FOG_MODE_EXP2                (2 << 1)
-#	define R300_FOG_MODE_MASK                (3 << 1)
-#define R300_FOG_COLOR_R                    0x4BC8
-#define R300_FOG_COLOR_G                    0x4BCC
-#define R300_FOG_COLOR_B                    0x4BD0
-
-#define R300_PP_ALPHA_TEST                  0x4BD4
-#       define R300_REF_ALPHA_MASK               0x000000ff
-#       define R300_ALPHA_TEST_FAIL              (0 << 8)
-#       define R300_ALPHA_TEST_LESS              (1 << 8)
-#       define R300_ALPHA_TEST_LEQUAL            (3 << 8)
-#       define R300_ALPHA_TEST_EQUAL             (2 << 8)
-#       define R300_ALPHA_TEST_GEQUAL            (6 << 8)
-#       define R300_ALPHA_TEST_GREATER           (4 << 8)
-#       define R300_ALPHA_TEST_NEQUAL            (5 << 8)
-#       define R300_ALPHA_TEST_PASS              (7 << 8)
-#       define R300_ALPHA_TEST_OP_MASK           (7 << 8)
-#       define R300_ALPHA_TEST_ENABLE            (1 << 11)
+/* Fog: Fog Blending Enable */
+#define R300_FG_FOG_BLEND                             0x4bc0
+#       define R300_FG_FOG_BLEND_DISABLE              (0 << 0)
+#       define R300_FG_FOG_BLEND_ENABLE               (1 << 0)
+#	define R300_FG_FOG_BLEND_FN_LINEAR            (0 << 1)
+#	define R300_FG_FOG_BLEND_FN_EXP               (1 << 1)
+#	define R300_FG_FOG_BLEND_FN_EXP2              (2 << 1)
+#	define R300_FG_FOG_BLEND_FN_CONSTANT          (3 << 1)
+#	define R300_FG_FOG_BLEND_FN_MASK              (3 << 1)
+
+/* Fog: Red Component of Fog Color */
+#define R300_FG_FOG_COLOR_R                           0x4bc8
+/* Fog: Green Component of Fog Color */
+#define R300_FG_FOG_COLOR_G                           0x4bcc
+/* Fog: Blue Component of Fog Color */
+#define R300_FG_FOG_COLOR_B                           0x4bd0
+#	define R300_FG_FOG_COLOR_MASK 0x000003ff
+
+/* Fog: Constant Factor for Fog Blending */
+#define R300_FG_FOG_FACTOR                            0x4bc4
+#	define FG_FOG_FACTOR_MASK 0x000003ff
+
+/* Fog: Alpha function */
+#define R300_FG_ALPHA_FUNC                            0x4bd4
+#       define R300_FG_ALPHA_FUNC_VAL_MASK               0x000000ff
+#       define R300_FG_ALPHA_FUNC_NEVER                     (0 << 8)
+#       define R300_FG_ALPHA_FUNC_LESS                      (1 << 8)
+#       define R300_FG_ALPHA_FUNC_EQUAL                     (2 << 8)
+#       define R300_FG_ALPHA_FUNC_LE                        (3 << 8)
+#       define R300_FG_ALPHA_FUNC_GREATER                   (4 << 8)
+#       define R300_FG_ALPHA_FUNC_NOTEQUAL                  (5 << 8)
+#       define R300_FG_ALPHA_FUNC_GE                        (6 << 8)
+#       define R300_FG_ALPHA_FUNC_ALWAYS                    (7 << 8)
+#       define R300_ALPHA_TEST_OP_MASK                      (7 << 8)
+#       define R300_FG_ALPHA_FUNC_DISABLE                   (0 << 11)
+#       define R300_FG_ALPHA_FUNC_ENABLE                    (1 << 11)
+
+#       define R500_FG_ALPHA_FUNC_10BIT                     (0 << 12)
+#       define R500_FG_ALPHA_FUNC_8BIT                      (1 << 12)
+
+#       define R300_FG_ALPHA_FUNC_MASK_DISABLE              (0 << 16)
+#       define R300_FG_ALPHA_FUNC_MASK_ENABLE               (1 << 16)
+#       define R300_FG_ALPHA_FUNC_CFG_2_OF_4                (0 << 17)
+#       define R300_FG_ALPHA_FUNC_CFG_3_OF_6                (1 << 17)
+
+#       define R300_FG_ALPHA_FUNC_DITH_DISABLE              (0 << 20)
+#       define R300_FG_ALPHA_FUNC_DITH_ENABLE               (1 << 20)
+
+#       define R500_FG_ALPHA_FUNC_OFFSET_DISABLE            (0 << 24)
+#       define R500_FG_ALPHA_FUNC_OFFSET_ENABLE             (1 << 24) /* Not supported in R520 */
+#       define R500_FG_ALPHA_FUNC_DISC_ZERO_MASK_DISABLE    (0 << 25)
+#       define R500_FG_ALPHA_FUNC_DISC_ZERO_MASK_ENABLE     (1 << 25)
+
+#       define R500_FG_ALPHA_FUNC_FP16_DISABLE              (0 << 28)
+#       define R500_FG_ALPHA_FUNC_FP16_ENABLE               (1 << 28)
+
+
+/* Fog: Where does the depth come from? */
+#define R300_FG_DEPTH_SRC                  0x4bd8
+#	define R300_FG_DEPTH_SRC_SCAN   (0 << 0)
+#	define R300_FG_DEPTH_SRC_SHADER (1 << 0)
+
+/* Fog: Alpha Compare Value */
+#define R500_FG_ALPHA_VALUE                0x4be0
+#	define R500_FG_ALPHA_VALUE_MASK 0x0000ffff
 
 /* gap */
 
@@ -1285,12 +2006,33 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R300_PFS_PARAM_0_Y                  0x4C04
 #define R300_PFS_PARAM_0_Z                  0x4C08
 #define R300_PFS_PARAM_0_W                  0x4C0C
-/* GUESS: PARAM_31 is last, based on native limits reported by fglrx */
+/* last consts */
 #define R300_PFS_PARAM_31_X                 0x4DF0
 #define R300_PFS_PARAM_31_Y                 0x4DF4
 #define R300_PFS_PARAM_31_Z                 0x4DF8
 #define R300_PFS_PARAM_31_W                 0x4DFC
 
+/* Unpipelined. */
+#define R300_RB3D_CCTL                      0x4e00
+#	define R300_RB3D_CCTL_NUM_MULTIWRITES_1_BUFFER                (0 << 5)
+#	define R300_RB3D_CCTL_NUM_MULTIWRITES_2_BUFFERS               (1 << 5)
+#	define R300_RB3D_CCTL_NUM_MULTIWRITES_3_BUFFERS               (2 << 5)
+#	define R300_RB3D_CCTL_NUM_MULTIWRITES_4_BUFFERS               (3 << 5)
+#	define R300_RB3D_CCTL_CLRCMP_FLIPE_DISABLE                    (0 << 7)
+#	define R300_RB3D_CCTL_CLRCMP_FLIPE_ENABLE                     (1 << 7)
+#	define R300_RB3D_CCTL_AA_COMPRESSION_DISABLE                  (0 << 9)
+#	define R300_RB3D_CCTL_AA_COMPRESSION_ENABLE                   (1 << 9)
+#	define R300_RB3D_CCTL_CMASK_DISABLE                           (0 << 10)
+#	define R300_RB3D_CCTL_CMASK_ENABLE                            (1 << 10)
+/* reserved */
+#	define R300_RB3D_CCTL_INDEPENDENT_COLOR_CHANNEL_MASK_DISABLE  (0 << 12)
+#	define R300_RB3D_CCTL_INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE   (1 << 12)
+#	define R300_RB3D_CCTL_WRITE_COMPRESSION_ENABLE                (0 << 13)
+#	define R300_RB3D_CCTL_WRITE_COMPRESSION_DISABLE               (1 << 13)
+#	define R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_DISABLE  (0 << 14)
+#	define R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE   (1 << 14)
+
+
 /* Notes:
  * - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in
  *   the application
@@ -1302,9 +2044,17 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R300_RB3D_CBLEND                    0x4E04
 #define R300_RB3D_ABLEND                    0x4E08
 /* the following only appear in CBLEND */
-#       define R300_BLEND_ENABLE                     (1 << 0)
-#       define R300_BLEND_UNKNOWN                    (3 << 1)
-#       define R300_BLEND_NO_SEPARATE                (1 << 3)
+#       define R300_ALPHA_BLEND_ENABLE         (1 << 0)
+#       define R300_SEPARATE_ALPHA_ENABLE      (1 << 1)
+#       define R300_READ_ENABLE                (1 << 2)
+#       define R300_DISCARD_SRC_PIXELS_DIS     (0 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0     (1 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_COLOR_0     (2 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0     (3 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1     (4 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_COLOR_1     (5 << 3)
+#       define R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1     (6 << 3)
+
 /* the following are shared between CBLEND and ABLEND */
 #       define R300_FCN_MASK                         (3  << 12)
 #       define R300_COMB_FCN_ADD_CLAMP               (0  << 12)
@@ -1333,67 +2083,213 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_BLEND_MASK                       (63)
 #       define R300_SRC_BLEND_SHIFT                  (16)
 #       define R300_DST_BLEND_SHIFT                  (24)
+
+/* Constant color used by the blender. Pipelined through the blender.
+ * Note: For R520, this field is ignored, use RB3D_CONSTANT_COLOR_GB__BLUE,
+ * RB3D_CONSTANT_COLOR_GB__GREEN, etc. instead.
+ */
 #define R300_RB3D_BLEND_COLOR               0x4E10
-#define R300_RB3D_COLORMASK                 0x4E0C
-#       define R300_COLORMASK0_B                 (1<<0)
-#       define R300_COLORMASK0_G                 (1<<1)
-#       define R300_COLORMASK0_R                 (1<<2)
-#       define R300_COLORMASK0_A                 (1<<3)
 
-/* gap */
 
-#define R300_RB3D_COLOROFFSET0              0x4E28
-#       define R300_COLOROFFSET_MASK             0xFFFFFFF0 /* GUESS */
-#define R300_RB3D_COLOROFFSET1              0x4E2C /* GUESS */
-#define R300_RB3D_COLOROFFSET2              0x4E30 /* GUESS */
-#define R300_RB3D_COLOROFFSET3              0x4E34 /* GUESS */
+/* 3D Color Channel Mask. If all the channels used in the current color format
+ * are disabled, then the cb will discard all the incoming quads. Pipelined
+ * through the blender.
+ */
+#define RB3D_COLOR_CHANNEL_MASK                  0x4E0C
+#	define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0  (1 << 0)
+#	define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 (1 << 1)
+#	define RB3D_COLOR_CHANNEL_MASK_RED_MASK0   (1 << 2)
+#	define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 (1 << 3)
+#	define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK1  (1 << 4)
+#	define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK1 (1 << 5)
+#	define RB3D_COLOR_CHANNEL_MASK_RED_MASK1   (1 << 6)
+#	define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK1 (1 << 7)
+#	define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK2  (1 << 8)
+#	define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK2 (1 << 9)
+#	define RB3D_COLOR_CHANNEL_MASK_RED_MASK2   (1 << 10)
+#	define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK2 (1 << 11)
+#	define RB3D_COLOR_CHANNEL_MASK_BLUE_MASK3  (1 << 12)
+#	define RB3D_COLOR_CHANNEL_MASK_GREEN_MASK3 (1 << 13)
+#	define RB3D_COLOR_CHANNEL_MASK_RED_MASK3   (1 << 14)
+#	define RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK3 (1 << 15)
+
+/* Clear color that is used when the color mask is set to 00. Unpipelined.
+ * Program this register with a 32-bit value in ARGB8888 or ARGB2101010
+ * formats, ignoring the fields.
+ */
+#define RB3D_COLOR_CLEAR_VALUE                   0x4e14
 
 /* gap */
 
-/* Bit 16: Larger tiles
+/* Color Compare Color. Stalls the 2d/3d datapath until it is idle. */
+#define RB3D_CLRCMP_CLR                     0x4e20
+
+/* Color Compare Mask. Stalls the 2d/3d datapath until it is idle. */
+#define RB3D_CLRCMP_MSK                     0x4e24
+
+/* Color Buffer Address Offset of multibuffer 0. Unpipelined. */
+#define R300_RB3D_COLOROFFSET0              0x4E28
+#       define R300_COLOROFFSET_MASK             0xFFFFFFE0
+/* Color Buffer Address Offset of multibuffer 1. Unpipelined. */
+#define R300_RB3D_COLOROFFSET1              0x4E2C
+/* Color Buffer Address Offset of multibuffer 2. Unpipelined. */
+#define R300_RB3D_COLOROFFSET2              0x4E30
+/* Color Buffer Address Offset of multibuffer 3. Unpipelined. */
+#define R300_RB3D_COLOROFFSET3              0x4E34
+
+/* Color buffer format and tiling control for all the multibuffers and the
+ * pitch of multibuffer 0 to 3. Unpipelined. The cache must be empty before any
+ * of the registers are changed.
+ *
+ * Bit 16: Larger tiles
  * Bit 17: 4x2 tiles
  * Bit 18: Extremely weird tile like, but some pixels duplicated?
  */
 #define R300_RB3D_COLORPITCH0               0x4E38
-#       define R300_COLORPITCH_MASK              0x00001FF8 /* GUESS */
-#       define R300_COLOR_TILE_ENABLE            (1 << 16) /* GUESS */
-#       define R300_COLOR_MICROTILE_ENABLE       (1 << 17) /* GUESS */
-#       define R300_COLOR_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
-#       define R300_COLOR_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
-#       define R300_COLOR_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
-#       define R300_COLOR_FORMAT_RGB565          (2 << 22)
-#       define R300_COLOR_FORMAT_ARGB8888        (3 << 22)
-#define R300_RB3D_COLORPITCH1               0x4E3C /* GUESS */
-#define R300_RB3D_COLORPITCH2               0x4E40 /* GUESS */
-#define R300_RB3D_COLORPITCH3               0x4E44 /* GUESS */
+#       define R300_COLORPITCH_MASK              0x00003FFE
+#       define R300_COLOR_TILE_DISABLE            (0 << 16)
+#       define R300_COLOR_TILE_ENABLE             (1 << 16)
+#       define R300_COLOR_MICROTILE_DISABLE       (0 << 17)
+#       define R300_COLOR_MICROTILE_ENABLE        (1 << 17)
+#       define R300_COLOR_MICROTILE_ENABLE_SQUARE (2 << 17) /* Only available in 16-bit */
+#       define R300_COLOR_ENDIAN_NO_SWAP          (0 << 19)
+#       define R300_COLOR_ENDIAN_WORD_SWAP        (1 << 19)
+#       define R300_COLOR_ENDIAN_DWORD_SWAP       (2 << 19)
+#       define R300_COLOR_ENDIAN_HALF_DWORD_SWAP  (3 << 19)
+#	define R500_COLOR_FORMAT_ARGB10101010     (0 << 21)
+#	define R500_COLOR_FORMAT_UV1010           (1 << 21)
+#	define R500_COLOR_FORMAT_CI8              (2 << 21) /* 2D only */
+#	define R300_COLOR_FORMAT_ARGB1555         (3 << 21)
+#       define R300_COLOR_FORMAT_RGB565           (4 << 21)
+#       define R500_COLOR_FORMAT_ARGB2101010      (5 << 21)
+#       define R300_COLOR_FORMAT_ARGB8888         (6 << 21)
+#       define R300_COLOR_FORMAT_ARGB32323232     (7 << 21)
+/* reserved */
+#       define R300_COLOR_FORMAT_I8               (9 << 21)
+#       define R300_COLOR_FORMAT_ARGB16161616     (10 << 21)
+#       define R300_COLOR_FORMAT_VYUY             (11 << 21)
+#       define R300_COLOR_FORMAT_YVYU             (12 << 21)
+#       define R300_COLOR_FORMAT_UV88             (13 << 21)
+#       define R500_COLOR_FORMAT_I10              (14 << 21)
+#       define R300_COLOR_FORMAT_ARGB4444         (15 << 21)
+#define R300_RB3D_COLORPITCH1               0x4E3C
+#define R300_RB3D_COLORPITCH2               0x4E40
+#define R300_RB3D_COLORPITCH3               0x4E44
 
 /* gap */
 
-/* Guess by Vladimir.
+/* Destination Color Buffer Cache Control/Status. If the cb is in e2 mode, then
+ * a flush or free will not occur upon a write to this register, but a sync
+ * will be immediately sent if one is requested. If both DC_FLUSH and DC_FREE
+ * are zero but DC_FINISH is one, then a sync will be sent immediately -- the
+ * cb will not wait for all the previous operations to complete before sending
+ * the sync. Unpipelined except when DC_FINISH and DC_FREE are both set to
+ * zero.
+ *
  * Set to 0A before 3D operations, set to 02 afterwards.
  */
-#define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C
-#       define R300_RB3D_DSTCACHE_UNKNOWN_02             0x00000002
-#       define R300_RB3D_DSTCACHE_UNKNOWN_0A             0x0000000A
+#define R300_RB3D_DSTCACHE_CTLSTAT               0x4e4c
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_NO_EFFECT         (0 << 0)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_NO_EFFECT_1       (1 << 0)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D    (2 << 0)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D_1  (3 << 0)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_NO_EFFECT          (0 << 2)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_NO_EFFECT_1        (1 << 2)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS       (2 << 2)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS_1     (3 << 2)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_NO_SIGNAL        (0 << 4)
+#	define R300_RB3D_DSTCACHE_CTLSTAT_DC_FINISH_SIGNAL           (1 << 4)
+
+#define R300_RB3D_DITHER_CTL 0x4E50
+#	define R300_RB3D_DITHER_CTL_DITHER_MODE_TRUNCATE         (0 << 0)
+#	define R300_RB3D_DITHER_CTL_DITHER_MODE_ROUND            (1 << 0)
+#	define R300_RB3D_DITHER_CTL_DITHER_MODE_LUT              (2 << 0)
+/* reserved */
+#	define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_TRUNCATE   (0 << 2)
+#	define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_ROUND      (1 << 2)
+#	define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT        (2 << 2)
+/* reserved */
+
+/* Resolve buffer destination address. The cache must be empty before changing
+ * this register if the cb is in resolve mode. Unpipelined
+ */
+#define R300_RB3D_AARESOLVE_OFFSET        0x4e80
+#	define R300_RB3D_AARESOLVE_OFFSET_SHIFT 5
+#	define R300_RB3D_AARESOLVE_OFFSET_MASK 0xffffffe0 /* At least according to the calculations of Christoph Brill */
+
+/* Resolve Buffer Pitch and Tiling Control. The cache must be empty before
+ * changing this register if the cb is in resolve mode. Unpipelined
+ */
+#define R300_RB3D_AARESOLVE_PITCH         0x4e84
+#	define R300_RB3D_AARESOLVE_PITCH_SHIFT 1
+#	define R300_RB3D_AARESOLVE_PITCH_MASK  0x00003ffe /* At least according to the calculations of Christoph Brill */
+
+/* Resolve Buffer Control. Unpipelined */
+#define R300_RB3D_AARESOLVE_CTL           0x4e88
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_NORMAL   (0 << 0)
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE  (1 << 0)
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_10      (0 << 1)
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_22      (1 << 1)
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_SAMPLE0 (0 << 2)
+#	define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE (1 << 2)
+
+
+/* Discard src pixels less than or equal to threshold. */
+#define R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD 0x4ea0
+/* Discard src pixels greater than or equal to threshold. */
+#define R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD 0x4ea4
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_BLUE_SHIFT 0
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_BLUE_MASK 0x000000ff
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_GREEN_SHIFT 8
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_GREEN_MASK 0x0000ff00
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_RED_SHIFT 16
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_RED_MASK 0x00ff0000
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_ALPHA_SHIFT 24
+#	define R500_RB3D_DISCARD_SRC_PIXEL_THRESHOLD_ALPHA_MASK 0xff000000
+
+/* 3D ROP Control. Stalls the 2d/3d datapath until it is idle. */
+#define R300_RB3D_ROPCNTL                             0x4e18
+#	define R300_RB3D_ROPCNTL_ROP_ENABLE            0x00000004
+#	define R300_RB3D_ROPCNTL_ROP_MASK              (15 << 8)
+#	define R300_RB3D_ROPCNTL_ROP_SHIFT             8
+
+/* Color Compare Flip. Stalls the 2d/3d datapath until it is idle. */
+#define R300_RB3D_CLRCMP_FLIPE                        0x4e1c
+
+/* Sets the fifo sizes */
+#define R500_RB3D_FIFO_SIZE                           0x4ef4
+#	define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_FULL   (0 << 0)
+#	define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_HALF   (1 << 0)
+#	define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_QUATER (2 << 0)
+#	define R500_RB3D_FIFO_SIZE_OP_FIFO_SIZE_EIGTHS (3 << 0)
+
+/* Constant color used by the blender. Pipelined through the blender. */
+#define R500_RB3D_CONSTANT_COLOR_AR                   0x4ef8
+#	define R500_RB3D_CONSTANT_COLOR_AR_RED_MASK    0x0000ffff
+#	define R500_RB3D_CONSTANT_COLOR_AR_RED_SHIFT   0
+#	define R500_RB3D_CONSTANT_COLOR_AR_ALPHA_MASK  0xffff0000
+#	define R500_RB3D_CONSTANT_COLOR_AR_ALPHA_SHIFT 16
+
+/* Constant color used by the blender. Pipelined through the blender. */
+#define R500_RB3D_CONSTANT_COLOR_GB                   0x4efc
+#	define R500_RB3D_CONSTANT_COLOR_AR_BLUE_MASK   0x0000ffff
+#	define R500_RB3D_CONSTANT_COLOR_AR_BLUE_SHIFT  0
+#	define R500_RB3D_CONSTANT_COLOR_AR_GREEN_MASK  0xffff0000
+#	define R500_RB3D_CONSTANT_COLOR_AR_GREEN_SHIFT 16
 
 /* gap */
 /* There seems to be no "write only" setting, so use Z-test = ALWAYS
  * for this.
  * Bit (1<<8) is the "test" bit. so plain write is 6  - vd
  */
-#define R300_RB3D_ZSTENCIL_CNTL_0                   0x4F00
-#       define R300_RB3D_Z_DISABLED_1            0x00000010
-#       define R300_RB3D_Z_DISABLED_2            0x00000014
-#       define R300_RB3D_Z_TEST                  0x00000012
-#       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
-#       define R300_RB3D_Z_WRITE_ONLY        	 0x00000006
-
-#       define R300_RB3D_Z_TEST                  0x00000012
-#       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
-#       define R300_RB3D_Z_WRITE_ONLY        	 0x00000006
-#	define R300_RB3D_STENCIL_ENABLE		 0x00000001
-
-#define R300_RB3D_ZSTENCIL_CNTL_1                   0x4F04
+#define R300_ZB_CNTL                             0x4F00
+#	define R300_STENCIL_ENABLE		 (1 << 0)
+#	define R300_Z_ENABLE		         (1 << 1)
+#	define R300_Z_WRITE_ENABLE		 (1 << 2)
+#	define R300_Z_SIGNED_COMPARE		 (1 << 3)
+#	define R300_STENCIL_FRONT_BACK		 (1 << 4)
+
+#define R300_ZB_ZSTENCILCNTL                   0x4f04
 	/* functions */
 #	define R300_ZS_NEVER			0
 #	define R300_ZS_LESS			1
@@ -1413,162 +2309,344 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #	define R300_ZS_INVERT			5
 #	define R300_ZS_INCR_WRAP		6
 #	define R300_ZS_DECR_WRAP		7
+#	define R300_Z_FUNC_SHIFT		0
 	/* front and back refer to operations done for front
 	   and back faces, i.e. separate stencil function support */
-#	define R300_RB3D_ZS1_DEPTH_FUNC_SHIFT		0
-#	define R300_RB3D_ZS1_FRONT_FUNC_SHIFT		3
-#	define R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT	6
-#	define R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT	9
-#	define R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT      12
-#	define R300_RB3D_ZS1_BACK_FUNC_SHIFT           15
-#	define R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT        18
-#	define R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT       21
-#	define R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT       24
-
-#define R300_RB3D_ZSTENCIL_CNTL_2                   0x4F08
-#	define R300_RB3D_ZS2_STENCIL_REF_SHIFT		0
-#	define R300_RB3D_ZS2_STENCIL_MASK		0xFF
-#	define R300_RB3D_ZS2_STENCIL_MASK_SHIFT	        8
-#	define R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT	16
+#	define R300_S_FRONT_FUNC_SHIFT	        3
+#	define R300_S_FRONT_SFAIL_OP_SHIFT	6
+#	define R300_S_FRONT_ZPASS_OP_SHIFT	9
+#	define R300_S_FRONT_ZFAIL_OP_SHIFT      12
+#	define R300_S_BACK_FUNC_SHIFT           15
+#	define R300_S_BACK_SFAIL_OP_SHIFT       18
+#	define R300_S_BACK_ZPASS_OP_SHIFT       21
+#	define R300_S_BACK_ZFAIL_OP_SHIFT       24
+
+#define R300_ZB_STENCILREFMASK                        0x4f08
+#	define R300_STENCILREF_SHIFT       0
+#	define R300_STENCILREF_MASK        0x000000ff
+#	define R300_STENCILMASK_SHIFT      8
+#	define R300_STENCILMASK_MASK       0x0000ff00
+#	define R300_STENCILWRITEMASK_SHIFT 16
+#	define R300_STENCILWRITEMASK_MASK  0x00ff0000
 
 /* gap */
 
-#define R300_RB3D_ZSTENCIL_FORMAT                   0x4F10
-#	define R300_DEPTH_FORMAT_16BIT_INT_Z     (0 << 0)
-#	define R300_DEPTH_FORMAT_24BIT_INT_Z     (2 << 0)
-	/* 16 bit format or some aditional bit ? */
-#	define R300_DEPTH_FORMAT_UNK32          (32 << 0)
+#define R300_ZB_FORMAT                             0x4f10
+#	define R300_DEPTHFORMAT_16BIT_INT_Z   (0 << 0)
+#	define R300_DEPTHFORMAT_16BIT_13E3    (1 << 0)
+#	define R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL   (2 << 0)
+/* reserved up to (15 << 0) */
+#	define R300_INVERT_13E3_LEADING_ONES  (0 << 4)
+#	define R300_INVERT_13E3_LEADING_ZEROS (1 << 4)
 
-#define R300_RB3D_EARLY_Z                           0x4F14
-#	define R300_EARLY_Z_DISABLE              (0 << 0)
-#	define R300_EARLY_Z_ENABLE               (1 << 0)
+#define R300_ZB_ZTOP                             0x4F14
+#	define R300_ZTOP_DISABLE                 (0 << 0)
+#	define R300_ZTOP_ENABLE                  (1 << 0)
 
 /* gap */
 
-#define R300_RB3D_ZCACHE_CTLSTAT            0x4F18 /* GUESS */
-#       define R300_RB3D_ZCACHE_UNKNOWN_01  0x1
-#       define R300_RB3D_ZCACHE_UNKNOWN_03  0x3
+#define R300_ZB_ZCACHE_CTLSTAT            0x4f18
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_NO_EFFECT      (0 << 0)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE (1 << 0)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_NO_EFFECT       (0 << 1)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE            (1 << 1)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_IDLE            (0 << 31)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_BUSY            (1 << 31)
+
+#define R300_ZB_BW_CNTL                     0x4f1c
+#	define R300_HIZ_DISABLE                              (0 << 0)
+#	define R300_HIZ_ENABLE                               (1 << 0)
+#	define R300_HIZ_MIN                                  (0 << 1)
+#	define R300_HIZ_MAX                                  (1 << 1)
+#	define R300_FAST_FILL_DISABLE                        (0 << 2)
+#	define R300_FAST_FILL_ENABLE                         (1 << 2)
+#	define R300_RD_COMP_DISABLE                          (0 << 3)
+#	define R300_RD_COMP_ENABLE                           (1 << 3)
+#	define R300_WR_COMP_DISABLE                          (0 << 4)
+#	define R300_WR_COMP_ENABLE                           (1 << 4)
+#	define R300_ZB_CB_CLEAR_RMW                          (0 << 5)
+#	define R300_ZB_CB_CLEAR_CACHE_LINEAR                 (1 << 5)
+#	define R300_FORCE_COMPRESSED_STENCIL_VALUE_DISABLE   (0 << 6)
+#	define R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE    (1 << 6)
+
+#	define R500_ZEQUAL_OPTIMIZE_ENABLE                   (0 << 7)
+#	define R500_ZEQUAL_OPTIMIZE_DISABLE                  (1 << 7)
+#	define R500_SEQUAL_OPTIMIZE_ENABLE                   (0 << 8)
+#	define R500_SEQUAL_OPTIMIZE_DISABLE                  (1 << 8)
+
+#	define R500_BMASK_ENABLE                             (0 << 10)
+#	define R500_BMASK_DISABLE                            (1 << 10)
+#	define R500_HIZ_EQUAL_REJECT_DISABLE                 (0 << 11)
+#	define R500_HIZ_EQUAL_REJECT_ENABLE                  (1 << 11)
+#	define R500_HIZ_FP_EXP_BITS_DISABLE                  (0 << 12)
+#	define R500_HIZ_FP_EXP_BITS_1                        (1 << 12)
+#	define R500_HIZ_FP_EXP_BITS_2                        (2 << 12)
+#	define R500_HIZ_FP_EXP_BITS_3                        (3 << 12)
+#	define R500_HIZ_FP_EXP_BITS_4                        (4 << 12)
+#	define R500_HIZ_FP_EXP_BITS_5                        (5 << 12)
+#	define R500_HIZ_FP_INVERT_LEADING_ONES               (0 << 15)
+#	define R500_HIZ_FP_INVERT_LEADING_ZEROS              (1 << 15)
+#	define R500_TILE_OVERWRITE_RECOMPRESSION_ENABLE      (0 << 16)
+#	define R500_TILE_OVERWRITE_RECOMPRESSION_DISABLE     (1 << 16)
+#	define R500_CONTIGUOUS_6XAA_SAMPLES_ENABLE           (0 << 17)
+#	define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE          (1 << 17)
+#	define R500_PEQ_PACKING_DISABLE                      (0 << 18)
+#	define R500_PEQ_PACKING_ENABLE                       (1 << 18)
+#	define R500_COVERED_PTR_MASKING_DISABLE              (0 << 18)
+#	define R500_COVERED_PTR_MASKING_ENABLE               (1 << 18)
+
 
 /* gap */
 
-#define R300_RB3D_DEPTHOFFSET               0x4F20
-#define R300_RB3D_DEPTHPITCH                0x4F24
-#       define R300_DEPTHPITCH_MASK              0x00001FF8 /* GUESS */
-#       define R300_DEPTH_TILE_ENABLE            (1 << 16) /* GUESS */
-#       define R300_DEPTH_MICROTILE_ENABLE       (1 << 17) /* GUESS */
-#       define R300_DEPTH_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
-#       define R300_DEPTH_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
-#       define R300_DEPTH_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
-
-/* BEGIN: Vertex program instruction set */
-
-/* Every instruction is four dwords long:
- *  DWORD 0: output and opcode
- *  DWORD 1: first argument
- *  DWORD 2: second argument
- *  DWORD 3: third argument
- *
- * Notes:
- *  - ABS r, a is implemented as MAX r, a, -a
- *  - MOV is implemented as ADD to zero
- *  - XPD is implemented as MUL + MAD
- *  - FLR is implemented as FRC + ADD
- *  - apparently, fglrx tries to schedule instructions so that there is at
- *    least one instruction between the write to a temporary and the first
- *    read from said temporary; however, violations of this scheduling are
- *    allowed
- *  - register indices seem to be unrelated with OpenGL aliasing to
- *    conventional state
- *  - only one attribute and one parameter can be loaded at a time; however,
- *    the same attribute/parameter can be used for more than one argument
- *  - the second software argument for POW is the third hardware argument
- *    (no idea why)
- *  - MAD with only temporaries as input seems to use VPI_OUT_SELECT_MAD_2
- *
- * There is some magic surrounding LIT:
- *   The single argument is replicated across all three inputs, but swizzled:
- *     First argument: xyzy
- *     Second argument: xyzx
- *     Third argument: xyzw
- *   Whenever the result is used later in the fragment program, fglrx forces
- *   x and w to be 1.0 in the input selection; I don't know whether this is
- *   strictly necessary
+/* Z Buffer Address Offset.
+ * Bits 31 to 5 are used for aligned Z buffer address offset for macro tiles.
  */
-#define R300_VPI_OUT_OP_DOT                     (1 << 0)
-#define R300_VPI_OUT_OP_MUL                     (2 << 0)
-#define R300_VPI_OUT_OP_ADD                     (3 << 0)
-#define R300_VPI_OUT_OP_MAD                     (4 << 0)
-#define R300_VPI_OUT_OP_DST                     (5 << 0)
-#define R300_VPI_OUT_OP_FRC                     (6 << 0)
-#define R300_VPI_OUT_OP_MAX                     (7 << 0)
-#define R300_VPI_OUT_OP_MIN                     (8 << 0)
-#define R300_VPI_OUT_OP_SGE                     (9 << 0)
-#define R300_VPI_OUT_OP_SLT                     (10 << 0)
-	/* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, vector(scalar, vector) */
-#define R300_VPI_OUT_OP_UNK12                   (12 << 0)
-#define R300_VPI_OUT_OP_ARL                     (13 << 0)
-#define R300_VPI_OUT_OP_EXP                     (65 << 0)
-#define R300_VPI_OUT_OP_LOG                     (66 << 0)
-	/* Used in fog computations, scalar(scalar) */
-#define R300_VPI_OUT_OP_UNK67                   (67 << 0)
-#define R300_VPI_OUT_OP_LIT                     (68 << 0)
-#define R300_VPI_OUT_OP_POW                     (69 << 0)
-#define R300_VPI_OUT_OP_RCP                     (70 << 0)
-#define R300_VPI_OUT_OP_RSQ                     (72 << 0)
-	/* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, scalar(scalar) */
-#define R300_VPI_OUT_OP_UNK73                   (73 << 0)
-#define R300_VPI_OUT_OP_EX2                     (75 << 0)
-#define R300_VPI_OUT_OP_LG2                     (76 << 0)
-#define R300_VPI_OUT_OP_MAD_2                   (128 << 0)
-	/* all temps, vector(scalar, vector, vector) */
-#define R300_VPI_OUT_OP_UNK129                  (129 << 0)
-
-#define R300_VPI_OUT_REG_CLASS_TEMPORARY        (0 << 8)
-#define R300_VPI_OUT_REG_CLASS_ADDR             (1 << 8)
-#define R300_VPI_OUT_REG_CLASS_RESULT           (2 << 8)
-#define R300_VPI_OUT_REG_CLASS_MASK             (31 << 8)
-
-#define R300_VPI_OUT_REG_INDEX_SHIFT            13
-	/* GUESS based on fglrx native limits */
-#define R300_VPI_OUT_REG_INDEX_MASK             (31 << 13)
-
-#define R300_VPI_OUT_WRITE_X                    (1 << 20)
-#define R300_VPI_OUT_WRITE_Y                    (1 << 21)
-#define R300_VPI_OUT_WRITE_Z                    (1 << 22)
-#define R300_VPI_OUT_WRITE_W                    (1 << 23)
-
-#define R300_VPI_IN_REG_CLASS_TEMPORARY         (0 << 0)
-#define R300_VPI_IN_REG_CLASS_ATTRIBUTE         (1 << 0)
-#define R300_VPI_IN_REG_CLASS_PARAMETER         (2 << 0)
-#define R300_VPI_IN_REG_CLASS_NONE              (9 << 0)
-#define R300_VPI_IN_REG_CLASS_MASK              (31 << 0)
-
-#define R300_VPI_IN_REG_INDEX_SHIFT             5
-	/* GUESS based on fglrx native limits */
-#define R300_VPI_IN_REG_INDEX_MASK              (255 << 5)
-
-/* The R300 can select components from the input register arbitrarily.
- * Use the following constants, shifted by the component shift you
- * want to select
+#define R300_ZB_DEPTHOFFSET               0x4f20
+
+/* Z Buffer Pitch and Endian Control */
+#define R300_ZB_DEPTHPITCH                0x4f24
+#       define R300_DEPTHPITCH_MASK              0x00003FFC
+#       define R300_DEPTHMACROTILE_DISABLE      (0 << 16)
+#       define R300_DEPTHMACROTILE_ENABLE       (1 << 16)
+#       define R300_DEPTHMICROTILE_LINEAR       (0 << 17)
+#       define R300_DEPTHMICROTILE_TILED        (1 << 17)
+#       define R300_DEPTHMICROTILE_TILED_SQUARE (2 << 17)
+#       define R300_DEPTHENDIAN_NO_SWAP         (0 << 18)
+#       define R300_DEPTHENDIAN_WORD_SWAP       (1 << 18)
+#       define R300_DEPTHENDIAN_DWORD_SWAP      (2 << 18)
+#       define R300_DEPTHENDIAN_HALF_DWORD_SWAP (3 << 18)
+
+/* Z Buffer Clear Value */
+#define R300_ZB_DEPTHCLEARVALUE                  0x4f28
+
+/* Hierarchical Z Memory Offset */
+#define R300_ZB_HIZ_OFFSET                       0x4f44
+
+/* Hierarchical Z Write Index */
+#define R300_ZB_HIZ_WRINDEX                      0x4f48
+
+/* Hierarchical Z Data */
+#define R300_ZB_HIZ_DWORD                        0x4f4c
+
+/* Hierarchical Z Read Index */
+#define R300_ZB_HIZ_RDINDEX                      0x4f50
+
+/* Hierarchical Z Pitch */
+#define R300_ZB_HIZ_PITCH                        0x4f54
+
+/* Z Buffer Z Pass Counter Data */
+#define R300_ZB_ZPASS_DATA                       0x4f58
+
+/* Z Buffer Z Pass Counter Address */
+#define R300_ZB_ZPASS_ADDR                       0x4f5c
+
+/* Depth buffer X and Y coordinate offset */
+#define R300_ZB_DEPTHXY_OFFSET                   0x4f60
+#	define R300_DEPTHX_OFFSET_SHIFT  1
+#	define R300_DEPTHX_OFFSET_MASK   0x000007FE
+#	define R300_DEPTHY_OFFSET_SHIFT  17
+#	define R300_DEPTHY_OFFSET_MASK   0x07FE0000
+
+/* Sets the fifo sizes */
+#define R500_ZB_FIFO_SIZE                        0x4fd0
+#	define R500_OP_FIFO_SIZE_FULL   (0 << 0)
+#	define R500_OP_FIFO_SIZE_HALF   (1 << 0)
+#	define R500_OP_FIFO_SIZE_QUATER (2 << 0)
+#	define R500_OP_FIFO_SIZE_EIGTHS (4 << 0)
+
+/* Stencil Reference Value and Mask for backfacing quads */
+/* R300_ZB_STENCILREFMASK handles front face */
+#define R500_ZB_STENCILREFMASK_BF                0x4fd4
+#	define R500_STENCILREF_SHIFT       0
+#	define R500_STENCILREF_MASK        0x000000ff
+#	define R500_STENCILMASK_SHIFT      8
+#	define R500_STENCILMASK_MASK       0x0000ff00
+#	define R500_STENCILWRITEMASK_SHIFT 16
+#	define R500_STENCILWRITEMASK_MASK  0x00ff0000
+
+/**
+ * \defgroup R3XX_R5XX_PROGRAMMABLE_VERTEX_SHADER_DESCRIPTION R3XX-R5XX PROGRAMMABLE VERTEX SHADER DESCRIPTION
+ *
+ * The PVS_DST_MATH_INST is used to identify whether the instruction is a Vector
+ * Engine instruction or a Math Engine instruction.
  */
-#define R300_VPI_IN_SELECT_X    0
-#define R300_VPI_IN_SELECT_Y    1
-#define R300_VPI_IN_SELECT_Z    2
-#define R300_VPI_IN_SELECT_W    3
-#define R300_VPI_IN_SELECT_ZERO 4
-#define R300_VPI_IN_SELECT_ONE  5
-#define R300_VPI_IN_SELECT_MASK 7
-
-#define R300_VPI_IN_X_SHIFT                     13
-#define R300_VPI_IN_Y_SHIFT                     16
-#define R300_VPI_IN_Z_SHIFT                     19
-#define R300_VPI_IN_W_SHIFT                     22
-
-#define R300_VPI_IN_NEG_X                       (1 << 25)
-#define R300_VPI_IN_NEG_Y                       (1 << 26)
-#define R300_VPI_IN_NEG_Z                       (1 << 27)
-#define R300_VPI_IN_NEG_W                       (1 << 28)
-/* END: Vertex program instruction set */
+
+/*\{*/
+
+enum {
+	/* R3XX */
+	VECTOR_NO_OP			= 0,
+	VE_DOT_PRODUCT			= 1,
+	VE_MULTIPLY			= 2,
+	VE_ADD				= 3,
+	VE_MULTIPLY_ADD			= 4,
+	VE_DISTANCE_VECTOR		= 5,
+	VE_FRACTION			= 6,
+	VE_MAXIMUM			= 7,
+	VE_MINIMUM			= 8,
+	VE_SET_GREATER_THAN_EQUAL	= 9,
+	VE_SET_LESS_THAN		= 10,
+	VE_MULTIPLYX2_ADD		= 11,
+	VE_MULTIPLY_CLAMP		= 12,
+	VE_FLT2FIX_DX			= 13,
+	VE_FLT2FIX_DX_RND		= 14,
+	/* R5XX */
+	VE_PRED_SET_EQ_PUSH		= 15,
+	VE_PRED_SET_GT_PUSH		= 16,
+	VE_PRED_SET_GTE_PUSH		= 17,
+	VE_PRED_SET_NEQ_PUSH		= 18,
+	VE_COND_WRITE_EQ		= 19,
+	VE_COND_WRITE_GT		= 20,
+	VE_COND_WRITE_GTE		= 21,
+	VE_COND_WRITE_NEQ		= 22,
+	VE_COND_MUX_EQ			= 23,
+	VE_COND_MUX_GT			= 24,
+	VE_COND_MUX_GTE			= 25,
+	VE_SET_GREATER_THAN		= 26,
+	VE_SET_EQUAL			= 27,
+	VE_SET_NOT_EQUAL		= 28,
+};
+
+enum {
+	/* R3XX */
+	MATH_NO_OP			= 0,
+	ME_EXP_BASE2_DX			= 1,
+	ME_LOG_BASE2_DX			= 2,
+	ME_EXP_BASEE_FF			= 3,
+	ME_LIGHT_COEFF_DX		= 4,
+	ME_POWER_FUNC_FF		= 5,
+	ME_RECIP_DX			= 6,
+	ME_RECIP_FF			= 7,
+	ME_RECIP_SQRT_DX		= 8,
+	ME_RECIP_SQRT_FF		= 9,
+	ME_MULTIPLY			= 10,
+	ME_EXP_BASE2_FULL_DX		= 11,
+	ME_LOG_BASE2_FULL_DX		= 12,
+	ME_POWER_FUNC_FF_CLAMP_B	= 13,
+	ME_POWER_FUNC_FF_CLAMP_B1	= 14,
+	ME_POWER_FUNC_FF_CLAMP_01	= 15,
+	ME_SIN				= 16,
+	ME_COS				= 17,
+	/* R5XX */
+	ME_LOG_BASE2_IEEE		= 18,
+	ME_RECIP_IEEE			= 19,
+	ME_RECIP_SQRT_IEEE		= 20,
+	ME_PRED_SET_EQ			= 21,
+	ME_PRED_SET_GT			= 22,
+	ME_PRED_SET_GTE			= 23,
+	ME_PRED_SET_NEQ			= 24,
+	ME_PRED_SET_CLR			= 25,
+	ME_PRED_SET_INV			= 26,
+	ME_PRED_SET_POP			= 27,
+	ME_PRED_SET_RESTORE		= 28,
+};
+
+enum {
+	/* R3XX */
+	PVS_MACRO_OP_2CLK_MADD		= 0,
+	PVS_MACRO_OP_2CLK_M2X_ADD	= 1,
+};
+
+enum {
+	PVS_SRC_REG_TEMPORARY		= 0,	/* Intermediate Storage */
+	PVS_SRC_REG_INPUT		= 1,	/* Input Vertex Storage */
+	PVS_SRC_REG_CONSTANT		= 2,	/* Constant State Storage */
+	PVS_SRC_REG_ALT_TEMPORARY	= 3,	/* Alternate Intermediate Storage */
+};
+
+enum {
+	PVS_DST_REG_TEMPORARY		= 0,	/* Intermediate Storage */
+	PVS_DST_REG_A0			= 1,	/* Address Register Storage */
+	PVS_DST_REG_OUT			= 2,	/* Output Memory. Used for all outputs */
+	PVS_DST_REG_OUT_REPL_X		= 3,	/* Output Memory & Replicate X to all channels */
+	PVS_DST_REG_ALT_TEMPORARY	= 4,	/* Alternate Intermediate Storage */
+	PVS_DST_REG_INPUT		= 5,	/* Output Memory & Replicate X to all channels */
+};
+
+enum {
+	PVS_SRC_SELECT_X		= 0,	/* Select X Component */
+	PVS_SRC_SELECT_Y		= 1,	/* Select Y Component */
+	PVS_SRC_SELECT_Z		= 2,	/* Select Z Component */
+	PVS_SRC_SELECT_W		= 3,	/* Select W Component */
+	PVS_SRC_SELECT_FORCE_0		= 4,	/* Force Component to 0.0 */
+	PVS_SRC_SELECT_FORCE_1		= 5,	/* Force Component to 1.0 */
+};
+
+/* PVS Opcode & Destination Operand Description */
+
+enum {
+	PVS_DST_OPCODE_MASK		= 0x3f,
+	PVS_DST_OPCODE_SHIFT		= 0,
+	PVS_DST_MATH_INST_MASK		= 0x1,
+	PVS_DST_MATH_INST_SHIFT		= 6,
+	PVS_DST_MACRO_INST_MASK		= 0x1,
+	PVS_DST_MACRO_INST_SHIFT	= 7,
+	PVS_DST_REG_TYPE_MASK		= 0xf,
+	PVS_DST_REG_TYPE_SHIFT		= 8,
+	PVS_DST_ADDR_MODE_1_MASK	= 0x1,
+	PVS_DST_ADDR_MODE_1_SHIFT	= 12,
+	PVS_DST_OFFSET_MASK		= 0x7f,
+	PVS_DST_OFFSET_SHIFT		= 13,
+	PVS_DST_WE_X_MASK		= 0x1,
+	PVS_DST_WE_X_SHIFT		= 20,
+	PVS_DST_WE_Y_MASK		= 0x1,
+	PVS_DST_WE_Y_SHIFT		= 21,
+	PVS_DST_WE_Z_MASK		= 0x1,
+	PVS_DST_WE_Z_SHIFT		= 22,
+	PVS_DST_WE_W_MASK		= 0x1,
+	PVS_DST_WE_W_SHIFT		= 23,
+	PVS_DST_VE_SAT_MASK		= 0x1,
+	PVS_DST_VE_SAT_SHIFT		= 24,
+	PVS_DST_ME_SAT_MASK		= 0x1,
+	PVS_DST_ME_SAT_SHIFT		= 25,
+	PVS_DST_PRED_ENABLE_MASK	= 0x1,
+	PVS_DST_PRED_ENABLE_SHIFT	= 26,
+	PVS_DST_PRED_SENSE_MASK		= 0x1,
+	PVS_DST_PRED_SENSE_SHIFT	= 27,
+	PVS_DST_DUAL_MATH_OP_MASK	= 0x3,
+	PVS_DST_DUAL_MATH_OP_SHIFT	= 27,
+	PVS_DST_ADDR_SEL_MASK		= 0x3,
+	PVS_DST_ADDR_SEL_SHIFT		= 29,
+	PVS_DST_ADDR_MODE_0_MASK	= 0x1,
+	PVS_DST_ADDR_MODE_0_SHIFT	= 31,
+};
+
+/* PVS Source Operand Description */
+
+enum {
+	PVS_SRC_REG_TYPE_MASK		= 0x3,
+	PVS_SRC_REG_TYPE_SHIFT		= 0,
+	SPARE_0_MASK			= 0x1,
+	SPARE_0_SHIFT			= 2,
+	PVS_SRC_ABS_XYZW_MASK		= 0x1,
+	PVS_SRC_ABS_XYZW_SHIFT		= 3,
+	PVS_SRC_ADDR_MODE_0_MASK	= 0x1,
+	PVS_SRC_ADDR_MODE_0_SHIFT	= 4,
+	PVS_SRC_OFFSET_MASK		= 0xff,
+	PVS_SRC_OFFSET_SHIFT		= 5,
+	PVS_SRC_SWIZZLE_X_MASK		= 0x7,
+	PVS_SRC_SWIZZLE_X_SHIFT		= 13,
+	PVS_SRC_SWIZZLE_Y_MASK		= 0x7,
+	PVS_SRC_SWIZZLE_Y_SHIFT		= 16,
+	PVS_SRC_SWIZZLE_Z_MASK		= 0x7,
+	PVS_SRC_SWIZZLE_Z_SHIFT		= 19,
+	PVS_SRC_SWIZZLE_W_MASK		= 0x7,
+	PVS_SRC_SWIZZLE_W_SHIFT		= 22,
+	PVS_SRC_MODIFIER_X_MASK		= 0x1,
+	PVS_SRC_MODIFIER_X_SHIFT	= 25,
+	PVS_SRC_MODIFIER_Y_MASK		= 0x1,
+	PVS_SRC_MODIFIER_Y_SHIFT	= 26,
+	PVS_SRC_MODIFIER_Z_MASK		= 0x1,
+	PVS_SRC_MODIFIER_Z_SHIFT	= 27,
+	PVS_SRC_MODIFIER_W_MASK		= 0x1,
+	PVS_SRC_MODIFIER_W_SHIFT	= 28,
+	PVS_SRC_ADDR_SEL_MASK		= 0x3,
+	PVS_SRC_ADDR_SEL_SHIFT		= 29,
+	PVS_SRC_ADDR_MODE_1_MASK	= 0x0,
+	PVS_SRC_ADDR_MODE_1_SHIFT	= 32,
+};
+
+/*\}*/
 
 /* BEGIN: Packet 3 commands */
 
@@ -1601,13 +2679,511 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define R300_PRIM_NUM_VERTICES_SHIFT            16
 #define R300_PRIM_NUM_VERTICES_MASK             0xffff
 
+
+
+/*
+ * The R500 unified shader (US) registers come in banks of 512 each, one
+ * for each instruction slot in the shader.  You can't touch them directly.
+ * R500_US_VECTOR_INDEX() sets the base instruction to modify; successive
+ * writes to R500_GA_US_VECTOR_DATA autoincrement the index after the
+ * instruction is fully specified.
+ */
+#define R500_US_ALU_ALPHA_INST_0			0xa800
+#   define R500_ALPHA_OP_MAD				0
+#   define R500_ALPHA_OP_DP				1
+#   define R500_ALPHA_OP_MIN				2
+#   define R500_ALPHA_OP_MAX				3
+/* #define R500_ALPHA_OP_RESERVED			4 */
+#   define R500_ALPHA_OP_CND				5
+#   define R500_ALPHA_OP_CMP				6
+#   define R500_ALPHA_OP_FRC				7
+#   define R500_ALPHA_OP_EX2				8
+#   define R500_ALPHA_OP_LN2				9
+#   define R500_ALPHA_OP_RCP				10
+#   define R500_ALPHA_OP_RSQ				11
+#   define R500_ALPHA_OP_SIN				12
+#   define R500_ALPHA_OP_COS				13
+#   define R500_ALPHA_OP_MDH				14
+#   define R500_ALPHA_OP_MDV				15
+#   define R500_ALPHA_ADDRD(x)				(x << 4)
+#   define R500_ALPHA_ADDRD_REL				(1 << 11)
+#  define R500_ALPHA_SEL_A_SHIFT			12
+#   define R500_ALPHA_SEL_A_SRC0			(0 << 12)
+#   define R500_ALPHA_SEL_A_SRC1			(1 << 12)
+#   define R500_ALPHA_SEL_A_SRC2			(2 << 12)
+#   define R500_ALPHA_SEL_A_SRCP			(3 << 12)
+#   define R500_ALPHA_SWIZ_A_R				(0 << 14)
+#   define R500_ALPHA_SWIZ_A_G				(1 << 14)
+#   define R500_ALPHA_SWIZ_A_B				(2 << 14)
+#   define R500_ALPHA_SWIZ_A_A				(3 << 14)
+#   define R500_ALPHA_SWIZ_A_0				(4 << 14)
+#   define R500_ALPHA_SWIZ_A_HALF			(5 << 14)
+#   define R500_ALPHA_SWIZ_A_1				(6 << 14)
+/* #define R500_ALPHA_SWIZ_A_UNUSED			(7 << 14) */
+#   define R500_ALPHA_MOD_A_NOP				(0 << 17)
+#   define R500_ALPHA_MOD_A_NEG				(1 << 17)
+#   define R500_ALPHA_MOD_A_ABS				(2 << 17)
+#   define R500_ALPHA_MOD_A_NAB				(3 << 17)
+#  define R500_ALPHA_SEL_B_SHIFT			19
+#   define R500_ALPHA_SEL_B_SRC0			(0 << 19)
+#   define R500_ALPHA_SEL_B_SRC1			(1 << 19)
+#   define R500_ALPHA_SEL_B_SRC2			(2 << 19)
+#   define R500_ALPHA_SEL_B_SRCP			(3 << 19)
+#   define R500_ALPHA_SWIZ_B_R				(0 << 21)
+#   define R500_ALPHA_SWIZ_B_G				(1 << 21)
+#   define R500_ALPHA_SWIZ_B_B				(2 << 21)
+#   define R500_ALPHA_SWIZ_B_A				(3 << 21)
+#   define R500_ALPHA_SWIZ_B_0				(4 << 21)
+#   define R500_ALPHA_SWIZ_B_HALF			(5 << 21)
+#   define R500_ALPHA_SWIZ_B_1				(6 << 21)
+/* #define R500_ALPHA_SWIZ_B_UNUSED			(7 << 21) */
+#   define R500_ALPHA_MOD_B_NOP				(0 << 24)
+#   define R500_ALPHA_MOD_B_NEG				(1 << 24)
+#   define R500_ALPHA_MOD_B_ABS				(2 << 24)
+#   define R500_ALPHA_MOD_B_NAB				(3 << 24)
+#   define R500_ALPHA_OMOD_IDENTITY			(0 << 26)
+#   define R500_ALPHA_OMOD_MUL_2			(1 << 26)
+#   define R500_ALPHA_OMOD_MUL_4			(2 << 26)
+#   define R500_ALPHA_OMOD_MUL_8			(3 << 26)
+#   define R500_ALPHA_OMOD_DIV_2			(4 << 26)
+#   define R500_ALPHA_OMOD_DIV_4			(5 << 26)
+#   define R500_ALPHA_OMOD_DIV_8			(6 << 26)
+#   define R500_ALPHA_OMOD_DISABLE			(7 << 26)
+#   define R500_ALPHA_TARGET(x)				(x << 29)
+#   define R500_ALPHA_W_OMASK				(1 << 31)
+#define R500_US_ALU_ALPHA_ADDR_0			0x9800
+#   define R500_ALPHA_ADDR0(x)				(x << 0)
+#   define R500_ALPHA_ADDR0_CONST			(1 << 8)
+#   define R500_ALPHA_ADDR0_REL				(1 << 9)
+#   define R500_ALPHA_ADDR1(x)				(x << 10)
+#   define R500_ALPHA_ADDR1_CONST			(1 << 18)
+#   define R500_ALPHA_ADDR1_REL				(1 << 19)
+#   define R500_ALPHA_ADDR2(x)				(x << 20)
+#   define R500_ALPHA_ADDR2_CONST			(1 << 28)
+#   define R500_ALPHA_ADDR2_REL				(1 << 29)
+#   define R500_ALPHA_SRCP_OP_1_MINUS_2A0		(0 << 30)
+#   define R500_ALPHA_SRCP_OP_A1_MINUS_A0		(1 << 30)
+#   define R500_ALPHA_SRCP_OP_A1_PLUS_A0		(2 << 30)
+#   define R500_ALPHA_SRCP_OP_1_MINUS_A0		(3 << 30)
+#define R500_US_ALU_RGBA_INST_0				0xb000
+#   define R500_ALU_RGBA_OP_MAD				(0 << 0)
+#   define R500_ALU_RGBA_OP_DP3				(1 << 0)
+#   define R500_ALU_RGBA_OP_DP4				(2 << 0)
+#   define R500_ALU_RGBA_OP_D2A				(3 << 0)
+#   define R500_ALU_RGBA_OP_MIN				(4 << 0)
+#   define R500_ALU_RGBA_OP_MAX				(5 << 0)
+/* #define R500_ALU_RGBA_OP_RESERVED			(6 << 0) */
+#   define R500_ALU_RGBA_OP_CND				(7 << 0)
+#   define R500_ALU_RGBA_OP_CMP				(8 << 0)
+#   define R500_ALU_RGBA_OP_FRC				(9 << 0)
+#   define R500_ALU_RGBA_OP_SOP				(10 << 0)
+#   define R500_ALU_RGBA_OP_MDH				(11 << 0)
+#   define R500_ALU_RGBA_OP_MDV				(12 << 0)
+#   define R500_ALU_RGBA_ADDRD(x)			(x << 4)
+#   define R500_ALU_RGBA_ADDRD_REL			(1 << 11)
+#  define R500_ALU_RGBA_SEL_C_SHIFT			12
+#   define R500_ALU_RGBA_SEL_C_SRC0			(0 << 12)
+#   define R500_ALU_RGBA_SEL_C_SRC1			(1 << 12)
+#   define R500_ALU_RGBA_SEL_C_SRC2			(2 << 12)
+#   define R500_ALU_RGBA_SEL_C_SRCP			(3 << 12)
+#   define R500_ALU_RGBA_R_SWIZ_R			(0 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_G			(1 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_B			(2 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_A			(3 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_0			(4 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_HALF			(5 << 14)
+#   define R500_ALU_RGBA_R_SWIZ_1			(6 << 14)
+/* #define R500_ALU_RGBA_R_SWIZ_UNUSED			(7 << 14) */
+#   define R500_ALU_RGBA_G_SWIZ_R			(0 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_G			(1 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_B			(2 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_A			(3 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_0			(4 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_HALF			(5 << 17)
+#   define R500_ALU_RGBA_G_SWIZ_1			(6 << 17)
+/* #define R500_ALU_RGBA_G_SWIZ_UNUSED			(7 << 17) */
+#   define R500_ALU_RGBA_B_SWIZ_R			(0 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_G			(1 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_B			(2 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_A			(3 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_0			(4 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_HALF			(5 << 20)
+#   define R500_ALU_RGBA_B_SWIZ_1			(6 << 20)
+/* #define R500_ALU_RGBA_B_SWIZ_UNUSED			(7 << 20) */
+#   define R500_ALU_RGBA_MOD_C_NOP			(0 << 23)
+#   define R500_ALU_RGBA_MOD_C_NEG			(1 << 23)
+#   define R500_ALU_RGBA_MOD_C_ABS			(2 << 23)
+#   define R500_ALU_RGBA_MOD_C_NAB			(3 << 23)
+#  define R500_ALU_RGBA_ALPHA_SEL_C_SHIFT		25
+#   define R500_ALU_RGBA_ALPHA_SEL_C_SRC0		(0 << 25)
+#   define R500_ALU_RGBA_ALPHA_SEL_C_SRC1		(1 << 25)
+#   define R500_ALU_RGBA_ALPHA_SEL_C_SRC2		(2 << 25)
+#   define R500_ALU_RGBA_ALPHA_SEL_C_SRCP		(3 << 25)
+#   define R500_ALU_RGBA_A_SWIZ_R			(0 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_G			(1 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_B			(2 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_A			(3 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_0			(4 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_HALF			(5 << 27)
+#   define R500_ALU_RGBA_A_SWIZ_1			(6 << 27)
+/* #define R500_ALU_RGBA_A_SWIZ_UNUSED			(7 << 27) */
+#   define R500_ALU_RGBA_ALPHA_MOD_C_NOP		(0 << 30)
+#   define R500_ALU_RGBA_ALPHA_MOD_C_NEG		(1 << 30)
+#   define R500_ALU_RGBA_ALPHA_MOD_C_ABS		(2 << 30)
+#   define R500_ALU_RGBA_ALPHA_MOD_C_NAB		(3 << 30)
+#define R500_US_ALU_RGB_INST_0				0xa000
+#  define R500_ALU_RGB_SEL_A_SHIFT			0
+#   define R500_ALU_RGB_SEL_A_SRC0			(0 << 0)
+#   define R500_ALU_RGB_SEL_A_SRC1			(1 << 0)
+#   define R500_ALU_RGB_SEL_A_SRC2			(2 << 0)
+#   define R500_ALU_RGB_SEL_A_SRCP			(3 << 0)
+#   define R500_ALU_RGB_R_SWIZ_A_R			(0 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_G			(1 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_B			(2 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_A			(3 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_0			(4 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_HALF			(5 << 2)
+#   define R500_ALU_RGB_R_SWIZ_A_1			(6 << 2)
+/* #define R500_ALU_RGB_R_SWIZ_A_UNUSED			(7 << 2) */
+#   define R500_ALU_RGB_G_SWIZ_A_R			(0 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_G			(1 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_B			(2 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_A			(3 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_0			(4 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_HALF			(5 << 5)
+#   define R500_ALU_RGB_G_SWIZ_A_1			(6 << 5)
+/* #define R500_ALU_RGB_G_SWIZ_A_UNUSED			(7 << 5) */
+#   define R500_ALU_RGB_B_SWIZ_A_R			(0 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_G			(1 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_B			(2 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_A			(3 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_0			(4 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_HALF			(5 << 8)
+#   define R500_ALU_RGB_B_SWIZ_A_1			(6 << 8)
+/* #define R500_ALU_RGB_B_SWIZ_A_UNUSED			(7 << 8) */
+#   define R500_ALU_RGB_MOD_A_NOP			(0 << 11)
+#   define R500_ALU_RGB_MOD_A_NEG			(1 << 11)
+#   define R500_ALU_RGB_MOD_A_ABS			(2 << 11)
+#   define R500_ALU_RGB_MOD_A_NAB			(3 << 11)
+#  define R500_ALU_RGB_SEL_B_SHIFT			13
+#   define R500_ALU_RGB_SEL_B_SRC0			(0 << 13)
+#   define R500_ALU_RGB_SEL_B_SRC1			(1 << 13)
+#   define R500_ALU_RGB_SEL_B_SRC2			(2 << 13)
+#   define R500_ALU_RGB_SEL_B_SRCP			(3 << 13)
+#   define R500_ALU_RGB_R_SWIZ_B_R			(0 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_G			(1 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_B			(2 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_A			(3 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_0			(4 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_HALF			(5 << 15)
+#   define R500_ALU_RGB_R_SWIZ_B_1			(6 << 15)
+/* #define R500_ALU_RGB_R_SWIZ_B_UNUSED			(7 << 15) */
+#   define R500_ALU_RGB_G_SWIZ_B_R			(0 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_G			(1 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_B			(2 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_A			(3 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_0			(4 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_HALF			(5 << 18)
+#   define R500_ALU_RGB_G_SWIZ_B_1			(6 << 18)
+/* #define R500_ALU_RGB_G_SWIZ_B_UNUSED			(7 << 18) */
+#   define R500_ALU_RGB_B_SWIZ_B_R			(0 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_G			(1 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_B			(2 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_A			(3 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_0			(4 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_HALF			(5 << 21)
+#   define R500_ALU_RGB_B_SWIZ_B_1			(6 << 21)
+/* #define R500_ALU_RGB_B_SWIZ_B_UNUSED			(7 << 21) */
+#   define R500_ALU_RGB_MOD_B_NOP			(0 << 24)
+#   define R500_ALU_RGB_MOD_B_NEG			(1 << 24)
+#   define R500_ALU_RGB_MOD_B_ABS			(2 << 24)
+#   define R500_ALU_RGB_MOD_B_NAB			(3 << 24)
+#   define R500_ALU_RGB_OMOD_IDENTITY			(0 << 26)
+#   define R500_ALU_RGB_OMOD_MUL_2			(1 << 26)
+#   define R500_ALU_RGB_OMOD_MUL_4			(2 << 26)
+#   define R500_ALU_RGB_OMOD_MUL_8			(3 << 26)
+#   define R500_ALU_RGB_OMOD_DIV_2			(4 << 26)
+#   define R500_ALU_RGB_OMOD_DIV_4			(5 << 26)
+#   define R500_ALU_RGB_OMOD_DIV_8			(6 << 26)
+#   define R500_ALU_RGB_OMOD_DISABLE			(7 << 26)
+#   define R500_ALU_RGB_TARGET(x)			(x << 29)
+#   define R500_ALU_RGB_WMASK				(1 << 31)
+#define R500_US_ALU_RGB_ADDR_0				0x9000
+#   define R500_RGB_ADDR0(x)				(x << 0)
+#   define R500_RGB_ADDR0_CONST				(1 << 8)
+#   define R500_RGB_ADDR0_REL				(1 << 9)
+#   define R500_RGB_ADDR1(x)				(x << 10)
+#   define R500_RGB_ADDR1_CONST				(1 << 18)
+#   define R500_RGB_ADDR1_REL				(1 << 19)
+#   define R500_RGB_ADDR2(x)				(x << 20)
+#   define R500_RGB_ADDR2_CONST				(1 << 28)
+#   define R500_RGB_ADDR2_REL				(1 << 29)
+#   define R500_RGB_SRCP_OP_1_MINUS_2RGB0		(0 << 30)
+#   define R500_RGB_SRCP_OP_RGB1_MINUS_RGB0		(1 << 30)
+#   define R500_RGB_SRCP_OP_RGB1_PLUS_RGB0		(2 << 30)
+#   define R500_RGB_SRCP_OP_1_MINUS_RGB0		(3 << 30)
+#define R500_US_CMN_INST_0				0xb800
+#  define R500_INST_TYPE_MASK				(3 << 0)
+#   define R500_INST_TYPE_ALU				(0 << 0)
+#   define R500_INST_TYPE_OUT				(1 << 0)
+#   define R500_INST_TYPE_FC				(2 << 0)
+#   define R500_INST_TYPE_TEX				(3 << 0)
+#   define R500_INST_TEX_SEM_WAIT			(1 << 2)
+#   define R500_INST_RGB_PRED_SEL_NONE			(0 << 3)
+#   define R500_INST_RGB_PRED_SEL_RGBA			(1 << 3)
+#   define R500_INST_RGB_PRED_SEL_RRRR			(2 << 3)
+#   define R500_INST_RGB_PRED_SEL_GGGG			(3 << 3)
+#   define R500_INST_RGB_PRED_SEL_BBBB			(4 << 3)
+#   define R500_INST_RGB_PRED_SEL_AAAA			(5 << 3)
+#   define R500_INST_RGB_PRED_INV			(1 << 6)
+#   define R500_INST_WRITE_INACTIVE			(1 << 7)
+#   define R500_INST_LAST				(1 << 8)
+#   define R500_INST_NOP				(1 << 9)
+#   define R500_INST_ALU_WAIT				(1 << 10)
+#   define R500_INST_RGB_WMASK_R			(1 << 11)
+#   define R500_INST_RGB_WMASK_G			(1 << 12)
+#   define R500_INST_RGB_WMASK_B			(1 << 13)
+#   define R500_INST_ALPHA_WMASK			(1 << 14)
+#   define R500_INST_RGB_OMASK_R			(1 << 15)
+#   define R500_INST_RGB_OMASK_G			(1 << 16)
+#   define R500_INST_RGB_OMASK_B			(1 << 17)
+#   define R500_INST_ALPHA_OMASK			(1 << 18)
+#   define R500_INST_RGB_CLAMP				(1 << 19)
+#   define R500_INST_ALPHA_CLAMP			(1 << 20)
+#   define R500_INST_ALU_RESULT_SEL			(1 << 21)
+#   define R500_INST_ALPHA_PRED_INV			(1 << 22)
+#   define R500_INST_ALU_RESULT_OP_EQ			(0 << 23)
+#   define R500_INST_ALU_RESULT_OP_LT			(1 << 23)
+#   define R500_INST_ALU_RESULT_OP_GE			(2 << 23)
+#   define R500_INST_ALU_RESULT_OP_NE			(3 << 23)
+#   define R500_INST_ALPHA_PRED_SEL_NONE		(0 << 25)
+#   define R500_INST_ALPHA_PRED_SEL_RGBA		(1 << 25)
+#   define R500_INST_ALPHA_PRED_SEL_RRRR		(2 << 25)
+#   define R500_INST_ALPHA_PRED_SEL_GGGG		(3 << 25)
+#   define R500_INST_ALPHA_PRED_SEL_BBBB		(4 << 25)
+#   define R500_INST_ALPHA_PRED_SEL_AAAA		(5 << 25)
+/* XXX next four are kind of guessed */
+#   define R500_INST_STAT_WE_R				(1 << 28)
+#   define R500_INST_STAT_WE_G				(1 << 29)
+#   define R500_INST_STAT_WE_B				(1 << 30)
+#   define R500_INST_STAT_WE_A				(1 << 31)
+
+/* note that these are 8 bit lengths, despite the offsets, at least for R500 */
+#define R500_US_CODE_ADDR				0x4630
+#   define R500_US_CODE_START_ADDR(x)			(x << 0)
+#   define R500_US_CODE_END_ADDR(x)			(x << 16)
+#define R500_US_CODE_OFFSET				0x4638
+#   define R500_US_CODE_OFFSET_ADDR(x)			(x << 0)
+#define R500_US_CODE_RANGE				0x4634
+#   define R500_US_CODE_RANGE_ADDR(x)			(x << 0)
+#   define R500_US_CODE_RANGE_SIZE(x)			(x << 16)
+#define R500_US_CONFIG					0x4600
+#   define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO		(1 << 1)
+#define R500_US_FC_ADDR_0				0xa000
+#   define R500_FC_BOOL_ADDR(x)				(x << 0)
+#   define R500_FC_INT_ADDR(x)				(x << 8)
+#   define R500_FC_JUMP_ADDR(x)				(x << 16)
+#   define R500_FC_JUMP_GLOBAL				(1 << 31)
+#define R500_US_FC_BOOL_CONST				0x4620
+#   define R500_FC_KBOOL(x)				(x)
+#define R500_US_FC_CTRL					0x4624
+#   define R500_FC_TEST_EN				(1 << 30)
+#   define R500_FC_FULL_FC_EN				(1 << 31)
+#define R500_US_FC_INST_0				0x9800
+#   define R500_FC_OP_JUMP				(0 << 0)
+#   define R500_FC_OP_LOOP				(1 << 0)
+#   define R500_FC_OP_ENDLOOP				(2 << 0)
+#   define R500_FC_OP_REP				(3 << 0)
+#   define R500_FC_OP_ENDREP				(4 << 0)
+#   define R500_FC_OP_BREAKLOOP				(5 << 0)
+#   define R500_FC_OP_BREAKREP				(6 << 0)
+#   define R500_FC_OP_CONTINUE				(7 << 0)
+#   define R500_FC_B_ELSE				(1 << 4)
+#   define R500_FC_JUMP_ANY				(1 << 5)
+#   define R500_FC_A_OP_NONE				(0 << 6)
+#   define R500_FC_A_OP_POP				(1 << 6)
+#   define R500_FC_A_OP_PUSH				(2 << 6)
+#   define R500_FC_JUMP_FUNC(x)				(x << 8)
+#   define R500_FC_B_POP_CNT(x)				(x << 16)
+#   define R500_FC_B_OP0_NONE				(0 << 24)
+#   define R500_FC_B_OP0_DECR				(1 << 24)
+#   define R500_FC_B_OP0_INCR				(2 << 24)
+#   define R500_FC_B_OP1_DECR				(0 << 26)
+#   define R500_FC_B_OP1_NONE				(1 << 26)
+#   define R500_FC_B_OP1_INCR				(2 << 26)
+#   define R500_FC_IGNORE_UNCOVERED			(1 << 28)
+#define R500_US_FC_INT_CONST_0				0x4c00
+#   define R500_FC_INT_CONST_KR(x)			(x << 0)
+#   define R500_FC_INT_CONST_KG(x)			(x << 8)
+#   define R500_FC_INT_CONST_KB(x)			(x << 16)
+/* _0 through _15 */
+#define R500_US_FORMAT0_0				0x4640
+#   define R500_FORMAT_TXWIDTH(x)			(x << 0)
+#   define R500_FORMAT_TXHEIGHT(x)			(x << 11)
+#   define R500_FORMAT_TXDEPTH(x)			(x << 22)
+/* _0 through _3 */
+#define R500_US_OUT_FMT_0				0x46a4
+#   define R500_OUT_FMT_C4_8				(0 << 0)
+#   define R500_OUT_FMT_C4_10				(1 << 0)
+#   define R500_OUT_FMT_C4_10_GAMMA			(2 << 0)
+#   define R500_OUT_FMT_C_16				(3 << 0)
+#   define R500_OUT_FMT_C2_16				(4 << 0)
+#   define R500_OUT_FMT_C4_16				(5 << 0)
+#   define R500_OUT_FMT_C_16_MPEG			(6 << 0)
+#   define R500_OUT_FMT_C2_16_MPEG			(7 << 0)
+#   define R500_OUT_FMT_C2_4				(8 << 0)
+#   define R500_OUT_FMT_C_3_3_2				(9 << 0)
+#   define R500_OUT_FMT_C_6_5_6				(10 << 0)
+#   define R500_OUT_FMT_C_11_11_10			(11 << 0)
+#   define R500_OUT_FMT_C_10_11_11			(12 << 0)
+#   define R500_OUT_FMT_C_2_10_10_10			(13 << 0)
+/* #define R500_OUT_FMT_RESERVED			(14 << 0) */
+#   define R500_OUT_FMT_UNUSED				(15 << 0)
+#   define R500_OUT_FMT_C_16_FP				(16 << 0)
+#   define R500_OUT_FMT_C2_16_FP			(17 << 0)
+#   define R500_OUT_FMT_C4_16_FP			(18 << 0)
+#   define R500_OUT_FMT_C_32_FP				(19 << 0)
+#   define R500_OUT_FMT_C2_32_FP			(20 << 0)
+#   define R500_OUT_FMT_C4_32_FP			(21 << 0)
+#   define R500_C0_SEL_A				(0 << 8)
+#   define R500_C0_SEL_R				(1 << 8)
+#   define R500_C0_SEL_G				(2 << 8)
+#   define R500_C0_SEL_B				(3 << 8)
+#   define R500_C1_SEL_A				(0 << 10)
+#   define R500_C1_SEL_R				(1 << 10)
+#   define R500_C1_SEL_G				(2 << 10)
+#   define R500_C1_SEL_B				(3 << 10)
+#   define R500_C2_SEL_A				(0 << 12)
+#   define R500_C2_SEL_R				(1 << 12)
+#   define R500_C2_SEL_G				(2 << 12)
+#   define R500_C2_SEL_B				(3 << 12)
+#   define R500_C3_SEL_A				(0 << 14)
+#   define R500_C3_SEL_R				(1 << 14)
+#   define R500_C3_SEL_G				(2 << 14)
+#   define R500_C3_SEL_B				(3 << 14)
+#   define R500_OUT_SIGN(x)				(x << 16)
+#   define R500_ROUND_ADJ				(1 << 20)
+#define R500_US_PIXSIZE					0x4604
+#   define R500_PIX_SIZE(x)				(x)
+#define R500_US_TEX_ADDR_0				0x9800
+#   define R500_TEX_SRC_ADDR(x)				(x << 0)
+#   define R500_TEX_SRC_ADDR_REL			(1 << 7)
+#   define R500_TEX_SRC_S_SWIZ_R			(0 << 8)
+#   define R500_TEX_SRC_S_SWIZ_G			(1 << 8)
+#   define R500_TEX_SRC_S_SWIZ_B			(2 << 8)
+#   define R500_TEX_SRC_S_SWIZ_A			(3 << 8)
+#   define R500_TEX_SRC_T_SWIZ_R			(0 << 10)
+#   define R500_TEX_SRC_T_SWIZ_G			(1 << 10)
+#   define R500_TEX_SRC_T_SWIZ_B			(2 << 10)
+#   define R500_TEX_SRC_T_SWIZ_A			(3 << 10)
+#   define R500_TEX_SRC_R_SWIZ_R			(0 << 12)
+#   define R500_TEX_SRC_R_SWIZ_G			(1 << 12)
+#   define R500_TEX_SRC_R_SWIZ_B			(2 << 12)
+#   define R500_TEX_SRC_R_SWIZ_A			(3 << 12)
+#   define R500_TEX_SRC_Q_SWIZ_R			(0 << 14)
+#   define R500_TEX_SRC_Q_SWIZ_G			(1 << 14)
+#   define R500_TEX_SRC_Q_SWIZ_B			(2 << 14)
+#   define R500_TEX_SRC_Q_SWIZ_A			(3 << 14)
+#   define R500_TEX_DST_ADDR(x)				(x << 16)
+#   define R500_TEX_DST_ADDR_REL			(1 << 23)
+#   define R500_TEX_DST_R_SWIZ_R			(0 << 24)
+#   define R500_TEX_DST_R_SWIZ_G			(1 << 24)
+#   define R500_TEX_DST_R_SWIZ_B			(2 << 24)
+#   define R500_TEX_DST_R_SWIZ_A			(3 << 24)
+#   define R500_TEX_DST_G_SWIZ_R			(0 << 26)
+#   define R500_TEX_DST_G_SWIZ_G			(1 << 26)
+#   define R500_TEX_DST_G_SWIZ_B			(2 << 26)
+#   define R500_TEX_DST_G_SWIZ_A			(3 << 26)
+#   define R500_TEX_DST_B_SWIZ_R			(0 << 28)
+#   define R500_TEX_DST_B_SWIZ_G			(1 << 28)
+#   define R500_TEX_DST_B_SWIZ_B			(2 << 28)
+#   define R500_TEX_DST_B_SWIZ_A			(3 << 28)
+#   define R500_TEX_DST_A_SWIZ_R			(0 << 30)
+#   define R500_TEX_DST_A_SWIZ_G			(1 << 30)
+#   define R500_TEX_DST_A_SWIZ_B			(2 << 30)
+#   define R500_TEX_DST_A_SWIZ_A			(3 << 30)
+#define R500_US_TEX_ADDR_DXDY_0				0xa000
+#   define R500_DX_ADDR(x)				(x << 0)
+#   define R500_DX_ADDR_REL				(1 << 7)
+#   define R500_DX_S_SWIZ_R				(0 << 8)
+#   define R500_DX_S_SWIZ_G				(1 << 8)
+#   define R500_DX_S_SWIZ_B				(2 << 8)
+#   define R500_DX_S_SWIZ_A				(3 << 8)
+#   define R500_DX_T_SWIZ_R				(0 << 10)
+#   define R500_DX_T_SWIZ_G				(1 << 10)
+#   define R500_DX_T_SWIZ_B				(2 << 10)
+#   define R500_DX_T_SWIZ_A				(3 << 10)
+#   define R500_DX_R_SWIZ_R				(0 << 12)
+#   define R500_DX_R_SWIZ_G				(1 << 12)
+#   define R500_DX_R_SWIZ_B				(2 << 12)
+#   define R500_DX_R_SWIZ_A				(3 << 12)
+#   define R500_DX_Q_SWIZ_R				(0 << 14)
+#   define R500_DX_Q_SWIZ_G				(1 << 14)
+#   define R500_DX_Q_SWIZ_B				(2 << 14)
+#   define R500_DX_Q_SWIZ_A				(3 << 14)
+#   define R500_DY_ADDR(x)				(x << 16)
+#   define R500_DY_ADDR_REL				(1 << 17)
+#   define R500_DY_S_SWIZ_R				(0 << 24)
+#   define R500_DY_S_SWIZ_G				(1 << 24)
+#   define R500_DY_S_SWIZ_B				(2 << 24)
+#   define R500_DY_S_SWIZ_A				(3 << 24)
+#   define R500_DY_T_SWIZ_R				(0 << 26)
+#   define R500_DY_T_SWIZ_G				(1 << 26)
+#   define R500_DY_T_SWIZ_B				(2 << 26)
+#   define R500_DY_T_SWIZ_A				(3 << 26)
+#   define R500_DY_R_SWIZ_R				(0 << 28)
+#   define R500_DY_R_SWIZ_G				(1 << 28)
+#   define R500_DY_R_SWIZ_B				(2 << 28)
+#   define R500_DY_R_SWIZ_A				(3 << 28)
+#   define R500_DY_Q_SWIZ_R				(0 << 30)
+#   define R500_DY_Q_SWIZ_G				(1 << 30)
+#   define R500_DY_Q_SWIZ_B				(2 << 30)
+#   define R500_DY_Q_SWIZ_A				(3 << 30)
+#define R500_US_TEX_INST_0				0x9000
+#   define R500_TEX_ID(x)				(x << 16)
+#   define R500_TEX_INST_NOP				(0 << 22)
+#   define R500_TEX_INST_LD				(1 << 22)
+#   define R500_TEX_INST_TEXKILL			(2 << 22)
+#   define R500_TEX_INST_PROJ				(3 << 22)
+#   define R500_TEX_INST_LODBIAS			(4 << 22)
+#   define R500_TEX_INST_LOD				(5 << 22)
+#   define R500_TEX_INST_DXDY				(6 << 22)
+#   define R500_TEX_SEM_ACQUIRE				(1 << 25)
+#   define R500_TEX_IGNORE_UNCOVERED			(1 << 26)
+#   define R500_TEX_UNSCALED				(1 << 27)
+#define R300_US_W_FMT					0x46b4
+#   define R300_W_FMT_W0				(0 << 0)
+#   define R300_W_FMT_W24				(1 << 0)
+#   define R300_W_FMT_W24FP				(2 << 0)
+#   define R300_W_SRC_US				(0 << 2)
+#   define R300_W_SRC_RAS				(1 << 2)
+
+
 /* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR.
  * Two parameter dwords:
- * 0. The first parameter appears to be always 0
- * 1. The second parameter is a standard primitive emission dword.
+ * 0. VAP_VTX_FMT: The first parameter is not written to hardware
+ * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword.
  */
 #define R300_PACKET3_3D_DRAW_VBUF           0x00002800
 
+/* Draw a primitive from immediate vertices in this packet
+ * Up to 16382 dwords:
+ * 0. VAP_VTX_FMT: The first parameter is not written to hardware
+ * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword.
+ * 2 to end: Up to 16380 dwords of vertex data.
+ */
+#define R300_PACKET3_3D_DRAW_IMMD           0x00002900
+
+/* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR and
+ * immediate vertices in this packet
+ * Up to 16382 dwords:
+ * 0. VAP_VTX_FMT: The first parameter is not written to hardware
+ * 1. VAP_VF_CTL: The second parameter is a standard primitive emission dword.
+ * 2 to end: Up to 16380 dwords of vertex data.
+ */
+#define R300_PACKET3_3D_DRAW_INDX           0x00002A00
+
+
 /* Specify the full set of vertex arrays as (address, stride).
  * The first parameter is the number of vertex arrays specified.
  * The rest of the command is a variable length list of blocks, where
@@ -1628,9 +3204,29 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #    define R300_EB_UNK1_SHIFT                      24
 #    define R300_EB_UNK1                    (0x80<<24)
 #    define R300_EB_UNK2                        0x0810
+
+/* Same as R300_PACKET3_3D_DRAW_VBUF but without VAP_VTX_FMT */
 #define R300_PACKET3_3D_DRAW_VBUF_2         0x00003400
+/* Same as R300_PACKET3_3D_DRAW_IMMD but without VAP_VTX_FMT */
+#define R300_PACKET3_3D_DRAW_IMMD_2         0x00003500
+/* Same as R300_PACKET3_3D_DRAW_INDX but without VAP_VTX_FMT */
 #define R300_PACKET3_3D_DRAW_INDX_2         0x00003600
 
+/* Clears a portion of hierachical Z RAM
+ * 3 dword parameters
+ * 0. START
+ * 1. COUNT: 13:0 (max is 0x3FFF)
+ * 2. CLEAR_VALUE: Value to write into HIZ RAM.
+ */
+#define R300_PACKET3_3D_CLEAR_HIZ           0x00003700
+
+/* Draws a set of primitives using vertex buffers pointed by the state data.
+ * At least 2 Parameters:
+ * 0. VAP_VF_CNTL: The first parameter is a standard primitive emission dword.
+ * 2 to end: Data or indices (see other 3D_DRAW_* packets for details)
+ */
+#define R300_PACKET3_3D_DRAW_128            0x00003900
+
 /* END: Packet 3 commands */
 
 
@@ -1652,3 +3248,5 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #endif /* _R300_REG_H */
 
 /* *INDENT-ON* */
+
+/* vim: set foldenable foldmarker=\\{,\\} foldmethod=marker : */
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index c809679e6cd..292f87a2b1b 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -50,15 +50,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * no bugs...
  */
 
-#include "glheader.h"
-#include "state.h"
-#include "imports.h"
-#include "enums.h"
-#include "macros.h"
-#include "context.h"
-#include "dd.h"
-#include "simple_list.h"
-#include "api_arrayelt.h"
+#include "main/glheader.h"
+#include "main/state.h"
+#include "main/imports.h"
+#include "main/enums.h"
+#include "main/macros.h"
+#include "main/context.h"
+#include "main/dd.h"
+#include "main/simple_list.h"
+#include "main/api_arrayelt.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "vbo/vbo.h"
@@ -74,6 +74,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_reg.h"
 #include "r300_tex.h"
 #include "r300_emit.h"
+#include "r300_fragprog.h"
 extern int future_hw_tcl_on;
 
 /**
@@ -268,13 +269,24 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx,
 		return;
 
 	if (vb->Elts) {
-		r300EmitAOS(rmesa, rmesa->state.aos_count, start);
 		if (num_verts > 65535) {
 			/* not implemented yet */
 			WARN_ONCE("Too many elts\n");
 			return;
 		}
+		/* Note: The following is incorrect, but it's the best I can do
+		 * without a major refactoring of how DMA memory is handled.
+		 * The problem: Ensuring that both vertex arrays *and* index
+		 * arrays are at the right position, and then ensuring that
+		 * the LOAD_VBPNTR, DRAW_INDX and INDX_BUFFER packets are emitted
+		 * at once.
+		 *
+		 * So why is the following incorrect? Well, it seems like
+		 * allocating the index array might actually evict the vertex
+		 * arrays. *sigh*
+		 */
 		r300EmitElts(ctx, vb->Elts, num_verts);
+		r300EmitAOS(rmesa, rmesa->state.aos_count, start);
 		r300FireEB(rmesa, rmesa->state.elt_dma.aos_offset, num_verts, type);
 	} else {
 		r300EmitAOS(rmesa, rmesa->state.aos_count, start);
@@ -334,13 +346,26 @@ static GLboolean r300RunRender(GLcontext * ctx,
 static int r300Fallback(GLcontext * ctx)
 {
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
-	struct r300_fragment_program *fp = (struct r300_fragment_program *)
+	/* Do we need to use new-style shaders?
+	 * Also is there a better way to do this? */
+	if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+		struct r500_fragment_program *fp = (struct r500_fragment_program *)
 	    (char *)ctx->FragmentProgram._Current;
-
-	if (fp) {
-		if (!fp->translated)
-			r300TranslateFragmentShader(r300, fp);
-		FALLBACK_IF(!fp->translated);
+		if (fp) {
+			if (!fp->translated) {
+				r500TranslateFragmentShader(r300, fp);
+				FALLBACK_IF(!fp->translated);
+			}
+		}
+	} else {
+		struct r300_fragment_program *fp = (struct r300_fragment_program *)
+	    (char *)ctx->FragmentProgram._Current;
+		if (fp) {
+			if (!fp->translated) {
+				r300TranslateFragmentShader(r300, fp);
+				FALLBACK_IF(!fp->translated);
+			}
+		}
 	}
 
 	FALLBACK_IF(ctx->RenderMode != GL_RENDER);
@@ -352,8 +377,6 @@ static int r300Fallback(GLcontext * ctx)
 			|| ctx->Stencil.WriteMask[0] !=
 			ctx->Stencil.WriteMask[1]));
 
-	FALLBACK_IF(ctx->Color.ColorLogicOpEnabled);
-
 	if (ctx->Extensions.NV_point_sprite || ctx->Extensions.ARB_point_sprite)
 		FALLBACK_IF(ctx->Point.PointSprite);
 
diff --git a/src/mesa/drivers/dri/r300/r300_shader.c b/src/mesa/drivers/dri/r300/r300_shader.c
index 5f5ac7c4c71..f30fd986e0f 100644
--- a/src/mesa/drivers/dri/r300/r300_shader.c
+++ b/src/mesa/drivers/dri/r300/r300_shader.c
@@ -1,8 +1,7 @@
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
 
-#include "program.h"
+#include "main/glheader.h"
+
+#include "shader/program.h"
 #include "tnl/tnl.h"
 #include "r300_context.h"
 #include "r300_fragprog.h"
@@ -10,8 +9,10 @@
 static struct gl_program *r300NewProgram(GLcontext * ctx, GLenum target,
 					 GLuint id)
 {
+	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 	struct r300_vertex_program_cont *vp;
-	struct r300_fragment_program *fp;
+	struct r300_fragment_program *r300_fp;
+	struct r500_fragment_program *r500_fp;
 
 	switch (target) {
 	case GL_VERTEX_STATE_PROGRAM_NV:
@@ -20,14 +21,27 @@ static struct gl_program *r300NewProgram(GLcontext * ctx, GLenum target,
 		return _mesa_init_vertex_program(ctx, &vp->mesa_program,
 						 target, id);
 	case GL_FRAGMENT_PROGRAM_ARB:
-		fp = CALLOC_STRUCT(r300_fragment_program);
-		fp->ctx = ctx;
-		return _mesa_init_fragment_program(ctx, &fp->mesa_program,
-						   target, id);
+		if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+			r500_fp = CALLOC_STRUCT(r500_fragment_program);
+			r500_fp->ctx = ctx;
+			return _mesa_init_fragment_program(ctx, &r500_fp->mesa_program,
+							   target, id);
+		} else {
+			r300_fp = CALLOC_STRUCT(r300_fragment_program);
+			return _mesa_init_fragment_program(ctx, &r300_fp->mesa_program,
+							   target, id);
+		}
+
 	case GL_FRAGMENT_PROGRAM_NV:
-		fp = CALLOC_STRUCT(r300_fragment_program);
-		return _mesa_init_fragment_program(ctx, &fp->mesa_program,
-						   target, id);
+		if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+			r500_fp = CALLOC_STRUCT(r500_fragment_program);
+			return _mesa_init_fragment_program(ctx, &r500_fp->mesa_program,
+							   target, id);
+		} else {
+			r300_fp = CALLOC_STRUCT(r300_fragment_program);
+			return _mesa_init_fragment_program(ctx, &r300_fp->mesa_program,
+							   target, id);
+		}
 	default:
 		_mesa_problem(ctx, "Bad target in r300NewProgram");
 	}
@@ -43,15 +57,20 @@ static void r300DeleteProgram(GLcontext * ctx, struct gl_program *prog)
 static void
 r300ProgramStringNotify(GLcontext * ctx, GLenum target, struct gl_program *prog)
 {
+	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 	struct r300_vertex_program_cont *vp = (void *)prog;
-	struct r300_fragment_program *fp = (struct r300_fragment_program *)prog;
+	struct r300_fragment_program *r300_fp = (struct r300_fragment_program *)prog;
+	struct r500_fragment_program *r500_fp = (struct r500_fragment_program *)prog;
 
 	switch (target) {
 	case GL_VERTEX_PROGRAM_ARB:
 		vp->progs = NULL;
 		break;
 	case GL_FRAGMENT_PROGRAM_ARB:
-		fp->translated = GL_FALSE;
+		if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+			r500_fp->translated = GL_FALSE;
+		else
+			r300_fp->translated = GL_FALSE;
 		break;
 	}
 
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 088216c76ee..6a5c3633a23 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -35,23 +35,23 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author Nicolai Haehnle <prefect_@gmx.net>
  */
 
-#include "glheader.h"
-#include "state.h"
-#include "imports.h"
-#include "enums.h"
-#include "macros.h"
-#include "context.h"
-#include "dd.h"
-#include "simple_list.h"
-
-#include "api_arrayelt.h"
+#include "main/glheader.h"
+#include "main/state.h"
+#include "main/imports.h"
+#include "main/enums.h"
+#include "main/macros.h"
+#include "main/context.h"
+#include "main/dd.h"
+#include "main/simple_list.h"
+#include "main/api_arrayelt.h"
+#include "main/texformat.h"
+
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
-#include "texformat.h"
 
 #include "radeon_ioctl.h"
 #include "radeon_state.h"
@@ -70,20 +70,28 @@ extern void _tnl_UpdateFixedFunctionProgram(GLcontext * ctx);
 
 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
 {
-	GLubyte color[4];
 	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 
 	R300_STATECHANGE(rmesa, blend_color);
 
-	CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
-	CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
-	CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
-	CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
+	if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+		GLuint r = IROUND(cf[0]*1023.0f);
+		GLuint g = IROUND(cf[1]*1023.0f);
+		GLuint b = IROUND(cf[2]*1023.0f);
+		GLuint a = IROUND(cf[3]*1023.0f);
+
+		rmesa->hw.blend_color.cmd[1] = r | (a << 16);
+		rmesa->hw.blend_color.cmd[2] = b | (g << 16);
+	} else {
+		GLubyte color[4];
+		CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
+		CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
+		CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
+		CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
 
-	rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
-						       color[1], color[2]);
-	rmesa->hw.blend_color.cmd[2] = 0;
-	rmesa->hw.blend_color.cmd[3] = 0;
+		rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
+							color[1], color[2]);
+	}
 }
 
 /**
@@ -189,7 +197,7 @@ static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
 	 */
 #if 0
 	if (new_ablend == new_cblend) {
-		new_cblend |= R300_BLEND_NO_SEPARATE;
+		new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
 	}
 #endif
 	new_cblend |= cbits;
@@ -295,7 +303,9 @@ static void r300SetBlendState(GLcontext * ctx)
 
 	r300SetBlendCntl(r300,
 			 func, eqn,
-			 R300_BLEND_UNKNOWN | R300_BLEND_ENABLE, funcA, eqnA);
+			 (R300_SEPARATE_ALPHA_ENABLE |
+			  R300_READ_ENABLE |
+			  R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
 }
 
 static void r300BlendEquationSeparate(GLcontext * ctx,
@@ -312,6 +322,83 @@ static void r300BlendFuncSeparate(GLcontext * ctx,
 }
 
 /**
+ * Translate LogicOp enums into hardware representation.
+ * Both use a very logical bit-wise layout, but unfortunately the order
+ * of bits is reversed.
+ */
+static GLuint translate_logicop(GLenum logicop)
+{
+	GLuint bits = logicop - GL_CLEAR;
+	bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
+	return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
+}
+
+/**
+ * Used internally to update the r300->hw hardware state to match the
+ * current OpenGL state.
+ */
+static void r300SetLogicOpState(GLcontext *ctx)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	R300_STATECHANGE(r300, rop);
+	if (RGBA_LOGICOP_ENABLED(ctx)) {
+		r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
+			translate_logicop(ctx->Color.LogicOp);
+	} else {
+		r300->hw.rop.cmd[1] = 0;
+	}
+}
+
+/**
+ * Called by Mesa when an application program changes the LogicOp state
+ * via glLogicOp.
+ */
+static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
+{
+	if (RGBA_LOGICOP_ENABLED(ctx))
+		r300SetLogicOpState(ctx);
+}
+
+static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
+{
+	r300ContextPtr rmesa = R300_CONTEXT(ctx);
+	GLint p;
+	GLint *ip;
+
+	/* no VAP UCP on non-TCL chipsets */
+	if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+			return;
+
+	p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
+	ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+
+	R300_STATECHANGE( rmesa, vpucp[p] );
+	rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
+	rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
+	rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
+	rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
+}
+
+static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	GLuint p;
+
+	/* no VAP UCP on non-TCL chipsets */
+	if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+		return;
+
+	p = cap - GL_CLIP_PLANE0;
+	R300_STATECHANGE(r300, vap_clip_cntl);
+	if (state) {
+		r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
+		r300ClipPlane(ctx, cap, NULL);
+	} else {
+		r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
+	}
+}
+
+/**
  * Update our tracked culling state based on Mesa's state.
  */
 static void r300UpdateCulling(GLcontext * ctx)
@@ -350,44 +437,52 @@ static void r300UpdateCulling(GLcontext * ctx)
 	r300->hw.cul.cmd[R300_CUL_CULL] = val;
 }
 
-static void r300SetEarlyZState(GLcontext * ctx)
+static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
 {
-	/* updates register R300_RB3D_EARLY_Z (0x4F14)
-	   if depth test is not enabled it should be R300_EARLY_Z_DISABLE
-	   if depth is enabled and alpha not it should be R300_EARLY_Z_ENABLE
-	   if depth and alpha is enabled it should be R300_EARLY_Z_DISABLE
-	 */
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
 
-	R300_STATECHANGE(r300, zstencil_format);
-	switch (ctx->Visual.depthBits) {
-	case 16:
-		r300->hw.zstencil_format.cmd[1] = R300_DEPTH_FORMAT_16BIT_INT_Z;
-		break;
-	case 24:
-		r300->hw.zstencil_format.cmd[1] = R300_DEPTH_FORMAT_24BIT_INT_Z;
-		break;
-	default:
-		fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits);
-		_mesa_exit(-1);
+	R300_STATECHANGE(r300, occlusion_cntl);
+	if (state) {
+		r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
+	} else {
+		r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
 	}
+}
 
-	// r300->hw.zstencil_format.cmd[1] |= R300_DEPTH_FORMAT_UNK32;
+static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
 
-	if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
-		/* disable early Z */
-		r300->hw.zstencil_format.cmd[2] = R300_EARLY_Z_DISABLE;
-	else {
-		if (ctx->Depth.Test && ctx->Depth.Func != GL_NEVER)
-			/* enable early Z */
-			r300->hw.zstencil_format.cmd[2] = R300_EARLY_Z_ENABLE;
-		else
-			/* disable early Z */
-			r300->hw.zstencil_format.cmd[2] = R300_EARLY_Z_DISABLE;
+	if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
+		struct r300_fragment_program *fp = (struct r300_fragment_program *)
+			(char *)ctx->FragmentProgram._Current;
+		return (fp && fp->WritesDepth);
+	} else {
+		struct r500_fragment_program* fp =
+			(struct r500_fragment_program*)(char*)
+			ctx->FragmentProgram._Current;
+		return (fp && fp->writes_depth);
 	}
+}
 
-	r300->hw.zstencil_format.cmd[3] = 0x00000003;
-	r300->hw.zstencil_format.cmd[4] = 0x00000000;
+static void r300SetEarlyZState(GLcontext * ctx)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	GLuint topZ = R300_ZTOP_ENABLE;
+
+	if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
+		topZ = R300_ZTOP_DISABLE;
+	if (current_fragment_program_writes_depth(ctx))
+		topZ = R300_ZTOP_DISABLE;
+
+	if (topZ != r300->hw.zstencil_format.cmd[2]) {
+		/* Note: This completely reemits the stencil format.
+		 * I have not tested whether this is strictly necessary,
+		 * or if emitting a write to ZB_ZTOP is enough.
+		 */
+		R300_STATECHANGE(r300, zstencil_format);
+		r300->hw.zstencil_format.cmd[2] = topZ;
+	}
 }
 
 static void r300SetAlphaState(GLcontext * ctx)
@@ -401,35 +496,36 @@ static void r300SetAlphaState(GLcontext * ctx)
 
 	switch (ctx->Color.AlphaFunc) {
 	case GL_NEVER:
-		pp_misc |= R300_ALPHA_TEST_FAIL;
+		pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
 		break;
 	case GL_LESS:
-		pp_misc |= R300_ALPHA_TEST_LESS;
+		pp_misc |= R300_FG_ALPHA_FUNC_LESS;
 		break;
 	case GL_EQUAL:
-		pp_misc |= R300_ALPHA_TEST_EQUAL;
+		pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
 		break;
 	case GL_LEQUAL:
-		pp_misc |= R300_ALPHA_TEST_LEQUAL;
+		pp_misc |= R300_FG_ALPHA_FUNC_LE;
 		break;
 	case GL_GREATER:
-		pp_misc |= R300_ALPHA_TEST_GREATER;
+		pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
 		break;
 	case GL_NOTEQUAL:
-		pp_misc |= R300_ALPHA_TEST_NEQUAL;
+		pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
 		break;
 	case GL_GEQUAL:
-		pp_misc |= R300_ALPHA_TEST_GEQUAL;
+		pp_misc |= R300_FG_ALPHA_FUNC_GE;
 		break;
 	case GL_ALWAYS:
-		/*pp_misc |= R300_ALPHA_TEST_PASS; */
+		/*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
 		really_enabled = GL_FALSE;
 		break;
 	}
 
 	if (really_enabled) {
-		pp_misc |= R300_ALPHA_TEST_ENABLE;
-		pp_misc |= (refByte & R300_REF_ALPHA_MASK);
+		pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
+		pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
+		pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
 	} else {
 		pp_misc = 0x0;
 	}
@@ -476,38 +572,53 @@ static void r300SetDepthState(GLcontext * ctx)
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
 
 	R300_STATECHANGE(r300, zs);
-	r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_RB3D_STENCIL_ENABLE;
-	r300->hw.zs.cmd[R300_ZS_CNTL_1] &=
-	    ~(R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT);
+	r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
+	r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
 
-	if (ctx->Depth.Test && ctx->Depth.Func != GL_NEVER) {
+	if (ctx->Depth.Test) {
+		r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
 		if (ctx->Depth.Mask)
-			r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
-			    R300_RB3D_Z_TEST_AND_WRITE;
-		else
-			r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_RB3D_Z_TEST;
-
-		r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
-		    translate_func(ctx->Depth.
-				   Func) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
-	} else {
-		r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_RB3D_Z_DISABLED_1;
+			r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
 		r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
-		    translate_func(GL_NEVER) << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT;
+		    translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
 	}
 
 	r300SetEarlyZState(ctx);
 }
 
+static void r300SetStencilState(GLcontext * ctx, GLboolean state)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+
+	if (r300->state.stencil.hw_stencil) {
+		R300_STATECHANGE(r300, zs);
+		if (state) {
+			r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
+			    R300_STENCIL_ENABLE;
+		} else {
+			r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
+			    ~R300_STENCIL_ENABLE;
+		}
+	} else {
+#if R200_MERGED
+		FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
+#endif
+	}
+}
+
 static void r300UpdatePolygonMode(GLcontext * ctx)
 {
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
-	uint32_t hw_mode = 0;
+	uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
 
+	/* Only do something if a polygon mode is wanted, default is GL_FILL */
 	if (ctx->Polygon.FrontMode != GL_FILL ||
 	    ctx->Polygon.BackMode != GL_FILL) {
 		GLenum f, b;
 
+		/* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
+		 * correctly by selecting the correct front and back face
+		 */
 		if (ctx->Polygon.FrontFace == GL_CCW) {
 			f = ctx->Polygon.FrontMode;
 			b = ctx->Polygon.BackMode;
@@ -516,29 +627,30 @@ static void r300UpdatePolygonMode(GLcontext * ctx)
 			b = ctx->Polygon.FrontMode;
 		}
 
-		hw_mode |= R300_PM_ENABLED;
+		/* Enable polygon mode */
+		hw_mode |= R300_GA_POLY_MODE_DUAL;
 
 		switch (f) {
 		case GL_LINE:
-			hw_mode |= R300_PM_FRONT_LINE;
+			hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
 			break;
-		case GL_POINT:	/* noop */
-			hw_mode |= R300_PM_FRONT_POINT;
+		case GL_POINT:
+			hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
 			break;
 		case GL_FILL:
-			hw_mode |= R300_PM_FRONT_FILL;
+			hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
 			break;
 		}
 
 		switch (b) {
 		case GL_LINE:
-			hw_mode |= R300_PM_BACK_LINE;
+			hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
 			break;
-		case GL_POINT:	/* noop */
-			hw_mode |= R300_PM_BACK_POINT;
+		case GL_POINT:
+			hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
 			break;
 		case GL_FILL:
-			hw_mode |= R300_PM_BACK_FILL;
+			hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
 			break;
 		}
 	}
@@ -606,9 +718,10 @@ static void r300ColorMask(GLcontext * ctx,
 			  GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 {
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
-	int mask = (r ? R300_COLORMASK0_R : 0) |
-	    (g ? R300_COLORMASK0_G : 0) |
-	    (b ? R300_COLORMASK0_B : 0) | (a ? R300_COLORMASK0_A : 0);
+	int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
+	    (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
+	    (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
+	    (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
 
 	if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
 		R300_STATECHANGE(r300, cmk);
@@ -634,15 +747,13 @@ static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 
 	switch (pname) {
 	case GL_FOG_MODE:
-		if (!ctx->Fog.Enabled)
-			return;
 		switch (ctx->Fog.Mode) {
 		case GL_LINEAR:
 			R300_STATECHANGE(r300, fogs);
 			r300->hw.fogs.cmd[R300_FOGS_STATE] =
 			    (r300->hw.fogs.
-			     cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) |
-			    R300_FOG_MODE_LINEAR;
+			     cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
+			    R300_FG_FOG_BLEND_FN_LINEAR;
 
 			if (ctx->Fog.Start == ctx->Fog.End) {
 				fogScale.f = -1.0;
@@ -659,8 +770,8 @@ static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 			R300_STATECHANGE(r300, fogs);
 			r300->hw.fogs.cmd[R300_FOGS_STATE] =
 			    (r300->hw.fogs.
-			     cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) |
-			    R300_FOG_MODE_EXP;
+			     cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
+			    R300_FG_FOG_BLEND_FN_EXP;
 			fogScale.f = 0.0933 * ctx->Fog.Density;
 			fogStart.f = 0.0;
 			break;
@@ -668,8 +779,8 @@ static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 			R300_STATECHANGE(r300, fogs);
 			r300->hw.fogs.cmd[R300_FOGS_STATE] =
 			    (r300->hw.fogs.
-			     cmd[R300_FOGS_STATE] & ~R300_FOG_MODE_MASK) |
-			    R300_FOG_MODE_EXP2;
+			     cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
+			    R300_FG_FOG_BLEND_FN_EXP2;
 			fogScale.f = 0.3 * ctx->Fog.Density;
 			fogStart.f = 0.0;
 		default:
@@ -727,6 +838,24 @@ static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 	}
 }
 
+static void r300SetFogState(GLcontext * ctx, GLboolean state)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+
+	R300_STATECHANGE(r300, fogs);
+	if (state) {
+		r300->hw.fogs.cmd[R300_FOGS_STATE] |= R300_FG_FOG_BLEND_ENABLE;
+
+		r300Fogfv(ctx, GL_FOG_MODE, NULL);
+		r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density);
+		r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start);
+		r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End);
+		r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color);
+	} else {
+		r300->hw.fogs.cmd[R300_FOGS_STATE] &= ~R300_FG_FOG_BLEND_ENABLE;
+	}
+}
+
 /* =============================================================
  * Point state
  */
@@ -742,6 +871,31 @@ static void r300PointSize(GLcontext * ctx, GLfloat size)
 	    ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
 }
 
+static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+
+	switch (pname) {
+	case GL_POINT_SIZE_MIN:
+		R300_STATECHANGE(r300, ga_point_minmax);
+		r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
+		r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
+		break;
+	case GL_POINT_SIZE_MAX:
+		R300_STATECHANGE(r300, ga_point_minmax);
+		r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
+		r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
+			<< R300_GA_POINT_MINMAX_MAX_SHIFT;
+		break;
+	case GL_POINT_DISTANCE_ATTENUATION:
+		break;
+	case GL_POINT_FADE_THRESHOLD_SIZE:
+		break;
+	default:
+		break;
+	}
+}
+
 /* =============================================================
  * Line state
  */
@@ -821,37 +975,36 @@ static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
 	r300ContextPtr rmesa = R300_CONTEXT(ctx);
 	GLuint refmask =
 	    (((ctx->Stencil.
-	       Ref[0] & 0xff) << R300_RB3D_ZS2_STENCIL_REF_SHIFT) | ((ctx->
-								      Stencil.
-								      ValueMask
-								      [0] &
-								      0xff)
-								     <<
-								     R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
+	       Ref[0] & 0xff) << R300_STENCILREF_SHIFT) | ((ctx->
+							    Stencil.
+							    ValueMask
+							    [0] &
+							    0xff)
+							   <<
+							   R300_STENCILMASK_SHIFT));
 
 	GLuint flag;
 
 	R300_STATECHANGE(rmesa, zs);
-
+	rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
-					       R300_RB3D_ZS1_FRONT_FUNC_SHIFT)
+					       R300_S_FRONT_FUNC_SHIFT)
 					      | (R300_ZS_MASK <<
-						 R300_RB3D_ZS1_BACK_FUNC_SHIFT));
+						 R300_S_BACK_FUNC_SHIFT));
 
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
-	    ~((R300_RB3D_ZS2_STENCIL_MASK <<
-	       R300_RB3D_ZS2_STENCIL_REF_SHIFT) |
-	      (R300_RB3D_ZS2_STENCIL_MASK << R300_RB3D_ZS2_STENCIL_MASK_SHIFT));
+	    ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
+	      (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
 
 	flag = translate_func(ctx->Stencil.Function[0]);
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
-	    (flag << R300_RB3D_ZS1_FRONT_FUNC_SHIFT);
+	    (flag << R300_S_FRONT_FUNC_SHIFT);
 
 	if (ctx->Stencil._TestTwoSide)
 		flag = translate_func(ctx->Stencil.Function[1]);
 
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
-	    (flag << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
+	    (flag << R300_S_BACK_FUNC_SHIFT);
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
 }
 
@@ -861,11 +1014,12 @@ static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
 
 	R300_STATECHANGE(rmesa, zs);
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
-	    ~(R300_RB3D_ZS2_STENCIL_MASK <<
-	      R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT);
+	    ~(R300_STENCILREF_MASK <<
+	      R300_STENCILWRITEMASK_SHIFT);
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
 	    (ctx->Stencil.
-	     WriteMask[0] & 0xff) << R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT;
+	     WriteMask[0] & R300_STENCILREF_MASK) <<
+	     R300_STENCILWRITEMASK_SHIFT;
 }
 
 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
@@ -876,49 +1030,37 @@ static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
 	R300_STATECHANGE(rmesa, zs);
 	/* It is easier to mask what's left.. */
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
-	    (R300_ZS_MASK << R300_RB3D_ZS1_DEPTH_FUNC_SHIFT) |
-	    (R300_ZS_MASK << R300_RB3D_ZS1_FRONT_FUNC_SHIFT) |
-	    (R300_ZS_MASK << R300_RB3D_ZS1_BACK_FUNC_SHIFT);
+	    (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
+	    (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
+	    (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
 
 	rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
 	    (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
-	     R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT)
+	     R300_S_FRONT_SFAIL_OP_SHIFT)
 	    | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
-	       R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT)
+	       R300_S_FRONT_ZFAIL_OP_SHIFT)
 	    | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
-	       R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT);
+	       R300_S_FRONT_ZPASS_OP_SHIFT);
 
 	if (ctx->Stencil._TestTwoSide) {
 		rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
 		    (translate_stencil_op(ctx->Stencil.FailFunc[1]) <<
-		     R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
+		     R300_S_BACK_SFAIL_OP_SHIFT)
 		    | (translate_stencil_op(ctx->Stencil.ZFailFunc[1]) <<
-		       R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
+		       R300_S_BACK_ZFAIL_OP_SHIFT)
 		    | (translate_stencil_op(ctx->Stencil.ZPassFunc[1]) <<
-		       R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
+		       R300_S_BACK_ZPASS_OP_SHIFT);
 	} else {
 		rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
 		    (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
-		     R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT)
+		     R300_S_BACK_SFAIL_OP_SHIFT)
 		    | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
-		       R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT)
+		       R300_S_BACK_ZFAIL_OP_SHIFT)
 		    | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
-		       R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT);
+		       R300_S_BACK_ZPASS_OP_SHIFT);
 	}
 }
 
-static void r300ClearStencil(GLcontext * ctx, GLint s)
-{
-	r300ContextPtr rmesa = R300_CONTEXT(ctx);
-
-	rmesa->state.stencil.clear =
-	    ((GLuint) (ctx->Stencil.Clear & 0xff) |
-	     (R300_RB3D_ZS2_STENCIL_MASK <<
-	      R300_RB3D_ZS2_STENCIL_MASK_SHIFT) | ((ctx->Stencil.
-						    WriteMask[0] & 0xff) <<
-						   R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT));
-}
-
 /* =============================================================
  * Window position and viewport transformation
  */
@@ -1006,12 +1148,12 @@ void r300UpdateDrawBuffer(GLcontext * ctx)
 	struct gl_framebuffer *fb = ctx->DrawBuffer;
 	driRenderbuffer *drb;
 
-	if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT) {
+	if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
 		/* draw to front */
 		drb =
 		    (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].
 		    Renderbuffer;
-	} else if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) {
+	} else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
 		/* draw to back */
 		drb =
 		    (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].
@@ -1183,8 +1325,8 @@ static unsigned long gen_fixed_filter(unsigned long f)
 	    (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
 		needs_fixing |= 2;
 	}
-	if ((f & ((7 - 1) << R300_TX_WRAP_Q_SHIFT)) ==
-	    (R300_TX_CLAMP << R300_TX_WRAP_Q_SHIFT)) {
+	if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
+	    (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
 		needs_fixing |= 4;
 	}
 
@@ -1192,7 +1334,7 @@ static unsigned long gen_fixed_filter(unsigned long f)
 		return f;
 
 	mag = f & R300_TX_MAG_FILTER_MASK;
-	min = f & R300_TX_MIN_FILTER_MASK;
+	min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
 
 	/* TODO: Check for anisto filters too */
 	if ((mag != R300_TX_MAG_FILTER_NEAREST)
@@ -1224,12 +1366,100 @@ static unsigned long gen_fixed_filter(unsigned long f)
 		f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
 	}
 	if (needs_fixing & 4) {
-		f &= ~((7 - 1) << R300_TX_WRAP_Q_SHIFT);
-		f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_Q_SHIFT;
+		f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
+		f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
 	}
 	return f;
 }
 
+static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	int i;
+	struct r300_fragment_program *fp = (struct r300_fragment_program *)
+	    (char *)ctx->FragmentProgram._Current;
+	struct r300_fragment_program_code *code = &fp->code;
+
+	R300_STATECHANGE(r300, fpt);
+
+	for (i = 0; i < code->tex.length; i++) {
+		int unit;
+		int opcode;
+		unsigned long val;
+
+		unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
+		unit &= 15;
+
+		val = code->tex.inst[i];
+		val &= ~R300_TEX_ID_MASK;
+
+		opcode =
+			(val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
+		if (opcode == R300_TEX_OP_KIL) {
+			r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
+		} else {
+			if (tmu_mappings[unit] >= 0) {
+				val |=
+					tmu_mappings[unit] <<
+					R300_TEX_ID_SHIFT;
+				r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
+			} else {
+				// We get here when the corresponding texture image is incomplete
+				// (e.g. incomplete mipmaps etc.)
+				r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
+			}
+		}
+	}
+
+	r300->hw.fpt.cmd[R300_FPT_CMD_0] =
+		cmdpacket0(R300_US_TEX_INST_0, code->tex.length);
+}
+
+static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
+{
+	int i;
+	struct r500_fragment_program *fp = (struct r500_fragment_program *)
+	    (char *)ctx->FragmentProgram._Current;
+	struct r500_fragment_program_code *code = &fp->code;
+
+	/* find all the texture instructions and relocate the texture units */
+	for (i = 0; i < code->inst_end + 1; i++) {
+		if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
+			uint32_t val;
+			int unit, opcode, new_unit;
+
+			val = code->inst[i].inst1;
+
+			unit = (val >> 16) & 0xf;
+
+			val &= ~(0xf << 16);
+
+			opcode = val & (0x7 << 22);
+			if (opcode == R500_TEX_INST_TEXKILL) {
+				new_unit = 0;
+			} else {
+				if (tmu_mappings[unit] >= 0) {
+					new_unit = tmu_mappings[unit];
+				} else {
+					new_unit = 0;
+				}
+			}
+			val |= R500_TEX_ID(new_unit);
+			code->inst[i].inst1 = val;
+		}
+	}
+}
+
+static GLuint translate_lod_bias(GLfloat bias)
+{
+	GLint b = (int)(bias*32);
+	if (b >= (1 << 9))
+		b = (1 << 9)-1;
+	else if (b < -(1 << 9))
+		b = -(1 << 9);
+	return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
+}
+
 static void r300SetupTextures(GLcontext * ctx)
 {
 	int i, mtu;
@@ -1293,8 +1523,14 @@ static void r300SetupTextures(GLcontext * ctx)
 			r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
 						hw_tmu] =
 			    gen_fixed_filter(t->filter) | (hw_tmu << 28);
-			/* Currently disabled! */
-			r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] = 0x0;	//0x20501f80;
+			/* Note: There is a LOD bias per texture unit and a LOD bias
+			 * per texture object. We add them here to get the correct behaviour.
+			 * (The per-texture object LOD bias was introduced in OpenGL 1.4
+			 * and is not present in the EXT_texture_object extension).
+			 */
+			r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
+				t->filter_1 |
+				translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.tObj->LodBias);
 			r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
 			    t->size;
 			r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
@@ -1325,7 +1561,7 @@ static void r300SetupTextures(GLcontext * ctx)
 	}
 
 	r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
-	    cmdpacket0(R300_TX_FILTER_0, last_hw_tmu + 1);
+	    cmdpacket0(R300_TX_FILTER0_0, last_hw_tmu + 1);
 	r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
 	    cmdpacket0(R300_TX_FILTER1_0, last_hw_tmu + 1);
 	r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
@@ -1333,7 +1569,7 @@ static void r300SetupTextures(GLcontext * ctx)
 	r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
 	    cmdpacket0(R300_TX_FORMAT_0, last_hw_tmu + 1);
 	r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
-	    cmdpacket0(R300_TX_PITCH_0, last_hw_tmu + 1);
+	    cmdpacket0(R300_TX_FORMAT2_0, last_hw_tmu + 1);
 	r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
 	    cmdpacket0(R300_TX_OFFSET_0, last_hw_tmu + 1);
 	r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
@@ -1344,39 +1580,18 @@ static void r300SetupTextures(GLcontext * ctx)
 	if (!fp)		/* should only happenen once, just after context is created */
 		return;
 
-	R300_STATECHANGE(r300, fpt);
-
-	for (i = 0; i < fp->tex.length; i++) {
-		int unit;
-		int opcode;
-		unsigned long val;
-
-		unit = fp->tex.inst[i] >> R300_FPITX_IMAGE_SHIFT;
-		unit &= 15;
-
-		val = fp->tex.inst[i];
-		val &= ~R300_FPITX_IMAGE_MASK;
-
-		opcode =
-		    (val & R300_FPITX_OPCODE_MASK) >> R300_FPITX_OPCODE_SHIFT;
-		if (opcode == R300_FPITX_OP_KIL) {
-			r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
-		} else {
-			if (tmu_mappings[unit] >= 0) {
-				val |=
-				    tmu_mappings[unit] <<
-				    R300_FPITX_IMAGE_SHIFT;
-				r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
-			} else {
-				// We get here when the corresponding texture image is incomplete
-				// (e.g. incomplete mipmaps etc.)
-				r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
-			}
+	if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
+		if (fp->mesa_program.UsesKill && last_hw_tmu < 0) {
+			// The KILL operation requires the first texture unit
+			// to be enabled.
+			r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
+			r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
+			r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
+				cmdpacket0(R300_TX_FILTER0_0, 1);
 		}
-	}
-
-	r300->hw.fpt.cmd[R300_FPT_CMD_0] =
-	    cmdpacket0(R300_PFS_TEXI_0, fp->tex.length);
+		r300SetupFragmentShaderTextures(ctx, tmu_mappings);
+	} else
+		r500SetupFragmentShaderTextures(ctx, tmu_mappings);
 
 	if (RADEON_DEBUG & DEBUG_STATE)
 		fprintf(stderr, "TX_ENABLE: %08x  last_hw_tmu=%d\n",
@@ -1396,21 +1611,17 @@ static void r300SetupRSUnit(GLcontext * ctx)
 {
 	r300ContextPtr r300 = R300_CONTEXT(ctx);
 	/* I'm still unsure if these are needed */
-	GLuint interp_magic[8] = {
-		0x00,
-		R300_RS_INTERP_1_UNKNOWN,
-		R300_RS_INTERP_2_UNKNOWN,
-		R300_RS_INTERP_3_UNKNOWN,
-		0x00,
-		0x00,
-		0x00,
-		0x00
-	};
+	GLuint interp_col[8];
+        TNLcontext *tnl = TNL_CONTEXT(ctx);
+	struct vertex_buffer *VB = &tnl->vb;
 	union r300_outputs_written OutputsWritten;
 	GLuint InputsRead;
 	int fp_reg, high_rr;
-	int in_texcoords, col_interp_nr;
-	int i;
+	int col_interp_nr;
+	int rs_tex_count = 0, rs_col_count = 0;
+	int i, count;
+
+	memset(interp_col, 0, sizeof(interp_col));
 
 	if (hw_tcl_on)
 		OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
@@ -1428,9 +1639,9 @@ static void r300SetupRSUnit(GLcontext * ctx)
 	R300_STATECHANGE(r300, rc);
 	R300_STATECHANGE(r300, rr);
 
-	fp_reg = in_texcoords = col_interp_nr = high_rr = 0;
+	fp_reg = col_interp_nr = high_rr = 0;
 
-	r300->hw.rr.cmd[R300_RR_ROUTE_1] = 0;
+	r300->hw.rr.cmd[R300_RR_INST_1] = 0;
 
 	if (InputsRead & FRAG_BIT_WPOS) {
 		for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
@@ -1446,15 +1657,53 @@ static void r300SetupRSUnit(GLcontext * ctx)
 		InputsRead &= ~FRAG_BIT_WPOS;
 	}
 
+	if (InputsRead & FRAG_BIT_COL0) {
+		count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
+		interp_col[0] |= R300_RS_COL_PTR(rs_col_count);
+		if (count == 3)
+			interp_col[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB1);
+		rs_col_count += count;
+	}
+	else
+		interp_col[0] = R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
+
+	if (InputsRead & FRAG_BIT_COL1) {
+		count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
+		if (count == 3)
+			interp_col[1] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB0);
+		interp_col[1] |= R300_RS_COL_PTR(1);
+		rs_col_count += count;
+	}
+
+
 	for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
-		r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0 | R300_RS_INTERP_USED | (in_texcoords << R300_RS_INTERP_SRC_SHIFT)
-		    | interp_magic[i];
+		int swiz;
+
+		/* with TCL we always seem to route 4 components */
+		if (hw_tcl_on)
+		  count = 4;
+		else
+		  count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
+
+		r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | rs_tex_count;
+		switch(count) {
+		case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
+		case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
+		default:
+		case 1:
+		case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
+		};
+
+		r300->hw.ri.cmd[R300_RI_INTERP_0 + i] |= swiz;
 
-		r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] = 0;
+		r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0;
 		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
+
+			rs_tex_count += count;
+
 			//assert(r300->state.texture.tc_count != 0);
-			r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] |= R300_RS_ROUTE_ENABLE | i	/* source INTERP */
-			    | (fp_reg << R300_RS_ROUTE_DEST_SHIFT);
+			r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R300_RS_INST_TEX_CN_WRITE | i	/* source INTERP */
+			    | (fp_reg << R300_RS_INST_TEX_ADDR_SHIFT);
 			high_rr = fp_reg;
 
 			/* Passing invalid data here can lock the GPU. */
@@ -1465,15 +1714,171 @@ static void r300SetupRSUnit(GLcontext * ctx)
 				WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
 			}
 		}
-		/* Need to count all coords enabled at vof */
-		if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
-			in_texcoords++;
+	}
+
+	if (InputsRead & FRAG_BIT_COL0) {
+		if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
+			r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
+			InputsRead &= ~FRAG_BIT_COL0;
+			col_interp_nr++;
+		} else {
+			WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
+		}
+	}
+
+	if (InputsRead & FRAG_BIT_COL1) {
+		if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
+			r300->hw.rr.cmd[R300_RR_INST_1] |= R300_RS_INST_COL_ID(1) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
+			InputsRead &= ~FRAG_BIT_COL1;
+			if (high_rr < 1)
+				high_rr = 1;
+			col_interp_nr++;
+		} else {
+			WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
+		}
+	}
+
+	/* Need at least one. This might still lock as the values are undefined... */
+	if (rs_tex_count == 0 && col_interp_nr == 0) {
+		r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
+		col_interp_nr++;
+	}
+
+	r300->hw.rc.cmd[1] = 0 | (rs_tex_count << R300_IT_COUNT_SHIFT)
+	  | (col_interp_nr << R300_IC_COUNT_SHIFT)
+	  | R300_HIRES_EN;
+
+	assert(high_rr >= 0);
+	r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, high_rr + 1);
+	r300->hw.rc.cmd[2] = high_rr;
+
+	if (InputsRead)
+		WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
+}
+
+static void r500SetupRSUnit(GLcontext * ctx)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	/* I'm still unsure if these are needed */
+	GLuint interp_col[8];
+	union r300_outputs_written OutputsWritten;
+        TNLcontext *tnl = TNL_CONTEXT(ctx);
+	struct vertex_buffer *VB = &tnl->vb;
+	GLuint InputsRead;
+	int fp_reg, high_rr;
+	int rs_col_count = 0;
+	int in_texcoords, col_interp_nr;
+	int i, count;
+
+	memset(interp_col, 0, sizeof(interp_col));
+	if (hw_tcl_on)
+		OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
+	else
+		RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
+
+	if (ctx->FragmentProgram._Current)
+		InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
+	else {
+		fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
+		return;		/* This should only ever happen once.. */
+	}
+
+	R300_STATECHANGE(r300, ri);
+	R300_STATECHANGE(r300, rc);
+	R300_STATECHANGE(r300, rr);
+
+	fp_reg = col_interp_nr = high_rr = in_texcoords = 0;
+
+	r300->hw.rr.cmd[R300_RR_INST_1] = 0;
+
+	if (InputsRead & FRAG_BIT_WPOS) {
+		for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
+			if (!(InputsRead & (FRAG_BIT_TEX0 << i)))
+				break;
+
+		if (i == ctx->Const.MaxTextureUnits) {
+			fprintf(stderr, "\tno free texcoord found...\n");
+			_mesa_exit(-1);
+		}
+
+		InputsRead |= (FRAG_BIT_TEX0 << i);
+		InputsRead &= ~FRAG_BIT_WPOS;
+	}
+
+	if (InputsRead & FRAG_BIT_COL0) {
+		count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
+		interp_col[0] |= R500_RS_COL_PTR(rs_col_count);
+		if (count == 3)
+			interp_col[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB1);
+		rs_col_count += count;
+	}
+	else
+		interp_col[0] = R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
+
+	if (InputsRead & FRAG_BIT_COL1) {
+		count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
+		interp_col[1] |= R500_RS_COL_PTR(1);
+		if (count == 3)
+			interp_col[1] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB0);
+		rs_col_count += count;
+	}
+
+	for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
+		GLuint swiz = 0;
+
+		/* with TCL we always seem to route 4 components */
+		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
+
+		  if (hw_tcl_on)
+		    count = 4;
+		  else
+		    count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
+
+		  /* always have on texcoord */
+		  swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_S_SHIFT;
+		  if (count >= 2)
+		    swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_T_SHIFT;
+		  else
+		    swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
+
+		  if (count >= 3)
+		    swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_R_SHIFT;
+		  else
+		    swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
+
+		  if (count == 4)
+		    swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_Q_SHIFT;
+		  else
+		    swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
+
+		} else
+		   swiz = (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
+		          (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+		          (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+		          (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
+
+		r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | swiz;
+
+		r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0;
+		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
+			//assert(r300->state.texture.tc_count != 0);
+			r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R500_RS_INST_TEX_CN_WRITE | i	/* source INTERP */
+			    | (fp_reg << R500_RS_INST_TEX_ADDR_SHIFT);
+			high_rr = fp_reg;
+
+			/* Passing invalid data here can lock the GPU. */
+			if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
+				InputsRead &= ~(FRAG_BIT_TEX0 << i);
+				fp_reg++;
+			} else {
+				WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
+			}
 		}
 	}
 
 	if (InputsRead & FRAG_BIT_COL0) {
 		if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
-			r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+			r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
 			InputsRead &= ~FRAG_BIT_COL0;
 			col_interp_nr++;
 		} else {
@@ -1483,7 +1888,7 @@ static void r300SetupRSUnit(GLcontext * ctx)
 
 	if (InputsRead & FRAG_BIT_COL1) {
 		if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
-			r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 | R300_RS_ROUTE_1_COLOR1 | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT);
+			r300->hw.rr.cmd[R300_RR_INST_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITE |  (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
 			InputsRead &= ~FRAG_BIT_COL1;
 			if (high_rr < 1)
 				high_rr = 1;
@@ -1495,22 +1900,25 @@ static void r300SetupRSUnit(GLcontext * ctx)
 
 	/* Need at least one. This might still lock as the values are undefined... */
 	if (in_texcoords == 0 && col_interp_nr == 0) {
-		r300->hw.rr.cmd[R300_RR_ROUTE_0] |= 0 | R300_RS_ROUTE_0_COLOR | (fp_reg++ << R300_RS_ROUTE_0_COLOR_DEST_SHIFT);
+		r300->hw.rr.cmd[R300_RR_INST_0] |= 0 | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
 		col_interp_nr++;
 	}
 
-	r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_RS_CNTL_TC_CNT_SHIFT)
-	    | (col_interp_nr << R300_RS_CNTL_CI_CNT_SHIFT)
-	    | R300_RS_CNTL_0_UNKNOWN_18;
+	r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_IT_COUNT_SHIFT)
+	  | (col_interp_nr << R300_IC_COUNT_SHIFT)
+	  | R300_HIRES_EN;
 
 	assert(high_rr >= 0);
-	r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, high_rr + 1);
+	r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, high_rr + 1);
 	r300->hw.rc.cmd[2] = 0xC0 | high_rr;
 
 	if (InputsRead)
 		WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
 }
 
+
+
+
 #define bump_vpu_count(ptr, new_count)   do{\
 	drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
 	int _nc=(new_count)/4; \
@@ -1518,7 +1926,7 @@ static void r300SetupRSUnit(GLcontext * ctx)
 	if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
 	}while(0)
 
-static inline void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
+static INLINE void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
 {
 	int i;
 
@@ -1556,10 +1964,68 @@ static inline void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest,
 	}
 }
 
+#define MIN3(a, b, c)	((a) < (b) ? MIN2(a, c) : MIN2(b, c))
+
+
+static void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
+			GLuint output_count, GLuint temp_count)
+{
+    int vtx_mem_size;
+    int pvs_num_slots;
+    int pvs_num_cntrls;
+
+    /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
+     * See r500 docs 6.5.2 - done in emit */
+
+    /* avoid division by zero */
+    if (input_count == 0) input_count = 1;
+    if (output_count == 0) output_count = 1;
+    if (temp_count == 0) temp_count = 1;
+
+    if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+	vtx_mem_size = 128;
+    else
+	vtx_mem_size = 72;
+
+    pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
+    pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
+
+    R300_STATECHANGE(rmesa, vap_cntl);
+    if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
+	    (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
+	    (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
+	    (12 << R300_VF_MAX_VTX_NUM_SHIFT);
+	if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+	    rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
+    } else
+	/* not sure about non-tcl */
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
+				    (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+				    (5 << R300_VF_MAX_VTX_NUM_SHIFT));
+
+    if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
+    else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
+	     (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
+	     (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
+    else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
+	     (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
+    else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
+	     (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
+    else
+	rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
+
+}
+
 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
 {
 	struct r300_vertex_shader_state *prog = &(rmesa->state.vertex_shader);
 	GLuint o_reg = 0;
+	GLuint i_reg = 0;
 	int i;
 	int inst_count = 0;
 	int param_count = 0;
@@ -1567,31 +2033,42 @@ static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
 
 	for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) {
 		if (rmesa->state.sw_tcl_inputs[i] != -1) {
-			prog->program.body.i[program_end + 0] = EASY_VSF_OP(MUL, o_reg++, ALL, RESULT);
-			prog->program.body.i[program_end + 1] = VSF_REG(rmesa->state.sw_tcl_inputs[i]);
-			prog->program.body.i[program_end + 2] = VSF_ATTR_UNITY(rmesa->state.sw_tcl_inputs[i]);
-			prog->program.body.i[program_end + 3] = VSF_UNITY(rmesa->state.sw_tcl_inputs[i]);
+			prog->program.body.i[program_end + 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY, GL_FALSE, GL_FALSE, o_reg++, VSF_FLAG_ALL, PVS_DST_REG_OUT);
+			prog->program.body.i[program_end + 1] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
+			prog->program.body.i[program_end + 2] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
+			prog->program.body.i[program_end + 3] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
 			program_end += 4;
+			i_reg++;
 		}
 	}
 
 	prog->program.length = program_end;
 
-	r300SetupVertexProgramFragment(rmesa, R300_PVS_UPLOAD_PROGRAM,
+	r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
 				       &(prog->program));
 	inst_count = (prog->program.length / 4) - 1;
 
+	r300VapCntl(rmesa, i_reg, o_reg, 0);
+
 	R300_STATECHANGE(rmesa, pvs);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
-	    (0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
-	    (inst_count << R300_PVS_CNTL_1_POS_END_SHIFT) |
-	    (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
+	    (0 << R300_PVS_FIRST_INST_SHIFT) |
+	    (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
+	    (inst_count << R300_PVS_LAST_INST_SHIFT);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
-	    (0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) |
-	    (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
+	    (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
+	    (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
-	    (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) |
-	    (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT);
+	    (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
+}
+
+static int bit_count (int x)
+{
+    x = ((x & 0xaaaaaaaaU) >> 1) + (x & 0x55555555U);
+    x = ((x & 0xccccccccU) >> 2) + (x & 0x33333333U);
+    x = (x >> 16) + (x & 0xffff);
+    x = ((x & 0xf0f0) >> 4) + (x & 0x0f0f);
+    return (x >> 8) + (x & 0x00ff);
 }
 
 static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
@@ -1612,20 +2089,22 @@ static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
 	bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
 	param_count /= 4;
 
-	r300SetupVertexProgramFragment(rmesa, R300_PVS_UPLOAD_PROGRAM, &(prog->program));
+	r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
 	inst_count = (prog->program.length / 4) - 1;
 
+	r300VapCntl(rmesa, bit_count(prog->key.InputsRead),
+		    bit_count(prog->key.OutputsWritten), prog->num_temporaries);
+
 	R300_STATECHANGE(rmesa, pvs);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
-	  (0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
-	  (inst_count << R300_PVS_CNTL_1_POS_END_SHIFT) |
-	  (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
+	  (0 << R300_PVS_FIRST_INST_SHIFT) |
+	  (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
+	  (inst_count << R300_PVS_LAST_INST_SHIFT);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
-	  (0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT) |
-	  (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
+	  (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
+	  (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
 	rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
-	  (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT) |
-	  (inst_count << R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT);
+	  (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
 }
 
 static void r300SetupVertexProgram(r300ContextPtr rmesa)
@@ -1648,13 +2127,6 @@ static void r300SetupVertexProgram(r300ContextPtr rmesa)
 		r300SetupDefaultVertexProgram(rmesa);
 	}
 
-
-	/* FIXME: This is done for vertex shader fragments, but also needs to be
-	 * done for vap_pvs, so I leave it as a reminder. */
-#if 0
-	reg_start(R300_VAP_PVS_WAITIDLE, 0);
-	e32(0x00000000);
-#endif
 }
 
 /**
@@ -1664,84 +2136,54 @@ static void r300SetupVertexProgram(r300ContextPtr rmesa)
  */
 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 {
-	r300ContextPtr r300 = R300_CONTEXT(ctx);
-
 	if (RADEON_DEBUG & DEBUG_STATE)
 		fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
 			_mesa_lookup_enum_by_nr(cap),
 			state ? "GL_TRUE" : "GL_FALSE");
 
 	switch (cap) {
-		/* Fast track this one...
-		 */
 	case GL_TEXTURE_1D:
 	case GL_TEXTURE_2D:
 	case GL_TEXTURE_3D:
+		/* empty */
 		break;
-
 	case GL_FOG:
-		R300_STATECHANGE(r300, fogs);
-		if (state) {
-			r300->hw.fogs.cmd[R300_FOGS_STATE] |= R300_FOG_ENABLE;
-
-			r300Fogfv(ctx, GL_FOG_MODE, NULL);
-			r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density);
-			r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start);
-			r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End);
-			r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color);
-		} else {
-			r300->hw.fogs.cmd[R300_FOGS_STATE] &= ~R300_FOG_ENABLE;
-		}
-
+		r300SetFogState(ctx, state);
 		break;
-
 	case GL_ALPHA_TEST:
 		r300SetAlphaState(ctx);
 		break;
-
-	case GL_BLEND:
 	case GL_COLOR_LOGIC_OP:
+		r300SetLogicOpState(ctx);
+		/* fall-through, because logic op overrides blending */
+	case GL_BLEND:
 		r300SetBlendState(ctx);
 		break;
-
+	case GL_CLIP_PLANE0:
+	case GL_CLIP_PLANE1:
+	case GL_CLIP_PLANE2:
+	case GL_CLIP_PLANE3:
+	case GL_CLIP_PLANE4:
+	case GL_CLIP_PLANE5:
+		r300SetClipPlaneState(ctx, cap, state);
+		break;
 	case GL_DEPTH_TEST:
 		r300SetDepthState(ctx);
 		break;
-
 	case GL_STENCIL_TEST:
-		if (r300->state.stencil.hw_stencil) {
-			R300_STATECHANGE(r300, zs);
-			if (state) {
-				r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
-				    R300_RB3D_STENCIL_ENABLE;
-			} else {
-				r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
-				    ~R300_RB3D_STENCIL_ENABLE;
-			}
-		} else {
-#if R200_MERGED
-			FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
-#endif
-		}
+		r300SetStencilState(ctx, state);
 		break;
-
 	case GL_CULL_FACE:
 		r300UpdateCulling(ctx);
 		break;
-
 	case GL_POLYGON_OFFSET_POINT:
 	case GL_POLYGON_OFFSET_LINE:
 	case GL_POLYGON_OFFSET_FILL:
-		R300_STATECHANGE(r300, occlusion_cntl);
-		if (state) {
-			r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
-		} else {
-			r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
-		}
+		r300SetPolygonOffsetState(ctx, state);
 		break;
 	default:
 		radeonEnable(ctx, cap, state);
-		return;
+		break;
 	}
 }
 
@@ -1784,15 +2226,11 @@ static void r300ResetHwState(r300ContextPtr r300)
 	r300UpdateTextureState(ctx);
 
 	r300SetBlendState(ctx);
+	r300SetLogicOpState(ctx);
 
 	r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
 	r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
 
-	if (!has_tcl)
-		r300->hw.vap_cntl.cmd[1] = 0x0014045a;
-	else
-		r300->hw.vap_cntl.cmd[1] = 0x0030045A;	//0x0030065a /* Dangerous */
-
 	r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
 	    | R300_VPORT_X_OFFSET_ENA
 	    | R300_VPORT_Y_SCALE_ENA
@@ -1801,8 +2239,8 @@ static void r300ResetHwState(r300ContextPtr r300)
 	    | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
 	r300->hw.vte.cmd[2] = 0x00000008;
 
-	r300->hw.unk2134.cmd[1] = 0x00FFFFFF;
-	r300->hw.unk2134.cmd[2] = 0x00000000;
+	r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
+	r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
 
 #ifdef MESA_LITTLE_ENDIAN
 	r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
@@ -1814,54 +2252,53 @@ static void r300ResetHwState(r300ContextPtr r300)
 	if (!has_tcl)
 		r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
 
-	r300->hw.unk21DC.cmd[1] = 0xAAAAAAAA;
-
-	r300->hw.unk221C.cmd[1] = R300_221C_NORMAL;
-
-	r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
-	r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
-	r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
-	r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
+	r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
 
 	/* XXX: Other families? */
 	if (has_tcl) {
+		r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
+
+		r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
+		r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
+		r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
+		r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
+
 		switch (r300->radeon.radeonScreen->chip_family) {
 		case CHIP_FAMILY_R300:
-			r300->hw.unk2288.cmd[1] = R300_2288_R300;
+			r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
 			break;
 		default:
-			r300->hw.unk2288.cmd[1] = R300_2288_RV350;
+			r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
 			break;
 		}
 	}
 
 	r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
 	    | R300_GB_LINE_STUFF_ENABLE
-	    | R300_GB_TRIANGLE_STUFF_ENABLE /*| R300_GB_UNK31 */ ;
+	    | R300_GB_TRIANGLE_STUFF_ENABLE;
 
 	r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
 	r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
 
-	/* XXX: Other families? */
 	r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
-	    R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16;
-	switch (r300->radeon.radeonScreen->chip_family) {
-	case CHIP_FAMILY_R300:
-	case CHIP_FAMILY_R350:
+	    R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
+	switch (r300->radeon.radeonScreen->num_gb_pipes) {
+	case 1:
+	default:
 		r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
-		    R300_GB_TILE_PIPE_COUNT_R300;
+		    R300_GB_TILE_PIPE_COUNT_RV300;
 		break;
-	case CHIP_FAMILY_RV410:
+	case 2:
 		r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
-		    R300_GB_TILE_PIPE_COUNT_RV410;
+		    R300_GB_TILE_PIPE_COUNT_R300;
 		break;
-	case CHIP_FAMILY_R420:
+	case 3:
 		r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
-		    R300_GB_TILE_PIPE_COUNT_R420;
+		    R300_GB_TILE_PIPE_COUNT_R420_3P;
 		break;
-	default:
+	case 4:
 		r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
-		    R300_GB_TILE_PIPE_COUNT_RV300;
+		    R300_GB_TILE_PIPE_COUNT_R420;
 		break;
 	}
 
@@ -1869,26 +2306,26 @@ static void r300ResetHwState(r300ContextPtr r300)
 	r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = R300_GB_FOG_SELECT_1_1_W;
 
 	/* XXX: Enable anti-aliasing? */
-	r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = R300_AA_DISABLE;
+	r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
 
-	r300->hw.unk4200.cmd[1] = r300PackFloat32(0.0);
-	r300->hw.unk4200.cmd[2] = r300PackFloat32(0.0);
-	r300->hw.unk4200.cmd[3] = r300PackFloat32(1.0);
-	r300->hw.unk4200.cmd[4] = r300PackFloat32(1.0);
+	r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
+	r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
+	r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
+	r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
 
-	r300->hw.unk4214.cmd[1] = 0x00050005;
+	r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
 
 	r300PointSize(ctx, 1.0);
 
-	r300->hw.unk4230.cmd[1] = 0x18000006;
-	r300->hw.unk4230.cmd[2] = 0x00020006;
-	r300->hw.unk4230.cmd[3] = r300PackFloat32(1.0 / 192.0);
+	r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
+	r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
+	r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
 
 	r300LineWidth(ctx, 1.0);
 
-	r300->hw.unk4260.cmd[1] = 0;
-	r300->hw.unk4260.cmd[2] = r300PackFloat32(0.0);
-	r300->hw.unk4260.cmd[3] = r300PackFloat32(1.0);
+	r300->hw.ga_line_stipple.cmd[1] = 0;
+	r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
+	r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
 
 	r300ShadeModel(ctx, ctx->Light.ShadeModel);
 
@@ -1902,19 +2339,23 @@ static void r300ResetHwState(r300ContextPtr r300)
 	r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
 	r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
 
-	r300->hw.unk42C0.cmd[1] = 0x4B7FFFFF;
-	r300->hw.unk42C0.cmd[2] = 0x00000000;
+	r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
+	r300->hw.su_depth_scale.cmd[2] = 0x00000000;
 
-	r300->hw.unk43A4.cmd[1] = 0x0000001C;
-	r300->hw.unk43A4.cmd[2] = 0x2DA49525;
+	r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
+	r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
 
-	r300->hw.unk43E8.cmd[1] = 0x00FFFFFF;
+	r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
 
-	r300->hw.unk46A4.cmd[1] = 0x00001B01;
-	r300->hw.unk46A4.cmd[2] = 0x00001B0F;
-	r300->hw.unk46A4.cmd[3] = 0x00001B0F;
-	r300->hw.unk46A4.cmd[4] = 0x00001B0F;
-	r300->hw.unk46A4.cmd[5] = 0x00000001;
+	r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8  |
+	  R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
+	r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
+	  R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
+	r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
+	  R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
+	r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
+	  R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
+	r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W24;
 
 	r300Enable(ctx, GL_FOG, ctx->Fog.Enabled);
 	r300Fogfv(ctx, GL_FOG_MODE, NULL);
@@ -1924,9 +2365,9 @@ static void r300ResetHwState(r300ContextPtr r300)
 	r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color);
 	r300Fogfv(ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL);
 
-	r300->hw.unk4BD8.cmd[1] = 0;
+	r300->hw.fg_depth_src.cmd[1] = 0;
 
-	r300->hw.unk4E00.cmd[1] = 0;
+	r300->hw.rb3d_cctl.cmd[1] = 0;
 
 	r300BlendColor(ctx, ctx->Color.BlendColor);
 
@@ -1944,20 +2385,20 @@ static void r300ResetHwState(r300ContextPtr r300)
 	if (r300->radeon.sarea->tiling_enabled)
 		r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE;
 
-	r300->hw.unk4E50.cmd[1] = 0;
-	r300->hw.unk4E50.cmd[2] = 0;
-	r300->hw.unk4E50.cmd[3] = 0;
-	r300->hw.unk4E50.cmd[4] = 0;
-	r300->hw.unk4E50.cmd[5] = 0;
-	r300->hw.unk4E50.cmd[6] = 0;
-	r300->hw.unk4E50.cmd[7] = 0;
-	r300->hw.unk4E50.cmd[8] = 0;
-	r300->hw.unk4E50.cmd[9] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[1] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[2] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[3] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[4] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[5] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[6] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[7] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[8] = 0;
+	r300->hw.rb3d_dither_ctl.cmd[9] = 0;
 
-	r300->hw.unk4E88.cmd[1] = 0;
+	r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
 
-	r300->hw.unk4EA0.cmd[1] = 0x00000000;
-	r300->hw.unk4EA0.cmd[2] = 0xffffffff;
+	r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
+	r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
 
 	r300->hw.zb.cmd[R300_ZB_OFFSET] =
 	    r300->radeon.radeonScreen->depthOffset +
@@ -1966,22 +2407,40 @@ static void r300ResetHwState(r300ContextPtr r300)
 
 	if (r300->radeon.sarea->tiling_enabled) {
 		/* XXX: Turn off when clearing buffers ? */
-		r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTH_TILE_ENABLE;
+		r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTHMACROTILE_ENABLE;
 
 		if (ctx->Visual.depthBits == 24)
 			r300->hw.zb.cmd[R300_ZB_PITCH] |=
-			    R300_DEPTH_MICROTILE_ENABLE;
+			    R300_DEPTHMICROTILE_TILED;
 	}
 
-	r300->hw.unk4F28.cmd[1] = 0;
+	r300->hw.zb_depthclearvalue.cmd[1] = 0;
+
+	switch (ctx->Visual.depthBits) {
+	case 16:
+		r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_16BIT_INT_Z;
+		break;
+	case 24:
+		r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
+		break;
+	default:
+		fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits);
+		_mesa_exit(-1);
+	}
+
+	r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
+	r300->hw.zstencil_format.cmd[3] = 0x00000003;
+	r300->hw.zstencil_format.cmd[4] = 0x00000000;
+	r300SetEarlyZState(ctx);
 
 	r300->hw.unk4F30.cmd[1] = 0;
 	r300->hw.unk4F30.cmd[2] = 0;
 
-	r300->hw.unk4F44.cmd[1] = 0;
+	r300->hw.zb_hiz_offset.cmd[1] = 0;
 
-	r300->hw.unk4F54.cmd[1] = 0;
+	r300->hw.zb_hiz_pitch.cmd[1] = 0;
 
+	r300VapCntl(r300, 0, 0, 0);
 	if (has_tcl) {
 		r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
 		r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
@@ -2027,17 +2486,40 @@ void r300UpdateShaders(r300ContextPtr rmesa)
 			hw_tcl_on = future_hw_tcl_on = 0;
 			r300ResetHwState(rmesa);
 
+			r300UpdateStateParameters(ctx, _NEW_PROGRAM);
 			return;
 		}
-		r300UpdateStateParameters(ctx, _NEW_PROGRAM);
 	}
+	r300UpdateStateParameters(ctx, _NEW_PROGRAM);
 }
 
+static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
+	struct gl_program *program, struct prog_src_register srcreg)
+{
+	static const GLfloat dummy[4] = { 0, 0, 0, 0 };
+
+	switch(srcreg.File) {
+	case PROGRAM_LOCAL_PARAM:
+		return program->LocalParams[srcreg.Index];
+	case PROGRAM_ENV_PARAM:
+		return ctx->FragmentProgram.Parameters[srcreg.Index];
+	case PROGRAM_STATE_VAR:
+	case PROGRAM_NAMED_PARAM:
+	case PROGRAM_CONSTANT:
+		return program->Parameters->ParameterValues[srcreg.Index];
+	default:
+		_mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
+		return dummy;
+	}
+}
+
+
 static void r300SetupPixelShader(r300ContextPtr rmesa)
 {
 	GLcontext *ctx = rmesa->radeon.glCtx;
 	struct r300_fragment_program *fp = (struct r300_fragment_program *)
 	    (char *)ctx->FragmentProgram._Current;
+	struct r300_fragment_program_code *code;
 	int i, k;
 
 	if (!fp)		/* should only happenen once, just after context is created */
@@ -2049,76 +2531,174 @@ static void r300SetupPixelShader(r300ContextPtr rmesa)
 			__FUNCTION__);
 		return;
 	}
+	code = &fp->code;
 
-	R300_STATECHANGE(rmesa, fpi[0]);
-	rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR0_0, fp->alu_end + 1);
-	for (i = 0; i <= fp->alu_end; i++) {
-		rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst0;
-	}
+	r300SetupTextures(ctx);
 
+	R300_STATECHANGE(rmesa, fpi[0]);
 	R300_STATECHANGE(rmesa, fpi[1]);
-	rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR1_0, fp->alu_end + 1);
-	for (i = 0; i <= fp->alu_end; i++) {
-		rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst1;
-	}
-
 	R300_STATECHANGE(rmesa, fpi[2]);
-	rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR2_0, fp->alu_end + 1);
-	for (i = 0; i <= fp->alu_end; i++) {
-		rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst2;
-	}
-
 	R300_STATECHANGE(rmesa, fpi[3]);
-	rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_PFS_INSTR3_0, fp->alu_end + 1);
-	for (i = 0; i <= fp->alu_end; i++) {
-		rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = fp->alu.inst[i].inst3;
+	rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_INST_0, code->alu.length);
+	rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_ADDR_0, code->alu.length);
+	rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_INST_0, code->alu.length);
+	rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
+	for (i = 0; i < code->alu.length; i++) {
+		rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
+		rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
+		rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
+		rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
 	}
 
 	R300_STATECHANGE(rmesa, fp);
-	rmesa->hw.fp.cmd[R300_FP_CNTL0] = fp->cur_node | (fp->first_node_has_tex << 3);
-	rmesa->hw.fp.cmd[R300_FP_CNTL1] = fp->max_temp_idx;
+	rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
+	rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
 	rmesa->hw.fp.cmd[R300_FP_CNTL2] =
-	  (fp->alu_offset << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
-	  (fp->alu_end << R300_PFS_CNTL_ALU_END_SHIFT) |
-	  (fp->tex_offset << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
-	  (fp->tex_end << R300_PFS_CNTL_TEX_END_SHIFT);
+	  (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
+	  ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
+	  (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
+	  ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
 	/* I just want to say, the way these nodes are stored.. weird.. */
-	for (i = 0, k = (4 - (fp->cur_node + 1)); i < 4; i++, k++) {
-		if (i < (fp->cur_node + 1)) {
+	for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
+		if (i < (code->cur_node + 1)) {
 			rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
-			  (fp->node[i].alu_offset << R300_PFS_NODE_ALU_OFFSET_SHIFT) |
-			  (fp->node[i].alu_end << R300_PFS_NODE_ALU_END_SHIFT) |
-			  (fp->node[i].tex_offset << R300_PFS_NODE_TEX_OFFSET_SHIFT) |
-			  (fp->node[i].tex_end << R300_PFS_NODE_TEX_END_SHIFT) |
-			  fp->node[i].flags;
+			  (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
+			  (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
+			  (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
+			  (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
+			  code->node[i].flags;
 		} else {
 			rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
 		}
 	}
 
 	R300_STATECHANGE(rmesa, fpp);
-	rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, fp->const_nr * 4);
-	for (i = 0; i < fp->const_nr; i++) {
-		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(fp->constant[i][0]);
-		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(fp->constant[i][1]);
-		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(fp->constant[i][2]);
-		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(fp->constant[i][3]);
+	rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, code->const_nr * 4);
+	for (i = 0; i < code->const_nr; i++) {
+		const GLfloat *constant = get_fragmentprogram_constant(ctx,
+			&fp->mesa_program.Base, code->constant[i]);
+		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
+		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
+		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
+		rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
 	}
 }
 
+#define bump_r500fp_count(ptr, new_count)   do{\
+	drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
+	int _nc=(new_count)/6; \
+	assert(_nc < 256); \
+	if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
+} while(0)
+
+#define bump_r500fp_const_count(ptr, new_count)   do{\
+	drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
+	int _nc=(new_count)/4; \
+	assert(_nc < 256); \
+	if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
+} while(0)
+
+static void r500SetupPixelShader(r300ContextPtr rmesa)
+{
+	GLcontext *ctx = rmesa->radeon.glCtx;
+	struct r500_fragment_program *fp = (struct r500_fragment_program *)
+	    (char *)ctx->FragmentProgram._Current;
+	int i;
+	struct r500_fragment_program_code *code;
+
+	if (!fp)		/* should only happenen once, just after context is created */
+		return;
+
+	((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
+	((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
+
+	r500TranslateFragmentShader(rmesa, fp);
+	if (!fp->translated) {
+		fprintf(stderr, "%s: No valid fragment shader, exiting\n",
+			__FUNCTION__);
+		return;
+	}
+	code = &fp->code;
+
+	if (fp->mesa_program.FogOption != GL_NONE) {
+		/* Enable HW fog. Try not to squish GL context.
+		 * (Anybody sane remembered to set glFog() opts first!) */
+		r300SetFogState(ctx, GL_TRUE);
+		ctx->Fog.Mode = fp->mesa_program.FogOption;
+		r300Fogfv(ctx, GL_FOG_MODE, NULL);
+	} else
+		/* Make sure HW is matching GL context. */
+		r300SetFogState(ctx, ctx->Fog.Enabled);
+
+	r300SetupTextures(ctx);
+
+	R300_STATECHANGE(rmesa, fp);
+	rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
+
+	rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
+	    R500_US_CODE_START_ADDR(code->inst_offset) |
+	    R500_US_CODE_END_ADDR(code->inst_end);
+	rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
+	    R500_US_CODE_RANGE_ADDR(code->inst_offset) |
+	    R500_US_CODE_RANGE_SIZE(code->inst_end);
+	rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
+	    R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
+
+	R300_STATECHANGE(rmesa, r500fp);
+	/* Emit our shader... */
+	for (i = 0; i < code->inst_end+1; i++) {
+		rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
+		rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
+		rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
+		rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
+		rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
+		rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
+	}
+
+	bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
+
+	R300_STATECHANGE(rmesa, r500fp_const);
+	for (i = 0; i < code->const_nr; i++) {
+		const GLfloat *constant = get_fragmentprogram_constant(ctx,
+			&fp->mesa_program.Base, code->constant[i]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
+	}
+	bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
+
+}
+
 void r300UpdateShaderStates(r300ContextPtr rmesa)
 {
 	GLcontext *ctx;
 	ctx = rmesa->radeon.glCtx;
 
 	r300UpdateTextureState(ctx);
+	r300SetEarlyZState(ctx);
 
-	r300SetupPixelShader(rmesa);
-	r300SetupTextures(ctx);
+	GLuint fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
+	if (current_fragment_program_writes_depth(ctx))
+		fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
+	if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
+		R300_STATECHANGE(rmesa, fg_depth_src);
+		rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
+	}
+
+	if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+		r500SetupPixelShader(rmesa);
+	else
+		r300SetupPixelShader(rmesa);
+
+	if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+		r500SetupRSUnit(ctx);
+	else
+		r300SetupRSUnit(ctx);
 
 	if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
 		r300SetupVertexProgram(rmesa);
-	r300SetupRSUnit(ctx);
+
 }
 
 /**
@@ -2158,13 +2738,11 @@ void r300InitState(r300ContextPtr r300)
 	switch (ctx->Visual.depthBits) {
 	case 16:
 		r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
-		depth_fmt = R300_DEPTH_FORMAT_16BIT_INT_Z;
-		r300->state.stencil.clear = 0x00000000;
+		depth_fmt = R300_DEPTHFORMAT_16BIT_INT_Z;
 		break;
 	case 24:
 		r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
-		depth_fmt = R300_DEPTH_FORMAT_24BIT_INT_Z;
-		r300->state.stencil.clear = 0x00ff0000;
+		depth_fmt = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
 		break;
 	default:
 		fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
@@ -2188,6 +2766,24 @@ static void r300RenderMode(GLcontext * ctx, GLenum mode)
 	(void)mode;
 }
 
+void r300UpdateClipPlanes( GLcontext *ctx )
+{
+	r300ContextPtr rmesa = R300_CONTEXT(ctx);
+	GLuint p;
+
+	for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
+		if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
+			GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+
+			R300_STATECHANGE( rmesa, vpucp[p] );
+			rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
+			rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
+			rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
+			rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
+		}
+	}
+}
+
 /**
  * Initialize driver's state callback functions
  */
@@ -2208,9 +2804,12 @@ void r300InitStateFuncs(struct dd_function_table *functions)
 	functions->Fogfv = r300Fogfv;
 	functions->FrontFace = r300FrontFace;
 	functions->ShadeModel = r300ShadeModel;
+	functions->LogicOpcode = r300LogicOpcode;
+
+	/* ARB_point_parameters */
+	functions->PointParameterfv = r300PointParameter;
 
 	/* Stencil related */
-	functions->ClearStencil = r300ClearStencil;
 	functions->StencilFuncSeparate = r300StencilFuncSeparate;
 	functions->StencilMaskSeparate = r300StencilMaskSeparate;
 	functions->StencilOpSeparate = r300StencilOpSeparate;
@@ -2225,4 +2824,6 @@ void r300InitStateFuncs(struct dd_function_table *functions)
 	functions->PolygonMode = r300PolygonMode;
 
 	functions->RenderMode = r300RenderMode;
+
+	functions->ClipPlane = r300ClipPlane;
 }
diff --git a/src/mesa/drivers/dri/r300/r300_state.h b/src/mesa/drivers/dri/r300/r300_state.h
index 365f7ecd0c6..0589ab7cad9 100644
--- a/src/mesa/drivers/dri/r300/r300_state.h
+++ b/src/mesa/drivers/dri/r300/r300_state.h
@@ -65,13 +65,16 @@ do {							\
     \
 } while (0)
 
-extern void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state);
-extern void r300InitState(r300ContextPtr r300);
-extern void r300InitStateFuncs(struct dd_function_table *functions);
-extern void r300UpdateViewportOffset(GLcontext * ctx);
-extern void r300UpdateDrawBuffer(GLcontext * ctx);
-
-extern void r300UpdateShaders(r300ContextPtr rmesa);
-extern void r300UpdateShaderStates(r300ContextPtr rmesa);
+// r300_state.c
+extern int future_hw_tcl_on;
+void _tnl_UpdateFixedFunctionProgram (GLcontext * ctx);
+void r300UpdateViewportOffset (GLcontext * ctx);
+void r300UpdateDrawBuffer (GLcontext * ctx);
+void r300UpdateStateParameters (GLcontext * ctx, GLuint new_state);
+void r300UpdateShaders (r300ContextPtr rmesa);
+void r300UpdateShaderStates (r300ContextPtr rmesa);
+void r300InitState (r300ContextPtr r300);
+void r300UpdateClipPlanes (GLcontext * ctx);
+void r300InitStateFuncs (struct dd_function_table *functions);
 
 #endif				/* __R300_STATE_H__ */
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index c949f33bf33..b6e7ce1a1a6 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -34,13 +34,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "enums.h"
-#include "image.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/imports.h"
+#include "main/light.h"
+#include "main/macros.h"
 
 #include "swrast/s_context.h"
 #include "swrast/s_fog.h"
@@ -77,31 +78,6 @@ do {									\
    rmesa->swtcl.vertex_attr_count++;					\
 } while (0)
 
-/* this differs from the VIR0 in emit.c - TODO merge them using another option */
-static GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
-				 int *inputs, GLint * tab, GLuint nr)
-{
-	GLuint i, dw;
-
-	/* type, inputs, stop bit, size */
-	for (i = 0; i + 1 < nr; i += 2) {
-		dw = (inputs[tab[i]] << 8) | 0x3;
-		dw |= ((inputs[tab[i + 1]] << 8) | 0x3) << 16;
-		if (i + 2 == nr) {
-			dw |= (R300_VAP_INPUT_ROUTE_END << 16);
-		}
-		dst[i >> 1] = dw;
-	}
-
-	if (nr & 1) {
-		dw = (inputs[tab[nr - 1]] << 8) | 0x3;
-		dw |= R300_VAP_INPUT_ROUTE_END;
-		dst[nr >> 1] = dw;
-	}
-
-	return (nr + 1) >> 1;
-}
-
 static void r300SetVertexFormat( GLcontext *ctx )
 {
 	r300ContextPtr rmesa = R300_CONTEXT( ctx );
@@ -117,19 +93,24 @@ static void r300SetVertexFormat( GLcontext *ctx )
 	GLint tab[VERT_ATTRIB_MAX];
 	int swizzle[VERT_ATTRIB_MAX][4];
 	GLuint i, nr;
+	GLuint sz, vap_fmt_1 = 0;
 
 	DECLARE_RENDERINPUTS(render_inputs_bitset);
 	RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset);
 	RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
 	RENDERINPUTS_COPY(rmesa->state.render_inputs_bitset, render_inputs_bitset);
 
+	vte = rmesa->hw.vte.cmd[1];
+	vte &= ~(R300_VTX_XY_FMT | R300_VTX_Z_FMT | R300_VTX_W0_FMT);
 	/* Important:
 	 */
 	if ( VB->NdcPtr != NULL ) {
 		VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr;
+		vte |= R300_VTX_XY_FMT | R300_VTX_Z_FMT;
 	}
 	else {
 		VB->AttribPtr[VERT_ATTRIB_POS] = VB->ClipPtr;
+		vte |= R300_VTX_W0_FMT;
 	}
 
 	assert( VB->AttribPtr[VERT_ATTRIB_POS] != NULL );
@@ -139,14 +120,15 @@ static void r300SetVertexFormat( GLcontext *ctx )
 	 * build up a hardware vertex.
 	 */
 	if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POS)) {
-		vap_vte_cntl |= R300_VTX_W0_FMT;
+		sz = VB->AttribPtr[VERT_ATTRIB_POS]->size;
 		InputsRead |= 1 << VERT_ATTRIB_POS;
 		OutputsWritten |= 1 << VERT_RESULT_HPOS;
-		EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F );
-	} else
+		EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_1F + sz - 1 );
+		offset = sz;
+	} else {
+		offset = 4;
 		EMIT_PAD(4 * sizeof(float));
-
-	offset = 4;
+	}
 
 	if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) {
 		EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F );
@@ -155,18 +137,19 @@ static void r300SetVertexFormat( GLcontext *ctx )
 	}
 
 	if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_COLOR0)) {
+		sz = VB->AttribPtr[VERT_ATTRIB_COLOR0]->size;
 	        rmesa->swtcl.coloroffset = offset;
 		InputsRead |= 1 << VERT_ATTRIB_COLOR0;
 		OutputsWritten |= 1 << VERT_RESULT_COL0;
-		EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4F );
+		EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_1F + sz - 1 );
+		offset += sz;
 	}
 
-	offset += 4;
-
 	rmesa->swtcl.specoffset = 0;
 	if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
+		sz = VB->AttribPtr[VERT_ATTRIB_COLOR1]->size;
 		rmesa->swtcl.specoffset = offset;
-		EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_4F );
+		EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_1F + sz - 1 );
 		InputsRead |= 1 << VERT_ATTRIB_COLOR1;
 		OutputsWritten |= 1 << VERT_RESULT_COL1;
 	}
@@ -176,9 +159,11 @@ static void r300SetVertexFormat( GLcontext *ctx )
 
 		for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
 			if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
+				sz = VB->TexCoordPtr[i]->size;
 				InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i);
 				OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i);
-				EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_4F );
+				EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1 );
+				vap_fmt_1 |= sz << (3 * i);
 			}
 		}
 	}
@@ -237,7 +222,7 @@ static void r300SetVertexFormat( GLcontext *ctx )
    
 	R300_STATECHANGE(rmesa, vof);
 	rmesa->hw.vof.cmd[R300_VOF_CNTL_0] = r300VAPOutputCntl0(ctx, OutputsWritten);
-	rmesa->hw.vof.cmd[R300_VOF_CNTL_1] = r300VAPOutputCntl1(ctx, OutputsWritten);
+	rmesa->hw.vof.cmd[R300_VOF_CNTL_1] = vap_fmt_1;
    
 	rmesa->swtcl.vertex_size =
 		_tnl_install_attrs( ctx,
@@ -249,7 +234,7 @@ static void r300SetVertexFormat( GLcontext *ctx )
 
 	RENDERINPUTS_COPY( rmesa->tnl_index_bitset, index_bitset );
 
-	vte = rmesa->hw.vte.cmd[1];
+
 	R300_STATECHANGE(rmesa, vte);
 	rmesa->hw.vte.cmd[1] = vte;
 	rmesa->hw.vte.cmd[2] = rmesa->swtcl.vertex_size;
@@ -590,6 +575,7 @@ static void r300RenderStart(GLcontext *ctx)
 	r300ChooseRenderState(ctx);	
 	r300SetVertexFormat(ctx);
 
+	r300UpdateShaders(rmesa);
 	r300UpdateShaderStates(rmesa);
 
 	r300EmitCacheFlush(rmesa);
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.h b/src/mesa/drivers/dri/r300/r300_swtcl.h
index 2ea6ceded7b..55df53c1adf 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.h
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.h
@@ -35,7 +35,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R300_SWTCL_H__
 #define __R300_SWTCL_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 #include "r300_context.h"
 
diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index 1805cecd0af..8ab382c83cc 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -32,18 +32,19 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "colormac.h"
-#include "context.h"
-#include "enums.h"
-#include "image.h"
-#include "simple_list.h"
-#include "texformat.h"
-#include "texstore.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+
 #include "texmem.h"
-#include "teximage.h"
-#include "texobj.h"
 
 #include "r300_context.h"
 #include "r300_state.h"
@@ -52,129 +53,59 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "xmlpool.h"
 
+
+static unsigned int translate_wrap_mode(GLenum wrapmode)
+{
+	switch(wrapmode) {
+	case GL_REPEAT: return R300_TX_REPEAT;
+	case GL_CLAMP: return R300_TX_CLAMP;
+	case GL_CLAMP_TO_EDGE: return R300_TX_CLAMP_TO_EDGE;
+	case GL_CLAMP_TO_BORDER: return R300_TX_CLAMP_TO_BORDER;
+	case GL_MIRRORED_REPEAT: return R300_TX_REPEAT | R300_TX_MIRRORED;
+	case GL_MIRROR_CLAMP_EXT: return R300_TX_CLAMP | R300_TX_MIRRORED;
+	case GL_MIRROR_CLAMP_TO_EDGE_EXT: return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
+	case GL_MIRROR_CLAMP_TO_BORDER_EXT: return R300_TX_CLAMP_TO_BORDER | R300_TX_MIRRORED;
+	default:
+		_mesa_problem(NULL, "bad wrap mode in %s", __FUNCTION__);
+		return 0;
+	}
+}
+
+
 /**
- * Set the texture wrap modes.
+ * Update the cached hardware registers based on the current texture wrap modes.
  *
  * \param t Texture object whose wrap modes are to be set
- * \param swrap Wrap mode for the \a s texture coordinate
- * \param twrap Wrap mode for the \a t texture coordinate
  */
-
-static void r300SetTexWrap(r300TexObjPtr t, GLenum swrap, GLenum twrap,
-			   GLenum rwrap)
+static void r300UpdateTexWrap(r300TexObjPtr t)
 {
-	unsigned long hw_swrap = 0, hw_twrap = 0, hw_qwrap = 0;
+	struct gl_texture_object *tObj = t->base.tObj;
 
 	t->filter &=
-	    ~(R300_TX_WRAP_S_MASK | R300_TX_WRAP_T_MASK | R300_TX_WRAP_Q_MASK);
+	    ~(R300_TX_WRAP_S_MASK | R300_TX_WRAP_T_MASK | R300_TX_WRAP_R_MASK);
 
-	switch (swrap) {
-	case GL_REPEAT:
-		hw_swrap |= R300_TX_REPEAT;
-		break;
-	case GL_CLAMP:
-		hw_swrap |= R300_TX_CLAMP;
-		break;
-	case GL_CLAMP_TO_EDGE:
-		hw_swrap |= R300_TX_CLAMP_TO_EDGE;
-		break;
-	case GL_CLAMP_TO_BORDER:
-		hw_swrap |= R300_TX_CLAMP_TO_BORDER;
-		break;
-	case GL_MIRRORED_REPEAT:
-		hw_swrap |= R300_TX_REPEAT | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_EXT:
-		hw_swrap |= R300_TX_CLAMP | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_EDGE_EXT:
-		hw_swrap |= R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_BORDER_EXT:
-		hw_swrap |= R300_TX_CLAMP_TO_BORDER | R300_TX_MIRRORED;
-		break;
-	default:
-		_mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
-	}
+	t->filter |= translate_wrap_mode(tObj->WrapS) << R300_TX_WRAP_S_SHIFT;
 
-	switch (twrap) {
-	case GL_REPEAT:
-		hw_twrap |= R300_TX_REPEAT;
-		break;
-	case GL_CLAMP:
-		hw_twrap |= R300_TX_CLAMP;
-		break;
-	case GL_CLAMP_TO_EDGE:
-		hw_twrap |= R300_TX_CLAMP_TO_EDGE;
-		break;
-	case GL_CLAMP_TO_BORDER:
-		hw_twrap |= R300_TX_CLAMP_TO_BORDER;
-		break;
-	case GL_MIRRORED_REPEAT:
-		hw_twrap |= R300_TX_REPEAT | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_EXT:
-		hw_twrap |= R300_TX_CLAMP | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_EDGE_EXT:
-		hw_twrap |= R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_BORDER_EXT:
-		hw_twrap |= R300_TX_CLAMP_TO_BORDER | R300_TX_MIRRORED;
-		break;
-	default:
-		_mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
-	}
+	if (tObj->Target != GL_TEXTURE_1D) {
+		t->filter |= translate_wrap_mode(tObj->WrapT) << R300_TX_WRAP_T_SHIFT;
 
-	switch (rwrap) {
-	case GL_REPEAT:
-		hw_qwrap |= R300_TX_REPEAT;
-		break;
-	case GL_CLAMP:
-		hw_qwrap |= R300_TX_CLAMP;
-		break;
-	case GL_CLAMP_TO_EDGE:
-		hw_qwrap |= R300_TX_CLAMP_TO_EDGE;
-		break;
-	case GL_CLAMP_TO_BORDER:
-		hw_qwrap |= R300_TX_CLAMP_TO_BORDER;
-		break;
-	case GL_MIRRORED_REPEAT:
-		hw_qwrap |= R300_TX_REPEAT | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_EXT:
-		hw_qwrap |= R300_TX_CLAMP | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_EDGE_EXT:
-		hw_qwrap |= R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED;
-		break;
-	case GL_MIRROR_CLAMP_TO_BORDER_EXT:
-		hw_qwrap |= R300_TX_CLAMP_TO_BORDER | R300_TX_MIRRORED;
-		break;
-	default:
-		_mesa_problem(NULL, "bad R wrap mode in %s", __FUNCTION__);
+		if (tObj->Target == GL_TEXTURE_3D)
+			t->filter |= translate_wrap_mode(tObj->WrapR) << R300_TX_WRAP_R_SHIFT;
 	}
-
-	t->filter |= hw_swrap << R300_TX_WRAP_S_SHIFT;
-	t->filter |= hw_twrap << R300_TX_WRAP_T_SHIFT;
-	t->filter |= hw_qwrap << R300_TX_WRAP_Q_SHIFT;
 }
 
-static void r300SetTexMaxAnisotropy(r300TexObjPtr t, GLfloat max)
+static GLuint aniso_filter(GLfloat anisotropy)
 {
-
-	t->filter &= ~R300_TX_MAX_ANISO_MASK;
-
-	if (max <= 1.0) {
-		t->filter |= R300_TX_MAX_ANISO_1_TO_1;
-	} else if (max <= 2.0) {
-		t->filter |= R300_TX_MAX_ANISO_2_TO_1;
-	} else if (max <= 4.0) {
-		t->filter |= R300_TX_MAX_ANISO_4_TO_1;
-	} else if (max <= 8.0) {
-		t->filter |= R300_TX_MAX_ANISO_8_TO_1;
+	if (anisotropy >= 16.0) {
+		return R300_TX_MAX_ANISO_16_TO_1;
+	} else if (anisotropy >= 8.0) {
+		return R300_TX_MAX_ANISO_8_TO_1;
+	} else if (anisotropy >= 4.0) {
+		return R300_TX_MAX_ANISO_4_TO_1;
+	} else if (anisotropy >= 2.0) {
+		return R300_TX_MAX_ANISO_2_TO_1;
 	} else {
-		t->filter |= R300_TX_MAX_ANISO_16_TO_1;
+		return R300_TX_MAX_ANISO_1_TO_1;
 	}
 }
 
@@ -184,54 +115,47 @@ static void r300SetTexMaxAnisotropy(r300TexObjPtr t, GLfloat max)
  * \param t Texture whose filter modes are to be set
  * \param minf Texture minification mode
  * \param magf Texture magnification mode
+ * \param anisotropy Maximum anisotropy level
  */
-
-static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf)
+static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf, GLfloat anisotropy)
 {
-	GLuint anisotropy = (t->filter & R300_TX_MAX_ANISO_MASK);
+	t->filter &= ~(R300_TX_MIN_FILTER_MASK | R300_TX_MIN_FILTER_MIP_MASK | R300_TX_MAG_FILTER_MASK | R300_TX_MAX_ANISO_MASK);
+	t->filter_1 &= ~R300_EDGE_ANISO_EDGE_ONLY;
 
-	t->filter &= ~(R300_TX_MIN_FILTER_MASK | R300_TX_MAG_FILTER_MASK);
+	/* Note that EXT_texture_filter_anisotropic is extremely vague about
+	 * how anisotropic filtering interacts with the "normal" filter modes.
+	 * When anisotropic filtering is enabled, we override min and mag
+	 * filter settings completely. This includes driconf's settings.
+	 */
+	if (anisotropy >= 2.0 && (minf != GL_NEAREST) && (magf != GL_NEAREST)) {
+		t->filter |= R300_TX_MAG_FILTER_ANISO
+			| R300_TX_MIN_FILTER_ANISO
+			| R300_TX_MIN_FILTER_MIP_LINEAR
+			| aniso_filter(anisotropy);
+		if (RADEON_DEBUG & DEBUG_TEXTURE)
+			fprintf(stderr, "Using maximum anisotropy of %f\n", anisotropy);
+		return;
+	}
 
-	if (anisotropy == R300_TX_MAX_ANISO_1_TO_1) {
-		switch (minf) {
-		case GL_NEAREST:
-			t->filter |= R300_TX_MIN_FILTER_NEAREST;
-			break;
-		case GL_LINEAR:
-			t->filter |= R300_TX_MIN_FILTER_LINEAR;
-			break;
-		case GL_NEAREST_MIPMAP_NEAREST:
-			t->filter |= R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST;
-			break;
-		case GL_NEAREST_MIPMAP_LINEAR:
-			t->filter |= R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR;
-			break;
-		case GL_LINEAR_MIPMAP_NEAREST:
-			t->filter |= R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST;
-			break;
-		case GL_LINEAR_MIPMAP_LINEAR:
-			t->filter |= R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR;
-			break;
-		}
-	} else {
-		switch (minf) {
-		case GL_NEAREST:
-			t->filter |= R300_TX_MIN_FILTER_ANISO_NEAREST;
-			break;
-		case GL_LINEAR:
-			t->filter |= R300_TX_MIN_FILTER_ANISO_LINEAR;
-			break;
-		case GL_NEAREST_MIPMAP_NEAREST:
-		case GL_LINEAR_MIPMAP_NEAREST:
-			t->filter |=
-			    R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST;
-			break;
-		case GL_NEAREST_MIPMAP_LINEAR:
-		case GL_LINEAR_MIPMAP_LINEAR:
-			t->filter |=
-			    R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR;
-			break;
-		}
+	switch (minf) {
+	case GL_NEAREST:
+		t->filter |= R300_TX_MIN_FILTER_NEAREST;
+		break;
+	case GL_LINEAR:
+		t->filter |= R300_TX_MIN_FILTER_LINEAR;
+		break;
+	case GL_NEAREST_MIPMAP_NEAREST:
+		t->filter |= R300_TX_MIN_FILTER_NEAREST|R300_TX_MIN_FILTER_MIP_NEAREST;
+		break;
+	case GL_NEAREST_MIPMAP_LINEAR:
+		t->filter |= R300_TX_MIN_FILTER_NEAREST|R300_TX_MIN_FILTER_MIP_LINEAR;
+		break;
+	case GL_LINEAR_MIPMAP_NEAREST:
+		t->filter |= R300_TX_MIN_FILTER_LINEAR|R300_TX_MIN_FILTER_MIP_NEAREST;
+		break;
+	case GL_LINEAR_MIPMAP_LINEAR:
+		t->filter |= R300_TX_MIN_FILTER_LINEAR|R300_TX_MIN_FILTER_MIP_LINEAR;
+		break;
 	}
 
 	/* Note we don't have 3D mipmaps so only use the mag filter setting
@@ -249,7 +173,7 @@ static void r300SetTexFilter(r300TexObjPtr t, GLenum minf, GLenum magf)
 
 static void r300SetTexBorderColor(r300TexObjPtr t, GLubyte c[4])
 {
-	t->pp_border_color = PACK_COLOR_8888(c[0], c[1], c[2], c[3]);
+	t->pp_border_color = PACK_COLOR_8888(c[3], c[0], c[1], c[2]);
 }
 
 /**
@@ -277,9 +201,8 @@ static r300TexObjPtr r300AllocTexObj(struct gl_texture_object *texObj)
 
 		make_empty_list(&t->base);
 
-		r300SetTexWrap(t, texObj->WrapS, texObj->WrapT, texObj->WrapR);
-		r300SetTexMaxAnisotropy(t, texObj->MaxAnisotropy);
-		r300SetTexFilter(t, texObj->MinFilter, texObj->MagFilter);
+		r300UpdateTexWrap(t);
+		r300SetTexFilter(t, texObj->MinFilter, texObj->MagFilter, texObj->MaxAnisotropy);
 		r300SetTexBorderColor(t, texObj->_BorderChan);
 	}
 
@@ -482,6 +405,25 @@ static const struct gl_texture_format *r300ChooseTextureFormat(GLcontext * ctx,
 	case GL_RGBA32F_ARB:
 		return &_mesa_texformat_rgba_float32;
 
+	case GL_DEPTH_COMPONENT:
+	case GL_DEPTH_COMPONENT16:
+	case GL_DEPTH_COMPONENT24:
+	case GL_DEPTH_COMPONENT32:
+#if 0
+		switch (type) {
+		case GL_UNSIGNED_BYTE:
+		case GL_UNSIGNED_SHORT:
+			return &_mesa_texformat_z16;
+		case GL_UNSIGNED_INT:
+			return &_mesa_texformat_z32;
+		case GL_UNSIGNED_INT_24_8_EXT:
+		default:
+			return &_mesa_texformat_z24_s8;
+		}
+#else
+		return &_mesa_texformat_z16;
+#endif
+
 	default:
 		_mesa_problem(ctx,
 			      "unexpected internalFormat 0x%x in r300ChooseTextureFormat",
@@ -957,60 +899,6 @@ r300TexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
 	t->dirty_images[0] |= (1 << level);
 }
 
-static void r300TexEnv(GLcontext * ctx, GLenum target,
-		       GLenum pname, const GLfloat * param)
-{
-	if (RADEON_DEBUG & DEBUG_STATE) {
-		fprintf(stderr, "%s( %s )\n",
-			__FUNCTION__, _mesa_lookup_enum_by_nr(pname));
-	}
-
-	/* This is incorrect: Need to maintain this data for each of
-	 * GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch
-	 * between them according to _ReallyEnabled.
-	 */
-	switch (pname) {
-	case GL_TEXTURE_LOD_BIAS_EXT:{
-#if 0				/* Needs to be relocated in order to make sure we got the right tmu */
-			GLfloat bias, min;
-			GLuint b;
-
-			/* The R300's LOD bias is a signed 2's complement value with a
-			 * range of -16.0 <= bias < 16.0.
-			 *
-			 * NOTE: Add a small bias to the bias for conform mipsel.c test.
-			 */
-			bias = *param + .01;
-			min =
-			    driQueryOptionb(&rmesa->radeon.optionCache,
-					    "no_neg_lod_bias") ? 0.0 : -16.0;
-			bias = CLAMP(bias, min, 16.0);
-
-			/* 0.0 - 16.0 == 0x0 - 0x1000 */
-			/* 0.0 - -16.0 == 0x1001 - 0x1fff */
-			b = 0x1000 / 16.0 * bias;
-			b &= R300_LOD_BIAS_MASK;
-
-			if (b !=
-			    (rmesa->hw.tex.unknown1.
-			     cmd[R300_TEX_VALUE_0 +
-				 unit] & R300_LOD_BIAS_MASK)) {
-				R300_STATECHANGE(rmesa, tex.unknown1);
-				rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0 +
-							   unit] &=
-				    ~R300_LOD_BIAS_MASK;
-				rmesa->hw.tex.unknown1.cmd[R300_TEX_VALUE_0 +
-							   unit] |= b;
-			}
-#endif
-			break;
-		}
-
-	default:
-		return;
-	}
-}
-
 /**
  * Changes variables and flags for a state update, which will happen at the
  * next UpdateTextureState
@@ -1031,14 +919,13 @@ static void r300TexParameter(GLcontext * ctx, GLenum target,
 	case GL_TEXTURE_MIN_FILTER:
 	case GL_TEXTURE_MAG_FILTER:
 	case GL_TEXTURE_MAX_ANISOTROPY_EXT:
-		r300SetTexMaxAnisotropy(t, texObj->MaxAnisotropy);
-		r300SetTexFilter(t, texObj->MinFilter, texObj->MagFilter);
+		r300SetTexFilter(t, texObj->MinFilter, texObj->MagFilter, texObj->MaxAnisotropy);
 		break;
 
 	case GL_TEXTURE_WRAP_S:
 	case GL_TEXTURE_WRAP_T:
 	case GL_TEXTURE_WRAP_R:
-		r300SetTexWrap(t, texObj->WrapS, texObj->WrapT, texObj->WrapR);
+		r300UpdateTexWrap(t);
 		break;
 
 	case GL_TEXTURE_BORDER_COLOR:
@@ -1057,13 +944,24 @@ static void r300TexParameter(GLcontext * ctx, GLenum target,
 		driSwapOutTextureObject((driTextureObject *) t);
 		break;
 
+	case GL_DEPTH_TEXTURE_MODE:
+		if (!texObj->Image[0][texObj->BaseLevel])
+			return;
+		if (texObj->Image[0][texObj->BaseLevel]->TexFormat->BaseFormat
+		    == GL_DEPTH_COMPONENT) {
+			r300SetDepthTexMode(texObj);
+			break;
+		} else {
+			/* If the texture isn't a depth texture, changing this
+			 * state won't cause any changes to the hardware.
+			 * Don't force a flush of texture state.
+			 */
+			return;
+		}
+
 	default:
 		return;
 	}
-
-	/* Mark this texobj as dirty (one bit per tex unit)
-	 */
-	t->dirty_state = TEX_ALL;
 }
 
 static void r300BindTexture(GLcontext * ctx, GLenum target,
@@ -1146,7 +1044,6 @@ void r300InitTextureFuncs(struct dd_function_table *functions)
 	functions->DeleteTexture = r300DeleteTexture;
 	functions->IsTextureResident = driIsTextureResident;
 
-	functions->TexEnv = r300TexEnv;
 	functions->TexParameter = r300TexParameter;
 
 	functions->CompressedTexImage2D = r300CompressedTexImage2D;
diff --git a/src/mesa/drivers/dri/r300/r300_tex.h b/src/mesa/drivers/dri/r300/r300_tex.h
index f67a8e6ba65..b86d45bfe05 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.h
+++ b/src/mesa/drivers/dri/r300/r300_tex.h
@@ -35,6 +35,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __r300_TEX_H__
 #define __r300_TEX_H__
 
+extern void r300SetDepthTexMode(struct gl_texture_object *tObj);
+
 extern void r300SetTexOffset(__DRIcontext *pDRICtx, GLint texname,
 			     unsigned long long offset, GLint depth,
 			     GLuint pitch);
diff --git a/src/mesa/drivers/dri/r300/r300_texmem.c b/src/mesa/drivers/dri/r300/r300_texmem.c
index 38f0da8b7c0..b03eefaa7c5 100644
--- a/src/mesa/drivers/dri/r300/r300_texmem.c
+++ b/src/mesa/drivers/dri/r300/r300_texmem.c
@@ -38,12 +38,12 @@ SOFTWARE.
 
 #include <errno.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "colormac.h"
-#include "macros.h"
-#include "simple_list.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/colormac.h"
+#include "main/macros.h"
+#include "main/simple_list.h"
 #include "radeon_reg.h"		/* gets definition for usleep */
 #include "r300_context.h"
 #include "r300_state.h"
@@ -349,7 +349,7 @@ static void r300UploadSubImage(r300ContextPtr rmesa, r300TexObjPtr t,
 	imageWidth = texImage->Width;
 	imageHeight = texImage->Height;
 
-	offset = t->bufAddr + t->base.totalSize / 6 * face;
+	offset = t->bufAddr;
 
 	if (RADEON_DEBUG & (DEBUG_TEXTURE | DEBUG_IOCTL)) {
 		GLint imageX = 0;
@@ -505,7 +505,7 @@ int r300UploadTexImages(r300ContextPtr rmesa, r300TexObjPtr t, GLuint face)
 			t->base.lastLevel);
 	}
 
-	if (!t || t->base.totalSize == 0)
+	if (t->base.totalSize == 0)
 		return 0;
 
 	if (RADEON_DEBUG & DEBUG_SYNC) {
@@ -534,10 +534,6 @@ int r300UploadTexImages(r300ContextPtr rmesa, r300TexObjPtr t, GLuint face)
 			/* hope it's safe to add that here... */
 			t->offset |= t->tile_bits;
 		}
-
-		/* Mark this texobj as dirty on all units:
-		 */
-		t->dirty_state = TEX_ALL;
 	}
 
 	/* Let the world know we've used this memory recently.
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index 1d2909fd214..e2329f04ec7 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -35,14 +35,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \todo Enable R300 texture tiling code?
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texobj.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
+#include "main/enums.h"
 
 #include "r300_context.h"
 #include "r300_state.h"
@@ -115,11 +115,186 @@ static const struct tx_table {
 	_ASSIGN(LUMINANCE_ALPHA_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, Y, FL_I16A16)),
 	_ASSIGN(INTENSITY_FLOAT32, R300_EASY_TX_FORMAT(X, X, X, X, FL_I32)),
 	_ASSIGN(INTENSITY_FLOAT16, R300_EASY_TX_FORMAT(X, X, X, X, FL_I16)),
+	_ASSIGN(Z16, R300_EASY_TX_FORMAT(X, X, X, X, X16)),
+	_ASSIGN(Z24_S8, R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8)),
+	_ASSIGN(Z32, R300_EASY_TX_FORMAT(X, X, X, X, X32)),
 	/* *INDENT-ON* */
 };
 
 #undef _ASSIGN
 
+void r300SetDepthTexMode(struct gl_texture_object *tObj)
+{
+	static const GLuint formats[3][3] = {
+		{
+			R300_EASY_TX_FORMAT(X, X, X, ONE, X16),
+			R300_EASY_TX_FORMAT(X, X, X, X, X16),
+			R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X16),
+		},
+		{
+			R300_EASY_TX_FORMAT(X, X, X, ONE, X24_Y8),
+			R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8),
+			R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X24_Y8),
+		},
+		{
+			R300_EASY_TX_FORMAT(X, X, X, ONE, X32),
+			R300_EASY_TX_FORMAT(X, X, X, X, X32),
+			R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X32),
+		},
+	};
+	const GLuint *format;
+	r300TexObjPtr t;
+
+	if (!tObj)
+		return;
+
+	t = (r300TexObjPtr) tObj->DriverData;
+
+
+	switch (tObj->Image[0][tObj->BaseLevel]->TexFormat->MesaFormat) {
+	case MESA_FORMAT_Z16:
+		format = formats[0];
+		break;
+	case MESA_FORMAT_Z24_S8:
+		format = formats[1];
+		break;
+	case MESA_FORMAT_Z32:
+		format = formats[2];
+		break;
+	default:
+		/* Error...which should have already been caught by higher
+		 * levels of Mesa.
+		 */
+		ASSERT(0);
+		return;
+	}
+
+	switch (tObj->DepthMode) {
+	case GL_LUMINANCE:
+		t->format = format[0];
+		break;
+	case GL_INTENSITY:
+		t->format = format[1];
+		break;
+	case GL_ALPHA:
+		t->format = format[2];
+		break;
+	default:
+		/* Error...which should have already been caught by higher
+		 * levels of Mesa.
+		 */
+		ASSERT(0);
+		return;
+	}
+}
+
+
+/**
+ * Compute sizes and fill in offset and blit information for the given
+ * image (determined by \p face and \p level).
+ *
+ * \param curOffset points to the offset at which the image is to be stored
+ * and is updated by this function according to the size of the image.
+ */
+static void compute_tex_image_offset(
+	struct gl_texture_object *tObj,
+	GLuint face,
+	GLint level,
+	GLint* curOffset)
+{
+	r300TexObjPtr t = (r300TexObjPtr) tObj->DriverData;
+	const struct gl_texture_image* texImage;
+	GLuint blitWidth = R300_BLIT_WIDTH_BYTES;
+	GLuint texelBytes;
+	GLuint size;
+
+	texImage = tObj->Image[0][level + t->base.firstLevel];
+	if (!texImage)
+		return;
+
+	texelBytes = texImage->TexFormat->TexelBytes;
+
+	/* find image size in bytes */
+	if (texImage->IsCompressed) {
+		if ((t->format & R300_TX_FORMAT_DXT1) ==
+			R300_TX_FORMAT_DXT1) {
+			// fprintf(stderr,"DXT 1 %d %08X\n", texImage->Width, t->format);
+			if ((texImage->Width + 3) < 8)	/* width one block */
+				size = texImage->CompressedSize * 4;
+			else if ((texImage->Width + 3) < 16)
+				size = texImage->CompressedSize * 2;
+			else
+				size = texImage->CompressedSize;
+		} else {
+			/* DXT3/5, 16 bytes per block */
+			WARN_ONCE
+				("DXT 3/5 suffers from multitexturing problems!\n");
+			// fprintf(stderr,"DXT 3/5 %d\n", texImage->Width);
+			if ((texImage->Width + 3) < 8)
+				size = texImage->CompressedSize * 2;
+			else
+				size = texImage->CompressedSize;
+		}
+	} else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) {
+		size =
+			((texImage->Width * texelBytes +
+			63) & ~63) * texImage->Height;
+		blitWidth = 64 / texelBytes;
+	} else if (t->tile_bits & R300_TXO_MICRO_TILE) {
+		/* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
+			though the actual offset may be different (if texture is less than
+			32 bytes width) to the untiled case */
+		int w = (texImage->Width * texelBytes * 2 + 31) & ~31;
+		size =
+			(w * ((texImage->Height + 1) / 2)) *
+			texImage->Depth;
+		blitWidth = MAX2(texImage->Width, 64 / texelBytes);
+	} else {
+		int w = (texImage->Width * texelBytes + 31) & ~31;
+		size = w * texImage->Height * texImage->Depth;
+		blitWidth = MAX2(texImage->Width, 64 / texelBytes);
+	}
+	assert(size > 0);
+
+	if (RADEON_DEBUG & DEBUG_TEXTURE)
+		fprintf(stderr, "w=%d h=%d d=%d tb=%d intFormat=%d\n",
+			texImage->Width, texImage->Height,
+			texImage->Depth,
+			texImage->TexFormat->TexelBytes,
+			texImage->InternalFormat);
+
+	/* All images are aligned to a 32-byte offset */
+	*curOffset = (*curOffset + 0x1f) & ~0x1f;
+
+	if (texelBytes) {
+		/* fix x and y coords up later together with offset */
+		t->image[face][level].x = *curOffset;
+		t->image[face][level].y = 0;
+		t->image[face][level].width =
+			MIN2(size / texelBytes, blitWidth);
+		t->image[face][level].height =
+			(size / texelBytes) / t->image[face][level].width;
+	} else {
+		t->image[face][level].x = *curOffset % R300_BLIT_WIDTH_BYTES;
+		t->image[face][level].y = *curOffset / R300_BLIT_WIDTH_BYTES;
+		t->image[face][level].width =
+			MIN2(size, R300_BLIT_WIDTH_BYTES);
+		t->image[face][level].height = size / t->image[face][level].width;
+	}
+
+	if (RADEON_DEBUG & DEBUG_TEXTURE)
+		fprintf(stderr,
+			"level %d, face %d: %dx%d x=%d y=%d w=%d h=%d size=%d at %d\n",
+			level, face, texImage->Width, texImage->Height,
+			t->image[face][level].x, t->image[face][level].y,
+			t->image[face][level].width, t->image[face][level].height,
+			size, *curOffset);
+
+	*curOffset += size;
+}
+
+
+
 /**
  * This function computes the number of bytes of storage needed for
  * the given texture object (all mipmap levels, all cube faces).
@@ -137,7 +312,7 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 	r300TexObjPtr t = (r300TexObjPtr) tObj->DriverData;
 	const struct gl_texture_image *baseImage =
 	    tObj->Image[0][tObj->BaseLevel];
-	GLint curOffset, blitWidth;
+	GLint curOffset;
 	GLint i, texelBytes;
 	GLint numLevels;
 	GLint log2Width, log2Height, log2Depth;
@@ -146,7 +321,12 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 	 */
 	if (!t->image_override
 	    && VALID_FORMAT(baseImage->TexFormat->MesaFormat)) {
-		t->format = tx_table[baseImage->TexFormat->MesaFormat].format;
+		if (baseImage->TexFormat->BaseFormat == GL_DEPTH_COMPONENT) {
+			r300SetDepthTexMode(tObj);
+		} else {
+			t->format = tx_table[baseImage->TexFormat->MesaFormat].format;
+		}
+
 		t->filter |= tx_table[baseImage->TexFormat->MesaFormat].filter;
 	} else if (!t->image_override) {
 		_mesa_problem(NULL, "unexpected texture format in %s",
@@ -171,8 +351,6 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 	 * The idea is that we lay out the mipmap levels within a block of
 	 * memory organized as a rectangle of width BLIT_WIDTH_BYTES.
 	 */
-	curOffset = 0;
-	blitWidth = R300_BLIT_WIDTH_BYTES;
 	t->tile_bits = 0;
 
 	/* figure out if this texture is suitable for tiling. */
@@ -202,94 +380,23 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 	}
 #endif
 
-	for (i = 0; i < numLevels; i++) {
-		const struct gl_texture_image *texImage;
-		GLuint size;
-
-		texImage = tObj->Image[0][i + t->base.firstLevel];
-		if (!texImage)
-			break;
-
-		/* find image size in bytes */
-		if (texImage->IsCompressed) {
-			if ((t->format & R300_TX_FORMAT_DXT1) ==
-			    R300_TX_FORMAT_DXT1) {
-				// fprintf(stderr,"DXT 1 %d %08X\n", texImage->Width, t->format);
-				if ((texImage->Width + 3) < 8)	/* width one block */
-					size = texImage->CompressedSize * 4;
-				else if ((texImage->Width + 3) < 16)
-					size = texImage->CompressedSize * 2;
-				else
-					size = texImage->CompressedSize;
-			} else {
-				/* DXT3/5, 16 bytes per block */
-				WARN_ONCE
-				    ("DXT 3/5 suffers from multitexturing problems!\n");
-				// fprintf(stderr,"DXT 3/5 %d\n", texImage->Width);
-				if ((texImage->Width + 3) < 8)
-					size = texImage->CompressedSize * 2;
-				else
-					size = texImage->CompressedSize;
-			}
-		} else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) {
-			size =
-			    ((texImage->Width * texelBytes +
-			      63) & ~63) * texImage->Height;
-			blitWidth = 64 / texelBytes;
-		} else if (t->tile_bits & R300_TXO_MICRO_TILE) {
-			/* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
-			   though the actual offset may be different (if texture is less than
-			   32 bytes width) to the untiled case */
-			int w = (texImage->Width * texelBytes * 2 + 31) & ~31;
-			size =
-			    (w * ((texImage->Height + 1) / 2)) *
-			    texImage->Depth;
-			blitWidth = MAX2(texImage->Width, 64 / texelBytes);
-		} else {
-			int w = (texImage->Width * texelBytes + 31) & ~31;
-			size = w * texImage->Height * texImage->Depth;
-			blitWidth = MAX2(texImage->Width, 64 / texelBytes);
-		}
-		assert(size > 0);
-
-		if (RADEON_DEBUG & DEBUG_TEXTURE)
-			fprintf(stderr, "w=%d h=%d d=%d tb=%d intFormat=%d\n",
-				texImage->Width, texImage->Height,
-				texImage->Depth,
-				texImage->TexFormat->TexelBytes,
-				texImage->InternalFormat);
-
-		/* Align to 32-byte offset.  It is faster to do this unconditionally
-		 * (no branch penalty).
-		 */
+	curOffset = 0;
 
-		curOffset = (curOffset + 0x1f) & ~0x1f;
+	if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
+		ASSERT(log2Width == log2Height);
+		t->format |= R300_TX_FORMAT_CUBIC_MAP;
 
-		if (texelBytes) {
-			/* fix x and y coords up later together with offset */
-			t->image[0][i].x = curOffset;
-			t->image[0][i].y = 0;
-			t->image[0][i].width =
-			    MIN2(size / texelBytes, blitWidth);
-			t->image[0][i].height =
-			    (size / texelBytes) / t->image[0][i].width;
-		} else {
-			t->image[0][i].x = curOffset % R300_BLIT_WIDTH_BYTES;
-			t->image[0][i].y = curOffset / R300_BLIT_WIDTH_BYTES;
-			t->image[0][i].width =
-			    MIN2(size, R300_BLIT_WIDTH_BYTES);
-			t->image[0][i].height = size / t->image[0][i].width;
+		for(i = 0; i < numLevels; i++) {
+			GLuint face;
+			for(face = 0; face < 6; face++)
+				compute_tex_image_offset(tObj, face, i, &curOffset);
 		}
+	} else {
+		if (tObj->Target == GL_TEXTURE_3D)
+                	t->format |= R300_TX_FORMAT_3D;
 
-		if (RADEON_DEBUG & DEBUG_TEXTURE)
-			fprintf(stderr,
-				"level %d: %dx%d x=%d y=%d w=%d h=%d size=%d at %d\n",
-				i, texImage->Width, texImage->Height,
-				t->image[0][i].x, t->image[0][i].y,
-				t->image[0][i].width, t->image[0][i].height,
-				size, curOffset);
-
-		curOffset += size;
+		for (i = 0; i < numLevels; i++)
+			compute_tex_image_offset(tObj, 0, i, &curOffset);
 	}
 
 	/* Align the total size of texture memory block.
@@ -297,43 +404,27 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 	t->base.totalSize =
 	    (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
 
-	/* Setup remaining cube face blits, if needed */
-	if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
-		GLuint face;
-		for (face = 1; face < 6; face++) {
-			for (i = 0; i < numLevels; i++) {
-				t->image[face][i].x = t->image[0][i].x;
-				t->image[face][i].y = t->image[0][i].y;
-				t->image[face][i].width = t->image[0][i].width;
-				t->image[face][i].height =
-				    t->image[0][i].height;
-			}
-		}
-		t->base.totalSize *= 6;	/* total texmem needed */
-	}
-
-	if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
-		ASSERT(log2Width == log2Height);
-		t->format |= R300_TX_FORMAT_CUBIC_MAP;
-	}
-
 	t->size =
 	    (((tObj->Image[0][t->base.firstLevel]->Width -
 	       1) << R300_TX_WIDTHMASK_SHIFT)
 	     | ((tObj->Image[0][t->base.firstLevel]->Height - 1) <<
-		R300_TX_HEIGHTMASK_SHIFT))
+		R300_TX_HEIGHTMASK_SHIFT)
+	     | ((tObj->Image[0][t->base.firstLevel]->DepthLog2) <<
+		R300_TX_DEPTHMASK_SHIFT))
 	    | ((numLevels - 1) << R300_TX_MAX_MIP_LEVEL_SHIFT);
 
+	t->pitch = 0;
+
 	/* Only need to round to nearest 32 for textures, but the blitter
 	 * requires 64-byte aligned pitches, and we may/may not need the
 	 * blitter.   NPOT only!
 	 */
 	if (baseImage->IsCompressed) {
-		t->pitch =
+		t->pitch |=
 		    (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
 	} else if (tObj->Target == GL_TEXTURE_RECTANGLE_NV) {
-		unsigned int align = blitWidth - 1;
-		t->pitch = ((tObj->Image[0][t->base.firstLevel]->Width *
+		unsigned int align = (64 / texelBytes) - 1;
+		t->pitch |= ((tObj->Image[0][t->base.firstLevel]->Width *
 			     texelBytes) + 63) & ~(63);
 		t->size |= R300_TX_SIZE_TXPITCH_EN;
 		if (!t->image_override)
@@ -341,14 +432,17 @@ static void r300SetTexImages(r300ContextPtr rmesa,
 			    (((tObj->Image[0][t->base.firstLevel]->Width) +
 			      align) & ~align) - 1;
 	} else {
-		t->pitch =
+		t->pitch |=
 		    ((tObj->Image[0][t->base.firstLevel]->Width *
 		      texelBytes) + 63) & ~(63);
 	}
 
-	t->dirty_state = TEX_ALL;
-
-	/* FYI: r300UploadTexImages( rmesa, t ) used to be called here */
+	if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
+	    if (tObj->Image[0][t->base.firstLevel]->Width > 2048)
+		t->pitch_reg |= R500_TXWIDTH_BIT11;
+	    if (tObj->Image[0][t->base.firstLevel]->Height > 2048)
+		t->pitch_reg |= R500_TXHEIGHT_BIT11;
+	}
 }
 
 /* ================================================================
@@ -485,7 +579,6 @@ static GLboolean r300UpdateTexture(GLcontext * ctx, int unit)
 
 		rmesa->state.texture.unit[unit].texobj = t;
 		t->base.bound |= (1 << unit);
-		t->dirty_state |= 1 << unit;
 		driUpdateTextureLRU((driTextureObject *) t);	/* XXX: should be locked! */
 	}
 
@@ -495,12 +588,11 @@ static GLboolean r300UpdateTexture(GLcontext * ctx, int unit)
 void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
 		      unsigned long long offset, GLint depth, GLuint pitch)
 {
-	r300ContextPtr rmesa =
-	    (r300ContextPtr) ((__DRIcontextPrivate *) pDRICtx->private)->
-	    driverPrivate;
+	r300ContextPtr rmesa = pDRICtx->driverPrivate;
 	struct gl_texture_object *tObj =
 	    _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
 	r300TexObjPtr t;
+	uint32_t pitch_val;
 
 	if (!tObj)
 		return;
@@ -513,28 +605,30 @@ void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
 		return;
 
 	t->offset = offset;
-	t->pitch_reg = pitch;
+	t->pitch_reg &= (1 << 13) -1;
+	pitch_val = pitch;
 
 	switch (depth) {
 	case 32:
 		t->format = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
 		t->filter |= tx_table[2].filter;
-		t->pitch_reg /= 4;
+		pitch_val /= 4;
 		break;
 	case 24:
 	default:
 		t->format = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
 		t->filter |= tx_table[4].filter;
-		t->pitch_reg /= 4;
+		pitch_val /= 4;
 		break;
 	case 16:
 		t->format = R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5);
 		t->filter |= tx_table[5].filter;
-		t->pitch_reg /= 2;
+		pitch_val /= 2;
 		break;
 	}
+	pitch_val--;
 
-	t->pitch_reg--;
+	t->pitch_reg |= pitch_val;
 }
 
 static GLboolean r300UpdateTextureUnit(GLcontext * ctx, int unit)
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index 7d4e8c95112..c4e325e6a76 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -1,6 +1,7 @@
 /**************************************************************************
 
-Copyright (C) 2005 Aapo Tahkola.
+Copyright (C) 2005  Aapo Tahkola <aet@rasterburn.org>
+Copyright (C) 2008  Oliver McFadden <z3ro.geek@gmail.com>
 
 All Rights Reserved.
 
@@ -25,20 +26,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
 
-/**
- * \file
- *
- * \author Aapo Tahkola <aet@rasterburn.org>
- *
- * \author Oliver McFadden <z3ro.geek@gmail.com>
- *
- * For a description of the vertex program instruction set see r300_reg.h.
- */
+/* Radeon R5xx Acceleration, Revision 1.2 */
 
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-#include "program.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "shader/program.h"
 #include "shader/prog_instruction.h"
 #include "shader/prog_parameter.h"
 #include "shader/prog_statevars.h"
@@ -46,71 +39,38 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "r300_context.h"
 
-#if SWIZZLE_X != VSF_IN_COMPONENT_X || \
-    SWIZZLE_Y != VSF_IN_COMPONENT_Y || \
-    SWIZZLE_Z != VSF_IN_COMPONENT_Z || \
-    SWIZZLE_W != VSF_IN_COMPONENT_W || \
-    SWIZZLE_ZERO != VSF_IN_COMPONENT_ZERO || \
-    SWIZZLE_ONE != VSF_IN_COMPONENT_ONE || \
-    WRITEMASK_X != VSF_FLAG_X || \
-    WRITEMASK_Y != VSF_FLAG_Y || \
-    WRITEMASK_Z != VSF_FLAG_Z || \
-    WRITEMASK_W != VSF_FLAG_W
-#error Cannot change these!
-#endif
-
 /* TODO: Get rid of t_src_class call */
 #define CMP_SRCS(a, b) ((a.RelAddr != b.RelAddr) || (a.Index != b.Index && \
-		       ((t_src_class(a.File) == VSF_IN_CLASS_PARAM && \
-			 t_src_class(b.File) == VSF_IN_CLASS_PARAM) || \
-			(t_src_class(a.File) == VSF_IN_CLASS_ATTR && \
-			 t_src_class(b.File) == VSF_IN_CLASS_ATTR)))) \
-
-#define ZERO_SRC_0 (MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    t_src_class(src[0].File), VSF_FLAG_NONE) | (src[0].RelAddr << 4))
-
-#define ZERO_SRC_1 (MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    t_src_class(src[1].File), VSF_FLAG_NONE) | (src[1].RelAddr << 4))
-
-#define ZERO_SRC_2 (MAKE_VSF_SOURCE(t_src_index(vp, &src[2]), \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    SWIZZLE_ZERO, SWIZZLE_ZERO, \
-				    t_src_class(src[2].File), VSF_FLAG_NONE) | (src[2].RelAddr << 4))
-
-#define ONE_SRC_0 (MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    t_src_class(src[0].File), VSF_FLAG_NONE) | (src[0].RelAddr << 4))
-
-#define ONE_SRC_1 (MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    t_src_class(src[1].File), VSF_FLAG_NONE) | (src[1].RelAddr << 4))
-
-#define ONE_SRC_2 (MAKE_VSF_SOURCE(t_src_index(vp, &src[2]), \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    SWIZZLE_ONE, SWIZZLE_ONE, \
-				    t_src_class(src[2].File), VSF_FLAG_NONE) | (src[2].RelAddr << 4))
+		       ((t_src_class(a.File) == PVS_SRC_REG_CONSTANT && \
+			 t_src_class(b.File) == PVS_SRC_REG_CONSTANT) || \
+			(t_src_class(a.File) == PVS_SRC_REG_INPUT && \
+			 t_src_class(b.File) == PVS_SRC_REG_INPUT)))) \
 
-/* DP4 version seems to trigger some hw peculiarity */
-//#define PREFER_DP4
+/*
+ * Take an already-setup and valid source then swizzle it appropriately to
+ * obtain a constant ZERO or ONE source.
+ */
+#define __CONST(x, y)	\
+	(PVS_SRC_OPERAND(t_src_index(vp, &src[x]),	\
+			   t_swizzle(y),	\
+			   t_swizzle(y),	\
+			   t_swizzle(y),	\
+			   t_swizzle(y),	\
+			   t_src_class(src[x].File), \
+			   VSF_FLAG_NONE) | (src[x].RelAddr << 4))
 
 #define FREE_TEMPS() \
 	do { \
-		if(u_temp_i < vp->num_temporaries) { \
-			WARN_ONCE("Ran out of temps, num temps %d, us %d\n", vp->num_temporaries, u_temp_i); \
+		int u_temp_used = (VSF_MAX_FRAGMENT_TEMPS - 1) - u_temp_i; \
+		if((vp->num_temporaries + u_temp_used) > VSF_MAX_FRAGMENT_TEMPS) { \
+			WARN_ONCE("Ran out of temps, num temps %d, us %d\n", vp->num_temporaries, u_temp_used); \
 			vp->native = GL_FALSE; \
 		} \
 		u_temp_i=VSF_MAX_FRAGMENT_TEMPS-1; \
 	} while (0)
 
 int r300VertexProgUpdateParams(GLcontext * ctx,
-			       struct r300_vertex_program_cont *vp,
-			       float *dst)
+			       struct r300_vertex_program_cont *vp, float *dst)
 {
 	int pi;
 	struct gl_vertex_program *mesa_vp = &vp->mesa_program;
@@ -141,7 +101,6 @@ int r300VertexProgUpdateParams(GLcontext * ctx,
 	paramList = mesa_vp->Base.Parameters;
 	for (pi = 0; pi < paramList->NumParameters; pi++) {
 		switch (paramList->Parameters[pi].Type) {
-
 		case PROGRAM_STATE_VAR:
 		case PROGRAM_NAMED_PARAM:
 			//fprintf(stderr, "%s", vp->Parameters->Parameters[pi].Name);
@@ -151,7 +110,6 @@ int r300VertexProgUpdateParams(GLcontext * ctx,
 			*dst++ = paramList->ParameterValues[pi][2];
 			*dst++ = paramList->ParameterValues[pi][3];
 			break;
-
 		default:
 			_mesa_problem(NULL, "Bad param type in %s",
 				      __FUNCTION__);
@@ -173,11 +131,11 @@ static unsigned long t_dst_class(enum register_file file)
 
 	switch (file) {
 	case PROGRAM_TEMPORARY:
-		return VSF_OUT_CLASS_TMP;
+		return PVS_DST_REG_TEMPORARY;
 	case PROGRAM_OUTPUT:
-		return VSF_OUT_CLASS_RESULT;
+		return PVS_DST_REG_OUT;
 	case PROGRAM_ADDRESS:
-		return VSF_OUT_CLASS_ADDR;
+		return PVS_DST_REG_A0;
 		/*
 		   case PROGRAM_INPUT:
 		   case PROGRAM_LOCAL_PARAM:
@@ -205,19 +163,17 @@ static unsigned long t_dst_index(struct r300_vertex_program *vp,
 
 static unsigned long t_src_class(enum register_file file)
 {
-
 	switch (file) {
 	case PROGRAM_TEMPORARY:
-		return VSF_IN_CLASS_TMP;
-
+		return PVS_SRC_REG_TEMPORARY;
 	case PROGRAM_INPUT:
-		return VSF_IN_CLASS_ATTR;
-
+		return PVS_SRC_REG_INPUT;
 	case PROGRAM_LOCAL_PARAM:
 	case PROGRAM_ENV_PARAM:
 	case PROGRAM_NAMED_PARAM:
+	case PROGRAM_CONSTANT:
 	case PROGRAM_STATE_VAR:
-		return VSF_IN_CLASS_PARAM;
+		return PVS_SRC_REG_CONSTANT;
 		/*
 		   case PROGRAM_OUTPUT:
 		   case PROGRAM_WRITE_ONLY:
@@ -230,7 +186,7 @@ static unsigned long t_src_class(enum register_file file)
 	}
 }
 
-static inline unsigned long t_swizzle(GLubyte swizzle)
+static INLINE unsigned long t_swizzle(GLubyte swizzle)
 {
 /* this is in fact a NOP as the Mesa SWIZZLE_* are all identical to VSF_IN_COMPONENT_* */
 	return swizzle;
@@ -242,8 +198,8 @@ static void vp_dump_inputs(struct r300_vertex_program *vp, char *caller)
 	int i;
 
 	if (vp == NULL) {
-		fprintf(stderr, "vp null in call to %s from %s\n",
-			__FUNCTION__, caller);
+		fprintf(stderr, "vp null in call to %s from %s\n", __FUNCTION__,
+			caller);
 		return;
 	}
 
@@ -292,7 +248,7 @@ static unsigned long t_src(struct r300_vertex_program *vp,
 	/* src->NegateBase uses the NEGATE_ flags from program_instruction.h,
 	 * which equal our VSF_FLAGS_ values, so it's safe to just pass it here.
 	 */
-	return MAKE_VSF_SOURCE(t_src_index(vp, src),
+	return PVS_SRC_OPERAND(t_src_index(vp, src),
 			       t_swizzle(GET_SWZ(src->Swizzle, 0)),
 			       t_swizzle(GET_SWZ(src->Swizzle, 1)),
 			       t_swizzle(GET_SWZ(src->Swizzle, 2)),
@@ -307,7 +263,7 @@ static unsigned long t_src_scalar(struct r300_vertex_program *vp,
 	/* src->NegateBase uses the NEGATE_ flags from program_instruction.h,
 	 * which equal our VSF_FLAGS_ values, so it's safe to just pass it here.
 	 */
-	return MAKE_VSF_SOURCE(t_src_index(vp, src),
+	return PVS_SRC_OPERAND(t_src_index(vp, src),
 			       t_swizzle(GET_SWZ(src->Swizzle, 0)),
 			       t_swizzle(GET_SWZ(src->Swizzle, 0)),
 			       t_swizzle(GET_SWZ(src->Swizzle, 0)),
@@ -330,397 +286,364 @@ static GLboolean valid_dst(struct r300_vertex_program *vp,
 	return GL_TRUE;
 }
 
-/*
- * Instruction    Inputs  Output   Description
- * -----------    ------  ------   --------------------------------
- * ABS            v       v        absolute value
- * ADD            v,v     v        add
- * ARL            s       a        address register load
- * DP3            v,v     ssss     3-component dot product
- * DP4            v,v     ssss     4-component dot product
- * DPH            v,v     ssss     homogeneous dot product
- * DST            v,v     v        distance vector
- * EX2            s       ssss     exponential base 2
- * EXP            s       v        exponential base 2 (approximate)
- * FLR            v       v        floor
- * FRC            v       v        fraction
- * LG2            s       ssss     logarithm base 2
- * LIT            v       v        compute light coefficients
- * LOG            s       v        logarithm base 2 (approximate)
- * MAD            v,v,v   v        multiply and add
- * MAX            v,v     v        maximum
- * MIN            v,v     v        minimum
- * MOV            v       v        move
- * MUL            v,v     v        multiply
- * POW            s,s     ssss     exponentiate
- * RCP            s       ssss     reciprocal
- * RSQ            s       ssss     reciprocal square root
- * SGE            v,v     v        set on greater than or equal
- * SLT            v,v     v        set on less than
- * SUB            v,v     v        subtract
- * SWZ            v       v        extended swizzle
- * XPD            v,v     v        cross product
- *
- * Table X.5:  Summary of vertex program instructions.  "v" indicates a
- * floating-point vector input or output, "s" indicates a floating-point
- * scalar input, "ssss" indicates a scalar output replicated across a
- * 4-component result vector, and "a" indicates a single address register
- * component.
- */
-
-static GLuint *t_opcode_abs(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeABS(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_MAXIMUM,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 3)),
-			    t_src_class(src[0].File),
-			    (!src[0].
-			     NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	inst[2] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),
+				  t_src_class(src[0].File),
+				  (!src[0].
+				   NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
 	    (src[0].RelAddr << 4);
 	inst[3] = 0;
 
 	return inst;
 }
 
-static GLuint *t_opcode_add(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeADD(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	unsigned long hw_op;
-
-#if 1
-	hw_op = (src[0].File == PROGRAM_TEMPORARY
-		 && src[1].File ==
-		 PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-	inst[1] = ONE_SRC_0;
-	inst[2] = t_src(vp, &src[0]);
-	inst[3] = t_src(vp, &src[1]);
-#else
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
-
-#endif
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_arl(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeARL(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ARL, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_FLT2FIX_DX,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_dp3(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeDP3(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ZERO} PARAM 0{} {X Y Z ZERO}
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
-	inst[1] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
-			    SWIZZLE_ZERO, t_src_class(src[0].File),
-			    src[0].
-			    NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
+	inst[0] = PVS_OP_DST_OPERAND(VE_DOT_PRODUCT,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
+				  SWIZZLE_ZERO,
+				  t_src_class(src[0].File),
+				  src[0].
+				  NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
 	    (src[0].RelAddr << 4);
-
 	inst[2] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
+	    PVS_SRC_OPERAND(t_src_index(vp, &src[1]),
 			    t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
 			    t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
-			    SWIZZLE_ZERO, t_src_class(src[1].File),
+			    t_swizzle(GET_SWZ(src[1].Swizzle, 2)), SWIZZLE_ZERO,
+			    t_src_class(src[1].File),
 			    src[1].
 			    NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
 	    (src[1].RelAddr << 4);
-
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_dp4(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeDP4(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_DOT_PRODUCT,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_dph(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeDPH(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W}
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
-	inst[1] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
-			    VSF_IN_COMPONENT_ONE, t_src_class(src[0].File),
-			    src[0].
-			    NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
+	inst[0] = PVS_OP_DST_OPERAND(VE_DOT_PRODUCT,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
+				  PVS_SRC_SELECT_FORCE_1,
+				  t_src_class(src[0].File),
+				  src[0].
+				  NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
 	    (src[0].RelAddr << 4);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_dst(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeDST(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_DST, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_DISTANCE_VECTOR,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_ex2(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeEX2(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_EX2, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(ME_EXP_BASE2_FULL_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_exp(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeEXP(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_EXP, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(ME_EXP_BASE2_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_flr(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3], int *u_temp_i)
+static GLuint *r300TranslateOpcodeFLR(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3],
+				      int *u_temp_i)
 {
 	/* FRC TMP 0.X Y Z W PARAM 0{} {X Y Z W}
 	   ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} TMP 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W */
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_FRC, *u_temp_i,
-			t_dst_mask(vpi->DstReg.WriteMask),
-			VSF_OUT_CLASS_TMP);
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_FRACTION,
+				     GL_FALSE,
+				     GL_FALSE,
+				     *u_temp_i,
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     PVS_DST_REG_TEMPORARY);
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 	inst += 4;
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] =
-	    MAKE_VSF_SOURCE(*u_temp_i, VSF_IN_COMPONENT_X,
-			    VSF_IN_COMPONENT_Y, VSF_IN_COMPONENT_Z,
-			    VSF_IN_COMPONENT_W, VSF_IN_CLASS_TMP,
-			    /* Not 100% sure about this */
-			    (!src[0].
-			     NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE
-			    /*VSF_FLAG_ALL */ );
-
-	inst[3] = ZERO_SRC_0;
+	inst[2] = PVS_SRC_OPERAND(*u_temp_i,
+				  PVS_SRC_SELECT_X,
+				  PVS_SRC_SELECT_Y,
+				  PVS_SRC_SELECT_Z,
+				  PVS_SRC_SELECT_W, PVS_SRC_REG_TEMPORARY,
+				  /* Not 100% sure about this */
+				  (!src[0].
+				   NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE
+				  /*VSF_FLAG_ALL */ );
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 	(*u_temp_i)--;
 
 	return inst;
 }
 
-static GLuint *t_opcode_frc(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeFRC(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_FRC, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_FRACTION,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_lg2(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeLG2(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	// LG2 RESULT 1.X Y Z W PARAM 0{} {X X X X}
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_LG2, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
-	inst[1] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
-			    t_src_class(src[0].File),
-			    src[0].
-			    NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	inst[0] = PVS_OP_DST_OPERAND(ME_LOG_BASE2_FULL_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
+				  t_src_class(src[0].File),
+				  src[0].
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
 	    (src[0].RelAddr << 4);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_lit(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeLIT(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//LIT TMP 1.Y Z TMP 1{} {X W Z Y} TMP 1{} {Y W Z X} TMP 1{} {Y X Z W}
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_LIT, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(ME_LIGHT_COEFF_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	/* NOTE: Users swizzling might not work. */
-	inst[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// x
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// w
-				  VSF_IN_COMPONENT_ZERO,	// z
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// y
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// X
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// W
+				  PVS_SRC_SELECT_FORCE_0,	// Z
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// Y
 				  t_src_class(src[0].File),
 				  src[0].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[0].RelAddr << 4);
-	inst[2] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// w
-				  VSF_IN_COMPONENT_ZERO,	// z
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// x
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[0].RelAddr << 4);
+	inst[2] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// W
+				  PVS_SRC_SELECT_FORCE_0,	// Z
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// X
 				  t_src_class(src[0].File),
 				  src[0].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[0].RelAddr << 4);
-	inst[3] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// x
-				  VSF_IN_COMPONENT_ZERO,	// z
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// w
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[0].RelAddr << 4);
+	inst[3] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// X
+				  PVS_SRC_SELECT_FORCE_0,	// Z
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// W
 				  t_src_class(src[0].File),
 				  src[0].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[0].RelAddr << 4);
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[0].RelAddr << 4);
 
 	return inst;
 }
 
-static GLuint *t_opcode_log(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeLOG(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_LOG, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(ME_LOG_BASE2_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_mad(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeMAD(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	unsigned long hw_op;
-
-	hw_op = (src[0].File == PROGRAM_TEMPORARY
-		 && src[1].File == PROGRAM_TEMPORARY
-		 && src[2].File ==
-		 PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(PVS_MACRO_OP_2CLK_MADD,
+				     GL_FALSE,
+				     GL_TRUE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
 	inst[3] = t_src(vp, &src[2]);
@@ -728,323 +651,302 @@ static GLuint *t_opcode_mad(struct r300_vertex_program *vp,
 	return inst;
 }
 
-static GLuint *t_opcode_max(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeMAX(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_MAXIMUM,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_min(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeMIN(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_MIN, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_MINIMUM,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_mov(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeMOV(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
 
-#if 1
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
-#else
-	hw_op =
-	    (src[0].File ==
-	     PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ONE_SRC_0;
-	inst[3] = ZERO_SRC_0;
-#endif
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_mul(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeMUL(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	unsigned long hw_op;
-
-	// HW mul can take third arg but appears to have some other limitations.
-
-	hw_op = (src[0].File == PROGRAM_TEMPORARY
-		 && src[1].File ==
-		 PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(VE_MULTIPLY,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_pow(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodePOW(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_POW, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(ME_POWER_FUNC_FF,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
 	inst[3] = t_src_scalar(vp, &src[1]);
 
 	return inst;
 }
 
-static GLuint *t_opcode_rcp(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeRCP(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_RCP, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(ME_RECIP_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_rsq(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeRSQ(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_RSQ, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(ME_RECIP_SQRT_DX,
+				     GL_TRUE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src_scalar(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_sge(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeSGE(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_SGE, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_SET_GREATER_THAN_EQUAL,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_slt(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeSLT(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_SLT, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	inst[0] = PVS_OP_DST_OPERAND(VE_SET_LESS_THAN,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
 	inst[2] = t_src(vp, &src[1]);
-	inst[3] = ZERO_SRC_1;
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_sub(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeSUB(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
-	unsigned long hw_op;
-
 	//ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
 
-#if 1
-	hw_op = (src[0].File == PROGRAM_TEMPORARY
-		 && src[1].File ==
-		 PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+#if 0
+	inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ONE_SRC_0;
-	inst[3] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
-			    t_src_class(src[1].File),
-			    (!src[1].
-			     NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	inst[2] = PVS_SRC_OPERAND(t_src_index(vp, &src[1]),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
+				  t_src_class(src[1].File),
+				  (!src[1].
+				   NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
 	    (src[1].RelAddr << 4);
+	inst[3] = 0;
 #else
 	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
+	    PVS_OP_DST_OPERAND(VE_MULTIPLY_ADD,
+			       GL_FALSE,
+			       GL_FALSE,
+			       t_dst_index(vp, &vpi->DstReg),
+			       t_dst_mask(vpi->DstReg.WriteMask),
+			       t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] =
-	    MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
-			    t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
-			    t_src_class(src[1].File),
-			    (!src[1].
-			     NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	inst[2] = __CONST(0, SWIZZLE_ONE);
+	inst[3] = PVS_SRC_OPERAND(t_src_index(vp, &src[1]),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
+				  t_src_class(src[1].File),
+				  (!src[1].
+				   NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
 	    (src[1].RelAddr << 4);
-	inst[3] = 0;
 #endif
 
 	return inst;
 }
 
-static GLuint *t_opcode_swz(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3])
+static GLuint *r300TranslateOpcodeSWZ(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3])
 {
 	//ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
 
-#if 1
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
+	inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
 	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ZERO_SRC_0;
-	inst[3] = ZERO_SRC_0;
-#else
-	hw_op =
-	    (src[0].File ==
-	     PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
-	    R300_VPI_OUT_OP_MAD;
-
-	inst[0] =
-	    MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-	inst[1] = t_src(vp, &src[0]);
-	inst[2] = ONE_SRC_0;
-	inst[3] = ZERO_SRC_0;
-#endif
+	inst[2] = __CONST(0, SWIZZLE_ZERO);
+	inst[3] = __CONST(0, SWIZZLE_ZERO);
 
 	return inst;
 }
 
-static GLuint *t_opcode_xpd(struct r300_vertex_program *vp,
-			    struct prog_instruction *vpi, GLuint * inst,
-			    struct prog_src_register src[3], int *u_temp_i)
+static GLuint *r300TranslateOpcodeXPD(struct r300_vertex_program *vp,
+				      struct prog_instruction *vpi,
+				      GLuint * inst,
+				      struct prog_src_register src[3],
+				      int *u_temp_i)
 {
 	/* mul r0, r1.yzxw, r2.zxyw
 	   mad r0, -r2.yzxw, r1.zxyw, r0
-	   NOTE: might need MAD_2
 	 */
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, *u_temp_i,
-			t_dst_mask(vpi->DstReg.WriteMask),
-			VSF_OUT_CLASS_TMP);
-
-	inst[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 2)),	// z
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// x
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// w
+	inst[0] = PVS_OP_DST_OPERAND(VE_MULTIPLY_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     *u_temp_i,
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     PVS_DST_REG_TEMPORARY);
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 2)),	// Z
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// X
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// W
 				  t_src_class(src[0].File),
 				  src[0].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[0].RelAddr << 4);
-
-	inst[2] = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 2)),	// z
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),	// x
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),	// w
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[0].RelAddr << 4);
+	inst[2] = PVS_SRC_OPERAND(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 2)),	// Z
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),	// X
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),	// W
 				  t_src_class(src[1].File),
 				  src[1].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[1].RelAddr << 4);
-
-	inst[3] = ZERO_SRC_1;
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[1].RelAddr << 4);
+	inst[3] = __CONST(1, SWIZZLE_ZERO);
 	inst += 4;
-	(*u_temp_i)--;
 
-	inst[0] =
-	    MAKE_VSF_OP(R300_VPI_OUT_OP_MAD, t_dst_index(vp, &vpi->DstReg),
-			t_dst_mask(vpi->DstReg.WriteMask),
-			t_dst_class(vpi->DstReg.File));
-
-	inst[1] = MAKE_VSF_SOURCE(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 2)),	// z
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),	// x
-				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),	// w
+	inst[0] = PVS_OP_DST_OPERAND(VE_MULTIPLY_ADD,
+				     GL_FALSE,
+				     GL_FALSE,
+				     t_dst_index(vp, &vpi->DstReg),
+				     t_dst_mask(vpi->DstReg.WriteMask),
+				     t_dst_class(vpi->DstReg.File));
+	inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &src[1]), t_swizzle(GET_SWZ(src[1].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 2)),	// Z
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 0)),	// X
+				  t_swizzle(GET_SWZ(src[1].Swizzle, 3)),	// W
 				  t_src_class(src[1].File),
 				  (!src[1].
-				   NegateBase) ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[1].RelAddr << 4);
-
-	inst[2] = MAKE_VSF_SOURCE(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 2)),	// z
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// x
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// y
-				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// w
+				   NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[1].RelAddr << 4);
+	inst[2] = PVS_SRC_OPERAND(t_src_index(vp, &src[0]), t_swizzle(GET_SWZ(src[0].Swizzle, 2)),	// Z
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 0)),	// X
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 1)),	// Y
+				  t_swizzle(GET_SWZ(src[0].Swizzle, 3)),	// W
 				  t_src_class(src[0].File),
 				  src[0].
-				  NegateBase ? VSF_FLAG_ALL :
-				  VSF_FLAG_NONE) | (src[0].RelAddr << 4);
-
+				  NegateBase ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
+	    (src[0].RelAddr << 4);
 	inst[3] =
-	    MAKE_VSF_SOURCE(*u_temp_i + 1, VSF_IN_COMPONENT_X,
-			    VSF_IN_COMPONENT_Y, VSF_IN_COMPONENT_Z,
-			    VSF_IN_COMPONENT_W, VSF_IN_CLASS_TMP,
-			    VSF_FLAG_NONE);
+	    PVS_SRC_OPERAND(*u_temp_i, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y,
+			    PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W,
+			    PVS_SRC_REG_TEMPORARY, VSF_FLAG_NONE);
+
+	(*u_temp_i)--;
 
 	return inst;
 }
@@ -1145,23 +1047,24 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
 		if (num_operands == 3) {	/* TODO: scalars */
 			if (CMP_SRCS(src[1], src[2])
 			    || CMP_SRCS(src[0], src[2])) {
-				inst[0] =
-				    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD,
-						u_temp_i, VSF_FLAG_ALL,
-						VSF_OUT_CLASS_TMP);
-
+				inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+							     GL_FALSE,
+							     GL_FALSE,
+							     u_temp_i,
+							     VSF_FLAG_ALL,
+							     PVS_DST_REG_TEMPORARY);
 				inst[1] =
-				    MAKE_VSF_SOURCE(t_src_index
-						    (vp, &src[2]),
-						    SWIZZLE_X, SWIZZLE_Y,
-						    SWIZZLE_Z, SWIZZLE_W,
-						    t_src_class(src[2].
-								File),
-						    VSF_FLAG_NONE) |
-				    (src[2].RelAddr << 4);
-
-				inst[2] = ZERO_SRC_2;
-				inst[3] = ZERO_SRC_2;
+				    PVS_SRC_OPERAND(t_src_index(vp, &src[2]),
+						    SWIZZLE_X,
+						    SWIZZLE_Y,
+						    SWIZZLE_Z,
+						    SWIZZLE_W,
+						    t_src_class(src[2].File),
+						    VSF_FLAG_NONE) | (src[2].
+								      RelAddr <<
+								      4);
+				inst[2] = __CONST(2, SWIZZLE_ZERO);
+				inst[3] = __CONST(2, SWIZZLE_ZERO);
 				inst += 4;
 
 				src[2].File = PROGRAM_TEMPORARY;
@@ -1173,23 +1076,24 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
 
 		if (num_operands >= 2) {
 			if (CMP_SRCS(src[1], src[0])) {
-				inst[0] =
-				    MAKE_VSF_OP(R300_VPI_OUT_OP_ADD,
-						u_temp_i, VSF_FLAG_ALL,
-						VSF_OUT_CLASS_TMP);
-
+				inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+							     GL_FALSE,
+							     GL_FALSE,
+							     u_temp_i,
+							     VSF_FLAG_ALL,
+							     PVS_DST_REG_TEMPORARY);
 				inst[1] =
-				    MAKE_VSF_SOURCE(t_src_index
-						    (vp, &src[0]),
-						    SWIZZLE_X, SWIZZLE_Y,
-						    SWIZZLE_Z, SWIZZLE_W,
-						    t_src_class(src[0].
-								File),
-						    VSF_FLAG_NONE) |
-				    (src[0].RelAddr << 4);
-
-				inst[2] = ZERO_SRC_0;
-				inst[3] = ZERO_SRC_0;
+				    PVS_SRC_OPERAND(t_src_index(vp, &src[0]),
+						    SWIZZLE_X,
+						    SWIZZLE_Y,
+						    SWIZZLE_Z,
+						    SWIZZLE_W,
+						    t_src_class(src[0].File),
+						    VSF_FLAG_NONE) | (src[0].
+								      RelAddr <<
+								      4);
+				inst[2] = __CONST(0, SWIZZLE_ZERO);
+				inst[3] = __CONST(0, SWIZZLE_ZERO);
 				inst += 4;
 
 				src[0].File = PROGRAM_TEMPORARY;
@@ -1201,89 +1105,87 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
 
 		switch (vpi->Opcode) {
 		case OPCODE_ABS:
-			inst = t_opcode_abs(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeABS(vp, vpi, inst, src);
 			break;
 		case OPCODE_ADD:
-			inst = t_opcode_add(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeADD(vp, vpi, inst, src);
 			break;
 		case OPCODE_ARL:
-			inst = t_opcode_arl(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeARL(vp, vpi, inst, src);
 			break;
 		case OPCODE_DP3:
-			inst = t_opcode_dp3(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeDP3(vp, vpi, inst, src);
 			break;
 		case OPCODE_DP4:
-			inst = t_opcode_dp4(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeDP4(vp, vpi, inst, src);
 			break;
 		case OPCODE_DPH:
-			inst = t_opcode_dph(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeDPH(vp, vpi, inst, src);
 			break;
 		case OPCODE_DST:
-			inst = t_opcode_dst(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeDST(vp, vpi, inst, src);
 			break;
 		case OPCODE_EX2:
-			inst = t_opcode_ex2(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeEX2(vp, vpi, inst, src);
 			break;
 		case OPCODE_EXP:
-			inst = t_opcode_exp(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeEXP(vp, vpi, inst, src);
 			break;
 		case OPCODE_FLR:
-			inst =
-			    t_opcode_flr(vp, vpi, inst, src, /* FIXME */
-					 &u_temp_i);
+			inst = r300TranslateOpcodeFLR(vp, vpi, inst, src,	/* FIXME */
+						      &u_temp_i);
 			break;
 		case OPCODE_FRC:
-			inst = t_opcode_frc(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeFRC(vp, vpi, inst, src);
 			break;
 		case OPCODE_LG2:
-			inst = t_opcode_lg2(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeLG2(vp, vpi, inst, src);
 			break;
 		case OPCODE_LIT:
-			inst = t_opcode_lit(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeLIT(vp, vpi, inst, src);
 			break;
 		case OPCODE_LOG:
-			inst = t_opcode_log(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeLOG(vp, vpi, inst, src);
 			break;
 		case OPCODE_MAD:
-			inst = t_opcode_mad(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeMAD(vp, vpi, inst, src);
 			break;
 		case OPCODE_MAX:
-			inst = t_opcode_max(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeMAX(vp, vpi, inst, src);
 			break;
 		case OPCODE_MIN:
-			inst = t_opcode_min(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeMIN(vp, vpi, inst, src);
 			break;
 		case OPCODE_MOV:
-			inst = t_opcode_mov(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeMOV(vp, vpi, inst, src);
 			break;
 		case OPCODE_MUL:
-			inst = t_opcode_mul(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeMUL(vp, vpi, inst, src);
 			break;
 		case OPCODE_POW:
-			inst = t_opcode_pow(vp, vpi, inst, src);
+			inst = r300TranslateOpcodePOW(vp, vpi, inst, src);
 			break;
 		case OPCODE_RCP:
-			inst = t_opcode_rcp(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeRCP(vp, vpi, inst, src);
 			break;
 		case OPCODE_RSQ:
-			inst = t_opcode_rsq(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeRSQ(vp, vpi, inst, src);
 			break;
 		case OPCODE_SGE:
-			inst = t_opcode_sge(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeSGE(vp, vpi, inst, src);
 			break;
 		case OPCODE_SLT:
-			inst = t_opcode_slt(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeSLT(vp, vpi, inst, src);
 			break;
 		case OPCODE_SUB:
-			inst = t_opcode_sub(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeSUB(vp, vpi, inst, src);
 			break;
 		case OPCODE_SWZ:
-			inst = t_opcode_swz(vp, vpi, inst, src);
+			inst = r300TranslateOpcodeSWZ(vp, vpi, inst, src);
 			break;
 		case OPCODE_XPD:
-			inst =
-			    t_opcode_xpd(vp, vpi, inst, src, /* FIXME */
-					 &u_temp_i);
+			inst = r300TranslateOpcodeXPD(vp, vpi, inst, src,	/* FIXME */
+						      &u_temp_i);
 			break;
 		default:
 			assert(0);
@@ -1291,6 +1193,23 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
 		}
 	}
 
+	/* Some outputs may be artificially added, to match the inputs
+	   of the fragment program. Blank the outputs here. */
+	for (i = 0; i < VERT_RESULT_MAX; i++) {
+		if (vp->key.OutputsAdded & (1 << i)) {
+			inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
+						     GL_FALSE,
+						     GL_FALSE,
+						     vp->outputs[i],
+						     VSF_FLAG_ALL,
+						     PVS_DST_REG_OUT);
+			inst[1] = __CONST(0, SWIZZLE_ZERO);
+			inst[2] = __CONST(0, SWIZZLE_ZERO);
+			inst[3] = __CONST(0, SWIZZLE_ZERO);
+			inst += 4;
+		}
+	}
+
 	vp->program.length = (inst - vp->program.body.i);
 	if (vp->program.length >= VSF_MAX_FRAGMENT_LENGTH) {
 		vp->program.length = 0;
@@ -1303,14 +1222,16 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
 #endif
 }
 
+/* DP4 version seems to trigger some hw peculiarity */
+//#define PREFER_DP4
+
 static void position_invariant(struct gl_program *prog)
 {
 	struct prog_instruction *vpi;
 	struct gl_program_parameter_list *paramList;
 	int i;
 
-	gl_state_index tokens[STATE_LENGTH] =
-	    { STATE_MVP_MATRIX, 0, 0, 0, 0 };
+	gl_state_index tokens[STATE_LENGTH] = { STATE_MVP_MATRIX, 0, 0, 0, 0 };
 
 	/* tokens[4] = matrix modifier */
 #ifdef PREFER_DP4
@@ -1390,8 +1311,8 @@ static void position_invariant(struct gl_program *prog)
 	assert(vpi->Opcode == OPCODE_END);
 }
 
-static void insert_wpos(struct r300_vertex_program *vp,
-			struct gl_program *prog, GLuint temp_index)
+static void insert_wpos(struct r300_vertex_program *vp, struct gl_program *prog,
+			GLuint temp_index)
 {
 	struct prog_instruction *vpi;
 	struct prog_instruction *vpi_insert;
@@ -1404,8 +1325,8 @@ static void insert_wpos(struct r300_vertex_program *vp,
 				prog->NumInstructions - 1);
 	/* END */
 	_mesa_copy_instructions(&vpi[prog->NumInstructions + 1],
-				&prog->Instructions[prog->NumInstructions -
-						    1], 1);
+				&prog->Instructions[prog->NumInstructions - 1],
+				1);
 	vpi_insert = &vpi[prog->NumInstructions - 1];
 
 	vpi_insert[i].Opcode = OPCODE_MOV;
@@ -1485,6 +1406,15 @@ static struct r300_vertex_program *build_program(struct r300_vertex_program_key
 	return vp;
 }
 
+static void add_outputs(struct r300_vertex_program_key *key, GLint vert)
+{
+	if (key->OutputsWritten & (1 << vert))
+		return;
+
+	key->OutputsWritten |= 1 << vert;
+	key->OutputsAdded |= 1 << vert;
+}
+
 void r300SelectVertexShader(r300ContextPtr r300)
 {
 	GLcontext *ctx = ctx = r300->radeon.glCtx;
@@ -1495,8 +1425,9 @@ void r300SelectVertexShader(r300ContextPtr r300)
 	struct r300_vertex_program *vp;
 	GLint wpos_idx;
 
-	vpc =
-	    (struct r300_vertex_program_cont *)ctx->VertexProgram._Current;
+	vpc = (struct r300_vertex_program_cont *)ctx->VertexProgram._Current;
+	wanted_key.InputsRead = vpc->mesa_program.Base.InputsRead;
+	wanted_key.OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 	InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
 
 	wpos_idx = -1;
@@ -1510,33 +1441,29 @@ void r300SelectVertexShader(r300ContextPtr r300)
 			_mesa_exit(-1);
 		}
 
-		InputsRead |= (FRAG_BIT_TEX0 << i);
+		wanted_key.OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i);
 		wpos_idx = i;
 	}
-	wanted_key.InputsRead = vpc->mesa_program.Base.InputsRead;
-	wanted_key.OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 
-	wanted_key.OutputsWritten |= 1 << VERT_RESULT_HPOS;
+	add_outputs(&wanted_key, VERT_RESULT_HPOS);
 
 	if (InputsRead & FRAG_BIT_COL0) {
-		wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL0;
+		add_outputs(&wanted_key, VERT_RESULT_COL0);
 	}
 
-	if ((InputsRead & FRAG_BIT_COL1)) {
-		wanted_key.OutputsWritten |= 1 << VERT_RESULT_COL1;
+	if (InputsRead & FRAG_BIT_COL1) {
+		add_outputs(&wanted_key, VERT_RESULT_COL1);
 	}
 
 	for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
 		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
-			wanted_key.OutputsWritten |=
-			    1 << (VERT_RESULT_TEX0 + i);
+			add_outputs(&wanted_key, VERT_RESULT_TEX0 + i);
 		}
 	}
 
 	if (vpc->mesa_program.IsPositionInvariant) {
 		/* we wan't position don't we ? */
 		wanted_key.InputsRead |= (1 << VERT_ATTRIB_POS);
-		wanted_key.OutputsWritten |= (1 << VERT_RESULT_HPOS);
 	}
 
 	for (vp = vpc->progs; vp; vp = vp->next)
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.h b/src/mesa/drivers/dri/r300/r300_vertprog.h
index 3df0eee7991..2f35f02bc84 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.h
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.h
@@ -3,6 +3,25 @@
 
 #include "r300_reg.h"
 
+#define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class)	\
+	 (((opcode & PVS_DST_OPCODE_MASK) << PVS_DST_OPCODE_SHIFT)	\
+	 | ((math_inst & PVS_DST_MATH_INST_MASK) << PVS_DST_MATH_INST_SHIFT)	\
+	 | ((macro_inst & PVS_DST_MACRO_INST_MASK) << PVS_DST_MACRO_INST_SHIFT)	\
+	 | ((reg_index & PVS_DST_OFFSET_MASK) << PVS_DST_OFFSET_SHIFT)	\
+	 | ((reg_writemask & 0xf) << PVS_DST_WE_X_SHIFT)	/* X Y Z W */	\
+	 | ((reg_class & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT))
+
+#define PVS_SRC_OPERAND(in_reg_index, comp_x, comp_y, comp_z, comp_w, reg_class, negate)	\
+	(((in_reg_index & PVS_SRC_OFFSET_MASK) << PVS_SRC_OFFSET_SHIFT)				\
+	 | ((comp_x & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT)			\
+	 | ((comp_y & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT)			\
+	 | ((comp_z & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT)			\
+	 | ((comp_w & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT)			\
+	 | ((negate & 0xf) << PVS_SRC_MODIFIER_X_SHIFT)	/* X Y Z W */				\
+	 | ((reg_class & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT))
+
+#if 1
+
 #define VSF_FLAG_X	1
 #define VSF_FLAG_Y	2
 #define VSF_FLAG_Z	4
@@ -11,74 +30,6 @@
 #define VSF_FLAG_ALL  0xf
 #define VSF_FLAG_NONE  0
 
-#define VSF_OUT_CLASS_TMP	0
-#define VSF_OUT_CLASS_ADDR	1
-#define VSF_OUT_CLASS_RESULT	2
-
-/* first DWORD of an instruction */
-
-/* possible operations: 
-    DOT, MUL, ADD, MAD, FRC, MAX, MIN, SGE, SLT, EXP, LOG, LIT, POW, RCP, RSQ, EX2,
-    LG2, MAD_2 */
-
-#define MAKE_VSF_OP(op, out_reg_index, out_reg_fields, class) \
-   ((op)  \
-  	| ((out_reg_index) << R300_VPI_OUT_REG_INDEX_SHIFT) 	\
- 	 | ((out_reg_fields) << 20) 	\
-  	| ( (class) << 8 ) )
-
-#define EASY_VSF_OP(op, out_reg_index, out_reg_fields, class) \
-	MAKE_VSF_OP(R300_VPI_OUT_OP_##op, out_reg_index, VSF_FLAG_##out_reg_fields, VSF_OUT_CLASS_##class) \
-
-/* according to Nikolai, the subsequent 3 DWORDs are sources, use same define for each */
-
-#define VSF_IN_CLASS_TMP	0
-#define VSF_IN_CLASS_ATTR	1
-#define VSF_IN_CLASS_PARAM	2
-#define VSF_IN_CLASS_NONE	9
-
-#define VSF_IN_COMPONENT_X	0
-#define VSF_IN_COMPONENT_Y	1
-#define VSF_IN_COMPONENT_Z	2
-#define VSF_IN_COMPONENT_W	3
-#define VSF_IN_COMPONENT_ZERO	4
-#define VSF_IN_COMPONENT_ONE	5
-
-#define MAKE_VSF_SOURCE(in_reg_index, comp_x, comp_y, comp_z, comp_w, class, negate) \
-	( ((in_reg_index)<<R300_VPI_IN_REG_INDEX_SHIFT) \
-	   | ((comp_x)<<R300_VPI_IN_X_SHIFT) \
-	   | ((comp_y)<<R300_VPI_IN_Y_SHIFT) \
-	   | ((comp_z)<<R300_VPI_IN_Z_SHIFT) \
-	   | ((comp_w)<<R300_VPI_IN_W_SHIFT) \
-	   | ((negate)<<25) | ((class)))
-
-#define EASY_VSF_SOURCE(in_reg_index, comp_x, comp_y, comp_z, comp_w, class, negate) \
-	MAKE_VSF_SOURCE(in_reg_index, \
-		VSF_IN_COMPONENT_##comp_x, \
-		VSF_IN_COMPONENT_##comp_y, \
-		VSF_IN_COMPONENT_##comp_z, \
-		VSF_IN_COMPONENT_##comp_w, \
-		VSF_IN_CLASS_##class, VSF_FLAG_##negate)
-
-/* special sources: */
-
-/* (1.0,1.0,1.0,1.0) vector (ATTR, plain ) */
-#define VSF_ATTR_UNITY(reg) 	EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, ATTR, NONE)
-#define VSF_UNITY(reg) 	EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, NONE, NONE)
-
-/* contents of unmodified register */
-#define VSF_REG(reg) 	EASY_VSF_SOURCE(reg, X, Y, Z, W, ATTR, NONE)
-
-/* contents of unmodified parameter */
-#define VSF_PARAM(reg) 	EASY_VSF_SOURCE(reg, X, Y, Z, W, PARAM, NONE)
-
-/* contents of unmodified temporary register */
-#define VSF_TMP(reg) 	EASY_VSF_SOURCE(reg, X, Y, Z, W, TMP, NONE)
-
-/* components of ATTR register */
-#define VSF_ATTR_X(reg) EASY_VSF_SOURCE(reg, X, X, X, X, ATTR, NONE)
-#define VSF_ATTR_Y(reg) EASY_VSF_SOURCE(reg, Y, Y, Y, Y, ATTR, NONE)
-#define VSF_ATTR_Z(reg) EASY_VSF_SOURCE(reg, Z, Z, Z, Z, ATTR, NONE)
-#define VSF_ATTR_W(reg) EASY_VSF_SOURCE(reg, W, W, W, W, ATTR, NONE)
+#endif
 
 #endif
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c
new file mode 100644
index 00000000000..75dae86fa81
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.c
@@ -0,0 +1,700 @@
+/*
+ * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "r500_fragprog.h"
+
+#include "radeon_nqssadce.h"
+#include "radeon_program_alu.h"
+
+
+static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
+{
+	gl_state_index fail_value_tokens[STATE_LENGTH] = {
+		STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
+	};
+	struct prog_src_register reg = { 0, };
+
+	fail_value_tokens[2] = tmu;
+	reg.File = PROGRAM_STATE_VAR;
+	reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
+	reg.Swizzle = SWIZZLE_WWWW;
+	return reg;
+}
+
+/**
+ * Transform TEX, TXP, TXB, and KIL instructions in the following way:
+ *  - premultiply texture coordinates for RECT
+ *  - extract operand swizzles
+ *  - introduce a temporary register when write masks are needed
+ *
+ */
+static GLboolean transform_TEX(
+	struct radeon_transform_context *t,
+	struct prog_instruction* orig_inst, void* data)
+{
+	struct r500_fragment_program_compiler *compiler =
+		(struct r500_fragment_program_compiler*)data;
+	struct prog_instruction inst = *orig_inst;
+	struct prog_instruction* tgt;
+	GLboolean destredirect = GL_FALSE;
+
+	if (inst.Opcode != OPCODE_TEX &&
+	    inst.Opcode != OPCODE_TXB &&
+	    inst.Opcode != OPCODE_TXP &&
+	    inst.Opcode != OPCODE_KIL)
+		return GL_FALSE;
+
+	/* ARB_shadow & EXT_shadow_funcs */
+	if (inst.Opcode != OPCODE_KIL &&
+	    t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
+
+		if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
+			tgt = radeonAppendInstructions(t->Program, 1);
+
+			tgt->Opcode = OPCODE_MOV;
+			tgt->DstReg = inst.DstReg;
+			if (comparefunc == GL_ALWAYS) {
+				tgt->SrcReg[0].File = PROGRAM_BUILTIN;
+				tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
+			} else {
+				tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
+			}
+			return GL_TRUE;
+		}
+
+		inst.DstReg.File = PROGRAM_TEMPORARY;
+		inst.DstReg.Index = radeonFindFreeTemporary(t);
+		inst.DstReg.WriteMask = WRITEMASK_XYZW;
+	} else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) {
+		int tempreg = radeonFindFreeTemporary(t);
+
+		inst.DstReg.File = PROGRAM_TEMPORARY;
+		inst.DstReg.Index = tempreg;
+		inst.DstReg.WriteMask = WRITEMASK_XYZW;
+		destredirect = GL_TRUE;
+	}
+
+	tgt = radeonAppendInstructions(t->Program, 1);
+	_mesa_copy_instructions(tgt, &inst, 1);
+
+	if (inst.Opcode != OPCODE_KIL &&
+	    t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
+		GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
+		int rcptemp = radeonFindFreeTemporary(t);
+		int pass, fail;
+
+		tgt = radeonAppendInstructions(t->Program, 3);
+
+		tgt[0].Opcode = OPCODE_RCP;
+		tgt[0].DstReg.File = PROGRAM_TEMPORARY;
+		tgt[0].DstReg.Index = rcptemp;
+		tgt[0].DstReg.WriteMask = WRITEMASK_W;
+		tgt[0].SrcReg[0] = inst.SrcReg[0];
+		tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
+
+		tgt[1].Opcode = OPCODE_MAD;
+		tgt[1].DstReg = inst.DstReg;
+		tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
+		tgt[1].SrcReg[0] = inst.SrcReg[0];
+		tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
+		tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
+		tgt[1].SrcReg[1].Index = rcptemp;
+		tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
+		tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
+		tgt[1].SrcReg[2].Index = inst.DstReg.Index;
+		if (depthmode == 0) /* GL_LUMINANCE */
+			tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
+		else if (depthmode == 2) /* GL_ALPHA */
+			tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
+
+		/* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
+		 *   r  < tex  <=>      -tex+r < 0
+		 *   r >= tex  <=> not (-tex+r < 0 */
+		if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
+			tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
+		else
+			tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
+
+		tgt[2].Opcode = OPCODE_CMP;
+		tgt[2].DstReg = orig_inst->DstReg;
+		tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
+
+		if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
+			pass = 1;
+			fail = 2;
+		} else {
+			pass = 2;
+			fail = 1;
+		}
+
+		tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
+		tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
+		tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
+	} else if (destredirect) {
+		tgt = radeonAppendInstructions(t->Program, 1);
+
+		tgt->Opcode = OPCODE_MOV;
+		tgt->DstReg = orig_inst->DstReg;
+		tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt->SrcReg[0].Index = inst.DstReg.Index;
+	}
+
+	return GL_TRUE;
+}
+
+
+static void update_params(r300ContextPtr r300, struct r500_fragment_program *fp)
+{
+	struct gl_fragment_program *mp = &fp->mesa_program;
+
+	/* Ask Mesa nicely to fill in ParameterValues for us */
+	if (mp->Base.Parameters)
+		_mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
+}
+
+
+/**
+ * Transform the program to support fragment.position.
+ *
+ * Introduce a small fragment at the start of the program that will be
+ * the only code that directly reads the FRAG_ATTRIB_WPOS input.
+ * All other code pieces that reference that input will be rewritten
+ * to read from a newly allocated temporary.
+ *
+ * \todo if/when r5xx supports the radeon_program architecture, this is a
+ * likely candidate for code sharing.
+ */
+static void insert_WPOS_trailer(struct r500_fragment_program_compiler *compiler)
+{
+	GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
+
+	if (!(InputsRead & FRAG_BIT_WPOS))
+		return;
+
+	static gl_state_index tokens[STATE_LENGTH] = {
+		STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
+	};
+	struct prog_instruction *fpi;
+	GLuint window_index;
+	int i = 0;
+	GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
+
+	_mesa_insert_instructions(compiler->program, 0, 3);
+	fpi = compiler->program->Instructions;
+
+	/* perspective divide */
+	fpi[i].Opcode = OPCODE_RCP;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_W;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_INPUT;
+	fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
+	fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
+	i++;
+
+	fpi[i].Opcode = OPCODE_MUL;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_INPUT;
+	fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
+	fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
+
+	fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
+	fpi[i].SrcReg[1].Index = tempregi;
+	fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
+	i++;
+
+	/* viewport transformation */
+	window_index = _mesa_add_state_reference(compiler->program->Parameters, tokens);
+
+	fpi[i].Opcode = OPCODE_MAD;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
+	fpi[i].SrcReg[0].Index = tempregi;
+	fpi[i].SrcReg[0].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+
+	fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
+	fpi[i].SrcReg[1].Index = window_index;
+	fpi[i].SrcReg[1].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+
+	fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
+	fpi[i].SrcReg[2].Index = window_index;
+	fpi[i].SrcReg[2].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+	i++;
+
+	for (; i < compiler->program->NumInstructions; ++i) {
+		int reg;
+		for (reg = 0; reg < 3; reg++) {
+			if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
+			    fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
+				fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
+				fpi[i].SrcReg[reg].Index = tempregi;
+			}
+		}
+	}
+}
+
+
+static void nqssadce_init(struct nqssadce_state* s)
+{
+	s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
+	s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
+}
+
+static GLboolean is_native_swizzle(GLuint opcode, struct prog_src_register reg)
+{
+	GLuint relevant;
+	int i;
+
+	if (opcode == OPCODE_TEX ||
+	    opcode == OPCODE_TXB ||
+	    opcode == OPCODE_TXP ||
+	    opcode == OPCODE_KIL) {
+		if (reg.Abs)
+			return GL_FALSE;
+
+		if (reg.NegateAbs)
+			reg.NegateBase ^= 15;
+
+		if (opcode == OPCODE_KIL) {
+			if (reg.Swizzle != SWIZZLE_NOOP)
+				return GL_FALSE;
+		} else {
+			for(i = 0; i < 4; ++i) {
+				GLuint swz = GET_SWZ(reg.Swizzle, i);
+				if (swz == SWIZZLE_NIL) {
+					reg.NegateBase &= ~(1 << i);
+					continue;
+				}
+				if (swz >= 4)
+					return GL_FALSE;
+			}
+		}
+
+		if (reg.NegateBase)
+			return GL_FALSE;
+
+		return GL_TRUE;
+	} else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
+		/* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
+		 * if it doesn't fit perfectly into a .xyzw case... */
+		if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs
+				&& !reg.NegateBase && !reg.NegateAbs)
+			return GL_TRUE;
+
+		return GL_FALSE;
+	} else {
+		/* ALU instructions support almost everything */
+		if (reg.Abs)
+			return GL_TRUE;
+
+		relevant = 0;
+		for(i = 0; i < 3; ++i) {
+			GLuint swz = GET_SWZ(reg.Swizzle, i);
+			if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
+				relevant |= 1 << i;
+		}
+		if ((reg.NegateBase & relevant) && ((reg.NegateBase & relevant) != relevant))
+			return GL_FALSE;
+
+		return GL_TRUE;
+	}
+}
+
+/**
+ * Implement a MOV with a potentially non-native swizzle.
+ *
+ * The only thing we *cannot* do in an ALU instruction is per-component
+ * negation. Therefore, we split the MOV into two instructions when necessary.
+ */
+static void nqssadce_build_swizzle(struct nqssadce_state *s,
+	struct prog_dst_register dst, struct prog_src_register src)
+{
+	struct prog_instruction *inst;
+	GLuint negatebase[2] = { 0, 0 };
+	int i;
+
+	for(i = 0; i < 4; ++i) {
+		GLuint swz = GET_SWZ(src.Swizzle, i);
+		if (swz == SWIZZLE_NIL)
+			continue;
+		negatebase[GET_BIT(src.NegateBase, i)] |= 1 << i;
+	}
+
+	_mesa_insert_instructions(s->Program, s->IP, (negatebase[0] ? 1 : 0) + (negatebase[1] ? 1 : 0));
+	inst = s->Program->Instructions + s->IP;
+
+	for(i = 0; i <= 1; ++i) {
+		if (!negatebase[i])
+			continue;
+
+		inst->Opcode = OPCODE_MOV;
+		inst->DstReg = dst;
+		inst->DstReg.WriteMask = negatebase[i];
+		inst->SrcReg[0] = src;
+		inst++;
+		s->IP++;
+	}
+}
+
+static GLuint build_dtm(GLuint depthmode)
+{
+	switch(depthmode) {
+	default:
+	case GL_LUMINANCE: return 0;
+	case GL_INTENSITY: return 1;
+	case GL_ALPHA: return 2;
+	}
+}
+
+static GLuint build_func(GLuint comparefunc)
+{
+	return comparefunc - GL_NEVER;
+}
+
+
+/**
+ * Collect all external state that is relevant for compiling the given
+ * fragment program.
+ */
+static void build_state(
+	r300ContextPtr r300,
+	struct r500_fragment_program *fp,
+	struct r500_fragment_program_external_state *state)
+{
+	int unit;
+
+	_mesa_bzero(state, sizeof(*state));
+
+	for(unit = 0; unit < 16; ++unit) {
+		if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
+			struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
+
+			state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
+			state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
+		}
+	}
+}
+
+static void dump_program(struct r500_fragment_program_code *code);
+
+void r500TranslateFragmentShader(r300ContextPtr r300,
+				 struct r500_fragment_program *fp)
+{
+	struct r500_fragment_program_external_state state;
+
+	build_state(r300, fp, &state);
+	if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
+		/* TODO: cache compiled programs */
+		fp->translated = GL_FALSE;
+		_mesa_memcpy(&fp->state, &state, sizeof(state));
+	}
+
+	if (!fp->translated) {
+		struct r500_fragment_program_compiler compiler;
+
+		compiler.r300 = r300;
+		compiler.fp = fp;
+		compiler.code = &fp->code;
+		compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Compiler: Initial program:\n");
+			_mesa_print_program(compiler.program);
+		}
+
+		insert_WPOS_trailer(&compiler);
+
+		struct radeon_program_transformation transformations[] = {
+			{ &transform_TEX, &compiler },
+			{ &radeonTransformALU, 0 },
+			{ &radeonTransformDeriv, 0 },
+			{ &radeonTransformTrigScale, 0 }
+		};
+		radeonLocalTransform(r300->radeon.glCtx, compiler.program,
+			4, transformations);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Compiler: after native rewrite:\n");
+			_mesa_print_program(compiler.program);
+		}
+
+		struct radeon_nqssadce_descr nqssadce = {
+			.Init = &nqssadce_init,
+			.IsNativeSwizzle = &is_native_swizzle,
+			.BuildSwizzle = &nqssadce_build_swizzle,
+			.RewriteDepthOut = GL_TRUE
+		};
+		radeonNqssaDce(r300->radeon.glCtx, compiler.program, &nqssadce);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Compiler: after NqSSA-DCE:\n");
+			_mesa_print_program(compiler.program);
+		}
+
+		fp->translated = r500FragmentProgramEmit(&compiler);
+
+		/* Subtle: Rescue any parameters that have been added during transformations */
+		_mesa_free_parameter_list(fp->mesa_program.Base.Parameters);
+		fp->mesa_program.Base.Parameters = compiler.program->Parameters;
+		compiler.program->Parameters = 0;
+
+		_mesa_reference_program(r300->radeon.glCtx, &compiler.program, 0);
+
+		r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
+
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			if (fp->translated) {
+				_mesa_printf("Machine-readable code:\n");
+				dump_program(&fp->code);
+			}
+		}
+
+	}
+
+	update_params(r300, fp);
+
+}
+
+static char *toswiz(int swiz_val) {
+  switch(swiz_val) {
+  case 0: return "R";
+  case 1: return "G";
+  case 2: return "B";
+  case 3: return "A";
+  case 4: return "0";
+  case 5: return "1/2";
+  case 6: return "1";
+  case 7: return "U";
+  }
+  return NULL;
+}
+
+static char *toop(int op_val)
+{
+  char *str = NULL;
+  switch (op_val) {
+  case 0: str = "MAD"; break;
+  case 1: str = "DP3"; break;
+  case 2: str = "DP4"; break;
+  case 3: str = "D2A"; break;
+  case 4: str = "MIN"; break;
+  case 5: str = "MAX"; break;
+  case 6: str = "Reserved"; break;
+  case 7: str = "CND"; break;
+  case 8: str = "CMP"; break;
+  case 9: str = "FRC"; break;
+  case 10: str = "SOP"; break;
+  case 11: str = "MDH"; break;
+  case 12: str = "MDV"; break;
+  }
+  return str;
+}
+
+static char *to_alpha_op(int op_val)
+{
+  char *str = NULL;
+  switch (op_val) {
+  case 0: str = "MAD"; break;
+  case 1: str = "DP"; break;
+  case 2: str = "MIN"; break;
+  case 3: str = "MAX"; break;
+  case 4: str = "Reserved"; break;
+  case 5: str = "CND"; break;
+  case 6: str = "CMP"; break;
+  case 7: str = "FRC"; break;
+  case 8: str = "EX2"; break;
+  case 9: str = "LN2"; break;
+  case 10: str = "RCP"; break;
+  case 11: str = "RSQ"; break;
+  case 12: str = "SIN"; break;
+  case 13: str = "COS"; break;
+  case 14: str = "MDH"; break;
+  case 15: str = "MDV"; break;
+  }
+  return str;
+}
+
+static char *to_mask(int val)
+{
+  char *str = NULL;
+  switch(val) {
+  case 0: str = "NONE"; break;
+  case 1: str = "R"; break;
+  case 2: str = "G"; break;
+  case 3: str = "RG"; break;
+  case 4: str = "B"; break;
+  case 5: str = "RB"; break;
+  case 6: str = "GB"; break;
+  case 7: str = "RGB"; break;
+  case 8: str = "A"; break;
+  case 9: str = "AR"; break;
+  case 10: str = "AG"; break;
+  case 11: str = "ARG"; break;
+  case 12: str = "AB"; break;
+  case 13: str = "ARB"; break;
+  case 14: str = "AGB"; break;
+  case 15: str = "ARGB"; break;
+  }
+  return str;
+}
+
+static char *to_texop(int val)
+{
+  switch(val) {
+  case 0: return "NOP";
+  case 1: return "LD";
+  case 2: return "TEXKILL";
+  case 3: return "PROJ";
+  case 4: return "LODBIAS";
+  case 5: return "LOD";
+  case 6: return "DXDY";
+  }
+  return NULL;
+}
+
+static void dump_program(struct r500_fragment_program_code *code)
+{
+
+  fprintf(stderr, "R500 Fragment Program:\n--------\n");
+
+  int n;
+  uint32_t inst;
+  uint32_t inst0;
+  char *str = NULL;
+
+  if (code->const_nr) {
+    fprintf(stderr, "--------\nConstants:\n");
+    for (n = 0; n < code->const_nr; n++) {
+      fprintf(stderr, "Constant %d: %i[%i]\n", n,
+        code->constant[n].File, code->constant[n].Index);
+    }
+    fprintf(stderr, "--------\n");
+  }
+
+  for (n = 0; n < code->inst_end+1; n++) {
+    inst0 = inst = code->inst[n].inst0;
+    fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
+    switch(inst & 0x3) {
+    case R500_INST_TYPE_ALU: str = "ALU"; break;
+    case R500_INST_TYPE_OUT: str = "OUT"; break;
+    case R500_INST_TYPE_FC: str = "FC"; break;
+    case R500_INST_TYPE_TEX: str = "TEX"; break;
+    };
+    fprintf(stderr,"%s %s %s %s %s ", str,
+	    inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
+	    inst & R500_INST_LAST ? "LAST" : "",
+	    inst & R500_INST_NOP ? "NOP" : "",
+	    inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
+    fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
+	    to_mask((inst >> 15) & 0xf));
+
+    switch(inst0 & 0x3) {
+    case 0:
+    case 1:
+      fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
+      inst = code->inst[n].inst1;
+
+      fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
+	      inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
+	      (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
+	      (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
+	      (inst >> 30));
+
+      fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
+      inst = code->inst[n].inst2;
+      fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
+	      inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
+	      (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
+	      (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
+	      (inst >> 30));
+      fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
+      inst = code->inst[n].inst3;
+      fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
+	      (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
+	      (inst >> 11) & 0x3,
+	      (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
+	      (inst >> 24) & 0x3);
+
+
+      fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
+      inst = code->inst[n].inst4;
+      fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
+	      (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
+	      (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
+	      (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
+	      (inst >> 31) & 0x1);
+
+      fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
+      inst = code->inst[n].inst5;
+      fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
+	      (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
+	      (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
+	      (inst >> 23) & 0x3,
+	      (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
+      break;
+    case 2:
+      break;
+    case 3:
+      inst = code->inst[n].inst1;
+      fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
+	      to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
+	      (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
+      inst = code->inst[n].inst2;
+      fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
+	      inst & 127, inst & (1<<7) ? "(rel)" : "",
+	      toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
+	      toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
+	      (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
+	      toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
+	      toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
+
+      fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
+      break;
+    }
+    fprintf(stderr,"\n");
+  }
+
+}
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.h b/src/mesa/drivers/dri/r300/r500_fragprog.h
new file mode 100644
index 00000000000..1e45538f807
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2005 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Authors:
+ *   Ben Skeggs <darktama@iinet.net.au>
+ *   Jerome Glisse <j.glisse@gmail.com>
+ */
+#ifndef __R500_FRAGPROG_H_
+#define __R500_FRAGPROG_H_
+
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "shader/prog_parameter.h"
+#include "shader/prog_print.h"
+#include "shader/program.h"
+#include "shader/prog_instruction.h"
+
+#include "r300_context.h"
+#include "r300_state.h"
+#include "radeon_program.h"
+
+struct r500_fragment_program;
+
+extern void r500TranslateFragmentShader(r300ContextPtr r300,
+					struct r500_fragment_program *fp);
+
+struct r500_fragment_program_compiler {
+	r300ContextPtr r300;
+	struct r500_fragment_program *fp;
+	struct r500_fragment_program_code *code;
+	struct gl_program *program;
+};
+
+extern GLboolean r500FragmentProgramEmit(struct r500_fragment_program_compiler *compiler);
+
+#endif
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog_emit.c b/src/mesa/drivers/dri/r300/r500_fragprog_emit.c
new file mode 100644
index 00000000000..4631235f0d3
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/r500_fragprog_emit.c
@@ -0,0 +1,327 @@
+/*
+ * Copyright (C) 2005 Ben Skeggs.
+ *
+ * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
+ * Adaptation and modification for ATI/AMD Radeon R500 GPU chipsets.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * \file
+ *
+ * \author Ben Skeggs <darktama@iinet.net.au>
+ *
+ * \author Jerome Glisse <j.glisse@gmail.com>
+ *
+ * \author Corbin Simpson <MostAwesomeDude@gmail.com>
+ *
+ * \todo Depth write, WPOS/FOGC inputs
+ *
+ * \todo FogOption
+ *
+ */
+
+#include "r500_fragprog.h"
+
+#include "radeon_program_pair.h"
+
+
+#define PROG_CODE \
+	struct r500_fragment_program_compiler *c = (struct r500_fragment_program_compiler*)data; \
+	struct r500_fragment_program_code *code = c->code
+
+#define error(fmt, args...) do {			\
+		fprintf(stderr, "%s::%s(): " fmt "\n",	\
+			__FILE__, __FUNCTION__, ##args);	\
+	} while(0)
+
+
+/**
+ * Callback to register hardware constants.
+ */
+static GLboolean emit_const(void *data, GLuint file, GLuint idx, GLuint *hwindex)
+{
+	PROG_CODE;
+
+	for (*hwindex = 0; *hwindex < code->const_nr; ++*hwindex) {
+		if (code->constant[*hwindex].File == file &&
+		    code->constant[*hwindex].Index == idx)
+			break;
+	}
+
+	if (*hwindex >= code->const_nr) {
+		if (*hwindex >= PFS_NUM_CONST_REGS) {
+			error("Out of hw constants!\n");
+			return GL_FALSE;
+		}
+
+		code->const_nr++;
+		code->constant[*hwindex].File = file;
+		code->constant[*hwindex].Index = idx;
+	}
+
+	return GL_TRUE;
+}
+
+static GLuint translate_rgb_op(GLuint opcode)
+{
+	switch(opcode) {
+	case OPCODE_CMP: return R500_ALU_RGBA_OP_CMP;
+	case OPCODE_DDX: return R500_ALU_RGBA_OP_MDH;
+	case OPCODE_DDY: return R500_ALU_RGBA_OP_MDV;
+	case OPCODE_DP3: return R500_ALU_RGBA_OP_DP3;
+	case OPCODE_DP4: return R500_ALU_RGBA_OP_DP4;
+	case OPCODE_FRC: return R500_ALU_RGBA_OP_FRC;
+	default:
+		error("translate_rgb_op(%d): unknown opcode\n", opcode);
+		/* fall through */
+	case OPCODE_NOP:
+		/* fall through */
+	case OPCODE_MAD: return R500_ALU_RGBA_OP_MAD;
+	case OPCODE_MAX: return R500_ALU_RGBA_OP_MAX;
+	case OPCODE_MIN: return R500_ALU_RGBA_OP_MIN;
+	case OPCODE_REPL_ALPHA: return R500_ALU_RGBA_OP_SOP;
+	}
+}
+
+static GLuint translate_alpha_op(GLuint opcode)
+{
+	switch(opcode) {
+	case OPCODE_CMP: return R500_ALPHA_OP_CMP;
+	case OPCODE_COS: return R500_ALPHA_OP_COS;
+	case OPCODE_DDX: return R500_ALPHA_OP_MDH;
+	case OPCODE_DDY: return R500_ALPHA_OP_MDV;
+	case OPCODE_DP3: return R500_ALPHA_OP_DP;
+	case OPCODE_DP4: return R500_ALPHA_OP_DP;
+	case OPCODE_EX2: return R500_ALPHA_OP_EX2;
+	case OPCODE_FRC: return R500_ALPHA_OP_FRC;
+	case OPCODE_LG2: return R500_ALPHA_OP_LN2;
+	default:
+		error("translate_alpha_op(%d): unknown opcode\n", opcode);
+		/* fall through */
+	case OPCODE_NOP:
+		/* fall through */
+	case OPCODE_MAD: return R500_ALPHA_OP_MAD;
+	case OPCODE_MAX: return R500_ALPHA_OP_MAX;
+	case OPCODE_MIN: return R500_ALPHA_OP_MIN;
+	case OPCODE_RCP: return R500_ALPHA_OP_RCP;
+	case OPCODE_RSQ: return R500_ALPHA_OP_RSQ;
+	case OPCODE_SIN: return R500_ALPHA_OP_SIN;
+	}
+}
+
+static GLuint fix_hw_swizzle(GLuint swz)
+{
+	if (swz == 5) swz = 6;
+	if (swz == SWIZZLE_NIL) swz = 4;
+	return swz;
+}
+
+static GLuint translate_arg_rgb(struct radeon_pair_instruction *inst, int arg)
+{
+	GLuint t = inst->RGB.Arg[arg].Source;
+	int comp;
+	t |= inst->RGB.Arg[arg].Negate << 11;
+	t |= inst->RGB.Arg[arg].Abs << 12;
+
+	for(comp = 0; comp < 3; ++comp)
+		t |= fix_hw_swizzle(GET_SWZ(inst->RGB.Arg[arg].Swizzle, comp)) << (3*comp + 2);
+
+	return t;
+}
+
+static GLuint translate_arg_alpha(struct radeon_pair_instruction *inst, int i)
+{
+	GLuint t = inst->Alpha.Arg[i].Source;
+	t |= fix_hw_swizzle(inst->Alpha.Arg[i].Swizzle) << 2;
+	t |= inst->Alpha.Arg[i].Negate << 5;
+	t |= inst->Alpha.Arg[i].Abs << 6;
+	return t;
+}
+
+static void use_temporary(struct r500_fragment_program_code* code, GLuint index)
+{
+	if (index > code->max_temp_idx)
+		code->max_temp_idx = index;
+}
+
+static GLuint use_source(struct r500_fragment_program_code* code, struct radeon_pair_instruction_source src)
+{
+	if (!src.Constant)
+		use_temporary(code, src.Index);
+	return src.Index | src.Constant << 8;
+}
+
+
+/**
+ * Emit a paired ALU instruction.
+ */
+static GLboolean emit_paired(void *data, struct radeon_pair_instruction *inst)
+{
+	PROG_CODE;
+
+	if (code->inst_end >= 511) {
+		error("emit_alu: Too many instructions");
+		return GL_FALSE;
+	}
+
+	int ip = ++code->inst_end;
+
+	code->inst[ip].inst5 = translate_rgb_op(inst->RGB.Opcode);
+	code->inst[ip].inst4 = translate_alpha_op(inst->Alpha.Opcode);
+
+	if (inst->RGB.OutputWriteMask || inst->Alpha.OutputWriteMask || inst->Alpha.DepthWriteMask)
+		code->inst[ip].inst0 = R500_INST_TYPE_OUT;
+	else
+		code->inst[ip].inst0 = R500_INST_TYPE_ALU;
+	code->inst[ip].inst0 |= R500_INST_TEX_SEM_WAIT;
+
+	code->inst[ip].inst0 |= (inst->RGB.WriteMask << 11) | (inst->Alpha.WriteMask << 14);
+	code->inst[ip].inst0 |= (inst->RGB.OutputWriteMask << 15) | (inst->Alpha.OutputWriteMask << 18);
+	if (inst->Alpha.DepthWriteMask) {
+		code->inst[ip].inst4 |= R500_ALPHA_W_OMASK;
+		c->fp->writes_depth = GL_TRUE;
+	}
+
+	code->inst[ip].inst4 |= R500_ALPHA_ADDRD(inst->Alpha.DestIndex);
+	code->inst[ip].inst5 |= R500_ALU_RGBA_ADDRD(inst->RGB.DestIndex);
+	use_temporary(code, inst->Alpha.DestIndex);
+	use_temporary(code, inst->RGB.DestIndex);
+
+	if (inst->RGB.Saturate)
+		code->inst[ip].inst0 |= R500_INST_RGB_CLAMP;
+	if (inst->Alpha.Saturate)
+		code->inst[ip].inst0 |= R500_INST_ALPHA_CLAMP;
+
+	code->inst[ip].inst1 |= R500_RGB_ADDR0(use_source(code, inst->RGB.Src[0]));
+	code->inst[ip].inst1 |= R500_RGB_ADDR1(use_source(code, inst->RGB.Src[1]));
+	code->inst[ip].inst1 |= R500_RGB_ADDR2(use_source(code, inst->RGB.Src[2]));
+
+	code->inst[ip].inst2 |= R500_ALPHA_ADDR0(use_source(code, inst->Alpha.Src[0]));
+	code->inst[ip].inst2 |= R500_ALPHA_ADDR1(use_source(code, inst->Alpha.Src[1]));
+	code->inst[ip].inst2 |= R500_ALPHA_ADDR2(use_source(code, inst->Alpha.Src[2]));
+
+	code->inst[ip].inst3 |= translate_arg_rgb(inst, 0) << R500_ALU_RGB_SEL_A_SHIFT;
+	code->inst[ip].inst3 |= translate_arg_rgb(inst, 1) << R500_ALU_RGB_SEL_B_SHIFT;
+	code->inst[ip].inst5 |= translate_arg_rgb(inst, 2) << R500_ALU_RGBA_SEL_C_SHIFT;
+
+	code->inst[ip].inst4 |= translate_arg_alpha(inst, 0) << R500_ALPHA_SEL_A_SHIFT;
+	code->inst[ip].inst4 |= translate_arg_alpha(inst, 1) << R500_ALPHA_SEL_B_SHIFT;
+	code->inst[ip].inst5 |= translate_arg_alpha(inst, 2) << R500_ALU_RGBA_ALPHA_SEL_C_SHIFT;
+
+	return GL_TRUE;
+}
+
+static GLuint translate_strq_swizzle(struct prog_src_register src)
+{
+	GLuint swiz = 0;
+	int i;
+	for (i = 0; i < 4; i++)
+		swiz |= (GET_SWZ(src.Swizzle, i) & 0x3) << i*2;
+	return swiz;
+}
+
+/**
+ * Emit a single TEX instruction
+ */
+static GLboolean emit_tex(void *data, struct prog_instruction *inst)
+{
+	PROG_CODE;
+
+	if (code->inst_end >= 511) {
+		error("emit_tex: Too many instructions");
+		return GL_FALSE;
+	}
+
+	int ip = ++code->inst_end;
+
+	code->inst[ip].inst0 = R500_INST_TYPE_TEX
+		| (inst->DstReg.WriteMask << 11)
+		| R500_INST_TEX_SEM_WAIT;
+	code->inst[ip].inst1 = R500_TEX_ID(inst->TexSrcUnit)
+		| R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED;
+
+	if (inst->TexSrcTarget == TEXTURE_RECT_INDEX)
+	        code->inst[ip].inst1 |= R500_TEX_UNSCALED;
+
+	switch (inst->Opcode) {
+	case OPCODE_KIL:
+		code->inst[ip].inst1 |= R500_TEX_INST_TEXKILL;
+		break;
+	case OPCODE_TEX:
+		code->inst[ip].inst1 |= R500_TEX_INST_LD;
+		break;
+	case OPCODE_TXB:
+		code->inst[ip].inst1 |= R500_TEX_INST_LODBIAS;
+		break;
+	case OPCODE_TXP:
+		code->inst[ip].inst1 |= R500_TEX_INST_PROJ;
+		break;
+	default:
+		error("emit_tex can't handle opcode %x\n", inst->Opcode);
+	}
+
+	code->inst[ip].inst2 = R500_TEX_SRC_ADDR(inst->SrcReg[0].Index)
+		| (translate_strq_swizzle(inst->SrcReg[0]) << 8)
+		| R500_TEX_DST_ADDR(inst->DstReg.Index)
+		| R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G
+		| R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A;
+
+	return GL_TRUE;
+}
+
+static const struct radeon_pair_handler pair_handler = {
+	.EmitConst = emit_const,
+	.EmitPaired = emit_paired,
+	.EmitTex = emit_tex,
+	.MaxHwTemps = 128
+};
+
+GLboolean r500FragmentProgramEmit(struct r500_fragment_program_compiler *compiler)
+{
+	struct r500_fragment_program_code *code = compiler->code;
+
+	_mesa_bzero(code, sizeof(*code));
+	code->max_temp_idx = 1;
+	code->inst_offset = 0;
+	code->inst_end = -1;
+
+	if (!radeonPairProgram(compiler->r300->radeon.glCtx, compiler->program, &pair_handler, compiler))
+		return GL_FALSE;
+
+	if ((code->inst[code->inst_end].inst0 & R500_INST_TYPE_MASK) != R500_INST_TYPE_OUT) {
+		/* This may happen when dead-code elimination is disabled or
+		 * when most of the fragment program logic is leading to a KIL */
+		if (code->inst_end >= 511) {
+			error("Introducing fake OUT: Too many instructions");
+			return GL_FALSE;
+		}
+
+		int ip = ++code->inst_end;
+		code->inst[ip].inst0 = R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT;
+	}
+
+	return GL_TRUE;
+}
diff --git a/src/mesa/drivers/dri/r300/radeon_context.c b/src/mesa/drivers/dri/r300/radeon_context.c
index e9634b427a6..5267fe9a774 100644
--- a/src/mesa/drivers/dri/r300/radeon_context.c
+++ b/src/mesa/drivers/dri/r300/radeon_context.c
@@ -36,12 +36,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include <dlfcn.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "state.h"
-#include "matrix.h"
-#include "framebuffer.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/state.h"
+#include "main/matrix.h"
+#include "main/framebuffer.h"
 
 #include "drivers/common/driverfuncs.h"
 #include "swrast/swrast.h"
@@ -135,6 +135,7 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
 	/* Fill in additional standard functions. */
 	radeonInitDriverFuncs(functions);
 
+	radeon->radeonScreen = screen;
 	/* Allocate and initialize the Mesa context */
 	if (sharedContextPrivate)
 		shareCtx = ((radeonContextPtr)sharedContextPrivate)->glCtx;
@@ -156,9 +157,8 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
 	radeon->dri.hwContext = driContextPriv->hHWContext;
 	radeon->dri.hwLock = &sPriv->pSAREA->lock;
 	radeon->dri.fd = sPriv->fd;
-	radeon->dri.drmMinor = sPriv->drmMinor;
+	radeon->dri.drmMinor = sPriv->drm_version.minor;
 
-	radeon->radeonScreen = screen;
 	radeon->sarea = (drm_radeon_sarea_t *) ((GLubyte *) sPriv->pSAREA +
 					       screen->sarea_priv_offset);
 
@@ -177,10 +177,7 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
 			radeon->do_usleeps ? "usleeps" : "busy waits",
 			fthrottle_mode, radeon->radeonScreen->irq);
 
-	radeon->vblank_flags = (radeon->radeonScreen->irq != 0)
-	    ? driGetDefaultVBlankFlags(&radeon->optionCache) : VBLANK_FLAG_NO_IRQ;
-
-	(*dri_interface->getUST) (&radeon->swap_ust);
+	(*sPriv->systemTime->getUST) (&radeon->swap_ust);
 
 	return GL_TRUE;
 }
@@ -277,9 +274,15 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 				radeon->glCtx);
 
 		if (radeon->dri.drawable != driDrawPriv) {
-			driDrawableInitVBlank(driDrawPriv,
-					      radeon->vblank_flags,
-					      &radeon->vbl_seq);
+			if (driDrawPriv->swap_interval == (unsigned)-1) {
+				driDrawPriv->vblFlags =
+					(radeon->radeonScreen->irq != 0)
+					? driGetDefaultVBlankFlags(&radeon->
+								   optionCache)
+					: VBLANK_FLAG_NO_IRQ;
+
+				driDrawableInitVBlank(driDrawPriv);
+			}
 		}
 
 		radeon->dri.readable = driReadPriv;
diff --git a/src/mesa/drivers/dri/r300/radeon_context.h b/src/mesa/drivers/dri/r300/radeon_context.h
index 2f239417a97..47cbc22a725 100644
--- a/src/mesa/drivers/dri/r300/radeon_context.h
+++ b/src/mesa/drivers/dri/r300/radeon_context.h
@@ -43,26 +43,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_CONTEXT_H__
 #define __RADEON_CONTEXT_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
 #include "radeon_screen.h"
 #include "drm.h"
 #include "dri_util.h"
-#include "colormac.h"
 
 struct radeon_context;
 typedef struct radeon_context radeonContextRec;
 typedef struct radeon_context *radeonContextPtr;
 
-#define TEX_0   0x1
-#define TEX_1   0x2
-#define TEX_2	0x4
-#define TEX_3	0x8
-#define TEX_4	0x10
-#define TEX_5	0x20
-#define TEX_6	0x40
-#define TEX_7	0x80
-#define TEX_ALL 0xff
-
 /* Rasterizing fallbacks */
 /* See correponding strings in r200_swtcl.c */
 #define RADEON_FALLBACK_TEXTURE		0x0001
@@ -182,10 +172,7 @@ struct radeon_context {
 	GLuint irqsEmitted;
 	drm_radeon_irq_wait_t iw;
 
-	/* VBI / buffer swap */
-	GLuint vbl_seq;
-	GLuint vblank_flags;
-
+	/* buffer swap */
 	int64_t swap_ust;
 	int64_t swap_missed_ust;
 
diff --git a/src/mesa/drivers/dri/r300/radeon_ioctl.c b/src/mesa/drivers/dri/r300/radeon_ioctl.c
index 0b8656b9c1d..36502eb42de 100644
--- a/src/mesa/drivers/dri/r300/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/r300/radeon_ioctl.c
@@ -35,10 +35,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <sched.h>
 #include <errno.h>
 
-#include "glheader.h"
-#include "imports.h"
-#include "macros.h"
-#include "context.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
 #include "r300_context.h"
 #include "radeon_ioctl.h"
@@ -157,13 +157,14 @@ static void radeonWaitForFrameCompletion(radeonContextPtr radeon)
 
 /* Copy the back color buffer to the front color buffer.
  */
-void radeonCopyBuffer(const __DRIdrawablePrivate * dPriv,
+void radeonCopyBuffer(__DRIdrawablePrivate * dPriv,
 		      const drm_clip_rect_t	 * rect)
 {
 	radeonContextPtr radeon;
 	GLint nbox, i, ret;
 	GLboolean missed_target;
 	int64_t ust;
+	__DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
 	assert(dPriv);
 	assert(dPriv->driContextPriv);
@@ -187,8 +188,7 @@ void radeonCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	if (!rect)
 	{
 	    UNLOCK_HARDWARE(radeon);
-	    driWaitForVBlank(dPriv, &radeon->vbl_seq, radeon->vblank_flags,
-			     &missed_target);
+	    driWaitForVBlank(dPriv, &missed_target);
 	    LOCK_HARDWARE(radeon);
 	}
 
@@ -215,16 +215,18 @@ void radeonCopyBuffer(const __DRIdrawablePrivate * dPriv,
 			if (rect->y2 < b->y2)
 			    b->y2 = rect->y2;
 
-			if (b->x1 < b->x2 && b->y1 < b->y2)
-			    b++;
+			if (b->x1 >= b->x2 || b->y1 >= b->y2)
+			    continue;
 		    }
-		    else
-			b++;
 
+		    b++;
 		    n++;
 		}
 		radeon->sarea->nbox = n;
 
+		if (!n)
+		   continue;
+
 		ret = drmCommandNone(radeon->dri.fd, DRM_RADEON_SWAP);
 
 		if (ret) {
@@ -241,7 +243,7 @@ void radeonCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	    ((r300ContextPtr)radeon)->hw.all_dirty = GL_TRUE;
 
 	    radeon->swap_count++;
-	    (*dri_interface->getUST) (&ust);
+	    (*psp->systemTime->getUST) (&ust);
 	    if (missed_target) {
 		radeon->swap_missed_count++;
 		radeon->swap_missed_ust = ust - radeon->swap_ust;
@@ -253,11 +255,12 @@ void radeonCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	}
 }
 
-void radeonPageFlip(const __DRIdrawablePrivate * dPriv)
+void radeonPageFlip(__DRIdrawablePrivate * dPriv)
 {
 	radeonContextPtr radeon;
 	GLint ret;
 	GLboolean missed_target;
+	__DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
 	assert(dPriv);
 	assert(dPriv->driContextPriv);
@@ -293,11 +296,10 @@ void radeonPageFlip(const __DRIdrawablePrivate * dPriv)
 	 */
 	radeonWaitForFrameCompletion(radeon);
 	UNLOCK_HARDWARE(radeon);
-	driWaitForVBlank(dPriv, &radeon->vbl_seq, radeon->vblank_flags,
-			 &missed_target);
+	driWaitForVBlank(dPriv, &missed_target);
 	if (missed_target) {
 		radeon->swap_missed_count++;
-		(void)(*dri_interface->getUST) (&radeon->swap_missed_ust);
+		(void)(*psp->systemTime->getUST) (&radeon->swap_missed_ust);
 	}
 	LOCK_HARDWARE(radeon);
 
@@ -311,7 +313,7 @@ void radeonPageFlip(const __DRIdrawablePrivate * dPriv)
 	}
 
 	radeon->swap_count++;
-	(void)(*dri_interface->getUST) (&radeon->swap_ust);
+	(void)(*psp->systemTime->getUST) (&radeon->swap_ust);
 
         driFlipRenderbuffers(radeon->glCtx->WinSysDrawBuffer, 
                              radeon->sarea->pfCurrentPage);
diff --git a/src/mesa/drivers/dri/r300/radeon_ioctl.h b/src/mesa/drivers/dri/r300/radeon_ioctl.h
index 3a80d36c622..3add775b822 100644
--- a/src/mesa/drivers/dri/r300/radeon_ioctl.h
+++ b/src/mesa/drivers/dri/r300/radeon_ioctl.h
@@ -35,20 +35,20 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_IOCTL_H__
 #define __RADEON_IOCTL_H__
 
-#include "simple_list.h"
+#include "main/simple_list.h"
 #include "radeon_dri.h"
 #include "radeon_lock.h"
 
 #include "xf86drm.h"
 #include "drm.h"
 #if 0
-#include "r200_context.h"
+#include "r200context.h"
 #endif
 #include "radeon_drm.h"
 
-extern void radeonCopyBuffer(const __DRIdrawablePrivate * drawable,
+extern void radeonCopyBuffer(__DRIdrawablePrivate * drawable,
 			     const drm_clip_rect_t	* rect);
-extern void radeonPageFlip(const __DRIdrawablePrivate * drawable);
+extern void radeonPageFlip(__DRIdrawablePrivate * drawable);
 extern void radeonFlush(GLcontext * ctx);
 extern void radeonFinish(GLcontext * ctx);
 extern void radeonWaitForIdleLocked(radeonContextPtr radeon);
diff --git a/src/mesa/drivers/dri/r300/radeon_lock.c b/src/mesa/drivers/dri/r300/radeon_lock.c
index bc3c2d6c6b3..4f47afd5dc6 100644
--- a/src/mesa/drivers/dri/r300/radeon_lock.c
+++ b/src/mesa/drivers/dri/r300/radeon_lock.c
@@ -45,7 +45,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_context.h"
 #include "r300_state.h"
 
-#include "framebuffer.h"
+#include "main/framebuffer.h"
 
 #include "drirenderbuffer.h"
 
@@ -68,8 +68,8 @@ void radeonUpdatePageFlipping(radeonContextPtr rmesa)
 	}
 
 	use_back = rmesa->glCtx->DrawBuffer ?
-	    (rmesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0] ==
-	     BUFFER_BIT_BACK_LEFT) : 1;
+	    (rmesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0] ==
+	     BUFFER_BACK_LEFT) : 1;
 	use_back ^= (rmesa->sarea->pfCurrentPage == 1);
 
 	if (use_back) {
diff --git a/src/mesa/drivers/dri/r300/radeon_nqssadce.c b/src/mesa/drivers/dri/r300/radeon_nqssadce.c
new file mode 100644
index 00000000000..97ce016c99c
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_nqssadce.c
@@ -0,0 +1,284 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * @file
+ *
+ * "Not-quite SSA" and Dead-Code Elimination.
+ *
+ * @note This code uses SWIZZLE_NIL in a source register to indicate that
+ * the corresponding component is ignored by the corresponding instruction.
+ */
+
+#include "radeon_nqssadce.h"
+
+
+/**
+ * Return the @ref register_state for the given register (or 0 for untracked
+ * registers, i.e. constants).
+ */
+static struct register_state *get_reg_state(struct nqssadce_state* s, GLuint file, GLuint index)
+{
+	switch(file) {
+	case PROGRAM_TEMPORARY: return &s->Temps[index];
+	case PROGRAM_OUTPUT: return &s->Outputs[index];
+	default: return 0;
+	}
+}
+
+
+/**
+ * Left multiplication of a register with a swizzle
+ *
+ * @note Works correctly only for X, Y, Z, W swizzles, not for constant swizzles.
+ */
+static struct prog_src_register lmul_swizzle(GLuint swizzle, struct prog_src_register srcreg)
+{
+	struct prog_src_register tmp = srcreg;
+	int i;
+	tmp.Swizzle = 0;
+	tmp.NegateBase = 0;
+	for(i = 0; i < 4; ++i) {
+		GLuint swz = GET_SWZ(swizzle, i);
+		if (swz < 4) {
+			tmp.Swizzle |= GET_SWZ(srcreg.Swizzle, swz) << (i*3);
+			tmp.NegateBase |= GET_BIT(srcreg.NegateBase, swz) << i;
+		} else {
+			tmp.Swizzle |= swz << (i*3);
+		}
+	}
+	return tmp;
+}
+
+
+static struct prog_instruction* track_used_srcreg(struct nqssadce_state* s,
+	struct prog_instruction *inst, GLint src, GLuint sourced)
+{
+	int i;
+	GLuint deswz_source = 0;
+
+	for(i = 0; i < 4; ++i) {
+		if (GET_BIT(sourced, i)) {
+			GLuint swz = GET_SWZ(inst->SrcReg[src].Swizzle, i);
+			deswz_source |= 1 << swz;
+		} else {
+			inst->SrcReg[src].Swizzle &= ~(7 << (3*i));
+			inst->SrcReg[src].Swizzle |= SWIZZLE_NIL << (3*i);
+		}
+	}
+
+	if (!s->Descr->IsNativeSwizzle(inst->Opcode, inst->SrcReg[src])) {
+		struct prog_dst_register dstreg = inst->DstReg;
+		dstreg.File = PROGRAM_TEMPORARY;
+		dstreg.Index = _mesa_find_free_register(s->Program, PROGRAM_TEMPORARY);
+		dstreg.WriteMask = sourced;
+
+		s->Descr->BuildSwizzle(s, dstreg, inst->SrcReg[src]);
+
+		inst = s->Program->Instructions + s->IP;
+		inst->SrcReg[src].File = PROGRAM_TEMPORARY;
+		inst->SrcReg[src].Index = dstreg.Index;
+		inst->SrcReg[src].Swizzle = 0;
+		inst->SrcReg[src].NegateBase = 0;
+		inst->SrcReg[src].Abs = 0;
+		inst->SrcReg[src].NegateAbs = 0;
+		for(i = 0; i < 4; ++i) {
+			if (GET_BIT(sourced, i))
+				inst->SrcReg[src].Swizzle |= i << (3*i);
+			else
+				inst->SrcReg[src].Swizzle |= SWIZZLE_NIL << (3*i);
+		}
+		deswz_source = sourced;
+	}
+
+	struct register_state *regstate = get_reg_state(s, inst->SrcReg[src].File, inst->SrcReg[src].Index);
+	if (regstate)
+		regstate->Sourced |= deswz_source & 0xf;
+
+	return inst;
+}
+
+
+static void rewrite_depth_out(struct prog_instruction *inst)
+{
+	if (inst->DstReg.WriteMask & WRITEMASK_Z) {
+		inst->DstReg.WriteMask = WRITEMASK_W;
+	} else {
+		inst->DstReg.WriteMask = 0;
+		return;
+	}
+
+	switch (inst->Opcode) {
+	case OPCODE_FRC:
+	case OPCODE_MOV:
+		inst->SrcReg[0] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[0]);
+		break;
+	case OPCODE_ADD:
+	case OPCODE_MAX:
+	case OPCODE_MIN:
+	case OPCODE_MUL:
+		inst->SrcReg[0] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[0]);
+		inst->SrcReg[1] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[1]);
+		break;
+	case OPCODE_CMP:
+	case OPCODE_MAD:
+		inst->SrcReg[0] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[0]);
+		inst->SrcReg[1] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[1]);
+		inst->SrcReg[2] = lmul_swizzle(SWIZZLE_ZZZZ, inst->SrcReg[2]);
+		break;
+	default:
+		// Scalar instructions needn't be reswizzled
+		break;
+	}
+}
+
+static void unalias_srcregs(struct prog_instruction *inst, GLuint oldindex, GLuint newindex)
+{
+	int nsrc = _mesa_num_inst_src_regs(inst->Opcode);
+	int i;
+	for(i = 0; i < nsrc; ++i)
+		if (inst->SrcReg[i].File == PROGRAM_TEMPORARY && inst->SrcReg[i].Index == oldindex)
+			inst->SrcReg[i].Index = newindex;
+}
+
+static void unalias_temporary(struct nqssadce_state* s, GLuint oldindex)
+{
+	GLuint newindex = _mesa_find_free_register(s->Program, PROGRAM_TEMPORARY);
+	int ip;
+	for(ip = 0; ip < s->IP; ++ip) {
+		struct prog_instruction* inst = s->Program->Instructions + ip;
+		if (inst->DstReg.File == PROGRAM_TEMPORARY && inst->DstReg.Index == oldindex)
+			inst->DstReg.Index = newindex;
+		unalias_srcregs(inst, oldindex, newindex);
+	}
+	unalias_srcregs(s->Program->Instructions + s->IP, oldindex, newindex);
+}
+
+
+/**
+ * Handle one instruction.
+ */
+static void process_instruction(struct nqssadce_state* s)
+{
+	struct prog_instruction *inst = s->Program->Instructions + s->IP;
+
+	if (inst->Opcode == OPCODE_END)
+		return;
+
+	if (inst->Opcode != OPCODE_KIL) {
+		if (s->Descr->RewriteDepthOut) {
+			if (inst->DstReg.File == PROGRAM_OUTPUT && inst->DstReg.Index == FRAG_RESULT_DEPR)
+				rewrite_depth_out(inst);
+		}
+
+		struct register_state *regstate = get_reg_state(s, inst->DstReg.File, inst->DstReg.Index);
+		if (!regstate) {
+			_mesa_problem(s->Ctx, "NqssaDce: bad destination register (%i[%i])\n",
+				inst->DstReg.File, inst->DstReg.Index);
+			return;
+		}
+
+		inst->DstReg.WriteMask &= regstate->Sourced;
+		regstate->Sourced &= ~inst->DstReg.WriteMask;
+
+		if (inst->DstReg.WriteMask == 0) {
+			_mesa_delete_instructions(s->Program, s->IP, 1);
+			return;
+		}
+
+		if (inst->DstReg.File == PROGRAM_TEMPORARY && !regstate->Sourced)
+			unalias_temporary(s, inst->DstReg.Index);
+	}
+
+	/* Attention: Due to swizzle emulation code, the following
+	 * might change the instruction stream under us, so we have
+	 * to be careful with the inst pointer. */
+	switch (inst->Opcode) {
+	case OPCODE_DDX:
+	case OPCODE_DDY:
+	case OPCODE_FRC:
+	case OPCODE_MOV:
+		inst = track_used_srcreg(s, inst, 0, inst->DstReg.WriteMask);
+		break;
+	case OPCODE_ADD:
+	case OPCODE_MAX:
+	case OPCODE_MIN:
+	case OPCODE_MUL:
+		inst = track_used_srcreg(s, inst, 0, inst->DstReg.WriteMask);
+		inst = track_used_srcreg(s, inst, 1, inst->DstReg.WriteMask);
+		break;
+	case OPCODE_CMP:
+	case OPCODE_MAD:
+		inst = track_used_srcreg(s, inst, 0, inst->DstReg.WriteMask);
+		inst = track_used_srcreg(s, inst, 1, inst->DstReg.WriteMask);
+		inst = track_used_srcreg(s, inst, 2, inst->DstReg.WriteMask);
+		break;
+	case OPCODE_COS:
+	case OPCODE_EX2:
+	case OPCODE_LG2:
+	case OPCODE_RCP:
+	case OPCODE_RSQ:
+	case OPCODE_SIN:
+		inst = track_used_srcreg(s, inst, 0, 0x1);
+		break;
+	case OPCODE_DP3:
+		inst = track_used_srcreg(s, inst, 0, 0x7);
+		inst = track_used_srcreg(s, inst, 1, 0x7);
+		break;
+	case OPCODE_DP4:
+		inst = track_used_srcreg(s, inst, 0, 0xf);
+		inst = track_used_srcreg(s, inst, 1, 0xf);
+		break;
+	case OPCODE_KIL:
+	case OPCODE_TEX:
+	case OPCODE_TXB:
+	case OPCODE_TXP:
+		inst = track_used_srcreg(s, inst, 0, 0xf);
+		break;
+	default:
+		_mesa_problem(s->Ctx, "NqssaDce: Unknown opcode %d\n", inst->Opcode);
+		return;
+	}
+}
+
+
+void radeonNqssaDce(GLcontext *ctx, struct gl_program *p, struct radeon_nqssadce_descr* descr)
+{
+	struct nqssadce_state s;
+
+	_mesa_bzero(&s, sizeof(s));
+	s.Ctx = ctx;
+	s.Program = p;
+	s.Descr = descr;
+	s.Descr->Init(&s);
+	s.IP = p->NumInstructions;
+
+	while(s.IP > 0) {
+		s.IP--;
+		process_instruction(&s);
+	}
+}
diff --git a/src/mesa/drivers/dri/r300/radeon_nqssadce.h b/src/mesa/drivers/dri/r300/radeon_nqssadce.h
new file mode 100644
index 00000000000..a4f94abcb62
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_nqssadce.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __RADEON_PROGRAM_NQSSADCE_H_
+#define __RADEON_PROGRAM_NQSSADCE_H_
+
+#include "radeon_program.h"
+
+
+struct register_state {
+	/**
+	 * Bitmask indicating which components of the register are sourced
+	 * by later instructions.
+	 */
+	GLuint Sourced : 4;
+};
+
+/**
+ * Maintain state such as which registers are used, which registers are
+ * read from, etc.
+ */
+struct nqssadce_state {
+	GLcontext *Ctx;
+	struct gl_program *Program;
+	struct radeon_nqssadce_descr *Descr;
+
+	/**
+	 * All instructions after this instruction pointer have been dealt with.
+	 */
+	int IP;
+
+	/**
+	 * Which registers are read by subsequent instructions?
+	 */
+	struct register_state Temps[MAX_PROGRAM_TEMPS];
+	struct register_state Outputs[VERT_RESULT_MAX];
+};
+
+
+/**
+ * This structure contains a description of the hardware in-so-far as
+ * it is required for the NqSSA-DCE pass.
+ */
+struct radeon_nqssadce_descr {
+	/**
+	 * Fill in which outputs
+	 */
+	void (*Init)(struct nqssadce_state *);
+
+	/**
+	 * Check whether the given swizzle, absolute and negate combination
+	 * can be implemented natively by the hardware for this opcode.
+	 */
+	GLboolean (*IsNativeSwizzle)(GLuint opcode, struct prog_src_register reg);
+
+	/**
+	 * Emit (at the current IP) the instruction MOV dst, src;
+	 * The transformation will work recursively on the emitted instruction(s).
+	 */
+	void (*BuildSwizzle)(struct nqssadce_state*, struct prog_dst_register dst, struct prog_src_register src);
+
+	/**
+	 * Rewrite instructions that write to DEPR.z to write to DEPR.w
+	 * instead (rewriting is done *before* the WriteMask test).
+	 */
+	GLboolean RewriteDepthOut;
+	void *Data;
+};
+
+void radeonNqssaDce(GLcontext *ctx, struct gl_program *p, struct radeon_nqssadce_descr* descr);
+
+#endif /* __RADEON_PROGRAM_NQSSADCE_H_ */
diff --git a/src/mesa/drivers/dri/r300/radeon_program.c b/src/mesa/drivers/dri/r300/radeon_program.c
new file mode 100644
index 00000000000..da5e7aefce5
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "radeon_program.h"
+
+#include "shader/prog_print.h"
+
+
+/**
+ * Transform the given clause in the following way:
+ *  1. Replace it with an empty clause
+ *  2. For every instruction in the original clause, try the given
+ *     transformations in order.
+ *  3. If one of the transformations returns GL_TRUE, assume that it
+ *     has emitted the appropriate instruction(s) into the new clause;
+ *     otherwise, copy the instruction verbatim.
+ *
+ * \note The transformation is currently not recursive; in other words,
+ * instructions emitted by transformations are not transformed.
+ *
+ * \note The transform is called 'local' because it can only look at
+ * one instruction at a time.
+ */
+void radeonLocalTransform(
+	GLcontext *Ctx,
+	struct gl_program *program,
+	int num_transformations,
+	struct radeon_program_transformation* transformations)
+{
+	struct radeon_transform_context ctx;
+	int ip;
+
+	ctx.Ctx = Ctx;
+	ctx.Program = program;
+	ctx.OldInstructions = program->Instructions;
+	ctx.OldNumInstructions = program->NumInstructions;
+
+	program->Instructions = 0;
+	program->NumInstructions = 0;
+
+	for(ip = 0; ip < ctx.OldNumInstructions; ++ip) {
+		struct prog_instruction *instr = ctx.OldInstructions + ip;
+		int i;
+
+		for(i = 0; i < num_transformations; ++i) {
+			struct radeon_program_transformation* t = transformations + i;
+
+			if (t->function(&ctx, instr, t->userData))
+				break;
+		}
+
+		if (i >= num_transformations) {
+			struct prog_instruction* dest = radeonAppendInstructions(program, 1);
+			_mesa_copy_instructions(dest, instr, 1);
+		}
+	}
+
+	_mesa_free_instructions(ctx.OldInstructions, ctx.OldNumInstructions);
+}
+
+
+static void scan_instructions(GLboolean* used, const struct prog_instruction* insts, GLuint count)
+{
+	GLuint i;
+	for (i = 0; i < count; i++) {
+		const struct prog_instruction *inst = insts + i;
+		const GLuint n = _mesa_num_inst_src_regs(inst->Opcode);
+		GLuint k;
+
+		for (k = 0; k < n; k++) {
+			if (inst->SrcReg[k].File == PROGRAM_TEMPORARY)
+				used[inst->SrcReg[k].Index] = GL_TRUE;
+		}
+	}
+}
+
+GLint radeonFindFreeTemporary(struct radeon_transform_context *t)
+{
+	GLboolean used[MAX_PROGRAM_TEMPS];
+	GLuint i;
+
+	_mesa_memset(used, 0, sizeof(used));
+	scan_instructions(used, t->Program->Instructions, t->Program->NumInstructions);
+	scan_instructions(used, t->OldInstructions, t->OldNumInstructions);
+
+	for (i = 0; i < MAX_PROGRAM_TEMPS; i++) {
+		if (!used[i])
+			return i;
+	}
+
+	return -1;
+}
+
+
+/**
+ * Append the given number of instructions to the program and return a
+ * pointer to the first new instruction.
+ */
+struct prog_instruction *radeonAppendInstructions(struct gl_program *program, int count)
+{
+	int oldnum = program->NumInstructions;
+	_mesa_insert_instructions(program, oldnum, count);
+	return program->Instructions + oldnum;
+}
diff --git a/src/mesa/drivers/dri/r300/radeon_program.h b/src/mesa/drivers/dri/r300/radeon_program.h
new file mode 100644
index 00000000000..b411f69bc88
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program.h
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __RADEON_PROGRAM_H_
+#define __RADEON_PROGRAM_H_
+
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/enums.h"
+#include "shader/program.h"
+#include "shader/prog_instruction.h"
+
+
+enum {
+	CLAUSE_MIXED = 0,
+	CLAUSE_ALU,
+	CLAUSE_TEX
+};
+
+enum {
+	PROGRAM_BUILTIN = PROGRAM_FILE_MAX /**< not a real register, but a special swizzle constant */
+};
+
+enum {
+	OPCODE_REPL_ALPHA = MAX_OPCODE /**< used in paired instructions */
+};
+
+#define SWIZZLE_0000 MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO, SWIZZLE_ZERO, SWIZZLE_ZERO)
+#define SWIZZLE_1111 MAKE_SWIZZLE4(SWIZZLE_ONE, SWIZZLE_ONE, SWIZZLE_ONE, SWIZZLE_ONE)
+
+/**
+ * Transformation context that is passed to local transformations.
+ *
+ * Care must be taken with some operations during transformation,
+ * e.g. finding new temporary registers must use @ref radeonFindFreeTemporary
+ */
+struct radeon_transform_context {
+	GLcontext *Ctx;
+	struct gl_program *Program;
+	struct prog_instruction *OldInstructions;
+	GLuint OldNumInstructions;
+};
+
+/**
+ * A transformation that can be passed to \ref radeonLocalTransform.
+ *
+ * The function will be called once for each instruction.
+ * It has to either emit the appropriate transformed code for the instruction
+ * and return GL_TRUE, or return GL_FALSE if it doesn't understand the
+ * instruction.
+ *
+ * The function gets passed the userData as last parameter.
+ */
+struct radeon_program_transformation {
+	GLboolean (*function)(
+		struct radeon_transform_context*,
+		struct prog_instruction*,
+		void*);
+	void *userData;
+};
+
+void radeonLocalTransform(
+	GLcontext* ctx,
+	struct gl_program *program,
+	int num_transformations,
+	struct radeon_program_transformation* transformations);
+
+/**
+ * Find a usable free temporary register during program transformation
+ */
+GLint radeonFindFreeTemporary(struct radeon_transform_context *ctx);
+
+struct prog_instruction *radeonAppendInstructions(struct gl_program *program, int count);
+
+#endif
diff --git a/src/mesa/drivers/dri/r300/radeon_program_alu.c b/src/mesa/drivers/dri/r300/radeon_program_alu.c
new file mode 100644
index 00000000000..1ef71e74dcf
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program_alu.c
@@ -0,0 +1,658 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * @file
+ *
+ * Shareable transformations that transform "special" ALU instructions
+ * into ALU instructions that are supported by hardware.
+ *
+ */
+
+#include "radeon_program_alu.h"
+
+#include "shader/prog_parameter.h"
+
+
+static struct prog_instruction *emit1(struct gl_program* p,
+	gl_inst_opcode Opcode, GLuint Saturate, struct prog_dst_register DstReg,
+	struct prog_src_register SrcReg)
+{
+	struct prog_instruction *fpi = radeonAppendInstructions(p, 1);
+
+	fpi->Opcode = Opcode;
+	fpi->SaturateMode = Saturate;
+	fpi->DstReg = DstReg;
+	fpi->SrcReg[0] = SrcReg;
+	return fpi;
+}
+
+static struct prog_instruction *emit2(struct gl_program* p,
+	gl_inst_opcode Opcode, GLuint Saturate, struct prog_dst_register DstReg,
+	struct prog_src_register SrcReg0, struct prog_src_register SrcReg1)
+{
+	struct prog_instruction *fpi = radeonAppendInstructions(p, 1);
+
+	fpi->Opcode = Opcode;
+	fpi->SaturateMode = Saturate;
+	fpi->DstReg = DstReg;
+	fpi->SrcReg[0] = SrcReg0;
+	fpi->SrcReg[1] = SrcReg1;
+	return fpi;
+}
+
+static struct prog_instruction *emit3(struct gl_program* p,
+	gl_inst_opcode Opcode, GLuint Saturate, struct prog_dst_register DstReg,
+	struct prog_src_register SrcReg0, struct prog_src_register SrcReg1,
+	struct prog_src_register SrcReg2)
+{
+	struct prog_instruction *fpi = radeonAppendInstructions(p, 1);
+
+	fpi->Opcode = Opcode;
+	fpi->SaturateMode = Saturate;
+	fpi->DstReg = DstReg;
+	fpi->SrcReg[0] = SrcReg0;
+	fpi->SrcReg[1] = SrcReg1;
+	fpi->SrcReg[2] = SrcReg2;
+	return fpi;
+}
+
+static void set_swizzle(struct prog_src_register *SrcReg, int coordinate, int swz)
+{
+	SrcReg->Swizzle &= ~(7 << (3*coordinate));
+	SrcReg->Swizzle |= swz << (3*coordinate);
+}
+
+static void set_negate_base(struct prog_src_register *SrcReg, int coordinate, int negate)
+{
+	SrcReg->NegateBase &= ~(1 << coordinate);
+	SrcReg->NegateBase |= (negate << coordinate);
+}
+
+static struct prog_dst_register dstreg(int file, int index)
+{
+	struct prog_dst_register dst;
+	dst.File = file;
+	dst.Index = index;
+	dst.WriteMask = WRITEMASK_XYZW;
+	dst.CondMask = COND_TR;
+	dst.CondSwizzle = SWIZZLE_NOOP;
+	dst.CondSrc = 0;
+	dst.pad = 0;
+	return dst;
+}
+
+static struct prog_dst_register dstregtmpmask(int index, int mask)
+{
+	struct prog_dst_register dst;
+	dst.File = PROGRAM_TEMPORARY;
+	dst.Index = index;
+	dst.WriteMask = mask;
+	dst.CondMask = COND_TR;
+	dst.CondSwizzle = SWIZZLE_NOOP;
+	dst.CondSrc = 0;
+	dst.pad = 0;
+	return dst;
+}
+
+static const struct prog_src_register builtin_zero = {
+	.File = PROGRAM_BUILTIN,
+	.Index = 0,
+	.Swizzle = SWIZZLE_0000
+};
+static const struct prog_src_register builtin_one = {
+	.File = PROGRAM_BUILTIN,
+	.Index = 0,
+	.Swizzle = SWIZZLE_1111
+};
+static const struct prog_src_register srcreg_undefined = {
+	.File = PROGRAM_UNDEFINED,
+	.Index = 0,
+	.Swizzle = SWIZZLE_NOOP
+};
+
+static struct prog_src_register srcreg(int file, int index)
+{
+	struct prog_src_register src = srcreg_undefined;
+	src.File = file;
+	src.Index = index;
+	return src;
+}
+
+static struct prog_src_register srcregswz(int file, int index, int swz)
+{
+	struct prog_src_register src = srcreg_undefined;
+	src.File = file;
+	src.Index = index;
+	src.Swizzle = swz;
+	return src;
+}
+
+static struct prog_src_register absolute(struct prog_src_register reg)
+{
+	struct prog_src_register newreg = reg;
+	newreg.Abs = 1;
+	newreg.NegateBase = 0;
+	newreg.NegateAbs = 0;
+	return newreg;
+}
+
+static struct prog_src_register negate(struct prog_src_register reg)
+{
+	struct prog_src_register newreg = reg;
+	newreg.NegateAbs = !newreg.NegateAbs;
+	return newreg;
+}
+
+static struct prog_src_register swizzle(struct prog_src_register reg, GLuint x, GLuint y, GLuint z, GLuint w)
+{
+	struct prog_src_register swizzled = reg;
+	swizzled.Swizzle = MAKE_SWIZZLE4(
+		x >= 4 ? x : GET_SWZ(reg.Swizzle, x),
+		y >= 4 ? y : GET_SWZ(reg.Swizzle, y),
+		z >= 4 ? z : GET_SWZ(reg.Swizzle, z),
+		w >= 4 ? w : GET_SWZ(reg.Swizzle, w));
+	return swizzled;
+}
+
+static struct prog_src_register scalar(struct prog_src_register reg)
+{
+	return swizzle(reg, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X);
+}
+
+static void transform_ABS(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	struct prog_src_register src = inst->SrcReg[0];
+	src.Abs = 1;
+	src.NegateBase = 0;
+	src.NegateAbs = 0;
+	emit1(t->Program, OPCODE_MOV, inst->SaturateMode, inst->DstReg, src);
+}
+
+static void transform_DPH(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	struct prog_src_register src0 = inst->SrcReg[0];
+	if (src0.NegateAbs) {
+		if (src0.Abs) {
+			int tempreg = radeonFindFreeTemporary(t);
+			emit1(t->Program, OPCODE_MOV, 0, dstreg(PROGRAM_TEMPORARY, tempreg), src0);
+			src0 = srcreg(src0.File, src0.Index);
+		} else {
+			src0.NegateAbs = 0;
+			src0.NegateBase ^= NEGATE_XYZW;
+		}
+	}
+	set_swizzle(&src0, 3, SWIZZLE_ONE);
+	set_negate_base(&src0, 3, 0);
+	emit2(t->Program, OPCODE_DP4, inst->SaturateMode, inst->DstReg, src0, inst->SrcReg[1]);
+}
+
+/**
+ * [1, src0.y*src1.y, src0.z, src1.w]
+ * So basically MUL with lotsa swizzling.
+ */
+static void transform_DST(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	emit2(t->Program, OPCODE_MUL, inst->SaturateMode, inst->DstReg,
+		swizzle(inst->SrcReg[0], SWIZZLE_ONE, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE),
+		swizzle(inst->SrcReg[1], SWIZZLE_ONE, SWIZZLE_Y, SWIZZLE_ONE, SWIZZLE_W));
+}
+
+static void transform_FLR(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+	emit1(t->Program, OPCODE_FRC, 0, dstreg(PROGRAM_TEMPORARY, tempreg), inst->SrcReg[0]);
+	emit2(t->Program, OPCODE_ADD, inst->SaturateMode, inst->DstReg,
+		inst->SrcReg[0], negate(srcreg(PROGRAM_TEMPORARY, tempreg)));
+}
+
+/**
+ * Definition of LIT (from ARB_fragment_program):
+ *
+ *  tmp = VectorLoad(op0);
+ *  if (tmp.x < 0) tmp.x = 0;
+ *  if (tmp.y < 0) tmp.y = 0;
+ *  if (tmp.w < -(128.0-epsilon)) tmp.w = -(128.0-epsilon);
+ *  else if (tmp.w > 128-epsilon) tmp.w = 128-epsilon;
+ *  result.x = 1.0;
+ *  result.y = tmp.x;
+ *  result.z = (tmp.x > 0) ? RoughApproxPower(tmp.y, tmp.w) : 0.0;
+ *  result.w = 1.0;
+ *
+ * The longest path of computation is the one leading to result.z,
+ * consisting of 5 operations. This implementation of LIT takes
+ * 5 slots, if the subsequent optimization passes are clever enough
+ * to pair instructions correctly.
+ */
+static void transform_LIT(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	static const GLfloat LitConst[4] = { -127.999999 };
+
+	GLuint constant;
+	GLuint constant_swizzle;
+	GLuint temp;
+	int needTemporary = 0;
+	struct prog_src_register srctemp;
+
+	constant = _mesa_add_unnamed_constant(t->Program->Parameters, LitConst, 1, &constant_swizzle);
+
+	if (inst->DstReg.WriteMask != WRITEMASK_XYZW) {
+		needTemporary = 1;
+	} else if (inst->DstReg.File != PROGRAM_TEMPORARY) {
+		// LIT is typically followed by DP3/DP4, so there's no point
+		// in creating special code for this case
+		needTemporary = 1;
+	}
+
+	if (needTemporary) {
+		temp = radeonFindFreeTemporary(t);
+	} else {
+		temp = inst->DstReg.Index;
+	}
+	srctemp = srcreg(PROGRAM_TEMPORARY, temp);
+
+	// tmp.x = max(0.0, Src.x);
+	// tmp.y = max(0.0, Src.y);
+	// tmp.w = clamp(Src.z, -128+eps, 128-eps);
+	emit2(t->Program, OPCODE_MAX, 0,
+		dstregtmpmask(temp, WRITEMASK_XYW),
+		inst->SrcReg[0],
+		swizzle(srcreg(PROGRAM_CONSTANT, constant),
+			SWIZZLE_ZERO, SWIZZLE_ZERO, SWIZZLE_ZERO, constant_swizzle&3));
+	emit2(t->Program, OPCODE_MIN, 0,
+		dstregtmpmask(temp, WRITEMASK_Z),
+		swizzle(srctemp, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+		negate(srcregswz(PROGRAM_CONSTANT, constant, constant_swizzle)));
+
+	// tmp.w = Pow(tmp.y, tmp.w)
+	emit1(t->Program, OPCODE_LG2, 0,
+		dstregtmpmask(temp, WRITEMASK_W),
+		swizzle(srctemp, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y));
+	emit2(t->Program, OPCODE_MUL, 0,
+		dstregtmpmask(temp, WRITEMASK_W),
+		swizzle(srctemp, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+		swizzle(srctemp, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z));
+	emit1(t->Program, OPCODE_EX2, 0,
+		dstregtmpmask(temp, WRITEMASK_W),
+		swizzle(srctemp, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W));
+
+	// tmp.z = (tmp.x > 0) ? tmp.w : 0.0
+	emit3(t->Program, OPCODE_CMP, inst->SaturateMode,
+		dstregtmpmask(temp, WRITEMASK_Z),
+		negate(swizzle(srctemp, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X)),
+		swizzle(srctemp, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+		builtin_zero);
+
+	// tmp.x, tmp.y, tmp.w = 1.0, tmp.x, 1.0
+	emit1(t->Program, OPCODE_MOV, inst->SaturateMode,
+		dstregtmpmask(temp, WRITEMASK_XYW),
+		swizzle(srctemp, SWIZZLE_ONE, SWIZZLE_X, SWIZZLE_ONE, SWIZZLE_ONE));
+
+	if (needTemporary)
+		emit1(t->Program, OPCODE_MOV, 0, inst->DstReg, srctemp);
+}
+
+static void transform_LRP(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+
+	emit2(t->Program, OPCODE_ADD, 0,
+		dstreg(PROGRAM_TEMPORARY, tempreg),
+		inst->SrcReg[1], negate(inst->SrcReg[2]));
+	emit3(t->Program, OPCODE_MAD, inst->SaturateMode,
+		inst->DstReg,
+		inst->SrcReg[0], srcreg(PROGRAM_TEMPORARY, tempreg), inst->SrcReg[2]);
+}
+
+static void transform_POW(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+	struct prog_dst_register tempdst = dstreg(PROGRAM_TEMPORARY, tempreg);
+	struct prog_src_register tempsrc = srcreg(PROGRAM_TEMPORARY, tempreg);
+	tempdst.WriteMask = WRITEMASK_W;
+	tempsrc.Swizzle = SWIZZLE_WWWW;
+
+	emit1(t->Program, OPCODE_LG2, 0, tempdst, scalar(inst->SrcReg[0]));
+	emit2(t->Program, OPCODE_MUL, 0, tempdst, tempsrc, scalar(inst->SrcReg[1]));
+	emit1(t->Program, OPCODE_EX2, inst->SaturateMode, inst->DstReg, tempsrc);
+}
+
+static void transform_RSQ(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	emit1(t->Program, OPCODE_RSQ, inst->SaturateMode, inst->DstReg, absolute(inst->SrcReg[0]));
+}
+
+static void transform_SGE(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+
+	emit2(t->Program, OPCODE_ADD, 0, dstreg(PROGRAM_TEMPORARY, tempreg), inst->SrcReg[0], negate(inst->SrcReg[1]));
+	emit3(t->Program, OPCODE_CMP, inst->SaturateMode, inst->DstReg,
+		srcreg(PROGRAM_TEMPORARY, tempreg), builtin_zero, builtin_one);
+}
+
+static void transform_SLT(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+
+	emit2(t->Program, OPCODE_ADD, 0, dstreg(PROGRAM_TEMPORARY, tempreg), inst->SrcReg[0], negate(inst->SrcReg[1]));
+	emit3(t->Program, OPCODE_CMP, inst->SaturateMode, inst->DstReg,
+		srcreg(PROGRAM_TEMPORARY, tempreg), builtin_one, builtin_zero);
+}
+
+static void transform_SUB(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	emit2(t->Program, OPCODE_ADD, inst->SaturateMode, inst->DstReg, inst->SrcReg[0], negate(inst->SrcReg[1]));
+}
+
+static void transform_SWZ(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	emit1(t->Program, OPCODE_MOV, inst->SaturateMode, inst->DstReg, inst->SrcReg[0]);
+}
+
+static void transform_XPD(struct radeon_transform_context* t,
+	struct prog_instruction* inst)
+{
+	int tempreg = radeonFindFreeTemporary(t);
+
+	emit2(t->Program, OPCODE_MUL, 0, dstreg(PROGRAM_TEMPORARY, tempreg),
+		swizzle(inst->SrcReg[0], SWIZZLE_Z, SWIZZLE_X, SWIZZLE_Y, SWIZZLE_W),
+		swizzle(inst->SrcReg[1], SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_X, SWIZZLE_W));
+	emit3(t->Program, OPCODE_MAD, inst->SaturateMode, inst->DstReg,
+		swizzle(inst->SrcReg[0], SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_X, SWIZZLE_W),
+		swizzle(inst->SrcReg[1], SWIZZLE_Z, SWIZZLE_X, SWIZZLE_Y, SWIZZLE_W),
+		negate(srcreg(PROGRAM_TEMPORARY, tempreg)));
+}
+
+
+/**
+ * Can be used as a transformation for @ref radeonClauseLocalTransform,
+ * no userData necessary.
+ *
+ * Eliminates the following ALU instructions:
+ *  ABS, DPH, DST, FLR, LIT, LRP, POW, SGE, SLT, SUB, SWZ, XPD
+ * using:
+ *  MOV, ADD, MUL, MAD, FRC, DP3, LG2, EX2, CMP
+ *
+ * Transforms RSQ to Radeon's native RSQ by explicitly setting
+ * absolute value.
+ *
+ * @note should be applicable to R300 and R500 fragment programs.
+ */
+GLboolean radeonTransformALU(struct radeon_transform_context* t,
+	struct prog_instruction* inst,
+	void* unused)
+{
+	switch(inst->Opcode) {
+	case OPCODE_ABS: transform_ABS(t, inst); return GL_TRUE;
+	case OPCODE_DPH: transform_DPH(t, inst); return GL_TRUE;
+	case OPCODE_DST: transform_DST(t, inst); return GL_TRUE;
+	case OPCODE_FLR: transform_FLR(t, inst); return GL_TRUE;
+	case OPCODE_LIT: transform_LIT(t, inst); return GL_TRUE;
+	case OPCODE_LRP: transform_LRP(t, inst); return GL_TRUE;
+	case OPCODE_POW: transform_POW(t, inst); return GL_TRUE;
+	case OPCODE_RSQ: transform_RSQ(t, inst); return GL_TRUE;
+	case OPCODE_SGE: transform_SGE(t, inst); return GL_TRUE;
+	case OPCODE_SLT: transform_SLT(t, inst); return GL_TRUE;
+	case OPCODE_SUB: transform_SUB(t, inst); return GL_TRUE;
+	case OPCODE_SWZ: transform_SWZ(t, inst); return GL_TRUE;
+	case OPCODE_XPD: transform_XPD(t, inst); return GL_TRUE;
+	default:
+		return GL_FALSE;
+	}
+}
+
+
+static void sincos_constants(struct radeon_transform_context* t, GLuint *constants)
+{
+	static const GLfloat SinCosConsts[2][4] = {
+		{
+			1.273239545,		// 4/PI
+			-0.405284735,		// -4/(PI*PI)
+			3.141592654,		// PI
+			0.2225			// weight
+		},
+		{
+			0.75,
+			0.5,
+			0.159154943,		// 1/(2*PI)
+			6.283185307		// 2*PI
+		}
+	};
+	int i;
+
+	for(i = 0; i < 2; ++i) {
+		GLuint swz;
+		constants[i] = _mesa_add_unnamed_constant(t->Program->Parameters, SinCosConsts[i], 4, &swz);
+		ASSERT(swz == SWIZZLE_NOOP);
+	}
+}
+
+/**
+ * Approximate sin(x), where x is clamped to (-pi/2, pi/2).
+ *
+ * MUL tmp.xy, src, { 4/PI, -4/(PI^2) }
+ * MAD tmp.x, tmp.y, |src|, tmp.x
+ * MAD tmp.y, tmp.x, |tmp.x|, -tmp.x
+ * MAD dest, tmp.y, weight, tmp.x
+ */
+static void sin_approx(struct radeon_transform_context* t,
+	struct prog_dst_register dst, struct prog_src_register src, const GLuint* constants)
+{
+	GLuint tempreg = radeonFindFreeTemporary(t);
+
+	emit2(t->Program, OPCODE_MUL, 0, dstregtmpmask(tempreg, WRITEMASK_XY),
+		swizzle(src, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+		srcreg(PROGRAM_CONSTANT, constants[0]));
+	emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_X),
+		swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
+		absolute(swizzle(src, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X)),
+		swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X));
+	emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_Y),
+		swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+		absolute(swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X)),
+		negate(swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X)));
+	emit3(t->Program, OPCODE_MAD, 0, dst,
+		swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
+		swizzle(srcreg(PROGRAM_CONSTANT, constants[0]), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+		swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X));
+}
+
+/**
+ * Translate the trigonometric functions COS, SIN, and SCS
+ * using only the basic instructions
+ *  MOV, ADD, MUL, MAD, FRC
+ */
+GLboolean radeonTransformTrigSimple(struct radeon_transform_context* t,
+	struct prog_instruction* inst,
+	void* unused)
+{
+	if (inst->Opcode != OPCODE_COS &&
+	    inst->Opcode != OPCODE_SIN &&
+	    inst->Opcode != OPCODE_SCS)
+		return GL_FALSE;
+
+	GLuint constants[2];
+	GLuint tempreg = radeonFindFreeTemporary(t);
+
+	sincos_constants(t, constants);
+
+	if (inst->Opcode == OPCODE_COS) {
+		// MAD tmp.x, src, 1/(2*PI), 0.75
+		// FRC tmp.x, tmp.x
+		// MAD tmp.z, tmp.x, 2*PI, -PI
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(inst->SrcReg[0], SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X));
+		emit1(t->Program, OPCODE_FRC, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W));
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			negate(swizzle(srcreg(PROGRAM_CONSTANT, constants[0]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z)));
+
+		sin_approx(t, inst->DstReg,
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			constants);
+	} else if (inst->Opcode == OPCODE_SIN) {
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(inst->SrcReg[0], SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y));
+		emit1(t->Program, OPCODE_FRC, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W));
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_W),
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			negate(swizzle(srcreg(PROGRAM_CONSTANT, constants[0]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z)));
+
+		sin_approx(t, inst->DstReg,
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			constants);
+	} else {
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_XY),
+			swizzle(inst->SrcReg[0], SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W));
+		emit1(t->Program, OPCODE_FRC, 0, dstregtmpmask(tempreg, WRITEMASK_XY),
+			srcreg(PROGRAM_TEMPORARY, tempreg));
+		emit3(t->Program, OPCODE_MAD, 0, dstregtmpmask(tempreg, WRITEMASK_XY),
+			srcreg(PROGRAM_TEMPORARY, tempreg),
+			swizzle(srcreg(PROGRAM_CONSTANT, constants[1]), SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W),
+			negate(swizzle(srcreg(PROGRAM_CONSTANT, constants[0]), SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z)));
+
+		struct prog_dst_register dst = inst->DstReg;
+
+		dst.WriteMask = inst->DstReg.WriteMask & WRITEMASK_X;
+		sin_approx(t, dst,
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+			constants);
+
+		dst.WriteMask = inst->DstReg.WriteMask & WRITEMASK_Y;
+		sin_approx(t, dst,
+			swizzle(srcreg(PROGRAM_TEMPORARY, tempreg), SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
+			constants);
+	}
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Transform the trigonometric functions COS, SIN, and SCS
+ * to include pre-scaling by 1/(2*PI) and taking the fractional
+ * part, so that the input to COS and SIN is always in the range [0,1).
+ * SCS is replaced by one COS and one SIN instruction.
+ *
+ * @warning This transformation implicitly changes the semantics of SIN and COS!
+ */
+GLboolean radeonTransformTrigScale(struct radeon_transform_context* t,
+	struct prog_instruction* inst,
+	void* unused)
+{
+	if (inst->Opcode != OPCODE_COS &&
+	    inst->Opcode != OPCODE_SIN &&
+	    inst->Opcode != OPCODE_SCS)
+		return GL_FALSE;
+
+	static const GLfloat RCP_2PI[] = { 0.15915494309189535 };
+	GLuint temp;
+	GLuint constant;
+	GLuint constant_swizzle;
+
+	temp = radeonFindFreeTemporary(t);
+	constant = _mesa_add_unnamed_constant(t->Program->Parameters, RCP_2PI, 1, &constant_swizzle);
+
+	emit2(t->Program, OPCODE_MUL, 0, dstregtmpmask(temp, WRITEMASK_W),
+		swizzle(inst->SrcReg[0], SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
+		srcregswz(PROGRAM_CONSTANT, constant, constant_swizzle));
+	emit1(t->Program, OPCODE_FRC, 0, dstregtmpmask(temp, WRITEMASK_W),
+		srcreg(PROGRAM_TEMPORARY, temp));
+
+	if (inst->Opcode == OPCODE_COS) {
+		emit1(t->Program, OPCODE_COS, inst->SaturateMode, inst->DstReg,
+			srcregswz(PROGRAM_TEMPORARY, temp, SWIZZLE_WWWW));
+	} else if (inst->Opcode == OPCODE_SIN) {
+		emit1(t->Program, OPCODE_SIN, inst->SaturateMode,
+			inst->DstReg, srcregswz(PROGRAM_TEMPORARY, temp, SWIZZLE_WWWW));
+	} else if (inst->Opcode == OPCODE_SCS) {
+		struct prog_dst_register moddst = inst->DstReg;
+
+		if (inst->DstReg.WriteMask & WRITEMASK_X) {
+			moddst.WriteMask = WRITEMASK_X;
+			emit1(t->Program, OPCODE_COS, inst->SaturateMode, moddst,
+				srcregswz(PROGRAM_TEMPORARY, temp, SWIZZLE_WWWW));
+		}
+		if (inst->DstReg.WriteMask & WRITEMASK_Y) {
+			moddst.WriteMask = WRITEMASK_Y;
+			emit1(t->Program, OPCODE_SIN, inst->SaturateMode, moddst,
+				srcregswz(PROGRAM_TEMPORARY, temp, SWIZZLE_WWWW));
+		}
+	}
+
+	return GL_TRUE;
+}
+
+/**
+ * Rewrite DDX/DDY instructions to properly work with r5xx shaders.
+ * The r5xx MDH/MDV instruction provides per-quad partial derivatives.
+ * It takes the form A*B+C. A and C are set by setting src0. B should be -1.
+ *
+ * @warning This explicitly changes the form of DDX and DDY!
+ */
+
+GLboolean radeonTransformDeriv(struct radeon_transform_context* t,
+	struct prog_instruction* inst,
+	void* unused)
+{
+	if (inst->Opcode != OPCODE_DDX && inst->Opcode != OPCODE_DDY)
+		return GL_FALSE;
+
+	struct prog_src_register B = inst->SrcReg[1];
+
+	B.Swizzle = MAKE_SWIZZLE4(SWIZZLE_ONE, SWIZZLE_ONE,
+						SWIZZLE_ONE, SWIZZLE_ONE);
+	B.NegateBase = NEGATE_XYZW;
+
+	emit2(t->Program, inst->Opcode, inst->SaturateMode, inst->DstReg,
+		inst->SrcReg[0], B);
+
+	return GL_TRUE;
+}
diff --git a/src/mesa/drivers/dri/r300/radeon_program_alu.h b/src/mesa/drivers/dri/r300/radeon_program_alu.h
new file mode 100644
index 00000000000..b45958115cf
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program_alu.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __RADEON_PROGRAM_ALU_H_
+#define __RADEON_PROGRAM_ALU_H_
+
+#include "radeon_program.h"
+
+GLboolean radeonTransformALU(
+	struct radeon_transform_context *t,
+	struct prog_instruction*,
+	void*);
+
+GLboolean radeonTransformTrigSimple(
+	struct radeon_transform_context *t,
+	struct prog_instruction*,
+	void*);
+
+GLboolean radeonTransformTrigScale(
+	struct radeon_transform_context *t,
+	struct prog_instruction*,
+	void*);
+
+GLboolean radeonTransformDeriv(
+	struct radeon_transform_context *t,
+	struct prog_instruction*,
+	void*);
+
+#endif /* __RADEON_PROGRAM_ALU_H_ */
diff --git a/src/mesa/drivers/dri/r300/radeon_program_pair.c b/src/mesa/drivers/dri/r300/radeon_program_pair.c
new file mode 100644
index 00000000000..5ad50d2863a
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program_pair.c
@@ -0,0 +1,1001 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/**
+ * @file
+ *
+ * Perform temporary register allocation and attempt to pair off instructions
+ * in RGB and Alpha pairs. Also attempts to optimize the TEX instruction
+ * vs. ALU instruction scheduling.
+ */
+
+#include "radeon_program_pair.h"
+
+#include "radeon_context.h"
+
+#include "shader/prog_print.h"
+
+#define error(fmt, args...) do { \
+	_mesa_problem(s->Ctx, "%s::%s(): " fmt "\n",	\
+		__FILE__, __FUNCTION__, ##args);	\
+	s->Error = GL_TRUE;				\
+} while(0)
+
+struct pair_state_instruction {
+	GLuint IsTex:1; /**< Is a texture instruction */
+	GLuint NeedRGB:1; /**< Needs the RGB ALU */
+	GLuint NeedAlpha:1; /**< Needs the Alpha ALU */
+	GLuint IsTranscendent:1; /**< Is a special transcendent instruction */
+
+	/**
+	 * Number of (read and write) dependencies that must be resolved before
+	 * this instruction can be scheduled.
+	 */
+	GLuint NumDependencies:5;
+
+	/**
+	 * Next instruction in the linked list of ready instructions.
+	 */
+	struct pair_state_instruction *NextReady;
+
+	/**
+	 * Values that this instruction writes
+	 */
+	struct reg_value *Values[4];
+};
+
+
+/**
+ * Used to keep track of which instructions read a value.
+ */
+struct reg_value_reader {
+	GLuint IP; /**< IP of the instruction that performs this access */
+	struct reg_value_reader *Next;
+};
+
+/**
+ * Used to keep track which values are stored in each component of a
+ * PROGRAM_TEMPORARY.
+ */
+struct reg_value {
+	GLuint IP; /**< IP of the instruction that writes this value */
+	struct reg_value *Next; /**< Pointer to the next value to be written to the same PROGRAM_TEMPORARY component */
+
+	/**
+	 * Unordered linked list of instructions that read from this value.
+	 */
+	struct reg_value_reader *Readers;
+
+	/**
+	 * Number of readers of this value. This is calculated during @ref scan_instructions
+	 * and continually decremented during code emission.
+	 * When this count reaches zero, the instruction that writes the @ref Next value
+	 * can be scheduled.
+	 */
+	GLuint NumReaders;
+};
+
+/**
+ * Used to translate a PROGRAM_INPUT or PROGRAM_TEMPORARY Mesa register
+ * to the proper hardware temporary.
+ */
+struct pair_register_translation {
+	GLuint Allocated:1;
+	GLuint HwIndex:8;
+	GLuint RefCount:23; /**< # of times this occurs in an unscheduled instruction SrcReg or DstReg */
+
+	/**
+	 * Notes the value that is currently contained in each component
+	 * (only used for PROGRAM_TEMPORARY registers).
+	 */
+	struct reg_value *Value[4];
+};
+
+struct pair_state {
+	GLcontext *Ctx;
+	struct gl_program *Program;
+	const struct radeon_pair_handler *Handler;
+	GLboolean Error;
+	GLboolean Debug;
+	GLboolean Verbose;
+	void *UserData;
+
+	/**
+	 * Translate Mesa registers to hardware registers
+	 */
+	struct pair_register_translation Inputs[FRAG_ATTRIB_MAX];
+	struct pair_register_translation Temps[MAX_PROGRAM_TEMPS];
+
+	/**
+	 * Derived information about program instructions.
+	 */
+	struct pair_state_instruction *Instructions;
+
+	struct {
+		GLuint RefCount; /**< # of times this occurs in an unscheduled SrcReg or DstReg */
+	} HwTemps[128];
+
+	/**
+	 * Linked list of instructions that can be scheduled right now,
+	 * based on which ALU/TEX resources they require.
+	 */
+	struct pair_state_instruction *ReadyFullALU;
+	struct pair_state_instruction *ReadyRGB;
+	struct pair_state_instruction *ReadyAlpha;
+	struct pair_state_instruction *ReadyTEX;
+
+	/**
+	 * Pool of @ref reg_value structures for fast allocation.
+	 */
+	struct reg_value *ValuePool;
+	GLuint ValuePoolUsed;
+	struct reg_value_reader *ReaderPool;
+	GLuint ReaderPoolUsed;
+};
+
+
+static struct pair_register_translation *get_register(struct pair_state *s, GLuint file, GLuint index)
+{
+	switch(file) {
+	case PROGRAM_TEMPORARY: return &s->Temps[index];
+	case PROGRAM_INPUT: return &s->Inputs[index];
+	default: return 0;
+	}
+}
+
+static void alloc_hw_reg(struct pair_state *s, GLuint file, GLuint index, GLuint hwindex)
+{
+	struct pair_register_translation *t = get_register(s, file, index);
+	ASSERT(!s->HwTemps[hwindex].RefCount);
+	ASSERT(!t->Allocated);
+	s->HwTemps[hwindex].RefCount = t->RefCount;
+	t->Allocated = 1;
+	t->HwIndex = hwindex;
+}
+
+static GLuint get_hw_reg(struct pair_state *s, GLuint file, GLuint index)
+{
+	GLuint hwindex;
+
+	struct pair_register_translation *t = get_register(s, file, index);
+	if (!t) {
+		_mesa_problem(s->Ctx, "get_hw_reg: %i[%i]\n", file, index);
+		return 0;
+	}
+
+	if (t->Allocated)
+		return t->HwIndex;
+
+	for(hwindex = 0; hwindex < s->Handler->MaxHwTemps; ++hwindex)
+		if (!s->HwTemps[hwindex].RefCount)
+			break;
+
+	if (hwindex >= s->Handler->MaxHwTemps) {
+		error("Ran out of hardware temporaries");
+		return 0;
+	}
+
+	alloc_hw_reg(s, file, index, hwindex);
+	return hwindex;
+}
+
+
+static void deref_hw_reg(struct pair_state *s, GLuint hwindex)
+{
+	if (!s->HwTemps[hwindex].RefCount) {
+		error("Hwindex %i refcount error", hwindex);
+		return;
+	}
+
+	s->HwTemps[hwindex].RefCount--;
+}
+
+static void add_pairinst_to_list(struct pair_state_instruction **list, struct pair_state_instruction *pairinst)
+{
+	pairinst->NextReady = *list;
+	*list = pairinst;
+}
+
+/**
+ * The instruction at the given IP has become ready. Link it into the ready
+ * instructions.
+ */
+static void instruction_ready(struct pair_state *s, int ip)
+{
+	struct pair_state_instruction *pairinst = s->Instructions + ip;
+
+	if (s->Verbose)
+		_mesa_printf("instruction_ready(%i)\n", ip);
+
+	if (pairinst->IsTex)
+		add_pairinst_to_list(&s->ReadyTEX, pairinst);
+	else if (!pairinst->NeedAlpha)
+		add_pairinst_to_list(&s->ReadyRGB, pairinst);
+	else if (!pairinst->NeedRGB)
+		add_pairinst_to_list(&s->ReadyAlpha, pairinst);
+	else
+		add_pairinst_to_list(&s->ReadyFullALU, pairinst);
+}
+
+
+/**
+ * Finally rewrite ADD, MOV, MUL as the appropriate native instruction
+ * and reverse the order of arguments for CMP.
+ */
+static void final_rewrite(struct pair_state *s, struct prog_instruction *inst)
+{
+	struct prog_src_register tmp;
+
+	switch(inst->Opcode) {
+	case OPCODE_ADD:
+		inst->SrcReg[2] = inst->SrcReg[1];
+		inst->SrcReg[1].File = PROGRAM_BUILTIN;
+		inst->SrcReg[1].Swizzle = SWIZZLE_1111;
+		inst->SrcReg[1].NegateBase = 0;
+		inst->SrcReg[1].NegateAbs = 0;
+		inst->Opcode = OPCODE_MAD;
+		break;
+	case OPCODE_CMP:
+		tmp = inst->SrcReg[2];
+		inst->SrcReg[2] = inst->SrcReg[0];
+		inst->SrcReg[0] = tmp;
+		break;
+	case OPCODE_MOV:
+		/* AMD say we should use CMP.
+		 * However, when we transform
+		 *  KIL -r0;
+		 * into
+		 *  CMP tmp, -r0, -r0, 0;
+		 *  KIL tmp;
+		 * we get incorrect behaviour on R500 when r0 == 0.0.
+		 * It appears that the R500 KIL hardware treats -0.0 as less
+		 * than zero.
+		 */
+		inst->SrcReg[1].File = PROGRAM_BUILTIN;
+		inst->SrcReg[1].Swizzle = SWIZZLE_1111;
+		inst->SrcReg[2].File = PROGRAM_BUILTIN;
+		inst->SrcReg[2].Swizzle = SWIZZLE_0000;
+		inst->Opcode = OPCODE_MAD;
+		break;
+	case OPCODE_MUL:
+		inst->SrcReg[2].File = PROGRAM_BUILTIN;
+		inst->SrcReg[2].Swizzle = SWIZZLE_0000;
+		inst->Opcode = OPCODE_MAD;
+		break;
+	default:
+		/* nothing to do */
+		break;
+	}
+}
+
+
+/**
+ * Classify an instruction according to which ALUs etc. it needs
+ */
+static void classify_instruction(struct pair_state *s,
+	struct prog_instruction *inst, struct pair_state_instruction *pairinst)
+{
+	pairinst->NeedRGB = (inst->DstReg.WriteMask & WRITEMASK_XYZ) ? 1 : 0;
+	pairinst->NeedAlpha = (inst->DstReg.WriteMask & WRITEMASK_W) ? 1 : 0;
+
+	switch(inst->Opcode) {
+	case OPCODE_ADD:
+	case OPCODE_CMP:
+	case OPCODE_DDX:
+	case OPCODE_DDY:
+	case OPCODE_FRC:
+	case OPCODE_MAD:
+	case OPCODE_MAX:
+	case OPCODE_MIN:
+	case OPCODE_MOV:
+	case OPCODE_MUL:
+		break;
+	case OPCODE_COS:
+	case OPCODE_EX2:
+	case OPCODE_LG2:
+	case OPCODE_RCP:
+	case OPCODE_RSQ:
+	case OPCODE_SIN:
+		pairinst->IsTranscendent = 1;
+		pairinst->NeedAlpha = 1;
+		break;
+	case OPCODE_DP4:
+		pairinst->NeedAlpha = 1;
+		/* fall through */
+	case OPCODE_DP3:
+		pairinst->NeedRGB = 1;
+		break;
+	case OPCODE_KIL:
+	case OPCODE_TEX:
+	case OPCODE_TXB:
+	case OPCODE_TXP:
+	case OPCODE_END:
+		pairinst->IsTex = 1;
+		break;
+	default:
+		error("Unknown opcode %d\n", inst->Opcode);
+		break;
+	}
+}
+
+
+/**
+ * Count which (input, temporary) register is read and written how often,
+ * and scan the instruction stream to find dependencies.
+ */
+static void scan_instructions(struct pair_state *s)
+{
+	struct prog_instruction *inst;
+	struct pair_state_instruction *pairinst;
+	GLuint ip;
+
+	for(inst = s->Program->Instructions, pairinst = s->Instructions, ip = 0;
+	    inst->Opcode != OPCODE_END;
+	    ++inst, ++pairinst, ++ip) {
+		final_rewrite(s, inst);
+		classify_instruction(s, inst, pairinst);
+
+		int nsrc = _mesa_num_inst_src_regs(inst->Opcode);
+		int j;
+		for(j = 0; j < nsrc; j++) {
+			struct pair_register_translation *t =
+				get_register(s, inst->SrcReg[j].File, inst->SrcReg[j].Index);
+			if (!t)
+				continue;
+
+			t->RefCount++;
+
+			if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) {
+				int i;
+				for(i = 0; i < 4; ++i) {
+					GLuint swz = GET_SWZ(inst->SrcReg[j].Swizzle, i);
+					if (swz >= 4)
+						continue; /* constant or NIL swizzle */
+					if (!t->Value[swz])
+						continue; /* this is an undefined read */
+
+					/* Do not add a dependency if this instruction
+					 * also rewrites the value. The code below adds
+					 * a dependency for the DstReg, which is a superset
+					 * of the SrcReg dependency. */
+					if (inst->DstReg.File == PROGRAM_TEMPORARY &&
+					    inst->DstReg.Index == inst->SrcReg[j].Index &&
+					    GET_BIT(inst->DstReg.WriteMask, swz))
+						continue;
+
+					struct reg_value_reader* r = &s->ReaderPool[s->ReaderPoolUsed++];
+					pairinst->NumDependencies++;
+					t->Value[swz]->NumReaders++;
+					r->IP = ip;
+					r->Next = t->Value[swz]->Readers;
+					t->Value[swz]->Readers = r;
+				}
+			}
+		}
+
+		int ndst = _mesa_num_inst_dst_regs(inst->Opcode);
+		if (ndst) {
+			struct pair_register_translation *t =
+				get_register(s, inst->DstReg.File, inst->DstReg.Index);
+			if (t) {
+				t->RefCount++;
+
+				if (inst->DstReg.File == PROGRAM_TEMPORARY) {
+					int j;
+					for(j = 0; j < 4; ++j) {
+						if (!GET_BIT(inst->DstReg.WriteMask, j))
+							continue;
+
+						struct reg_value* v = &s->ValuePool[s->ValuePoolUsed++];
+						v->IP = ip;
+						if (t->Value[j]) {
+							pairinst->NumDependencies++;
+							t->Value[j]->Next = v;
+						}
+						t->Value[j] = v;
+						pairinst->Values[j] = v;
+					}
+				}
+			}
+		}
+
+		if (s->Verbose)
+			_mesa_printf("scan(%i): NumDeps = %i\n", ip, pairinst->NumDependencies);
+
+		if (!pairinst->NumDependencies)
+			instruction_ready(s, ip);
+	}
+
+	/* Clear the PROGRAM_TEMPORARY state */
+	int i, j;
+	for(i = 0; i < MAX_PROGRAM_TEMPS; ++i) {
+		for(j = 0; j < 4; ++j)
+			s->Temps[i].Value[j] = 0;
+	}
+}
+
+
+/**
+ * Reserve hardware temporary registers for the program inputs.
+ *
+ * @note This allocation is performed explicitly, because the order of inputs
+ * is determined by the RS hardware.
+ */
+static void allocate_input_registers(struct pair_state *s)
+{
+	GLuint InputsRead = s->Program->InputsRead;
+	int i;
+	GLuint hwindex = 0;
+
+	/* Texcoords come first */
+	for (i = 0; i < s->Ctx->Const.MaxTextureUnits; i++) {
+		if (InputsRead & (FRAG_BIT_TEX0 << i))
+			alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_TEX0+i, hwindex++);
+	}
+	InputsRead &= ~FRAG_BITS_TEX_ANY;
+
+	/* fragment position treated as a texcoord */
+	if (InputsRead & FRAG_BIT_WPOS)
+		alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, hwindex++);
+	InputsRead &= ~FRAG_BIT_WPOS;
+
+	/* Then primary colour */
+	if (InputsRead & FRAG_BIT_COL0)
+		alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL0, hwindex++);
+	InputsRead &= ~FRAG_BIT_COL0;
+
+	/* Secondary color */
+	if (InputsRead & FRAG_BIT_COL1)
+		alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL1, hwindex++);
+	InputsRead &= ~FRAG_BIT_COL1;
+
+	/* Anything else */
+	if (InputsRead)
+		error("Don't know how to handle inputs 0x%x\n", InputsRead);
+}
+
+
+static void decrement_dependencies(struct pair_state *s, int ip)
+{
+	struct pair_state_instruction *pairinst = s->Instructions + ip;
+	ASSERT(pairinst->NumDependencies > 0);
+	if (!--pairinst->NumDependencies)
+		instruction_ready(s, ip);
+}
+
+/**
+ * Update the dependency tracking state based on what the instruction
+ * at the given IP does.
+ */
+static void commit_instruction(struct pair_state *s, int ip)
+{
+	struct prog_instruction *inst = s->Program->Instructions + ip;
+	struct pair_state_instruction *pairinst = s->Instructions + ip;
+
+	if (s->Verbose)
+		_mesa_printf("commit_instruction(%i)\n", ip);
+
+	if (inst->DstReg.File == PROGRAM_TEMPORARY) {
+		struct pair_register_translation *t = &s->Temps[inst->DstReg.Index];
+		deref_hw_reg(s, t->HwIndex);
+
+		int i;
+		for(i = 0; i < 4; ++i) {
+			if (!GET_BIT(inst->DstReg.WriteMask, i))
+				continue;
+
+			t->Value[i] = pairinst->Values[i];
+			if (t->Value[i]->NumReaders) {
+				struct reg_value_reader *r;
+				for(r = pairinst->Values[i]->Readers; r; r = r->Next)
+					decrement_dependencies(s, r->IP);
+			} else if (t->Value[i]->Next) {
+				/* This happens when the only reader writes
+				 * the register at the same time */
+				decrement_dependencies(s, t->Value[i]->Next->IP);
+			}
+		}
+	}
+
+	int nsrc = _mesa_num_inst_src_regs(inst->Opcode);
+	int i;
+	for(i = 0; i < nsrc; i++) {
+		struct pair_register_translation *t = get_register(s, inst->SrcReg[i].File, inst->SrcReg[i].Index);
+		if (!t)
+			continue;
+
+		deref_hw_reg(s, get_hw_reg(s, inst->SrcReg[i].File, inst->SrcReg[i].Index));
+
+		if (inst->SrcReg[i].File != PROGRAM_TEMPORARY)
+			continue;
+
+		int j;
+		for(j = 0; j < 4; ++j) {
+			GLuint swz = GET_SWZ(inst->SrcReg[i].Swizzle, j);
+			if (swz >= 4)
+				continue;
+			if (!t->Value[swz])
+				continue;
+
+			/* Do not free a dependency if this instruction
+			 * also rewrites the value. See scan_instructions. */
+			if (inst->DstReg.File == PROGRAM_TEMPORARY &&
+			    inst->DstReg.Index == inst->SrcReg[i].Index &&
+			    GET_BIT(inst->DstReg.WriteMask, swz))
+				continue;
+
+			if (!--t->Value[swz]->NumReaders) {
+				if (t->Value[swz]->Next)
+					decrement_dependencies(s, t->Value[swz]->Next->IP);
+			}
+		}
+	}
+}
+
+
+/**
+ * Emit all ready texture instructions in a single block.
+ *
+ * Emit as a single block to (hopefully) sample many textures in parallel,
+ * and to avoid hardware indirections on R300.
+ *
+ * In R500, we don't really know when the result of a texture instruction
+ * arrives. So allocate all destinations first, to make sure they do not
+ * arrive early and overwrite a texture coordinate we're going to use later
+ * in the block.
+ */
+static void emit_all_tex(struct pair_state *s)
+{
+	struct pair_state_instruction *readytex;
+	struct pair_state_instruction *pairinst;
+
+	ASSERT(s->ReadyTEX);
+
+	// Don't let the ready list change under us!
+	readytex = s->ReadyTEX;
+	s->ReadyTEX = 0;
+
+	// Allocate destination hardware registers in one block to avoid conflicts.
+	for(pairinst = readytex; pairinst; pairinst = pairinst->NextReady) {
+		int ip = pairinst - s->Instructions;
+		struct prog_instruction *inst = s->Program->Instructions + ip;
+		if (inst->Opcode != OPCODE_KIL)
+			get_hw_reg(s, inst->DstReg.File, inst->DstReg.Index);
+	}
+
+	if (s->Debug)
+		_mesa_printf(" BEGIN_TEX\n");
+
+	if (s->Handler->BeginTexBlock)
+		s->Error = s->Error || !s->Handler->BeginTexBlock(s->UserData);
+
+	for(pairinst = readytex; pairinst; pairinst = pairinst->NextReady) {
+		int ip = pairinst - s->Instructions;
+		struct prog_instruction *inst = s->Program->Instructions + ip;
+		commit_instruction(s, ip);
+
+		if (inst->Opcode != OPCODE_KIL)
+			inst->DstReg.Index = get_hw_reg(s, inst->DstReg.File, inst->DstReg.Index);
+		inst->SrcReg[0].Index = get_hw_reg(s, inst->SrcReg[0].File, inst->SrcReg[0].Index);
+
+		if (s->Debug) {
+			_mesa_printf("   ");
+			_mesa_print_instruction(inst);
+		}
+		s->Error = s->Error || !s->Handler->EmitTex(s->UserData, inst);
+	}
+
+	if (s->Debug)
+		_mesa_printf(" END_TEX\n");
+}
+
+
+static int alloc_pair_source(struct pair_state *s, struct radeon_pair_instruction *pair,
+	struct prog_src_register src, GLboolean rgb, GLboolean alpha)
+{
+	int candidate = -1;
+	int candidate_quality = -1;
+	int i;
+
+	if (!rgb && !alpha)
+		return 0;
+
+	GLuint constant;
+	GLuint index;
+
+	if (src.File == PROGRAM_TEMPORARY || src.File == PROGRAM_INPUT) {
+		constant = 0;
+		index = get_hw_reg(s, src.File, src.Index);
+	} else {
+		constant = 1;
+		s->Error |= !s->Handler->EmitConst(s->UserData, src.File, src.Index, &index);
+	}
+
+	for(i = 0; i < 3; ++i) {
+		int q = 0;
+		if (rgb) {
+			if (pair->RGB.Src[i].Used) {
+				if (pair->RGB.Src[i].Constant != constant ||
+				    pair->RGB.Src[i].Index != index)
+					continue;
+				q++;
+			}
+		}
+		if (alpha) {
+			if (pair->Alpha.Src[i].Used) {
+				if (pair->Alpha.Src[i].Constant != constant ||
+				    pair->Alpha.Src[i].Index != index)
+					continue;
+				q++;
+			}
+		}
+		if (q > candidate_quality) {
+			candidate_quality = q;
+			candidate = i;
+		}
+	}
+
+	if (candidate >= 0) {
+		if (rgb) {
+			pair->RGB.Src[candidate].Used = 1;
+			pair->RGB.Src[candidate].Constant = constant;
+			pair->RGB.Src[candidate].Index = index;
+		}
+		if (alpha) {
+			pair->Alpha.Src[candidate].Used = 1;
+			pair->Alpha.Src[candidate].Constant = constant;
+			pair->Alpha.Src[candidate].Index = index;
+		}
+	}
+
+	return candidate;
+}
+
+/**
+ * Fill the given ALU instruction's opcodes and source operands into the given pair,
+ * if possible.
+ */
+static GLboolean fill_instruction_into_pair(struct pair_state *s, struct radeon_pair_instruction *pair, int ip)
+{
+	struct pair_state_instruction *pairinst = s->Instructions + ip;
+	struct prog_instruction *inst = s->Program->Instructions + ip;
+
+	ASSERT(!pairinst->NeedRGB || pair->RGB.Opcode == OPCODE_NOP);
+	ASSERT(!pairinst->NeedAlpha || pair->Alpha.Opcode == OPCODE_NOP);
+
+	if (pairinst->NeedRGB) {
+		if (pairinst->IsTranscendent)
+			pair->RGB.Opcode = OPCODE_REPL_ALPHA;
+		else
+			pair->RGB.Opcode = inst->Opcode;
+		if (inst->SaturateMode == SATURATE_ZERO_ONE)
+			pair->RGB.Saturate = 1;
+	}
+	if (pairinst->NeedAlpha) {
+		pair->Alpha.Opcode = inst->Opcode;
+		if (inst->SaturateMode == SATURATE_ZERO_ONE)
+			pair->Alpha.Saturate = 1;
+	}
+
+	int nargs = _mesa_num_inst_src_regs(inst->Opcode);
+	int i;
+
+	/* Special case for DDX/DDY (MDH/MDV). */
+	if (inst->Opcode == OPCODE_DDX || inst->Opcode == OPCODE_DDY) {
+		if (pair->RGB.Src[0].Used || pair->Alpha.Src[0].Used)
+			return GL_FALSE;
+		else
+			nargs++;
+	}
+
+	for(i = 0; i < nargs; ++i) {
+		int source;
+		if (pairinst->NeedRGB && !pairinst->IsTranscendent) {
+			GLboolean srcrgb = GL_FALSE;
+			GLboolean srcalpha = GL_FALSE;
+			GLuint negatebase = 0;
+			int j;
+			for(j = 0; j < 3; ++j) {
+				GLuint swz = GET_SWZ(inst->SrcReg[i].Swizzle, j);
+				if (swz < 3)
+					srcrgb = GL_TRUE;
+				else if (swz < 4)
+					srcalpha = GL_TRUE;
+				if (swz != SWIZZLE_NIL && GET_BIT(inst->SrcReg[i].NegateBase, j))
+					negatebase = 1;
+			}
+			source = alloc_pair_source(s, pair, inst->SrcReg[i], srcrgb, srcalpha);
+			if (source < 0)
+				return GL_FALSE;
+			pair->RGB.Arg[i].Source = source;
+			pair->RGB.Arg[i].Swizzle = inst->SrcReg[i].Swizzle & 0x1ff;
+			pair->RGB.Arg[i].Abs = inst->SrcReg[i].Abs;
+			pair->RGB.Arg[i].Negate = (negatebase & ~pair->RGB.Arg[i].Abs) ^ inst->SrcReg[i].NegateAbs;
+		}
+		if (pairinst->NeedAlpha) {
+			GLboolean srcrgb = GL_FALSE;
+			GLboolean srcalpha = GL_FALSE;
+			GLuint negatebase = GET_BIT(inst->SrcReg[i].NegateBase, pairinst->IsTranscendent ? 0 : 3);
+			GLuint swz = GET_SWZ(inst->SrcReg[i].Swizzle, pairinst->IsTranscendent ? 0 : 3);
+			if (swz < 3)
+				srcrgb = GL_TRUE;
+			else if (swz < 4)
+				srcalpha = GL_TRUE;
+			source = alloc_pair_source(s, pair, inst->SrcReg[i], srcrgb, srcalpha);
+			if (source < 0)
+				return GL_FALSE;
+			pair->Alpha.Arg[i].Source = source;
+			pair->Alpha.Arg[i].Swizzle = swz;
+			pair->Alpha.Arg[i].Abs = inst->SrcReg[i].Abs;
+			pair->Alpha.Arg[i].Negate = (negatebase & ~pair->RGB.Arg[i].Abs) ^ inst->SrcReg[i].NegateAbs;
+		}
+	}
+
+	return GL_TRUE;
+}
+
+
+/**
+ * Fill in the destination register information.
+ *
+ * This is split from filling in source registers because we want
+ * to avoid allocating hardware temporaries for destinations until
+ * we are absolutely certain that we're going to emit a certain
+ * instruction pairing.
+ */
+static void fill_dest_into_pair(struct pair_state *s, struct radeon_pair_instruction *pair, int ip)
+{
+	struct pair_state_instruction *pairinst = s->Instructions + ip;
+	struct prog_instruction *inst = s->Program->Instructions + ip;
+
+	if (inst->DstReg.File == PROGRAM_OUTPUT) {
+		if (inst->DstReg.Index == FRAG_RESULT_COLR) {
+			pair->RGB.OutputWriteMask |= inst->DstReg.WriteMask & WRITEMASK_XYZ;
+			pair->Alpha.OutputWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
+		} else if (inst->DstReg.Index == FRAG_RESULT_DEPR) {
+			pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
+		}
+	} else {
+		GLuint hwindex = get_hw_reg(s, inst->DstReg.File, inst->DstReg.Index);
+		if (pairinst->NeedRGB) {
+			pair->RGB.DestIndex = hwindex;
+			pair->RGB.WriteMask |= inst->DstReg.WriteMask & WRITEMASK_XYZ;
+		}
+		if (pairinst->NeedAlpha) {
+			pair->Alpha.DestIndex = hwindex;
+			pair->Alpha.WriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
+		}
+	}
+}
+
+
+/**
+ * Find a good ALU instruction or pair of ALU instruction and emit it.
+ *
+ * Prefer emitting full ALU instructions, so that when we reach a point
+ * where no full ALU instruction can be emitted, we have more candidates
+ * for RGB/Alpha pairing.
+ */
+static void emit_alu(struct pair_state *s)
+{
+	struct radeon_pair_instruction pair;
+
+	if (s->ReadyFullALU || !(s->ReadyRGB && s->ReadyAlpha)) {
+		int ip;
+		if (s->ReadyFullALU) {
+			ip = s->ReadyFullALU - s->Instructions;
+			s->ReadyFullALU = s->ReadyFullALU->NextReady;
+		} else if (s->ReadyRGB) {
+			ip = s->ReadyRGB - s->Instructions;
+			s->ReadyRGB = s->ReadyRGB->NextReady;
+		} else {
+			ip = s->ReadyAlpha - s->Instructions;
+			s->ReadyAlpha = s->ReadyAlpha->NextReady;
+		}
+
+		_mesa_bzero(&pair, sizeof(pair));
+		fill_instruction_into_pair(s, &pair, ip);
+		fill_dest_into_pair(s, &pair, ip);
+		commit_instruction(s, ip);
+	} else {
+		struct pair_state_instruction **prgb;
+		struct pair_state_instruction **palpha;
+
+		/* Some pairings might fail because they require too
+		 * many source slots; try all possible pairings if necessary */
+		for(prgb = &s->ReadyRGB; *prgb; prgb = &(*prgb)->NextReady) {
+			for(palpha = &s->ReadyAlpha; *palpha; palpha = &(*palpha)->NextReady) {
+				int rgbip = *prgb - s->Instructions;
+				int alphaip = *palpha - s->Instructions;
+				_mesa_bzero(&pair, sizeof(pair));
+				fill_instruction_into_pair(s, &pair, rgbip);
+				if (!fill_instruction_into_pair(s, &pair, alphaip))
+					continue;
+				*prgb = (*prgb)->NextReady;
+				*palpha = (*palpha)->NextReady;
+				fill_dest_into_pair(s, &pair, rgbip);
+				fill_dest_into_pair(s, &pair, alphaip);
+				commit_instruction(s, rgbip);
+				commit_instruction(s, alphaip);
+				goto success;
+			}
+		}
+
+		/* No success in pairing; just take the first RGB instruction */
+		int ip = s->ReadyRGB - s->Instructions;
+		s->ReadyRGB = s->ReadyRGB->NextReady;
+		_mesa_bzero(&pair, sizeof(pair));
+		fill_instruction_into_pair(s, &pair, ip);
+		fill_dest_into_pair(s, &pair, ip);
+		commit_instruction(s, ip);
+	success: ;
+	}
+
+	if (s->Debug)
+		radeonPrintPairInstruction(&pair);
+
+	s->Error = s->Error || !s->Handler->EmitPaired(s->UserData, &pair);
+}
+
+
+GLboolean radeonPairProgram(GLcontext *ctx, struct gl_program *program,
+	const struct radeon_pair_handler* handler, void *userdata)
+{
+	struct pair_state s;
+
+	_mesa_bzero(&s, sizeof(s));
+	s.Ctx = ctx;
+	s.Program = program;
+	s.Handler = handler;
+	s.UserData = userdata;
+	s.Debug = (RADEON_DEBUG & DEBUG_PIXEL) ? GL_TRUE : GL_FALSE;
+	s.Verbose = GL_FALSE && s.Debug;
+
+	s.Instructions = (struct pair_state_instruction*)_mesa_calloc(
+		sizeof(struct pair_state_instruction)*s.Program->NumInstructions);
+	s.ValuePool = (struct reg_value*)_mesa_calloc(sizeof(struct reg_value)*s.Program->NumInstructions*4);
+	s.ReaderPool = (struct reg_value_reader*)_mesa_calloc(
+		sizeof(struct reg_value_reader)*s.Program->NumInstructions*12);
+
+	if (s.Debug)
+		_mesa_printf("Emit paired program\n");
+
+	scan_instructions(&s);
+	allocate_input_registers(&s);
+
+	while(!s.Error &&
+	      (s.ReadyTEX || s.ReadyRGB || s.ReadyAlpha || s.ReadyFullALU)) {
+		if (s.ReadyTEX)
+			emit_all_tex(&s);
+
+		while(s.ReadyFullALU || s.ReadyRGB || s.ReadyAlpha)
+			emit_alu(&s);
+	}
+
+	if (s.Debug)
+		_mesa_printf(" END\n");
+
+	_mesa_free(s.Instructions);
+	_mesa_free(s.ValuePool);
+	_mesa_free(s.ReaderPool);
+
+	return !s.Error;
+}
+
+
+static void print_pair_src(int i, struct radeon_pair_instruction_source* src)
+{
+	_mesa_printf("  Src%i = %s[%i]", i, src->Constant ? "CNST" : "TEMP", src->Index);
+}
+
+static const char* opcode_string(GLuint opcode)
+{
+	if (opcode == OPCODE_REPL_ALPHA)
+		return "SOP";
+	else
+		return _mesa_opcode_string(opcode);
+}
+
+static int num_pairinst_args(GLuint opcode)
+{
+	if (opcode == OPCODE_REPL_ALPHA)
+		return 0;
+	else
+		return _mesa_num_inst_src_regs(opcode);
+}
+
+static char swizzle_char(GLuint swz)
+{
+	switch(swz) {
+	case SWIZZLE_X: return 'x';
+	case SWIZZLE_Y: return 'y';
+	case SWIZZLE_Z: return 'z';
+	case SWIZZLE_W: return 'w';
+	case SWIZZLE_ZERO: return '0';
+	case SWIZZLE_ONE: return '1';
+	case SWIZZLE_NIL: return '_';
+	default: return '?';
+	}
+}
+
+void radeonPrintPairInstruction(struct radeon_pair_instruction *inst)
+{
+	int nargs;
+	int i;
+
+	_mesa_printf("       RGB:  ");
+	for(i = 0; i < 3; ++i) {
+		if (inst->RGB.Src[i].Used)
+			print_pair_src(i, inst->RGB.Src + i);
+	}
+	_mesa_printf("\n");
+	_mesa_printf("       Alpha:");
+	for(i = 0; i < 3; ++i) {
+		if (inst->Alpha.Src[i].Used)
+			print_pair_src(i, inst->Alpha.Src + i);
+	}
+	_mesa_printf("\n");
+
+	_mesa_printf("  %s%s", opcode_string(inst->RGB.Opcode), inst->RGB.Saturate ? "_SAT" : "");
+	if (inst->RGB.WriteMask)
+		_mesa_printf(" TEMP[%i].%s%s%s", inst->RGB.DestIndex,
+			(inst->RGB.WriteMask & 1) ? "x" : "",
+			(inst->RGB.WriteMask & 2) ? "y" : "",
+			(inst->RGB.WriteMask & 4) ? "z" : "");
+	if (inst->RGB.OutputWriteMask)
+		_mesa_printf(" COLOR.%s%s%s",
+			(inst->RGB.OutputWriteMask & 1) ? "x" : "",
+			(inst->RGB.OutputWriteMask & 2) ? "y" : "",
+			(inst->RGB.OutputWriteMask & 4) ? "z" : "");
+	nargs = num_pairinst_args(inst->RGB.Opcode);
+	for(i = 0; i < nargs; ++i) {
+		const char* abs = inst->RGB.Arg[i].Abs ? "|" : "";
+		const char* neg = inst->RGB.Arg[i].Negate ? "-" : "";
+		_mesa_printf(", %s%sSrc%i.%c%c%c%s", neg, abs, inst->RGB.Arg[i].Source,
+			swizzle_char(GET_SWZ(inst->RGB.Arg[i].Swizzle, 0)),
+			swizzle_char(GET_SWZ(inst->RGB.Arg[i].Swizzle, 1)),
+			swizzle_char(GET_SWZ(inst->RGB.Arg[i].Swizzle, 2)),
+			abs);
+	}
+	_mesa_printf("\n");
+
+	_mesa_printf("  %s%s", opcode_string(inst->Alpha.Opcode), inst->Alpha.Saturate ? "_SAT" : "");
+	if (inst->Alpha.WriteMask)
+		_mesa_printf(" TEMP[%i].w", inst->Alpha.DestIndex);
+	if (inst->Alpha.OutputWriteMask)
+		_mesa_printf(" COLOR.w");
+	if (inst->Alpha.DepthWriteMask)
+		_mesa_printf(" DEPTH.w");
+	nargs = num_pairinst_args(inst->Alpha.Opcode);
+	for(i = 0; i < nargs; ++i) {
+		const char* abs = inst->Alpha.Arg[i].Abs ? "|" : "";
+		const char* neg = inst->Alpha.Arg[i].Negate ? "-" : "";
+		_mesa_printf(", %s%sSrc%i.%c%s", neg, abs, inst->Alpha.Arg[i].Source,
+			swizzle_char(inst->Alpha.Arg[i].Swizzle), abs);
+	}
+	_mesa_printf("\n");
+}
diff --git a/src/mesa/drivers/dri/r300/radeon_program_pair.h b/src/mesa/drivers/dri/r300/radeon_program_pair.h
new file mode 100644
index 00000000000..4624a246298
--- /dev/null
+++ b/src/mesa/drivers/dri/r300/radeon_program_pair.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2008 Nicolai Haehnle.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __RADEON_PROGRAM_PAIR_H_
+#define __RADEON_PROGRAM_PAIR_H_
+
+#include "radeon_program.h"
+
+
+/**
+ * Represents a paired instruction, as found in R300 and R500
+ * fragment programs.
+ */
+struct radeon_pair_instruction_source {
+	GLuint Index:8;
+	GLuint Constant:1;
+	GLuint Used:1;
+};
+
+struct radeon_pair_instruction_rgb {
+	GLuint Opcode:8;
+	GLuint DestIndex:8;
+	GLuint WriteMask:3;
+	GLuint OutputWriteMask:3;
+	GLuint Saturate:1;
+
+	struct radeon_pair_instruction_source Src[3];
+
+	struct {
+		GLuint Source:2;
+		GLuint Swizzle:9;
+		GLuint Abs:1;
+		GLuint Negate:1;
+	} Arg[3];
+};
+
+struct radeon_pair_instruction_alpha {
+	GLuint Opcode:8;
+	GLuint DestIndex:8;
+	GLuint WriteMask:1;
+	GLuint OutputWriteMask:1;
+	GLuint DepthWriteMask:1;
+	GLuint Saturate:1;
+
+	struct radeon_pair_instruction_source Src[3];
+
+	struct {
+		GLuint Source:2;
+		GLuint Swizzle:3;
+		GLuint Abs:1;
+		GLuint Negate:1;
+	} Arg[3];
+};
+
+struct radeon_pair_instruction {
+	struct radeon_pair_instruction_rgb RGB;
+	struct radeon_pair_instruction_alpha Alpha;
+};
+
+
+/**
+ *
+ */
+struct radeon_pair_handler {
+	/**
+	 * Fill in the proper hardware index for the given constant register.
+	 *
+	 * @return GL_FALSE on error.
+	 */
+	GLboolean (*EmitConst)(void*, GLuint file, GLuint index, GLuint *hwindex);
+
+	/**
+	 * Write a paired instruction to the hardware.
+	 *
+	 * @return GL_FALSE on error.
+	 */
+	GLboolean (*EmitPaired)(void*, struct radeon_pair_instruction*);
+
+	/**
+	 * Write a texture instruction to the hardware.
+	 * Register indices have already been rewritten to the allocated
+	 * hardware register numbers.
+	 *
+	 * @return GL_FALSE on error.
+	 */
+	GLboolean (*EmitTex)(void*, struct prog_instruction*);
+
+	/**
+	 * Called before a block of contiguous, independent texture
+	 * instructions is emitted.
+	 */
+	GLboolean (*BeginTexBlock)(void*);
+
+	GLuint MaxHwTemps;
+};
+
+GLboolean radeonPairProgram(GLcontext *ctx, struct gl_program *program,
+	const struct radeon_pair_handler*, void *userdata);
+
+void radeonPrintPairInstruction(struct radeon_pair_instruction *inst);
+
+#endif /* __RADEON_PROGRAM_PAIR_H_ */
diff --git a/src/mesa/drivers/dri/r300/radeon_span.c b/src/mesa/drivers/dri/r300/radeon_span.c
index eae09d6b35e..16f9fb99e67 100644
--- a/src/mesa/drivers/dri/r300/radeon_span.c
+++ b/src/mesa/drivers/dri/r300/radeon_span.c
@@ -40,7 +40,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "swrast/swrast.h"
 
 #include "r300_state.h"
@@ -172,6 +172,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y)
 
 /* 16-bit depth buffer functions
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )					\
    *(GLushort *)(buf + radeon_mba_z16( drb, _x + xo, _y + yo )) = d;
 
@@ -186,6 +188,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y)
  * Careful: It looks like the R300 uses ZZZS byte order while the R200
  * uses SZZZ for 24 bit depth, 8 bit stencil mode.
  */
+#define VALUE_TYPE GLuint
+
 #ifdef COMPILE_R300
 #define WRITE_DEPTH( _x, _y, d )					\
 do {									\
@@ -282,6 +286,30 @@ static void radeonSpanRenderStart(GLcontext * ctx)
 #endif
 	LOCK_HARDWARE(rmesa);
 	radeonWaitForIdleLocked(rmesa);
+
+	/* Read the first pixel in the frame buffer.  This should
+	 * be a noop, right?  In fact without this conform fails as reading
+	 * from the framebuffer sometimes produces old results -- the
+	 * on-card read cache gets mixed up and doesn't notice that the
+	 * framebuffer has been updated.
+	 *
+	 * Note that we should probably be reading some otherwise unused
+	 * region of VRAM, otherwise we might get incorrect results when
+	 * reading pixels from the top left of the screen.
+	 *
+	 * I found this problem on an R420 with glean's texCube test.
+	 * Note that the R200 span code also *writes* the first pixel in the
+	 * framebuffer, but I've found this to be unnecessary.
+	 *  -- Nicolai Hähnle, June 2008
+	 */
+	{
+		int p;
+		driRenderbuffer *drb =
+			(driRenderbuffer *) ctx->WinSysDrawBuffer->_ColorDrawBuffers[0];
+		volatile int *buf =
+			(volatile int *)(rmesa->dri.screen->pFB + drb->offset);
+		p = *buf;
+	}
 }
 
 static void radeonSpanRenderFinish(GLcontext * ctx)
diff --git a/src/mesa/drivers/dri/r300/radeon_state.c b/src/mesa/drivers/dri/r300/radeon_state.c
index 82bfd951b92..c401da6c544 100644
--- a/src/mesa/drivers/dri/r300/radeon_state.c
+++ b/src/mesa/drivers/dri/r300/radeon_state.c
@@ -33,12 +33,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "api_arrayelt.h"
-#include "enums.h"
-#include "colormac.h"
-#include "light.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/api_arrayelt.h"
+#include "main/enums.h"
+#include "main/framebuffer.h"
+#include "main/colormac.h"
+#include "main/light.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
@@ -49,7 +50,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_ioctl.h"
 #include "radeon_state.h"
 #include "r300_ioctl.h"
-#include "framebuffer.h"
+
 
 /* =============================================================
  * Scissoring
@@ -125,8 +126,8 @@ void radeonUpdateScissor(GLcontext* ctx)
 
 		radeon->state.scissor.rect.x1 = x1;
 		radeon->state.scissor.rect.y1 = y1;
-		radeon->state.scissor.rect.x2 = x1 + ctx->Scissor.Width - 1;
-		radeon->state.scissor.rect.y2 = y1 + ctx->Scissor.Height - 1;
+		radeon->state.scissor.rect.x2 = x1 + ctx->Scissor.Width;
+		radeon->state.scissor.rect.y2 = y1 + ctx->Scissor.Height;
 
 		radeonRecalcScissorRects(radeon);
 	}
@@ -152,7 +153,7 @@ void radeonSetCliprects(radeonContextPtr radeon)
 	GLframebuffer *const draw_fb = (GLframebuffer*)drawable->driverPrivate;
 	GLframebuffer *const read_fb = (GLframebuffer*)readable->driverPrivate;
 
-	if (draw_fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) {
+	if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
 		/* Can't ignore 2d windows if we are page flipping. */
 		if (drawable->numBackClipRects == 0 || radeon->doPageFlip ||
 		    radeon->sarea->pfCurrentPage == 1) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h
index 7318099093a..55a73eab209 100644
--- a/src/mesa/drivers/dri/radeon/radeon_chipset.h
+++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h
@@ -106,6 +106,7 @@
 #define PCI_CHIP_RV410_564F		0x564F
 #define PCI_CHIP_RV410_5652		0x5652
 #define PCI_CHIP_RV410_5653		0x5653
+#define PCI_CHIP_RV410_5657		0x5657
 #define PCI_CHIP_RS300_5834		0x5834
 #define PCI_CHIP_RS300_5835		0x5835
 #define PCI_CHIP_RS480_5954		0x5954
@@ -145,8 +146,112 @@
 #define PCI_CHIP_RV410_5E4C		0x5E4C
 #define PCI_CHIP_RV410_5E4D		0x5E4D
 #define PCI_CHIP_RV410_5E4F		0x5E4F
+
+#define PCI_CHIP_R520_7100              0x7100
+#define PCI_CHIP_R520_7101              0x7101
+#define PCI_CHIP_R520_7102              0x7102
+#define PCI_CHIP_R520_7103              0x7103
+#define PCI_CHIP_R520_7104              0x7104
+#define PCI_CHIP_R520_7105              0x7105
+#define PCI_CHIP_R520_7106              0x7106
+#define PCI_CHIP_R520_7108              0x7108
+#define PCI_CHIP_R520_7109              0x7109
+#define PCI_CHIP_R520_710A              0x710A
+#define PCI_CHIP_R520_710B              0x710B
+#define PCI_CHIP_R520_710C              0x710C
+#define PCI_CHIP_R520_710E              0x710E
+#define PCI_CHIP_R520_710F              0x710F
+#define PCI_CHIP_RV515_7140             0x7140
+#define PCI_CHIP_RV515_7141             0x7141
+#define PCI_CHIP_RV515_7142             0x7142
+#define PCI_CHIP_RV515_7143             0x7143
+#define PCI_CHIP_RV515_7144             0x7144
+#define PCI_CHIP_RV515_7145             0x7145
+#define PCI_CHIP_RV515_7146             0x7146
+#define PCI_CHIP_RV515_7147             0x7147
+#define PCI_CHIP_RV515_7149             0x7149
+#define PCI_CHIP_RV515_714A             0x714A
+#define PCI_CHIP_RV515_714B             0x714B
+#define PCI_CHIP_RV515_714C             0x714C
+#define PCI_CHIP_RV515_714D             0x714D
+#define PCI_CHIP_RV515_714E             0x714E
+#define PCI_CHIP_RV515_714F             0x714F
+#define PCI_CHIP_RV515_7151             0x7151
+#define PCI_CHIP_RV515_7152             0x7152
+#define PCI_CHIP_RV515_7153             0x7153
+#define PCI_CHIP_RV515_715E             0x715E
+#define PCI_CHIP_RV515_715F             0x715F
+#define PCI_CHIP_RV515_7180             0x7180
+#define PCI_CHIP_RV515_7181             0x7181
+#define PCI_CHIP_RV515_7183             0x7183
+#define PCI_CHIP_RV515_7186             0x7186
+#define PCI_CHIP_RV515_7187             0x7187
+#define PCI_CHIP_RV515_7188             0x7188
+#define PCI_CHIP_RV515_718A             0x718A
+#define PCI_CHIP_RV515_718B             0x718B
+#define PCI_CHIP_RV515_718C             0x718C
+#define PCI_CHIP_RV515_718D             0x718D
+#define PCI_CHIP_RV515_718F             0x718F
+#define PCI_CHIP_RV515_7193             0x7193
+#define PCI_CHIP_RV515_7196             0x7196
+#define PCI_CHIP_RV515_719B             0x719B
+#define PCI_CHIP_RV515_719F             0x719F
+#define PCI_CHIP_RV530_71C0             0x71C0
+#define PCI_CHIP_RV530_71C1             0x71C1
+#define PCI_CHIP_RV530_71C2             0x71C2
+#define PCI_CHIP_RV530_71C3             0x71C3
+#define PCI_CHIP_RV530_71C4             0x71C4
+#define PCI_CHIP_RV530_71C5             0x71C5
+#define PCI_CHIP_RV530_71C6             0x71C6
+#define PCI_CHIP_RV530_71C7             0x71C7
+#define PCI_CHIP_RV530_71CD             0x71CD
+#define PCI_CHIP_RV530_71CE             0x71CE
+#define PCI_CHIP_RV530_71D2             0x71D2
+#define PCI_CHIP_RV530_71D4             0x71D4
+#define PCI_CHIP_RV530_71D5             0x71D5
+#define PCI_CHIP_RV530_71D6             0x71D6
+#define PCI_CHIP_RV530_71DA             0x71DA
+#define PCI_CHIP_RV530_71DE             0x71DE
+#define PCI_CHIP_RV515_7200             0x7200
+#define PCI_CHIP_RV515_7210             0x7210
+#define PCI_CHIP_RV515_7211             0x7211
+#define PCI_CHIP_R580_7240              0x7240
+#define PCI_CHIP_R580_7243              0x7243
+#define PCI_CHIP_R580_7244              0x7244
+#define PCI_CHIP_R580_7245              0x7245
+#define PCI_CHIP_R580_7246              0x7246
+#define PCI_CHIP_R580_7247              0x7247
+#define PCI_CHIP_R580_7248              0x7248
+#define PCI_CHIP_R580_7249              0x7249
+#define PCI_CHIP_R580_724A              0x724A
+#define PCI_CHIP_R580_724B              0x724B
+#define PCI_CHIP_R580_724C              0x724C
+#define PCI_CHIP_R580_724D              0x724D
+#define PCI_CHIP_R580_724E              0x724E
+#define PCI_CHIP_R580_724F              0x724F
+#define PCI_CHIP_RV570_7280             0x7280
+#define PCI_CHIP_RV560_7281             0x7281
+#define PCI_CHIP_RV560_7283             0x7283
+#define PCI_CHIP_R580_7284              0x7284
+#define PCI_CHIP_RV560_7287             0x7287
+#define PCI_CHIP_RV570_7288             0x7288
+#define PCI_CHIP_RV570_7289             0x7289
+#define PCI_CHIP_RV570_728B             0x728B
+#define PCI_CHIP_RV570_728C             0x728C
+#define PCI_CHIP_RV560_7290             0x7290
+#define PCI_CHIP_RV560_7291             0x7291
+#define PCI_CHIP_RV560_7293             0x7293
+#define PCI_CHIP_RV560_7297             0x7297
+
 #define PCI_CHIP_RS350_7834		0x7834
 #define PCI_CHIP_RS350_7835		0x7835
+#define PCI_CHIP_RS690_791E             0x791E
+#define PCI_CHIP_RS690_791F             0x791F
+#define PCI_CHIP_RS740_796C             0x796C
+#define PCI_CHIP_RS740_796D             0x796D
+#define PCI_CHIP_RS740_796E             0x796E
+#define PCI_CHIP_RS740_796F             0x796F
+
 
 enum {
    CHIP_FAMILY_R100,
@@ -165,6 +270,14 @@ enum {
    CHIP_FAMILY_R420,
    CHIP_FAMILY_RV410,
    CHIP_FAMILY_RS400,
+   CHIP_FAMILY_RS690,
+   CHIP_FAMILY_RS740,
+   CHIP_FAMILY_RV515,
+   CHIP_FAMILY_R520,
+   CHIP_FAMILY_RV530,
+   CHIP_FAMILY_R580,
+   CHIP_FAMILY_RV560,
+   CHIP_FAMILY_RV570,
    CHIP_FAMILY_LAST
 };
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_compat.c b/src/mesa/drivers/dri/radeon/radeon_compat.c
index bd467fb15b0..46b490d61f7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_compat.c
+++ b/src/mesa/drivers/dri/radeon/radeon_compat.c
@@ -32,8 +32,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-#include "glheader.h"
-#include "imports.h"
+#include "main/glheader.h"
+#include "main/imports.h"
 
 #include "radeon_context.h"
 #include "radeon_state.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index ba93a054ae2..1e992c0b3d6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -34,14 +34,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "api_arrayelt.h"
-#include "context.h"
-#include "simple_list.h"
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
-#include "framebuffer.h"
+#include "main/glheader.h"
+#include "main/api_arrayelt.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/state.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -231,14 +232,14 @@ radeonCreateContext( const __GLcontextModes *glVisual,
                                                  "def_max_anisotropy");
 
    if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
-      if ( sPriv->drmMinor < 13 )
+      if ( sPriv->drm_version.minor < 13 )
 	 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
-			  "disabling.\n",sPriv->drmMinor );
+			  "disabling.\n", sPriv->drm_version.minor );
       else
 	 rmesa->using_hyperz = GL_TRUE;
    }
 
-   if ( sPriv->drmMinor >= 15 )
+   if ( sPriv->drm_version.minor >= 15 )
       rmesa->texmicrotile = GL_TRUE;
 
    /* Init default driver functions then plug in our Radeon-specific functions
@@ -269,7 +270,7 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    rmesa->dri.hwContext = driContextPriv->hHWContext;
    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
    rmesa->dri.fd = sPriv->fd;
-   rmesa->dri.drmMinor = sPriv->drmMinor;
+   rmesa->dri.drmMinor = sPriv->drm_version.minor;
 
    rmesa->radeonScreen = screen;
    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
@@ -422,10 +423,7 @@ radeonCreateContext( const __GLcontextModes *glVisual,
 
    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 
-   rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
-       ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-
-   (*dri_interface->getUST)( & rmesa->swap_ust );
+   (*sPriv->systemTime->getUST)( & rmesa->swap_ust );
 
 
 #if DO_DEBUG
@@ -590,16 +588,18 @@ radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
       if (RADEON_DEBUG & DEBUG_DRI)
 	 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 
-      if ( newCtx->dri.drawable != driDrawPriv ) {
-         /* XXX we may need to validate the drawable here!!! */
-	 driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags,
-				&newCtx->vbl_seq );
-      }
-
       newCtx->dri.readable = driReadPriv;
 
       if ( (newCtx->dri.drawable != driDrawPriv) ||
            newCtx->lastStamp != driDrawPriv->lastStamp ) {
+	 if (driDrawPriv->swap_interval == (unsigned)-1) {
+	    driDrawPriv->vblFlags = (newCtx->radeonScreen->irq != 0)
+	       ? driGetDefaultVBlankFlags(&newCtx->optionCache)
+	       : VBLANK_FLAG_NO_IRQ;
+
+	    driDrawableInitVBlank( driDrawPriv );
+	 }
+
 	 newCtx->dri.drawable = driDrawPriv;
 
 	 radeonSetCliprects(newCtx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 8dedd66f563..53df766f8cb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -49,9 +49,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_drm.h"
 #include "texmem.h"
 
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
 
 struct radeon_context;
 typedef struct radeon_context radeonContextRec;
@@ -66,7 +66,7 @@ typedef union {
 
 #include "radeon_lock.h"
 #include "radeon_screen.h"
-#include "mm.h"
+#include "main/mm.h"
 
 #include "math/m_vector.h"
 
@@ -161,6 +161,8 @@ struct radeon_tex_obj {
 	drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 	/* Six, for the cube faces */
 
+	GLboolean image_override; /* Image overridden by GLX_EXT_tfp */
+
 	GLuint pp_txfilter;	/* hardware register values */
 	GLuint pp_txformat;
 	GLuint pp_txoffset;	/* Image location in texmem.
@@ -667,9 +669,6 @@ struct radeon_context {
 
 	/* VBI
 	 */
-	GLuint vbl_seq;
-	GLuint vblank_flags;
-
 	int64_t swap_ust;
 	int64_t swap_missed_ust;
 
@@ -708,9 +707,9 @@ struct radeon_context {
 
 #define RADEON_CONTEXT(ctx)		((radeonContextPtr)(ctx->DriverCtx))
 
-static __inline GLuint radeonPackColor(GLuint cpp,
-				       GLubyte r, GLubyte g,
-				       GLubyte b, GLubyte a)
+static INLINE GLuint radeonPackColor(GLuint cpp,
+                                     GLubyte r, GLubyte g,
+                                     GLubyte b, GLubyte a)
 {
 	switch (cpp) {
 	case 2:
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index a0c563c7cba..09acf6b4f85 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -37,9 +37,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <sched.h>
 #include <errno.h> 
 
-#include "glheader.h"
-#include "imports.h"
-#include "simple_list.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
 #include "swrast/swrast.h"
 
 #include "radeon_context.h"
@@ -862,13 +862,14 @@ static void radeonWaitForFrameCompletion( radeonContextPtr rmesa )
 
 /* Copy the back color buffer to the front color buffer.
  */
-void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv,
+void radeonCopyBuffer( __DRIdrawablePrivate *dPriv,
 		       const drm_clip_rect_t	  *rect)
 {
    radeonContextPtr rmesa;
    GLint nbox, i, ret;
    GLboolean   missed_target;
    int64_t ust;
+   __DRIscreenPrivate *psp;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -890,7 +891,7 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv,
    if (!rect)
    {
        UNLOCK_HARDWARE( rmesa );
-       driWaitForVBlank( dPriv, & rmesa->vbl_seq, rmesa->vblank_flags, & missed_target );
+       driWaitForVBlank( dPriv, & missed_target );
        LOCK_HARDWARE( rmesa );
    }
 
@@ -917,16 +918,18 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv,
 	      if (rect->y2 < b->y2)
 		  b->y2 = rect->y2;
 
-	      if (b->x1 < b->x2 && b->y1 < b->y2)
-		  b++;
+	      if (b->x1 >= b->x2 || b->y1 >= b->y2)
+		  continue;
 	  }
-	  else
-	      b++;
 
+	  b++;
 	  n++;
       }
       rmesa->sarea->nbox = n;
 
+      if (!n)
+	 continue;
+
       ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_SWAP );
 
       if ( ret ) {
@@ -939,8 +942,9 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv,
    UNLOCK_HARDWARE( rmesa );
    if (!rect)
    {
+       psp = dPriv->driScreenPriv;
        rmesa->swap_count++;
-       (*dri_interface->getUST)( & ust );
+       (*psp->systemTime->getUST)( & ust );
        if ( missed_target ) {
 	   rmesa->swap_missed_count++;
 	   rmesa->swap_missed_ust = ust - rmesa->swap_ust;
@@ -951,17 +955,19 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv,
    }
 }
 
-void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
+void radeonPageFlip( __DRIdrawablePrivate *dPriv )
 {
    radeonContextPtr rmesa;
    GLint ret;
    GLboolean   missed_target;
+   __DRIscreenPrivate *psp;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
    assert(dPriv->driContextPriv->driverPrivate);
 
    rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
+   psp = dPriv->driScreenPriv;
 
    if ( RADEON_DEBUG & DEBUG_IOCTL ) {
       fprintf(stderr, "%s: pfCurrentPage: %d\n", __FUNCTION__,
@@ -986,10 +992,10 @@ void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
     */
    radeonWaitForFrameCompletion( rmesa );
    UNLOCK_HARDWARE( rmesa );
-   driWaitForVBlank( dPriv, & rmesa->vbl_seq, rmesa->vblank_flags, & missed_target );
+   driWaitForVBlank( dPriv, & missed_target );
    if ( missed_target ) {
       rmesa->swap_missed_count++;
-      (void) (*dri_interface->getUST)( & rmesa->swap_missed_ust );
+      (void) (*psp->systemTime->getUST)( & rmesa->swap_missed_ust );
    }
    LOCK_HARDWARE( rmesa );
 
@@ -1003,7 +1009,7 @@ void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
    }
 
    rmesa->swap_count++;
-   (void) (*dri_interface->getUST)( & rmesa->swap_ust );
+   (void) (*psp->systemTime->getUST)( & rmesa->swap_ust );
 
    /* Get ready for drawing next frame.  Update the renderbuffers'
     * flippedOffset/Pitch fields so we draw into the right place.
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.h b/src/mesa/drivers/dri/radeon/radeon_ioctl.h
index 020a5c21e2d..4e3a44df075 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.h
@@ -36,7 +36,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_IOCTL_H__
 #define __RADEON_IOCTL_H__
 
-#include "simple_list.h"
+#include "main/simple_list.h"
 #include "radeon_lock.h"
 
 
@@ -86,9 +86,9 @@ extern void radeonReleaseDmaRegion( radeonContextPtr rmesa,
 				    struct radeon_dma_region *region,
 				    const char *caller );
 
-extern void radeonCopyBuffer( const __DRIdrawablePrivate *drawable,
+extern void radeonCopyBuffer( __DRIdrawablePrivate *drawable,
 			      const drm_clip_rect_t	 *rect);
-extern void radeonPageFlip( const __DRIdrawablePrivate *drawable );
+extern void radeonPageFlip( __DRIdrawablePrivate *drawable );
 extern void radeonFlush( GLcontext *ctx );
 extern void radeonFinish( GLcontext *ctx );
 extern void radeonWaitForIdleLocked( radeonContextPtr rmesa );
@@ -123,7 +123,7 @@ do {								\
    memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd,	\
 	   rmesa->hw.ATOM.cmd_size * 4)
 
-static __inline int RADEON_DB_STATECHANGE( 
+static INLINE int RADEON_DB_STATECHANGE( 
    radeonContextPtr rmesa,
    struct radeon_state_atom *atom )
 {
@@ -176,7 +176,7 @@ do {							\
  * and hang on to the lock until the critical section is finished and we flush
  * the buffer again and unlock.
  */
-static __inline void radeonEnsureCmdBufSpace( radeonContextPtr rmesa,
+static INLINE void radeonEnsureCmdBufSpace( radeonContextPtr rmesa,
 					      int bytes )
 {
    if (rmesa->store.cmd_used + bytes > RADEON_CMD_BUF_SZ)
@@ -186,7 +186,7 @@ static __inline void radeonEnsureCmdBufSpace( radeonContextPtr rmesa,
 
 /* Alloc space in the command buffer
  */
-static __inline char *radeonAllocCmdBuf( radeonContextPtr rmesa,
+static INLINE char *radeonAllocCmdBuf( radeonContextPtr rmesa,
 					 int bytes, const char *where )
 {
    if (rmesa->store.cmd_used + bytes > RADEON_CMD_BUF_SZ)
diff --git a/src/mesa/drivers/dri/radeon/radeon_lighting.c b/src/mesa/drivers/dri/radeon/radeon_lighting.c
index 5e9b9c3051b..6d9ccfa24d6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lighting.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lighting.c
@@ -27,11 +27,11 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
+#include "main/glheader.h"
+#include "main/imports.h"
 #include "api_arrayelt.h"
 /* #include "mmath.h" */
-#include "enums.h"
+#include "main/enums.h"
 #include "colormac.h"
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c
index 30a0c3863c2..64bb3ca103f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lock.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lock.c
@@ -39,8 +39,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Kevin E. Martin <martin@valinux.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
 #include "radeon_context.h"
 #include "radeon_lock.h"
 #include "radeon_tex.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index b61f5e0f3e4..de3c3a15a7f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -32,15 +32,15 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "math/m_translate.h"
 #include "tnl/tnl.h"
-#include "tnl/t_context.h"
+#include "tnl/tcontext.h"
 
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index d5ceedfa24e..126d0727c63 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -32,9 +32,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
 #include "vbo/vbo.h"
 #include "math/m_translate.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.c b/src/mesa/drivers/dri/radeon/radeon_sanity.c
index bdfb7240d72..6613757fcea 100644
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.c
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.c
@@ -33,7 +33,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <errno.h> 
 
-#include "glheader.h"
+#include "main/glheader.h"
 
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 762848fc260..5f32dd575e3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -35,11 +35,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * \author  Gareth Hughes <gareth@valinux.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "mtypes.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #define STANDALONE_MMIO
 #include "radeon_chipset.h"
@@ -48,10 +48,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #if !RADEON_COMMON
 #include "radeon_context.h"
 #include "radeon_span.h"
+#include "radeon_tex.h"
 #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
 #include "r200_context.h"
 #include "r200_ioctl.h"
 #include "r200_span.h"
+#include "r200_tex.h"
 #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
 #include "r300_context.h"
 #include "r300_fragprog.h"
@@ -60,7 +62,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #endif
 
 #include "utils.h"
-#include "context.h"
 #include "vblank.h"
 #include "drirenderbuffer.h"
 
@@ -88,7 +89,7 @@ DRI_CONF_BEGIN
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
-        DRI_CONF_ALLOW_LARGE_TEXTURES(1)
+        DRI_CONF_ALLOW_LARGE_TEXTURES(2)
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
         DRI_CONF_NO_RAST(false)
@@ -115,7 +116,7 @@ DRI_CONF_BEGIN
         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
-        DRI_CONF_ALLOW_LARGE_TEXTURES(1)
+        DRI_CONF_ALLOW_LARGE_TEXTURES(2)
         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
     DRI_CONF_SECTION_END
     DRI_CONF_SECTION_DEBUG
@@ -177,7 +178,7 @@ DRI_CONF_OPT_BEGIN_V(fp_optimization,enum,def,"0:1") \
         DRI_CONF_DESC_END \
 DRI_CONF_OPT_END
 
-const char __driConfigOptions[] =
+PUBLIC const char __driConfigOptions[] =
 DRI_CONF_BEGIN
 	DRI_CONF_SECTION_PERFORMANCE
 		DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
@@ -186,14 +187,13 @@ DRI_CONF_BEGIN
 		DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(8, 2, 8)
 		DRI_CONF_MAX_TEXTURE_COORD_UNITS(8, 2, 8)
 		DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
-		DRI_CONF_DISABLE_FALLBACK(false)
+		DRI_CONF_DISABLE_FALLBACK(true)
 		DRI_CONF_DISABLE_DOUBLE_SIDE_STENCIL(false)
 	DRI_CONF_SECTION_END
 	DRI_CONF_SECTION_QUALITY
 		DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
 		DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
-		DRI_CONF_NO_NEG_LOD_BIAS(false)
-                DRI_CONF_FORCE_S3TC_ENABLE(false)
+		DRI_CONF_FORCE_S3TC_ENABLE(false)
 		DRI_CONF_DISABLE_S3TC(false)
 		DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 		DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
@@ -204,7 +204,7 @@ DRI_CONF_BEGIN
 		DRI_CONF_NO_RAST(false)
 	DRI_CONF_SECTION_END
 DRI_CONF_END;
-static const GLuint __driNConfigOptions = 18;
+static const GLuint __driNConfigOptions = 17;
 
 #ifndef RADEON_DEBUG
 int RADEON_DEBUG = 0;
@@ -242,25 +242,26 @@ radeonGetParam(int fd, int param, void *value)
 {
   int ret;
   drm_radeon_getparam_t gp;
-  
+
   gp.param = param;
   gp.value = value;
-  
+
   ret = drmCommandWriteRead( fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
   return ret;
 }
 
-static __GLcontextModes *
-radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
-		 unsigned stencil_bits, GLboolean have_back_buffer )
+static const __DRIconfig **
+radeonFillInModes( __DRIscreenPrivate *psp,
+		   unsigned pixel_bits, unsigned depth_bits,
+		   unsigned stencil_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
-    __GLcontextModes * m;
-    unsigned num_modes;
+    __DRIconfig **configs;
+    __GLcontextModes *m;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     GLenum fb_format;
     GLenum fb_type;
+    int i;
 
     /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
      * enough to add support.  Basically, if a context is created with an
@@ -277,7 +278,7 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
 
     depth_bits_array[0] = depth_bits;
     depth_bits_array[1] = depth_bits;
-    
+
     /* Just like with the accumulation buffer, always provide some modes
      * with a stencil buffer.  It will be a sw fallback, but some apps won't
      * care about that.
@@ -288,8 +289,6 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -299,21 +298,11 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
-
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR ) ) {
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor,
+			       back_buffer_modes, back_buffer_factor);
+    if (configs == NULL) {
 	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
 		 __func__, __LINE__ );
 	return NULL;
@@ -321,15 +310,43 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
 
     /* Mark the visual as slow if there are "fake" stencil bits.
      */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
+    for (i = 0; configs[i]; i++) {
+	m = &configs[i]->modes;
+	if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
 	    m->visualRating = GLX_SLOW_CONFIG;
 	}
     }
 
-    return modes;
+    return (const __DRIconfig **) configs;
 }
 
+#if !RADEON_COMMON
+static const __DRItexOffsetExtension radeonTexOffsetExtension = {
+    { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
+    radeonSetTexOffset,
+};
+#endif
+
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
+static const __DRIallocateExtension r200AllocateExtension = {
+    { __DRI_ALLOCATE, __DRI_ALLOCATE_VERSION },
+    r200AllocateMemoryMESA,
+    r200FreeMemoryMESA,
+    r200GetMemoryOffsetMESA
+};
+
+static const __DRItexOffsetExtension r200texOffsetExtension = {
+    { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
+   r200SetTexOffset,
+};
+#endif
+
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
+static const __DRItexOffsetExtension r300texOffsetExtension = {
+    { __DRI_TEX_OFFSET, __DRI_TEX_OFFSET_VERSION },
+   r300SetTexOffset,
+};
+#endif
 
 /* Create the device specific screen private data struct.
  */
@@ -339,9 +356,9 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    radeonScreenPtr screen;
    RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
    unsigned char *RADEONMMIO;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void * const psc = sPriv->psc->screenConfigs;
+   int i;
+   int ret;
+   uint32_t temp;
 
    if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(RADEONDRIRec) does not match passed size from device driver\n");
@@ -372,7 +389,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       int ret;
       ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BUFFER_OFFSET,
 			    &screen->gart_buffer_offset);
-	
+
       if (ret) {
 	 FREE( screen );
 	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
@@ -394,13 +411,13 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
 	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
 	 return NULL;
       }
-      screen->drmSupportsCubeMapsR200 = (sPriv->drmMinor >= 7);
-      screen->drmSupportsBlendColor = (sPriv->drmMinor >= 11);
-      screen->drmSupportsTriPerf = (sPriv->drmMinor >= 16);
-      screen->drmSupportsFragShader = (sPriv->drmMinor >= 18);
-      screen->drmSupportsPointSprites = (sPriv->drmMinor >= 13);
-      screen->drmSupportsCubeMapsR100 = (sPriv->drmMinor >= 15);
-      screen->drmSupportsVertexProgram = (sPriv->drmMinor >= 25);
+      screen->drmSupportsCubeMapsR200 = (sPriv->drm_version.minor >= 7);
+      screen->drmSupportsBlendColor = (sPriv->drm_version.minor >= 11);
+      screen->drmSupportsTriPerf = (sPriv->drm_version.minor >= 16);
+      screen->drmSupportsFragShader = (sPriv->drm_version.minor >= 18);
+      screen->drmSupportsPointSprites = (sPriv->drm_version.minor >= 13);
+      screen->drmSupportsCubeMapsR100 = (sPriv->drm_version.minor >= 15);
+      screen->drmSupportsVertexProgram = (sPriv->drm_version.minor >= 25);
    }
 
    screen->mmio.handle = dri_priv->registerHandle;
@@ -534,7 +551,11 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       screen->chip_family = CHIP_FAMILY_RS300;
       break;
 
+      /* 9500 with 1 pipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
    case PCI_CHIP_R300_AD:
+      screen->chip_family = CHIP_FAMILY_RV350;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
    case PCI_CHIP_R300_AE:
    case PCI_CHIP_R300_AF:
    case PCI_CHIP_R300_AG:
@@ -632,17 +653,18 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
 
+   case PCI_CHIP_RV410_5E4C:
+   case PCI_CHIP_RV410_5E4F:
    case PCI_CHIP_RV410_564A:
    case PCI_CHIP_RV410_564B:
    case PCI_CHIP_RV410_564F:
    case PCI_CHIP_RV410_5652:
    case PCI_CHIP_RV410_5653:
+   case PCI_CHIP_RV410_5657:
    case PCI_CHIP_RV410_5E48:
    case PCI_CHIP_RV410_5E4A:
    case PCI_CHIP_RV410_5E4B:
-   case PCI_CHIP_RV410_5E4C:
    case PCI_CHIP_RV410_5E4D:
-   case PCI_CHIP_RV410_5E4F:
       screen->chip_family = CHIP_FAMILY_RV410;
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
@@ -656,7 +678,132 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    case PCI_CHIP_RC410_5A61:
    case PCI_CHIP_RC410_5A62:
       screen->chip_family = CHIP_FAMILY_RS400;
-      fprintf(stderr, "Warning, xpress200 detected.\n");
+      break;
+
+   case PCI_CHIP_RS690_791E:
+   case PCI_CHIP_RS690_791F:
+      screen->chip_family = CHIP_FAMILY_RS690;
+      break;
+   case PCI_CHIP_RS740_796C:
+   case PCI_CHIP_RS740_796D:
+   case PCI_CHIP_RS740_796E:
+   case PCI_CHIP_RS740_796F:
+      screen->chip_family = CHIP_FAMILY_RS740;
+      break;
+
+   case PCI_CHIP_R520_7100:
+   case PCI_CHIP_R520_7101:
+   case PCI_CHIP_R520_7102:
+   case PCI_CHIP_R520_7103:
+   case PCI_CHIP_R520_7104:
+   case PCI_CHIP_R520_7105:
+   case PCI_CHIP_R520_7106:
+   case PCI_CHIP_R520_7108:
+   case PCI_CHIP_R520_7109:
+   case PCI_CHIP_R520_710A:
+   case PCI_CHIP_R520_710B:
+   case PCI_CHIP_R520_710C:
+   case PCI_CHIP_R520_710E:
+   case PCI_CHIP_R520_710F:
+      screen->chip_family = CHIP_FAMILY_R520;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
+
+   case PCI_CHIP_RV515_7140:
+   case PCI_CHIP_RV515_7141:
+   case PCI_CHIP_RV515_7142:
+   case PCI_CHIP_RV515_7143:
+   case PCI_CHIP_RV515_7144:
+   case PCI_CHIP_RV515_7145:
+   case PCI_CHIP_RV515_7146:
+   case PCI_CHIP_RV515_7147:
+   case PCI_CHIP_RV515_7149:
+   case PCI_CHIP_RV515_714A:
+   case PCI_CHIP_RV515_714B:
+   case PCI_CHIP_RV515_714C:
+   case PCI_CHIP_RV515_714D:
+   case PCI_CHIP_RV515_714E:
+   case PCI_CHIP_RV515_714F:
+   case PCI_CHIP_RV515_7151:
+   case PCI_CHIP_RV515_7152:
+   case PCI_CHIP_RV515_7153:
+   case PCI_CHIP_RV515_715E:
+   case PCI_CHIP_RV515_715F:
+   case PCI_CHIP_RV515_7180:
+   case PCI_CHIP_RV515_7181:
+   case PCI_CHIP_RV515_7183:
+   case PCI_CHIP_RV515_7186:
+   case PCI_CHIP_RV515_7187:
+   case PCI_CHIP_RV515_7188:
+   case PCI_CHIP_RV515_718A:
+   case PCI_CHIP_RV515_718B:
+   case PCI_CHIP_RV515_718C:
+   case PCI_CHIP_RV515_718D:
+   case PCI_CHIP_RV515_718F:
+   case PCI_CHIP_RV515_7193:
+   case PCI_CHIP_RV515_7196:
+   case PCI_CHIP_RV515_719B:
+   case PCI_CHIP_RV515_719F:
+   case PCI_CHIP_RV515_7200:
+   case PCI_CHIP_RV515_7210:
+   case PCI_CHIP_RV515_7211:
+      screen->chip_family = CHIP_FAMILY_RV515;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
+
+   case PCI_CHIP_RV530_71C0:
+   case PCI_CHIP_RV530_71C1:
+   case PCI_CHIP_RV530_71C2:
+   case PCI_CHIP_RV530_71C3:
+   case PCI_CHIP_RV530_71C4:
+   case PCI_CHIP_RV530_71C5:
+   case PCI_CHIP_RV530_71C6:
+   case PCI_CHIP_RV530_71C7:
+   case PCI_CHIP_RV530_71CD:
+   case PCI_CHIP_RV530_71CE:
+   case PCI_CHIP_RV530_71D2:
+   case PCI_CHIP_RV530_71D4:
+   case PCI_CHIP_RV530_71D5:
+   case PCI_CHIP_RV530_71D6:
+   case PCI_CHIP_RV530_71DA:
+   case PCI_CHIP_RV530_71DE:
+      screen->chip_family = CHIP_FAMILY_RV530;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
+
+   case PCI_CHIP_R580_7240:
+   case PCI_CHIP_R580_7243:
+   case PCI_CHIP_R580_7244:
+   case PCI_CHIP_R580_7245:
+   case PCI_CHIP_R580_7246:
+   case PCI_CHIP_R580_7247:
+   case PCI_CHIP_R580_7248:
+   case PCI_CHIP_R580_7249:
+   case PCI_CHIP_R580_724A:
+   case PCI_CHIP_R580_724B:
+   case PCI_CHIP_R580_724C:
+   case PCI_CHIP_R580_724D:
+   case PCI_CHIP_R580_724E:
+   case PCI_CHIP_R580_724F:
+   case PCI_CHIP_R580_7284:
+      screen->chip_family = CHIP_FAMILY_R580;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
+      break;
+
+   case PCI_CHIP_RV570_7280:
+   case PCI_CHIP_RV560_7281:
+   case PCI_CHIP_RV560_7283:
+   case PCI_CHIP_RV560_7287:
+   case PCI_CHIP_RV570_7288:
+   case PCI_CHIP_RV570_7289:
+   case PCI_CHIP_RV570_728B:
+   case PCI_CHIP_RV570_728C:
+   case PCI_CHIP_RV560_7290:
+   case PCI_CHIP_RV560_7291:
+   case PCI_CHIP_RV560_7293:
+   case PCI_CHIP_RV560_7297:
+      screen->chip_family = CHIP_FAMILY_RV560;
+      screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
 
    default:
@@ -665,11 +812,19 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       return NULL;
    }
    if ((screen->chip_family == CHIP_FAMILY_R350 || screen->chip_family == CHIP_FAMILY_R300) &&
-       sPriv->ddxMinor < 2) {
+       sPriv->ddx_version.minor < 2) {
       fprintf(stderr, "xf86-video-ati-6.6.2 or newer needed for Radeon 9500/9700/9800 cards.\n");
       return NULL;
    }
 
+   if ((sPriv->drm_version.minor < 29) && (screen->chip_family >= CHIP_FAMILY_RV515)) {
+      fprintf(stderr, "R500 support requires a newer drm.\n");
+      return NULL;
+   }
+
+   if (getenv("R300_NO_TCL"))
+     screen->chip_flags &= ~RADEON_CHIPSET_TCL;
+
    if (screen->chip_family <= CHIP_FAMILY_RS200)
       screen->chip_flags |= RADEON_CLASS_R100;
    else if (screen->chip_family <= CHIP_FAMILY_RV280)
@@ -680,9 +835,51 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->cpp = dri_priv->bpp / 8;
    screen->AGPMode = dri_priv->AGPMode;
 
-   screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
+   ret = radeonGetParam( sPriv->fd, RADEON_PARAM_FB_LOCATION,
+                         &temp);
+   if (ret) {
+       if (screen->chip_family < CHIP_FAMILY_RS690)
+	   screen->fbLocation      = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
+       else {
+           FREE( screen );
+           fprintf(stderr, "Unable to get fb location need newer drm\n");
+           return NULL;
+       }
+   } else {
+       screen->fbLocation = (temp & 0xffff) << 16;
+   }
+
+   if (screen->chip_family >= CHIP_FAMILY_RV515) {
+       ret = radeonGetParam( sPriv->fd, RADEON_PARAM_NUM_GB_PIPES,
+			     &temp);
+       if (ret) {
+	   fprintf(stderr, "Unable to get num_pipes, need newer drm\n");
+	   switch (screen->chip_family) {
+	   case CHIP_FAMILY_R300:
+	   case CHIP_FAMILY_R350:
+	       screen->num_gb_pipes = 2;
+	       break;
+	   case CHIP_FAMILY_R420:
+	   case CHIP_FAMILY_R520:
+	   case CHIP_FAMILY_R580:
+	   case CHIP_FAMILY_RV560:
+	   case CHIP_FAMILY_RV570:
+	       screen->num_gb_pipes = 4;
+	       break;
+	   case CHIP_FAMILY_RV350:
+	   case CHIP_FAMILY_RV515:
+	   case CHIP_FAMILY_RV530:
+	   case CHIP_FAMILY_RV410:
+	   default:
+	       screen->num_gb_pipes = 1;
+	       break;
+	   }
+       } else {
+	   screen->num_gb_pipes = temp;
+       }
+   }
 
-   if ( sPriv->drmMinor >= 10 ) {
+   if ( sPriv->drm_version.minor >= 10 ) {
       drm_radeon_setparam_t sp;
 
       sp.param = RADEON_SETPARAM_FB_LOCATION;
@@ -700,8 +897,11 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->depthPitch	= dri_priv->depthPitch;
 
    /* Check if ddx has set up a surface reg to cover depth buffer */
-   screen->depthHasSurface = ((sPriv->ddxMajor > 4) &&
-      (screen->chip_flags & RADEON_CHIPSET_TCL));
+   screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
+      /* these chips don't use tiled z without hyperz. So always pretend
+         we have set up a surface which will cause linear reads/writes */
+      (IS_R100_CLASS(screen) &&
+      !(screen->chip_flags & RADEON_CHIPSET_TCL));
 
    if ( dri_priv->textureSize == 0 ) {
       screen->texOffset[RADEON_LOCAL_TEX_HEAP] = screen->gart_texture_offset;
@@ -730,29 +930,34 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
 	 dri_priv->log2GARTTexGran;
    }
 
-   if ( glx_enable_extension != NULL ) {
-      if ( screen->irq != 0 ) {
-	 (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-	 (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-	 (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-      }
-
-      (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
-      if (IS_R200_CLASS(screen))
-	 (*glx_enable_extension)( psc, "GLX_MESA_allocate_memory" );
+   i = 0;
+   screen->extensions[i++] = &driCopySubBufferExtension.base;
+   screen->extensions[i++] = &driFrameTrackingExtension.base;
+   screen->extensions[i++] = &driReadDrawableExtension;
 
-      (*glx_enable_extension)( psc, "GLX_MESA_copy_sub_buffer" );
-      (*glx_enable_extension)( psc, "GLX_SGI_make_current_read" );
+   if ( screen->irq != 0 ) {
+       screen->extensions[i++] = &driSwapControlExtension.base;
+       screen->extensions[i++] = &driMediaStreamCounterExtension.base;
    }
 
+#if !RADEON_COMMON
+   screen->extensions[i++] = &radeonTexOffsetExtension.base;
+#endif
+
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
-   if (IS_R200_CLASS(screen)) {
-      sPriv->psc->allocateMemory = (void *) r200AllocateMemoryMESA;
-      sPriv->psc->freeMemory     = (void *) r200FreeMemoryMESA;
-      sPriv->psc->memoryOffset   = (void *) r200GetMemoryOffsetMESA;
-   }
+   if (IS_R200_CLASS(screen))
+       screen->extensions[i++] = &r200AllocateExtension.base;
+
+   screen->extensions[i++] = &r200texOffsetExtension.base;
 #endif
 
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
+   screen->extensions[i++] = &r300texOffsetExtension.base;
+#endif
+
+   screen->extensions[i++] = NULL;
+   sPriv->extensions = screen->extensions;
+
    screen->driScreen = sPriv;
    screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
    return screen;
@@ -935,71 +1140,16 @@ static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
 
 #endif
 
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
-static struct __DriverAPIRec radeonAPI = {
-   .InitDriver      = radeonInitDriver,
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = radeonCreateContext,
-   .DestroyContext  = radeonDestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = radeonSwapBuffers,
-   .MakeCurrent     = radeonMakeCurrent,
-   .UnbindContext   = radeonUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = radeonCopySubBuffer,
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-   .setTexOffset    = r300SetTexOffset,
-#endif
-};
-#else
-static const struct __DriverAPIRec r200API = {
-   .InitDriver      = radeonInitDriver,
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = r200CreateContext,
-   .DestroyContext  = r200DestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = r200SwapBuffers,
-   .MakeCurrent     = r200MakeCurrent,
-   .UnbindContext   = r200UnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = r200CopySubBuffer
-};
-#endif
-
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  *
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC void *
-__driCreateNewScreen_20050727( __DRInativeDisplay *dpy,
-                             int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd,
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
+static const __DRIconfig **
+radeonInitScreen(__DRIscreenPrivate *psp)
 {
-   __DRIscreenPrivate *psp;
 #if !RADEON_COMMON
    static const char *driver_name = "Radeon";
    static const __DRIutilversion2 ddx_expected = { 4, 5, 0, 0 };
@@ -1016,57 +1166,42 @@ __driCreateNewScreen_20050727( __DRInativeDisplay *dpy,
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 1, 24, 0 };
 #endif
-
-   dri_interface = interface;
+   RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
 
    if ( ! driCheckDriDdxDrmVersions3( driver_name,
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) ) {
       return NULL;
    }
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &radeonAPI);
-#elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &r200API);
-#endif
 
-   if ( psp != NULL ) {
-      RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
-      if (driver_modes) {
-         *driver_modes = radeonFillInModes( dri_priv->bpp,
-                                            (dri_priv->bpp == 16) ? 16 : 24,
-                                            (dri_priv->bpp == 16) ? 0  : 8,
-                                            (dri_priv->backOffset != dri_priv->depthOffset) );
-      }
-
-      /* Calling driInitExtensions here, with a NULL context pointer,
-       * does not actually enable the extensions.  It just makes sure
-       * that all the dispatch offsets for all the extensions that
-       * *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create
-       * is called, but we can't enable the extensions until we have a
-       * context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create
+    * is called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
 #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
-      driInitExtensions( NULL, blend_extensions, GL_FALSE );
-      driInitSingleExtension( NULL, ARB_vp_extension );
-      driInitSingleExtension( NULL, NV_vp_extension );
-      driInitSingleExtension( NULL, ATI_fs_extension );
-      driInitExtensions( NULL, point_extensions, GL_FALSE );
+   driInitExtensions( NULL, blend_extensions, GL_FALSE );
+   driInitSingleExtension( NULL, ARB_vp_extension );
+   driInitSingleExtension( NULL, NV_vp_extension );
+   driInitSingleExtension( NULL, ATI_fs_extension );
+   driInitExtensions( NULL, point_extensions, GL_FALSE );
 #endif
-   }
 
-   return (void *) psp;
+   if (!radeonInitDriver(psp))
+       return NULL;
+
+   return radeonFillInModes( psp,
+			     dri_priv->bpp,
+			     (dri_priv->bpp == 16) ? 16 : 24,
+			     (dri_priv->bpp == 16) ? 0  : 8,
+			     (dri_priv->backOffset != dri_priv->depthOffset) );
 }
 
 
@@ -1099,3 +1234,41 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
 
    return 0;
 }
+
+#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = radeonInitScreen,
+   .DestroyScreen   = radeonDestroyScreen,
+   .CreateContext   = radeonCreateContext,
+   .DestroyContext  = radeonDestroyContext,
+   .CreateBuffer    = radeonCreateBuffer,
+   .DestroyBuffer   = radeonDestroyBuffer,
+   .SwapBuffers     = radeonSwapBuffers,
+   .MakeCurrent     = radeonMakeCurrent,
+   .UnbindContext   = radeonUnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL,
+   .CopySubBuffer   = radeonCopySubBuffer,
+};
+#else
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = radeonInitScreen,
+   .DestroyScreen   = radeonDestroyScreen,
+   .CreateContext   = r200CreateContext,
+   .DestroyContext  = r200DestroyContext,
+   .CreateBuffer    = radeonCreateBuffer,
+   .DestroyBuffer   = radeonDestroyBuffer,
+   .SwapBuffers     = r200SwapBuffers,
+   .MakeCurrent     = r200MakeCurrent,
+   .UnbindContext   = r200UnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL,
+   .CopySubBuffer   = r200CopySubBuffer,
+};
+#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index c9b0c3af125..b84c70bfae9 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -102,6 +102,10 @@ typedef struct {
 
    /* Configuration cache with default values for all contexts */
    driOptionCache optionCache;
+
+   const __DRIextension *extensions[8];
+
+   int num_gb_pipes;
 } radeonScreenRec, *radeonScreenPtr;
 
 #define IS_R100_CLASS(screen) \
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 732a85ecf0b..12051ff1c81 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -40,7 +40,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
-#include "glheader.h"
+#include "main/glheader.h"
 #include "swrast/swrast.h"
 
 #include "radeon_context.h"
@@ -173,6 +173,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y)
 
 /* 16-bit depth buffer functions
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )					\
    *(GLushort *)(buf + radeon_mba_z16( drb, _x + xo, _y + yo )) = d;
 
@@ -187,6 +189,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y)
  * Careful: It looks like the R300 uses ZZZS byte order while the R200
  * uses SZZZ for 24 bit depth, 8 bit stencil mode.
  */
+#define VALUE_TYPE GLuint
+
 #ifdef COMPILE_R300
 #define WRITE_DEPTH( _x, _y, d )					\
 do {									\
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 1fe5c244cdb..32bcff33602 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -32,14 +32,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "api_arrayelt.h"
-#include "enums.h"
-#include "light.h"
-#include "state.h"
-#include "context.h"
-#include "framebuffer.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/api_arrayelt.h"
+#include "main/enums.h"
+#include "main/light.h"
+#include "main/state.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
 
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -1639,8 +1639,7 @@ void radeonSetCliprects( radeonContextPtr rmesa )
    GLframebuffer *const draw_fb = (GLframebuffer*) drawable->driverPrivate;
    GLframebuffer *const read_fb = (GLframebuffer*) readable->driverPrivate;
 
-   if (draw_fb->_ColorDrawBufferMask[0]
-       == BUFFER_BIT_BACK_LEFT) {
+   if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
       /* Can't ignore 2d windows if we are page flipping.
        */
       if ( drawable->numBackClipRects == 0 || rmesa->doPageFlip ) {
@@ -1692,17 +1691,18 @@ static void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
 
    RADEON_FIREVERTICES(rmesa);	/* don't pipeline cliprect changes */
 
-   /*
-    * _ColorDrawBufferMask is easier to cope with than <mode>.
-    * Check for software fallback, update cliprects.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
-   case BUFFER_BIT_BACK_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      /* 0 (GL_NONE) buffers or multiple color drawing buffers */
+      FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
+   case BUFFER_BACK_LEFT:
       FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
    default:
-      /* 0 (GL_NONE) buffers or multiple color drawing buffers */
       FALLBACK( rmesa, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
@@ -2221,11 +2221,11 @@ radeonUpdateDrawBuffer(GLcontext *ctx)
    struct gl_framebuffer *fb = ctx->DrawBuffer;
    driRenderbuffer *drb;
 
-   if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT) {
+   if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
       /* draw to front */
       drb = (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
    }
-   else if (fb->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT) {
+   else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
       /* draw to back */
       drb = (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
    }
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index c876a596e6e..57dc3800501 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -27,9 +27,9 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "api_arrayelt.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/api_arrayelt.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 2b3ae14ff74..ebea1fecdca 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -32,12 +32,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "enums.h"
-#include "imports.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/enums.h"
+#include "main/imports.h"
+#include "main/macros.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "math/m_translate.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.h b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
index 1feedf185dd..e485052ad77 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
@@ -35,7 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_TRIS_H__
 #define __RADEON_TRIS_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 #include "radeon_context.h"
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index d35be1ca884..779e9ae5df0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -32,11 +32,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "light.h"
-#include "mtypes.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/light.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
 
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -417,7 +417,7 @@ static GLboolean radeon_run_tcl_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index f3eb9d8eef8..b0aec216706 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -31,18 +31,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *    Brian Paul <brianp@valinux.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "colormac.h"
-#include "context.h"
-#include "enums.h"
-#include "image.h"
-#include "simple_list.h"
-#include "texformat.h"
-#include "texstore.h"
-#include "teximage.h"
-#include "texobj.h"
-
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/simple_list.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
 
 #include "radeon_context.h"
 #include "radeon_state.h"
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.h b/src/mesa/drivers/dri/radeon/radeon_tex.h
index bdf086dfeec..80008808289 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.h
@@ -37,6 +37,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __RADEON_TEX_H__
 #define __RADEON_TEX_H__
 
+extern void radeonSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
+                               unsigned long long offset, GLint depth,
+                               GLuint pitch);
+
 extern void radeonUpdateTextureState( GLcontext *ctx );
 
 extern int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texmem.c b/src/mesa/drivers/dri/radeon/radeon_texmem.c
index f7520f1dea3..5f7bbe6a4cb 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texmem.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texmem.c
@@ -36,10 +36,10 @@ SOFTWARE.
  */
 #include <errno.h> 
 
-#include "glheader.h"
-#include "imports.h"
-#include "context.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/context.h"
+#include "main/macros.h"
 
 #include "radeon_context.h"
 #include "radeon_ioctl.h"
@@ -333,7 +333,7 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
 {
    int numLevels;
 
-   if ( !t || t->base.totalSize == 0 )
+   if ( !t || t->base.totalSize == 0 || t->image_override )
       return 0;
 
    if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index ae8d527cf46..1e2f654addf 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -33,13 +33,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Gareth Hughes <gareth@valinux.com>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "colormac.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
+#include "main/texobj.h"
+#include "main/enums.h"
 
 #include "radeon_context.h"
 #include "radeon_state.h"
@@ -83,7 +84,7 @@ tx_table[] =
    _ALPHA_REV(RGBA8888),
    _ALPHA(ARGB8888),
    _ALPHA_REV(ARGB8888),
-   _INVALID(RGB888),
+   [ MESA_FORMAT_RGB888 ] = { RADEON_TXFORMAT_ARGB8888, 0 },
    _COLOR(RGB565),
    _COLOR_REV(RGB565),
    _ALPHA(ARGB4444),
@@ -133,18 +134,19 @@ static void radeonSetTexImages( radeonContextPtr rmesa,
 
    /* Set the hardware texture format
     */
-
-   t->pp_txformat &= ~(RADEON_TXFORMAT_FORMAT_MASK |
-		       RADEON_TXFORMAT_ALPHA_IN_MAP);
-   t->pp_txfilter &= ~RADEON_YUV_TO_RGB;
-
-   if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
-      t->pp_txformat |= tx_table[ baseImage->TexFormat->MesaFormat ].format;
-      t->pp_txfilter |= tx_table[ baseImage->TexFormat->MesaFormat ].filter;
-   }
-   else {
-      _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
-      return;
+   if ( !t->image_override ) {
+      t->pp_txformat &= ~(RADEON_TXFORMAT_FORMAT_MASK |
+                          RADEON_TXFORMAT_ALPHA_IN_MAP);
+      t->pp_txfilter &= ~RADEON_YUV_TO_RGB;
+
+      if ( VALID_FORMAT( baseImage->TexFormat->MesaFormat ) ) {
+         t->pp_txformat |= tx_table[ baseImage->TexFormat->MesaFormat ].format;
+         t->pp_txfilter |= tx_table[ baseImage->TexFormat->MesaFormat ].filter;
+      }
+      else {
+         _mesa_problem(NULL, "unexpected texture format in %s", __FUNCTION__);
+         return;
+      }
    }
 
    texelBytes = baseImage->TexFormat->TexelBytes;
@@ -340,11 +342,13 @@ static void radeonSetTexImages( radeonContextPtr rmesa,
     * requires 64-byte aligned pitches, and we may/may not need the
     * blitter.   NPOT only!
     */
-   if (baseImage->IsCompressed)
-      t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
-   else
-      t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
-   t->pp_txpitch -= 32;
+   if ( !t->image_override ) {
+      if (baseImage->IsCompressed)
+         t->pp_txpitch = (tObj->Image[0][t->base.firstLevel]->Width + 63) & ~(63);
+      else
+         t->pp_txpitch = ((tObj->Image[0][t->base.firstLevel]->Width * texelBytes) + 63) & ~(63);
+      t->pp_txpitch -= 32;
+   }
 
    t->dirty_state = TEX_ALL;
 
@@ -839,6 +843,44 @@ static GLboolean radeonUpdateTextureEnv( GLcontext *ctx, int unit )
    return GL_TRUE;
 }
 
+void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
+                        unsigned long long offset, GLint depth, GLuint pitch)
+{
+	radeonContextPtr rmesa = pDRICtx->driverPrivate;
+	struct gl_texture_object *tObj =
+	    _mesa_lookup_texture(rmesa->glCtx, texname);
+	radeonTexObjPtr t;
+
+	if (tObj == NULL)
+		return;
+
+	t = (radeonTexObjPtr) tObj->DriverData;
+
+	t->image_override = GL_TRUE;
+
+	if (!offset)
+		return;
+
+	t->pp_txoffset = offset;
+	t->pp_txpitch = pitch - 32;
+
+	switch (depth) {
+	case 32:
+		t->pp_txformat = tx_table[MESA_FORMAT_ARGB8888].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_ARGB8888].filter;
+		break;
+	case 24:
+	default:
+		t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter;
+		break;
+	case 16:
+		t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format;
+		t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter;
+		break;
+	}
+}
+
 #define TEXOBJ_TXFILTER_MASK (RADEON_MAX_MIP_LEVEL_MASK |	\
 			      RADEON_MIN_FILTER_MASK | 		\
 			      RADEON_MAG_FILTER_MASK |		\
@@ -1135,7 +1177,7 @@ static GLboolean enable_tex_2d( GLcontext *ctx, int unit )
       RADEON_FIREVERTICES( rmesa );
       radeonSetTexImages( rmesa, tObj );
       radeonUploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock ) 
+      if ( !t->base.memBlock && !t->image_override ) 
 	return GL_FALSE;
    }
 
@@ -1202,7 +1244,8 @@ static GLboolean enable_tex_rect( GLcontext *ctx, int unit )
       RADEON_FIREVERTICES( rmesa );
       radeonSetTexImages( rmesa, tObj );
       radeonUploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, 0 );
-      if ( !t->base.memBlock /* && !rmesa->prefer_gart_client_texturing  FIXME */ ) {
+      if ( !t->base.memBlock &&
+           !t->image_override /* && !rmesa->prefer_gart_client_texturing  FIXME */ ) {
 	 fprintf(stderr, "%s: upload failed\n", __FUNCTION__);
 	 return GL_FALSE;
       }
diff --git a/src/mesa/drivers/dri/s3v/s3v_context.c b/src/mesa/drivers/dri/s3v/s3v_context.c
index 2d2f704ad77..14502f95aec 100644
--- a/src/mesa/drivers/dri/s3v/s3v_context.c
+++ b/src/mesa/drivers/dri/s3v/s3v_context.c
@@ -11,15 +11,15 @@
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 
-#include "context.h"
-#include "simple_list.h"
-#include "matrix.h"
-#include "extensions.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
 #if defined(USE_X86_ASM)
 #include "x86/common_x86_asm.h"
 #endif
-#include "simple_list.h"
-#include "mm.h"
+#include "main/simple_list.h"
+#include "main/mm.h"
 
 #include "drivers/common/driverfuncs.h"
 #include "s3v_vb.h"
diff --git a/src/mesa/drivers/dri/s3v/s3v_context.h b/src/mesa/drivers/dri/s3v/s3v_context.h
index 6f527f3a834..671ba90d781 100644
--- a/src/mesa/drivers/dri/s3v/s3v_context.h
+++ b/src/mesa/drivers/dri/s3v/s3v_context.h
@@ -11,11 +11,11 @@
 #include "s3v_regs.h"
 #include "s3v_macros.h"
 #include "s3v_screen.h"
-#include "colormac.h"
-#include "macros.h"
-#include "mtypes.h"
+#include "main/colormac.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
 #include "drm.h"
-#include "mm.h"
+#include "main/mm.h"
 #include "drirenderbuffer.h"
 
 /* Flags for context */
@@ -419,9 +419,9 @@ struct s3v_context {
 #define S3VIRGEPACKCOLOR4444( r, g, b, a ) \
     ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
 
-static __inline GLuint s3vPackColor( GLuint cpp,
-					GLubyte r, GLubyte g,
-					GLubyte b, GLubyte a )
+static INLINE GLuint s3vPackColor( GLuint cpp,
+                                   GLubyte r, GLubyte g,
+                                   GLubyte b, GLubyte a )
 {
 	unsigned int ret;
 	DEBUG(("cpp = %i, r=0x%x, g=0x%x, b=0x%x, a=0x%x\n", cpp, r, g, b, a));
diff --git a/src/mesa/drivers/dri/s3v/s3v_dd.c b/src/mesa/drivers/dri/s3v/s3v_dd.c
index 1cbe890319a..e340116f5e1 100644
--- a/src/mesa/drivers/dri/s3v/s3v_dd.c
+++ b/src/mesa/drivers/dri/s3v/s3v_dd.c
@@ -9,8 +9,8 @@
 #include "x86/common_x86_asm.h"
 #endif
 
-#include "context.h"
-#include "framebuffer.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
 #include "swrast/swrast.h"
 
 #define S3V_DATE "20020207"
diff --git a/src/mesa/drivers/dri/s3v/s3v_macros.h b/src/mesa/drivers/dri/s3v/s3v_macros.h
index 3bc871b7eaf..7e9b4529df4 100644
--- a/src/mesa/drivers/dri/s3v/s3v_macros.h
+++ b/src/mesa/drivers/dri/s3v/s3v_macros.h
@@ -19,6 +19,7 @@
 #include <stdio.h>
 #endif
 
+#undef DEBUG
 #if GENERIC_DEBUG
 #define DEBUG(str) printf str
 #else
diff --git a/src/mesa/drivers/dri/s3v/s3v_render.c b/src/mesa/drivers/dri/s3v/s3v_render.c
index 6aaa94976e3..5023f3c4641 100644
--- a/src/mesa/drivers/dri/s3v/s3v_render.c
+++ b/src/mesa/drivers/dri/s3v/s3v_render.c
@@ -2,10 +2,10 @@
  * Author: Max Lingua <sunmax@libero.it>
  */
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
 
 #include "tnl/t_context.h"
 
@@ -66,7 +66,7 @@ static const GLuint hw_prim[GL_POLYGON+1] = {
 	PrimType_Polygon
 };
 
-static __inline void s3vStartPrimitive( s3vContextPtr vmesa, GLenum prim )
+static INLINE void s3vStartPrimitive( s3vContextPtr vmesa, GLenum prim )
 {
 	__DRIdrawablePrivate *dPriv = vmesa->driDrawable;
 
@@ -110,7 +110,7 @@ static __inline void s3vStartPrimitive( s3vContextPtr vmesa, GLenum prim )
 	vmesa->restore_primitive = _hw_prim;
 }
 
-static __inline void s3vEndPrimitive( s3vContextPtr vmesa )
+static INLINE void s3vEndPrimitive( s3vContextPtr vmesa )
 {
 /*	GLcontext *ctx = vmesa->glCtx; */
 	DEBUG(("s3vEndPrimitive\n"));
@@ -170,7 +170,7 @@ static GLboolean s3v_run_render( GLcontext *ctx,
 
 	for (i = 0 ; i < VB->PrimitiveCount ; i++ )
 	{
-                GLuint prim = VB->Primitive[i].mode;
+		GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
 		GLuint start = VB->Primitive[i].start;
 		GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/s3v/s3v_screen.h b/src/mesa/drivers/dri/s3v/s3v_screen.h
index 0c4f69efac3..c49bc8587da 100644
--- a/src/mesa/drivers/dri/s3v/s3v_screen.h
+++ b/src/mesa/drivers/dri/s3v/s3v_screen.h
@@ -2,7 +2,7 @@
  * Author: Max Lingua <sunmax@libero.it>
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 typedef struct _s3vRegion {
     drm_handle_t  handle;
diff --git a/src/mesa/drivers/dri/s3v/s3v_span.c b/src/mesa/drivers/dri/s3v/s3v_span.c
index de78f9f6b1b..f9f7c0d1eee 100644
--- a/src/mesa/drivers/dri/s3v/s3v_span.c
+++ b/src/mesa/drivers/dri/s3v/s3v_span.c
@@ -128,6 +128,8 @@ do { \
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d ) \
    *(GLushort *)(buf + _x*2 + _y*dPriv->w*2) = d
 
@@ -143,6 +145,8 @@ do { \
 /* 32 bit depthbuffer functions.
  */
 #if 0
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLuint *)(buf + _x*4 + _y*pitch) = d;
 
@@ -157,6 +161,8 @@ do { \
 /* 24/8 bit interleaved depth/stencil functions
  */
 #if 0
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) { \
    GLuint tmp = *(GLuint *)(buf + _x*4 + _y*pitch);	\
    tmp &= 0xff; \
diff --git a/src/mesa/drivers/dri/s3v/s3v_state.c b/src/mesa/drivers/dri/s3v/s3v_state.c
index b86b618c117..c71c89a3e1b 100644
--- a/src/mesa/drivers/dri/s3v/s3v_state.c
+++ b/src/mesa/drivers/dri/s3v/s3v_state.c
@@ -5,9 +5,9 @@
 #include <X11/Xlibint.h>
 #include "s3v_context.h"
 #include "s3v_macros.h"
-#include "macros.h"
 #include "s3v_dri.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "vbo/vbo.h"
diff --git a/src/mesa/drivers/dri/s3v/s3v_tex.c b/src/mesa/drivers/dri/s3v/s3v_tex.c
index 5bee051b092..8bf2ea98783 100644
--- a/src/mesa/drivers/dri/s3v/s3v_tex.c
+++ b/src/mesa/drivers/dri/s3v/s3v_tex.c
@@ -5,16 +5,16 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
-#include "texstore.h"
-#include "texformat.h"
-#include "teximage.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
+#include "main/mm.h"
+#include "main/texstore.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
 #include "s3v_context.h"
 #include "s3v_tex.h"
 
diff --git a/src/mesa/drivers/dri/s3v/s3v_texmem.c b/src/mesa/drivers/dri/s3v/s3v_texmem.c
index 5b44340d19b..705d105f55f 100644
--- a/src/mesa/drivers/dri/s3v/s3v_texmem.c
+++ b/src/mesa/drivers/dri/s3v/s3v_texmem.c
@@ -5,13 +5,13 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "s3v_context.h"
 #include "s3v_lock.h"
 #include "s3v_tex.h"
diff --git a/src/mesa/drivers/dri/s3v/s3v_texstate.c b/src/mesa/drivers/dri/s3v/s3v_texstate.c
index 2719de3663a..455bae6301d 100644
--- a/src/mesa/drivers/dri/s3v/s3v_texstate.c
+++ b/src/mesa/drivers/dri/s3v/s3v_texstate.c
@@ -5,13 +5,13 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "simple_list.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "s3v_context.h"
 #include "s3v_tex.h"
 
diff --git a/src/mesa/drivers/dri/s3v/s3v_tris.c b/src/mesa/drivers/dri/s3v/s3v_tris.c
index d6cceddd454..fafd38480c9 100644
--- a/src/mesa/drivers/dri/s3v/s3v_tris.c
+++ b/src/mesa/drivers/dri/s3v/s3v_tris.c
@@ -11,10 +11,10 @@
 #include "s3v_vb.h"
 #include "s3v_tris.h"
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/s3v/s3v_vb.c b/src/mesa/drivers/dri/s3v/s3v_vb.c
index dadf2b48911..00e375c6c43 100644
--- a/src/mesa/drivers/dri/s3v/s3v_vb.c
+++ b/src/mesa/drivers/dri/s3v/s3v_vb.c
@@ -2,10 +2,10 @@
  * Author: Max Lingua <sunmax@libero.it>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
diff --git a/src/mesa/drivers/dri/s3v/s3v_vb.h b/src/mesa/drivers/dri/s3v/s3v_vb.h
index b35d804e625..0fd54373805 100644
--- a/src/mesa/drivers/dri/s3v/s3v_vb.h
+++ b/src/mesa/drivers/dri/s3v/s3v_vb.h
@@ -5,7 +5,7 @@
 #ifndef S3VVB_INC
 #define S3VVB_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "swrast/swrast.h"
 
 #define _S3V_NEW_VERTEX (_NEW_TEXTURE |		\
diff --git a/src/mesa/drivers/dri/s3v/s3v_xmesa.c b/src/mesa/drivers/dri/s3v/s3v_xmesa.c
index c66fd6dac31..b18c8763c3a 100644
--- a/src/mesa/drivers/dri/s3v/s3v_xmesa.c
+++ b/src/mesa/drivers/dri/s3v/s3v_xmesa.c
@@ -4,11 +4,11 @@
 
 #include "s3v_context.h"
 #include "s3v_vb.h"
-#include "context.h"
-#include "matrix.h"
+#include "main/context.h"
+#include "main/matrix.h"
 #include "s3v_dri.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -17,8 +17,8 @@
 
 /* #define DEBUG(str) printf str */
 
-static GLboolean 
-s3vInitDriver(__DRIscreenPrivate *sPriv)
+static const __DRIconfig **
+s3vInitScreen(__DRIscreen *sPriv)
 {
     sPriv->private = (void *) s3vCreateScreen( sPriv );
 
@@ -27,7 +27,7 @@ s3vInitDriver(__DRIscreenPrivate *sPriv)
 	return GL_FALSE;
     }
 
-    return GL_TRUE;
+   return NULL;
 }
 
 static void 
@@ -327,34 +327,14 @@ s3vUnbindContext( __DRIcontextPrivate *driContextPriv )
    return GL_TRUE;
 }
 
-
-static struct __DriverAPIRec s3vAPI = {
-   s3vInitDriver,
-   s3vDestroyScreen,
-   s3vCreateContext,
-   s3vDestroyContext,
-   s3vCreateBuffer,
-   s3vDestroyBuffer,
-   s3vSwapBuffers,
-   s3vMakeCurrent,
-   s3vUnbindContext,
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen	   = s3vInitScreen,
+   .DestroyScreen  = s3vDestroyScreen,
+   .CreateContext  = s3vCreateContext,
+   .DestroyContext = s3vDestroyContext,
+   .CreateBuffer   = s3vCreateBuffer,
+   .DestroyBuffer  = s3vDestroyBuffer,
+   .SwapBuffers	   = s3vSwapBuffers,
+   .MakeCurrent	   = s3vMakeCurrent,
+   .UnbindContext  = s3vUnbindContext,
 };
-
-
-#if 0
-/*
- * This is the bootstrap function for the driver.
- * The __driCreateScreen name is the symbol that libGL.so fetches.
- * Return:  pointer to a __DRIscreenPrivate.
- */
-void *__driCreateScreen(Display *dpy, int scrn, __DRIscreen *psc,
-                        int numConfigs, __GLXvisualConfig *config)
-{
-   __DRIscreenPrivate *psp=NULL;
-
-   DEBUG(("__driCreateScreen: psp = %p\n", psp));
-   psp = __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &s3vAPI);
-   DEBUG(("__driCreateScreen: psp = %p\n", psp));
-   return (void *) psp;
-}
-#endif
diff --git a/src/mesa/drivers/dri/savage/savage_init.h b/src/mesa/drivers/dri/savage/savage_init.h
index 43fb969c693..abb8440fc4c 100644
--- a/src/mesa/drivers/dri/savage/savage_init.h
+++ b/src/mesa/drivers/dri/savage/savage_init.h
@@ -28,7 +28,7 @@
 
 #include <sys/time.h>
 #include "dri_util.h"
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 #include "xmlconfig.h"
 
diff --git a/src/mesa/drivers/dri/savage/savage_xmesa.c b/src/mesa/drivers/dri/savage/savage_xmesa.c
index 00171253290..a344aab71bb 100644
--- a/src/mesa/drivers/dri/savage/savage_xmesa.c
+++ b/src/mesa/drivers/dri/savage/savage_xmesa.c
@@ -26,16 +26,16 @@
 #include <X11/Xlibint.h>
 #include <stdio.h>
 
-#include "savagecontext.h"
-#include "context.h"
-#include "matrix.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
-#include "simple_list.h"
+#include "main/context.h"
+#include "main/context.h"
+#include "main/matrix.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
+#include "main/simple_list.h"
 
 #include "utils.h"
 
-#include "extensions.h"
+#include "main/extensions.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -168,16 +168,17 @@ static const struct tnl_pipeline_stage *savage_pipeline[] = {
 };
 
 
-/* this is first function called in dirver*/
+PUBLIC const __DRIextension *savageScreenExtensions[] = {
+    &driCoreExtension.base,
+    &driLegacyExtension.base,
+    &driReadDrawableExtension,
+};
 
 static GLboolean
 savageInitDriver(__DRIscreenPrivate *sPriv)
 {
   savageScreenPrivate *savageScreen;
   SAVAGEDRIPtr         gDRIPriv = (SAVAGEDRIPtr)sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-
 
    if (sPriv->devPrivSize != sizeof(SAVAGEDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(SAVAGEDRIRec) does not match passed size from device driver\n");
@@ -265,10 +266,7 @@ savageInitDriver(__DRIscreenPrivate *sPriv)
    driParseOptionInfo (&savageScreen->optionCache,
 		       __driConfigOptions, __driNConfigOptions);
 
-   if (glx_enable_extension != NULL) {
-      (*glx_enable_extension)(sPriv->psc->screenConfigs,
-			      "GLX_SGI_make_current_read");
-   }
+   sPriv->extensions = savageScreenExtensions;
 
 #if 0
    savageDDFastPathInit();
@@ -295,34 +293,6 @@ savageDestroyScreen(__DRIscreenPrivate *sPriv)
    sPriv->private = NULL;
 }
 
-#if 0
-GLvisual *XMesaCreateVisual(Display *dpy,
-                            __DRIscreenPrivate *driScrnPriv,
-                            const XVisualInfo *visinfo,
-                            const __GLXvisualConfig *config)
-{
-   /* Drivers may change the args to _mesa_create_visual() in order to
-    * setup special visuals.
-    */
-   return _mesa_create_visual( config->rgba,
-                               config->doubleBuffer,
-                               config->stereo,
-                               _mesa_bitcount(visinfo->red_mask),
-                               _mesa_bitcount(visinfo->green_mask),
-                               _mesa_bitcount(visinfo->blue_mask),
-                               config->alphaSize,
-                               0, /* index bits */
-                               config->depthSize,
-                               config->stencilSize,
-                               config->accumRedSize,
-                               config->accumGreenSize,
-                               config->accumBlueSize,
-                               config->accumAlphaSize,
-                               0 /* num samples */ );
-}
-#endif
-
-
 static GLboolean
 savageCreateContext( const __GLcontextModes *mesaVis,
 		     __DRIcontextPrivate *driContextPriv,
@@ -525,7 +495,7 @@ savageCreateContext( const __GLcontextModes *mesaVis,
 					    "enable_fastpath");
    /* DRM versions before 2.1.3 would only render triangle lists. ELTS
     * support was added in 2.2.0. */
-   if (imesa->enable_fastpath && sPriv->drmMinor < 2) {
+   if (imesa->enable_fastpath && sPriv->drm_version.minor < 2) {
       fprintf (stderr,
 	       "*** Disabling fast path because your DRM version is buggy "
 	       "or doesn't\n*** support ELTS. You need at least Savage DRM "
@@ -732,7 +702,7 @@ void savageXMesaSetClipRects(savageContextPtr imesa)
    __DRIdrawablePrivate *dPriv = imesa->driDrawable;
 
    if ((dPriv->numBackClipRects == 0)
-       || (imesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT)) {
+       || (imesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT)) {
       imesa->numClipRects = dPriv->numClipRects;
       imesa->pClipRects = dPriv->pClipRects;
       imesa->drawX = dPriv->x;
@@ -917,32 +887,18 @@ void savageGetLock( savageContextPtr imesa, GLuint flags )
    }
 }
 
-
-
-static const struct __DriverAPIRec savageAPI = {
-   savageInitDriver,
-   savageDestroyScreen,
-   savageCreateContext,
-   savageDestroyContext,
-   savageCreateBuffer,
-   savageDestroyBuffer,
-   savageSwapBuffers,
-   savageMakeCurrent,
-   savageUnbindContext
-};
-
-
-static __GLcontextModes *
-savageFillInModes( unsigned pixel_bits, unsigned depth_bits,
+static const  __DRIconfig **
+savageFillInModes( __DRIscreenPrivate *psp,
+		   unsigned pixel_bits, unsigned depth_bits,
 		   unsigned stencil_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
+    __DRIconfig **configs;
     __GLcontextModes * m;
-    unsigned num_modes;
     unsigned depth_buffer_factor;
     unsigned back_buffer_factor;
     GLenum fb_format;
     GLenum fb_type;
+    int i;
 
     /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
      * enough to add support.  Basically, if a context is created with an
@@ -973,8 +929,6 @@ savageFillInModes( unsigned pixel_bits, unsigned depth_bits,
     depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
     back_buffer_factor  = (have_back_buffer) ? 2 : 1;
 
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -984,21 +938,11 @@ savageFillInModes( unsigned pixel_bits, unsigned depth_bits,
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
-
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR ) ) {
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor,
+			       back_buffer_modes, back_buffer_factor);
+    if (configs == NULL) {
 	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
 		 __func__, __LINE__ );
 	return NULL;
@@ -1006,74 +950,68 @@ savageFillInModes( unsigned pixel_bits, unsigned depth_bits,
 
     /* Mark the visual as slow if there are "fake" stencil bits.
      */
-    for ( m = modes ; m != NULL ; m = m->next ) {
-	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
+    for (i = 0; configs[i]; i++) {
+	m = &configs[i]->modes;
+	if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
 	    m->visualRating = GLX_SLOW_CONFIG;
 	}
     }
 
-    return modes;
+    return (const __DRIconfig **) configs;
 }
 
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
+static const __DRIconfig **
+savageInitScreen(__DRIscreenPrivate *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 2, 0, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 2, 1, 0 };
-
-   dri_interface = interface;
+   SAVAGEDRIPtr dri_priv = (SAVAGEDRIPtr)psp->pDevPriv;
 
    if ( ! driCheckDriDdxDrmVersions2( "Savage",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
-      
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &savageAPI);
-   if ( psp != NULL ) {
-      SAVAGEDRIPtr dri_priv = (SAVAGEDRIPtr)psp->pDevPriv;
-      *driver_modes = savageFillInModes( dri_priv->cpp*8,
-					 (dri_priv->cpp == 2) ? 16 : 24,
-					 (dri_priv->cpp == 2) ? 0  : 8,
-					 (dri_priv->backOffset != dri_priv->depthOffset) );
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
 
-   return (void *) psp;
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+   if (!savageInitDriver(psp))
+       return NULL;
+
+   return savageFillInModes( psp,
+			     dri_priv->cpp*8,
+			     (dri_priv->cpp == 2) ? 16 : 24,
+			     (dri_priv->cpp == 2) ? 0  : 8,
+			     (dri_priv->backOffset != dri_priv->depthOffset) );
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   savageInitScreen, 
+   savageDestroyScreen,
+   savageCreateContext,
+   savageDestroyContext,
+   savageCreateBuffer,
+   savageDestroyBuffer,
+   savageSwapBuffers,
+   savageMakeCurrent,
+   savageUnbindContext
+};
diff --git a/src/mesa/drivers/dri/savage/savagecontext.h b/src/mesa/drivers/dri/savage/savagecontext.h
index 3fe3d71d4ec..fd6399d6a6f 100644
--- a/src/mesa/drivers/dri/savage/savagecontext.h
+++ b/src/mesa/drivers/dri/savage/savagecontext.h
@@ -33,13 +33,13 @@ typedef struct savage_texture_object_t *savageTextureObjectPtr;
 
 #include <X11/Xlibint.h>
 #include "dri_util.h"
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "xf86drm.h"
 #include "drm.h"
 #include "savage_drm.h"
 #include "savage_init.h"
 #include "savage_3d_reg.h"
-#include "mm.h"
+#include "main/mm.h"
 #include "tnl/t_vertex.h"
 
 #include "texmem.h"
diff --git a/src/mesa/drivers/dri/savage/savagedd.c b/src/mesa/drivers/dri/savage/savagedd.c
index a5c5310e287..32ca86de8ae 100644
--- a/src/mesa/drivers/dri/savage/savagedd.c
+++ b/src/mesa/drivers/dri/savage/savagedd.c
@@ -23,12 +23,12 @@
  */
 
 
-#include "mtypes.h"
-#include "framebuffer.h"
+#include "main/mtypes.h"
+#include "main/framebuffer.h"
 
 #include <stdio.h>
 
-#include "mm.h"
+#include "main/mm.h"
 #include "swrast/swrast.h"
 
 #include "savagedd.h"
@@ -37,7 +37,7 @@
 #include "savagetex.h"
 #include "savagetris.h"
 #include "savagecontext.h"
-#include "extensions.h"
+#include "main/extensions.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/savage/savagedd.h b/src/mesa/drivers/dri/savage/savagedd.h
index ae167be7008..698a8d5de92 100644
--- a/src/mesa/drivers/dri/savage/savagedd.h
+++ b/src/mesa/drivers/dri/savage/savagedd.h
@@ -26,7 +26,7 @@
 #ifndef SAVAGEDD_INC
 #define SAVAGEDD_INC
 
-#include "context.h"
+#include "main/context.h"
 
 void savageDDInitDriverFuncs( GLcontext *ctx );
 #endif
diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c
index bea9a3ea535..948ed18419e 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.c
+++ b/src/mesa/drivers/dri/savage/savageioctl.c
@@ -27,14 +27,14 @@
 #include <unistd.h>
 #include <sys/mman.h>
 
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
-#include "context.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/dd.h"
+#include "main/context.h"
+#include "main/colormac.h"
+#include "main/mm.h"
 #include "swrast/swrast.h"
-#include "colormac.h"
 
-#include "mm.h"
 #include "savagecontext.h"
 #include "savageioctl.h"
 #include "savage_bci.h"
diff --git a/src/mesa/drivers/dri/savage/savageioctl.h b/src/mesa/drivers/dri/savage/savageioctl.h
index 98629048aef..639605cc517 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.h
+++ b/src/mesa/drivers/dri/savage/savageioctl.h
@@ -64,19 +64,19 @@ void savageSwapBuffers( __DRIdrawablePrivate *dPriv );
 
 extern void savageGetDMABuffer( savageContextPtr imesa );
 
-static __inline
+static INLINE
 void savageReleaseIndexedVerts( savageContextPtr imesa )
 {
     imesa->firstElt = -1;
 }
 
-static __inline
+static INLINE
 GLboolean savageHaveIndexedVerts( savageContextPtr imesa )
 {
     return (imesa->firstElt != -1);
 }
 
-static __inline
+static INLINE
 uint32_t *savageAllocVtxBuf( savageContextPtr imesa, GLuint words )
 {
    struct savage_vtxbuf_t *buffer = imesa->vtxBuf;
@@ -115,7 +115,7 @@ uint32_t *savageAllocVtxBuf( savageContextPtr imesa, GLuint words )
    return head;
 }
 
-static __inline
+static INLINE
 uint32_t *savageAllocIndexedVerts( savageContextPtr imesa, GLuint n )
 {
     uint32_t *ret;
@@ -131,7 +131,7 @@ uint32_t *savageAllocIndexedVerts( savageContextPtr imesa, GLuint n )
  * - Actually allocate entries for the indices in the command buffer.
  *   (This allocation must succeed without wrapping the cmd buffer!)
  */
-static __inline
+static INLINE
 void savageFlushElts( savageContextPtr imesa )
 {
     if (imesa->elts.cmd) {
@@ -148,7 +148,7 @@ void savageFlushElts( savageContextPtr imesa )
 /* Allocate a command buffer entry with <bytes> bytes of arguments:
  * - implies savageFlushElts
  */
-static __inline
+static INLINE
 drm_savage_cmd_header_t *savageAllocCmdBuf( savageContextPtr imesa, GLuint bytes )
 {
     drm_savage_cmd_header_t *ret;
@@ -171,7 +171,7 @@ drm_savage_cmd_header_t *savageAllocCmdBuf( savageContextPtr imesa, GLuint bytes
  *   incomplete indexed drawing command yet
  * - increments the number of elts. Final allocation is done in savageFlushElts
  */
-static __inline
+static INLINE
 uint16_t *savageAllocElts( savageContextPtr imesa, GLuint n )
 {
     uint16_t *ret;
diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c
index 514434c4271..32c74f9467e 100644
--- a/src/mesa/drivers/dri/savage/savagerender.c
+++ b/src/mesa/drivers/dri/savage/savagerender.c
@@ -27,11 +27,11 @@
  * dma buffers.  Use strip/fan hardware primitives where possible.
  * Simulate missing primitives with indexed vertices.
  */
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
 #include "tnl/t_context.h"
 
@@ -198,7 +198,7 @@ static GLboolean savage_run_render( GLcontext *ctx,
 
    for (i = 0 ; i < VB->PrimitiveCount ; i++)
    {
-      GLuint prim = VB->Primitive[i].mode;
+      GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
       GLuint start = VB->Primitive[i].start;
       GLuint length = VB->Primitive[i].count;
 
diff --git a/src/mesa/drivers/dri/savage/savagespan.c b/src/mesa/drivers/dri/savage/savagespan.c
index 61ab9e6d64a..9615e34013c 100644
--- a/src/mesa/drivers/dri/savage/savagespan.c
+++ b/src/mesa/drivers/dri/savage/savagespan.c
@@ -22,7 +22,7 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 #include "savagedd.h"
 #include "savagespan.h"
 #include "savageioctl.h"
@@ -93,6 +93,8 @@
 /* 16 bit integer depthbuffer functions
  * Depth range is reversed. See also savageCalcViewport.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d ) \
     *(GLushort *)(buf + ((_x)<<1) + (_y)*pitch) = 0xFFFF - d
 
@@ -107,6 +109,8 @@
 
 /* 16 bit float depthbuffer functions
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d ) \
     *(GLushort *)(buf + ((_x)<<1) + (_y)*pitch) = \
         savageEncodeFloat16( 1.0 - (GLfloat)d/65535.0 )
@@ -125,6 +129,8 @@
 /* 8-bit stencil /24-bit integer depth depthbuffer functions.
  * Depth range is reversed. See also savageCalcViewport.
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) do {				\
    GLuint tmp = *(GLuint *)(buf + ((_x)<<2) + (_y)*pitch);	\
    tmp &= 0xFF000000;						\
@@ -143,6 +149,8 @@
 
 /* 24 bit float depthbuffer functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) do {				\
     GLuint tmp = *(GLuint *)(buf + ((_x)<<2) + (_y)*pitch);	\
     tmp &= 0xFF000000;						\
diff --git a/src/mesa/drivers/dri/savage/savagespan.h b/src/mesa/drivers/dri/savage/savagespan.h
index f6a312e820e..53a7f8b97c8 100644
--- a/src/mesa/drivers/dri/savage/savagespan.h
+++ b/src/mesa/drivers/dri/savage/savagespan.h
@@ -55,7 +55,7 @@ savageSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis,
  *
  * Note that there is no encoding for numbers < 2^-16.
  */
-static __inline GLuint savageEncodeFloat16( GLdouble x )
+static INLINE GLuint savageEncodeFloat16( GLdouble x )
 {
     GLint r = (GLint)(x * 0x10000000);
     GLint exp = 0;
@@ -67,7 +67,7 @@ static __inline GLuint savageEncodeFloat16( GLdouble x )
     }
     return exp > 0xf ? 0xffff : (r - 0x1000) | (exp << 12);
 }
-static __inline GLdouble savageDecodeFloat16( GLuint x )
+static INLINE GLdouble savageDecodeFloat16( GLuint x )
 {
     static const GLdouble pow2[16] = {
 	1.0/(1<<28), 1.0/(1<<27), 1.0/(1<<26), 1.0/(1<<25),
@@ -92,7 +92,7 @@ static __inline GLdouble savageDecodeFloat16( GLuint x )
  *
  * Details analogous to the 16-bit format.
  */
-static __inline GLuint savageEncodeFloat24( GLdouble x )
+static INLINE GLuint savageEncodeFloat24( GLdouble x )
 {
     int64_t r = (int64_t)(x * ((int64_t)1 << (19+32)));
     GLint exp = 0;
@@ -105,7 +105,7 @@ static __inline GLuint savageEncodeFloat24( GLdouble x )
     return exp > 0x1f ? 0xffffff : (r - 0x80000) | (exp << 19);
 }
 #define _1 (int64_t)1
-static __inline GLdouble savageDecodeFloat24( GLuint x )
+static INLINE GLdouble savageDecodeFloat24( GLuint x )
 {
     static const GLdouble pow2[32] = {
 	1.0/(_1<<51), 1.0/(_1<<50), 1.0/(_1<<49), 1.0/(_1<<48),
diff --git a/src/mesa/drivers/dri/savage/savagestate.c b/src/mesa/drivers/dri/savage/savagestate.c
index 84fd3157edf..73d85ed57b4 100644
--- a/src/mesa/drivers/dri/savage/savagestate.c
+++ b/src/mesa/drivers/dri/savage/savagestate.c
@@ -25,12 +25,12 @@
 
 #include <stdio.h>
 
-#include "mtypes.h"
-#include "enums.h"
-#include "macros.h"
-#include "dd.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/macros.h"
+#include "main/dd.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "savagedd.h"
 #include "savagecontext.h"
 
@@ -76,7 +76,7 @@
 static void savageBlendFunc_s4(GLcontext *);
 static void savageBlendFunc_s3d(GLcontext *);
 
-static __inline__ GLuint savagePackColor(GLuint format, 
+static INLINE GLuint savagePackColor(GLuint format, 
                                          GLubyte r, GLubyte g, 
                                          GLubyte b, GLubyte a)
 {
@@ -640,15 +640,17 @@ static void savageDDDrawBuffer(GLcontext *ctx, GLenum mode )
     savageContextPtr imesa = SAVAGE_CONTEXT(ctx);
     uint32_t destCtrl = imesa->regs.s4.destCtrl.ui;
 
-    /*
-     * _DrawDestMask is easier to cope with than <mode>.
-     */
-    switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-    case BUFFER_BIT_FRONT_LEFT:
+    if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+	FALLBACK( ctx, SAVAGE_FALLBACK_DRAW_BUFFER, GL_TRUE );
+        return;
+    }
+
+    switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+    case BUFFER_FRONT_LEFT:
         imesa->IsDouble = GL_FALSE;
 	imesa->regs.s4.destCtrl.ni.offset = imesa->savageScreen->frontOffset>>11;
 	break;
-    case BUFFER_BIT_BACK_LEFT:
+    case BUFFER_BACK_LEFT:
         imesa->IsDouble = GL_TRUE;
 	imesa->regs.s4.destCtrl.ni.offset = imesa->savageScreen->backOffset>>11;
 	break;
diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c
index dbe30d4c947..a3bebfa8cf7 100644
--- a/src/mesa/drivers/dri/savage/savagetex.c
+++ b/src/mesa/drivers/dri/savage/savagetex.c
@@ -28,22 +28,21 @@
 
 #include <GL/gl.h>
 
-#include "mm.h"
+#include "main/mm.h"
 #include "savagecontext.h"
 #include "savagetex.h"
 #include "savagetris.h"
 #include "savageioctl.h"
-#include "simple_list.h"
-#include "enums.h"
+#include "main/simple_list.h"
+#include "main/enums.h"
 #include "savage_bci.h"
 
-#include "macros.h"
-#include "texformat.h"
-#include "texstore.h"
-#include "texobj.h"
-
-#include "convolve.h"
-#include "colormac.h"
+#include "main/macros.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/texobj.h"
+#include "main/convolve.h"
+#include "main/colormac.h"
 
 #include "swrast/swrast.h"
 
@@ -101,7 +100,7 @@ static const savageTileInfo tileInfo_s3d_s4[5] = {
  * \param w   width in bytes
  */
 #define SUBTILE_FUNC(w,h)					\
-static __inline GLubyte *savageUploadSubtile_##w##x##h		\
+static INLINE GLubyte *savageUploadSubtile_##w##x##h		\
 (GLubyte *dest, GLubyte *src, GLuint srcStride)			\
 {								\
     GLuint y;							\
@@ -1016,7 +1015,7 @@ static void savageUploadTexImages( savageContextPtr imesa, savageTexObjPtr t )
       /* Heap timestamps are only reliable with Savage DRM 2.3.x or
        * later. Earlier versions had only 16 bit time stamps which
        * would wrap too frequently. */
-      if (imesa->savageScreen->driScrnPriv->drmMinor >= 3) {
+      if (imesa->savageScreen->driScrnPriv->drm_version.minor >= 3) {
 	  unsigned int heap = t->base.heap->heapId;
 	  LOCK_HARDWARE(imesa);
 	  savageWaitEvent (imesa, imesa->textureHeaps[heap]->timestamp);
@@ -1713,7 +1712,7 @@ static void savageTimestampTextures( savageContextPtr imesa )
     * Only useful with long-lived 32-bit event tags available
     * with Savage DRM 2.3.x or later. */
    if ((imesa->CurrentTexObj[0] || imesa->CurrentTexObj[1]) &&
-       imesa->savageScreen->driScrnPriv->drmMinor >= 3) {
+       imesa->savageScreen->driScrnPriv->drm_version.minor >= 3) {
        unsigned int e;
        FLUSH_BATCH(imesa);
        e = savageEmitEvent(imesa, SAVAGE_WAIT_3D);
diff --git a/src/mesa/drivers/dri/savage/savagetex.h b/src/mesa/drivers/dri/savage/savagetex.h
index f1ee7224145..e5f8a80f85d 100644
--- a/src/mesa/drivers/dri/savage/savagetex.h
+++ b/src/mesa/drivers/dri/savage/savagetex.h
@@ -26,7 +26,7 @@
 #ifndef SAVAGETEX_INC
 #define SAVAGETEX_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 #include "savagecontext.h"
 #include "texmem.h"
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index a1c7bb167e7..c04763b40e1 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -37,10 +37,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <stdio.h>
 #include <math.h>
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -95,7 +95,7 @@ do {						\
 } while (0)
 #endif
 
-static void __inline__ savage_draw_triangle (savageContextPtr imesa,
+static void INLINE savage_draw_triangle (savageContextPtr imesa,
 					     savageVertexPtr v0,
 					     savageVertexPtr v1,
 					     savageVertexPtr v2) {
@@ -108,7 +108,7 @@ static void __inline__ savage_draw_triangle (savageContextPtr imesa,
    EMIT_VERT (j, vb, vertsize, 0, v2);
 }
 
-static void __inline__ savage_draw_quad (savageContextPtr imesa,
+static void INLINE savage_draw_quad (savageContextPtr imesa,
 					 savageVertexPtr v0,
 					 savageVertexPtr v1,
 					 savageVertexPtr v2,
@@ -125,7 +125,7 @@ static void __inline__ savage_draw_quad (savageContextPtr imesa,
    EMIT_VERT (j, vb, vertsize, 0, v3);
 }
 
-static __inline__ void savage_draw_point (savageContextPtr imesa,
+static INLINE void savage_draw_point (savageContextPtr imesa,
 					  savageVertexPtr tmp) {
    GLuint vertsize = imesa->HwVertexSize;
    uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize);
@@ -161,7 +161,7 @@ static __inline__ void savage_draw_point (savageContextPtr imesa,
    EMIT_VERT (j, vb, vertsize, 2, tmp);
 }
 
-static __inline__ void savage_draw_line (savageContextPtr imesa,
+static INLINE void savage_draw_line (savageContextPtr imesa,
 					 savageVertexPtr v0,
 					 savageVertexPtr v1 ) {
    GLuint vertsize = imesa->HwVertexSize;
@@ -219,7 +219,7 @@ do {							\
    tmp.f[vertex_size-1] *= rhw;				\
 } while (0)
 
-static void __inline__ savage_ptex_tri (savageContextPtr imesa,
+static void INLINE savage_ptex_tri (savageContextPtr imesa,
 					savageVertexPtr v0,
 					savageVertexPtr v1,
 					savageVertexPtr v2) {
@@ -233,7 +233,7 @@ static void __inline__ savage_ptex_tri (savageContextPtr imesa,
    PTEX_VERTEX (j, tmp, vertsize, 0, v2); EMIT_VERT (j, vb, vertsize, 0, &tmp);
 }
 
-static __inline__ void savage_ptex_line (savageContextPtr imesa,
+static INLINE void savage_ptex_line (savageContextPtr imesa,
 					 savageVertexPtr v0,
 					 savageVertexPtr v1 ) {
    GLuint vertsize = imesa->HwVertexSize;
@@ -281,7 +281,7 @@ static __inline__ void savage_ptex_line (savageContextPtr imesa,
    EMIT_VERT (j, vb, vertsize, 2, &tmp1);
 } 
 
-static __inline__ void savage_ptex_point (savageContextPtr imesa,
+static INLINE void savage_ptex_point (savageContextPtr imesa,
 					  savageVertexPtr v0) {
    GLuint vertsize = imesa->HwVertexSize;
    uint32_t *vb = savageAllocVtxBuf (imesa, 6*vertsize);
@@ -934,7 +934,7 @@ do {									\
 #define SAVAGE_EMIT_ST1  0x0300
 
 
-static __inline__ GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )
+static INLINE GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )
 {
    savageContextPtr imesa = SAVAGE_CONTEXT(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -997,7 +997,7 @@ static __inline__ GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )
 }
 
 
-static __inline__ GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
+static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
 {
    savageContextPtr imesa = SAVAGE_CONTEXT(ctx);
    TNLcontext *tnl = TNL_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/savage/savagetris.h b/src/mesa/drivers/dri/savage/savagetris.h
index b2b3d951c68..a2a9375ed54 100644
--- a/src/mesa/drivers/dri/savage/savagetris.h
+++ b/src/mesa/drivers/dri/savage/savagetris.h
@@ -36,7 +36,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef __R128_TRIS_H__
 #define __R128_TRIS_H__
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void savageInitTriFuncs( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/sis/sis6326_clear.c b/src/mesa/drivers/dri/sis/sis6326_clear.c
index 48db19566c6..d46ecc9cd27 100644
--- a/src/mesa/drivers/dri/sis/sis6326_clear.c
+++ b/src/mesa/drivers/dri/sis/sis6326_clear.c
@@ -32,7 +32,7 @@
 #include "sis_reg.h"
 
 #include "swrast/swrast.h"
-#include "macros.h"
+#include "main/macros.h"
 
 static void sis_clear_front_buffer(GLcontext *ctx, GLenum mask, GLint x,
 				   GLint y, GLint width, GLint height);
diff --git a/src/mesa/drivers/dri/sis/sis6326_state.c b/src/mesa/drivers/dri/sis/sis6326_state.c
index 08402fb3e2a..65d4c064660 100644
--- a/src/mesa/drivers/dri/sis/sis6326_state.c
+++ b/src/mesa/drivers/dri/sis/sis6326_state.c
@@ -33,9 +33,9 @@
 #include "sis_tex.h"
 #include "sis_reg.h"
 
-#include "context.h"
-#include "enums.h"
-#include "colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -497,25 +497,27 @@ void sis6326DDDrawBuffer( GLcontext *ctx, GLenum mode )
    __GLSiSHardware *current = &smesa->current;
 
    if(getenv("SIS_DRAW_FRONT"))
-      ctx->DrawBuffer->_ColorDrawBufferMask[0] = GL_FRONT_LEFT;
+      ctx->DrawBuffer->_ColorDrawBufferIndexes[0] = BUFFER_FRONT_LEFT;
+
+   if (ctx->DrawBuffer->_NumColorDrawBuffers > 1) {
+      FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
 
-   /*
-    * _DrawDestMask is easier to cope with than <mode>.
-    */
    current->hwDstSet &= ~MASK_DstBufferPitch;
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       current->hwOffsetDest = smesa->front.offset;
       current->hwDstSet |= smesa->front.pitch;
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       current->hwOffsetDest = smesa->back.offset;
       current->hwDstSet |= smesa->back.pitch;
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
    default:
-      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
diff --git a/src/mesa/drivers/dri/sis/sis_clear.c b/src/mesa/drivers/dri/sis/sis_clear.c
index 174f3c07686..323383da62a 100644
--- a/src/mesa/drivers/dri/sis/sis_clear.c
+++ b/src/mesa/drivers/dri/sis/sis_clear.c
@@ -36,7 +36,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_lock.h"
 
 #include "swrast/swrast.h"
-#include "macros.h"
+#include "main/macros.h"
 
 static GLbitfield sis_3D_Clear( GLcontext * ctx, GLbitfield mask,
 				GLint x, GLint y, GLint width,
diff --git a/src/mesa/drivers/dri/sis/sis_context.c b/src/mesa/drivers/dri/sis/sis_context.c
index 04c7464c5e2..00d17da3bad 100644
--- a/src/mesa/drivers/dri/sis/sis_context.c
+++ b/src/mesa/drivers/dri/sis/sis_context.c
@@ -42,11 +42,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_tris.h"
 #include "sis_alloc.h"
 
-#include "imports.h"
-#include "matrix.h"
-#include "extensions.h"
+#include "main/imports.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
 #include "utils.h"
-#include "framebuffer.h"
+#include "main/framebuffer.h"
 
 #include "drivers/common/driverfuncs.h"
 
diff --git a/src/mesa/drivers/dri/sis/sis_context.h b/src/mesa/drivers/dri/sis/sis_context.h
index b81812d6cec..bc53cb5efa1 100644
--- a/src/mesa/drivers/dri/sis/sis_context.h
+++ b/src/mesa/drivers/dri/sis/sis_context.h
@@ -34,7 +34,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef _sis_ctx_h_
 #define _sis_ctx_h_
 
-#include "context.h"
+#include "main/context.h"
 #include "dri_util.h"
 #include "drm.h"
 #include "drm_sarea.h"
@@ -400,8 +400,10 @@ struct sis_context
 #define MMIO_READ(reg) *(volatile GLint *)(smesa->IOBase + (reg))
 #define MMIO_READf(reg) *(volatile GLfloat *)(smesa->IOBase + (reg))
 
-#if defined(__i386__) || defined(__amd64__)
+#if defined(__i386__) || defined(__x86_64__)
 #define MMIO_WMB()	__asm __volatile("" : : : "memory")
+#elif defined(__ia64__)
+#define MMIO_WMB()	__asm __volatile("mf" : : : "memory")
 #else
 #error platform needs WMB
 #endif
diff --git a/src/mesa/drivers/dri/sis/sis_dd.c b/src/mesa/drivers/dri/sis/sis_dd.c
index 989c159a809..bddc4a9285c 100644
--- a/src/mesa/drivers/dri/sis/sis_dd.c
+++ b/src/mesa/drivers/dri/sis/sis_dd.c
@@ -41,8 +41,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_tris.h"
 
 #include "swrast/swrast.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "utils.h"
 
diff --git a/src/mesa/drivers/dri/sis/sis_fog.c b/src/mesa/drivers/dri/sis/sis_fog.c
index ba5ac908512..517d5722e6a 100644
--- a/src/mesa/drivers/dri/sis/sis_fog.c
+++ b/src/mesa/drivers/dri/sis/sis_fog.c
@@ -35,7 +35,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_state.h"
 #include "swrast/swrast.h"
 
-#include "macros.h"
+#include "main/macros.h"
 
 static GLint convertFtToFogFt( GLfloat dwInValue );
 static GLint doFPtoFixedNoRound( GLfloat dwInValue, int nFraction );
diff --git a/src/mesa/drivers/dri/sis/sis_lock.c b/src/mesa/drivers/dri/sis/sis_lock.c
index 0ea64e34988..806110cad4d 100644
--- a/src/mesa/drivers/dri/sis/sis_lock.c
+++ b/src/mesa/drivers/dri/sis/sis_lock.c
@@ -28,7 +28,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Eric Anholt <anholt@FreeBSD.org>
  */
 
-#include "context.h"
+#include "main/context.h"
 #include "sis_context.h"
 #include "sis_lock.h"
 #include "sis_dd.h"
diff --git a/src/mesa/drivers/dri/sis/sis_screen.c b/src/mesa/drivers/dri/sis/sis_screen.c
index f55027e0945..b1a5d15236f 100644
--- a/src/mesa/drivers/dri/sis/sis_screen.c
+++ b/src/mesa/drivers/dri/sis/sis_screen.c
@@ -30,11 +30,11 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "dri_util.h"
 
-#include "context.h"
+#include "main/context.h"
 #include "utils.h"
-#include "imports.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/imports.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "sis_context.h"
 #include "sis_dri.h"
@@ -64,12 +64,10 @@ static const GLuint __driNConfigOptions = 3;
 
 extern const struct dri_extension card_extensions[];
 
-static __GLcontextModes *
-sisFillInModes(int bpp)
+static const __DRIconfig **
+sisFillInModes(__DRIscreenPrivate *psp, int bpp)
 {
-   __GLcontextModes *modes;
-   __GLcontextModes *m;
-   unsigned num_modes;
+   __DRIconfig **configs;
    unsigned depth_buffer_factor;
    unsigned back_buffer_factor;
    GLenum fb_format;
@@ -92,9 +90,6 @@ sisFillInModes(int bpp)
    depth_buffer_factor = 4;
    back_buffer_factor = 2;
 
-   /* Last 4 is for GLX_TRUE_COLOR & GLX_DIRECT_COLOR, with/without accum */
-   num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
    if (bpp == 16) {
       fb_format = GL_RGB;
       fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -103,25 +98,15 @@ sisFillInModes(int bpp)
       fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
    }
 
-   modes = (*dri_interface->createContextModes)(num_modes, sizeof(__GLcontextModes));
-   m = modes;
-   if (!driFillInModes(&m, fb_format, fb_type, depth_bits_array,
-		       stencil_bits_array, depth_buffer_factor,
-		       back_buffer_modes, back_buffer_factor,
-		       GLX_TRUE_COLOR)) {
-      fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__, __LINE__);
-      return NULL;
-   }
-
-   if (!driFillInModes(&m, fb_format, fb_type, depth_bits_array,
-		       stencil_bits_array, depth_buffer_factor,
-		       back_buffer_modes, back_buffer_factor,
-		       GLX_DIRECT_COLOR)) {
+   configs = driCreateConfigs(fb_format, fb_type, depth_bits_array,
+			      stencil_bits_array, depth_buffer_factor,
+			      back_buffer_modes, back_buffer_factor);
+   if (configs == NULL) {
       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__, __LINE__);
       return NULL;
    }
 
-   return modes;
+   return (const __DRIconfig **) configs;
 }
 
 
@@ -287,23 +272,52 @@ sisSwapBuffers(__DRIdrawablePrivate *dPriv)
 }
 
 
-/* Initialize the driver specific screen private data.
+/**
+ * This is the driver specific part of the createNewScreen entry point.
+ * 
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-static GLboolean
-sisInitDriver( __DRIscreenPrivate *sPriv )
+static const __DRIconfig **
+sisInitScreen(__DRIscreenPrivate *psp)
 {
-   sPriv->private = (void *) sisCreateScreen( sPriv );
+   static const __DRIversion ddx_expected = {0, 8, 0};
+   static const __DRIversion dri_expected = {4, 0, 0};
+   static const __DRIversion drm_expected = {1, 0, 0};
+   static const char *driver_name = "SiS";
+   SISDRIPtr dri_priv = (SISDRIPtr)psp->pDevPriv;
 
-   if ( !sPriv->private ) {
-      sisDestroyScreen( sPriv );
-      return GL_FALSE;
+   if (!driCheckDriDdxDrmVersions2(driver_name,
+				   &psp->dri_version, &dri_expected,
+				   &psp->ddx_version, &ddx_expected,
+				   &psp->drm_version, &drm_expected))
+      return NULL;
+
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+   psp->private = sisCreateScreen(psp);
+
+   if (!psp->private) {
+      sisDestroyScreen(psp);
+      return NULL;
    }
 
-   return GL_TRUE;
+   return sisFillInModes(psp, dri_priv->bytesPerPixel * 8);
 }
 
-static struct __DriverAPIRec sisAPI = {
-   .InitDriver      = sisInitDriver,
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = sisInitScreen,
    .DestroyScreen   = sisDestroyScreen,
    .CreateContext   = sisCreateContext,
    .DestroyContext  = sisDestroyContext,
@@ -313,69 +327,9 @@ static struct __DriverAPIRec sisAPI = {
    .MakeCurrent     = sisMakeCurrent,
    .UnbindContext   = sisUnbindContext,
    .GetSwapInfo     = NULL,
-   .GetMSC          = NULL,
+   .GetDrawableMSC  = NULL,
    .WaitForMSC      = NULL,
    .WaitForSBC      = NULL,
    .SwapBuffersMSC  = NULL
 
 };
-
-
-/**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
- *
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
- */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn,
-			     __DRIscreen *psc,
-			     const __GLcontextModes *modes,
-			     const __DRIversion *ddx_version,
-			     const __DRIversion *dri_version,
-			     const __DRIversion *drm_version,
-			     const __DRIframebuffer *frame_buffer,
-			     drmAddress pSAREA, int fd,
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes **driver_modes )
-
-{
-   __DRIscreenPrivate *psp;
-   static const __DRIversion ddx_expected = {0, 8, 0};
-   static const __DRIversion dri_expected = {4, 0, 0};
-   static const __DRIversion drm_expected = {1, 0, 0};
-   static const char *driver_name = "SiS";
-   dri_interface = interface;
-
-   if (!driCheckDriDdxDrmVersions2(driver_name, dri_version, &dri_expected,
-				   ddx_version, &ddx_expected,
-				   drm_version, &drm_expected)) {
-      return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &sisAPI);
-   if (psp != NULL) {
-      SISDRIPtr dri_priv = (SISDRIPtr)psp->pDevPriv;
-      *driver_modes = sisFillInModes(dri_priv->bytesPerPixel * 8);
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
-
-   return (void *)psp;
-}
diff --git a/src/mesa/drivers/dri/sis/sis_span.c b/src/mesa/drivers/dri/sis/sis_span.c
index dc50bda877b..9e9a509755d 100644
--- a/src/mesa/drivers/dri/sis/sis_span.c
+++ b/src/mesa/drivers/dri/sis/sis_span.c
@@ -84,6 +84,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* 16 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLushort
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLushort *)(buf + (_x)*2 + (_y)*srb->pitch) = d;
 
@@ -96,6 +98,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* 32 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d )	\
    *(GLuint *)(buf + (_x)*4 + (_y)*srb->pitch) = d;
 
@@ -108,6 +112,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 /* 8/24 bit interleaved depth/stencil functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) {				\
    GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*srb->pitch);	\
    tmp &= 0xff000000;						\
diff --git a/src/mesa/drivers/dri/sis/sis_state.c b/src/mesa/drivers/dri/sis/sis_state.c
index 305c63f73f7..98e8d02fabe 100644
--- a/src/mesa/drivers/dri/sis/sis_state.c
+++ b/src/mesa/drivers/dri/sis/sis_state.c
@@ -37,9 +37,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_lock.h"
 #include "sis_tex.h"
 
-#include "context.h"
-#include "enums.h"
-#include "colormac.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/colormac.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -546,23 +546,24 @@ void sisDDDrawBuffer( GLcontext *ctx, GLenum mode )
    __GLSiSHardware *prev = &smesa->prev;
    __GLSiSHardware *current = &smesa->current;
 
-   /*
-    * _DrawDestMask is easier to cope with than <mode>.
-    */
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
    current->hwDstSet &= ~MASK_DstBufferPitch;
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_FALSE );
       current->hwOffsetDest = smesa->front.offset >> 1;
       current->hwDstSet |= smesa->front.pitch >> 2;
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_FALSE );
       current->hwOffsetDest = smesa->back.offset >> 1;
       current->hwDstSet |= smesa->back.pitch >> 2;
       break;
    default:
-      /* GL_NONE or GL_FRONT_AND_BACK or stereo left&right, etc */
       FALLBACK( smesa, SIS_FALLBACK_DRAW_BUFFER, GL_TRUE );
       return;
    }
diff --git a/src/mesa/drivers/dri/sis/sis_tex.c b/src/mesa/drivers/dri/sis/sis_tex.c
index 5e10c610f80..28ced6cfd5f 100644
--- a/src/mesa/drivers/dri/sis/sis_tex.c
+++ b/src/mesa/drivers/dri/sis/sis_tex.c
@@ -33,11 +33,11 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "sis_tex.h"
 
 #include "swrast/swrast.h"
-#include "imports.h"
-#include "texformat.h"
-#include "texstore.h"
-#include "teximage.h"
-#include "texobj.h"
+#include "main/imports.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
+#include "main/texobj.h"
 
 #include "xmlpool.h"
 
@@ -129,6 +129,8 @@ sisAllocTexImage( sisContextPtr smesa, sisTexObjPtr t, int level,
 static void
 sisFreeTexImage( sisContextPtr smesa, sisTexObjPtr t, int level )
 {
+   assert(level >= 0);
+   assert(level < SIS_MAX_TEXTURE_LEVELS);
    if (t->image[level].Data == NULL)
       return;
 
@@ -212,7 +214,7 @@ sisDeleteTexture( GLcontext * ctx, struct gl_texture_object *texObj )
        */
       return;
    }
-   for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
+   for (i = 0; i < SIS_MAX_TEXTURE_LEVELS; i++) {
       sisFreeTexImage( smesa, t, i );
    }
 
diff --git a/src/mesa/drivers/dri/sis/sis_texstate.c b/src/mesa/drivers/dri/sis/sis_texstate.c
index 4f813bb81c3..63f23fc0149 100644
--- a/src/mesa/drivers/dri/sis/sis_texstate.c
+++ b/src/mesa/drivers/dri/sis/sis_texstate.c
@@ -31,12 +31,12 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Eric Anholt <anholt@FreeBSD.org>
  */
 
-#include "glheader.h"
-#include "imports.h"
-#include "colormac.h"
-#include "context.h"
-#include "macros.h"
-#include "texformat.h"
+#include "main/glheader.h"
+#include "main/imports.h"
+#include "main/colormac.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/texformat.h"
 
 #include "sis_context.h"
 #include "sis_state.h"
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index a0e39dcd3c9..095941aea2e 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -32,10 +32,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  *   Eric Anholt <anholt@FreeBSD.org>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "colormac.h"
-#include "macros.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/macros.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -848,7 +848,7 @@ static void sisRenderStart( GLcontext *ctx )
 
    RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
 
-   if (ctx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT && 
+   if (ctx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT && 
       smesa->driDrawable->numClipRects != 0)
    {
       multipass_cliprect(ctx, 0);
diff --git a/src/mesa/drivers/dri/sis/sis_tris.h b/src/mesa/drivers/dri/sis/sis_tris.h
index 499eb4d24d4..b34fe8c7c98 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.h
+++ b/src/mesa/drivers/dri/sis/sis_tris.h
@@ -32,7 +32,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define __SIS_TRIS_H__
 
 #include "sis_lock.h"
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void sisInitTriFuncs( GLcontext *ctx );
 extern void sisFlushPrims( sisContextPtr smesa );
@@ -47,7 +47,7 @@ do {							\
       sisFlushPrims(smesa);				\
 } while (0)
 
-static __inline GLuint *sisAllocDmaLow(sisContextPtr smesa, int bytes)
+static INLINE GLuint *sisAllocDmaLow(sisContextPtr smesa, int bytes)
 {
    GLuint *start;
 
diff --git a/src/mesa/drivers/dri/sis/sis_tritmp.h b/src/mesa/drivers/dri/sis/sis_tritmp.h
index e670a5bf760..f75e17318fc 100644
--- a/src/mesa/drivers/dri/sis/sis_tritmp.h
+++ b/src/mesa/drivers/dri/sis/sis_tritmp.h
@@ -234,7 +234,7 @@ static void TAG(sis6326_draw_point_mmio)(sisContextPtr smesa, char *verts)
 }
 #endif
 
-static __inline void TAG(sis_vert_init)( void )
+static INLINE void TAG(sis_vert_init)( void )
 {
    sis_tri_func_mmio[SIS_STATES] = TAG(sis_draw_tri_mmio);
    sis_line_func_mmio[SIS_STATES] = TAG(sis_draw_line_mmio);
diff --git a/src/mesa/drivers/dri/swrast/Makefile b/src/mesa/drivers/dri/swrast/Makefile
new file mode 100644
index 00000000000..5f3a4f2191b
--- /dev/null
+++ b/src/mesa/drivers/dri/swrast/Makefile
@@ -0,0 +1,24 @@
+# src/mesa/drivers/dri/swrast/Makefile
+
+TOP = ../../../../..
+include $(TOP)/configs/current
+
+LIBNAME = swrast_dri.so
+
+DRIVER_SOURCES = \
+	swrast.c \
+	swrast_span.c
+
+C_SOURCES = \
+	$(SWRAST_COMMON_SOURCES) \
+	$(DRIVER_SOURCES)
+
+ASM_SOURCES =
+
+SWRAST_COMMON_SOURCES = \
+	../../common/driverfuncs.c \
+	../common/utils.c
+
+include ../Makefile.template
+
+symlinks:
diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
new file mode 100644
index 00000000000..49f1b8b9ee7
--- /dev/null
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright (C) 2008 George Sapountzis <gsap7@yahoo.gr>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * DRI software rasterizer
+ *
+ * This is the mesa swrast module packaged into a DRI driver structure.
+ *
+ * The front-buffer is allocated by the loader. The loader provides read/write
+ * callbacks for access to the front-buffer. The driver uses a scratch row for
+ * front-buffer rendering to avoid repeated calls to the loader.
+ *
+ * The back-buffer is allocated by the driver and is private.
+ */
+
+#include "main/context.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/imports.h"
+#include "main/renderbuffer.h"
+#include "swrast/swrast.h"
+#include "swrast_setup/swrast_setup.h"
+#include "tnl/tnl.h"
+#include "tnl/t_context.h"
+#include "tnl/t_pipeline.h"
+#include "vbo/vbo.h"
+#include "drivers/common/driverfuncs.h"
+#include "utils.h"
+
+#include "swrast_priv.h"
+
+
+#define need_GL_VERSION_1_3
+#define need_GL_VERSION_1_4
+#define need_GL_VERSION_1_5
+#define need_GL_VERSION_2_0
+#define need_GL_VERSION_2_1
+
+/* sw extensions for imaging */
+#define need_GL_EXT_blend_color
+#define need_GL_EXT_blend_minmax
+#define need_GL_EXT_convolution
+#define need_GL_EXT_histogram
+#define need_GL_SGI_color_table
+
+/* sw extensions not associated with some GL version */
+#define need_GL_ARB_shader_objects
+#define need_GL_ARB_vertex_program
+#define need_GL_APPLE_vertex_array_object
+#define need_GL_ATI_fragment_shader
+#define need_GL_EXT_depth_bounds_test
+#define need_GL_EXT_framebuffer_object
+#define need_GL_EXT_framebuffer_blit
+#define need_GL_EXT_gpu_program_parameters
+#define need_GL_EXT_paletted_texture
+#define need_GL_IBM_multimode_draw_arrays
+#define need_GL_MESA_resize_buffers
+#define need_GL_NV_vertex_program
+#define need_GL_NV_fragment_program
+
+#include "extension_helper.h"
+
+const struct dri_extension card_extensions[] =
+{
+    { "GL_VERSION_1_3",			GL_VERSION_1_3_functions },
+    { "GL_VERSION_1_4",			GL_VERSION_1_4_functions },
+    { "GL_VERSION_1_5",			GL_VERSION_1_5_functions },
+    { "GL_VERSION_2_0",			GL_VERSION_2_0_functions },
+    { "GL_VERSION_2_1",			GL_VERSION_2_1_functions },
+
+    { "GL_EXT_blend_color",		GL_EXT_blend_color_functions },
+    { "GL_EXT_blend_minmax",		GL_EXT_blend_minmax_functions },
+    { "GL_EXT_convolution",		GL_EXT_convolution_functions },
+    { "GL_EXT_histogram",		GL_EXT_histogram_functions },
+    { "GL_SGI_color_table",		GL_SGI_color_table_functions },
+
+    { "GL_ARB_shader_objects",		GL_ARB_shader_objects_functions },
+    { "GL_ARB_vertex_program",		GL_ARB_vertex_program_functions },
+    { "GL_APPLE_vertex_array_object",	GL_APPLE_vertex_array_object_functions },
+    { "GL_ATI_fragment_shader",		GL_ATI_fragment_shader_functions },
+    { "GL_EXT_depth_bounds_test",	GL_EXT_depth_bounds_test_functions },
+    { "GL_EXT_framebuffer_object",	GL_EXT_framebuffer_object_functions },
+    { "GL_EXT_framebuffer_blit",	GL_EXT_framebuffer_blit_functions },
+    { "GL_EXT_gpu_program_parameters",	GL_EXT_gpu_program_parameters_functions },
+    { "GL_EXT_paletted_texture",	GL_EXT_paletted_texture_functions },
+    { "GL_IBM_multimode_draw_arrays",	GL_IBM_multimode_draw_arrays_functions },
+    { "GL_MESA_resize_buffers",		GL_MESA_resize_buffers_functions },
+    { "GL_NV_vertex_program",		GL_NV_vertex_program_functions },
+    { "GL_NV_fragment_program",		GL_NV_fragment_program_functions },
+    { NULL,				NULL }
+};
+
+
+/**
+ * Screen and config-related functions
+ */
+
+static void
+setupLoaderExtensions(__DRIscreen *psp,
+		      const __DRIextension **extensions)
+{
+    int i;
+
+    for (i = 0; extensions[i]; i++) {
+	if (strcmp(extensions[i]->name, __DRI_SWRAST_LOADER) == 0)
+	    psp->swrast_loader = (__DRIswrastLoaderExtension *) extensions[i];
+    }
+}
+
+static __DRIconfig **
+swrastFillInModes(__DRIscreen *psp,
+		  unsigned pixel_bits, unsigned depth_bits,
+		  unsigned stencil_bits, GLboolean have_back_buffer)
+{
+    __DRIconfig **configs;
+    unsigned depth_buffer_factor;
+    unsigned back_buffer_factor;
+    GLenum fb_format;
+    GLenum fb_type;
+
+    /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
+     * support pageflipping at all.
+     */
+    static const GLenum back_buffer_modes[] = {
+	GLX_NONE, GLX_SWAP_UNDEFINED_OML
+    };
+
+    uint8_t depth_bits_array[4];
+    uint8_t stencil_bits_array[4];
+
+    depth_bits_array[0] = 0;
+    depth_bits_array[1] = 0;
+    depth_bits_array[2] = depth_bits;
+    depth_bits_array[3] = depth_bits;
+
+    /* Just like with the accumulation buffer, always provide some modes
+     * with a stencil buffer.
+     */
+    stencil_bits_array[0] = 0;
+    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
+    stencil_bits_array[2] = 0;
+    stencil_bits_array[3] = (stencil_bits == 0) ? 8 : stencil_bits;
+
+    depth_buffer_factor = 4;
+    back_buffer_factor = 2;
+
+    if (pixel_bits == 8) {
+	fb_format = GL_RGB;
+	fb_type = GL_UNSIGNED_BYTE_2_3_3_REV;
+    }
+    else if (pixel_bits == 16) {
+	fb_format = GL_RGB;
+	fb_type = GL_UNSIGNED_SHORT_5_6_5;
+    }
+    else {
+	fb_format = GL_BGRA;
+	fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
+    }
+
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor, back_buffer_modes,
+			       back_buffer_factor);
+    if (configs == NULL) {
+	fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+		__LINE__);
+	return NULL;
+    }
+
+    return configs;
+}
+
+static __DRIscreen *
+driCreateNewScreen(int scrn, const __DRIextension **extensions,
+		   const __DRIconfig ***driver_configs, void *data)
+{
+    static const __DRIextension *emptyExtensionList[] = { NULL };
+    __DRIscreen *psp;
+    __DRIconfig **configs8, **configs16, **configs32;
+
+    (void) data;
+
+    TRACE;
+
+    psp = _mesa_calloc(sizeof(*psp));
+    if (!psp)
+	return NULL;
+
+    setupLoaderExtensions(psp, extensions);
+
+    psp->num = scrn;
+    psp->extensions = emptyExtensionList;
+
+    configs8  = swrastFillInModes(psp,  8,  8, 0, 1);
+    configs16 = swrastFillInModes(psp, 16, 16, 0, 1);
+    configs32 = swrastFillInModes(psp, 32, 24, 8, 1);
+
+    configs16 = (__DRIconfig **)driConcatConfigs(configs8, configs16);
+
+    *driver_configs = driConcatConfigs(configs16, configs32);
+
+    driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+    return psp;
+}
+
+static void driDestroyScreen(__DRIscreen *psp)
+{
+    TRACE;
+
+    if (psp) {
+	_mesa_free(psp);
+    }
+}
+
+static const __DRIextension **driGetExtensions(__DRIscreen *psp)
+{
+    TRACE;
+
+    return psp->extensions;
+}
+
+
+/**
+ * Framebuffer and renderbuffer-related functions.
+ */
+
+static GLuint
+choose_pixel_format(const GLvisual *v)
+{
+    if (v->rgbMode) {
+	int bpp = v->rgbBits;
+
+	if (bpp == 32
+	    && v->redMask   == 0xff0000
+	    && v->greenMask == 0x00ff00
+	    && v->blueMask  == 0x0000ff)
+	    return PF_A8R8G8B8;
+	else if (bpp == 16
+	    && v->redMask   == 0xf800
+	    && v->greenMask == 0x07e0
+	    && v->blueMask  == 0x001f)
+	    return PF_R5G6B5;
+	else if (bpp == 8
+	    && v->redMask   == 0x07
+	    && v->greenMask == 0x38
+	    && v->blueMask  == 0xc0)
+	    return PF_R3G3B2;
+    }
+    else {
+	if (v->indexBits == 8)
+	    return PF_CI8;
+    }
+
+    _mesa_problem( NULL, "unexpected format in %s", __FUNCTION__ );
+    return 0;
+}
+
+static void
+swrast_delete_renderbuffer(struct gl_renderbuffer *rb)
+{
+    TRACE;
+
+    _mesa_free(rb->Data);
+    _mesa_free(rb);
+}
+
+static GLboolean
+swrast_alloc_front_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
+			   GLenum internalFormat, GLuint width, GLuint height)
+{
+    struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+    int bpp;
+    unsigned mask = PITCH_ALIGN_BITS - 1;
+
+    TRACE;
+
+    rb->Data = NULL;
+    rb->Width = width;
+    rb->Height = height;
+
+    switch (internalFormat) {
+    case GL_RGB:
+	bpp = rb->RedBits + rb->GreenBits + rb->BlueBits;
+	break;
+    case GL_RGBA:
+	bpp = rb->RedBits + rb->GreenBits + rb->BlueBits + rb->AlphaBits;
+	break;
+    case GL_COLOR_INDEX8_EXT:
+	bpp = rb->IndexBits;
+	break;
+    default:
+	_mesa_problem( NULL, "unexpected format in %s", __FUNCTION__ );
+	return GL_FALSE;
+    }
+
+    /* always pad to PITCH_ALIGN_BITS */
+    xrb->pitch = ((width * bpp + mask) & ~mask) / 8;
+
+    return GL_TRUE;
+}
+
+static GLboolean
+swrast_alloc_back_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
+			  GLenum internalFormat, GLuint width, GLuint height)
+{
+    struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+
+    TRACE;
+
+    _mesa_free(rb->Data);
+
+    swrast_alloc_front_storage(ctx, rb, internalFormat, width, height);
+
+    rb->Data = _mesa_malloc(height * xrb->pitch);
+
+    return GL_TRUE;
+}
+
+static struct swrast_renderbuffer *
+swrast_new_renderbuffer(const GLvisual *visual, GLboolean front)
+{
+    struct swrast_renderbuffer *xrb = _mesa_calloc(sizeof *xrb);
+    GLuint pixel_format;
+
+    TRACE;
+
+    if (!xrb)
+	return NULL;
+
+    _mesa_init_renderbuffer(&xrb->Base, 0);
+
+    pixel_format = choose_pixel_format(visual);
+
+    xrb->Base.Delete = swrast_delete_renderbuffer;
+    if (front) {
+	xrb->Base.AllocStorage = swrast_alloc_front_storage;
+	swrast_set_span_funcs_front(xrb, pixel_format);
+    }
+    else {
+	xrb->Base.AllocStorage = swrast_alloc_back_storage;
+	swrast_set_span_funcs_back(xrb, pixel_format);
+    }
+
+    switch (pixel_format) {
+    case PF_A8R8G8B8:
+	xrb->Base.InternalFormat = GL_RGBA;
+	xrb->Base._BaseFormat = GL_RGBA;
+	xrb->Base.DataType = GL_UNSIGNED_BYTE;
+	xrb->Base.RedBits   = 8 * sizeof(GLubyte);
+	xrb->Base.GreenBits = 8 * sizeof(GLubyte);
+	xrb->Base.BlueBits  = 8 * sizeof(GLubyte);
+	xrb->Base.AlphaBits = 8 * sizeof(GLubyte);
+	break;
+    case PF_R5G6B5:
+	xrb->Base.InternalFormat = GL_RGB;
+	xrb->Base._BaseFormat = GL_RGB;
+	xrb->Base.DataType = GL_UNSIGNED_BYTE;
+	xrb->Base.RedBits   = 5 * sizeof(GLubyte);
+	xrb->Base.GreenBits = 6 * sizeof(GLubyte);
+	xrb->Base.BlueBits  = 5 * sizeof(GLubyte);
+	xrb->Base.AlphaBits = 0;
+	break;
+    case PF_R3G3B2:
+	xrb->Base.InternalFormat = GL_RGB;
+	xrb->Base._BaseFormat = GL_RGB;
+	xrb->Base.DataType = GL_UNSIGNED_BYTE;
+	xrb->Base.RedBits   = 3 * sizeof(GLubyte);
+	xrb->Base.GreenBits = 3 * sizeof(GLubyte);
+	xrb->Base.BlueBits  = 2 * sizeof(GLubyte);
+	xrb->Base.AlphaBits = 0;
+	break;
+    case PF_CI8:
+	xrb->Base.InternalFormat = GL_COLOR_INDEX8_EXT;
+	xrb->Base._BaseFormat = GL_COLOR_INDEX;
+	xrb->Base.DataType = GL_UNSIGNED_BYTE;
+	xrb->Base.IndexBits = 8 * sizeof(GLubyte);
+	break;
+    default:
+	return NULL;
+    }
+
+    return xrb;
+}
+
+static __DRIdrawable *
+driCreateNewDrawable(__DRIscreen *screen,
+		     const __DRIconfig *config, void *data)
+{
+    __DRIdrawable *buf;
+    struct swrast_renderbuffer *frontrb, *backrb;
+
+    TRACE;
+
+    buf = _mesa_calloc(sizeof *buf);
+    if (!buf)
+	return NULL;
+
+    buf->loaderPrivate = data;
+
+    buf->driScreenPriv = screen;
+
+    buf->row = _mesa_malloc(MAX_WIDTH * 4);
+
+    /* basic framebuffer setup */
+    _mesa_initialize_framebuffer(&buf->Base, &config->modes);
+
+    /* add front renderbuffer */
+    frontrb = swrast_new_renderbuffer(&config->modes, GL_TRUE);
+    _mesa_add_renderbuffer(&buf->Base, BUFFER_FRONT_LEFT, &frontrb->Base);
+
+    /* add back renderbuffer */
+    if (config->modes.doubleBufferMode) {
+	backrb = swrast_new_renderbuffer(&config->modes, GL_FALSE);
+	_mesa_add_renderbuffer(&buf->Base, BUFFER_BACK_LEFT, &backrb->Base);
+    }
+
+    /* add software renderbuffers */
+    _mesa_add_soft_renderbuffers(&buf->Base,
+				 GL_FALSE, /* color */
+				 config->modes.haveDepthBuffer,
+				 config->modes.haveStencilBuffer,
+				 config->modes.haveAccumBuffer,
+				 GL_FALSE, /* alpha */
+				 GL_FALSE /* aux bufs */);
+
+    return buf;
+}
+
+static void
+driDestroyDrawable(__DRIdrawable *buf)
+{
+    TRACE;
+
+    if (buf) {
+	struct gl_framebuffer *fb = &buf->Base;
+
+	_mesa_free(buf->row);
+
+	fb->DeletePending = GL_TRUE;
+	_mesa_unreference_framebuffer(&fb);
+    }
+}
+
+static void driSwapBuffers(__DRIdrawable *buf)
+{
+    GET_CURRENT_CONTEXT(ctx);
+
+    struct swrast_renderbuffer *frontrb =
+	swrast_renderbuffer(buf->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer);
+    struct swrast_renderbuffer *backrb =
+	swrast_renderbuffer(buf->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer);
+
+    __DRIscreen *screen = buf->driScreenPriv;
+
+    TRACE;
+
+    /* check for signle-buffered */
+    if (backrb == NULL)
+	return;
+
+    /* check if swapping currently bound buffer */
+    if (ctx && ctx->DrawBuffer == &(buf->Base)) {
+	/* flush pending rendering */
+	_mesa_notifySwapBuffers(ctx);
+    }
+
+    screen->swrast_loader->putImage(buf, __DRI_SWRAST_IMAGE_OP_SWAP,
+				    0, 0,
+				    frontrb->Base.Width,
+				    frontrb->Base.Height,
+				    backrb->Base.Data,
+				    buf->loaderPrivate);
+}
+
+
+/**
+ * General device driver functions.
+ */
+
+static void
+get_window_size( GLframebuffer *fb, GLsizei *w, GLsizei *h )
+{
+    __DRIdrawable *buf = swrast_drawable(fb);
+    __DRIscreen *screen = buf->driScreenPriv;
+    int x, y;
+
+    screen->swrast_loader->getDrawableInfo(buf,
+					   &x, &y, w, h,
+					   buf->loaderPrivate);
+}
+
+static void
+swrast_check_and_update_window_size( GLcontext *ctx, GLframebuffer *fb )
+{
+    GLsizei width, height;
+
+    get_window_size(fb, &width, &height);
+    if (fb->Width != width || fb->Height != height) {
+	_mesa_resize_framebuffer(ctx, fb, width, height);
+    }
+}
+
+static const GLubyte *
+get_string(GLcontext *ctx, GLenum pname)
+{
+    (void) ctx;
+    switch (pname) {
+	case GL_VENDOR:
+	    return (const GLubyte *) "Mesa Project";
+	case GL_RENDERER:
+	    return (const GLubyte *) "Software Rasterizer";
+	default:
+	    return NULL;
+    }
+}
+
+static void
+update_state( GLcontext *ctx, GLuint new_state )
+{
+    /* not much to do here - pass it on */
+    _swrast_InvalidateState( ctx, new_state );
+    _swsetup_InvalidateState( ctx, new_state );
+    _vbo_InvalidateState( ctx, new_state );
+    _tnl_InvalidateState( ctx, new_state );
+}
+
+static void
+viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h)
+{
+    GLframebuffer *draw = ctx->WinSysDrawBuffer;
+    GLframebuffer *read = ctx->WinSysReadBuffer;
+
+    swrast_check_and_update_window_size(ctx, draw);
+    swrast_check_and_update_window_size(ctx, read);
+}
+
+static void
+swrast_init_driver_functions(struct dd_function_table *driver)
+{
+    driver->GetString = get_string;
+    driver->UpdateState = update_state;
+    driver->GetBufferSize = NULL;
+    driver->Viewport = viewport;
+}
+
+
+/**
+ * Context-related functions.
+ */
+
+static __DRIcontext *
+driCreateNewContext(__DRIscreen *screen, const __DRIconfig *config,
+		    __DRIcontext *shared, void *data)
+{
+    __DRIcontext *ctx;
+    GLcontext *mesaCtx;
+    struct dd_function_table functions;
+
+    TRACE;
+
+    ctx = _mesa_calloc(sizeof *ctx);
+    if (!ctx)
+	return NULL;
+
+    ctx->loaderPrivate = data;
+
+    ctx->driScreenPriv = screen;
+
+    /* build table of device driver functions */
+    _mesa_init_driver_functions(&functions);
+    swrast_init_driver_functions(&functions);
+
+    if (!_mesa_initialize_context(&ctx->Base, &config->modes,
+				  shared ? &shared->Base : NULL,
+				  &functions, (void *) ctx)) {
+      _mesa_free(ctx);
+      return NULL;
+    }
+
+    mesaCtx = &ctx->Base;
+
+    /* do bounds checking to prevent segfaults and server crashes! */
+    mesaCtx->Const.CheckArrayBounds = GL_TRUE;
+
+    /* create module contexts */
+    _swrast_CreateContext( mesaCtx );
+    _vbo_CreateContext( mesaCtx );
+    _tnl_CreateContext( mesaCtx );
+    _swsetup_CreateContext( mesaCtx );
+    _swsetup_Wakeup( mesaCtx );
+
+    /* use default TCL pipeline */
+    {
+       TNLcontext *tnl = TNL_CONTEXT(mesaCtx);
+       tnl->Driver.RunPipeline = _tnl_run_pipeline;
+    }
+
+    _mesa_enable_sw_extensions(mesaCtx);
+    _mesa_enable_1_3_extensions(mesaCtx);
+    _mesa_enable_1_4_extensions(mesaCtx);
+    _mesa_enable_1_5_extensions(mesaCtx);
+    _mesa_enable_2_0_extensions(mesaCtx);
+    _mesa_enable_2_1_extensions(mesaCtx);
+
+    return ctx;
+}
+
+static void
+driDestroyContext(__DRIcontext *ctx)
+{
+    GLcontext *mesaCtx;
+    TRACE;
+
+    if (ctx) {
+	mesaCtx = &ctx->Base;
+	_swsetup_DestroyContext( mesaCtx );
+	_swrast_DestroyContext( mesaCtx );
+	_tnl_DestroyContext( mesaCtx );
+	_vbo_DestroyContext( mesaCtx );
+	_mesa_destroy_context( mesaCtx );
+    }
+}
+
+static int
+driCopyContext(__DRIcontext *dst, __DRIcontext *src, unsigned long mask)
+{
+    TRACE;
+
+    _mesa_copy_context(&src->Base, &dst->Base, mask);
+    return GL_TRUE;
+}
+
+static int driBindContext(__DRIcontext *ctx,
+			  __DRIdrawable *draw,
+			  __DRIdrawable *read)
+{
+    GLcontext *mesaCtx;
+    GLframebuffer *mesaDraw;
+    GLframebuffer *mesaRead;
+    TRACE;
+
+    if (ctx) {
+	if (!draw || !read)
+	    return GL_FALSE;
+
+	mesaCtx = &ctx->Base;
+	mesaDraw = &draw->Base;
+	mesaRead = &read->Base;
+
+	/* check for same context and buffer */
+	if (mesaCtx == _mesa_get_current_context()
+	    && mesaCtx->DrawBuffer == mesaDraw
+	    && mesaCtx->ReadBuffer == mesaRead) {
+	    return GL_TRUE;
+	}
+
+	_glapi_check_multithread();
+
+	swrast_check_and_update_window_size(mesaCtx, mesaDraw);
+	if (read != draw)
+	    swrast_check_and_update_window_size(mesaCtx, mesaRead);
+
+	_mesa_make_current( mesaCtx,
+			    mesaDraw,
+			    mesaRead );
+    }
+    else {
+	/* unbind */
+	_mesa_make_current( NULL, NULL, NULL );
+    }
+
+    return GL_TRUE;
+}
+
+static int driUnbindContext(__DRIcontext *ctx)
+{
+    TRACE;
+    (void) ctx;
+    return GL_TRUE;
+}
+
+
+static const __DRIcoreExtension driCoreExtension = {
+    { __DRI_CORE, __DRI_CORE_VERSION },
+    NULL, /* driCreateNewScreen */
+    driDestroyScreen,
+    driGetExtensions,
+    driGetConfigAttrib,
+    driIndexConfigAttrib,
+    NULL, /* driCreateNewDrawable */
+    driDestroyDrawable,
+    driSwapBuffers,
+    driCreateNewContext,
+    driCopyContext,
+    driDestroyContext,
+    driBindContext,
+    driUnbindContext
+};
+
+static const __DRIswrastExtension driSWRastExtension = {
+    { __DRI_SWRAST, __DRI_SWRAST_VERSION },
+    driCreateNewScreen,
+    driCreateNewDrawable
+};
+
+/* This is the table of extensions that the loader will dlsym() for. */
+PUBLIC const __DRIextension *__driDriverExtensions[] = {
+    &driCoreExtension.base,
+    &driSWRastExtension.base,
+    NULL
+};
diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h
new file mode 100644
index 00000000000..a707ffc40a8
--- /dev/null
+++ b/src/mesa/drivers/dri/swrast/swrast_priv.h
@@ -0,0 +1,142 @@
+/*
+ * Mesa 3-D graphics library
+ * Version:  7.1
+ *
+ * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Authors:
+ *    George Sapountzis <gsap7@yahoo.gr>
+ */
+
+
+#ifndef _SWRAST_PRIV_H
+#define _SWRAST_PRIV_H
+
+#include <GL/gl.h>
+#include <GL/internal/dri_interface.h>
+#include "main/mtypes.h"
+
+
+/**
+ * Debugging
+ */
+#define DEBUG_CORE	0
+#define DEBUG_SPAN	0
+
+#if DEBUG_CORE
+#define TRACE _mesa_printf("--> %s\n", __FUNCTION__)
+#else
+#define TRACE
+#endif
+
+#if DEBUG_SPAN
+#define TRACE_SPAN _mesa_printf("--> %s\n", __FUNCTION__)
+#else
+#define TRACE_SPAN
+#endif
+
+
+/**
+ * Data types
+ */
+struct __DRIscreenRec {
+    int num;
+
+    const __DRIextension **extensions;
+
+    const __DRIswrastLoaderExtension *swrast_loader;
+};
+
+struct __DRIcontextRec {
+    GLcontext Base;
+
+    void *loaderPrivate;
+
+    __DRIscreen *driScreenPriv;
+};
+
+struct __DRIdrawableRec {
+    GLframebuffer Base;
+
+    void *loaderPrivate;
+
+    __DRIscreen *driScreenPriv;
+
+    /* scratch row for optimized front-buffer rendering */
+    char *row;
+};
+
+struct swrast_renderbuffer {
+    struct gl_renderbuffer Base;
+
+    /* renderbuffer pitch (in bytes) */
+    GLuint pitch;
+};
+
+static INLINE __DRIcontext *
+swrast_context(GLcontext *ctx)
+{
+    return (__DRIcontext *) ctx;
+}
+
+static INLINE __DRIdrawable *
+swrast_drawable(GLframebuffer *fb)
+{
+    return (__DRIdrawable *) fb;
+}
+
+static INLINE struct swrast_renderbuffer *
+swrast_renderbuffer(struct gl_renderbuffer *rb)
+{
+    return (struct swrast_renderbuffer *) rb;
+}
+
+
+/**
+ * Pixel formats we support
+ */
+#define PF_CI8        1		/**< Color Index mode */
+#define PF_A8R8G8B8   2		/**< 32-bit TrueColor:  8-A, 8-R, 8-G, 8-B bits */
+#define PF_R5G6B5     3		/**< 16-bit TrueColor:  5-R, 6-G, 5-B bits */
+#define PF_R3G3B2     4		/**<  8-bit TrueColor:  3-R, 3-G, 2-B bits */
+
+
+/**
+ * Renderbuffer pitch alignment (in bits).
+ *
+ * The xorg loader requires padding images to 32 bits. However, this should
+ * become a screen/drawable parameter XXX
+ */
+#define PITCH_ALIGN_BITS 32
+
+
+/* swrast_span.c */
+
+extern void
+swrast_set_span_funcs_back(struct swrast_renderbuffer *xrb,
+			   GLuint pixel_format);
+
+extern void
+swrast_set_span_funcs_front(struct swrast_renderbuffer *xrb,
+			    GLuint pixel_format);
+
+#endif /* _SWRAST_PRIV_H_ */
diff --git a/src/mesa/drivers/dri/swrast/swrast_span.c b/src/mesa/drivers/dri/swrast/swrast_span.c
new file mode 100644
index 00000000000..5e990368b2e
--- /dev/null
+++ b/src/mesa/drivers/dri/swrast/swrast_span.c
@@ -0,0 +1,367 @@
+/*
+ * Mesa 3-D graphics library
+ * Version:  7.1
+ *
+ * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Authors:
+ *    George Sapountzis <gsap7@yahoo.gr>
+ */
+
+#include "swrast_priv.h"
+
+#define YFLIP(_xrb, Y) ((_xrb)->Base.Height - (Y) - 1)
+
+/*
+ * Dithering support takes the "computation" extreme in the "computation vs.
+ * storage" trade-off. This approach is very simple to implement and any
+ * computational overhead should be acceptable. XMesa uses table lookups for
+ * around 8KB of storage overhead per visual.
+ */
+#define DITHER 1
+
+static const GLubyte kernel[16] = {
+    0*16,  8*16,  2*16, 10*16,
+   12*16,  4*16, 14*16,  6*16,
+    3*16, 11*16,  1*16,  9*16,
+   15*16,  7*16, 13*16,  5*16,
+};
+
+#if DITHER
+#define DITHER_COMP(X, Y) kernel[((X) & 0x3) | (((Y) & 0x3) << 2)]
+
+#define DITHER_CLAMP(X) (((X) < CHAN_MAX) ? (X) : CHAN_MAX)
+#else
+#define DITHER_COMP(X, Y) 0
+
+#define DITHER_CLAMP(X) (X)
+#endif
+
+
+/*
+ * Pixel macros shared across front/back buffer span functions.
+ */
+
+/* 32-bit BGRA */
+#define STORE_PIXEL_A8R8G8B8(DST, X, Y, VALUE) \
+   DST[3] = VALUE[ACOMP]; \
+   DST[2] = VALUE[RCOMP]; \
+   DST[1] = VALUE[GCOMP]; \
+   DST[0] = VALUE[BCOMP]
+#define STORE_PIXEL_RGB_A8R8G8B8(DST, X, Y, VALUE) \
+   DST[3] = 0xff; \
+   DST[2] = VALUE[RCOMP]; \
+   DST[1] = VALUE[GCOMP]; \
+   DST[0] = VALUE[BCOMP]
+#define FETCH_PIXEL_A8R8G8B8(DST, SRC) \
+   DST[ACOMP] = SRC[3]; \
+   DST[RCOMP] = SRC[2]; \
+   DST[GCOMP] = SRC[1]; \
+   DST[BCOMP] = SRC[0]
+
+
+/* 16-bit BGR */
+#define STORE_PIXEL_R5G6B5(DST, X, Y, VALUE) \
+   do { \
+   int d = DITHER_COMP(X, Y) >> 6; \
+   GLushort *p = (GLushort *)DST; \
+   *p = ( ((DITHER_CLAMP((VALUE[RCOMP]) + d) & 0xf8) << 8) | \
+	  ((DITHER_CLAMP((VALUE[GCOMP]) + d) & 0xfc) << 3) | \
+	  ((DITHER_CLAMP((VALUE[BCOMP]) + d) & 0xf8) >> 3) ); \
+   } while(0)
+#define FETCH_PIXEL_R5G6B5(DST, SRC) \
+   do { \
+   GLushort p = *(GLushort *)SRC; \
+   DST[ACOMP] = 0xff; \
+   DST[RCOMP] = ((p >> 8) & 0xf8) * 255 / 0xf8; \
+   DST[GCOMP] = ((p >> 3) & 0xfc) * 255 / 0xfc; \
+   DST[BCOMP] = ((p << 3) & 0xf8) * 255 / 0xf8; \
+   } while(0)
+
+
+/* 8-bit BGR */
+#define STORE_PIXEL_R3G3B2(DST, X, Y, VALUE) \
+   do { \
+   int d = DITHER_COMP(X, Y) >> 3; \
+   GLubyte *p = (GLubyte *)DST; \
+   *p = ( ((DITHER_CLAMP((VALUE[RCOMP]) + d) & 0xe0) >> 5) | \
+	  ((DITHER_CLAMP((VALUE[GCOMP]) + d) & 0xe0) >> 2) | \
+	  ((DITHER_CLAMP((VALUE[BCOMP]) + d) & 0xc0) >> 0) ); \
+   } while(0)
+#define FETCH_PIXEL_R3G3B2(DST, SRC) \
+   do { \
+   GLubyte p = *(GLubyte *)SRC; \
+   DST[ACOMP] = 0xff; \
+   DST[RCOMP] = ((p << 5) & 0xe0) * 255 / 0xe0; \
+   DST[GCOMP] = ((p << 2) & 0xe0) * 255 / 0xe0; \
+   DST[BCOMP] = ((p << 0) & 0xc0) * 255 / 0xc0; \
+   } while(0)
+
+
+/*
+ * Generate code for back-buffer span functions.
+ */
+
+/* 32-bit BGRA */
+#define NAME(FUNC) FUNC##_A8R8G8B8
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)xrb->Base.Data + YFLIP(xrb, Y) * xrb->pitch + (X) * 4;
+#define INC_PIXEL_PTR(P) P += 4
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_A8R8G8B8(DST, X, Y, VALUE)
+#define STORE_PIXEL_RGB(DST, X, Y, VALUE) \
+   STORE_PIXEL_RGB_A8R8G8B8(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_A8R8G8B8(DST, SRC)
+
+#include "swrast/s_spantemp.h"
+
+
+/* 16-bit BGR */
+#define NAME(FUNC) FUNC##_R5G6B5
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)xrb->Base.Data + YFLIP(xrb, Y) * xrb->pitch + (X) * 2;
+#define INC_PIXEL_PTR(P) P += 2
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_R5G6B5(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_R5G6B5(DST, SRC)
+
+#include "swrast/s_spantemp.h"
+
+
+/* 8-bit BGR */
+#define NAME(FUNC) FUNC##_R3G3B2
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)xrb->Base.Data + YFLIP(xrb, Y) * xrb->pitch + (X) * 1;
+#define INC_PIXEL_PTR(P) P += 1
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_R3G3B2(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_R3G3B2(DST, SRC)
+
+#include "swrast/s_spantemp.h"
+
+
+/* 8-bit color index */
+#define NAME(FUNC) FUNC##_CI8
+#define CI_MODE
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)xrb->Base.Data + YFLIP(xrb, Y) * xrb->pitch + (X);
+#define INC_PIXEL_PTR(P) P += 1
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   *DST = VALUE[0]
+#define FETCH_PIXEL(DST, SRC) \
+   DST = SRC[0]
+
+#include "swrast/s_spantemp.h"
+
+
+/*
+ * Generate code for front-buffer span functions.
+ */
+
+/* 32-bit BGRA */
+#define NAME(FUNC) FUNC##_A8R8G8B8_front
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)row;
+#define INC_PIXEL_PTR(P) P += 4
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_A8R8G8B8(DST, X, Y, VALUE)
+#define STORE_PIXEL_RGB(DST, X, Y, VALUE) \
+   STORE_PIXEL_RGB_A8R8G8B8(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_A8R8G8B8(DST, SRC)
+
+#include "swrast_spantemp.h"
+
+
+/* 16-bit BGR */
+#define NAME(FUNC) FUNC##_R5G6B5_front
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)row;
+#define INC_PIXEL_PTR(P) P += 2
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_R5G6B5(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_R5G6B5(DST, SRC)
+
+#include "swrast_spantemp.h"
+
+
+/* 8-bit BGR */
+#define NAME(FUNC) FUNC##_R3G3B2_front
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)row;
+#define INC_PIXEL_PTR(P) P += 1
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   STORE_PIXEL_R3G3B2(DST, X, Y, VALUE)
+#define FETCH_PIXEL(DST, SRC) \
+   FETCH_PIXEL_R3G3B2(DST, SRC)
+
+#include "swrast_spantemp.h"
+
+
+/* 8-bit color index */
+#define NAME(FUNC) FUNC##_CI8_front
+#define CI_MODE
+#define RB_TYPE GLubyte
+#define SPAN_VARS \
+   struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
+#define INIT_PIXEL_PTR(P, X, Y) \
+   GLubyte *P = (GLubyte *)row;
+#define INC_PIXEL_PTR(P) P += 1
+#define STORE_PIXEL(DST, X, Y, VALUE) \
+   *DST = VALUE[0]
+#define FETCH_PIXEL(DST, SRC) \
+   DST = SRC[0]
+
+#include "swrast_spantemp.h"
+
+
+/*
+ * Back-buffers are malloced memory and always private.
+ *
+ * BACK_PIXMAP (not supported)
+ * BACK_XIMAGE
+ */
+void
+swrast_set_span_funcs_back(struct swrast_renderbuffer *xrb,
+			   GLuint pixel_format)
+{
+    switch (pixel_format) {
+    case PF_A8R8G8B8:
+	xrb->Base.GetRow = get_row_A8R8G8B8;
+	xrb->Base.GetValues = get_values_A8R8G8B8;
+	xrb->Base.PutRow = put_row_A8R8G8B8;
+	xrb->Base.PutRowRGB = put_row_rgb_A8R8G8B8;
+	xrb->Base.PutMonoRow = put_mono_row_A8R8G8B8;
+	xrb->Base.PutValues = put_values_A8R8G8B8;
+	xrb->Base.PutMonoValues = put_mono_values_A8R8G8B8;
+	break;
+    case PF_R5G6B5:
+	xrb->Base.GetRow = get_row_R5G6B5;
+	xrb->Base.GetValues = get_values_R5G6B5;
+	xrb->Base.PutRow = put_row_R5G6B5;
+	xrb->Base.PutRowRGB = put_row_rgb_R5G6B5;
+	xrb->Base.PutMonoRow = put_mono_row_R5G6B5;
+	xrb->Base.PutValues = put_values_R5G6B5;
+	xrb->Base.PutMonoValues = put_mono_values_R5G6B5;
+	break;
+    case PF_R3G3B2:
+	xrb->Base.GetRow = get_row_R3G3B2;
+	xrb->Base.GetValues = get_values_R3G3B2;
+	xrb->Base.PutRow = put_row_R3G3B2;
+	xrb->Base.PutRowRGB = put_row_rgb_R3G3B2;
+	xrb->Base.PutMonoRow = put_mono_row_R3G3B2;
+	xrb->Base.PutValues = put_values_R3G3B2;
+	xrb->Base.PutMonoValues = put_mono_values_R3G3B2;
+	break;
+    case PF_CI8:
+	xrb->Base.GetRow = get_row_CI8;
+	xrb->Base.GetValues = get_values_CI8;
+	xrb->Base.PutRow = put_row_CI8;
+	xrb->Base.PutMonoRow = put_mono_row_CI8;
+	xrb->Base.PutValues = put_values_CI8;
+	xrb->Base.PutMonoValues = put_mono_values_CI8;
+	break;
+    default:
+	assert(0);
+	return;
+    }
+}
+
+
+/*
+ * Front-buffers are provided by the loader, the xorg loader uses pixmaps.
+ *
+ * WINDOW,          An X window
+ * GLXWINDOW,       GLX window
+ * PIXMAP,          GLX pixmap
+ * PBUFFER          GLX Pbuffer
+ */
+void
+swrast_set_span_funcs_front(struct swrast_renderbuffer *xrb,
+			    GLuint pixel_format)
+{
+    switch (pixel_format) {
+    case PF_A8R8G8B8:
+	xrb->Base.GetRow = get_row_A8R8G8B8_front;
+	xrb->Base.GetValues = get_values_A8R8G8B8_front;
+	xrb->Base.PutRow = put_row_A8R8G8B8_front;
+	xrb->Base.PutRowRGB = put_row_rgb_A8R8G8B8_front;
+	xrb->Base.PutMonoRow = put_mono_row_A8R8G8B8_front;
+	xrb->Base.PutValues = put_values_A8R8G8B8_front;
+	xrb->Base.PutMonoValues = put_mono_values_A8R8G8B8_front;
+	break;
+    case PF_R5G6B5:
+	xrb->Base.GetRow = get_row_R5G6B5_front;
+	xrb->Base.GetValues = get_values_R5G6B5_front;
+	xrb->Base.PutRow = put_row_R5G6B5_front;
+	xrb->Base.PutRowRGB = put_row_rgb_R5G6B5_front;
+	xrb->Base.PutMonoRow = put_mono_row_R5G6B5_front;
+	xrb->Base.PutValues = put_values_R5G6B5_front;
+	xrb->Base.PutMonoValues = put_mono_values_R5G6B5_front;
+	break;
+    case PF_R3G3B2:
+	xrb->Base.GetRow = get_row_R3G3B2_front;
+	xrb->Base.GetValues = get_values_R3G3B2_front;
+	xrb->Base.PutRow = put_row_R3G3B2_front;
+	xrb->Base.PutRowRGB = put_row_rgb_R3G3B2_front;
+	xrb->Base.PutMonoRow = put_mono_row_R3G3B2_front;
+	xrb->Base.PutValues = put_values_R3G3B2_front;
+	xrb->Base.PutMonoValues = put_mono_values_R3G3B2_front;
+	break;
+    case PF_CI8:
+	xrb->Base.GetRow = get_row_CI8_front;
+	xrb->Base.GetValues = get_values_CI8_front;
+	xrb->Base.PutRow = put_row_CI8_front;
+	xrb->Base.PutMonoRow = put_mono_row_CI8_front;
+	xrb->Base.PutValues = put_values_CI8_front;
+	xrb->Base.PutMonoValues = put_mono_values_CI8_front;
+	break;
+    default:
+	assert(0);
+	return;
+    }
+}
diff --git a/src/mesa/drivers/dri/swrast/swrast_spantemp.h b/src/mesa/drivers/dri/swrast/swrast_spantemp.h
new file mode 100644
index 00000000000..e0cb2414294
--- /dev/null
+++ b/src/mesa/drivers/dri/swrast/swrast_spantemp.h
@@ -0,0 +1,328 @@
+/*
+ * Mesa 3-D graphics library
+ * Version:  6.5.1
+ *
+ * Copyright (C) 1999-2006  Brian Paul   All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+/*
+ * Modified version of swrast/s_spantemp.h for front-buffer rendering. The
+ * no-mask paths use a scratch row to avoid repeated calls to the loader.
+ *
+ * For the mask paths we always use an array of 4 elements of RB_TYPE. This is
+ * to satisfy the xorg loader requirement of an image pitch of 32 bits and
+ * should be ok for other loaders also.
+ */
+
+
+#ifndef _SWRAST_SPANTEMP_ONCE
+#define _SWRAST_SPANTEMP_ONCE
+
+static INLINE void
+PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p )
+{
+    __DRIcontext *ctx = swrast_context(glCtx);
+    __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer);
+
+    __DRIscreen *screen = ctx->driScreenPriv;
+
+    screen->swrast_loader->putImage(draw, __DRI_SWRAST_IMAGE_OP_DRAW,
+				    x, y, 1, 1, (char *)p,
+				    draw->loaderPrivate);
+}
+
+
+static INLINE void
+GET_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p )
+{
+    __DRIcontext *ctx = swrast_context(glCtx);
+    __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer);
+
+    __DRIscreen *screen = ctx->driScreenPriv;
+
+    screen->swrast_loader->getImage(read, x, y, 1, 1, (char *)p,
+				    read->loaderPrivate);
+}
+
+static INLINE void
+PUT_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row )
+{
+    __DRIcontext *ctx = swrast_context(glCtx);
+    __DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer);
+
+    __DRIscreen *screen = ctx->driScreenPriv;
+
+    screen->swrast_loader->putImage(draw, __DRI_SWRAST_IMAGE_OP_DRAW,
+				    x, y, n, 1, row,
+				    draw->loaderPrivate);
+}
+
+static INLINE void
+GET_ROW( GLcontext *glCtx, GLint x, GLint y, GLuint n, char *row )
+{
+    __DRIcontext *ctx = swrast_context(glCtx);
+    __DRIdrawable *read = swrast_drawable(glCtx->ReadBuffer);
+
+    __DRIscreen *screen = ctx->driScreenPriv;
+
+    screen->swrast_loader->getImage(read, x, y, n, 1, row,
+				    read->loaderPrivate);
+}
+
+#endif /* _SWRAST_SPANTEMP_ONCE */
+
+
+/*
+ * Templates for the span/pixel-array write/read functions called via
+ * the gl_renderbuffer's GetRow, GetValues, PutRow, PutMonoRow, PutValues
+ * and PutMonoValues functions.
+ *
+ * Define the following macros before including this file:
+ *   NAME(BASE)  to generate the function name (i.e. add prefix or suffix)
+ *   RB_TYPE  the renderbuffer DataType
+ *   CI_MODE  if set, color index mode, else RGBA
+ *   SPAN_VARS  to declare any local variables
+ *   INIT_PIXEL_PTR(P, X, Y)  to initialize a pointer to a pixel
+ *   INC_PIXEL_PTR(P)  to increment a pixel pointer by one pixel
+ *   STORE_PIXEL(DST, X, Y, VALUE)  to store pixel values in buffer
+ *   FETCH_PIXEL(DST, SRC)  to fetch pixel values from buffer
+ *
+ * Note that in the STORE_PIXEL macros, we also pass in the (X,Y) coordinates
+ * for the pixels to be stored.  This is useful when dithering and probably
+ * ignored otherwise.
+ */
+
+#include "main/macros.h"
+
+
+#ifdef CI_MODE
+#define RB_COMPONENTS 1
+#elif !defined(RB_COMPONENTS)
+#define RB_COMPONENTS 4
+#endif
+
+
+static void
+NAME(get_row)( GLcontext *ctx, struct gl_renderbuffer *rb,
+               GLuint count, GLint x, GLint y, void *values )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+#ifdef CI_MODE
+   RB_TYPE *dest = (RB_TYPE *) values;
+#else
+   RB_TYPE (*dest)[RB_COMPONENTS] = (RB_TYPE (*)[RB_COMPONENTS]) values;
+#endif
+   GLuint i;
+   char *row = swrast_drawable(ctx->ReadBuffer)->row;
+   INIT_PIXEL_PTR(pixel, x, y);
+   GET_ROW( ctx, x, YFLIP(xrb, y), count, row );
+   for (i = 0; i < count; i++) {
+      FETCH_PIXEL(dest[i], pixel);
+      INC_PIXEL_PTR(pixel);
+   }
+   (void) rb;
+}
+
+
+static void
+NAME(get_values)( GLcontext *ctx, struct gl_renderbuffer *rb,
+                  GLuint count, const GLint x[], const GLint y[], void *values )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+#ifdef CI_MODE
+   RB_TYPE *dest = (RB_TYPE *) values;
+#else
+   RB_TYPE (*dest)[RB_COMPONENTS] = (RB_TYPE (*)[RB_COMPONENTS]) values;
+#endif
+   GLuint i;
+   for (i = 0; i < count; i++) {
+      RB_TYPE pixel[4];
+      GET_PIXEL(ctx, x[i], YFLIP(xrb, y[i]), pixel);
+      FETCH_PIXEL(dest[i], pixel);
+   }
+   (void) rb;
+}
+
+
+static void
+NAME(put_row)( GLcontext *ctx, struct gl_renderbuffer *rb,
+               GLuint count, GLint x, GLint y,
+               const void *values, const GLubyte mask[] )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+   const RB_TYPE (*src)[RB_COMPONENTS] = (const RB_TYPE (*)[RB_COMPONENTS]) values;
+   GLuint i;
+   if (mask) {
+      for (i = 0; i < count; i++) {
+         if (mask[i]) {
+            RB_TYPE pixel[4];
+            STORE_PIXEL(pixel, x + i, y, src[i]);
+            PUT_PIXEL(ctx, x + i, YFLIP(xrb, y), pixel);
+         }
+      }
+   }
+   else {
+      char *row = swrast_drawable(ctx->DrawBuffer)->row;
+      INIT_PIXEL_PTR(pixel, x, y);
+      for (i = 0; i < count; i++) {
+         STORE_PIXEL(pixel, x + i, y, src[i]);
+         INC_PIXEL_PTR(pixel);
+      }
+      PUT_ROW( ctx, x, YFLIP(xrb, y), count, row );
+   }
+   (void) rb;
+}
+
+
+#if !defined(CI_MODE)
+static void
+NAME(put_row_rgb)( GLcontext *ctx, struct gl_renderbuffer *rb,
+                   GLuint count, GLint x, GLint y,
+                   const void *values, const GLubyte mask[] )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+   const RB_TYPE (*src)[3] = (const RB_TYPE (*)[3]) values;
+   GLuint i;
+   if (mask) {
+      for (i = 0; i < count; i++) {
+         if (mask[i]) {
+            RB_TYPE pixel[4];
+#ifdef STORE_PIXEL_RGB
+            STORE_PIXEL_RGB(pixel, x + i, y, src[i]);
+#else
+            STORE_PIXEL(pixel, x + i, y, src[i]);
+#endif
+            PUT_PIXEL(ctx, x + i, YFLIP(xrb, y), pixel);
+         }
+      }
+   }
+   else {
+      char *row = swrast_drawable(ctx->DrawBuffer)->row;
+      INIT_PIXEL_PTR(pixel, x, y);
+      for (i = 0; i < count; i++) {
+#ifdef STORE_PIXEL_RGB
+         STORE_PIXEL_RGB(pixel, x + i, y, src[i]);
+#else
+         STORE_PIXEL(pixel, x + i, y, src[i]);
+#endif
+         INC_PIXEL_PTR(pixel);
+      }
+      PUT_ROW( ctx, x, YFLIP(xrb, y), count, row );
+   }
+   (void) rb;
+}
+#endif
+
+
+static void
+NAME(put_mono_row)( GLcontext *ctx, struct gl_renderbuffer *rb,
+                    GLuint count, GLint x, GLint y,
+                    const void *value, const GLubyte mask[] )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+   const RB_TYPE *src = (const RB_TYPE *) value;
+   GLuint i;
+   if (mask) {
+      for (i = 0; i < count; i++) {
+         if (mask[i]) {
+            RB_TYPE pixel[4];
+            STORE_PIXEL(pixel, x + i, y, src);
+            PUT_PIXEL(ctx, x + i, YFLIP(xrb, y), pixel);
+         }
+      }
+   }
+   else {
+      char *row = swrast_drawable(ctx->DrawBuffer)->row;
+      INIT_PIXEL_PTR(pixel, x, y);
+      for (i = 0; i < count; i++) {
+         STORE_PIXEL(pixel, x + i, y, src);
+         INC_PIXEL_PTR(pixel);
+      }
+      PUT_ROW( ctx, x, YFLIP(xrb, y), count, row );
+   }
+   (void) rb;
+}
+
+
+static void
+NAME(put_values)( GLcontext *ctx, struct gl_renderbuffer *rb,
+                  GLuint count, const GLint x[], const GLint y[],
+                  const void *values, const GLubyte mask[] )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+   const RB_TYPE (*src)[RB_COMPONENTS] = (const RB_TYPE (*)[RB_COMPONENTS]) values;
+   GLuint i;
+   ASSERT(mask);
+   for (i = 0; i < count; i++) {
+      if (mask[i]) {
+         RB_TYPE pixel[4];
+         STORE_PIXEL(pixel, x[i], y[i], src[i]);
+         PUT_PIXEL(ctx, x[i], YFLIP(xrb, y[i]), pixel);
+      }
+   }
+   (void) rb;
+}
+
+
+static void
+NAME(put_mono_values)( GLcontext *ctx, struct gl_renderbuffer *rb,
+                       GLuint count, const GLint x[], const GLint y[],
+                       const void *value, const GLubyte mask[] )
+{
+#ifdef SPAN_VARS
+   SPAN_VARS
+#endif
+   const RB_TYPE *src = (const RB_TYPE *) value;
+   GLuint i;
+   ASSERT(mask);
+   for (i = 0; i < count; i++) {
+      if (mask[i]) {
+         RB_TYPE pixel[4];
+         STORE_PIXEL(pixel, x[i], y[i], src);
+         PUT_PIXEL(ctx, x[i], YFLIP(xrb, y[i]), pixel);
+      }
+   }
+   (void) rb;
+}
+
+
+#undef NAME
+#undef RB_TYPE
+#undef RB_COMPONENTS
+#undef CI_MODE
+#undef SPAN_VARS
+#undef INIT_PIXEL_PTR
+#undef INC_PIXEL_PTR
+#undef STORE_PIXEL
+#undef STORE_PIXEL_RGB
+#undef FETCH_PIXEL
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_context.c b/src/mesa/drivers/dri/tdfx/tdfx_context.c
index b4eea2566f6..ef688d103d3 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_context.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_context.c
@@ -43,9 +43,9 @@
 #include "tdfx_render.h"
 #include "tdfx_span.h"
 #include "tdfx_texman.h"
-#include "extensions.h"
-#include "hash.h"
-#include "texobj.h"
+#include "main/extensions.h"
+#include "main/hash.h"
+#include "main/texobj.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_context.h b/src/mesa/drivers/dri/tdfx/tdfx_context.h
index 05673cd1867..3bcb5451193 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_context.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_context.h
@@ -44,7 +44,7 @@
 #ifdef XFree86Server
 #include "GL/xf86glx.h"
 #else
-#include "glheader.h"
+#include "main/glheader.h"
 #endif
 #if defined(__linux__)
 #include <signal.h>
@@ -55,12 +55,12 @@
 #include "tdfx_glide.h"
 #include "xmlconfig.h"
 
-#include "clip.h"
-#include "context.h"
-#include "macros.h"
-#include "matrix.h"
-#include "imports.h"
-#include "mtypes.h"
+#include "main/clip.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/matrix.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
 
 #include "tdfx_screen.h"
 
@@ -983,9 +983,9 @@ FX_grColorMaskv_NoLock(GLcontext *ctx, const GLboolean rgba[4]);
 #define TDFXPACKCOLOR4444( r, g, b, a )					   \
    ((((a) & 0xf0) << 8) | (((b) & 0xf0) << 4) | ((g) & 0xf0) | ((r) >> 4))
 
-static __inline__ GrColor_t tdfxPackColor( GLuint cpp,
-					   GLubyte r, GLubyte g,
-					   GLubyte b, GLubyte a )
+static INLINE GrColor_t tdfxPackColor( GLuint cpp,
+                                       GLubyte r, GLubyte g,
+                                       GLubyte b, GLubyte a )
 {
    switch ( cpp ) {
    case 2:
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_dd.c b/src/mesa/drivers/dri/tdfx/tdfx_dd.c
index adbe0c0f33f..2cef0795153 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_dd.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_dd.c
@@ -39,9 +39,9 @@
 #include "tdfx_pixels.h"
 
 #include "utils.h"
-#include "context.h"
-#include "enums.h"
-#include "framebuffer.h"
+#include "main/context.h"
+#include "main/enums.h"
+#include "main/framebuffer.h"
 #include "swrast/swrast.h"
 #if defined(USE_X86_ASM)
 #include "x86/common_x86_asm.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_dd.h b/src/mesa/drivers/dri/tdfx/tdfx_dd.h
index bd61e106052..f419c8426af 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_dd.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_dd.h
@@ -36,7 +36,7 @@
 #ifndef __TDFX_DD_H__
 #define __TDFX_DD_H__
 
-#include "context.h"
+#include "main/context.h"
 
 extern void tdfxDDInitDriverFuncs( const __GLcontextModes *visual,
                                    struct dd_function_table *functions );
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
index b5c01f6ef21..9ab9c05f2bd 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
@@ -44,7 +44,7 @@
 
 #include "swrast/swrast.h"
 
-#include "image.h"
+#include "main/image.h"
 
 
 #define FX_grLfbWriteRegion(fxMesa,dst_buffer,dst_x,dst_y,src_format,src_width,src_height,src_stride,src_data)		\
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_pixels.h b/src/mesa/drivers/dri/tdfx/tdfx_pixels.h
index 55f7eedef89..f5e5427653e 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_pixels.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_pixels.h
@@ -38,7 +38,7 @@
 #ifndef __TDFX_PIXELS_H__
 #define __TDFX_PIXELS_H__
 
-#include "context.h"
+#include "main/context.h"
 
 extern void
 tdfx_bitmap_R5G6B5( GLcontext *ctx, GLint px, GLint py,
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_render.c b/src/mesa/drivers/dri/tdfx/tdfx_render.c
index e374f09df3a..cf840c57a7a 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_render.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_render.c
@@ -274,7 +274,7 @@ static void tdfxClear( GLcontext *ctx, GLbitfield mask )
                                         fxMesa->Color.ClearAlpha,
                                         fxMesa->Depth.Clear);
 	 FX_grColorMaskv_NoLock(ctx, true4);
-	 if (ctx->DrawBuffer->_ColorDrawBufferMask[0] & BUFFER_BIT_FRONT_LEFT)
+	 if (ctx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT)
             fxMesa->Glide.grRenderBuffer(GR_BUFFER_FRONTBUFFER);
 	 if (!ctx->Depth.Test || !ctx->Depth.Mask)
 	    fxMesa->Glide.grDepthMask(FXFALSE);
@@ -294,7 +294,7 @@ static void tdfxClear( GLcontext *ctx, GLbitfield mask )
                fxMesa->Glide.grDepthMask(FXTRUE);
             }
             FX_grColorMaskv_NoLock(ctx, true4);
-            if (ctx->DrawBuffer->_ColorDrawBufferMask[0] & BUFFER_BIT_FRONT_LEFT)
+            if (ctx->DrawBuffer->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT)
                fxMesa->Glide.grRenderBuffer(GR_BUFFER_FRONTBUFFER);
          }
       }
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_screen.c b/src/mesa/drivers/dri/tdfx/tdfx_screen.c
index 77616643944..cd22b849511 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_screen.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_screen.c
@@ -40,8 +40,8 @@
 #include "tdfx_span.h"
 #include "tdfx_tris.h"
 
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 #include "xmlpool.h"
 
 #include "utils.h"
@@ -62,6 +62,11 @@ DRI_CONF_BEGIN
     DRI_CONF_SECTION_END
 DRI_CONF_END;
 
+static const __DRIextension *tdfxExtensions[] = {
+    &driReadDrawableExtension,
+    NULL
+};
+
 static const GLuint __driNConfigOptions = 1;
 
 extern const struct dri_extension card_extensions[];
@@ -72,9 +77,6 @@ tdfxCreateScreen( __DRIscreenPrivate *sPriv )
 {
    tdfxScreenPrivate *fxScreen;
    TDFXDRIPtr fxDRIPriv = (TDFXDRIPtr) sPriv->pDevPriv;
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-     (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-   void *const psc = sPriv->psc->screenConfigs;
 
    if (sPriv->devPrivSize != sizeof(TDFXDRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(TDFXDRIRec) does not match passed size from device driver\n");
@@ -115,9 +117,7 @@ tdfxCreateScreen( __DRIscreenPrivate *sPriv )
       return GL_FALSE;
    }
 
-   if (glx_enable_extension != NULL) {
-      (*glx_enable_extension)(psc, "GLX_SGI_make_current_read");
-   }
+   sPriv->extensions = tdfxExtensions;
 
    return GL_TRUE;
 }
@@ -343,36 +343,14 @@ tdfxSwapBuffers( __DRIdrawablePrivate *driDrawPriv )
    }
 }
 
-
-static const struct __DriverAPIRec tdfxAPI = {
-   .InitDriver      = tdfxInitDriver,
-   .DestroyScreen   = tdfxDestroyScreen,
-   .CreateContext   = tdfxCreateContext,
-   .DestroyContext  = tdfxDestroyContext,
-   .CreateBuffer    = tdfxCreateBuffer,
-   .DestroyBuffer   = tdfxDestroyBuffer,
-   .SwapBuffers     = tdfxSwapBuffers,
-   .MakeCurrent     = tdfxMakeCurrent,
-   .UnbindContext   = tdfxUnbindContext,
-   .GetSwapInfo     = NULL,
-   .GetMSC          = NULL,
-   .WaitForMSC      = NULL,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL
-};
-
-
-static __GLcontextModes *tdfxFillInModes(unsigned pixel_bits,
-					 unsigned depth_bits,
-					 unsigned stencil_bits,
-					 GLboolean have_back_buffer)
+static const __DRIconfig **
+tdfxFillInModes(__DRIscreenPrivate *psp,
+		unsigned pixel_bits,
+		unsigned depth_bits,
+		unsigned stencil_bits,
+		GLboolean have_back_buffer)
 {
-	__GLcontextModes *modes;
-	__GLcontextModes *m;
-	unsigned num_modes;
-	unsigned vis[2] = { GLX_TRUE_COLOR, GLX_DIRECT_COLOR };
 	unsigned deep = (depth_bits > 17);
-	unsigned i, db, depth, accum, stencil;
 
 	/* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
 	 * enough to add support.  Basically, if a context is created with an
@@ -380,120 +358,96 @@ static __GLcontextModes *tdfxFillInModes(unsigned pixel_bits,
 	 * will never be used.
 	 */
 
-	num_modes = (depth_bits == 16) ? 32 : 16;
-
-	modes = (*dri_interface->createContextModes)(num_modes, sizeof(__GLcontextModes));
-	m = modes;
-
-	for (i = 0; i <= 1; i++) {
-	    for (db = 0; db <= 1; db++) {
-		for (depth = 0; depth <= 1; depth++) {
-		    for (accum = 0; accum <= 1; accum++) {
-			for (stencil = 0; stencil <= !deep; stencil++) {
-			    if (deep) stencil = depth;
-			    m->redBits		= deep ? 8 : 5;
-			    m->greenBits	= deep ? 8 : 6;
-			    m->blueBits		= deep ? 8 : 5;
-			    m->alphaBits	= deep ? 8 : 0;
-			    m->redMask		= deep ?0xFF000000 :0x0000F800;
-			    m->greenMask	= deep ?0x00FF0000 :0x000007E0;
-			    m->blueMask		= deep ?0x0000FF00 :0x0000001F;
-			    m->alphaMask	= deep ? 0x000000FF : 0;
-			    m->rgbBits		= m->redBits + m->greenBits +
-			    			  m->blueBits + m->alphaBits;
-			    m->accumRedBits	= accum ? 16 : 0;
-			    m->accumGreenBits	= accum ? 16 : 0;
-			    m->accumBlueBits	= accum ? 16 : 0;
-			    m->accumAlphaBits	= (accum && deep) ? 16 : 0;
-			    m->stencilBits	= stencil ? 8 : 0;
-			    m->depthBits	= deep
-			    			  ? (depth ? 24 : 0)
-			    			  : (depth ? 0 : depth_bits);
-			    m->visualType	= vis[i];
-			    m->renderType	= GLX_RGBA_BIT;
-			    m->drawableType	= GLX_WINDOW_BIT;
-			    m->rgbMode		= GL_TRUE;
-			    m->doubleBufferMode = db ? GL_TRUE : GL_FALSE;
-			    if (db)
-			    	m->swapMethod = GLX_SWAP_UNDEFINED_OML;
-			    m->visualRating	= ((stencil && !deep) || accum)
-			    			  ? GLX_SLOW_CONFIG
-						  : GLX_NONE;
-			    m = m->next;
-			    if (deep) stencil = 0;
-			}
-		    }
-		}
-	    }
+	static const GLenum db_modes[2] = { GLX_NONE, GLX_SWAP_UNDEFINED_OML };
+	uint8_t depth_bits_array[4];
+	uint8_t stencil_bits_array[4];
+	if(deep) {
+		depth_bits_array[0] = 0;
+		depth_bits_array[1] = 24;
+		stencil_bits_array[0] = 0;
+		stencil_bits_array[1] = 8;
+	} else {
+		depth_bits_array[0] = depth_bits;
+		depth_bits_array[1] = 0;
+		depth_bits_array[2] = depth_bits;
+		depth_bits_array[3] = 0;
+		stencil_bits_array[0] = 0;
+		stencil_bits_array[1] = 0;
+		stencil_bits_array[2] = 8;
+		stencil_bits_array[3] = 8;
 	}
 
-	return modes;
+	return driCreateConfigs(
+		deep ? GL_RGBA : GL_RGB,
+		deep ? GL_UNSIGNED_INT_8_8_8_8 : GL_UNSIGNED_SHORT_5_6_5,
+		depth_bits_array,
+		stencil_bits_array,
+		deep ? 2 : 4,
+		db_modes, 2);
 }
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
+ * 
+ * \todo maybe fold this into intelInitDriver
  *
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
- *         failure.
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd,
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
+static const __DRIconfig **
+tdfxInitScreen(__DRIscreen *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 1, 1, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 1, 0, 0 };
 
-   dri_interface = interface;
+   /* divined from tdfx_dri.c, sketchy */
+   TDFXDRIPtr dri_priv = (TDFXDRIPtr) psp->pDevPriv;
+
+   /* XXX i wish it was like this */
+   /* bpp = dri_priv->bpp */
+   int bpp = (dri_priv->cpp > 2) ? 24 : 16;
 
    if ( ! driCheckDriDdxDrmVersions2( "tdfx",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
-
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-   				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &tdfxAPI);
 
-   if (psp != NULL) {
-      /* divined from tdfx_dri.c, sketchy */
-      TDFXDRIPtr dri_priv = (TDFXDRIPtr) psp->pDevPriv;
-      int bpp = (dri_priv->cpp > 2) ? 24 : 16;
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+   driInitExtensions( NULL, napalm_extensions, GL_FALSE );
 
-      /* XXX i wish it was like this */
-      /* bpp = dri_priv->bpp */
+   if (!tdfxInitDriver(psp))
+      return NULL;
       
-      *driver_modes = tdfxFillInModes(bpp, (bpp == 16) ? 16 : 24,
-				(bpp == 16) ? 0 : 8,
-				(dri_priv->backOffset!=dri_priv->depthOffset));
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-      driInitExtensions( NULL, napalm_extensions, GL_FALSE );
-   }
-
-   return (void *)psp;
+   return tdfxFillInModes(psp,
+			  bpp, (bpp == 16) ? 16 : 24,
+			  (bpp == 16) ? 0 : 8,
+			  (dri_priv->backOffset!=dri_priv->depthOffset));
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = tdfxInitScreen,
+   .DestroyScreen   = tdfxDestroyScreen,
+   .CreateContext   = tdfxCreateContext,
+   .DestroyContext  = tdfxDestroyContext,
+   .CreateBuffer    = tdfxCreateBuffer,
+   .DestroyBuffer   = tdfxDestroyBuffer,
+   .SwapBuffers     = tdfxSwapBuffers,
+   .MakeCurrent     = tdfxMakeCurrent,
+   .UnbindContext   = tdfxUnbindContext,
+   .GetSwapInfo     = NULL,
+   .GetDrawableMSC  = NULL,
+   .WaitForMSC      = NULL,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL
+};
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_span.h b/src/mesa/drivers/dri/tdfx/tdfx_span.h
index 5af9f9b3014..6973f8d1407 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_span.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_span.h
@@ -37,7 +37,7 @@
 #ifndef __TDFX_SPAN_H__
 #define __TDFX_SPAN_H__
 
-#include "context.h"
+#include "main/context.h"
 #include "drirenderbuffer.h"
 
 extern void tdfxDDInitSpanFuncs( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.c b/src/mesa/drivers/dri/tdfx/tdfx_state.c
index 3688c76a5c9..a2d7bcd97d9 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_state.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_state.c
@@ -38,11 +38,11 @@
  *
  */
 
-#include "mtypes.h"
-#include "colormac.h"
-#include "texformat.h"
-#include "texstore.h"
-#include "teximage.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
+#include "main/texformat.h"
+#include "main/texstore.h"
+#include "main/teximage.h"
 
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
@@ -1032,21 +1032,23 @@ static void tdfxDDDrawBuffer( GLcontext *ctx, GLenum mode )
 
    FLUSH_BATCH( fxMesa );
 
-   /*
-    * _ColorDrawBufferMask is easier to cope with than <mode>.
-    */
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers > 1) {
+      FALLBACK( fxMesa, TDFX_FALLBACK_DRAW_BUFFER, GL_TRUE );
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       fxMesa->DrawBuffer = fxMesa->ReadBuffer = GR_BUFFER_FRONTBUFFER;
       fxMesa->new_state |= TDFX_NEW_RENDER;
       FALLBACK( fxMesa, TDFX_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       fxMesa->DrawBuffer = fxMesa->ReadBuffer = GR_BUFFER_BACKBUFFER;
       fxMesa->new_state |= TDFX_NEW_RENDER;
       FALLBACK( fxMesa, TDFX_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
-   case 0:
+   case -1:
       FX_grColorMaskv( ctx, false4 );
       FALLBACK( fxMesa, TDFX_FALLBACK_DRAW_BUFFER, GL_FALSE );
       break;
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.h b/src/mesa/drivers/dri/tdfx/tdfx_state.h
index 591ea5b083f..4880b990fcd 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_state.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_state.h
@@ -37,7 +37,7 @@
 #ifndef __TDFX_STATE_H__
 #define __TDFX_STATE_H__
 
-#include "context.h"
+#include "main/context.h"
 #include "tdfx_context.h"
 
 extern void tdfxDDInitStateFuncs( GLcontext *ctx );
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tex.c b/src/mesa/drivers/dri/tdfx/tdfx_tex.c
index 70ef7264379..1f7257eaead 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_tex.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_tex.c
@@ -38,14 +38,14 @@
  */
 
 
-#include "enums.h"
-#include "image.h"
-#include "mipmap.h"
-#include "texcompress.h"
-#include "texformat.h"
-#include "teximage.h"
-#include "texstore.h"
-#include "texobj.h"
+#include "main/enums.h"
+#include "main/image.h"
+#include "main/mipmap.h"
+#include "main/texcompress.h"
+#include "main/texformat.h"
+#include "main/teximage.h"
+#include "main/texstore.h"
+#include "main/texobj.h"
 #include "tdfx_context.h"
 #include "tdfx_tex.h"
 #include "tdfx_texman.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_texman.c b/src/mesa/drivers/dri/tdfx/tdfx_texman.c
index f9b2726da29..35636ee5efb 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_texman.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_texman.c
@@ -37,8 +37,8 @@
 #include "tdfx_context.h"
 #include "tdfx_tex.h"
 #include "tdfx_texman.h"
-#include "texobj.h"
-#include "hash.h"
+#include "main/texobj.h"
+#include "main/hash.h"
 
 
 #define BAD_ADDRESS ((FxU32) -1)
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tris.c b/src/mesa/drivers/dri/tdfx/tdfx_tris.c
index 59ff35a7fa9..88249888952 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_tris.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_tris.c
@@ -31,10 +31,10 @@
  *    Keith Whitwell <keith@tungstengraphics.com>
  */
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tris.h b/src/mesa/drivers/dri/tdfx/tdfx_tris.h
index a591decf1dc..ec48a486927 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_tris.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_tris.h
@@ -33,7 +33,7 @@
 #ifndef TDFX_TRIS_INC
 #define TDFX_TRIS_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void tdfxDDInitTriFuncs( GLcontext *ctx );
 
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
index 62885daaa5b..49288022328 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
@@ -23,11 +23,11 @@
  *
  */
  
-#include "glheader.h"
-#include "mtypes.h"
-#include "imports.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/imports.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "math/m_translate.h"
 #include "swrast_setup/swrast_setup.h"
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.h b/src/mesa/drivers/dri/tdfx/tdfx_vb.h
index 6389ec95b17..1e190e85f64 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vb.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.h
@@ -26,7 +26,7 @@
 #ifndef TDFXVB_INC
 #define TDFXVB_INC
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 #include "tnl/tnl.h"
 #include "tnl/t_context.h"
diff --git a/src/mesa/drivers/dri/trident/trident_context.c b/src/mesa/drivers/dri/trident/trident_context.c
index 8dc7f0dc781..e134cfcf8e9 100644
--- a/src/mesa/drivers/dri/trident/trident_context.c
+++ b/src/mesa/drivers/dri/trident/trident_context.c
@@ -35,17 +35,17 @@
 #include "tnl/tnl.h"
 #include "tnl/t_pipeline.h"
 
-#include "context.h"
-#include "simple_list.h"
-#include "matrix.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/context.h"
+#include "main/simple_list.h"
+#include "main/matrix.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 #if defined(USE_X86_ASM)
 #include "x86/common_x86_asm.h"
 #endif
-#include "simple_list.h"
-#include "mm.h"
+#include "main/simple_list.h"
+#include "main/mm.h"
 #include "drirenderbuffer.h"
 
 #include "drivers/common/driverfuncs.h"
@@ -417,56 +417,46 @@ tridentInitDriver(__DRIscreenPrivate *sPriv)
     return GL_TRUE;
 }
 
-static struct __DriverAPIRec tridentAPI = {
-   tridentInitDriver,
-   tridentDestroyScreen,
-   tridentCreateContext,
-   tridentDestroyContext,
-   tridentCreateBuffer,
-   tridentDestroyBuffer,
-   tridentSwapBuffers,
-   tridentMakeCurrent,
-   tridentUnbindContext,
-};
-
-
-PUBLIC void *__driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn,
-                                   __DRIscreen *psc,
-                                   const __GLcontextModes * modes,
-                                   const __DRIversion * ddx_version,
-                                   const __DRIversion * dri_version,
-                                   const __DRIversion * drm_version,
-                                   const __DRIframebuffer * frame_buffer,
-                                   drmAddress pSAREA, int fd,
-                                   int internal_api_version,
-				   const __DRIinterfaceMethods * interface,
-                                   __GLcontextModes ** driver_modes )
+/**
+ * This is the driver specific part of the createNewScreen entry point.
+ * 
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
+ */
+const __DRIconfig **tridentInitScreen(__DRIscreenPrivate *psp)
 {
-    __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 4, 0, 0 };
    static const __DRIversion dri_expected = { 3, 1, 0 };
    static const __DRIversion drm_expected = { 1, 0, 0 };
-
-   dri_interface = interface;
-
+   
    if ( ! driCheckDriDdxDrmVersions2( "Trident",
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected ) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected ) )
       return NULL;
-   }
 
-    psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-                                   ddx_version, dri_version, drm_version,
-                                   frame_buffer, pSAREA, fd,
-                                   internal_api_version, &tridentAPI);
+   if (!tridentInitDriver(psp))
+	return NULL;
 
-    if ( psp != NULL ) {
+    /* Wait... what?  This driver doesn't report any modes... */
 #if 0
-       TRIDENTDRIPtr dri_priv = (TRIDENTDRIPtr) psp->pDevPriv;
-       *driver_modes = tridentFillInModes( dri_priv->bytesPerPixel * 8,
-					   GL_TRUE );
+   TRIDENTDRIPtr dri_priv = (TRIDENTDRIPtr) psp->pDevPriv;
+   *driver_modes = tridentFillInModes( dri_priv->bytesPerPixel * 8,
+				       GL_TRUE );
 #endif
-    }
-    return (void *) psp;
+
+   return NULL;
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   tridentInitScreen,
+   tridentDestroyScreen,
+   tridentCreateContext,
+   tridentDestroyContext,
+   tridentCreateBuffer,
+   tridentDestroyBuffer,
+   tridentSwapBuffers,
+   tridentMakeCurrent,
+   tridentUnbindContext,
+};
diff --git a/src/mesa/drivers/dri/trident/trident_context.h b/src/mesa/drivers/dri/trident/trident_context.h
index 1d3ca84400d..fbbb4a96e78 100644
--- a/src/mesa/drivers/dri/trident/trident_context.h
+++ b/src/mesa/drivers/dri/trident/trident_context.h
@@ -28,10 +28,10 @@
 #define _TRIDENT_CONTEXT_H_
 
 #include "dri_util.h"
-#include "macros.h"
-#include "mtypes.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
 #include "drm.h"
-#include "mm.h"
+#include "main/mm.h"
 
 #define SUBPIXEL_X (0.0F)
 #define SUBPIXEL_Y (0.125F)
@@ -54,14 +54,14 @@
 #undef TAG
 
 /* these require that base be dword-aligned */
-static inline void MMIO_OUT32(unsigned char *base, unsigned int offset,
+static INLINE void MMIO_OUT32(unsigned char *base, unsigned int offset,
                               unsigned int val)
 {
     unsigned int *addr = (unsigned int *)(base + offset);
     *addr = val;
 }
 
-static inline unsigned int MMIO_IN32(unsigned char *base, unsigned int offset)
+static INLINE unsigned int MMIO_IN32(unsigned char *base, unsigned int offset)
 {
     unsigned int *addr = (unsigned int *)(base + offset);
     return *addr;
diff --git a/src/mesa/drivers/dri/trident/trident_dd.c b/src/mesa/drivers/dri/trident/trident_dd.c
index 4639b3a15e7..faa40c36a26 100644
--- a/src/mesa/drivers/dri/trident/trident_dd.c
+++ b/src/mesa/drivers/dri/trident/trident_dd.c
@@ -31,8 +31,8 @@
 #endif
 
 #include "swrast/swrast.h"
-#include "context.h"
-#include "framebuffer.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
 
 #define TRIDENT_DATE	"20041223"
 
diff --git a/src/mesa/drivers/dri/trident/trident_state.c b/src/mesa/drivers/dri/trident/trident_state.c
index 5303bd422ed..e68d3a73c64 100644
--- a/src/mesa/drivers/dri/trident/trident_state.c
+++ b/src/mesa/drivers/dri/trident/trident_state.c
@@ -30,7 +30,7 @@
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/tnl.h"
-#include "framebuffer.h"
+#include "main/framebuffer.h"
 
 #define TRIDENTPACKCOLOR332(r, g, b)					\
    (((r) & 0xe0) | (((g) & 0xe0) >> 3) | (((b) & 0xc0) >> 6))
@@ -51,9 +51,9 @@
 #define TRIDENTPACKCOLOR4444(r, g, b, a)					\
    ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
 
-static __inline__ GLuint tridentPackColor( GLuint cpp,
-					  GLubyte r, GLubyte g,
-					  GLubyte b, GLubyte a )
+static INLINE GLuint tridentPackColor( GLuint cpp,
+                                       GLubyte r, GLubyte g,
+                                       GLubyte b, GLubyte a )
 {
    switch ( cpp ) {
    case 2:
diff --git a/src/mesa/drivers/dri/trident/trident_vb.c b/src/mesa/drivers/dri/trident/trident_vb.c
index 77e4d9b76e0..b231f5ef15e 100644
--- a/src/mesa/drivers/dri/trident/trident_vb.c
+++ b/src/mesa/drivers/dri/trident/trident_vb.c
@@ -24,10 +24,10 @@
  * Trident CyberBladeXP driver.
  *
  */
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
 
 #include "swrast_setup/swrast_setup.h"
 #include "swrast/swrast.h"
diff --git a/src/mesa/drivers/dri/unichrome/via_context.c b/src/mesa/drivers/dri/unichrome/via_context.c
index 4d25d328e33..f5bdb65eb08 100644
--- a/src/mesa/drivers/dri/unichrome/via_context.c
+++ b/src/mesa/drivers/dri/unichrome/via_context.c
@@ -30,14 +30,14 @@
  * \author Others at S3 Graphics?
  */
 
-#include "glheader.h"
-#include "context.h"
-#include "matrix.h"
-#include "state.h"
-#include "simple_list.h"
-#include "extensions.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/matrix.h"
+#include "main/state.h"
+#include "main/simple_list.h"
+#include "main/extensions.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -59,7 +59,7 @@
 #include "via_fb.h"
 
 #include <stdio.h>
-#include "macros.h"
+#include "main/macros.h"
 #include "drirenderbuffer.h"
 
 #define need_GL_ARB_multisample
@@ -123,7 +123,7 @@ static const GLubyte *viaGetString(GLcontext *ctx, GLenum name)
  * 
  * \returns A pixel width that meets the alignment requirements.
  */
-static __inline__ unsigned
+static INLINE unsigned
 buffer_align( unsigned width )
 {
     return (width + 0x0f) & ~0x0f;
@@ -601,9 +601,6 @@ viaCreateContext(const __GLcontextModes *visual,
     _tnl_allow_pixel_fog(ctx, GL_FALSE);
     _tnl_allow_vertex_fog(ctx, GL_TRUE);
 
-/*     vmesa->display = dpy; */
-    vmesa->display = sPriv->display;
-    
     vmesa->hHWContext = driContextPriv->hHWContext;
     vmesa->driFd = sPriv->fd;
     vmesa->driHwLock = &sPriv->pSAREA->lock;
@@ -661,14 +658,10 @@ viaCreateContext(const __GLcontextModes *visual,
         driQueryOptionb(&vmesa->optionCache, "no_rast"))
        FALLBACK(vmesa, VIA_FALLBACK_USER_DISABLE, 1);
 
-    vmesa->vblank_flags =
-       vmesa->viaScreen->irqEnabled ?
-        driGetDefaultVBlankFlags(&vmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
-
     if (getenv("VIA_PAGEFLIP"))
        vmesa->allowPageFlip = 1;
 
-    (*dri_interface->getUST)( &vmesa->swap_ust );
+    (*sPriv->systemTime->getUST)( &vmesa->swap_ust );
 
 
     vmesa->regMMIOBase = (GLuint *)((unsigned long)viaScreen->reg);
@@ -686,46 +679,48 @@ void
 viaDestroyContext(__DRIcontextPrivate *driContextPriv)
 {
     GET_CURRENT_CONTEXT(ctx);
-    struct via_context *vmesa = 
+    struct via_context *vmesa =
        (struct via_context *)driContextPriv->driverPrivate;
     struct via_context *current = ctx ? VIA_CONTEXT(ctx) : NULL;
+
     assert(vmesa); /* should never be null */
 
+    if (vmesa->driDrawable) {
+       viaWaitIdle(vmesa, GL_FALSE);
+
+       if (vmesa->doPageFlip) {
+	  LOCK_HARDWARE(vmesa);
+	  if (vmesa->pfCurrentOffset != 0) {
+	     fprintf(stderr, "%s - reset pf\n", __FUNCTION__);
+	     viaResetPageFlippingLocked(vmesa);
+	  }
+	  UNLOCK_HARDWARE(vmesa);
+       }
+    }
+
     /* check if we're deleting the currently bound context */
     if (vmesa == current) {
       VIA_FLUSH_DMA(vmesa);
       _mesa_make_current(NULL, NULL, NULL);
     }
 
-    if (vmesa) {
-        viaWaitIdle(vmesa, GL_FALSE);
-	if (vmesa->doPageFlip) {
-	   LOCK_HARDWARE(vmesa);
-	   if (vmesa->pfCurrentOffset != 0) {
-	      fprintf(stderr, "%s - reset pf\n", __FUNCTION__);
-	      viaResetPageFlippingLocked(vmesa);
-	   }
-	   UNLOCK_HARDWARE(vmesa);
-	}
-	
-	_swsetup_DestroyContext(vmesa->glCtx);
-        _tnl_DestroyContext(vmesa->glCtx);
-        _vbo_DestroyContext(vmesa->glCtx);
-        _swrast_DestroyContext(vmesa->glCtx);
-        /* free the Mesa context */
-	_mesa_destroy_context(vmesa->glCtx);
-	/* release our data */
-	FreeBuffer(vmesa);
+    _swsetup_DestroyContext(vmesa->glCtx);
+    _tnl_DestroyContext(vmesa->glCtx);
+    _vbo_DestroyContext(vmesa->glCtx);
+    _swrast_DestroyContext(vmesa->glCtx);
+    /* free the Mesa context */
+    _mesa_destroy_context(vmesa->glCtx);
+    /* release our data */
+    FreeBuffer(vmesa);
 
-	assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_AGP]));
-	assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_VIDEO]));
-	assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_SYSTEM]));
-	assert (is_empty_list(&vmesa->freed_tex_buffers));
+    assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_AGP]));
+    assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_VIDEO]));
+    assert (is_empty_list(&vmesa->tex_image_list[VIA_MEM_SYSTEM]));
+    assert (is_empty_list(&vmesa->freed_tex_buffers));
 
-	driDestroyOptionCache(&vmesa->optionCache);
+    driDestroyOptionCache(&vmesa->optionCache);
 
-	FREE(vmesa);
-    }
+    FREE(vmesa);
 }
 
 
@@ -733,17 +728,18 @@ void viaXMesaWindowMoved(struct via_context *vmesa)
 {
    __DRIdrawablePrivate *const drawable = vmesa->driDrawable;
    __DRIdrawablePrivate *const readable = vmesa->driReadable;
-   struct via_renderbuffer *const draw_buffer = 
-     (struct via_renderbuffer *) drawable->driverPrivate;
-   struct via_renderbuffer *const read_buffer =
-     (struct via_renderbuffer *) readable->driverPrivate;
+   struct via_renderbuffer * draw_buffer;
+   struct via_renderbuffer * read_buffer;
    GLuint bytePerPixel = vmesa->viaScreen->bitsPerPixel >> 3;
 
    if (!drawable)
       return;
+
+   draw_buffer =  (struct via_renderbuffer *) drawable->driverPrivate;
+   read_buffer =  (struct via_renderbuffer *) readable->driverPrivate;
    
-   switch (vmesa->glCtx->DrawBuffer->_ColorDrawBufferMask[0]) {
-   case BUFFER_BIT_BACK_LEFT: 
+   switch (vmesa->glCtx->DrawBuffer->_ColorDrawBufferIndexes[0]) {
+   case BUFFER_BACK_LEFT: 
       if (drawable->numBackClipRects == 0) {
 	 vmesa->numClipRects = drawable->numClipRects;
 	 vmesa->pClipRects = drawable->pClipRects;
@@ -753,7 +749,7 @@ void viaXMesaWindowMoved(struct via_context *vmesa)
 	 vmesa->pClipRects = drawable->pBackClipRects;
       }
       break;
-   case BUFFER_BIT_FRONT_LEFT:
+   case BUFFER_FRONT_LEFT:
       vmesa->numClipRects = drawable->numClipRects;
       vmesa->pClipRects = drawable->pClipRects;
       break;
@@ -839,13 +835,17 @@ viaMakeCurrent(__DRIcontextPrivate *driContextPriv,
         drawBuffer = (GLframebuffer *)driDrawPriv->driverPrivate;
         readBuffer = (GLframebuffer *)driReadPriv->driverPrivate;
 
-	if (vmesa->driDrawable != driDrawPriv) {
-	   driDrawableInitVBlank(driDrawPriv, vmesa->vblank_flags,
-				 &vmesa->vbl_seq);
-	}
-
        if ((vmesa->driDrawable != driDrawPriv)
 	   || (vmesa->driReadable != driReadPriv)) {
+	  if (driDrawPriv->swap_interval == (unsigned)-1) {
+	     driDrawPriv->vblFlags =
+		vmesa->viaScreen->irqEnabled ?
+		driGetDefaultVBlankFlags(&vmesa->optionCache) :
+		VBLANK_FLAG_NO_IRQ;
+
+	     driDrawableInitVBlank(driDrawPriv);
+	  }
+
 	  vmesa->driDrawable = driDrawPriv;
 	  vmesa->driReadable = driReadPriv;
 
diff --git a/src/mesa/drivers/dri/unichrome/via_context.h b/src/mesa/drivers/dri/unichrome/via_context.h
index fecd2782fba..4cc9e475c21 100644
--- a/src/mesa/drivers/dri/unichrome/via_context.h
+++ b/src/mesa/drivers/dri/unichrome/via_context.h
@@ -28,9 +28,10 @@
 
 #include "dri_util.h"
 
-#include "mtypes.h"
 #include "drm.h"
-#include "mm.h"
+
+#include "main/mtypes.h"
+#include "main/mm.h"
 #include "tnl/t_vertex.h"
 
 #include "via_screen.h"
@@ -289,7 +290,6 @@ struct via_context {
    drm_context_t hHWContext;
    drm_hw_lock_t *driHwLock;
    int driFd;
-   __DRInativeDisplay *display;
 
    /**
     * DRI drawable bound to this context for drawing.
@@ -322,9 +322,6 @@ struct via_context {
     */
    driOptionCache optionCache;
 
-   GLuint vblank_flags;
-   GLuint vbl_seq;
-
    int64_t swap_ust;
    int64_t swap_missed_ust;
 
diff --git a/src/mesa/drivers/dri/unichrome/via_fb.c b/src/mesa/drivers/dri/unichrome/via_fb.c
index 48c7ed4caa5..e4fb29f6c60 100644
--- a/src/mesa/drivers/dri/unichrome/via_fb.c
+++ b/src/mesa/drivers/dri/unichrome/via_fb.c
@@ -28,8 +28,8 @@
 #include "via_ioctl.h"
 #include "via_fb.h"
 #include "xf86drm.h"
-#include "imports.h"
-#include "simple_list.h"
+#include "main/imports.h"
+#include "main/simple_list.h"
 #include <sys/ioctl.h>
 
 GLboolean
diff --git a/src/mesa/drivers/dri/unichrome/via_ioctl.c b/src/mesa/drivers/dri/unichrome/via_ioctl.c
index 4a733fb00c2..6746f552ae6 100644
--- a/src/mesa/drivers/dri/unichrome/via_ioctl.c
+++ b/src/mesa/drivers/dri/unichrome/via_ioctl.c
@@ -24,13 +24,13 @@
 #include <stdio.h>
 #include <unistd.h>
 
-#include "glheader.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "dd.h"
+#include "main/glheader.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/dd.h"
 #include "swrast/swrast.h"
 
-#include "mm.h"
+#include "main/mm.h"
 #include "via_context.h"
 #include "via_tris.h"
 #include "via_ioctl.h"
@@ -507,11 +507,12 @@ void viaWaitIdleLocked( struct via_context *vmesa, GLboolean light )
  * except that WAIT_IDLE() will spin the CPU polling, while this is
  * IRQ driven.
  */
-static void viaWaitIdleVBlank( const __DRIdrawablePrivate *dPriv, 
+static void viaWaitIdleVBlank(  __DRIdrawablePrivate *dPriv, 
 			       struct via_context *vmesa,
 			       GLuint value )
 {
    GLboolean missed_target;
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
    VIA_FLUSH_DMA(vmesa); 
 
@@ -523,11 +524,10 @@ static void viaWaitIdleVBlank( const __DRIdrawablePrivate *dPriv,
 	  vmesa->thrashing)
 	 viaSwapOutWork(vmesa);
 
-      driWaitForVBlank( dPriv, & vmesa->vbl_seq, 
-			vmesa->vblank_flags, & missed_target );
+      driWaitForVBlank( dPriv, & missed_target );
       if ( missed_target ) {
 	 vmesa->swap_missed_count++;
-	 (*dri_interface->getUST)( &vmesa->swap_missed_ust );
+	 (*psp->systemTime->getUST)( &vmesa->swap_missed_ust );
       }
    } 
    while (!viaCheckBreadcrumb(vmesa, value));	 
@@ -591,10 +591,11 @@ void viaResetPageFlippingLocked(struct via_context *vmesa)
 /*
  * Copy the back buffer to the front buffer. 
  */
-void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
+void viaCopyBuffer(__DRIdrawablePrivate *dPriv)
 {
    struct via_context *vmesa = 
       (struct via_context *)dPriv->driContextPriv->driverPrivate;
+   __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
    if (VIA_DEBUG & DEBUG_IOCTL)
       fprintf(stderr, 
@@ -607,7 +608,7 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 
    VIA_FLUSH_DMA(vmesa);
 
-   if (vmesa->vblank_flags == VBLANK_FLAG_SYNC &&
+   if (dPriv->vblFlags == VBLANK_FLAG_SYNC &&
        vmesa->lastBreadcrumbWrite > 1)
       viaWaitIdleVBlank(dPriv, vmesa, vmesa->lastBreadcrumbWrite-1);
    else
@@ -630,18 +631,19 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
    viaEmitBreadcrumbLocked(vmesa);
    UNLOCK_HARDWARE(vmesa);
 
-   (*dri_interface->getUST)( &vmesa->swap_ust );
+   (*psp->systemTime->getUST)( &vmesa->swap_ust );
 }
 
 
-void viaPageFlip(const __DRIdrawablePrivate *dPriv)
+void viaPageFlip(__DRIdrawablePrivate *dPriv)
 {
     struct via_context *vmesa = 
        (struct via_context *)dPriv->driContextPriv->driverPrivate;
     struct via_renderbuffer buffer_tmp;
+    __DRIscreenPrivate *psp = dPriv->driScreenPriv;
 
     VIA_FLUSH_DMA(vmesa);
-   if (vmesa->vblank_flags == VBLANK_FLAG_SYNC &&
+   if (dPriv->vblFlags == VBLANK_FLAG_SYNC &&
        vmesa->lastBreadcrumbWrite > 1)
       viaWaitIdleVBlank(dPriv, vmesa, vmesa->lastBreadcrumbWrite - 1);
    else
@@ -654,7 +656,7 @@ void viaPageFlip(const __DRIdrawablePrivate *dPriv)
     viaEmitBreadcrumbLocked(vmesa);
     UNLOCK_HARDWARE(vmesa);
 
-    (*dri_interface->getUST)( &vmesa->swap_ust );
+    (*psp->systemTime->getUST)( &vmesa->swap_ust );
 
 
     /* KW: FIXME: When buffers are freed, could free frontbuffer by
diff --git a/src/mesa/drivers/dri/unichrome/via_ioctl.h b/src/mesa/drivers/dri/unichrome/via_ioctl.h
index a81b427d807..14a833a97d0 100644
--- a/src/mesa/drivers/dri/unichrome/via_ioctl.h
+++ b/src/mesa/drivers/dri/unichrome/via_ioctl.h
@@ -33,8 +33,8 @@ void viaFlushDma(struct via_context *vmesa);
 void viaFlushDmaLocked(struct via_context *vmesa, GLuint flags);
 
 void viaInitIoctlFuncs(GLcontext *ctx);
-void viaCopyBuffer(const __DRIdrawablePrivate *dpriv);
-void viaPageFlip(const __DRIdrawablePrivate *dpriv);
+void viaCopyBuffer(__DRIdrawablePrivate *dpriv);
+void viaPageFlip(__DRIdrawablePrivate *dpriv);
 void viaCheckDma(struct via_context *vmesa, GLuint bytes);
 void viaResetPageFlippingLocked(struct via_context *vmesa);
 void viaWaitIdle(struct via_context *vmesa, GLboolean light);
@@ -58,7 +58,7 @@ void viaEmitBreadcrumb( struct via_context *vmesa );
 
 void viaWrapPrimitive( struct via_context *vmesa );
 
-static __inline__ GLuint *viaAllocDma(struct via_context *vmesa, int bytes)
+static INLINE GLuint *viaAllocDma(struct via_context *vmesa, int bytes)
 {
    if (vmesa->dmaLow + bytes > VIA_DMA_HIGHWATER) {
       viaFlushDma(vmesa);
@@ -72,7 +72,7 @@ static __inline__ GLuint *viaAllocDma(struct via_context *vmesa, int bytes)
 }
 
 
-static GLuint __inline__ *viaExtendPrimitive(struct via_context *vmesa, int bytes)
+static GLuint INLINE *viaExtendPrimitive(struct via_context *vmesa, int bytes)
 {
    if (vmesa->dmaLow + bytes > VIA_DMA_HIGHWATER) {
       viaWrapPrimitive(vmesa);
diff --git a/src/mesa/drivers/dri/unichrome/via_render.c b/src/mesa/drivers/dri/unichrome/via_render.c
index 387473ef522..f676cc13c81 100644
--- a/src/mesa/drivers/dri/unichrome/via_render.c
+++ b/src/mesa/drivers/dri/unichrome/via_render.c
@@ -28,10 +28,10 @@
  * dma buffers.  Use strip/fan hardware acceleration where possible.
  *
  */
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "mtypes.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
 
 #include "tnl/t_context.h"
 
@@ -106,7 +106,7 @@ static GLboolean via_run_fastrender(GLcontext *ctx,
     tnl->clipspace.new_inputs |= VERT_BIT_POS;
 
     for (i = 0; i < VB->PrimitiveCount; ++i) {
-        GLuint mode = VB->Primitive[i].mode;
+        GLuint mode = _tnl_translate_prim(&VB->Primitive[i]);
         GLuint start = VB->Primitive[i].start;
         GLuint length = VB->Primitive[i].count;
         if (length)
diff --git a/src/mesa/drivers/dri/unichrome/via_screen.c b/src/mesa/drivers/dri/unichrome/via_screen.c
index b81549df0e9..988f9935ac1 100644
--- a/src/mesa/drivers/dri/unichrome/via_screen.c
+++ b/src/mesa/drivers/dri/unichrome/via_screen.c
@@ -24,14 +24,14 @@
 
 #include <stdio.h>
 
-#include "utils.h"
 #include "dri_util.h"
-#include "glheader.h"
-#include "context.h"
-#include "framebuffer.h"
-#include "renderbuffer.h"
-#include "matrix.h"
-#include "simple_list.h"
+#include "utils.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/framebuffer.h"
+#include "main/renderbuffer.h"
+#include "main/matrix.h"
+#include "main/simple_list.h"
 #include "vblank.h"
 
 #include "via_state.h"
@@ -48,7 +48,7 @@
 
 #include "xmlpool.h"
 
-const char __driConfigOptions[] =
+PUBLIC const char __driConfigOptions[] =
 DRI_CONF_BEGIN
     DRI_CONF_SECTION_PERFORMANCE
         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
@@ -64,8 +64,6 @@ static const GLuint __driNConfigOptions = 3;
 
 extern const struct dri_extension card_extensions[];
 
-static int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
-
 static drmBufMapPtr via_create_empty_buffers(void)
 {
     drmBufMapPtr retval;
@@ -98,9 +96,7 @@ viaInitDriver(__DRIscreenPrivate *sPriv)
 {
     viaScreenPrivate *viaScreen;
     VIADRIPtr gDRIPriv = (VIADRIPtr)sPriv->pDevPriv;
-    PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-      (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension"));
-    void * const psc = sPriv->psc->screenConfigs;
+    int i;
 
     if (sPriv->devPrivSize != sizeof(VIADRIRec)) {
       fprintf(stderr,"\nERROR!  sizeof(VIADRIRec) does not match passed size from device driver\n");
@@ -175,17 +171,17 @@ viaInitDriver(__DRIscreenPrivate *sPriv)
 
     viaScreen->sareaPrivOffset = gDRIPriv->sarea_priv_offset;
 
-    if ( glx_enable_extension != NULL ) {
-       if ( viaScreen->irqEnabled ) {
-	  (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
-	  (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
-	  (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
-       }
-
-       (*glx_enable_extension)( psc, "GLX_SGI_make_current_read" );
-       (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
+    i = 0;
+    viaScreen->extensions[i++] = &driFrameTrackingExtension.base;
+    viaScreen->extensions[i++] = &driReadDrawableExtension;
+    if ( viaScreen->irqEnabled ) {
+	viaScreen->extensions[i++] = &driSwapControlExtension.base;
+	viaScreen->extensions[i++] = &driMediaStreamCounterExtension.base;
     }
 
+    viaScreen->extensions[i++] = NULL;
+    sPriv->extensions = viaScreen->extensions;
+
     return GL_TRUE;
 }
 
@@ -323,32 +319,11 @@ viaDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
    _mesa_unreference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)));
 }
 
-
-
-static struct __DriverAPIRec viaAPI = {
-   .InitDriver      = viaInitDriver,
-   .DestroyScreen   = viaDestroyScreen,
-   .CreateContext   = viaCreateContext,
-   .DestroyContext  = viaDestroyContext,
-   .CreateBuffer    = viaCreateBuffer,
-   .DestroyBuffer   = viaDestroyBuffer,
-   .SwapBuffers     = viaSwapBuffers,
-   .MakeCurrent     = viaMakeCurrent,
-   .UnbindContext   = viaUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetMSC          = driGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL
-};
-
-
-static __GLcontextModes *
-viaFillInModes( unsigned pixel_bits, GLboolean have_back_buffer )
+static const __DRIconfig **
+viaFillInModes( __DRIscreenPrivate *psp,
+		unsigned pixel_bits, GLboolean have_back_buffer )
 {
-    __GLcontextModes * modes;
-    __GLcontextModes * m;
-    unsigned num_modes;
+    __DRIconfig **configs;
     const unsigned back_buffer_factor = (have_back_buffer) ? 2 : 1;
     GLenum fb_format;
     GLenum fb_type;
@@ -369,9 +344,6 @@ viaFillInModes( unsigned pixel_bits, GLboolean have_back_buffer )
     static const uint8_t stencil_bits_array[4] = { 0,  0,  8,  0 };
     const unsigned depth_buffer_factor = 3;
 
-
-    num_modes = depth_buffer_factor * back_buffer_factor * 4;
-
     if ( pixel_bits == 16 ) {
         fb_format = GL_RGB;
         fb_type = GL_UNSIGNED_SHORT_5_6_5;
@@ -381,94 +353,61 @@ viaFillInModes( unsigned pixel_bits, GLboolean have_back_buffer )
         fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
     }
 
-    modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) );
-    m = modes;
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, 
-			   depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_TRUE_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
+    configs = driCreateConfigs(fb_format, fb_type,
+			       depth_bits_array, stencil_bits_array,
+			       depth_buffer_factor, back_buffer_modes,
+			       back_buffer_factor);
+    if (configs == NULL) {
+	fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
+		__LINE__);
 	return NULL;
     }
 
-    if ( ! driFillInModes( & m, fb_format, fb_type,
-			   depth_bits_array, stencil_bits_array, 
-			   depth_buffer_factor,
-			   back_buffer_modes, back_buffer_factor,
-			   GLX_DIRECT_COLOR ) ) {
-	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
-		 __func__, __LINE__ );
-	return NULL;
-    }
-
-    return modes;
+    return (const __DRIconfig **) configs;
 }
 
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC
-void * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn,
-			     __DRIscreen *psc,
-			     const __GLcontextModes * modes,
-			     const __DRIversion * ddx_version,
-			     const __DRIversion * dri_version,
-			     const __DRIversion * drm_version,
-			     const __DRIframebuffer * frame_buffer,
-			     drmAddress pSAREA, int fd, 
-			     int internal_api_version,
-			     const __DRIinterfaceMethods * interface,
-			     __GLcontextModes ** driver_modes )
-			     
+static const __DRIconfig **
+viaInitScreen(__DRIscreenPrivate *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { VIA_DRIDDX_VERSION_MAJOR,
                                               VIA_DRIDDX_VERSION_MINOR,
                                               VIA_DRIDDX_VERSION_PATCH };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 2, 3, 0 };
    static const char *driver_name = "Unichrome";
-
-   dri_interface = interface;
+   VIADRIPtr dri_priv = (VIADRIPtr) psp->pDevPriv;
 
    if ( ! driCheckDriDdxDrmVersions2( driver_name,
-				      dri_version, & dri_expected,
-				      ddx_version, & ddx_expected,
-				      drm_version, & drm_expected) ) {
+				      &psp->dri_version, & dri_expected,
+				      &psp->ddx_version, & ddx_expected,
+				      &psp->drm_version, & drm_expected) )
       return NULL;
-   }
-      
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-				  ddx_version, dri_version, drm_version,
-				  frame_buffer, pSAREA, fd,
-				  internal_api_version, &viaAPI);
-   if ( psp != NULL ) {
-      VIADRIPtr dri_priv = (VIADRIPtr) psp->pDevPriv;
-      *driver_modes = viaFillInModes( dri_priv->bytesPerPixel * 8,
-				      GL_TRUE );
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions( NULL, card_extensions, GL_FALSE );
-   }
 
-   return (void *) psp;
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions( NULL, card_extensions, GL_FALSE );
+
+   if (!viaInitDriver(psp))
+       return NULL;
+
+   return viaFillInModes( psp, dri_priv->bytesPerPixel * 8, GL_TRUE );
+
 }
 
 
@@ -497,3 +436,20 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
 
    return 0;
 }
+
+const struct __DriverAPIRec driDriverAPI = {
+   .InitScreen      = viaInitScreen,
+   .DestroyScreen   = viaDestroyScreen,
+   .CreateContext   = viaCreateContext,
+   .DestroyContext  = viaDestroyContext,
+   .CreateBuffer    = viaCreateBuffer,
+   .DestroyBuffer   = viaDestroyBuffer,
+   .SwapBuffers     = viaSwapBuffers,
+   .MakeCurrent     = viaMakeCurrent,
+   .UnbindContext   = viaUnbindContext,
+   .GetSwapInfo     = getSwapInfo,
+   .GetDrawableMSC  = driDrawableGetMSC32,
+   .WaitForMSC      = driWaitForMSC32,
+   .WaitForSBC      = NULL,
+   .SwapBuffersMSC  = NULL
+};
diff --git a/src/mesa/drivers/dri/unichrome/via_screen.h b/src/mesa/drivers/dri/unichrome/via_screen.h
index 84aa5aef88e..c3ef722ff07 100644
--- a/src/mesa/drivers/dri/unichrome/via_screen.h
+++ b/src/mesa/drivers/dri/unichrome/via_screen.h
@@ -70,6 +70,8 @@ typedef struct {
 
     /* Configuration cache with default values for all contexts */
     driOptionCache optionCache;
+
+    const __DRIextension *extensions[5];
 } viaScreenPrivate;
 
 
diff --git a/src/mesa/drivers/dri/unichrome/via_span.c b/src/mesa/drivers/dri/unichrome/via_span.c
index 3a16dadd238..b908f0fb23a 100644
--- a/src/mesa/drivers/dri/unichrome/via_span.c
+++ b/src/mesa/drivers/dri/unichrome/via_span.c
@@ -22,10 +22,10 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "colormac.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/colormac.h"
 #include "via_context.h"
 #include "via_span.h"
 #include "via_ioctl.h"
@@ -86,6 +86,7 @@
 
 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS 
 
+#define VALUE_TYPE GLushort
 
 #define WRITE_DEPTH(_x, _y, d)                      \
     *(GLushort *)(buf + (_x) * 2 + (_y) * depth_pitch) = d;
@@ -98,6 +99,8 @@
 
 /* 32 bit depthbuffer functions.
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH(_x, _y, d)                      \
     *(GLuint *)(buf + (_x) * 4 + (_y) * depth_pitch) = d;
 
@@ -111,6 +114,8 @@
 
 /* 24/8 bit interleaved depth/stencil functions
  */
+#define VALUE_TYPE GLuint
+
 #define WRITE_DEPTH( _x, _y, d ) {			\
    GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*depth_pitch);	\
    tmp &= 0x000000ff;					\
diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c
index 5b0453423ef..1cef01ab033 100644
--- a/src/mesa/drivers/dri/unichrome/via_state.c
+++ b/src/mesa/drivers/dri/unichrome/via_state.c
@@ -24,14 +24,14 @@
 
 #include <stdio.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "colormac.h"
-#include "enums.h"
-#include "dd.h"
-
-#include "mm.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/colormac.h"
+#include "main/enums.h"
+#include "main/dd.h"
+#include "main/mm.h"
+
 #include "via_context.h"
 #include "via_state.h"
 #include "via_tex.h"
@@ -511,9 +511,9 @@ void viaEmitState(struct via_context *vmesa)
 }
 
 
-static __inline__ GLuint viaPackColor(GLuint bpp,
-                                      GLubyte r, GLubyte g,
-                                      GLubyte b, GLubyte a)
+static INLINE GLuint viaPackColor(GLuint bpp,
+                                  GLubyte r, GLubyte g,
+                                  GLubyte b, GLubyte a)
 {
     switch (bpp) {
     case 16:
@@ -656,13 +656,18 @@ static void viaDrawBuffer(GLcontext *ctx, GLenum mode)
    if (!ctx->DrawBuffer)
       return;
 
-   switch ( ctx->DrawBuffer->_ColorDrawBufferMask[0] ) {
-   case BUFFER_BIT_FRONT_LEFT:
+   if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) {
+      FALLBACK(vmesa, VIA_FALLBACK_DRAW_BUFFER, GL_TRUE);
+      return;
+   }
+
+   switch ( ctx->DrawBuffer->_ColorDrawBufferIndexes[0] ) {
+   case BUFFER_FRONT_LEFT:
       VIA_FLUSH_DMA(vmesa);
       vmesa->drawBuffer = &vmesa->front;
       FALLBACK(vmesa, VIA_FALLBACK_DRAW_BUFFER, GL_FALSE);
       break;
-   case BUFFER_BIT_BACK_LEFT:
+   case BUFFER_BACK_LEFT:
       VIA_FLUSH_DMA(vmesa);
       vmesa->drawBuffer = &vmesa->back;
       FALLBACK(vmesa, VIA_FALLBACK_DRAW_BUFFER, GL_FALSE);
diff --git a/src/mesa/drivers/dri/unichrome/via_tex.c b/src/mesa/drivers/dri/unichrome/via_tex.c
index 0261a3ff177..d2010f09074 100644
--- a/src/mesa/drivers/dri/unichrome/via_tex.c
+++ b/src/mesa/drivers/dri/unichrome/via_tex.c
@@ -26,21 +26,21 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "glheader.h"
-#include "macros.h"
-#include "mtypes.h"
-#include "enums.h"
-#include "colortab.h"
-#include "convolve.h"
-#include "context.h"
-#include "mipmap.h"
-#include "simple_list.h"
-#include "texcompress.h"
-#include "texformat.h"
-#include "texobj.h"
-#include "texstore.h"
-
-#include "mm.h"
+#include "main/glheader.h"
+#include "main/macros.h"
+#include "main/mtypes.h"
+#include "main/enums.h"
+#include "main/colortab.h"
+#include "main/convolve.h"
+#include "main/context.h"
+#include "main/mipmap.h"
+#include "main/simple_list.h"
+#include "main/texcompress.h"
+#include "main/texformat.h"
+#include "main/texobj.h"
+#include "main/texstore.h"
+
+#include "main/mm.h"
 #include "via_context.h"
 #include "via_fb.h"
 #include "via_tex.h"
@@ -820,9 +820,7 @@ static void viaTexImage(GLcontext *ctx,
 
    /* GL_SGIS_generate_mipmap */
    if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
-      _mesa_generate_mipmap(ctx, target,
-                            &ctx->Texture.Unit[ctx->Texture.CurrentUnit],
-                            texObj);
+      _mesa_generate_mipmap(ctx, target, texObj);
    }
 
    _mesa_unmap_teximage_pbo(ctx, packing);
diff --git a/src/mesa/drivers/dri/unichrome/via_tex.h b/src/mesa/drivers/dri/unichrome/via_tex.h
index 73cfa91addc..25eeee32f3d 100644
--- a/src/mesa/drivers/dri/unichrome/via_tex.h
+++ b/src/mesa/drivers/dri/unichrome/via_tex.h
@@ -26,7 +26,7 @@
 #ifndef _VIATEX_H
 #define _VIATEX_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 struct via_context;
 
diff --git a/src/mesa/drivers/dri/unichrome/via_texcombine.c b/src/mesa/drivers/dri/unichrome/via_texcombine.c
index d604457bfd8..b6468978486 100644
--- a/src/mesa/drivers/dri/unichrome/via_texcombine.c
+++ b/src/mesa/drivers/dri/unichrome/via_texcombine.c
@@ -31,11 +31,11 @@
 
 #include <stdio.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "macros.h"
-#include "colormac.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/macros.h"
+#include "main/colormac.h"
+#include "main/enums.h"
 
 #include "via_context.h"
 #include "via_state.h"
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c
index 4cc7942b1b6..79e67620c9e 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.c
+++ b/src/mesa/drivers/dri/unichrome/via_tris.c
@@ -25,12 +25,12 @@
 #include <stdio.h>
 #include <math.h>
 
-#include "glheader.h"
-#include "context.h"
-#include "mtypes.h"
-#include "macros.h"
-#include "colormac.h"
-#include "enums.h"
+#include "main/glheader.h"
+#include "main/context.h"
+#include "main/mtypes.h"
+#include "main/macros.h"
+#include "main/colormac.h"
+#include "main/enums.h"
 
 #include "swrast/swrast.h"
 #include "swrast_setup/swrast_setup.h"
@@ -625,13 +625,12 @@ static void viaFastRenderClippedPoly(GLcontext *ctx, const GLuint *elts,
     }
 }
 
+
 /**********************************************************************/
 /*                    Choose render functions                         */
 /**********************************************************************/
 
 
-
-
 #define _VIA_NEW_VERTEX (_NEW_TEXTURE |                         \
                          _DD_NEW_SEPARATE_SPECULAR |            \
                          _DD_NEW_TRI_UNFILLED |                 \
@@ -665,14 +664,17 @@ static void viaChooseRenderState(GLcontext *ctx)
       vmesa->drawTri = via_draw_triangle;
    }
 
-   if (flags & (ANY_FALLBACK_FLAGS|ANY_RASTER_FLAGS)) {
-      if (flags & DD_TRI_LIGHT_TWOSIDE)    index |= VIA_TWOSIDE_BIT;
-      if (flags & DD_TRI_OFFSET)           index |= VIA_OFFSET_BIT;
-      if (flags & DD_TRI_UNFILLED)         index |= VIA_UNFILLED_BIT;
-      if (flags & ANY_FALLBACK_FLAGS)      index |= VIA_FALLBACK_BIT;
-
-      /* Hook in fallbacks for specific primitives.
-       */
+   if (flags & (ANY_FALLBACK_FLAGS | ANY_RASTER_FLAGS)) {
+      if (ctx->Light.Enabled && ctx->Light.Model.TwoSide)
+         index |= VIA_TWOSIDE_BIT;
+      if (ctx->Polygon.FrontMode != GL_FILL || ctx->Polygon.BackMode != GL_FILL)
+         index |= VIA_UNFILLED_BIT;
+      if (flags & DD_TRI_OFFSET)
+         index |= VIA_OFFSET_BIT;
+      if (flags & ANY_FALLBACK_FLAGS)
+         index |= VIA_FALLBACK_BIT;
+
+      /* Hook in fallbacks for specific primitives. */
       if (flags & POINT_FALLBACK)
 	 vmesa->drawPoint = via_fallback_point;
       
@@ -683,11 +685,8 @@ static void viaChooseRenderState(GLcontext *ctx)
 	 vmesa->drawTri = via_fallback_tri;
    }
 
-
-   if ((flags & DD_SEPARATE_SPECULAR) &&
-       ctx->Light.ShadeModel == GL_FLAT) {
+   if ((flags & DD_SEPARATE_SPECULAR) && ctx->Light.ShadeModel == GL_FLAT)
       index = VIA_MAX_TRIFUNC;	/* flat specular */
-   }
 
    if (vmesa->renderIndex != index) {
       vmesa->renderIndex = index;
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.h b/src/mesa/drivers/dri/unichrome/via_tris.h
index b4f0880a7ab..bc6ef4e4eba 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.h
+++ b/src/mesa/drivers/dri/unichrome/via_tris.h
@@ -25,7 +25,7 @@
 #ifndef _VIATRIS_H
 #define _VIATRIS_H
 
-#include "mtypes.h"
+#include "main/mtypes.h"
 
 extern void viaPrintRenderState(const char *msg, GLuint state);
 extern void viaInitTriFuncs(GLcontext *ctx);