diff options
Diffstat (limited to 'src/gallium/include/pipe/p_defines.h')
| -rw-r--r-- | src/gallium/include/pipe/p_defines.h | 118 |
1 files changed, 114 insertions, 4 deletions
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index b01ab6d137c..fd14dc8e92d 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -34,6 +34,23 @@ extern "C" { #endif +/** + * Gallium error codes. + * + * - A zero value always means success. + * - A negative value always means failure. + * - The meaning of a positive value is function dependent. + */ +enum pipe_error { + PIPE_OK = 0, + PIPE_ERROR = -1, /**< Generic error */ + PIPE_ERROR_BAD_INPUT = -2, + PIPE_ERROR_OUT_OF_MEMORY = -3, + PIPE_ERROR_RETRY = -4 + /* TODO */ +}; + + #define PIPE_BLENDFACTOR_ONE 0x1 #define PIPE_BLENDFACTOR_SRC_COLOR 0x2 #define PIPE_BLENDFACTOR_SRC_ALPHA 0x3 @@ -193,13 +210,25 @@ enum pipe_texture_target { enum pipe_transfer_usage { PIPE_TRANSFER_READ = (1 << 0), PIPE_TRANSFER_WRITE = (1 << 1), - PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE /**< Read/modify/write */ + /** Read/modify/write */ + PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE, + /** + * The transfer should map the texture storage directly. The driver may + * return NULL if that isn't possible, and the state tracker needs to cope + * with that and use an alternative path without this flag. + * + * E.g. the state tracker could have a simpler path which maps textures and + * does read/modify/write cycles on them directly, and a more complicated + * path which uses minimal read and write transfers. + */ + PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2) }; -/** +/* * Buffer usage flags */ + #define PIPE_BUFFER_USAGE_CPU_READ (1 << 0) #define PIPE_BUFFER_USAGE_CPU_WRITE (1 << 1) #define PIPE_BUFFER_USAGE_GPU_READ (1 << 2) @@ -208,9 +237,63 @@ enum pipe_transfer_usage { #define PIPE_BUFFER_USAGE_VERTEX (1 << 5) #define PIPE_BUFFER_USAGE_INDEX (1 << 6) #define PIPE_BUFFER_USAGE_CONSTANT (1 << 7) + +/* + * CPU access flags. + * + * These flags should only be used for texture transfers or when mapping + * buffers. + * + * Note that the PIPE_BUFFER_USAGE_CPU_xxx flags above are also used for + * mapping. Either PIPE_BUFFER_USAGE_CPU_READ or PIPE_BUFFER_USAGE_CPU_WRITE + * must be set. + */ + +/** + * Discards the memory within the mapped region. + * + * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag. + * - Direct3D's D3DLOCK_DISCARD flag. + */ #define PIPE_BUFFER_USAGE_DISCARD (1 << 8) + +/** + * Fail if the resource cannot be mapped immediately. + * + * See also: + * - Direct3D's D3DLOCK_DONOTWAIT flag. + * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. + * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. + */ #define PIPE_BUFFER_USAGE_DONTBLOCK (1 << 9) -#define PIPE_BUFFER_USAGE_FLUSH_EXPLICIT (1 << 10) /**< See pipe_screen::buffer_flush_mapped_range */ + +/** + * Do not attempt to synchronize pending operations on the resource when mapping. + * + * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. + * + * See also: + * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag. + * - Direct3D's D3DLOCK_NOOVERWRITE flag. + * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag. + */ +#define PIPE_BUFFER_USAGE_UNSYNCHRONIZED (1 << 10) + +/** + * Written ranges will be notified later with + * pipe_screen::buffer_flush_mapped_range. + * + * It should not be used with PIPE_BUFFER_USAGE_CPU_READ. + * + * See also: + * - pipe_screen::buffer_flush_mapped_range + * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag. + */ +#define PIPE_BUFFER_USAGE_FLUSH_EXPLICIT (1 << 11) + /** Pipe driver custom usage flags should be greater or equal to this value */ #define PIPE_BUFFER_USAGE_CUSTOM (1 << 16) @@ -281,7 +364,7 @@ enum pipe_transfer_usage { #define PIPE_CAP_NPOT_TEXTURES 2 #define PIPE_CAP_TWO_SIDED_STENCIL 3 #define PIPE_CAP_GLSL 4 /* XXX need something better */ -#define PIPE_CAP_S3TC 5 +#define PIPE_CAP_S3TC 5 /* XXX: deprecated; cap determined via supported sampler formats */ #define PIPE_CAP_ANISOTROPIC_FILTER 6 #define PIPE_CAP_POINT_SPRITE 7 #define PIPE_CAP_MAX_RENDER_TARGETS 8 @@ -305,6 +388,8 @@ enum pipe_transfer_usage { #define PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS 26 #define PIPE_CAP_TGSI_CONT_SUPPORTED 27 #define PIPE_CAP_BLEND_EQUATION_SEPARATE 28 +#define PIPE_CAP_SM3 29 /*< Shader Model 3 supported */ +#define PIPE_CAP_MAX_PREDICATE_REGISTERS 30 /** @@ -315,6 +400,31 @@ enum pipe_transfer_usage { #define PIPE_REFERENCED_FOR_READ (1 << 0) #define PIPE_REFERENCED_FOR_WRITE (1 << 1) + +enum pipe_video_codec +{ + PIPE_VIDEO_CODEC_UNKNOWN = 0, + PIPE_VIDEO_CODEC_MPEG12, /**< MPEG1, MPEG2 */ + PIPE_VIDEO_CODEC_MPEG4, /**< DIVX, XVID */ + PIPE_VIDEO_CODEC_VC1, /**< WMV */ + PIPE_VIDEO_CODEC_MPEG4_AVC /**< H.264 */ +}; + +enum pipe_video_profile +{ + PIPE_VIDEO_PROFILE_MPEG1, + PIPE_VIDEO_PROFILE_MPEG2_SIMPLE, + PIPE_VIDEO_PROFILE_MPEG2_MAIN, + PIPE_VIDEO_PROFILE_MPEG4_SIMPLE, + PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE, + PIPE_VIDEO_PROFILE_VC1_SIMPLE, + PIPE_VIDEO_PROFILE_VC1_MAIN, + PIPE_VIDEO_PROFILE_VC1_ADVANCED, + PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE, + PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN, + PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH +}; + #ifdef __cplusplus } #endif |