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Diffstat (limited to 'src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c')
-rw-r--r--src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c43
1 files changed, 41 insertions, 2 deletions
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index b9f8d479066..809df949395 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -100,6 +100,8 @@ struct radv_amdgpu_cs {
unsigned max_num_virtual_buffers;
struct radeon_winsys_bo **virtual_buffers;
int *virtual_buffer_hash_table;
+
+ struct hash_table *annotations;
};
struct radv_winsys_sem_counts {
@@ -196,10 +198,18 @@ radv_amdgpu_cs_ib_to_info(struct radv_amdgpu_cs *cs, struct radv_amdgpu_ib ib)
}
static void
+radv_amdgpu_cs_free_annotation(struct hash_entry *entry)
+{
+ free(entry->data);
+}
+
+static void
radv_amdgpu_cs_destroy(struct radeon_cmdbuf *rcs)
{
struct radv_amdgpu_cs *cs = radv_amdgpu_cs(rcs);
+ _mesa_hash_table_destroy(cs->annotations, radv_amdgpu_cs_free_annotation);
+
if (cs->ib_buffer)
cs->ws->base.buffer_destroy(&cs->ws->base, cs->ib_buffer);
@@ -529,6 +539,9 @@ radv_amdgpu_cs_reset(struct radeon_cmdbuf *_cs)
if (cs->use_ib)
cs->ib_size_ptr = &cs->ib.size;
+
+ _mesa_hash_table_destroy(cs->annotations, radv_amdgpu_cs_free_annotation);
+ cs->annotations = NULL;
}
static void
@@ -1418,12 +1431,13 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
.ip_type = cs->hw_ip,
.addr_callback = radv_amdgpu_winsys_get_cpu_addr,
.addr_callback_data = cs,
+ .annotations = cs->annotations,
};
ac_parse_ib(&ib_parser, "main IB");
} else {
uint32_t *ib_dw = addr_info.cpu_addr;
- ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, NULL, &ws->info);
+ ac_gather_context_rolls(file, &ib_dw, &cs->ib_buffers[0].cdw, 1, cs->annotations, &ws->info);
}
} else {
uint32_t **ibs = type == RADV_CS_DUMP_TYPE_CTX_ROLLS ? malloc(cs->num_ib_buffers * sizeof(uint32_t *)) : NULL;
@@ -1457,6 +1471,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
.ip_type = cs->hw_ip,
.addr_callback = radv_amdgpu_winsys_get_cpu_addr,
.addr_callback_data = cs,
+ .annotations = cs->annotations,
};
ac_parse_ib(&ib_parser, name);
@@ -1467,7 +1482,7 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
}
if (type == RADV_CS_DUMP_TYPE_CTX_ROLLS) {
- ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, NULL, &ws->info);
+ ac_gather_context_rolls(file, ibs, ib_dw_sizes, cs->num_ib_buffers, cs->annotations, &ws->info);
free(ibs);
free(ib_dw_sizes);
@@ -1475,6 +1490,29 @@ radv_amdgpu_winsys_cs_dump(struct radeon_cmdbuf *_cs, FILE *file, const int *tra
}
}
+static void
+radv_amdgpu_winsys_cs_annotate(struct radeon_cmdbuf *_cs, const char *annotation)
+{
+ struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs;
+
+ if (!cs->annotations) {
+ cs->annotations = _mesa_pointer_hash_table_create(NULL);
+ if (!cs->annotations)
+ return;
+ }
+
+ struct hash_entry *entry = _mesa_hash_table_search(cs->annotations, _cs->buf + _cs->cdw);
+ if (entry) {
+ char *old_annotation = entry->data;
+ char *new_annotation = calloc(strlen(old_annotation) + strlen(annotation) + 5, 1);
+ sprintf(new_annotation, "%s -> %s", old_annotation, annotation);
+ free(old_annotation);
+ _mesa_hash_table_insert(cs->annotations, _cs->buf + _cs->cdw, new_annotation);
+ } else {
+ _mesa_hash_table_insert(cs->annotations, _cs->buf + _cs->cdw, strdup(annotation));
+ }
+}
+
static uint32_t
radv_to_amdgpu_priority(enum radeon_ctx_priority radv_priority)
{
@@ -1879,4 +1917,5 @@ radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
ws->base.cs_execute_ib = radv_amdgpu_cs_execute_ib;
ws->base.cs_submit = radv_amdgpu_winsys_cs_submit;
ws->base.cs_dump = radv_amdgpu_winsys_cs_dump;
+ ws->base.cs_annotate = radv_amdgpu_winsys_cs_annotate;
}