diff options
Diffstat (limited to 'include/CL/cl_ext.h')
| -rw-r--r-- | include/CL/cl_ext.h | 107 |
1 files changed, 82 insertions, 25 deletions
diff --git a/include/CL/cl_ext.h b/include/CL/cl_ext.h index c7c0f0f124f..898ee605cb6 100644 --- a/include/CL/cl_ext.h +++ b/include/CL/cl_ext.h @@ -1,29 +1,17 @@ /******************************************************************************* - * Copyright (c) 2008-2019 The Khronos Group Inc. + * Copyright (c) 2008-2020 The Khronos Group Inc. * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and/or associated documentation files (the - * "Materials"), to deal in the Materials without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Materials, and to - * permit persons to whom the Materials are furnished to do so, subject to - * the following conditions: + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Materials. + * http://www.apache.org/licenses/LICENSE-2.0 * - * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS - * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS - * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT - * https://www.khronos.org/registry/ - * - * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY - * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. ******************************************************************************/ /* cl_ext.h contains OpenCL extensions which don't have external */ @@ -181,6 +169,8 @@ typedef CL_API_ENTRY cl_program * cl_khr_terminate_context extension * **************************************/ +#define CL_CONTEXT_TERMINATED_KHR -1121 + #define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031 #define CL_CONTEXT_TERMINATE_KHR 0x2032 @@ -208,7 +198,7 @@ typedef CL_API_ENTRY cl_int *****************************************/ #define cl_khr_create_command_queue 1 -typedef cl_bitfield cl_queue_properties_khr; +typedef cl_properties cl_queue_properties_khr; extern CL_API_ENTRY cl_command_queue CL_API_CALL clCreateCommandQueueWithPropertiesKHR(cl_context context, @@ -241,7 +231,27 @@ typedef CL_API_ENTRY cl_command_queue * cl_amd_device_attribute_query * *********************************/ -#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036 +#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036 +#define CL_DEVICE_TOPOLOGY_AMD 0x4037 +#define CL_DEVICE_BOARD_NAME_AMD 0x4038 +#define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039 +#define CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD 0x4040 +#define CL_DEVICE_SIMD_WIDTH_AMD 0x4041 +#define CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD 0x4042 +#define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043 +#define CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD 0x4044 +#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD 0x4045 +#define CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD 0x4046 +#define CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD 0x4047 +#define CL_DEVICE_LOCAL_MEM_BANKS_AMD 0x4048 +#define CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD 0x4049 +#define CL_DEVICE_GFXIP_MAJOR_AMD 0x404A +#define CL_DEVICE_GFXIP_MINOR_AMD 0x404B +#define CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD 0x404C +#define CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD 0x4030 +#define CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD 0x4031 +#define CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD 0x4033 +#define CL_DEVICE_PCIE_ID_AMD 0x4034 /********************************* @@ -347,6 +357,13 @@ typedef CL_API_ENTRY cl_int /********************************* +* cl_ext_cxx_for_opencl extension +*********************************/ +#define cl_ext_cxx_for_opencl 1 + +#define CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT 0x4230 + +/********************************* * cl_qcom_ext_host_ptr extension *********************************/ #define cl_qcom_ext_host_ptr 1 @@ -582,6 +599,8 @@ typedef cl_uint cl_queue_throttle_khr; * cl_khr_extended_versioning *********************************/ +#define cl_khr_extended_versioning 1 + #define CL_VERSION_MAJOR_BITS_KHR (10) #define CL_VERSION_MINOR_BITS_KHR (10) #define CL_VERSION_PATCH_BITS_KHR (12) @@ -621,6 +640,21 @@ typedef struct _cl_name_version_khr #define CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR 0x1062 +/********************************* +* cl_khr_device_uuid extension +*********************************/ +#define cl_khr_device_uuid 1 + +#define CL_UUID_SIZE_KHR 16 +#define CL_LUID_SIZE_KHR 8 + +#define CL_DEVICE_UUID_KHR 0x106A +#define CL_DRIVER_UUID_KHR 0x106B +#define CL_DEVICE_LUID_VALID_KHR 0x106C +#define CL_DEVICE_LUID_KHR 0x106D +#define CL_DEVICE_NODE_MASK_KHR 0x106E + + /********************************** * cl_arm_import_memory extension * **********************************/ @@ -637,12 +671,15 @@ typedef intptr_t cl_import_properties_arm; /* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */ #define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4 -/* Protected DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */ +/* Protected memory property */ #define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5 /* Android hardware buffer type value for CL_IMPORT_TYPE_ARM property */ #define CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM 0x41E2 +/* Data consistency with host property */ +#define CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM 0x41E3 + /* Import memory size value to indicate a size for the whole buffer */ #define CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM SIZE_MAX @@ -803,6 +840,26 @@ clSetKernelExecInfoARM(cl_kernel kernel, /* cl_command_queue_properties */ #define CL_QUEUE_JOB_SLOT_ARM 0x41E1 +/********************************* +* cl_arm_scheduling_controls +*********************************/ + +#define cl_arm_scheduling_controls 1 + +/* cl_device_info */ +#define CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM 0x41E4 + +#define CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM (1 << 0) +#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM (1 << 1) +#define CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM (1 << 2) + +/* cl_kernel_info */ +#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM 0x41E5 +#define CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM 0x41E6 + +/* cl_queue_properties */ +#define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7 + #ifdef __cplusplus } #endif |