diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/evergreen_state.c | 37 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/radeonsi_pipe.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/radeonsi_pipe.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 40 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 2 |
5 files changed, 43 insertions, 38 deletions
diff --git a/src/gallium/drivers/radeonsi/evergreen_state.c b/src/gallium/drivers/radeonsi/evergreen_state.c index 354fa6219df..1a6ffd81d47 100644 --- a/src/gallium/drivers/radeonsi/evergreen_state.c +++ b/src/gallium/drivers/radeonsi/evergreen_state.c @@ -1082,43 +1082,6 @@ void cayman_init_state_functions(struct r600_context *rctx) rctx->context.set_stream_output_targets = r600_set_so_targets; } -void si_init_config(struct r600_context *rctx) -{ - struct r600_pipe_state *rstate = &rctx->config; - unsigned tmp; - - r600_pipe_state_add_reg(rstate, R_028A4C_PA_SC_MODE_CNTL_1, 0x0, NULL, 0); - - r600_pipe_state_add_reg(rstate, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A14_VGT_HOS_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A20_VGT_HOS_REUSE_DEPTH, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A24_VGT_GROUP_PRIM_TYPE, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A28_VGT_GROUP_FIRST_DECR, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A2C_VGT_GROUP_DECR, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A30_VGT_GROUP_VECT_0_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A34_VGT_GROUP_VECT_1_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A40_VGT_GS_MODE, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A84_VGT_PRIMITIVEID_EN, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028A8C_VGT_PRIMITIVEID_RESET, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028B94_VGT_STRMOUT_CONFIG, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028AA8_IA_MULTI_VGT_PARAM, S_028AA8_SWITCH_ON_EOP(1) | S_028AA8_PARTIAL_VS_WAVE_ON(1) | S_028AA8_PRIMGROUP_SIZE(63), NULL, 0); - r600_pipe_state_add_reg(rstate, R_028AB4_VGT_REUSE_OFF, 0x00000000, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028AB8_VGT_VTX_CNT_EN, 0x0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_008A14_PA_CL_ENHANCE, (3 << 1) | 1, NULL, 0); - - r600_pipe_state_add_reg(rstate, R_028B54_VGT_SHADER_STAGES_EN, 0, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0x76543210, NULL, 0); - r600_pipe_state_add_reg(rstate, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 0xfedcba98, NULL, 0); - - r600_pipe_state_add_reg(rstate, R_028804_DB_EQAA, 0x110000, NULL, 0); - r600_context_pipe_state_set(rctx, rstate); -} - void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader) { struct r600_context *rctx = (struct r600_context *)ctx; diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c index f3e9cfdb45b..4e695c3ffdc 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c @@ -47,6 +47,7 @@ #include "r600_resource.h" #include "radeonsi_pipe.h" #include "r600_hw_context_priv.h" +#include "si_state.h" /* * pipe_context diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h index ec2a30744ea..b77831dbc1c 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h @@ -298,7 +298,6 @@ static INLINE void r600_atom_dirty(struct r600_context *rctx, struct r600_atom * /* evergreen_state.c */ void cayman_init_state_functions(struct r600_context *rctx); -void si_init_config(struct r600_context *rctx); void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader); void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader); void si_update_spi_map(struct r600_context *rctx); diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index ba8724f3de0..0c56b90c289 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1314,6 +1314,46 @@ void si_init_state_functions(struct r600_context *rctx) rctx->context.set_framebuffer_state = si_set_framebuffer_state; } +void si_init_config(struct r600_context *rctx) +{ + struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); + + si_pm4_set_reg(pm4, R_028A4C_PA_SC_MODE_CNTL_1, 0x0); + + si_pm4_set_reg(pm4, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A14_VGT_HOS_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0x0); + si_pm4_set_reg(pm4, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, 0x0); + si_pm4_set_reg(pm4, R_028A20_VGT_HOS_REUSE_DEPTH, 0x0); + si_pm4_set_reg(pm4, R_028A24_VGT_GROUP_PRIM_TYPE, 0x0); + si_pm4_set_reg(pm4, R_028A28_VGT_GROUP_FIRST_DECR, 0x0); + si_pm4_set_reg(pm4, R_028A2C_VGT_GROUP_DECR, 0x0); + si_pm4_set_reg(pm4, R_028A30_VGT_GROUP_VECT_0_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A34_VGT_GROUP_VECT_1_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, 0x0); + si_pm4_set_reg(pm4, R_028A84_VGT_PRIMITIVEID_EN, 0x0); + si_pm4_set_reg(pm4, R_028A8C_VGT_PRIMITIVEID_RESET, 0x0); + si_pm4_set_reg(pm4, R_028B94_VGT_STRMOUT_CONFIG, 0x0); + si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0); + si_pm4_set_reg(pm4, R_028AA8_IA_MULTI_VGT_PARAM, + S_028AA8_SWITCH_ON_EOP(1) | + S_028AA8_PARTIAL_VS_WAVE_ON(1) | + S_028AA8_PRIMGROUP_SIZE(63)); + si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0x00000000); + si_pm4_set_reg(pm4, R_028AB8_VGT_VTX_CNT_EN, 0x0); + si_pm4_set_reg(pm4, R_008A14_PA_CL_ENHANCE, (3 << 1) | 1); + + si_pm4_set_reg(pm4, R_028B54_VGT_SHADER_STAGES_EN, 0); + si_pm4_set_reg(pm4, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0x76543210); + si_pm4_set_reg(pm4, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 0xfedcba98); + + si_pm4_set_reg(pm4, R_028804_DB_EQAA, 0x110000); + + si_pm4_set_state(rctx, init, pm4); +} + static unsigned si_conv_pipe_prim(unsigned pprim) { static const unsigned prim_conv[] = { diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index d6c696afb85..2fa08aebb18 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -63,6 +63,7 @@ struct si_state_dsa { union si_state { struct { + struct si_pm4_state *init; struct si_state_blend *blend; struct si_pm4_state *blend_color; struct si_pm4_state *clip; @@ -107,6 +108,7 @@ union si_state { } while(0); void si_init_state_functions(struct r600_context *rctx); +void si_init_config(struct r600_context *rctx); bool si_update_draw_info_state(struct r600_context *rctx, const struct pipe_draw_info *info); |