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authorKeith Whitwell <keith@tungstengraphics.com>2003-01-16 23:39:30 +0000
committerKeith Whitwell <keith@tungstengraphics.com>2003-01-16 23:39:30 +0000
commitdeb5fe3b68addb8098f319484575ccdb078ded18 (patch)
treec09f75077f3d7397da1ad9237b9e56b2fe0c402a /src/mesa
parent1e1e71e3a70fa35cd4c184adc200bf43008c9262 (diff)
use a fixed resolution defined in a config file
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_context.c41
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.c9
-rw-r--r--src/mesa/drivers/dri/radeon/server/radeon_dri.c86
3 files changed, 59 insertions, 77 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 4404d11ac86..f3abf10d4cf 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -289,7 +289,8 @@ radeonCreateContext( const __GLcontextModes *glVisual,
shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
- rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa, GL_TRUE);
+ rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa,
+ GL_TRUE);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
@@ -435,42 +436,6 @@ radeonCreateContext( const __GLcontextModes *glVisual,
rmesa->do_usleeps = !getenv("RADEON_NO_USLEEPS");
#if DO_DEBUG
- if (getenv("RADEON_DEBUG_FALLBACKS"))
- RADEON_DEBUG |= DEBUG_FALLBACKS;
-
- if (getenv("RADEON_DEBUG_TEXTURE"))
- RADEON_DEBUG |= DEBUG_TEXTURE;
-
- if (getenv("RADEON_DEBUG_IOCTL"))
- RADEON_DEBUG |= DEBUG_IOCTL;
-
- if (getenv("RADEON_DEBUG_PRIMS"))
- RADEON_DEBUG |= DEBUG_PRIMS;
-
- if (getenv("RADEON_DEBUG_VERTS"))
- RADEON_DEBUG |= DEBUG_VERTS;
-
- if (getenv("RADEON_DEBUG_STATE"))
- RADEON_DEBUG |= DEBUG_STATE;
-
- if (getenv("RADEON_DEBUG_CODEGEN"))
- RADEON_DEBUG |= DEBUG_CODEGEN;
-
- if (getenv("RADEON_DEBUG_VTXFMT"))
- RADEON_DEBUG |= DEBUG_VFMT;
-
- if (getenv("RADEON_DEBUG_VERBOSE"))
- RADEON_DEBUG |= DEBUG_VERBOSE;
-
- if (getenv("RADEON_DEBUG_DRI"))
- RADEON_DEBUG |= DEBUG_DRI;
-
- if (getenv("RADEON_DEBUG_DMA"))
- RADEON_DEBUG |= DEBUG_DMA;
-
- if (getenv("RADEON_DEBUG_SANITY"))
- RADEON_DEBUG |= DEBUG_SANITY;
-
if (getenv("RADEON_DEBUG"))
{
const char *debug = getenv("RADEON_DEBUG");
@@ -510,8 +475,6 @@ radeonCreateContext( const __GLcontextModes *glVisual,
if (strstr(debug, "san"))
RADEON_DEBUG |= DEBUG_SANITY;
}
-
-
#endif
if (getenv("RADEON_NO_RAST")) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index 2eb425b8686..7708ee52603 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -427,6 +427,15 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
cmd.boxes = (drmClipRect *)rmesa->pClipRects;
}
+ if (0) {
+ int i;
+ for (i = 0 ; i < cmd.nbox ; i++)
+ fprintf(stderr, "Emit box %d/%d %d,%d %d,%d\n",
+ i, cmd.nbox,
+ cmd.boxes[i].x1, cmd.boxes[i].y1,
+ cmd.boxes[i].x2, cmd.boxes[i].y2);
+ }
+
ret = drmCommandWrite( rmesa->dri.fd,
DRM_RADEON_CMDBUF,
&cmd, sizeof(cmd) );
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
index 5f2827bdb23..5b6c8e3ac47 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c
+++ b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
@@ -140,7 +140,7 @@ static int RADEONEngineRestore( struct MiniGLXDisplayRec *dpy,
OUTREG(RADEON_RB3D_CNTL, 0);
RADEONEngineReset( dpy );
- switch (dpy->VarInfo.bits_per_pixel) {
+ switch (dpy->bpp) {
case 16: datatype = 4; break;
case 32: datatype = 6; break;
default: return 0;
@@ -150,14 +150,14 @@ static int RADEONEngineRestore( struct MiniGLXDisplayRec *dpy,
((datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
| RADEON_GMC_CLR_CMP_CNTL_DIS);
- pitch64 = ((dpy->VarInfo.xres_virtual * (dpy->VarInfo.bits_per_pixel / 8) + 0x3f)) >> 6;
+ pitch64 = ((dpy->virtualWidth * (dpy->bpp / 8) + 0x3f)) >> 6;
RADEONWaitForFifo(dpy, 1);
OUTREG(RADEON_DEFAULT_OFFSET, ((INREG(RADEON_DEFAULT_OFFSET) & 0xC0000000)
| (pitch64 << 22)));
-/* RADEONWaitForFifo(dpy, 1); */
-/* OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); */
+ RADEONWaitForFifo(dpy, 1);
+ OUTREG(RADEON_SURFACE_CNTL, RADEON_SURF_TRANSLATION_DIS);
RADEONWaitForFifo(dpy, 1);
OUTREG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX
@@ -179,7 +179,7 @@ static int RADEONEngineRestore( struct MiniGLXDisplayRec *dpy,
OUTREG(RADEON_AUX_SC_CNTL, 0);
/* RADEONWaitForIdleMMIO(dpy); */
-/* sleep(2); */
+ usleep(100);
}
/* Compute log base 2 of val */
@@ -323,7 +323,7 @@ static int RADEONDRIAgpInit( struct MiniGLXDisplayRec *dpy, RADEONInfoPtr info)
static int RADEONDRIKernelInit(struct MiniGLXDisplayRec *dpy,
RADEONInfoPtr info)
{
- int cpp = dpy->VarInfo.bits_per_pixel / 8;
+ int cpp = dpy->bpp / 8;
drmRadeonInit drmInfo;
int ret;
@@ -343,8 +343,8 @@ static int RADEONDRIKernelInit(struct MiniGLXDisplayRec *dpy,
drmInfo.agp_size = info->agpSize*1024*1024;
drmInfo.ring_size = info->ringSize*1024*1024;
drmInfo.usec_timeout = 1000;
- drmInfo.fb_bpp = dpy->VarInfo.bits_per_pixel;
- drmInfo.depth_bpp = dpy->VarInfo.bits_per_pixel;
+ drmInfo.fb_bpp = dpy->bpp;
+ drmInfo.depth_bpp = dpy->bpp;
drmInfo.front_offset = info->frontOffset;
drmInfo.front_pitch = info->frontPitch * cpp;
drmInfo.back_offset = info->backOffset;
@@ -443,16 +443,18 @@ static int RADEONScreenInit( struct MiniGLXDisplayRec *dpy, RADEONInfoPtr info )
drmVersionPtr version;
int err;
+ usleep(100);
+
{
- int width_bytes = (dpy->VarInfo.xres_virtual * dpy->cpp);
+ int width_bytes = (dpy->virtualWidth * dpy->cpp);
int maxy = dpy->FrameBufferSize / width_bytes;
- if (maxy <= dpy->VarInfo.yres_virtual * 3) {
+ if (maxy <= dpy->virtualHeight * 3) {
fprintf(stderr,
"Static buffer allocation failed -- "
"need at least %d kB video memory (have %d kB)\n",
- (dpy->VarInfo.xres_virtual * dpy->VarInfo.yres_virtual *
+ (dpy->virtualWidth * dpy->virtualHeight *
dpy->cpp * 3 + 1023) / 1024,
dpy->FrameBufferSize / 1024);
return 0;
@@ -582,19 +584,19 @@ static int RADEONScreenInit( struct MiniGLXDisplayRec *dpy, RADEONInfoPtr info )
/* Memory manager setup */
{
- int width_bytes = dpy->VarInfo.xres_virtual * dpy->cpp;
+ int width_bytes = dpy->virtualWidth * dpy->cpp;
int cpp = dpy->cpp;
- int bufferSize = ((dpy->VarInfo.yres_virtual * width_bytes
+ int bufferSize = ((dpy->virtualHeight * width_bytes
+ RADEON_BUFFER_ALIGN)
& ~RADEON_BUFFER_ALIGN);
- int depthSize = ((((dpy->VarInfo.yres_virtual+15) & ~15) * width_bytes
+ int depthSize = ((((dpy->virtualHeight+15) & ~15) * width_bytes
+ RADEON_BUFFER_ALIGN)
& ~RADEON_BUFFER_ALIGN);
int l;
int scanlines;
info->frontOffset = 0;
- info->frontPitch = dpy->VarInfo.xres_virtual;
+ info->frontPitch = dpy->virtualWidth;
fprintf(stderr,
"Using %d MB AGP aperture\n", info->agpSize);
@@ -641,12 +643,12 @@ static int RADEONScreenInit( struct MiniGLXDisplayRec *dpy, RADEONInfoPtr info )
info->depthOffset = ((info->textureOffset - depthSize +
RADEON_BUFFER_ALIGN) &
~RADEON_BUFFER_ALIGN);
- info->depthPitch = dpy->VarInfo.xres_virtual;
+ info->depthPitch = dpy->virtualWidth;
info->backOffset = ((info->depthOffset - bufferSize +
RADEON_BUFFER_ALIGN) &
~RADEON_BUFFER_ALIGN);
- info->backPitch = dpy->VarInfo.xres_virtual;
+ info->backPitch = dpy->virtualWidth;
fprintf(stderr,
@@ -725,10 +727,10 @@ static int RADEONScreenInit( struct MiniGLXDisplayRec *dpy, RADEONInfoPtr info )
dpy->driverClientMsgSize = sizeof(RADEONDRIRec);
pRADEONDRI = (RADEONDRIPtr)dpy->driverClientMsg;
pRADEONDRI->deviceID = info->Chipset;
- pRADEONDRI->width = dpy->VarInfo.xres_virtual;
- pRADEONDRI->height = dpy->VarInfo.yres_virtual;
- pRADEONDRI->depth = dpy->VarInfo.bits_per_pixel; /* XXX: depth */
- pRADEONDRI->bpp = dpy->VarInfo.bits_per_pixel;
+ pRADEONDRI->width = dpy->virtualWidth;
+ pRADEONDRI->height = dpy->virtualHeight;
+ pRADEONDRI->depth = dpy->bpp; /* XXX: depth */
+ pRADEONDRI->bpp = dpy->bpp;
pRADEONDRI->IsPCI = 0;
pRADEONDRI->AGPMode = info->agpMode;
pRADEONDRI->frontOffset = info->frontOffset;
@@ -851,21 +853,14 @@ static int __driInitScreenConfigs(int *numConfigs, __GLXvisualConfig **configs)
return 1;
}
-/* Will fbdev set a pitch appropriate for 3d?
- */
static int __driValidateMode( struct MiniGLXDisplayRec *dpy )
{
- int dummy = dpy->VarInfo.xres_virtual;
-
- switch (dpy->VarInfo.bits_per_pixel / 8) {
- case 1: dummy = (dpy->VarInfo.xres_virtual + 127) & ~127; break;
- case 2: dummy = (dpy->VarInfo.xres_virtual + 31) & ~31; break;
- case 3:
- case 4: dummy = (dpy->VarInfo.xres_virtual + 15) & ~15; break;
- }
-
- dpy->VarInfo.xres_virtual = dummy;
- return 1;
+ /* Work around radeonfb.o bug: virtual resolution must equal real
+ * resolution.
+ */
+ dpy->VarInfo.xres = dpy->VarInfo.xres_virtual;
+ dpy->VarInfo.yres = dpy->VarInfo.yres_virtual;
+ return 1;
}
/*
@@ -874,6 +869,19 @@ static int __driInitFBDev( struct MiniGLXDisplayRec *dpy )
{
RADEONInfoPtr info = calloc(1, sizeof(*info));
+ {
+ int dummy = dpy->virtualWidth;
+
+ switch (dpy->bpp / 8) {
+ case 1: dummy = (dpy->virtualWidth + 127) & ~127; break;
+ case 2: dummy = (dpy->virtualWidth + 31) & ~31; break;
+ case 3:
+ case 4: dummy = (dpy->virtualWidth + 15) & ~15; break;
+ }
+
+ dpy->virtualWidth = dummy;
+ }
+
dpy->driverInfo = (void *)info;
info->agpFastWrite = RADEON_DEFAULT_AGP_FAST_WRITE;
@@ -886,7 +894,7 @@ static int __driInitFBDev( struct MiniGLXDisplayRec *dpy )
info->Chipset = dpy->chipset;
get_chipfamily_from_chipset( info );
- info->frontPitch = dpy->VarInfo.xres_virtual;
+ info->frontPitch = dpy->virtualWidth;
info->LinearAddr = dpy->FixedInfo.smem_start & 0xfc000000;
@@ -898,14 +906,16 @@ static int __driInitFBDev( struct MiniGLXDisplayRec *dpy )
* the clear ioctl to do this, but would need to setup hw state
* first.
*/
+ if (0) {
memset(dpy->FrameBuffer + info->frontOffset,
0,
- info->frontPitch * dpy->cpp * dpy->VarInfo.yres_virtual );
+ info->frontPitch * dpy->cpp * dpy->virtualHeight );
memset(dpy->FrameBuffer + info->backOffset,
0,
- info->backPitch * dpy->cpp * dpy->VarInfo.yres_virtual );
-
+ info->backPitch * dpy->cpp * dpy->virtualHeight );
+ }
+
return 1;
}