diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2019-04-12 11:55:38 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2019-04-14 19:58:04 -0700 |
| commit | 8bf9b7b5b6e28aad7c0635fab7aa611f86be8d79 (patch) | |
| tree | fd17b60da6dff3337848b751b4c9ced3663a2cfe /src/mesa | |
| parent | 47709ca1465162160dacf2fdb8645b7afb58dcd9 (diff) | |
intel: Emit 3DSTATE_VF_STATISTICS dynamically
Pipeline statistics queries should not count BLORP's rectangles.
(23) How do operations like Clear, TexSubImage, etc. affect the
results of the newly introduced queries?
DISCUSSION: Implementations might require "helper" rendering
commands be issued to implement certain operations like Clear,
TexSubImage, etc.
RESOLVED: They don't. Only application submitted rendering
commands should have an effect on the results of the queries.
Piglit's arb_pipeline_statistics_query-vert_adj exposes this bug when
the driver is hacked to always perform glBufferData via a GPU staging
copy (for debugging purposes).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 24 |
2 files changed, 24 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 9bff2c8ac92..b752294250e 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -614,12 +614,6 @@ brw_upload_invariant_state(struct brw_context *brw) OUT_BATCH(0); ADVANCE_BATCH(); } - - const uint32_t _3DSTATE_VF_STATISTICS = - is_965 ? GEN4_3DSTATE_VF_STATISTICS : GM45_3DSTATE_VF_STATISTICS; - BEGIN_BATCH(1); - OUT_BATCH(_3DSTATE_VF_STATISTICS << 16 | 1); - ADVANCE_BATCH(); } /** diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index e904c4c0cf9..ecffa2e8e86 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -928,6 +928,22 @@ const struct brw_tracked_state genX(cut_index) = { }; #endif +static void +genX(upload_vf_statistics)(struct brw_context *brw) +{ + brw_batch_emit(brw, GENX(3DSTATE_VF_STATISTICS), vf) { + vf.StatisticsEnable = true; + } +} + +const struct brw_tracked_state genX(vf_statistics) = { + .dirty = { + .mesa = 0, + .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT, + }, + .emit = genX(upload_vf_statistics), +}; + #if GEN_GEN >= 6 /** * Determine the appropriate attribute override value to store into the @@ -5640,6 +5656,8 @@ genX(init_atoms)(struct brw_context *brw) #if GEN_GEN < 6 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + /* Once all the programs are done, we know how large urb entry * sizes need to be and can decide if we need to change the urb * layout. @@ -5696,6 +5714,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN == 6 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + &genX(sf_clip_viewport), /* Command packets: */ @@ -5760,6 +5780,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN == 7 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + /* Command packets: */ &genX(cc_vp), @@ -5850,6 +5872,8 @@ genX(init_atoms)(struct brw_context *brw) #elif GEN_GEN >= 8 static const struct brw_tracked_state *render_atoms[] = { + &genX(vf_statistics), + &genX(cc_vp), &genX(sf_clip_viewport), |