diff options
| author | Eric Anholt <eric@anholt.net> | 2011-01-12 10:10:01 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2011-01-12 11:08:07 -0800 |
| commit | e880a57a71bbd5152ed26367dcc7051f21c20981 (patch) | |
| tree | e6078bd29d6c302e9e1925f15a0272849b6056d0 /src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | |
| parent | c60cb25bfb15fc83e78d9f2c74646dcc5ad07792 (diff) | |
i965: Clarify when we need to (re-)calculate live intervals.
The ad-hoc placement of recalculation somewhere between when they got
invalidated and when they were next needed was confusing. This should
clarify what's going on here.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp index bbb210cd449..078a349abdf 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp @@ -94,6 +94,8 @@ fs_visitor::assign_regs() int class_count = 0; int aligned_pair_class = -1; + calculate_live_intervals(); + /* Set up the register classes. * * The base registers store a scalar value. For texture samples, @@ -416,4 +418,6 @@ fs_visitor::spill_reg(int spill_reg) } } } + + this->live_intervals_valid = false; } |