i915: Separate BLEND from general context state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

3 files changed, 40 insertions, 22 deletions

diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index d0245218f01..e38281ee034 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -51,6 +51,7 @@
 #define I915_UPLOAD_INVARIENT        0x40
 #define I915_UPLOAD_DEFAULTS         0x80
 #define I915_UPLOAD_RASTER_RULES     0x100
+#define I915_UPLOAD_BLEND            0x200
 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
 #define I915_UPLOAD_TEX_0_SHIFT      16
@@ -77,17 +78,19 @@
 #define I915_DEST_SETUP_SIZE 18
 
 #define I915_CTXREG_STATE4		0
-#define I915_CTXREG_LI	        	1
-#define I915_CTXREG_LIS2		        2
-#define I915_CTXREG_LIS4	        	3
-#define I915_CTXREG_LIS5	        	4
-#define I915_CTXREG_LIS6	         	5
-#define I915_CTXREG_IAB   	 	6
-#define I915_CTXREG_BLENDCOLOR0		7
-#define I915_CTXREG_BLENDCOLOR1		8
-#define I915_CTXREG_BF_STENCIL_OPS	9
-#define I915_CTXREG_BF_STENCIL_MASKS	10
-#define I915_CTX_SETUP_SIZE		11
+#define I915_CTXREG_LI			1
+#define I915_CTXREG_LIS2		2
+#define I915_CTXREG_LIS4		3
+#define I915_CTXREG_LIS5		4
+#define I915_CTXREG_LIS6		5
+#define I915_CTXREG_BF_STENCIL_OPS	6
+#define I915_CTXREG_BF_STENCIL_MASKS	7
+#define I915_CTX_SETUP_SIZE		8
+
+#define I915_BLENDREG_IAB		0
+#define I915_BLENDREG_BLENDCOLOR0	1
+#define I915_BLENDREG_BLENDCOLOR1	2
+#define I915_BLEND_SETUP_SIZE		3
 
 #define I915_FOGREG_COLOR		0
 #define I915_FOGREG_MODE0		1
@@ -216,6 +219,7 @@ struct i915_fragment_program
 struct i915_hw_state
 {
    GLuint Ctx[I915_CTX_SETUP_SIZE];
+   GLuint Blend[I915_BLEND_SETUP_SIZE];
    GLuint Buffer[I915_DEST_SETUP_SIZE];
    GLuint Stipple[I915_STP_SETUP_SIZE];
    GLuint Fog[I915_FOG_SETUP_SIZE];
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 0cddf82a40a..ee49c303cda 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -236,9 +236,9 @@ i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 
    dw = (a << 24) | (r << 16) | (g << 8) | b;
-   if (dw != i915->state.Ctx[I915_CTXREG_BLENDCOLOR1]) {
-      I915_STATECHANGE(i915, I915_UPLOAD_CTX);
-      i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = dw
+   if (dw != i915->state.Blend[I915_BLENDREG_BLENDCOLOR1]) {
+      i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = dw;
+      I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
    }
 }
 
@@ -273,7 +273,7 @@ static void
 i915UpdateBlendState(struct gl_context * ctx)
 {
    struct i915_context *i915 = I915_CONTEXT(ctx);
-   GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
+   GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] &
                  ~(IAB_SRC_FACTOR_MASK |
                    IAB_DST_FACTOR_MASK |
                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
@@ -308,11 +308,13 @@ i915UpdateBlendState(struct gl_context * ctx)
    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
       iab |= IAB_ENABLE;
 
-   if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
-       lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
-      I915_STATECHANGE(i915, I915_UPLOAD_CTX);
-      i915->state.Ctx[I915_CTXREG_IAB] = iab;
+   if (iab != i915->state.Blend[I915_BLENDREG_IAB]) {
+      i915->state.Blend[I915_BLENDREG_IAB] = iab;
+      I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
+   }
+   if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
+      I915_STATECHANGE(i915, I915_UPLOAD_CTX);
    }
 
    /* This will catch a logicop blend equation */
@@ -1040,6 +1042,7 @@ i915_init_packets(struct i915_context *i915)
 
    {
       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
+      I915_STATECHANGE(i915, I915_UPLOAD_BLEND);
       /* Probably don't want to upload all this stuff every time one 
        * piece changes.
        */
@@ -1066,13 +1069,13 @@ i915_init_packets(struct i915_context *i915)
                                              ENABLE_STENCIL_WRITE_MASK |
                                              STENCIL_WRITE_MASK(0xff));
 
-      i915->state.Ctx[I915_CTXREG_IAB] =
+      i915->state.Blend[I915_BLENDREG_IAB] =
          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 
-      i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
+      i915->state.Blend[I915_BLENDREG_BLENDCOLOR0] =
          _3DSTATE_CONST_BLEND_COLOR_CMD;
-      i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
+      i915->state.Blend[I915_BLENDREG_BLENDCOLOR1] = 0;
 
       i915->state.Ctx[I915_CTXREG_BF_STENCIL_MASKS] =
 	 _3DSTATE_BACKFACE_STENCIL_MASKS |
@@ -1143,6 +1146,7 @@ i915_init_packets(struct i915_context *i915)
    i915->state.active = (I915_UPLOAD_PROGRAM |
                          I915_UPLOAD_STIPPLE |
                          I915_UPLOAD_CTX |
+                         I915_UPLOAD_BLEND |
                          I915_UPLOAD_BUFFERS |
 			 I915_UPLOAD_INVARIENT |
 			 I915_UPLOAD_RASTER_RULES);
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 14c409bfc6c..4049c37fdb1 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -251,6 +251,9 @@ get_state_size(struct i915_hw_state *state)
    if (dirty & I915_UPLOAD_CTX)
       sz += sizeof(state->Ctx);
 
+   if (dirty & I915_UPLOAD_BLEND)
+      sz += sizeof(state->Blend);
+
    if (dirty & I915_UPLOAD_BUFFERS)
       sz += sizeof(state->Buffer);
 
@@ -366,6 +369,13 @@ i915_emit_state(struct intel_context *intel)
       emit(intel, state->Ctx, sizeof(state->Ctx));
    }
 
+   if (dirty & I915_UPLOAD_BLEND) {
+      if (INTEL_DEBUG & DEBUG_STATE)
+         fprintf(stderr, "I915_UPLOAD_BLEND:\n");
+
+      emit(intel, state->Blend, sizeof(state->Blend));
+   }
+
    if (dirty & I915_UPLOAD_BUFFERS) {
       GLuint count;