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authorRafael Antognolli <rafael.antognolli@intel.com>2018-03-07 10:49:03 -0800
committerRafael Antognolli <rafael.antognolli@intel.com>2018-04-05 07:42:45 -0700
commit92eb5bbc68d732463e9afb2373c9bd47e5ee0864 (patch)
treeaf70cdb7c9b8939b34211fec3c78c8b2e823598f /src/intel/blorp
parent188a473b9a198d1fb070e2635177a0fc689117b7 (diff)
intel/blorp: Only copy clear color when doing a resolve.
We only need to copy the clear color from the state buffer to the inlined surface state when doing a resolve. Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/intel/blorp')
-rw-r--r--src/intel/blorp/blorp_genX_exec.h13
1 files changed, 9 insertions, 4 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 65c06c0ed5e..eb64eaff0c8 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1283,6 +1283,7 @@ blorp_emit_memcpy(struct blorp_batch *batch,
static void
blorp_emit_surface_state(struct blorp_batch *batch,
const struct brw_blorp_surface_info *surface,
+ enum isl_aux_op op,
void *state, uint32_t state_offset,
const bool color_write_disables[4],
bool is_render_target)
@@ -1346,10 +1347,12 @@ blorp_emit_surface_state(struct blorp_batch *batch,
isl_dev->ss.clear_color_state_offset,
surface->clear_color_addr, *clear_addr);
#elif GEN_GEN >= 7
- struct blorp_address dst_addr = blorp_get_surface_base_address(batch);
- dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset;
- blorp_emit_memcpy(batch, dst_addr, surface->clear_color_addr,
- isl_dev->ss.clear_value_size);
+ if (op == ISL_AUX_OP_FULL_RESOLVE || op == ISL_AUX_OP_PARTIAL_RESOLVE) {
+ struct blorp_address dst_addr = blorp_get_surface_base_address(batch);
+ dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset;
+ blorp_emit_memcpy(batch, dst_addr, surface->clear_color_addr,
+ isl_dev->ss.clear_value_size);
+ }
#else
unreachable("Fast clears are only supported on gen7+");
#endif
@@ -1411,6 +1414,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
if (params->dst.enabled) {
blorp_emit_surface_state(batch, &params->dst,
+ params->fast_clear_op,
surface_maps[BLORP_RENDERBUFFER_BT_INDEX],
surface_offsets[BLORP_RENDERBUFFER_BT_INDEX],
params->color_write_disable, true);
@@ -1426,6 +1430,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
if (params->src.enabled) {
blorp_emit_surface_state(batch, &params->src,
+ params->fast_clear_op,
surface_maps[BLORP_TEXTURE_BT_INDEX],
surface_offsets[BLORP_TEXTURE_BT_INDEX],
NULL, false);