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authorMichel Dänzer <michel.daenzer@amd.com>2014-05-14 16:30:33 +0900
committerIan Romanick <ian.d.romanick@intel.com>2014-05-16 23:14:36 -0700
commit5d6e822d03a551138e49dad32732aab00ab2f8fb (patch)
treed6db7896626bab396921a28e26cc90abf23d1f36 /src/gallium/drivers/r600
parent26d5b220399fc62489a776d4acb3ca4851f98e0f (diff)
radeonsi: Fix anisotropic filtering state setup
Bring it back in line with r600g. I broke this in the original radeonsi bringup. :( Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78537 Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c5828b0599a5c00ebab488b795c63a21f1dc53cd)
Diffstat (limited to 'src/gallium/drivers/r600')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 952b6bded8d..41203597e7f 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -829,15 +829,6 @@ static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
}
#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
-static inline unsigned r600_tex_aniso_filter(unsigned filter)
-{
- if (filter <= 1) return 0;
- if (filter <= 2) return 1;
- if (filter <= 4) return 2;
- if (filter <= 8) return 3;
- /* else */ return 4;
-}
-
/* 12.4 fixed-point */
static INLINE unsigned r600_pack_float_12p4(float x)
{