diff options
| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2014-04-26 20:29:47 -0400 |
|---|---|---|
| committer | Ilia Mirkin <imirkin@alum.mit.edu> | 2014-04-28 20:32:36 -0400 |
| commit | f782d6e792db2ed7773a2d22866dbcdb1e4062ee (patch) | |
| tree | 0849af3cdb2182af7d814e3cd4c6af2e78f69845 /src/gallium/drivers/nouveau/codegen | |
| parent | 50034c017125b9538cd1e88b7344574da5bf3c9a (diff) | |
nvc0/ir: offset appears to come before the Z ref
Fixes textureGatherOffset when used with a shadow sampler. Also verified
against blob compiler with textureLodOffset manually (no piglit tests
for texture[Lod]Offset + shadow samplers).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index dc1eb5e80a5..0b439ddf372 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -737,10 +737,12 @@ NVC0LoweringPass::handleTEX(TexInstruction *i) assert(chipset >= NVISA_GK104_CHIPSET || !i->tex.useOffsets || !i->tex.target.isMS()); - // offset is last source (lod 1st, dc 2nd) + // offset is between lod and dc if (i->tex.useOffsets) { int n, c; int s = i->srcCount(0xff, true); + if (i->tex.target.isShadow()) + s--; if (i->srcExists(s)) // move potential predicate out of the way i->moveSources(s, 1); if (i->tex.useOffsets == 4 && i->srcExists(s + 1)) |