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authorIlia Mirkin <imirkin@alum.mit.edu>2014-04-03 09:43:40 -0400
committerIlia Mirkin <imirkin@alum.mit.edu>2014-04-07 01:06:18 -0400
commit423f64e83ab5b1ea7de475ae80300a8408522743 (patch)
treea549fb783b44dcc7209fd585cae5aa7e329ffbf5 /src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
parentd5faf8e78603a27dbedb2e9e28b58b1b2bc32858 (diff)
nvc0: enable texture query lod
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index c0d14750ac1..382b02da50d 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -598,6 +598,7 @@ private:
bool handleTXD(TexInstruction *);
bool handleTXQ(TexInstruction *);
bool handleManualTXD(TexInstruction *);
+ bool handleTXLQ(TexInstruction *);
bool handleATOM(Instruction *);
bool handleCasExch(Instruction *, bool needCctl);
void handleSurfaceOpNVE4(TexInstruction *);
@@ -860,6 +861,44 @@ NVC0LoweringPass::handleTXQ(TexInstruction *txq)
}
bool
+NVC0LoweringPass::handleTXLQ(TexInstruction *i)
+{
+ /* The outputs are inverted compared to what the TGSI instruction
+ * expects. Take that into account in the mask.
+ */
+ assert((i->tex.mask & ~3) == 0);
+ if (i->tex.mask == 1)
+ i->tex.mask = 2;
+ else if (i->tex.mask == 2)
+ i->tex.mask = 1;
+ handleTEX(i);
+ bld.setPosition(i, true);
+
+ /* The returned values are not quite what we want:
+ * (a) convert from s16/u16 to f32
+ * (b) multiply by 1/256
+ */
+ for (int def = 0; def < 2; ++def) {
+ if (!i->defExists(def))
+ continue;
+ enum DataType type = TYPE_S16;
+ if (i->tex.mask == 2 || def > 0)
+ type = TYPE_U16;
+ bld.mkCvt(OP_CVT, TYPE_F32, i->getDef(def), type, i->getDef(def));
+ bld.mkOp2(OP_MUL, TYPE_F32, i->getDef(def),
+ i->getDef(def), bld.loadImm(NULL, 1.0f / 256));
+ }
+ if (i->tex.mask == 3) {
+ LValue *t = new_LValue(func, FILE_GPR);
+ bld.mkMov(t, i->getDef(0));
+ bld.mkMov(i->getDef(0), i->getDef(1));
+ bld.mkMov(i->getDef(1), t);
+ }
+ return true;
+}
+
+
+bool
NVC0LoweringPass::handleATOM(Instruction *atom)
{
SVSemantic sv;
@@ -1528,6 +1567,8 @@ NVC0LoweringPass::visit(Instruction *i)
return handleTEX(i->asTex());
case OP_TXD:
return handleTXD(i->asTex());
+ case OP_TXLQ:
+ return handleTXLQ(i->asTex());
case OP_TXQ:
return handleTXQ(i->asTex());
case OP_EX2: