diff options
| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2016-10-10 12:06:59 -0400 |
|---|---|---|
| committer | Ilia Mirkin <imirkin@alum.mit.edu> | 2016-10-10 14:28:32 -0400 |
| commit | 5239bd59207752a3acae367fc3faa76ab17d01e4 (patch) | |
| tree | 02f070a2deb1849ff5ceeaa52a85719f89c1d98f /src/gallium/drivers | |
| parent | 0a898ec28bf1bd1bd302c881af13a02b557acb07 (diff) | |
nvc0/ir: fix overwriting of value backing non-constant gather offset
Normally the value is an immediate, which is moved to some temporary, so
there's no problem. In the case of a non-constant offset (as allowed by
ARB_gpu_shader5), we have to take care to copy it first before using it
to build up the bits.
This fixes a compilation error observed in F1 2015.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 3c3d61112b9..4c013c4f699 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -820,11 +820,11 @@ NVC0LoweringPass::handleTEX(TexInstruction *i) // Either there is 1 offset, which goes into the 2 low bytes of the // first source, or there are 4 offsets, which go into 2 sources (8 // values, 1 byte each). - Value *offs[2] = {NULL, NULL}; + Value *offs[2] = {bld.getScratch(), bld.getScratch()}; for (n = 0; n < i->tex.useOffsets; n++) { for (c = 0; c < 2; ++c) { if ((n % 2) == 0 && c == 0) - offs[n / 2] = i->offset[n][c].get(); + bld.mkMov(offs[n / 2], i->offset[n][c].get()); else bld.mkOp3(OP_INSBF, TYPE_U32, offs[n / 2], |