summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorJordan Justen <jordan.l.justen@intel.com>2019-12-09 10:51:40 -0800
committerMarge Bot <emma+marge@anholt.net>2022-01-13 09:48:51 +0000
commit70a4e646852ba5931493db42b3a7b950dffe7d52 (patch)
tree6c84112b3d5aa01aa9ed6060ae767d2f08f3211f /include
parent4f9141607f40f0be9cee38ff6b006a05bba72e88 (diff)
intel: Add *disabled* device ids for DG2
We are waiting for i915 to enable DG2 in upstream Linux, so for now we use an "#if 0" around the PCI ids. Reworks: * Merged Lionel's "intel/devinfo: store the different kind of DG2" Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14524>
Diffstat (limited to 'include')
-rw-r--r--include/pci_ids/iris_pci_ids.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h
index 4d58451c1aa..9f0d5473540 100644
--- a/include/pci_ids/iris_pci_ids.h
+++ b/include/pci_ids/iris_pci_ids.h
@@ -202,3 +202,27 @@ CHIPSET(0x4905, dg1, "DG1", "Intel(R) Graphics")
CHIPSET(0x4906, dg1, "DG1", "Intel(R) Graphics")
CHIPSET(0x4907, sg1, "SG1", "Intel(R) Graphics")
CHIPSET(0x4908, dg1, "DG1", "Intel(R) Graphics")
+
+/* Waiting on i915 upstream support */
+#if 0
+CHIPSET(0x4f80, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f81, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f82, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f83, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f84, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f87, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x4f88, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5690, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5691, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5692, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5693, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5694, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x5695, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56a0, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56a1, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56a2, dg2_g10, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56a5, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56a6, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56b0, dg2_g11, "DG2", "Intel(R) Graphics")
+CHIPSET(0x56b1, dg2_g11, "DG2", "Intel(R) Graphics")
+#endif