diff options
| author | Jason Ekstrand <jason@jlekstrand.net> | 2020-01-07 13:20:10 -0600 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2020-01-08 11:29:17 -0800 |
| commit | 28cba736ce34127024e675881b9230ef568ddf4b (patch) | |
| tree | 07a89833a23b457acc5714557cce79a5b04eb1f8 | |
| parent | c63d04cb57002c636b65cdc5989c0b8aeb5dfe8b (diff) | |
intel/nir: Add a memory barrier before barrier()
Our barrier instruction does not implicitly do a memory fence but the
GLSL barrier() intrinsic is supposed to. The easiest back-portable
solution is to just add the NIR barriers. We'll sort this out more
properly in later commits.
Cc: mesa-stable@lists.freedesktop.org
Closes: #2138
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit 803fad43c3f9a89f0d8409bd33280b5457b104c7)
| -rw-r--r-- | src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index 434ad005281..3f48a3c5dda 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -55,6 +55,20 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, nir_ssa_def *sysval; switch (intrinsic->intrinsic) { + case nir_intrinsic_barrier: { + /* Our HW barrier instruction doesn't do a memory barrier for us but + * the GLSL barrier() intrinsic does for shared memory. Insert a + * shared memory barrier before every barrier(). + */ + b->cursor = nir_before_instr(&intrinsic->instr); + + nir_intrinsic_instr *shared_barrier = + nir_intrinsic_instr_create(b->shader, + nir_intrinsic_memory_barrier_shared); + nir_builder_instr_insert(b, &shared_barrier->instr); + continue; + } + case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_local_invocation_id: { /* First time we are using those, so let's calculate them. */ |