gallivm/nir: extract a valid texture index according to exec_mask.

When using indirect textures, some lanes may not be active,
particularly in a loop, so as with some other areas, extracting
the correct lane is needed here. This extracts the last valid one.

KHR-GL45.texture_barrier.* on zink.

Fixes: e168d148d76d ("gallivm/nir: handle non-uniform texture offsets")

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15259>
(cherry picked from commit 8346983775499119b8534d829c1db75e23c4097d)

Conflicts:
	src/gallium/drivers/zink/ci/zink-lvp-fails.txt

3 files changed, 22 insertions, 11 deletions

diff --git a/.pick_status.json b/.pick_status.json
index 8ffbee5e850..1603bcf1733 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -166,7 +166,7 @@
         "description": "gallivm/nir: extract a valid texture index according to exec_mask.",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "e168d148d76d780eda6f9aaa6c66608c4df3096c"
     },
@@ -3163,7 +3163,7 @@
         "description": "panfrost: Fix set_sampler_views for big GL",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
index b771b7cc748..daed647ba90 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
@@ -1438,6 +1438,7 @@ static void emit_tex(struct lp_build_nir_context *bld_base,
 {
    struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
    struct gallivm_state *gallivm = bld_base->base.gallivm;
+   LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 
    params->type = bld_base->base.type;
    params->context_ptr = bld->context_ptr;
@@ -1491,10 +1492,25 @@ static void emit_tex(struct lp_build_nir_context *bld_base,
       return;
    }
 
-   if (params->texture_index_offset)
-      params->texture_index_offset = LLVMBuildExtractElement(bld_base->base.gallivm->builder,
-                                                             params->texture_index_offset,
-                                                             lp_build_const_int32(bld_base->base.gallivm, 0), "");
+   if (params->texture_index_offset) {
+      struct lp_build_loop_state loop_state;
+      LLVMValueRef exec_mask = mask_vec(bld_base);
+      LLVMValueRef outer_cond = LLVMBuildICmp(builder, LLVMIntNE, exec_mask, bld_base->uint_bld.zero, "");
+      LLVMValueRef res_store = lp_build_alloca(gallivm, bld_base->uint_bld.elem_type, "");
+      lp_build_loop_begin(&loop_state, gallivm, lp_build_const_int32(gallivm, 0));
+      LLVMValueRef if_cond = LLVMBuildExtractElement(gallivm->builder, outer_cond, loop_state.counter, "");
+
+      struct lp_build_if_state ifthen;
+      lp_build_if(&ifthen, gallivm, if_cond);
+      LLVMValueRef value_ptr = LLVMBuildExtractElement(gallivm->builder, params->texture_index_offset,
+                                                       loop_state.counter, "");
+      LLVMBuildStore(builder, value_ptr, res_store);
+      lp_build_endif(&ifthen);
+      lp_build_loop_end_cond(&loop_state, lp_build_const_int32(gallivm, bld_base->uint_bld.type.length),
+                             NULL, LLVMIntUGE);
+      LLVMValueRef idx_val = LLVMBuildLoad(builder, res_store, "");
+      params->texture_index_offset = idx_val;
+   }
 
    params->type = bld_base->base.type;
    bld->sampler->emit_tex_sample(bld->sampler,
diff --git a/src/gallium/drivers/zink/ci/zink-lvp-fails.txt b/src/gallium/drivers/zink/ci/zink-lvp-fails.txt
index d3f03d862ad..4bff4ec917e 100644
--- a/src/gallium/drivers/zink/ci/zink-lvp-fails.txt
+++ b/src/gallium/drivers/zink/ci/zink-lvp-fails.txt
@@ -28,11 +28,6 @@ KHR-GL46.tessellation_shader.tessellation_shader_quads_tessellation.degenerate_c
 KHR-GL46.tessellation_shader.tessellation_shader_quads_tessellation.inner_tessellation_level_rounding,Fail
 KHR-GL46.tessellation_shader.tessellation_shader_tessellation.gl_InvocationID_PatchVerticesIn_PrimitiveID,Fail
 KHR-GL46.tessellation_shader.vertex.vertex_spacing,Fail
-KHR-GL46.texture_barrier_ARB.disjoint-texels,Fail
-KHR-GL46.texture_barrier_ARB.overlapping-texels,Fail
-KHR-GL46.texture_barrier.disjoint-texels,Fail
-KHR-GL46.texture_barrier.overlapping-texels,Fail
-KHR-GL46.texture_view.view_classes,Fail
 KHR-GL46.texture_view.view_sampling,Fail
 KHR-GL46.transform_feedback.capture_vertex_interleaved_test,Fail
 KHR-GL46.transform_feedback.capture_vertex_separate_test,Fail