diff options
| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2019-04-11 12:20:36 +0100 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2019-04-22 09:06:38 -0700 |
| commit | ac1ffeab1d5687a3f65112e47010416298e9af9d (patch) | |
| tree | a9964623bfb1a4ab53fe8f99e7dc70f3aa12e1c6 | |
| parent | 229c4abde39f8481d09492eea5b9b4fe98283d78 (diff) | |
intel/devinfo: fix missing num_thread_per_eu on ICL
There was an assumption that num_thread_per_eu would be set in the
Gen8 features. Since this is mostly the same of all gen8->11 (except
GEN9_LP that overwrites it) let's just factor it out.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
(cherry picked from commit 773e6aa9fd250479e2a89b376e5eda5a1d07fc5b)
| -rw-r--r-- | src/intel/dev/gen_device_info.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c index ee1a2e85ada..625ebc031dc 100644 --- a/src/intel/dev/gen_device_info.c +++ b/src/intel/dev/gen_device_info.c @@ -414,6 +414,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = { .has_64bit_types = true, \ .supports_simd16_3src = true, \ .has_surface_tile_offset = true, \ + .num_thread_per_eu = 7, \ .max_vs_threads = 504, \ .max_tcs_threads = 504, \ .max_tes_threads = 504, \ @@ -427,7 +428,6 @@ static const struct gen_device_info gen_device_info_bdw_gt1 = { .num_slices = 1, .num_subslices = { 2, }, .num_eu_per_subslice = 8, - .num_thread_per_eu = 7, .l3_banks = 2, .max_cs_threads = 42, .urb = { @@ -452,7 +452,6 @@ static const struct gen_device_info gen_device_info_bdw_gt2 = { .num_slices = 1, .num_subslices = { 3, }, .num_eu_per_subslice = 8, - .num_thread_per_eu = 7, .l3_banks = 4, .max_cs_threads = 56, .urb = { @@ -477,7 +476,6 @@ static const struct gen_device_info gen_device_info_bdw_gt3 = { .num_slices = 2, .num_subslices = { 3, 3, }, .num_eu_per_subslice = 8, - .num_thread_per_eu = 7, .l3_banks = 8, .max_cs_threads = 56, .urb = { @@ -503,7 +501,6 @@ static const struct gen_device_info gen_device_info_chv = { .num_slices = 1, .num_subslices = { 2, }, .num_eu_per_subslice = 8, - .num_thread_per_eu = 7, .l3_banks = 2, .max_vs_threads = 80, .max_tcs_threads = 80, @@ -609,8 +606,7 @@ static const struct gen_device_info gen_device_info_chv = { #define GEN9_FEATURES \ GEN8_FEATURES, \ GEN9_HW_INFO, \ - .has_sample_with_hiz = true, \ - .num_thread_per_eu = 7 + .has_sample_with_hiz = true static const struct gen_device_info gen_device_info_skl_gt1 = { GEN9_FEATURES, .gt = 1, |