diff options
author | Chad Versace <chadversary@chromium.org> | 2016-12-16 12:06:40 -0800 |
---|---|---|
committer | Emil Velikov <emil.l.velikov@gmail.com> | 2017-02-14 13:32:38 +0000 |
commit | 01ac2d3c5c57a8c25b362f2ea41eb5833bc10641 (patch) | |
tree | f8c4997603ea7e50322ffd0740c6f15f50d977a7 | |
parent | 1770ba4d8fa7944204b70f4d0e91e93b18ea2e2e (diff) |
i965/mt: Disable HiZ when sharing depth buffer externally (v2)
intel_miptree_make_shareable() discarded and disabled CCS. Fix it so
that it discards and disables HiZ too.
Fixes dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
on Skylake.
v2: Actually do what the commit message says. Discard the HiZ buffer.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=98329
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Nanley Chery <nanley.g.chery@intel.com
Cc: Haixia Shi <hshi@chromium.org>
(cherry picked from commit 42011be1e27f59d750b781c10766e19ec0ee6ff5)
[Emil Velikov: patch is a backport by Chad of above commit]
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 |
1 files changed, 22 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 78c7a11d85b..210d28980a3 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -996,6 +996,19 @@ intel_miptree_reference(struct intel_mipmap_tree **dst, *dst = src; } +static void +intel_miptree_hiz_buffer_free(struct intel_miptree_aux_buffer *hiz_buf) +{ + if (hiz_buf == NULL) + return; + + if (hiz_buf->mt) + intel_miptree_release(&hiz_buf->mt); + else + drm_intel_bo_unreference(hiz_buf->bo); + + free(hiz_buf); +} void intel_miptree_release(struct intel_mipmap_tree **mt) @@ -1012,13 +1025,7 @@ intel_miptree_release(struct intel_mipmap_tree **mt) drm_intel_bo_unreference((*mt)->bo); intel_miptree_release(&(*mt)->stencil_mt); intel_miptree_release(&(*mt)->r8stencil_mt); - if ((*mt)->hiz_buf) { - if ((*mt)->hiz_buf->mt) - intel_miptree_release(&(*mt)->hiz_buf->mt); - else - drm_intel_bo_unreference((*mt)->hiz_buf->bo); - free((*mt)->hiz_buf); - } + intel_miptree_hiz_buffer_free((*mt)->hiz_buf); intel_miptree_release(&(*mt)->mcs_mt); intel_resolve_map_clear(&(*mt)->hiz_map); @@ -2142,6 +2149,8 @@ intel_miptree_resolve_color(struct brw_context *brw, * then discard the MCS buffer, if present. We also set the fast_clear_state * to INTEL_FAST_CLEAR_STATE_NO_MCS to ensure that no MCS buffer gets * allocated in the future. + * + * HiZ is similarly unsafe with shared buffers. */ void intel_miptree_make_shareable(struct brw_context *brw, @@ -2160,6 +2169,12 @@ intel_miptree_make_shareable(struct brw_context *brw, mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS; } + if (mt->hiz_buf) { + intel_miptree_all_slices_resolve_depth(brw, mt); + intel_miptree_hiz_buffer_free(mt->hiz_buf); + mt->hiz_buf = NULL; + } + mt->disable_aux_buffers = true; } |