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authorChris Wilson <chris@chris-wilson.co.uk>2017-06-20 11:39:22 +0100
committerKenneth Graunke <kenneth@whitecape.org>2017-07-10 15:55:31 -0700
commitde4c2eaa627204ffa54160ab9ea0bd3aaf3732b2 (patch)
tree6bce986e1052c2e08aa4debc3c55efe7b3912920
parentb532e3b4a2ce503224f2bf0e511812860a6c609f (diff)
i965: Disable access to CPU mmap for async access on non-LLC machines
If the user triggers an implicit batch flush while holding access to a CPU mapped buffer, that mmapping will be invalidated by the kernel for non-LLC devices. (The kernel when executing a batch will change the cache domain of the buffers in that batch, which for non-LLC CPU access will cause that buffer to be clflushed and any further CPU access to be discarded.) To prevent this, simply disallow any CPU async mmap access. The cases where async CPU access to a non-LLC buffer should continue to be allowed via their preferred snooping path. v2 (Ken): Reword the comment slightly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_bufmgr.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index ec6ab51c12e..d9b37bfae34 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -762,10 +762,18 @@ can_map_cpu(struct brw_bo *bo, unsigned flags)
if (bo->cache_coherent)
return true;
- if (flags & MAP_PERSISTENT)
- return false;
-
- if (flags & MAP_COHERENT)
+ /* If PERSISTENT or COHERENT are set, the mmapping needs to remain valid
+ * across batch flushes where the kernel will change cache domains of the
+ * bo, invalidating continued access to the CPU mmap on non-LLC device.
+ *
+ * Similarly, ASYNC typically means that the buffer will be accessed via
+ * both the CPU and the GPU simultaneously. Batches may be executed that
+ * use the BO even while it is mapped. While OpenGL technically disallows
+ * most drawing while non-persistent mappings are active, we may still use
+ * the GPU for blits or other operations, causing batches to happen at
+ * inconvenient times.
+ */
+ if (flags & (MAP_PERSISTENT | MAP_COHERENT | MAP_ASYNC))
return false;
return !(flags & MAP_WRITE);