intel: Move clflush helpers from anv to common/gen_clflush.h.

I want to use these in the OpenGL driver as well.

v2: Add to COMMON_FILES in Makefile.sources (caught by Emil)

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Matt Turner <mattst88@gmail.com>

7 files changed, 63 insertions, 34 deletions

diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index b672e615c52..2b6d607aa9b 100644
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -7,6 +7,7 @@ BLORP_FILES = \
 	blorp/blorp_priv.h
 
 COMMON_FILES = \
+	common/gen_clflush.h \
 	common/gen_debug.c \
 	common/gen_debug.h \
 	common/gen_device_info.c \
diff --git a/src/intel/common/gen_clflush.h b/src/intel/common/gen_clflush.h
new file mode 100644
index 00000000000..9b971cac37e
--- /dev/null
+++ b/src/intel/common/gen_clflush.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef GEN_CLFLUSH_H
+#define GEN_CLFLUSH_H
+
+#define CACHELINE_SIZE 64
+#define CACHELINE_MASK 63
+
+static inline void
+gen_clflush_range(void *start, size_t size)
+{
+   void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
+   void *end = start + size;
+
+   while (p < end) {
+      __builtin_ia32_clflush(p);
+      p += CACHELINE_SIZE;
+   }
+}
+
+static inline void
+gen_flush_range(void *start, size_t size)
+{
+   __builtin_ia32_mfence();
+   gen_clflush_range(start, size);
+}
+
+static inline void
+gen_invalidate_range(void *start, size_t size)
+{
+   gen_clflush_range(start, size);
+   __builtin_ia32_mfence();
+}
+
+#endif
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 9776a45b917..47fee7398f7 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1091,7 +1091,7 @@ write_reloc(const struct anv_device *device, void *p, uint64_t v, bool flush)
    }
 
    if (flush && !device->info.has_llc)
-      anv_flush_range(p, reloc_size);
+      gen_flush_range(p, reloc_size);
 }
 
 static void
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 3dc55dbb8dd..39c907e9f2d 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1750,7 +1750,7 @@ clflush_mapped_ranges(struct anv_device         *device,
       if (ranges[i].offset >= mem->map_size)
          continue;
 
-      anv_clflush_range(mem->map + ranges[i].offset,
+      gen_clflush_range(mem->map + ranges[i].offset,
                         MIN2(ranges[i].size, mem->map_size - ranges[i].offset));
    }
 }
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 573778dad55..4dce360c76e 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -41,6 +41,7 @@
 #define VG(x)
 #endif
 
+#include "common/gen_clflush.h"
 #include "common/gen_device_info.h"
 #include "blorp/blorp.h"
 #include "compiler/brw_compiler.h"
@@ -529,35 +530,6 @@ struct anv_state_stream {
    struct anv_state_stream_block *block_list;
 };
 
-#define CACHELINE_SIZE 64
-#define CACHELINE_MASK 63
-
-static inline void
-anv_clflush_range(void *start, size_t size)
-{
-   void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
-   void *end = start + size;
-
-   while (p < end) {
-      __builtin_ia32_clflush(p);
-      p += CACHELINE_SIZE;
-   }
-}
-
-static inline void
-anv_flush_range(void *start, size_t size)
-{
-   __builtin_ia32_mfence();
-   anv_clflush_range(start, size);
-}
-
-static inline void
-anv_invalidate_range(void *start, size_t size)
-{
-   anv_clflush_range(start, size);
-   __builtin_ia32_mfence();
-}
-
 /* The block_pool functions exported for testing only.  The block pool should
  * only be used via a state pool (see below).
  */
@@ -791,7 +763,7 @@ anv_state_flush(struct anv_device *device, struct anv_state state)
    if (device->info.has_llc)
       return;
 
-   anv_flush_range(state.map, state.alloc_size);
+   gen_flush_range(state.map, state.alloc_size);
 }
 
 void anv_device_init_blorp(struct anv_device *device);
diff --git a/src/intel/vulkan/anv_queue.c b/src/intel/vulkan/anv_queue.c
index fd4d36297f0..b12b2e076cd 100644
--- a/src/intel/vulkan/anv_queue.c
+++ b/src/intel/vulkan/anv_queue.c
@@ -72,7 +72,7 @@ anv_device_submit_simple_batch(struct anv_device *device,
 
    memcpy(bo.map, batch->start, size);
    if (!device->info.has_llc)
-      anv_flush_range(bo.map, size);
+      gen_flush_range(bo.map, size);
 
    exec_bos[0] = &bo;
    exec2_objects[0].handle = bo.gem_handle;
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index 04c5499a08c..f041fc71b55 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -156,7 +156,7 @@ blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
 {
    struct anv_device *device = batch->blorp->driver_ctx;
    if (!device->info.has_llc)
-      anv_flush_range(start, size);
+      gen_flush_range(start, size);
 }
 
 static void