diff options
author | Jesse Natalie <jenatali@microsoft.com> | 2021-04-19 10:07:21 -0700 |
---|---|---|
committer | Dylan Baker <dylan.c.baker@intel.com> | 2021-04-21 09:53:37 -0700 |
commit | 9e90fb7bc1640cf31c622c7de50f906fae67581a (patch) | |
tree | 0c8beb892d437bcee2fc1fea1300bc440d4e9cc8 | |
parent | 6644b0e398e1282257dbc117a405a66f6e8ff5f8 (diff) |
nir: Fix MSVC warning C4334 (32bit shift cast to 64bit)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10331>
(cherry picked from commit 09440ce3fb0d7f2e66d7b793eb39b9ff2a7dbf8c)
-rw-r--r-- | .pick_status.json | 2 | ||||
-rw-r--r-- | src/compiler/nir/nir_builtin_builder.c | 2 | ||||
-rw-r--r-- | src/compiler/nir/nir_opt_copy_prop_vars.c | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/nir/nir_to_tgsi.c | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/.pick_status.json b/.pick_status.json index 9cf87f41236..33b735d6111 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -445,7 +445,7 @@ "description": "nir: Fix MSVC warning C4334 (32bit shift cast to 64bit)", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": null }, diff --git a/src/compiler/nir/nir_builtin_builder.c b/src/compiler/nir/nir_builtin_builder.c index 2301191bbc4..d0d8d444005 100644 --- a/src/compiler/nir/nir_builtin_builder.c +++ b/src/compiler/nir/nir_builtin_builder.c @@ -76,7 +76,7 @@ nir_nextafter(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y) nir_ssa_def *conddir = nir_flt(b, x, y); nir_ssa_def *condzero = nir_feq(b, x, zero); - uint64_t sign_mask = 1 << (x->bit_size - 1); + uint64_t sign_mask = 1ull << (x->bit_size - 1); uint64_t min_abs = 1; if (nir_is_denorm_flush_to_zero(b->shader->info.float_controls_execution_mode, x->bit_size)) { diff --git a/src/compiler/nir/nir_opt_copy_prop_vars.c b/src/compiler/nir/nir_opt_copy_prop_vars.c index f496b5de2e7..9b8229fc143 100644 --- a/src/compiler/nir/nir_opt_copy_prop_vars.c +++ b/src/compiler/nir/nir_opt_copy_prop_vars.c @@ -108,7 +108,7 @@ static bool value_equals_store_src(struct value *value, nir_intrinsic_instr *intrin) { assert(intrin->intrinsic == nir_intrinsic_store_deref); - uintptr_t write_mask = nir_intrinsic_write_mask(intrin); + nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin); for (unsigned i = 0; i < intrin->num_components; i++) { if ((write_mask & (1 << i)) && diff --git a/src/gallium/auxiliary/nir/nir_to_tgsi.c b/src/gallium/auxiliary/nir/nir_to_tgsi.c index c172f574828..73185346d50 100644 --- a/src/gallium/auxiliary/nir/nir_to_tgsi.c +++ b/src/gallium/auxiliary/nir/nir_to_tgsi.c @@ -1387,7 +1387,7 @@ ntt_emit_load_input(struct ntt_compile *c, nir_intrinsic_instr *instr) * emit the extra TGSI interp instruction, we can just read the * input. */ - if (c->centroid_inputs & (1 << nir_intrinsic_base(instr))) { + if (c->centroid_inputs & (1ull << nir_intrinsic_base(instr))) { ntt_store(c, &instr->dest, input); } else { ureg_INTERP_CENTROID(c->ureg, ntt_get_dest(c, &instr->dest), diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 5aa574d74fc..f2bc67a3629 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -362,7 +362,7 @@ ttn_emit_declaration(struct ttn_compile *c) c->inputs[idx] = var; for (int i = 0; i < array_size; i++) - b->shader->info.inputs_read |= 1 << (var->data.location + i); + b->shader->info.inputs_read |= 1ull << (var->data.location + i); break; case TGSI_FILE_OUTPUT: { |