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authorEmil Velikov <emil.l.velikov@gmail.com>2015-12-19 00:18:07 +0000
committerEmil Velikov <emil.l.velikov@gmail.com>2015-12-19 00:18:07 +0000
commit0452dcd92da3eb4d31b6a83a2c39968e18d1f1d1 (patch)
treeafbba05df15dd2aa0c46063517e5dcda356a6cef
parent86f18de1c05457ec3c709f4e1e6bf93bac93db4f (diff)
Revert "i965/vec4: Use a stride of 1 and byte offsets for UBOs"
This reverts commit 147c3fbdb3f779f5172304e3be10cc27e0e67be7. See the previous reverts.
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp16
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp13
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c5
3 files changed, 27 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 19a71f3086b..b2adb9aaea5 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -660,10 +660,20 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
unsigned const_offset = instr->const_index[0];
src_reg offset;
- if (!has_indirect) {
- offset = src_reg(const_offset & ~15);
+ if (devinfo->gen <= 6) {
+ if (!has_indirect) {
+ offset = src_reg(const_offset & ~15);
+ } else {
+ offset = get_nir_src(instr->src[1], nir_type_int, 1);
+ }
} else {
- offset = get_nir_src(instr->src[1], nir_type_int, 1);
+ if (!has_indirect) {
+ offset = src_reg(const_offset & ~15);
+ } else {
+ offset = src_reg(this, glsl_type::uint_type);
+ emit(SHR(dst_reg(offset), get_nir_src(instr->src[1], nir_type_int, 1),
+ src_reg(4u)));
+ }
}
src_reg packed_consts = src_reg(this, glsl_type::vec4_type);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index c5de3aa71d4..005c8b1ac39 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3431,16 +3431,23 @@ vec4_visitor::get_pull_constant_offset(bblock_t * block, vec4_instruction *inst,
emit_before(block, inst, ADD(dst_reg(index), *reladdr,
src_reg(reg_offset)));
- emit_before(block, inst, MUL(dst_reg(index), index, src_reg(16)));
+
+ /* Pre-gen7, the message header uses byte offsets instead of vec4
+ * (16-byte) offset units.
+ */
+ if (devinfo->gen < 7) {
+ emit_before(block, inst, MUL(dst_reg(index), index, src_reg(16)));
+ }
return index;
} else if (devinfo->gen >= 8) {
/* Store the offset in a GRF so we can send-from-GRF. */
src_reg offset = src_reg(this, glsl_type::int_type);
- emit_before(block, inst, MOV(dst_reg(offset), src_reg(reg_offset * 16)));
+ emit_before(block, inst, MOV(dst_reg(offset), src_reg(reg_offset)));
return offset;
} else {
- return src_reg(reg_offset * 16);
+ int message_header_scale = devinfo->gen < 7 ? 16 : 1;
+ return src_reg(reg_offset * message_header_scale);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index e689fed9816..53c85e9641e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -403,9 +403,12 @@ brw_create_constant_surface(struct brw_context *brw,
uint32_t *out_offset,
bool dword_pitch)
{
+ uint32_t stride = dword_pitch ? 1 : 16;
+ uint32_t elements = ALIGN(size, stride) / stride;
+
brw->vtbl.emit_buffer_surface_state(brw, out_offset, bo, offset,
BRW_SURFACEFORMAT_R32G32B32A32_FLOAT,
- size, 1, false);
+ elements, stride, false);
}
/**