diff options
Diffstat (limited to 'arch/arm64/include/asm/ptrace.h')
| -rw-r--r-- | arch/arm64/include/asm/ptrace.h | 54 |
1 files changed, 28 insertions, 26 deletions
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index b2de32939ada..b1dd039023ef 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -1,20 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Based on arch/arm/include/asm/ptrace.h * * Copyright (C) 1996-2003 Russell King * Copyright (C) 2012 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ASM_PTRACE_H #define __ASM_PTRACE_H @@ -35,9 +24,15 @@ * means masking more IRQs (or at least that the same IRQs remain masked). * * To mask interrupts, we clear the most significant bit of PMR. + * + * Some code sections either automatically switch back to PSR.I or explicitly + * require to not use priority masking. If bit GIC_PRIO_PSR_I_SET is included + * in the the priority mask, it indicates that PSR.I should be set and + * interrupt disabling temporarily does not rely on IRQ priorities. */ -#define GIC_PRIO_IRQON 0xf0 -#define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80) +#define GIC_PRIO_IRQON 0xc0 +#define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80) +#define GIC_PRIO_PSR_I_SET (1 << 4) /* Additional SPSR bits not exposed in the UABI */ #define PSR_IL_BIT (1 << 20) @@ -228,11 +223,12 @@ static inline void forget_syscall(struct pt_regs *regs) #define fast_interrupts_enabled(regs) \ (!((regs)->pstate & PSR_F_BIT)) -#define GET_USP(regs) \ - (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp) - -#define SET_USP(ptregs, value) \ - (!compat_user_mode(regs) ? ((regs)->sp = value) : ((regs)->compat_sp = value)) +static inline unsigned long user_stack_pointer(struct pt_regs *regs) +{ + if (compat_user_mode(regs)) + return regs->compat_sp; + return regs->sp; +} extern int regs_query_register_offset(const char *name); extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, @@ -331,13 +327,20 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, struct task_struct; int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task); -#define GET_IP(regs) ((unsigned long)(regs)->pc) -#define SET_IP(regs, value) ((regs)->pc = ((u64) (value))) - -#define GET_FP(ptregs) ((unsigned long)(ptregs)->regs[29]) -#define SET_FP(ptregs, value) ((ptregs)->regs[29] = ((u64) (value))) +static inline unsigned long instruction_pointer(struct pt_regs *regs) +{ + return regs->pc; +} +static inline void instruction_pointer_set(struct pt_regs *regs, + unsigned long val) +{ + regs->pc = val; +} -#include <asm-generic/ptrace.h> +static inline unsigned long frame_pointer(struct pt_regs *regs) +{ + return regs->regs[29]; +} #define procedure_link_pointer(regs) ((regs)->regs[30]) @@ -347,7 +350,6 @@ static inline void procedure_link_pointer_set(struct pt_regs *regs, procedure_link_pointer(regs) = val; } -#undef profile_pc extern unsigned long profile_pc(struct pt_regs *regs); #endif /* __ASSEMBLY__ */ |