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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts136
1 files changed, 39 insertions, 97 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
index daca1e0ad62a..9850140514ba 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
@@ -14,6 +14,7 @@
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include "sdm850.dtsi"
+#include "sdm845-wcd9340.dtsi"
#include "pm8998.dtsi"
/*
@@ -129,7 +130,7 @@
};
&apps_rsc {
- pm8998-rpmh-regulators {
+ regulators-0 {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
@@ -383,9 +384,10 @@
};
&ipa {
- status = "okay";
+ qcom,gsi-loader = "self";
memory-region = <&ipa_fw_mem>;
firmware-name = "qcom/sdm850/samsung/w737/ipa_fws.elf";
+ status = "okay";
};
/* No idea why it causes an SError when enabled */
@@ -399,49 +401,18 @@
};
&qup_i2c10_default {
- pinconf {
- pins = "gpio55", "gpio56";
- drive-strength = <2>;
- bias-disable;
- };
+ drive-strength = <2>;
+ bias-disable;
};
&qup_i2c11_default {
- pinconf {
- pins = "gpio31", "gpio32";
- drive-strength = <2>;
- bias-disable;
- };
+ drive-strength = <2>;
+ bias-disable;
};
&qup_i2c12_default {
- pinmux {
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-pull-down;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
+ drive-strength = <2>;
+ bias-disable;
};
&qupv3_id_0 {
@@ -549,69 +520,44 @@
&tlmm {
gpio-reserved-ranges = <0 6>, <85 4>;
- pen_irq_l: pen-irq-l {
- pinmux {
- pins = "gpio119";
- function = "gpio";
- };
-
- pinconf {
- pins = "gpio119";
- bias-disable;
- };
- };
-
- pen_pdct_l: pen-pdct-l {
- pinmux {
- pins = "gpio124";
- function = "gpio";
- };
-
- pinconf {
- pins = "gpio124";
- bias-disable;
- drive-strength = <2>;
- output-high;
- };
+ pen_irq_l: pen-irq-l-state {
+ pins = "gpio119";
+ function = "gpio";
+ bias-disable;
};
- pen_rst_l: pen-rst-l {
- pinmux {
- pins = "gpio21";
- function = "gpio";
- };
-
- pinconf {
- pins = "gpio21";
- bias-disable;
- drive-strength = <2>;
-
- /*
- * The pen driver doesn't currently support
- * driving this reset line. By specifying
- * output-high here we're relying on the fact
- * that this pin has a default pulldown at boot
- * (which makes sure the pen was in reset if it
- * was powered) and then we set it high here to
- * take it out of reset. Better would be if the
- * pen driver could control this and we could
- * remove "output-high" here.
- */
- output-high;
- };
+ pen_pdct_l: pen-pdct-l-state {
+ pins = "gpio124";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <2>;
+ output-high;
};
- wcd_intr_default: wcd_intr_default {
- pins = "gpio54";
+ pen_rst_l: pen-rst-l-state {
+ pins = "gpio21";
function = "gpio";
-
- input-enable;
- bias-pull-down;
+ bias-disable;
drive-strength = <2>;
+
+ /*
+ * The pen driver doesn't currently support
+ * driving this reset line. By specifying
+ * output-high here we're relying on the fact
+ * that this pin has a default pulldown at boot
+ * (which makes sure the pen was in reset if it
+ * was powered) and then we set it high here to
+ * take it out of reset. Better would be if the
+ * pen driver could control this and we could
+ * remove "output-high" here.
+ */
+ output-high;
};
};
&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&qup_uart6_4pin>;
status = "okay";
bluetooth {
@@ -701,11 +647,7 @@
firmware-name = "qcom/sdm850/samsung/w737/qcvss850.mbn";
};
-&wcd9340{
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
- clock-names = "extclk";
- clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
+&wcd9340 {
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;