diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-11-14 11:47:54 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-11-16 09:44:05 -0800 |
| commit | ecc2069a025e34b90033602a36d4cc171387a950 (patch) | |
| tree | 10e7f7e0b87021c2cc6c5076068f45afbb79a80a /drivers/gpu/drm/i915/intel_dpll_mgr.c | |
| parent | ec2f343e720eca5ec7015b4d2b5fc2703604835e (diff) | |
drm/i915/cnl: Remove useless conversion.
No functional change. Just starting the wrpll fixes
with a clean-up to make units a bit more clear.
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171114194759.24541-3-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 61c684ac47af..db7afd314462 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -2198,11 +2198,11 @@ static void cnl_wrpll_params_populate(struct skl_wrpll_params *params, uint32_t } static bool -cnl_ddi_calculate_wrpll(int clock /* in Hz */, +cnl_ddi_calculate_wrpll(int clock, struct drm_i915_private *dev_priv, struct skl_wrpll_params *wrpll_params) { - uint64_t afe_clock = clock * 5 / KHz(1); /* clocks in kHz */ + uint64_t afe_clock = clock * 5; unsigned int dco_min = 7998 * KHz(1); unsigned int dco_max = 10000 * KHz(1); unsigned int dco_mid = (dco_min + dco_max) / 2; @@ -2255,7 +2255,7 @@ static bool cnl_ddi_hdmi_pll_dividers(struct intel_crtc *crtc, cfgcr0 = DPLL_CFGCR0_HDMI_MODE; - if (!cnl_ddi_calculate_wrpll(clock * 1000, dev_priv, &wrpll_params)) + if (!cnl_ddi_calculate_wrpll(clock, dev_priv, &wrpll_params)) return false; cfgcr0 |= DPLL_CFGCR0_DCO_FRACTION(wrpll_params.dco_fraction) | |