| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-08-10 | Merge tag 'locking-urgent-2020-08-10' of git://git.kernel.org/pub/scm/linux/k... | Linus Torvalds | 1 | -0/+1 |
| 2020-08-06 | locking/seqlock, headers: Untangle the spaghetti monster | Peter Zijlstra | 1 | -0/+1 |
| 2020-07-25 | x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder La... | Fenghua Yu | 1 | -0/+2 |
| 2020-06-30 | x86/split_lock: Don't write MSR_TEST_CTRL on CPUs that aren't whitelisted | Sean Christopherson | 1 | -1/+10 |
| 2020-06-11 | Merge tag 'x86-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kerne... | Linus Torvalds | 1 | -0/+3 |
| 2020-06-09 | mm: reorder includes after introduction of linux/pgtable.h | Mike Rapoport | 1 | -1/+1 |
| 2020-06-09 | mm: introduce include/linux/pgtable.h | Mike Rapoport | 1 | -1/+1 |
| 2020-05-28 | x86/split_lock: Add Icelake microserver and Tigerlake CPU models | Fenghua Yu | 1 | -0/+3 |
| 2020-05-06 | x86/resctrl: Query LLC monitoring properties once during boot | Reinette Chatre | 1 | -0/+7 |
| 2020-04-18 | x86/split_lock: Add Tremont family CPU models | Tony Luck | 1 | -0/+3 |
| 2020-04-18 | x86/split_lock: Bits in IA32_CORE_CAPABILITIES are not architectural | Tony Luck | 1 | -14/+31 |
| 2020-04-17 | x86/split_lock: Update to use X86_MATCH_INTEL_FAM6_MODEL() | Tony Luck | 1 | -4/+2 |
| 2020-04-11 | x86/split_lock: Provide handle_guest_split_lock() | Thomas Gleixner | 1 | -5/+28 |
| 2020-03-27 | x86/split_lock: Avoid runtime reads of the TEST_CTRL MSR | Xiaoyao Li | 1 | -5/+4 |
| 2020-03-27 | x86/split_lock: Rework the initialization flow of split lock detection | Xiaoyao Li | 1 | -33/+42 |
| 2020-02-20 | x86/split_lock: Enable split lock detection by kernel | Peter Zijlstra (Intel) | 1 | -0/+175 |
| 2020-01-30 | Merge tag 'mpx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/da... | Linus Torvalds | 1 | -36/+0 |
| 2020-01-23 | x86/mpx: remove MPX from arch/x86 | Dave Hansen | 1 | -36/+0 |
| 2020-01-13 | x86/cpu: Set synthetic VMX cpufeatures during init_ia32_feat_ctl() | Sean Christopherson | 1 | -49/+0 |
| 2020-01-13 | x86/intel: Initialize IA32_FEAT_CTL MSR at boot | Sean Christopherson | 1 | -0/+2 |
| 2019-11-19 | Merge tag 'v5.4-rc8' into WIP.x86/mm, to pick up fixes | Ingo Molnar | 1 | -15/+21 |
| 2019-10-28 | x86/cpu: Add a "tsx=" cmdline option with TSX disabled by default | Pawan Gupta | 1 | -0/+5 |
| 2019-09-16 | x86/cpu: Clean up intel_tlb_table[] | Sylvain 'ythier' Hitier | 1 | -4/+4 |
| 2019-09-06 | x86/cpu: Update init data for new Airmont CPU model | Rahul Tanwar | 1 | -0/+1 |
| 2019-09-06 | Merge branch 'x86/cleanups' into x86/cpu, to pick up dependent changes | Ingo Molnar | 1 | -3/+3 |
| 2019-08-28 | x86/intel: Aggregate microserver naming | Peter Zijlstra | 1 | -2/+2 |
| 2019-08-28 | x86/intel: Aggregate big core graphics naming | Peter Zijlstra | 1 | -2/+2 |
| 2019-08-28 | x86/intel: Aggregate big core mobile naming | Peter Zijlstra | 1 | -3/+3 |
| 2019-08-28 | x86/intel: Aggregate big core client naming | Peter Zijlstra | 1 | -5/+5 |
| 2019-08-17 | x86/cpu: Use constant definitions for CPU models | Rahul Tanwar | 1 | -3/+3 |
| 2019-06-28 | x86/cpu/intel: Clear cache self-snoop capability in CPUs with known errata | Ricardo Neri | 1 | -0/+27 |
| 2019-04-07 | PM / arch: x86: Rework the MSR_IA32_ENERGY_PERF_BIAS handling | Rafael J. Wysocki | 1 | -34/+0 |
| 2018-08-27 | x86/spectre: Add missing family 6 check to microcode check | Andi Kleen | 1 | -0/+3 |
| 2018-08-14 | Merge branch 'l1tf-final' of git://git.kernel.org/pub/scm/linux/kernel/git/ti... | Linus Torvalds | 1 | -0/+7 |
| 2018-08-03 | x86/cpufeatures: Add EPT_AD feature bit | Peter Feiner | 1 | -1/+9 |
| 2018-06-21 | x86/cpu/intel: Evaluate smp_num_siblings early | Thomas Gleixner | 1 | -0/+7 |
| 2018-06-04 | Merge branch 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kerne... | Linus Torvalds | 1 | -29/+5 |
| 2018-05-19 | Merge branches 'x86/urgent' and 'core/urgent' into x86/boot, to pick up fixes... | Ingo Molnar | 1 | -0/+3 |
| 2018-05-17 | x86/cpufeatures: Disentangle SSBD enumeration | Thomas Gleixner | 1 | -0/+1 |
| 2018-05-17 | x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRS | Thomas Gleixner | 1 | -0/+1 |
| 2018-05-13 | x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() | Thomas Gleixner | 1 | -1/+1 |
| 2018-05-13 | x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() | David Wang | 1 | -10/+4 |
| 2018-05-13 | x86/CPU: Make intel_num_cpu_cores() generic | David Wang | 1 | -19/+1 |
| 2018-05-09 | x86/bugs: Rename _RDS to _SSBD | Konrad Rzeszutek Wilk | 1 | -1/+1 |
| 2018-05-03 | x86/bugs/intel: Set proper CPU features and setup RDS | Konrad Rzeszutek Wilk | 1 | -0/+1 |
| 2018-04-26 | x86/cpu/intel: Add missing TLB cpuid values | jacek.tomaka@poczta.fm | 1 | -0/+3 |
| 2018-03-31 | x86/cpu/tme: Fix spelling: "configuation" -> "configuration" | Colin Ian King | 1 | -1/+1 |
| 2018-03-27 | x86/mm: Update comment in detect_tme() regarding x86_phys_bits | Kirill A. Shutemov | 1 | -5/+2 |
| 2018-03-27 | Merge tag 'v4.16-rc7' into x86/mm, to fix up conflict | Ingo Molnar | 1 | -2/+1 |
| 2018-03-16 | x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist | Alexander Sergeyev | 1 | -2/+1 |
