diff options
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pci.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pm.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_uc_fw.c | 3 |
3 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index a66c09599300..aeae675c912b 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -436,6 +436,7 @@ static const struct pci_device_id pciidlist[] = { INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc), INTEL_ARL_IDS(INTEL_VGA_DEVICE, &mtl_desc), INTEL_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc), + INTEL_PVC_IDS(INTEL_VGA_DEVICE, &pvc_desc), INTEL_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc), INTEL_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc), INTEL_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc), diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 7b089e6fb63f..4f8688fd3f00 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -357,10 +357,6 @@ ALLOW_ERROR_INJECTION(xe_pm_init_early, ERRNO); /* See xe_pci_probe() */ static u32 vram_threshold_value(struct xe_device *xe) { - /* FIXME: D3Cold temporarily disabled by default on BMG */ - if (xe->info.platform == XE_BATTLEMAGE) - return 0; - return DEFAULT_VRAM_THRESHOLD; } diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c index 622b76078567..b4cd6226ad31 100644 --- a/drivers/gpu/drm/xe/xe_uc_fw.c +++ b/drivers/gpu/drm/xe/xe_uc_fw.c @@ -115,10 +115,13 @@ struct fw_blobs_by_type { #define XE_GT_TYPE_ANY XE_GT_TYPE_UNINITIALIZED #define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver) \ + fw_def(CRESCENTISLAND, GT_TYPE_ANY, mmp_ver(xe, guc, cri, 70, 49, 4)) \ + fw_def(NOVALAKE_S, GT_TYPE_ANY, mmp_ver(xe, guc, nvl, 70, 49, 4)) \ fw_def(PANTHERLAKE, GT_TYPE_ANY, major_ver(xe, guc, ptl, 70, 49, 4)) \ fw_def(BATTLEMAGE, GT_TYPE_ANY, major_ver(xe, guc, bmg, 70, 49, 4)) \ fw_def(LUNARLAKE, GT_TYPE_ANY, major_ver(xe, guc, lnl, 70, 45, 2)) \ fw_def(METEORLAKE, GT_TYPE_ANY, major_ver(i915, guc, mtl, 70, 44, 1)) \ + fw_def(PVC, GT_TYPE_ANY, mmp_ver(xe, guc, pvc, 70, 44, 1)) \ fw_def(DG2, GT_TYPE_ANY, major_ver(i915, guc, dg2, 70, 45, 2)) \ fw_def(DG1, GT_TYPE_ANY, major_ver(i915, guc, dg1, 70, 44, 1)) \ fw_def(ALDERLAKE_N, GT_TYPE_ANY, major_ver(i915, guc, tgl, 70, 44, 1)) \ |