diff options
| author | Douglas Anderson <dianders@chromium.org> | 2020-06-12 12:30:49 -0700 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2020-06-18 11:40:38 +0200 |
| commit | c42fb724cdf608ef7234da7281d66de2eb102a73 (patch) | |
| tree | 016106d4d65ec8fa020c401845aeca9fff3be753 | |
| parent | f4946b0a37156a5390444558700eeac1d671fdcb (diff) | |
drm/bridge: ti-sn65dsi86: Fix kernel-doc typo ln_polr => ln_polrs
This fixes a kernel doc warning due to a typo:
warning: Function parameter or member 'ln_polrs' not described in 'ti_sn_bridge'
Fixes: 5bebaeadb30e ("drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200612123003.v2.3.Ib616e311c48cc64b2cef11bd54d4a9cedc874bb1@changeid
| -rw-r--r-- | drivers/gpu/drm/bridge/ti-sn65dsi86.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index fca7c2a0bcf9..1080e4f9df96 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -122,7 +122,7 @@ * @supplies: Data for bulk enabling/disabling our regulators. * @dp_lanes: Count of dp_lanes we're using. * @ln_assign: Value to program to the LN_ASSIGN register. - * @ln_polr: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG. + * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG. * * @gchip: If we expose our GPIOs, this is used. * @gchip_output: A cache of whether we've set GPIOs to output. This |