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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2016-02-26 15:29:32 -0600
committerDave Airlie <airlied@redhat.com>2016-03-02 17:50:17 +1000
commit2d02b8bdba322b527c5f5168ce1ca10c2d982a78 (patch)
tree562afede287656dae0c54d491c7b76a6c067080b /drivers/gpu/drm/ast
parentead8f34c701ec7bf3234118b8c746227f30dfd1a (diff)
drm/ast: Fix incorrect register check for DRAM width
During DRAM initialization on certain ASpeed devices, an incorrect bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/ast')
-rw-r--r--drivers/gpu/drm/ast/ast_main.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 9759009d1da3..b1480acbb3c3 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev)
} while (ast_read32(ast, 0x10000) != 0x01);
data = ast_read32(ast, 0x10004);
- if (data & 0x400)
+ if (data & 0x40)
ast->dram_bus_width = 16;
else
ast->dram_bus_width = 32;