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author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-29 20:14:06 -0400 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-29 20:14:06 -0400 |
commit | cecd0e6630cd8180c72341a03c7f1dfbfccbb417 (patch) | |
tree | d2ebd4252639a1dcd89b2e55d795acc62b922ebd | |
parent | c15cbbba9e165b9ee5a8b19b180a8aa21e158272 (diff) |
R600/SI: XXX: Use correct operands for DS instructionssi-spill-fixes-v2
-rw-r--r-- | lib/Target/R600/SIInstrInfo.cpp | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index 879653c6b64..1149214afa4 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -454,9 +454,7 @@ bool SIInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { .addImm(0) // gds .addReg(AddrReg) // addr .addReg(SubReg) // data0 - .addReg(SubReg) // data0 - .addImm(0) // offset0 - .addImm(0); //offset1 + .addImm(0); // offset } MI->eraseFromParent(); @@ -490,10 +488,7 @@ bool SIInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const { BuildMI(MBB, MI, DL, get(AMDGPU::DS_READ_B32), SubReg) .addImm(0) // gds .addReg(AddrReg) // addr - .addReg(AddrReg) // data0 - .addReg(AddrReg) // data0 - .addImm(0) // offset0 - .addImm(0); //offset1 + .addImm(0); //offset } MI->eraseFromParent(); break; |