summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/nouveau/nv04_pm.c
diff options
context:
space:
mode:
authorBen Skeggs <bskeggs@redhat.com>2012-07-31 16:16:21 +1000
committerBen Skeggs <bskeggs@redhat.com>2012-10-03 13:12:59 +1000
commit77145f1cbdf8d28b46ff8070ca749bad821e0774 (patch)
treeb496d5d69ce4f5753028b07b09d8cf12025310f2 /drivers/gpu/drm/nouveau/nv04_pm.c
parent2094dd82eddc468b53ee99d92c38b23a65efac03 (diff)
drm/nouveau: port remainder of drm code, and rip out compat layer
v2: Ben Skeggs <bskeggs@redhat.com> - fill in nouveau_pm.dev to prevent oops - fix ppc issues (build + OF shadow) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_pm.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_pm.c36
1 files changed, 22 insertions, 14 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_pm.c b/drivers/gpu/drm/nouveau/nv04_pm.c
index 76b5340603a9..410be011c2f0 100644
--- a/drivers/gpu/drm/nouveau/nv04_pm.c
+++ b/drivers/gpu/drm/nouveau/nv04_pm.c
@@ -23,10 +23,15 @@
*/
#include "drmP.h"
-#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_reg.h"
#include "nouveau_hw.h"
#include "nouveau_pm.h"
+#include <subdev/bios/pll.h>
+#include <subdev/clock.h>
+#include <subdev/timer.h>
+
int
nv04_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)
{
@@ -58,13 +63,16 @@ struct nv04_pm_state {
static int
calc_pll(struct drm_device *dev, u32 id, int khz, struct nv04_pm_clock *clk)
{
+ struct nouveau_device *device = nouveau_dev(dev);
+ struct nouveau_bios *bios = nouveau_bios(device);
+ struct nouveau_clock *pclk = nouveau_clock(device);
int ret;
- ret = get_pll_limits(dev, id, &clk->pll);
+ ret = nvbios_pll_parse(bios, id, &clk->pll);
if (ret)
return ret;
- ret = nouveau_calc_pll_mnp(dev, &clk->pll, khz, &clk->calc);
+ ret = pclk->pll_calc(pclk, &clk->pll, khz, &clk->calc);
if (!ret)
return -EINVAL;
@@ -100,38 +108,38 @@ error:
static void
prog_pll(struct drm_device *dev, struct nv04_pm_clock *clk)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_device *device = nouveau_dev(dev);
+ struct nouveau_clock *pclk = nouveau_clock(device);
u32 reg = clk->pll.reg;
/* thank the insane nouveau_hw_setpll() interface for this */
- if (dev_priv->card_type >= NV_40)
+ if (device->card_type >= NV_40)
reg += 4;
- nouveau_hw_setpll(dev, reg, &clk->calc);
+ pclk->pll_prog(pclk, reg, &clk->calc);
}
int
nv04_pm_clocks_set(struct drm_device *dev, void *pre_state)
{
- struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_device *device = nouveau_dev(dev);
+ struct nouveau_timer *ptimer = nouveau_timer(device);
struct nv04_pm_state *state = pre_state;
prog_pll(dev, &state->core);
if (state->memory.pll.reg) {
prog_pll(dev, &state->memory);
- if (dev_priv->card_type < NV_30) {
- if (dev_priv->card_type == NV_20)
- nv_mask(dev, 0x1002c4, 0, 1 << 20);
+ if (device->card_type < NV_30) {
+ if (device->card_type == NV_20)
+ nv_mask(device, 0x1002c4, 0, 1 << 20);
/* Reset the DLLs */
- nv_mask(dev, 0x1002c0, 0, 1 << 8);
+ nv_mask(device, 0x1002c0, 0, 1 << 8);
}
}
-#if 0 /*XXX*/
- ptimer->init(dev);
-#endif
+ nv_ofuncs(ptimer)->init(nv_object(ptimer));
kfree(state);
return 0;