drm/i915/display: drop color hooks.i915-display-funcs-refactor-wip

These are all self contained in one file.

2 files changed, 67 insertions, 86 deletions

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index b1eac554a4b3..3542c355b3fe 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1137,14 +1137,41 @@ void intel_color_load_luts(const struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
 
-	dev_priv->display->funcs.load_luts(crtc_state);
+	if (HAS_GMCH(dev_priv)) {
+		if (IS_CHERRYVIEW(dev_priv))
+			chv_load_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) >= 4)
+			i965_load_luts(crtc_state);
+		else
+			i9xx_load_luts(crtc_state);
+	} else {
+		if (DISPLAY_VER(dev_priv) >= 11)
+			icl_load_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) == 10)
+			glk_load_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) >= 8)
+			bdw_load_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) >= 7)
+			ivb_load_luts(crtc_state);
+		else
+			ilk_load_luts(crtc_state);
+	}
 }
 
 void intel_color_commit(const struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
 
-	dev_priv->display->funcs.color_commit(crtc_state);
+	if (HAS_GMCH(dev_priv)) {
+		i9xx_color_commit(crtc_state);
+	} else {
+		if (DISPLAY_VER(dev_priv) >= 9)
+			skl_color_commit(crtc_state);
+		else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+			hsw_color_commit(crtc_state);
+		else
+			ilk_color_commit(crtc_state);
+	}
 }
 
 static bool intel_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
@@ -1196,21 +1223,6 @@ static bool glk_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
 		!old_crtc_state->hw.gamma_lut;
 }
 
-int intel_color_check(struct intel_crtc_state *crtc_state)
-{
-	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
-
-	return dev_priv->display->funcs.color_check(crtc_state);
-}
-
-void intel_color_get_config(struct intel_crtc_state *crtc_state)
-{
-	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
-
-	if (dev_priv->display->funcs.read_luts)
-		dev_priv->display->funcs.read_luts(crtc_state);
-}
-
 static bool need_plane_update(struct intel_plane *plane,
 			      const struct intel_crtc_state *crtc_state)
 {
@@ -2092,63 +2104,54 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
 	}
 }
 
-void intel_color_init(struct intel_crtc *crtc)
+int intel_color_check(struct intel_crtc_state *crtc_state)
 {
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-	bool has_ctm = INTEL_INFO(dev_priv)->color.degamma_lut_size != 0;
-
-	drm_mode_crtc_set_gamma_size(&crtc->base, 256);
+	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
 
 	if (HAS_GMCH(dev_priv)) {
-		if (IS_CHERRYVIEW(dev_priv)) {
-			dev_priv->display->funcs.color_check = chv_color_check;
-			dev_priv->display->funcs.color_commit = i9xx_color_commit;
-			dev_priv->display->funcs.load_luts = chv_load_luts;
-			dev_priv->display->funcs.read_luts = chv_read_luts;
-		} else if (DISPLAY_VER(dev_priv) >= 4) {
-			dev_priv->display->funcs.color_check = i9xx_color_check;
-			dev_priv->display->funcs.color_commit = i9xx_color_commit;
-			dev_priv->display->funcs.load_luts = i965_load_luts;
-			dev_priv->display->funcs.read_luts = i965_read_luts;
-		} else {
-			dev_priv->display->funcs.color_check = i9xx_color_check;
-			dev_priv->display->funcs.color_commit = i9xx_color_commit;
-			dev_priv->display->funcs.load_luts = i9xx_load_luts;
-			dev_priv->display->funcs.read_luts = i9xx_read_luts;
-		}
+		if (IS_CHERRYVIEW(dev_priv))
+			return chv_color_check(crtc_state);
+		return i9xx_color_check(crtc_state);
 	} else {
 		if (DISPLAY_VER(dev_priv) >= 11)
-			dev_priv->display->funcs.color_check = icl_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 10)
-			dev_priv->display->funcs.color_check = glk_color_check;
-		else if (DISPLAY_VER(dev_priv) >= 7)
-			dev_priv->display->funcs.color_check = ivb_color_check;
+			return icl_color_check(crtc_state);
+		if (DISPLAY_VER(dev_priv) >= 10)
+			return glk_color_check(crtc_state);
+		if (DISPLAY_VER(dev_priv) >= 7)
+			return ivb_color_check(crtc_state);
 		else
-			dev_priv->display->funcs.color_check = ilk_color_check;
+			return ilk_color_check(crtc_state);
+	}
+}
 
-		if (DISPLAY_VER(dev_priv) >= 9)
-			dev_priv->display->funcs.color_commit = skl_color_commit;
-		else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
-			dev_priv->display->funcs.color_commit = hsw_color_commit;
+void intel_color_get_config(struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+
+	if (HAS_GMCH(dev_priv)) {
+		if (IS_CHERRYVIEW(dev_priv))
+			chv_read_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) >= 4)
+			i965_read_luts(crtc_state);
 		else
-			dev_priv->display->funcs.color_commit = ilk_color_commit;
-
-		if (DISPLAY_VER(dev_priv) >= 11) {
-			dev_priv->display->funcs.load_luts = icl_load_luts;
-			dev_priv->display->funcs.read_luts = icl_read_luts;
-		} else if (DISPLAY_VER(dev_priv) == 10) {
-			dev_priv->display->funcs.load_luts = glk_load_luts;
-			dev_priv->display->funcs.read_luts = glk_read_luts;
-		} else if (DISPLAY_VER(dev_priv) >= 8) {
-			dev_priv->display->funcs.load_luts = bdw_load_luts;
-		} else if (DISPLAY_VER(dev_priv) >= 7) {
-			dev_priv->display->funcs.load_luts = ivb_load_luts;
-		} else {
-			dev_priv->display->funcs.load_luts = ilk_load_luts;
-			dev_priv->display->funcs.read_luts = ilk_read_luts;
-		}
+			i9xx_read_luts(crtc_state);
+	} else {
+		if (DISPLAY_VER(dev_priv) >= 11)
+			icl_read_luts(crtc_state);
+		else if (DISPLAY_VER(dev_priv) == 10)
+			glk_read_luts(crtc_state);
+		/* no hsw/bdw read luts */
+		else if (DISPLAY_VER(dev_priv) < 7)
+			ilk_read_luts(crtc_state);
 	}
+}
 
+void intel_color_init(struct intel_crtc *crtc)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	bool has_ctm = INTEL_INFO(dev_priv)->color.degamma_lut_size != 0;
+
+	drm_mode_crtc_set_gamma_size(&crtc->base, 256);
 	drm_crtc_enable_color_mgmt(&crtc->base,
 				   INTEL_INFO(dev_priv)->color.degamma_lut_size,
 				   has_ctm,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 92048b7875ec..31b427a6c711 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -363,28 +363,6 @@ struct drm_i915_display_funcs {
 			       const struct intel_crtc_state *crtc_state);
 	void (*init_clock_gating)(struct drm_i915_private *dev_priv);
 	void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
-	/* clock updates for mode set */
-	/* cursor updates */
-	/* render clock increase/decrease */
-	/* display clock increase/decrease */
-	/* pll clock increase/decrease */
-
-	int (*color_check)(struct intel_crtc_state *crtc_state);
-	/*
-	 * Program double buffered color management registers during
-	 * vblank evasion. The registers should then latch during the
-	 * next vblank start, alongside any other double buffered registers
-	 * involved with the same commit.
-	 */
-	void (*color_commit)(const struct intel_crtc_state *crtc_state);
-	/*
-	 * Load LUTs (and other single buffered color management
-	 * registers). Will (hopefully) be called during the vblank
-	 * following the latching of any double buffered registers
-	 * involved with the same commit.
-	 */
-	void (*load_luts)(const struct intel_crtc_state *crtc_state);
-	void (*read_luts)(struct intel_crtc_state *crtc_state);
 };